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When cpuid.2 reports a cache descriptor of 0xff, that means cpuid.2
doesn't contain any information about caches and that instead you are
supposed to find this information in cpuid.4.
This patch adds support for decoding that information.
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This corresponds to an ITLB for 2M/4M pages with 8 entries.
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Should solve https://bugzilla.redhat.com/show_bug.cgi?id=928889
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Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
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Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
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having to change it in several places is a recipe for failure.
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Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
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Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
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/tmp/ccBWbFEv.s: Assembler messages:
/tmp/ccBWbFEv.s:447: Error: suffix or operands invalid for `nop'
make: *** [features.o] Error 1
# as --version
GNU assembler 2.15.92.0.2 20040927
Copyright 2002 Free Software Foundation, Inc.
This program is free software; you may redistribute it under the terms of
the GNU General Public License. This program has absolutely no warranty.
This assembler was configured for a target of `i386-redhat-linux'.
So maybe you could hardcode "nopl (%eax)" ?
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As noted on the Gentoo bugzilla
(https://bugs.gentoo.org/show_bug.cgi?id=367823) x86info fails to compile
with python-3.
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Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
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Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
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Signed-off-by: Jike Song <albcamus@gmail.com>
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Of course no verbose information but only the plain value of the
register (if it's a valid MSR address) can be provided. Example:
# lsmsr -r 0xdeadbeef -l
warning: unknown MSR deadbeef
unknown: 0xdeadbeef; (at your own risk)
# lsmsr -r 0xdeadbeef
warning: unknown MSR deadbeef
could not read MSR 0xdeadbeef ((null)): Input/output error
unknown = 0x0000000000000000
Artificial example (forcing use of family 0xf register description and
showing PstateControl MSR on a family 0x10 CPU):
# ./lsmsr -r 0xc0010062 -f 0xf
warning: unknown MSR c0010062
unknown = 0x0000000000000003
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
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Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
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Also fix dependency for lsmsr.o to force recompilation in case that a
header file has changed.
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
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Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
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Patch 208fb9613c8c151b2885e89066a3eb22a977df6f introduced breakage on
x86_64. Fix this and also replace usage of post by pre-increment to
avoid potential issues with operator priority.
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
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This reverts commit 13601fa772f8525f208eb81914893d8204495a05.
Turn it back off again. Need to do a release to fix lsmsr.
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Provide just a general model description for all family 10h CPUs. It's
not possible to derive from model/family/stepping whether its an
Phenom or Turion II etc. This information is provided in the processor
name string. (It could be decoded from other CPUID information and
with help of CPU revision guides but that's not yet implemented.)
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
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Fix output on systems with boosted Pstates. Indicate whether CPB is enabled.
Display all Pstates (including the boosted ones).
Example:
Boosting enabled
Number of boost states: 1
Pstate-Pb0: 3600MHz (boost state)
Pstate-P0: 3200MHz (current)
Pstate-P1: 2400MHz
Pstate-P2: 1600MHz
Pstate-P3: 800MHz
In addition get rid of fid and vid information for HW Pstates.
It's too CPU family specific. (Use lsmsr instead for this kind of information.)
Note: this patch adds a new requirement to link x86info against libpci
which usually is installed with pciutils (http://mj.ucw.cz/pciutils.html).
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
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See CPUID Specification, Rev. 2.34, Sept. 2010.
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
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Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
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Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
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Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
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Commit 208fb9613c8c151b2885e89066a3eb22a977df6f (Fix up aliasing warnings.)
changed pointer arithmetic in one part of cpuid function from
- if (eax!=0) *eax = (*(unsigned *)(buffer ));
- if (ebx!=0) *ebx = (*(unsigned *)(buffer+ 4));
- if (ecx!=0) *ecx = (*(unsigned *)(buffer+ 8));
- if (edx!=0) *edx = (*(unsigned *)(buffer+12));
+ if (eax!=0) *eax = *(ptr)++;
+ if (ebx!=0) *ebx = *(ptr)++;
+ if (ecx!=0) *ecx = *(ptr)++;
+ if (edx!=0) *edx = *(ptr);
The post-increment is not equal to what was used before. This
causes generation of wrong cpuid information, e.g. lsmsr fails:
$ ./lsmsr -a -l
CPU not (yet) supported (vendor="(unknown)", family=16, model=10)
Fix this by pre-incrementing the pointer before it is dereferenced.
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
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gcc has started complaining about these even if passed -fno-strict-aliasing
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Reported-by: Andre Nogueira <andre.neo.net@gmail.com>
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we want this to print out with --msr for eg, without needing to
pass --verbose too.
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The .P files really bothered me for a long time, cluttering up the directory
while hacking. Things seem to build just fine without any of this stuff.
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