diff options
| author | Dave Jones <davej@redhat.com> | 2011-12-28 17:55:54 -0500 |
|---|---|---|
| committer | Dave Jones <davej@redhat.com> | 2011-12-28 17:55:54 -0500 |
| commit | 556599c4dac5c87a31126f42d38d7b7ec29f105e (patch) | |
| tree | c690d28a04aa5e8da2e2851fc949091303698947 | |
| parent | 8052aabdd159bc9050e7dc264f33782c5acce05f (diff) | |
Fix logic bug spotted by coverity
| -rw-r--r-- | Intel/MSR-IDA.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/Intel/MSR-IDA.c b/Intel/MSR-IDA.c index 191f0db..eb9ab4f 100644 --- a/Intel/MSR-IDA.c +++ b/Intel/MSR-IDA.c @@ -26,7 +26,7 @@ void dump_IDA_MSRs(struct cpudata *cpu) printf("Dynamic Acceleration MSRs:\n"); printf(" Opportunistic performance operation "); - if ((eax & (1 << 1)) == 1) + if (!(eax & (1 << 1))) printf("enabled by BIOS\n"); else printf("disabled by BIOS (or not supported)\n"); @@ -34,7 +34,7 @@ void dump_IDA_MSRs(struct cpudata *cpu) if (read_msr(cpu->number, MSR_IA32_MISC_ENABLE, &val) != 1) return; - if ((val & (1ULL << 38)) == 1) { + if (!(val & (1ULL << 38))) { printf(" IA32_MISC_ENABLES[38] is 1 (disabled opportunistic performance operation)\n"); return; } @@ -42,7 +42,7 @@ void dump_IDA_MSRs(struct cpudata *cpu) if (read_msr(cpu->number, MSR_IA32_PERF_CTL, &val) != 1) return; printf(" IA32_PERF_CTL: "); - if ((val & (1ULL << 32)) == 1) { + if (!(val & (1ULL << 32))) { printf("IDA/Turbo DISENGAGE=1, "); } printf("EIST Transition target: 0x%x\n", (unsigned int) val & 0xff); |