diff options
| author | Dave Jones <davej@redhat.com> | 2011-03-12 19:54:58 -0500 |
|---|---|---|
| committer | Dave Jones <davej@redhat.com> | 2011-03-12 19:54:58 -0500 |
| commit | 4f3de7add3ef2fa9ac7312e6e8e7751f5266081e (patch) | |
| tree | dda03b6406dc424b5a3d15dbffba28623112176e | |
| parent | 5fe2a08dea0e35ba4d17e59fc3c778e1acfc95a0 (diff) | |
Fix up the 32bit build.
Reported-by: Andre Nogueira <andre.neo.net@gmail.com>
| -rw-r--r-- | Intel/MSR-IDA.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/Intel/MSR-IDA.c b/Intel/MSR-IDA.c index f6072b5..191f0db 100644 --- a/Intel/MSR-IDA.c +++ b/Intel/MSR-IDA.c @@ -34,7 +34,7 @@ void dump_IDA_MSRs(struct cpudata *cpu) if (read_msr(cpu->number, MSR_IA32_MISC_ENABLE, &val) != 1) return; - if ((val & (1L << 38)) == 1) { + if ((val & (1ULL << 38)) == 1) { printf(" IA32_MISC_ENABLES[38] is 1 (disabled opportunistic performance operation)\n"); return; } @@ -42,7 +42,7 @@ void dump_IDA_MSRs(struct cpudata *cpu) if (read_msr(cpu->number, MSR_IA32_PERF_CTL, &val) != 1) return; printf(" IA32_PERF_CTL: "); - if ((val & (1L << 32)) == 1) { + if ((val & (1ULL << 32)) == 1) { printf("IDA/Turbo DISENGAGE=1, "); } printf("EIST Transition target: 0x%x\n", (unsigned int) val & 0xff); |