~tstellar/llvm - Unnamed repository; edit this file 'description' to name the repository.

Branch	Commit message	Author	Age
9.1-abi-fix	R600: Move intrinsic definitions into the R600 target directory	Tom Stellard	12 years
Nov13-test	AMDGPU: Fix builds with -DNDEBUG	Tom Stellard	12 years
Oct18-backup	R600: Remove deprecated code from R600MCCodeEmitter	Tom Stellard	12 years
assembler	XXX: Select all immediates to SALU	Tom Stellard	10 years
assembler-Jan-06-2015	XXX: R600/SI VOP1 Assembler	Tom Stellard	10 years
assembler-push	R600/SI: Initial support for assembler and inline assembly	Tom Stellard	10 years
backup-Oct15	XXX: WIP no MIOperandInfo way	Tom Stellard	12 years
backup-Oct18	R600: Organize pseudo instruction in R600Instructions.td	Tom Stellard	12 years
bfgminer	XXX: R600: limit vtx clauses to one instructions	Tom Stellard	12 years
bfgminer-perf	R600: Use correct CF_END instruction on Northern Island GPUs	Tom Stellard	12 years
cayman-only-bfgminer	XXX: Use correct encoding for Vertex Fetch instructions on Cayman.	Tom Stellard	11 years
clover-elf	R600: AsmPrinter - Call EmitFunctionHeader() to populate symbol table	Tom Stellard	11 years
clover-elf-v2	R600/SI: Remove assertion in SIInstrInfo::areLoadsFromSameBasePtr()	Tom Stellard	10 years
hazard-rec	AMDGPU: Implement SIRegisterInfo::getRegPressureSetScore()	Tom Stellard	9 years
hsa	R600/SI: Emit amd_kernel_code_t header for AMDGPU environment	Tom Stellard	10 years
image-support	XXX: Working	Tom Stellard	11 years
indirect-addressing	XXX:	Tom Stellard	12 years
indirect-wip	XXX: Backout LiveInterval changes and don't run MachineCSE	Tom Stellard	12 years
indirect-wip-2	R600: Support for indirect addressing	Tom Stellard	12 years
indirect-wip-3	XXX: First try at LDS.	Tom Stellard	12 years
indirect-wip-4	XXX: Moved most of code into its own path using Christian's REG_SEQUENCE	Tom Stellard	12 years
indirect-wip-5	R600: Support for indirect addressing	Tom Stellard	12 years
kernel-args-WIP	XXX: Kernel args	Tom Stellard	11 years
lds	XXX: More LDS	Tom Stellard	12 years
lds-v2	R600: Add local memory support via LDS	Tom Stellard	11 years
long-alu	XXX: Barrier squash	Tom Stellard	11 years
madk	R600/SI: Use v_madmk_f32	Matt Arsenault	10 years
master	R600: Fix up test/CodeGen/R600/llvm.pow.ll for r177730	Michel Danzer	12 years
master-testing	SROA: Prevent a cross address space bitcast	Tom Stellard	11 years
master-testing-patches	R600/SI: Use immediates offsets for SMRD instructions whenever possible	Tom Stellard	11 years
master-testing-patches-v2	XXX: Matt's patch	Tom Stellard	11 years
master-testing-si	XXX: Const fixes	Tom Stellard	11 years
master-testing-v2	XXX: 32-bit priv fixes	Tom Stellard	11 years
mi-sched-experimental	ScheduleDAGInstrs: Consider sub-registers when computing vreg def dependencies	Tom Stellard	10 years
native	R600: use native for alu	Vincent Lejeune	12 years
opencv-Sep18-patches	StructurizeCFG: Add dependency on LowerSwitch pass	Tom Stellard	11 years
perf-Dec31-2014	R600: Enable subreg liveness	Tom Stellard	10 years
perf-Jan-08-2015	R600: Enable subreg liveness	Tom Stellard	10 years
push-jan16	R600/SI: Use unnormalized coordinates for sampling with the RECT target.	Michel Dänzer	12 years
r600	test/CodeGen/R600: Add some basic tests	Tom Stellard	13 years
r600-May09	R600: Remove R600ShaderPatterns.td	Tom Stellard	13 years
r600-alu-encoding	R600: Remove deprecated code from R600MCCodeEmitter	Tom Stellard	12 years
r600-final-push	Fix warnings	Tom Stellard	12 years
r600-gen-fixes	R600: Fix the fetch limits for R600 generation GPUs	Tom Stellard	12 years
r600-imm-flags	AMDGPU: Use new OperandWithDefaultOps for DOT* instructions	Tom Stellard	12 years
r600-initial-review	Build script changes for R600/SI Codegen	Tom Stellard	13 years
r600-initial-review-May11	Fixup SIInstrInfo after patches	Tom Stellard	13 years
r600-master	test/CodeGen/R600: Add some basic tests v7	Tom Stellard	12 years
r600-private-mem-fixes	R600/SI: Add support for private address space load/store	Tom Stellard	11 years
r600-private-memory	XXX: SALU	Tom Stellard	11 years
r600-review-v10	R600: Fix lowering of vbuild	Tom Stellard	12 years
r600-review-v3	AMDIL: Add missing files R600MachineFunctionInfo.{cpp,h}	Tom Stellard	13 years
r600-review-v7	test/CodeGen/R600: Add some basic tests	Tom Stellard	12 years
r600-review-v8	test/CodeGen/R600: Add some basic tests	Tom Stellard	12 years
r600-review-v9	AMDGPU: Fix register assembly for SI	Tom Stellard	12 years
r600-rewrite-pats	R600: Convert the rest of the patterns	Tom Stellard	12 years
r600-structurizer	XXX: Fix failure of assrt	Tom Stellard	12 years
r600-structurizer-v2	XXX: Lower PRED_SET directly to PRED_SET_*	Tom Stellard	12 years
r600-tablegen-hwreg	Add MCRegisterInfo parameter to createMCCodeEmitter functions	Tom Stellard	13 years
r600-tablegen-reg-encoding	AMDIL: Remove SubRegClasses field from Register Classes	Tom Stellard	13 years
r600-vliw	AMDIL: Add AMDGPUSubtarget class	Tom Stellard	13 years
remove-fold-operands	R600/SI: Remove SIISelLowering::legalizeOperands()	Tom Stellard	10 years
sched-fixes	XXX: Indirect fixes	Tom Stellard	12 years
sched-perf-Mar-27-2015	R600/SI: Disable register pressure tracking in the scheduler	Tom Stellard	10 years
si-compute	XXX: It works	Tom Stellard	12 years
si-compute-v3	XXX: Add real SI processors	Tom Stellard	12 years
si-fold	R600/SI: Add SIFoldOperands pass	Tom Stellard	10 years
si-lowercase	R600/SI: Change all instruction assembly names to lowercase.	Tom Stellard	10 years
si-scheduler	R600/SI: Define a schedule model and enable the converging scheduler	Tom Stellard	11 years
si-scheduler-v2	R600/SI: Define a schedule model and enable the generic machine scheduler	Tom Stellard	11 years
si-scheduler-v3	R600/SI: Define a schedule model and enable the generic machine scheduler	Tom Stellard	10 years
si-sgpr-copies	R600/SI: Use VSrc_* register classes as the default classes for types	Tom Stellard	11 years
si-spill-fixes	R600/SI: Implement VGPR register spilling	Tom Stellard	11 years
si-spill-fixes-v2	R600/SI: XXX: Use correct operands for DS instructions	Tom Stellard	11 years
si-spill-fixes-v3	R600/SI: Implement VGPR register spilling v2	Tom Stellard	11 years
si-spill-fixes-v4	R600/SI: Implement VGPR register spilling v2	Tom Stellard	11 years
smrd-cluster	R600/SI: Enable post-ra machine scheduler	Tom Stellard	10 years
struct-divergence	XXX: remove debug prints.	Tom Stellard	9 years
struct-divergence-v1	XXX: Struct fixes	Tom Stellard	9 years
vgpr-spilling-Jan07-2014	XXX: Clear some kill flags.	Tom Stellard	10 years
vinterp-fix	R600/SI: Remove some unnecessary patterns from VINTRP multiclass	Tom Stellard	10 years
vliw5-rebase	R600: Support schedule and packetization of trans-only inst	Vincent Lejeune	11 years
vlj-bottom-up	group idother inst	Vincent Lejeune	12 years

Tag	Download	Author	Age
mesa-9.1.1	commit ce7bbb8b46...	Michel Danzer	12 years
mesa-9.1	commit 16ca877f58...	Michel Danzer	12 years