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| author | Tom Stellard <thomas.stellard@amd.com> | 2015-01-06 19:55:39 -0500 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2015-01-06 19:55:39 -0500 |
| commit | e50441ba754851dbc4282fe3dda3df1f30b992d7 (patch) | |
| tree | 11fc1ba10dab2236d62fa739ee33382f2e7e26dd | |
| parent | c05178bce356b78a789e2b7fbddee07918ed2664 (diff) | |
XXX: R600/SI VOP1 Assemblerassembler-Jan-06-2015
| -rw-r--r-- | lib/Target/R600/SIInstrFormats.td | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/lib/Target/R600/SIInstrFormats.td b/lib/Target/R600/SIInstrFormats.td index efce29784d6..5636c76c953 100644 --- a/lib/Target/R600/SIInstrFormats.td +++ b/lib/Target/R600/SIInstrFormats.td @@ -574,7 +574,9 @@ let Uses = [EXEC] in { class VOP1 <bits<8> op, dag outs, dag ins, string asm, list<dag> pattern> : VOP1Common <outs, ins, asm, pattern>, - VOP1e<op>; + VOP1e<op> { + let isCodeGenOnly = 0; +} class VOP2 <bits<6> op, dag outs, dag ins, string asm, list<dag> pattern> : VOP2Common <outs, ins, asm, pattern>, VOP2e<op> { |