diff options
| author | dfr <dfr> | 2000-05-30 14:47:37 +0000 |
|---|---|---|
| committer | dfr <dfr> | 2000-05-30 14:47:37 +0000 |
| commit | 04641fa350c3b70cf4da2be352261250038a326a (patch) | |
| tree | dbc103c3d2429b8c2b10ed8c7ba696f0651333b2 | |
| parent | 94aa1d05c6567488d80809be0ce0df64204345fe (diff) | |
Merged trunk into bsd-1-0-0-branchbsd-1-0-0-20000530-mergebsd-1-0-0-branch
177 files changed, 27642 insertions, 6449 deletions
diff --git a/xc/config/cf/FreeBSD.cf b/xc/config/cf/FreeBSD.cf index 44c247b91..c92902d37 100644 --- a/xc/config/cf/FreeBSD.cf +++ b/xc/config/cf/FreeBSD.cf @@ -82,7 +82,7 @@ XCOMM operating system: OSName (OSMajorVersion./**/OSMinorVersion./**/OSTeenyVe #if defined(UseInstalled) #define DefaultCCOptions /**/ #else -#define DefaultCCOptions -ansi -pedantic -Dasm=__asm GccWarningOptions +/*#define DefaultCCOptions -ansi -pedantic -Dasm=__asm GccWarningOptions*/ #endif #ifndef ExtraLibraries /* support for multi-byte locales is in libxpg4 rather than libc */ diff --git a/xc/config/cf/host.def b/xc/config/cf/host.def new file mode 100644 index 000000000..8b164f632 --- /dev/null +++ b/xc/config/cf/host.def @@ -0,0 +1,32 @@ + +#define DefaultGcc2i386Opt -O2 +#define LibraryCDebugFlags -O2 +#define BuildServersOnly YES +#define XF86CardDrivers vga tdfx i810 mga r128 +#define LinuxDistribution LinuxRedHat +#define GccWarningOptions -Wall -Wpointer-arith -Wstrict-prototypes \ + -Wmissing-prototypes -Wmissing-declarations \ + -Wnested-externs +#define DefaultCCOptions -ansi GccWarningOptions -pipe -g +#define NormalLibGlx NO + +#define BuildXF86DRI YES +#define HasGlide3 YES + +/* Optionally turn these on for debugging */ +/* #define GlxBuiltInTdfx YES */ +/* #define GlxBuiltInI810 YES */ +/* #define GlxBuiltInMga YES */ +/* #define GlxBuiltInR128 YES */ +/* #define DoLoadableServer NO */ + +/* Optionally turn this on to change the place where you install the build */ +/* #define ProjectRoot /usr/XF86-main */ + +/* Optionally turn this on to force the kernel modules to build */ +/* #define BuildXF86DRM YES */ + +#define SharedLibFont NO +#define XnestServer NO +#define XVirtualFramebufferServer NO +#define XprtServer NO diff --git a/xc/config/cf/xfree86.cf b/xc/config/cf/xfree86.cf index 77e5e454d..5f5991c77 100644 --- a/xc/config/cf/xfree86.cf +++ b/xc/config/cf/xfree86.cf @@ -512,12 +512,21 @@ IPLAN2P8_DEFS = -DUSE_IPLAN2P8 # ifndef GlxBuiltInTdfx # define GlxBuiltInTdfx NO # endif +# ifndef GlxBuiltInMga +# define GlxBuiltInMga NO +# endif +# ifndef GlxBuiltInI810 +# define GlxBuiltInI810 NO +# endif +# ifndef GlxBuiltInR128 +# define GlxBuiltInR128 NO +# endif -# if GlxBuiltInTdfx +# if GlxBuiltInTdfx || GlxBuiltInMga || GlxBuiltInI810 || GlxBuiltInR128 # define GlxDriverUsesMesa YES # endif -# if GlxBuiltInGamma || GlxBuiltInMesa || GlxBuiltInTdfx +# if GlxBuiltInGamma || GlxBuiltInTdfx || GlxBuiltInMga || GlxBuiltInI810 || GlxBuiltInR128 || GlxBuiltInMesa # define GlxUseBuiltInDRIDriver YES # define DRIDynLoadDefines /**/ # else diff --git a/xc/extras/Mesa/include/GL/xmesa.h b/xc/extras/Mesa/include/GL/xmesa.h index 5c6a5c904..3baec0eb0 100644 --- a/xc/extras/Mesa/include/GL/xmesa.h +++ b/xc/extras/Mesa/include/GL/xmesa.h @@ -78,9 +78,6 @@ extern "C" { #include <X11/Xlib.h> #include <X11/Xutil.h> #include "xmesa_x.h" -#ifdef GLX_DIRECT_RENDERING -#include "dri_mesa.h" -#endif #endif #include "GL/gl.h" @@ -116,18 +113,6 @@ typedef struct xmesa_visual *XMesaVisual; typedef struct xmesa_buffer *XMesaBuffer; -#if defined(GLX_DIRECT_RENDERING) && !defined(XFree86Server) -/* - * Initialize the XMesa driver. - */ -extern GLboolean XMesaInitDriver( __DRIscreenPrivate *driScrnPriv ); - -/* - * Reset the XMesa driver when the X server resets. - */ -extern void XMesaResetDriver( __DRIscreenPrivate *driScrnPriv ); -#endif - /* @@ -140,24 +125,35 @@ extern void XMesaResetDriver( __DRIscreenPrivate *driScrnPriv ); * db_flag - GL_TRUE = double-buffered, * GL_FALSE = single buffered * stereo_flag - stereo visual? - * depth_size - requested bits/depth values, or zero - * stencil_size - requested bits/stencil values, or zero - * accum_size - requested bits/component values, or zero * ximage_flag - GL_TRUE = use an XImage for back buffer, * GL_FALSE = use an off-screen pixmap for back buffer + * depth_size - requested bits/depth values, or zero + * stencil_size - requested bits/stencil values, or zero + * accum_red_size - requested bits/red accum values, or zero + * accum_green_size - requested bits/green accum values, or zero + * accum_blue_size - requested bits/blue accum values, or zero + * accum_alpha_size - requested bits/alpha accum values, or zero + * num_samples - number of samples/pixel if multisampling, or zero + * level - visual level, usually 0 + * visualCaveat - ala the GLX extension, usually GLX_NONE_EXT * Return; a new XMesaVisual or 0 if error. */ extern XMesaVisual XMesaCreateVisual( XMesaDisplay *display, - XMesaVisualInfo visinfo, - GLboolean rgb_flag, - GLboolean alpha_flag, - GLboolean db_flag, - GLboolean stereo_flag, - GLboolean ximage_flag, - GLint depth_size, - GLint stencil_size, - GLint accum_size, - GLint level ); + XMesaVisualInfo visinfo, + GLboolean rgb_flag, + GLboolean alpha_flag, + GLboolean db_flag, + GLboolean stereo_flag, + GLboolean ximage_flag, + GLint depth_size, + GLint stencil_size, + GLint accum_red_size, + GLint accum_green_size, + GLint accum_blue_size, + GLint accum_alpha_size, + GLint num_samples, + GLint level, + GLint visualCaveat ); /* * Destroy an XMesaVisual, but not the associated XVisualInfo. @@ -175,11 +171,7 @@ extern void XMesaDestroyVisual( XMesaVisual v ); * Return: an XMesaContext or NULL if error. */ extern XMesaContext XMesaCreateContext( XMesaVisual v, - XMesaContext share_list -#if defined(GLX_DIRECT_RENDERING) && !defined(XFree86Server) - , __DRIcontextPrivate *driContextPriv -#endif - ); + XMesaContext share_list ); /* @@ -191,12 +183,7 @@ extern void XMesaDestroyContext( XMesaContext c ); /* * Create an XMesaBuffer from an X window. */ -extern XMesaBuffer XMesaCreateWindowBuffer( XMesaVisual v, - XMesaWindow w -#if defined(GLX_DIRECT_RENDERING) && !defined(XFree86Server) - , __DRIdrawablePrivate *driDrawPriv -#endif - ); +extern XMesaBuffer XMesaCreateWindowBuffer( XMesaVisual v, XMesaWindow w ); /* @@ -204,11 +191,7 @@ extern XMesaBuffer XMesaCreateWindowBuffer( XMesaVisual v, */ extern XMesaBuffer XMesaCreatePixmapBuffer( XMesaVisual v, XMesaPixmap p, - XMesaColormap cmap -#if defined(GLX_DIRECT_RENDERING) && !defined(XFree86Server) - , __DRIdrawablePrivate *driDrawPriv -#endif - ); + XMesaColormap cmap ); /* diff --git a/xc/extras/Mesa/src/FX/fxdd.c b/xc/extras/Mesa/src/FX/fxdd.c index b44ec4dbe..a979cad04 100644 --- a/xc/extras/Mesa/src/FX/fxdd.c +++ b/xc/extras/Mesa/src/FX/fxdd.c @@ -180,13 +180,16 @@ static GLbitfield fxDDClear(GLcontext *ctx, GLbitfield mask, GLboolean all, const FxU16 clearD = (FxU16) (ctx->Depth.Clear * 0xffff); GLbitfield softwareMask = mask & (DD_STENCIL_BIT | DD_ACCUM_BIT); + /* we can't clear stencil or accum buffers */ + mask &= ~(DD_STENCIL_BIT | DD_ACCUM_BIT); + if (MESA_VERBOSE & VERBOSE_DRIVER) { fprintf(stderr,"fxmesa: fxDDClear(%d,%d,%d,%d)\n", (int) x, (int) y, (int) width, (int) height); } if (colorMask != 0xffffffff) { - /* do color buffer clears in software */ + /* do masked color buffer clears in software */ softwareMask |= (mask & (DD_FRONT_LEFT_BIT | DD_BACK_LEFT_BIT)); mask &= ~(DD_FRONT_LEFT_BIT | DD_BACK_LEFT_BIT); } @@ -211,6 +214,7 @@ static GLbitfield fxDDClear(GLcontext *ctx, GLbitfield mask, GLboolean all, * This is a work-around/ */ /* clear depth */ + FX_grDepthMask(FXTRUE); FX_grRenderBuffer(GR_BUFFER_BACKBUFFER); FX_grColorMask(FXFALSE,FXFALSE); FX_grBufferClear(fxMesa->clearC, fxMesa->clearA, clearD); @@ -224,8 +228,8 @@ static GLbitfield fxDDClear(GLcontext *ctx, GLbitfield mask, GLboolean all, FX_grDepthMask(FXFALSE); FX_grRenderBuffer(GR_BUFFER_BACKBUFFER); FX_grBufferClear(fxMesa->clearC, fxMesa->clearA, clearD); - if (!ctx->Depth.Mask) { - FX_grDepthMask(FXFALSE); + if (ctx->Depth.Mask) { + FX_grDepthMask(FXTRUE); } break; case DD_FRONT_LEFT_BIT: @@ -233,8 +237,8 @@ static GLbitfield fxDDClear(GLcontext *ctx, GLbitfield mask, GLboolean all, FX_grDepthMask(FXFALSE); FX_grRenderBuffer(GR_BUFFER_FRONTBUFFER); FX_grBufferClear(fxMesa->clearC, fxMesa->clearA, clearD); - if (!ctx->Depth.Mask) { - FX_grDepthMask(FXFALSE); + if (ctx->Depth.Mask) { + FX_grDepthMask(FXTRUE); } break; case DD_FRONT_LEFT_BIT | DD_BACK_LEFT_BIT: @@ -244,8 +248,8 @@ static GLbitfield fxDDClear(GLcontext *ctx, GLbitfield mask, GLboolean all, FX_grBufferClear(fxMesa->clearC, fxMesa->clearA, clearD); FX_grRenderBuffer(GR_BUFFER_FRONTBUFFER); FX_grBufferClear(fxMesa->clearC, fxMesa->clearA, clearD); - if (!ctx->Depth.Mask) { - FX_grDepthMask(FXFALSE); + if (ctx->Depth.Mask) { + FX_grDepthMask(FXTRUE); } break; case DD_FRONT_LEFT_BIT | DD_BACK_LEFT_BIT | DD_DEPTH_BIT: @@ -263,10 +267,13 @@ static GLbitfield fxDDClear(GLcontext *ctx, GLbitfield mask, GLboolean all, break; case DD_DEPTH_BIT: /* just the depth buffer */ + FX_grRenderBuffer(GR_BUFFER_BACKBUFFER); FX_grColorMask(FXFALSE,FXFALSE); - FX_grBufferClear(fxMesa->clearC, fxMesa->clearA, - (FxU16)(ctx->Depth.Clear*0xffff)); + FX_grDepthMask(FXTRUE); + FX_grBufferClear(fxMesa->clearC, fxMesa->clearA, clearD); FX_grColorMask(FXTRUE, ctx->Color.ColorMask[ACOMP] && fxMesa->haveAlphaBuffer); + if (ctx->Color.DrawDestMask & FRONT_LEFT_BIT) + FX_grRenderBuffer(GR_BUFFER_FRONTBUFFER); break; default: /* error */ @@ -279,7 +286,7 @@ static GLbitfield fxDDClear(GLcontext *ctx, GLbitfield mask, GLboolean all, /* Set the buffer used for drawing */ /* XXX support for separate read/draw buffers hasn't been tested */ -static GLboolean fxDDSetDrawBuffer(GLcontext *ctx, GLenum mode ) +static GLboolean fxDDSetDrawBuffer(GLcontext *ctx, GLenum mode) { fxMesaContext fxMesa=(fxMesaContext)ctx->DriverCtx; @@ -297,6 +304,10 @@ static GLboolean fxDDSetDrawBuffer(GLcontext *ctx, GLenum mode ) FX_grRenderBuffer(fxMesa->currentFB); return GL_TRUE; } + else if (mode == GL_NONE) { + FX_grColorMask(FXFALSE,FXFALSE); + return GL_TRUE; + } else { return GL_FALSE; } @@ -342,7 +353,7 @@ static GLboolean inClipRects(fxMesaContext fxMesa, int px, int py) #endif -static GLboolean fxDDDrawBitMap(GLcontext *ctx, GLint px, GLint py, +static GLboolean fxDDDrawBitmap(GLcontext *ctx, GLint px, GLint py, GLsizei width, GLsizei height, const struct gl_pixelstore_attrib *unpack, const GLubyte *bitmap) @@ -463,7 +474,7 @@ static GLboolean fxDDDrawBitMap(GLcontext *ctx, GLint px, GLint py, + (winX + px); for (row = 0; row < height; row++) { - const GLubyte *src = (const GLubyte *) gl_pixel_addr_in_image( finalUnpack, + const GLubyte *src = (const GLubyte *) _mesa_image_address( finalUnpack, bitmap, width, height, GL_COLOR_INDEX, GL_BITMAP, 0, row, 0 ); if (finalUnpack->LsbFirst) { /* least significan bit first */ @@ -515,6 +526,127 @@ static GLboolean fxDDDrawBitMap(GLcontext *ctx, GLint px, GLint py, return GL_TRUE; } + +static GLboolean fxDDReadPixels( GLcontext *ctx, GLint x, GLint y, + GLsizei width, GLsizei height, + GLenum format, GLenum type, + const struct gl_pixelstore_attrib *packing, + GLvoid *dstImage ) +{ + if (ctx->Pixel.ScaleOrBiasRGBA || ctx->Pixel.MapColorFlag) { + return GL_FALSE; /* can't do this */ + } + else { + fxMesaContext fxMesa=(fxMesaContext)ctx->DriverCtx; + GrLfbInfo_t info; + GLboolean result = GL_FALSE; + + BEGIN_BOARD_LOCK(); + if (grLfbLock(GR_LFB_READ_ONLY, + fxMesa->currentFB, + GR_LFBWRITEMODE_ANY, + GR_ORIGIN_UPPER_LEFT, + FXFALSE, + &info)) { + const GLint winX = fxMesa->x_offset; + const GLint winY = fxMesa->y_offset + fxMesa->height - 1; +#ifdef XF86DRI + const GLint srcStride = (fxMesa->glCtx->Color.DrawBuffer == GL_FRONT) + ? (fxMesa->screen_width) : (info.strideInBytes / 2); +#else + const GLint srcStride = info.strideInBytes / 2; /* stride in GLushorts */ +#endif + const GLushort *src = (const GLushort *) info.lfbPtr + + (winY - y) * srcStride + (winX + x); + GLubyte *dst = (GLubyte *) _mesa_image_address(packing, dstImage, + width, height, format, type, 0, 0, 0); + GLint dstStride = _mesa_image_row_stride(packing, width, format, type); + + if (format == GL_RGB && type == GL_UNSIGNED_BYTE) { + /* convert 5R6G5B into 8R8G8B */ + GLint row, col; + const GLint halfWidth = width >> 1; + const GLint extraPixel = (width & 1); + for (row = 0; row < height; row++) { + GLubyte *d = dst; + for (col = 0; col < halfWidth; col++) { + const GLuint pixel = ((const GLuint *) src)[col]; + const GLint pixel0 = pixel & 0xffff; + const GLint pixel1 = pixel >> 16; + *d++ = FX_PixelToR[pixel0]; + *d++ = FX_PixelToG[pixel0]; + *d++ = FX_PixelToB[pixel0]; + *d++ = FX_PixelToR[pixel1]; + *d++ = FX_PixelToG[pixel1]; + *d++ = FX_PixelToB[pixel1]; + } + if (extraPixel) { + GLushort pixel = src[width-1]; + *d++ = FX_PixelToR[pixel]; + *d++ = FX_PixelToG[pixel]; + *d++ = FX_PixelToB[pixel]; + } + dst += dstStride; + src -= srcStride; + } + result = GL_TRUE; + } + else if (format == GL_RGBA && type == GL_UNSIGNED_BYTE) { + /* convert 5R6G5B into 8R8G8B8A */ + GLint row, col; + const GLint halfWidth = width >> 1; + const GLint extraPixel = (width & 1); + for (row = 0; row < height; row++) { + GLubyte *d = dst; + for (col = 0; col < halfWidth; col++) { + const GLuint pixel = ((const GLuint *) src)[col]; + const GLint pixel0 = pixel & 0xffff; + const GLint pixel1 = pixel >> 16; + *d++ = FX_PixelToR[pixel0]; + *d++ = FX_PixelToG[pixel0]; + *d++ = FX_PixelToB[pixel0]; + *d++ = 255; + *d++ = FX_PixelToR[pixel1]; + *d++ = FX_PixelToG[pixel1]; + *d++ = FX_PixelToB[pixel1]; + *d++ = 255; + } + if (extraPixel) { + const GLushort pixel = src[width-1]; + *d++ = FX_PixelToR[pixel]; + *d++ = FX_PixelToG[pixel]; + *d++ = FX_PixelToB[pixel]; + *d++ = 255; + } + dst += dstStride; + src -= srcStride; + } + result = GL_TRUE; + } + else if (format == GL_RGB && type == GL_UNSIGNED_SHORT_5_6_5) { + /* directly memcpy 5R6G5B pixels into client's buffer */ + const GLint widthInBytes = width * 2; + GLint row; + for (row = 0; row < height; row++) { + MEMCPY(dst, src, widthInBytes); + dst += dstStride; + src -= srcStride; + } + result = GL_TRUE; + } + else { + result = GL_FALSE; + } + + grLfbUnlock(GR_LFB_READ_ONLY, fxMesa->currentFB); + } + END_BOARD_LOCK(); + return result; + } +} + + + static void fxDDFinish(GLcontext *ctx) { FX_grFlush(); @@ -568,7 +700,7 @@ static const GLubyte *fxDDGetString(GLcontext *ctx, GLenum name) } } /* now make the GL_RENDERER string */ - sprintf(buffer, "Mesa DRI %s 20000224", hardware); + sprintf(buffer, "Mesa DRI %s 20000420", hardware); return buffer; } case GL_VENDOR: @@ -771,7 +903,6 @@ void fxDDInitExtensions( GLcontext *ctx ) gl_extensions_disable(ctx, "GL_EXT_paletted_texture"); gl_extensions_add(ctx, DEFAULT_ON, "3DFX_set_global_palette", 0); - gl_extensions_add(ctx, DEFAULT_ON, "GL_FXMESA_global_texture_lod_bias", 0); if (!fxMesa->haveTwoTMUs) gl_extensions_disable(ctx, "GL_EXT_texture_env_add"); @@ -816,7 +947,7 @@ static GLboolean fxIsInHardware(GLcontext *ctx) if (!ctx->Hint.AllowDrawMem) return GL_TRUE; /* you'll take it and like it */ - if((ctx->RasterMask & STENCIL_BIT) || + if((ctx->RasterMask & (STENCIL_BIT | MULTI_DRAW_BIT)) || ((ctx->Color.BlendEnabled) && (ctx->Color.BlendEquation!=GL_FUNC_ADD_EXT)) || ((ctx->Color.ColorLogicOpEnabled) && (ctx->Color.LogicOp!=GL_COPY)) || (ctx->Light.Model.ColorControl==GL_SEPARATE_SPECULAR_COLOR) || @@ -838,17 +969,26 @@ static GLboolean fxIsInHardware(GLcontext *ctx) return GL_FALSE; } - if((ctx->Texture.ReallyEnabled & TEXTURE0_2D) && - (ctx->Texture.Unit[0].EnvMode==GL_BLEND)) { - return GL_FALSE; + if (ctx->Texture.ReallyEnabled & TEXTURE0_2D) { + if (ctx->Texture.Unit[0].EnvMode == GL_BLEND && + (ctx->Texture.ReallyEnabled & TEXTURE1_2D || + ctx->Texture.Unit[0].EnvColor[0] != 0 || + ctx->Texture.Unit[0].EnvColor[1] != 0 || + ctx->Texture.Unit[0].EnvColor[2] != 0 || + ctx->Texture.Unit[0].EnvColor[3] != 1)) { + return GL_FALSE; + } + if (ctx->Texture.Unit[0].Current->Image[0]->Border > 0) + return GL_FALSE; } - if((ctx->Texture.ReallyEnabled & TEXTURE1_2D) && - (ctx->Texture.Unit[1].EnvMode==GL_BLEND)) { - return GL_FALSE; + if (ctx->Texture.ReallyEnabled & TEXTURE1_2D) { + if (ctx->Texture.Unit[1].EnvMode == GL_BLEND) + return GL_FALSE; + if (ctx->Texture.Unit[0].Current->Image[0]->Border > 0) + return GL_FALSE; } - if (MESA_VERBOSE & (VERBOSE_DRIVER|VERBOSE_TEXTURE)) fprintf(stderr, "fxMesa: fxIsInHardware, envmode is %s/%s\n", gl_lookup_enum_by_nr(ctx->Texture.Unit[0].EnvMode), @@ -975,8 +1115,9 @@ void fxSetupDDPointers(GLcontext *ctx) ctx->Driver.SetReadBuffer=fxDDSetReadBuffer; ctx->Driver.GetBufferSize=fxDDBufferSize; - ctx->Driver.Bitmap=fxDDDrawBitMap; + ctx->Driver.Bitmap=fxDDDrawBitmap; ctx->Driver.DrawPixels=NULL; + ctx->Driver.ReadPixels=fxDDReadPixels; ctx->Driver.Finish=fxDDFinish; ctx->Driver.Flush=NULL; @@ -984,14 +1125,14 @@ void fxSetupDDPointers(GLcontext *ctx) ctx->Driver.RenderStart=NULL; ctx->Driver.RenderFinish=NULL; + ctx->Driver.TexImage2D = fxDDTexImage2D; + ctx->Driver.TexSubImage2D = fxDDTexSubImage2D; + ctx->Driver.GetTexImage = fxDDGetTexImage; ctx->Driver.TexEnv=fxDDTexEnv; - ctx->Driver.TexImage=fxDDTexImg; - ctx->Driver.TexSubImage=fxDDTexSubImg; ctx->Driver.TexParameter=fxDDTexParam; ctx->Driver.BindTexture=fxDDTexBind; ctx->Driver.DeleteTexture=fxDDTexDel; ctx->Driver.UpdateTexturePalette=fxDDTexPalette; - ctx->Driver.UseGlobalTexturePalette=fxDDTexUseGlbPalette; ctx->Driver.RectFunc=NULL; diff --git a/xc/extras/Mesa/src/FX/fxddspan.c b/xc/extras/Mesa/src/FX/fxddspan.c index ec5513480..c620cc3c6 100644 --- a/xc/extras/Mesa/src/FX/fxddspan.c +++ b/xc/extras/Mesa/src/FX/fxddspan.c @@ -99,7 +99,7 @@ static FxBool writeRegionClipped(fxMesaContext fxMesa, GrBuffer_t dst_buffer, if (dst_y>=fxMesa->pClipRects[i].y1 && dst_y<fxMesa->pClipRects[i].y2) { if (dst_x<fxMesa->pClipRects[i].x1) { x=fxMesa->pClipRects[i].x1; - data=((char*)src_data)+srcElt*(dst_x-x); + data=((char*)src_data)+srcElt*(x - dst_x); w=src_width-(x-dst_x); } else { x=dst_x; @@ -324,6 +324,7 @@ static void fxDDWriteMonoRGBASpan(const GLcontext *ctx, } +#if 0 static void fxDDReadRGBASpan(const GLcontext *ctx, GLuint n, GLint x, GLint y, GLubyte rgba[][4]) { @@ -332,6 +333,7 @@ static void fxDDReadRGBASpan(const GLcontext *ctx, GLuint i; GLint bottom=fxMesa->height+fxMesa->y_offset-1; + printf("read span %d, %d, %d\n", x,y,n); if (MESA_VERBOSE&VERBOSE_DRIVER) { fprintf(stderr,"fxmesa: fxDDReadRGBASpan(...)\n"); } @@ -349,6 +351,66 @@ static void fxDDReadRGBASpan(const GLcontext *ctx, rgba[i][ACOMP] = 255; } } +#endif + + +/* + * Read a span of 16-bit RGB pixels. Note, we don't worry about cliprects + * since OpenGL says obscured pixels have undefined values. + */ +static void read_R5G6B5_span(const GLcontext *ctx, + GLuint n, GLint x, GLint y, GLubyte rgba[][4]) +{ + fxMesaContext fxMesa=(fxMesaContext)ctx->DriverCtx; + GrLfbInfo_t info; + BEGIN_BOARD_LOCK(); + if (grLfbLock(GR_LFB_READ_ONLY, + fxMesa->currentFB, + GR_LFBWRITEMODE_ANY, + GR_ORIGIN_UPPER_LEFT, + FXFALSE, + &info)) { + const GLint winX = fxMesa->x_offset; + const GLint winY = fxMesa->y_offset + fxMesa->height - 1; +#ifdef XF86DRI + const GLint srcStride = (fxMesa->glCtx->Color.DrawBuffer == GL_FRONT) + ? (fxMesa->screen_width) : (info.strideInBytes / 2); +#else + const GLint srcStride = info.strideInBytes / 2; /* stride in GLushorts */ +#endif + const GLushort *data16 = (const GLushort *) info.lfbPtr + + (winY - y) * srcStride + + (winX + x); + const GLuint *data32 = (const GLuint *) data16; + GLuint i, j; + GLuint extraPixel = (n & 1); + n -= extraPixel; + for (i = j = 0; i < n; i += 2, j++) { + GLuint pixel = data32[j]; + GLuint pixel0 = pixel & 0xffff; + GLuint pixel1 = pixel >> 16; + rgba[i][RCOMP] = FX_PixelToR[pixel0]; + rgba[i][GCOMP] = FX_PixelToG[pixel0]; + rgba[i][BCOMP] = FX_PixelToB[pixel0]; + rgba[i][ACOMP] = 255; + rgba[i+1][RCOMP] = FX_PixelToR[pixel1]; + rgba[i+1][GCOMP] = FX_PixelToG[pixel1]; + rgba[i+1][BCOMP] = FX_PixelToB[pixel1]; + rgba[i+1][ACOMP] = 255; + } + if (extraPixel) { + GLushort pixel = data16[n]; + rgba[n][RCOMP] = FX_PixelToR[pixel]; + rgba[n][GCOMP] = FX_PixelToG[pixel]; + rgba[n][BCOMP] = FX_PixelToB[pixel]; + rgba[n][ACOMP] = 255; + } + + grLfbUnlock(GR_LFB_READ_ONLY, fxMesa->currentFB); + } + END_BOARD_LOCK(); +} + /************************************************************************/ /***** Pixel functions *****/ @@ -390,31 +452,48 @@ static void fxDDWriteMonoRGBAPixels(const GLcontext *ctx, GR_LFB_SRC_FMT_8888,1,1,0,(void *) &fxMesa->color); } -static void fxDDReadRGBAPixels(const GLcontext *ctx, + +static void read_R5G6B5_pixels(const GLcontext *ctx, GLuint n, const GLint x[], const GLint y[], GLubyte rgba[][4], const GLubyte mask[]) { - fxMesaContext fxMesa=(fxMesaContext)ctx->DriverCtx; - GLuint i; - GLint bottom=fxMesa->y_delta-1; - - if (MESA_VERBOSE&VERBOSE_DRIVER) { - fprintf(stderr,"fxmesa: fxDDReadRGBAPixels(...)\n"); - } - - for(i=0;i<n;i++) { - if(mask[i]) { - GLushort pixel; - FX_grLfbReadRegion(fxMesa->currentFB,x[i],bottom-y[i],1,1,0,&pixel); - rgba[i][RCOMP] = FX_PixelToR[pixel]; - rgba[i][GCOMP] = FX_PixelToG[pixel]; - rgba[i][BCOMP] = FX_PixelToB[pixel]; - rgba[i][ACOMP] = 255; + fxMesaContext fxMesa = (fxMesaContext) ctx->DriverCtx; + GrLfbInfo_t info; + BEGIN_BOARD_LOCK(); + if (grLfbLock(GR_LFB_READ_ONLY, + fxMesa->currentFB, + GR_LFBWRITEMODE_ANY, + GR_ORIGIN_UPPER_LEFT, + FXFALSE, + &info)) { +#ifdef XF86DRI + const GLint srcStride = (fxMesa->glCtx->Color.DrawBuffer == GL_FRONT) + ? (fxMesa->screen_width) : (info.strideInBytes / 2); +#else + const GLint srcStride = info.strideInBytes / 2; /* stride in GLushorts */ +#endif + const GLint winX = fxMesa->x_offset; + const GLint winY = fxMesa->y_offset + fxMesa->height - 1; + GLuint i; + for(i=0;i<n;i++) { + if(mask[i]) { + const GLushort *data16 = (const GLushort *) info.lfbPtr + + (winY - y[i]) * srcStride + + (winX + x[i]); + const GLushort pixel = *data16; + rgba[i][RCOMP] = FX_PixelToR[pixel]; + rgba[i][GCOMP] = FX_PixelToG[pixel]; + rgba[i][BCOMP] = FX_PixelToB[pixel]; + rgba[i][ACOMP] = 255; + } } + grLfbUnlock(GR_LFB_READ_ONLY, fxMesa->currentFB); } + END_BOARD_LOCK(); } + /************************************************************************/ /***** Depth functions *****/ /************************************************************************/ @@ -423,11 +502,11 @@ void fxDDWriteDepthSpan(GLcontext *ctx, GLuint n, GLint x, GLint y, const GLdepth depth[], const GLubyte mask[]) { - fxMesaContext fxMesa=(fxMesaContext)ctx->DriverCtx; - GLint bottom=fxMesa->height+fxMesa->y_offset-1; + fxMesaContext fxMesa = (fxMesaContext)ctx->DriverCtx; + GLint bottom = fxMesa->height + fxMesa->y_offset - 1; - if (MESA_VERBOSE&VERBOSE_DRIVER) { - fprintf(stderr,"fxmesa: fxDDReadDepthSpanInt(...)\n"); + if (MESA_VERBOSE & VERBOSE_DRIVER) { + fprintf(stderr, "fxmesa: fxDDWriteDepthSpan(...)\n"); } x += fxMesa->x_offset; @@ -436,14 +515,20 @@ void fxDDWriteDepthSpan(GLcontext *ctx, GLint i; for (i = 0; i < n; i++) { if (mask[i]) { - writeRegionClipped(fxMesa, GR_BUFFER_AUXBUFFER, x + i, bottom-y, - GR_LFB_SRC_FMT_ZA16, 1, 1, 0, (void *) &depth[i]); + GLshort d = depth[i]; + writeRegionClipped(fxMesa, GR_BUFFER_AUXBUFFER, x + i, bottom - y, + GR_LFB_SRC_FMT_ZA16, 1, 1, 0, (void *) &d); } } } else { - writeRegionClipped(fxMesa, GR_BUFFER_AUXBUFFER, x, bottom-y, - GR_LFB_SRC_FMT_ZA16, n, 1, 0, (void *) depth); + GLushort depth16[MAX_WIDTH]; + GLint i; + for (i = 0; i < n; i++) { + depth16[i] = depth[i]; + } + writeRegionClipped(fxMesa, GR_BUFFER_AUXBUFFER, x, bottom - y, + GR_LFB_SRC_FMT_ZA16, n, 1, 0, (void *) depth16); } } @@ -451,15 +536,20 @@ void fxDDWriteDepthSpan(GLcontext *ctx, void fxDDReadDepthSpan(GLcontext *ctx, GLuint n, GLint x, GLint y, GLdepth depth[]) { - fxMesaContext fxMesa=(fxMesaContext)ctx->DriverCtx; - GLint bottom=fxMesa->height+fxMesa->y_offset-1; + fxMesaContext fxMesa = (fxMesaContext)ctx->DriverCtx; + GLint bottom = fxMesa->height + fxMesa->y_offset - 1; + GLushort depth16[MAX_WIDTH]; + GLuint i; - if (MESA_VERBOSE&VERBOSE_DRIVER) { - fprintf(stderr,"fxmesa: fxDDReadDepthSpanInt(...)\n"); + if (MESA_VERBOSE & VERBOSE_DRIVER) { + fprintf(stderr, "fxmesa: fxDDReadDepthSpan(...)\n"); } - x+=fxMesa->x_offset; - FX_grLfbReadRegion(GR_BUFFER_AUXBUFFER,x,bottom-y,n,1,0,depth); + x += fxMesa->x_offset; + FX_grLfbReadRegion(GR_BUFFER_AUXBUFFER, x, bottom - y, n, 1, 0, depth16); + for (i = 0; i < n; i++) { + depth[i] = depth16[i]; + } } @@ -468,20 +558,21 @@ void fxDDWriteDepthPixels(GLcontext *ctx, GLuint n, const GLint x[], const GLint y[], const GLdepth depth[], const GLubyte mask[]) { - fxMesaContext fxMesa=(fxMesaContext)ctx->DriverCtx; - GLint bottom=fxMesa->height+fxMesa->y_offset-1; + fxMesaContext fxMesa = (fxMesaContext)ctx->DriverCtx; + GLint bottom = fxMesa->height + fxMesa->y_offset - 1; GLuint i; - if (MESA_VERBOSE&VERBOSE_DRIVER) { - fprintf(stderr,"fxmesa: fxDDReadDepthSpanInt(...)\n"); + if (MESA_VERBOSE & VERBOSE_DRIVER) { + fprintf(stderr, "fxmesa: fxDDWriteDepthPixels(...)\n"); } for (i = 0; i < n; i++) { if (mask[i]) { int xpos = x[i] + fxMesa->x_offset; int ypos = bottom - y[i]; + GLushort d = depth[i]; writeRegionClipped(fxMesa, GR_BUFFER_AUXBUFFER, xpos, ypos, - GR_LFB_SRC_FMT_ZA16, 1, 1, 0, (void *) &depth[i]); + GR_LFB_SRC_FMT_ZA16, 1, 1, 0, (void *) &d); } } } @@ -490,19 +581,20 @@ void fxDDWriteDepthPixels(GLcontext *ctx, void fxDDReadDepthPixels(GLcontext *ctx, GLuint n, const GLint x[], const GLint y[], GLdepth depth[]) { - fxMesaContext fxMesa=(fxMesaContext)ctx->DriverCtx; - GLint bottom=fxMesa->height+fxMesa->y_offset-1; + fxMesaContext fxMesa = (fxMesaContext)ctx->DriverCtx; + GLint bottom = fxMesa->height + fxMesa->y_offset - 1; GLuint i; - if (MESA_VERBOSE&VERBOSE_DRIVER) { - fprintf(stderr,"fxmesa: fxDDReadDepthSpanInt(...)\n"); + if (MESA_VERBOSE & VERBOSE_DRIVER) { + fprintf(stderr, "fxmesa: fxDDReadDepthPixels(...)\n"); } - for (i = 0; i < n; i++) { int xpos = x[i] + fxMesa->x_offset; int ypos = bottom - y[i]; - FX_grLfbReadRegion(GR_BUFFER_AUXBUFFER,xpos,ypos,1,1,0,&depth[i]); + GLushort d; + FX_grLfbReadRegion(GR_BUFFER_AUXBUFFER, xpos, ypos, 1, 1, 0, &d); + depth[i] = d; } } @@ -526,8 +618,9 @@ void fxSetupDDSpanPointers(GLcontext *ctx) ctx->Driver.WriteCI32Pixels =NULL; ctx->Driver.WriteMonoCIPixels =NULL; - ctx->Driver.ReadRGBASpan =fxDDReadRGBASpan; - ctx->Driver.ReadRGBAPixels =fxDDReadRGBAPixels; + /* ctx->Driver.ReadRGBASpan =fxDDReadRGBASpan;*/ + ctx->Driver.ReadRGBASpan = read_R5G6B5_span; + ctx->Driver.ReadRGBAPixels = read_R5G6B5_pixels; ctx->Driver.ReadCI32Span =NULL; ctx->Driver.ReadCI32Pixels =NULL; diff --git a/xc/extras/Mesa/src/FX/fxdrv.h b/xc/extras/Mesa/src/FX/fxdrv.h index e12a3244f..79976042a 100644 --- a/xc/extras/Mesa/src/FX/fxdrv.h +++ b/xc/extras/Mesa/src/FX/fxdrv.h @@ -87,8 +87,8 @@ typedef struct tfxMesaContext *fxMesaContext; -#if defined(MESA_DEBUG) && 0 extern void fx_sanity_triangle( GrVertex *, GrVertex *, GrVertex * ); +#if defined(MESA_DEBUG) && 0 #define grDrawTriangle fx_sanity_triangle #endif @@ -187,9 +187,9 @@ typedef struct { } #if FX_USE_PARGB -#define GOURAUD2(v, c) { \ - GLubyte *col = c; \ - v->argb=MESACOLOR2PARGB(col); \ +#define GOURAUD2(v, c) { \ + GLubyte *col = c; \ + v->argb=MESACOLOR2PARGB(col); \ } #else #define GOURAUD2(v, c) { \ @@ -230,13 +230,13 @@ typedef struct { #define FX_UM_E0_MODULATE 0x00000002 #define FX_UM_E0_DECAL 0x00000004 #define FX_UM_E0_BLEND 0x00000008 -#define FX_UM_E0_ADD 0x00000010 +#define FX_UM_E0_ADD 0x00000010 #define FX_UM_E1_REPLACE 0x00000020 #define FX_UM_E1_MODULATE 0x00000040 #define FX_UM_E1_DECAL 0x00000080 #define FX_UM_E1_BLEND 0x00000100 -#define FX_UM_E1_ADD 0x00000200 +#define FX_UM_E1_ADD 0x00000200 #define FX_UM_E_ENVMODE 0x000003ff @@ -272,11 +272,9 @@ typedef struct MemRange_t { } MemRange; typedef struct { - GLsizei width, height; - GLint glideFormat; - - unsigned short *data; - GLboolean translated, used; + GLsizei width, height; /* image size */ + GrTextureFormat_t glideFormat; /* Glide image format */ + unsigned short *data; /* Glide-formated texture image */ } tfxMipMapLevel; typedef struct tfxTexInfo_t { @@ -430,8 +428,10 @@ struct tfxMesaContext { GuTexPalette glbPalette; GLcontext *glCtx; /* the core Mesa context */ +#if !defined(XFree86Server) && !defined(GLX_DIRECT_RENDERING) GLvisual *glVis; /* describes the color buffer */ GLframebuffer *glBuffer; /* the ancillary buffers */ +#endif GLint board; /* the board used for this context */ GLint width, height; /* size of color buffer */ @@ -534,6 +534,7 @@ typedef void (*tfxSetupFunc)(struct vertex_buffer *, GLuint, GLuint); extern GrHwConfiguration glbHWConfig; extern int glbCurrentBoard; +extern void fxPrintSetupFlags( const char *msg, GLuint flags ); extern void fxSetupFXUnits(GLcontext *); extern void fxSetupDDPointers(GLcontext *); extern void fxDDSetNearFar(GLcontext *, GLfloat, GLfloat); @@ -567,17 +568,29 @@ extern void fxUpdateDDSpanPointers(GLcontext *); extern void fxSetupDDSpanPointers(GLcontext *); extern void fxPrintTextureData(tfxTexInfo *ti); -extern void fxDDTexEnv(GLcontext *, GLenum, const GLfloat *); -extern void fxDDTexImg(GLcontext *, GLenum, struct gl_texture_object *, - GLint, GLint, const struct gl_texture_image *); +extern GLboolean fxDDTexImage2D(GLcontext *ctx, GLenum target, GLint level, + GLenum format, GLenum type, const GLvoid *pixels, + const struct gl_pixelstore_attrib *packing, + struct gl_texture_object *texObj, + struct gl_texture_image *texImage, + GLboolean *retainInternalCopy); +extern GLboolean fxDDTexSubImage2D(GLcontext *ctx, GLenum target, GLint level, + GLint xoffset, GLint yoffset, + GLsizei width, GLsizei height, + GLenum format, GLenum type, const GLvoid *pixels, + const struct gl_pixelstore_attrib *packing, + struct gl_texture_object *texObj, + struct gl_texture_image *texImage); +extern GLvoid *fxDDGetTexImage(GLcontext *ctx, GLenum target, GLint level, + const struct gl_texture_object *texObj, + GLenum *formatOut, GLenum *typeOut, + GLboolean *freeImageOut ); +extern void fxDDTexEnv(GLcontext *, GLenum, GLenum, const GLfloat *); extern void fxDDTexParam(GLcontext *, GLenum, struct gl_texture_object *, GLenum, const GLfloat *); extern void fxDDTexBind(GLcontext *, GLenum, struct gl_texture_object *); extern void fxDDTexDel(GLcontext *, struct gl_texture_object *); extern void fxDDTexPalette(GLcontext *, struct gl_texture_object *); -extern void fxDDTexuseGlbPalette(GLcontext *, GLboolean); -extern void fxDDTexSubImg(GLcontext *, GLenum, struct gl_texture_object *, GLint, - GLint, GLint, GLint, GLint, GLint, const struct gl_texture_image *); extern void fxDDTexUseGlbPalette(GLcontext *, GLboolean); extern void fxDDEnable(GLcontext *, GLenum, GLboolean); @@ -619,6 +632,7 @@ extern void fxDDInitExtensions( GLcontext *ctx ); #define fxTMGetTexInfo(o) ((tfxTexInfo*)((o)->DriverData)) extern void fxTMInit(fxMesaContext ctx); extern void fxTMClose(fxMesaContext ctx); +extern void fxTMRestoreTextures_NoLock(fxMesaContext ctx); extern void fxTMMoveInTM(fxMesaContext, struct gl_texture_object *, GLint); extern void fxTMMoveOutTM(fxMesaContext, struct gl_texture_object *); #define fxTMMoveOutTM_NoLock fxTMMoveOutTM diff --git a/xc/extras/Mesa/src/FX/fxsetup.c b/xc/extras/Mesa/src/FX/fxsetup.c index 8707aed1d..5e82443d7 100644 --- a/xc/extras/Mesa/src/FX/fxsetup.c +++ b/xc/extras/Mesa/src/FX/fxsetup.c @@ -69,7 +69,7 @@ static void fxSetupDepthTest(GLcontext *ctx); static void fxSetupScissor(GLcontext *ctx); static void fxSetupCull(GLcontext *ctx); static void gl_print_fx_state_flags( const char *msg, GLuint flags); -static GLboolean fxMultipassBlend(struct vertex_buffer *, GLuint); +/*static GLboolean fxMultipassBlend(struct vertex_buffer *, GLuint);*/ static GLboolean fxMultipassTexture( struct vertex_buffer *, GLuint ); static void fxTexValidate(GLcontext *ctx, struct gl_texture_object *tObj) @@ -183,7 +183,7 @@ static GLuint fxGetTexSetConfiguration(GLcontext *ctx, GLuint envmode=0; GLuint ifmt=0; - if((ctx->Light.ShadeModel==GL_SMOOTH) || + if((ctx->Light.ShadeModel==GL_SMOOTH) || 1 || (ctx->Point.SmoothFlag) || (ctx->Line.SmoothFlag) || (ctx->Polygon.SmoothFlag)) @@ -191,11 +191,13 @@ static GLuint fxGetTexSetConfiguration(GLcontext *ctx, else unitsmode|=FX_UM_ALPHA_CONSTANT; - if(ctx->Light.ShadeModel==GL_SMOOTH) + if(ctx->Light.ShadeModel==GL_SMOOTH || 1) unitsmode|=FX_UM_COLOR_ITERATED; else unitsmode|=FX_UM_COLOR_CONSTANT; + + /* OpenGL Feeds Texture 0 into Texture 1 Glide Feeds Texture 1 into Texture 0 @@ -476,8 +478,8 @@ static void fxSetupTextureSingleTMU_NoLock(GLcontext *ctx, GLuint textureset) else unitsmode=fxGetTexSetConfiguration(ctx,NULL,tObj); - if(fxMesa->lastUnitsMode==unitsmode) - return; +/* if(fxMesa->lastUnitsMode==unitsmode) */ +/* return; */ fxMesa->lastUnitsMode=unitsmode; @@ -555,9 +557,8 @@ static void fxSetupTextureSingleTMU_NoLock(GLcontext *ctx, GLuint textureset) FXTRUE); ctx->Driver.MultipassFunc = fxMultipassBlend; #else -#ifndef FX_SILENT - fprintf(stderr,"fx Driver: GL_BLEND not yet supported\n"); -#endif + if (MESA_VERBOSE&VERBOSE_DRIVER) + fprintf(stderr,"fx Driver: GL_BLEND not yet supported\n"); #endif break; case GL_REPLACE: @@ -588,9 +589,9 @@ static void fxSetupTextureSingleTMU_NoLock(GLcontext *ctx, GLuint textureset) FXFALSE); break; default: -#ifndef FX_SILENT - fprintf(stderr,"fx Driver: %x Texture.EnvMode not yet supported\n",ctx->Texture.Unit[textureset].EnvMode); -#endif + if (MESA_VERBOSE&VERBOSE_DRIVER) + fprintf(stderr, "fx Driver: %x Texture.EnvMode not yet supported\n", + ctx->Texture.Unit[textureset].EnvMode); break; } @@ -764,8 +765,8 @@ static void fxSetupTextureDoubleTMU_NoLock(GLcontext *ctx) unitsmode=fxGetTexSetConfiguration(ctx,tObj0,tObj1); - if(fxMesa->lastUnitsMode==unitsmode) - return; +/* if(fxMesa->lastUnitsMode==unitsmode) */ +/* return; */ fxMesa->lastUnitsMode=unitsmode; @@ -1030,7 +1031,7 @@ static void fxSetupTextureNone_NoLock(GLcontext *ctx) fprintf(stderr,"fxmesa: fxSetupTextureNone(...)\n"); } - if((ctx->Light.ShadeModel==GL_SMOOTH) || + if((ctx->Light.ShadeModel==GL_SMOOTH) || 1 || (ctx->Point.SmoothFlag) || (ctx->Line.SmoothFlag) || (ctx->Polygon.SmoothFlag)) @@ -1038,7 +1039,7 @@ static void fxSetupTextureNone_NoLock(GLcontext *ctx) else locala=GR_COMBINE_LOCAL_CONSTANT; - if(ctx->Light.ShadeModel==GL_SMOOTH) + if(ctx->Light.ShadeModel==GL_SMOOTH || 1) localc=GR_COMBINE_LOCAL_ITERATED; else localc=GR_COMBINE_LOCAL_CONSTANT; @@ -1410,14 +1411,20 @@ static void fxSetupColorMask(GLcontext *ctx) { fxMesaContext fxMesa = FX_CONTEXT(ctx); - FX_grColorMask(ctx->Color.ColorMask[RCOMP] || - ctx->Color.ColorMask[GCOMP] || - ctx->Color.ColorMask[BCOMP], - ctx->Color.ColorMask[ACOMP] && fxMesa->haveAlphaBuffer); + if (ctx->Color.DrawBuffer == GL_NONE) { + FX_grColorMask(FXFALSE, FXFALSE); + } + else { + FX_grColorMask(ctx->Color.ColorMask[RCOMP] || + ctx->Color.ColorMask[GCOMP] || + ctx->Color.ColorMask[BCOMP], + ctx->Color.ColorMask[ACOMP] && fxMesa->haveAlphaBuffer); + } } + /************************************************************************/ /**************************** Fog Mode SetUp ****************************/ /************************************************************************/ @@ -1615,6 +1622,9 @@ void fxDDEnable(GLcontext *ctx, GLenum cap, GLboolean state) fxMesa->new_state |= FX_NEW_SCISSOR; ctx->Driver.RenderStart = fxSetupFXUnits; break; + case GL_SHARED_TEXTURE_PALETTE_EXT: + fxDDTexUseGlbPalette(ctx, state); + break; case GL_FOG: fxMesa->new_state |= FX_NEW_FOG; ctx->Driver.RenderStart = fxSetupFXUnits; @@ -1624,6 +1634,7 @@ void fxDDEnable(GLcontext *ctx, GLenum cap, GLboolean state) ctx->Driver.RenderStart = fxSetupFXUnits; break; case GL_LINE_SMOOTH: + case GL_LINE_STIPPLE: case GL_POINT_SMOOTH: case GL_POLYGON_SMOOTH: case GL_TEXTURE_2D: @@ -1631,7 +1642,7 @@ void fxDDEnable(GLcontext *ctx, GLenum cap, GLboolean state) ctx->Driver.RenderStart = fxSetupFXUnits; break; default: - ; /* XXX no-op??? */ + ; /* XXX no-op? */ } } @@ -1664,10 +1675,10 @@ static GLboolean fxMultipassBlend(struct vertex_buffer *VB, GLuint pass) fxDDDepthMask(ctx, FALSE); } /* Enable Cc*Ct mode */ - /* ??? Set the Constant Color ??? */ + /* XXX Set the Constant Color ? */ fxDDEnable(ctx, GL_BLEND, GL_TRUE); - fxDDBlendFunc(ctx, ???, ???); - fxSetupTextureSingleTMU(ctx, ???); + fxDDBlendFunc(ctx, XXX, XXX); + fxSetupTextureSingleTMU(ctx, XXX); fxSetupBlend(ctx); fxSetupDepthTest(ctx); break; @@ -1675,8 +1686,8 @@ static GLboolean fxMultipassBlend(struct vertex_buffer *VB, GLuint pass) case 2: /* Reset everything back to normal */ fxMesa->unitsState = fxMesa->restoreUnitsState; - fxMesa->setupdone &= ???; - fxSetupTextureSingleTMU(ctx, ???); + fxMesa->setupdone &= XXX; + fxSetupTextureSingleTMU(ctx, XXX); fxSetupBlend(ctx); fxSetupDepthTest(ctx); break; diff --git a/xc/extras/Mesa/src/FX/fxvsetup.c b/xc/extras/Mesa/src/FX/fxvsetup.c index 78a311f25..5f0173911 100644 --- a/xc/extras/Mesa/src/FX/fxvsetup.c +++ b/xc/extras/Mesa/src/FX/fxvsetup.c @@ -341,16 +341,19 @@ void fxDDDoRasterSetup( struct vertex_buffer *VB ) GLcontext *ctx = VB->ctx; FX_DRIVER_DATA(VB)->last_vert = FX_DRIVER_DATA(VB)->verts + VB->Count; +#if 0 /* leaving this out fixes the Heretic2 stray polygon bug */ if ((ctx->IndirectTriangles & DD_SW_RASTERIZE) == DD_SW_RASTERIZE) { fxMesaContext fxMesa = (fxMesaContext)ctx->DriverCtx; fxMesa->setupdone = 0; return; } - +#endif + if (VB->Type == VB_CVA_PRECALC) fxDDPartialRasterSetup( VB ); - else + else if (ctx->Driver.RasterSetup) /* NULL if in feedback/selection mode */ ctx->Driver.RasterSetup( VB, VB->CopyStart, VB->Count ); + } diff --git a/xc/extras/Mesa/src/X/xmesa1.c b/xc/extras/Mesa/src/X/xmesa1.c index 56e6fcad7..b132f3bb3 100644 --- a/xc/extras/Mesa/src/X/xmesa1.c +++ b/xc/extras/Mesa/src/X/xmesa1.c @@ -72,6 +72,11 @@ #endif +#ifndef GLX_NONE_EXT +#define GLX_NONE_EXT 0x8000 +#endif + + /* * Current X/Mesa context pointer: */ @@ -418,7 +423,7 @@ static void free_xmesa_buffer(int client, XMesaBuffer buffer) } -/* Copy X color table stuff from on XMesaBuffer to another. */ +/* Copy X color table stuff from one XMesaBuffer to another. */ static void copy_colortable_info(XMesaBuffer dst, const XMesaBuffer src) { MEMCPY(dst->color_table, src->color_table, sizeof(src->color_table)); @@ -1408,21 +1413,29 @@ unsigned long xmesa_color_to_pixel( XMesaContext xmesa, /* * Create a new X/Mesa visual. - * Input: display - the X display - * visinfo - the XVisualInfo - * rgb_flag - TRUE=RGB(A) mode, FALSE=CI mode - * alpha_flag - need alpha planes? - * db_flag - TRUE=double bufferd, FALSE=single - * stereo_flag - true/false - * ximage_flag - TRUE=use XImage for back buffer, FALSE=use Pixmap - * depth_size - requested min bits per depth buffer value - * stencil_size - requested min bits per stencil buffer value - * accum_size - requested min bits per accum buffer value (per channel) - * level - 0=normal, 1=overaly, -1=underlay, etc. - * Return: New XMesaVisual or NULL if something goes wrong + * Input: display - X11 display + * visinfo - an XVisualInfo pointer + * rgb_flag - GL_TRUE = RGB mode, + * GL_FALSE = color index mode + * alpha_flag - alpha buffer requested? + * db_flag - GL_TRUE = double-buffered, + * GL_FALSE = single buffered + * stereo_flag - stereo visual? + * ximage_flag - GL_TRUE = use an XImage for back buffer, + * GL_FALSE = use an off-screen pixmap for back buffer + * depth_size - requested bits/depth values, or zero + * stencil_size - requested bits/stencil values, or zero + * accum_red_size - requested bits/red accum values, or zero + * accum_green_size - requested bits/green accum values, or zero + * accum_blue_size - requested bits/blue accum values, or zero + * accum_alpha_size - requested bits/alpha accum values, or zero + * num_samples - number of samples/pixel if multisampling, or zero + * level - visual level, usually 0 + * visualCaveat - ala the GLX extension, usually GLX_NONE_EXT + * Return; a new XMesaVisual or 0 if error. */ XMesaVisual XMesaCreateVisual( XMesaDisplay *display, - XMesaVisualInfo visinfo, + XMesaVisualInfo visinfo, GLboolean rgb_flag, GLboolean alpha_flag, GLboolean db_flag, @@ -1430,8 +1443,13 @@ XMesaVisual XMesaCreateVisual( XMesaDisplay *display, GLboolean ximage_flag, GLint depth_size, GLint stencil_size, - GLint accum_size, - GLint level ) + GLint accum_red_size, + GLint accum_green_size, + GLint accum_blue_size, + GLint accum_alpha_size, + GLint num_samples, + GLint level, + GLint visualCaveat ) { char *gamma; XMesaVisual v; @@ -1506,6 +1524,7 @@ XMesaVisual XMesaCreateVisual( XMesaDisplay *display, v->ximage_flag = ximage_flag; v->level = level; + v->VisualCaveat = visualCaveat; (void) initialize_visual_and_buffer( 0, v, NULL, rgb_flag, 0, 0 ); @@ -1532,11 +1551,15 @@ XMesaVisual XMesaCreateVisual( XMesaDisplay *display, } } - v->gl_visual = gl_create_visual( rgb_flag, alpha_flag, db_flag, stereo_flag, - depth_size, stencil_size, accum_size, - v->index_bits, - red_bits, green_bits, - blue_bits, alpha_bits ); + v->gl_visual = _mesa_create_visual( rgb_flag, db_flag, stereo_flag, + red_bits, green_bits, + blue_bits, alpha_bits, + v->index_bits, + depth_size, + stencil_size, + accum_red_size, accum_green_size, + accum_blue_size, accum_alpha_size, + 0 ); if (!v->gl_visual) { #ifndef XFree86Server FREE(v->visinfo); @@ -1557,7 +1580,7 @@ void XMesaSetVisualDisplay( XMesaDisplay *dpy, XMesaVisual v ) void XMesaDestroyVisual( XMesaVisual v ) { - gl_destroy_visual( v->gl_visual ); + _mesa_destroy_visual( v->gl_visual ); #ifndef XFree86Server FREE(v->visinfo); #endif @@ -1594,6 +1617,8 @@ XMesaContext XMesaCreateContext( XMesaVisual v, XMesaContext share_list return NULL; } + gl_extensions_enable(c->gl_ctx, "GL_HP_occlusion_test"); + if (CHECK_BYTE_ORDER(v)) { c->swapbytes = GL_FALSE; } @@ -1750,7 +1775,7 @@ XMesaBuffer XMesaCreateWindowBuffer2( XMesaVisual v, b->gl_buffer = gl_create_framebuffer( v->gl_visual, v->gl_visual->DepthBits > 0, v->gl_visual->StencilBits > 0, - v->gl_visual->AccumBits > 0, + v->gl_visual->AccumRedBits > 0, v->gl_visual->AlphaBits > 0 ); if (!b->gl_buffer) { free_xmesa_buffer(client, b); @@ -1778,9 +1803,9 @@ XMesaBuffer XMesaCreateWindowBuffer2( XMesaVisual v, if (v->gl_visual->DBflag) { attribs[numAttribs++] = FXMESA_DOUBLEBUFFER; } - if (v->gl_visual->AccumBits > 0) { + if (v->gl_visual->AccumRedBits > 0) { attribs[numAttribs++] = FXMESA_ACCUM_SIZE; - attribs[numAttribs++] = v->gl_visual->AccumBits; + attribs[numAttribs++] = v->gl_visual->AccumRedBits; } if (v->gl_visual->StencilBits > 0) { attribs[numAttribs++] = FXMESA_STENCIL_SIZE; @@ -1897,7 +1922,9 @@ XMesaBuffer XMesaCreatePixmapBuffer( XMesaVisual v, b->gl_buffer = gl_create_framebuffer( v->gl_visual, v->gl_visual->DepthBits > 0, v->gl_visual->StencilBits > 0, - v->gl_visual->AccumBits > 0, + v->gl_visual->AccumRedBits + + v->gl_visual->AccumGreenBits + + v->gl_visual->AccumBlueBits > 0, v->gl_visual->AlphaBits > 0 ); if (!b->gl_buffer) { free_xmesa_buffer(client, b); @@ -2435,7 +2462,7 @@ GLboolean XMesaGetBackBuffer( XMesaBuffer b, GLboolean XMesaGetDepthBuffer( XMesaBuffer b, GLint *width, GLint *height, GLint *bytesPerValue, void **buffer ) { - if ((!b->gl_buffer) || (!b->gl_buffer->Depth)) { + if ((!b->gl_buffer) || (!b->gl_buffer->DepthBuffer)) { *width = 0; *height = 0; *bytesPerValue = 0; @@ -2446,7 +2473,7 @@ GLboolean XMesaGetDepthBuffer( XMesaBuffer b, GLint *width, GLint *height, *width = b->gl_buffer->Width; *height = b->gl_buffer->Height; *bytesPerValue = sizeof(GLdepth); - *buffer = b->gl_buffer->Depth; + *buffer = b->gl_buffer->DepthBuffer; return GL_TRUE; } } diff --git a/xc/extras/Mesa/src/alphabuf.c b/xc/extras/Mesa/src/alphabuf.c index 50bc80d4b..7bba72b47 100644 --- a/xc/extras/Mesa/src/alphabuf.c +++ b/xc/extras/Mesa/src/alphabuf.c @@ -3,7 +3,7 @@ * Mesa 3-D graphics library * Version: 3.3 * - * Copyright (C) 1999 Brian Paul All Rights Reserved. + * Copyright (C) 1999-2000 Brian Paul All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), @@ -60,7 +60,7 @@ alloc_alpha_buffers( GLcontext *ctx, GLframebuffer *buf ) { GLint bytes = buf->Width * buf->Height * sizeof(GLubyte); - ASSERT(ctx->Visual->SoftwareAlpha); + ASSERT(ctx->DrawBuffer->UseSoftwareAlphaBuffer); if (buf->FrontLeftAlpha) { FREE( buf->FrontLeftAlpha ); @@ -122,7 +122,8 @@ alloc_alpha_buffers( GLcontext *ctx, GLframebuffer *buf ) /* * Allocate a new front and back alpha buffer. */ -void gl_alloc_alpha_buffers( GLcontext *ctx ) +void +_mesa_alloc_alpha_buffers( GLcontext *ctx ) { alloc_alpha_buffers( ctx, ctx->DrawBuffer ); if (ctx->ReadBuffer != ctx->DrawBuffer) { @@ -134,12 +135,13 @@ void gl_alloc_alpha_buffers( GLcontext *ctx ) /* * Clear all the alpha buffers */ -void gl_clear_alpha_buffers( GLcontext *ctx ) +void +_mesa_clear_alpha_buffers( GLcontext *ctx ) { const GLubyte aclear = (GLint) (ctx->Color.ClearColor[3] * 255.0F); GLuint bufferBit; - ASSERT(ctx->Visual->SoftwareAlpha); + ASSERT(ctx->DrawBuffer->UseSoftwareAlphaBuffer); ASSERT(ctx->Color.ColorMask[ACOMP]); /* loop over four possible alpha buffers */ @@ -183,8 +185,9 @@ void gl_clear_alpha_buffers( GLcontext *ctx ) -void gl_write_alpha_span( GLcontext *ctx, GLuint n, GLint x, GLint y, - CONST GLubyte rgba[][4], const GLubyte mask[] ) +void +_mesa_write_alpha_span( GLcontext *ctx, GLuint n, GLint x, GLint y, + CONST GLubyte rgba[][4], const GLubyte mask[] ) { GLubyte *aptr = ALPHA_DRAW_ADDR( x, y ); GLuint i; @@ -205,8 +208,9 @@ void gl_write_alpha_span( GLcontext *ctx, GLuint n, GLint x, GLint y, } -void gl_write_mono_alpha_span( GLcontext *ctx, GLuint n, GLint x, GLint y, - GLubyte alpha, const GLubyte mask[] ) +void +_mesa_write_mono_alpha_span( GLcontext *ctx, GLuint n, GLint x, GLint y, + GLubyte alpha, const GLubyte mask[] ) { GLubyte *aptr = ALPHA_DRAW_ADDR( x, y ); GLuint i; @@ -227,9 +231,10 @@ void gl_write_mono_alpha_span( GLcontext *ctx, GLuint n, GLint x, GLint y, } -void gl_write_alpha_pixels( GLcontext *ctx, - GLuint n, const GLint x[], const GLint y[], - CONST GLubyte rgba[][4], const GLubyte mask[] ) +void +_mesa_write_alpha_pixels( GLcontext *ctx, + GLuint n, const GLint x[], const GLint y[], + CONST GLubyte rgba[][4], const GLubyte mask[] ) { GLuint i; @@ -250,9 +255,10 @@ void gl_write_alpha_pixels( GLcontext *ctx, } -void gl_write_mono_alpha_pixels( GLcontext *ctx, - GLuint n, const GLint x[], const GLint y[], - GLubyte alpha, const GLubyte mask[] ) +void +_mesa_write_mono_alpha_pixels( GLcontext *ctx, + GLuint n, const GLint x[], const GLint y[], + GLubyte alpha, const GLubyte mask[] ) { GLuint i; @@ -274,8 +280,9 @@ void gl_write_mono_alpha_pixels( GLcontext *ctx, -void gl_read_alpha_span( GLcontext *ctx, - GLuint n, GLint x, GLint y, GLubyte rgba[][4] ) +void +_mesa_read_alpha_span( GLcontext *ctx, + GLuint n, GLint x, GLint y, GLubyte rgba[][4] ) { GLubyte *aptr = ALPHA_READ_ADDR( x, y ); GLuint i; @@ -285,9 +292,10 @@ void gl_read_alpha_span( GLcontext *ctx, } -void gl_read_alpha_pixels( GLcontext *ctx, - GLuint n, const GLint x[], const GLint y[], - GLubyte rgba[][4], const GLubyte mask[] ) +void +_mesa_read_alpha_pixels( GLcontext *ctx, + GLuint n, const GLint x[], const GLint y[], + GLubyte rgba[][4], const GLubyte mask[] ) { GLuint i; for (i=0;i<n;i++) { diff --git a/xc/extras/Mesa/src/buffers.c b/xc/extras/Mesa/src/buffers.c index 7bfcc7cfa..086dc9345 100644 --- a/xc/extras/Mesa/src/buffers.c +++ b/xc/extras/Mesa/src/buffers.c @@ -109,7 +109,7 @@ clear_color_buffer_with_masking( GLcontext *ctx ) rgba[j][BCOMP] = b; rgba[j][ACOMP] = a; } - gl_mask_rgba_span( ctx, width, x, y + i, rgba ); + _mesa_mask_rgba_span( ctx, width, x, y + i, rgba ); (*ctx->Driver.WriteRGBASpan)( ctx, width, x, y + i, (CONST GLubyte (*)[4])rgba, NULL ); } @@ -124,7 +124,7 @@ clear_color_buffer_with_masking( GLcontext *ctx ) for (j=0;j<width;j++) { span[j] = ctx->Color.ClearIndex; } - gl_mask_index_span( ctx, width, x, y + i, span ); + _mesa_mask_index_span( ctx, width, x, y + i, span ); (*ctx->Driver.WriteCI32Span)( ctx, width, x, y + i, span, mask ); } } @@ -290,16 +290,17 @@ _mesa_Clear( GLbitfield mask ) /* do software clearing here */ if (newMask) { - if (newMask & ctx->Color.DrawDestMask) clear_color_buffers( ctx ); - if (newMask & GL_DEPTH_BUFFER_BIT) _mesa_clear_depth_buffer( ctx ); - if (newMask & GL_ACCUM_BUFFER_BIT) _mesa_clear_accum_buffer( ctx ); - if (newMask & GL_STENCIL_BUFFER_BIT) gl_clear_stencil_buffer( ctx ); + if (newMask & ctx->Color.DrawDestMask) clear_color_buffers(ctx); + if (newMask & GL_DEPTH_BUFFER_BIT) _mesa_clear_depth_buffer(ctx); + if (newMask & GL_ACCUM_BUFFER_BIT) _mesa_clear_accum_buffer(ctx); + if (newMask & GL_STENCIL_BUFFER_BIT) _mesa_clear_stencil_buffer(ctx); } /* clear software-based alpha buffer(s) */ - if ( (mask & GL_COLOR_BUFFER_BIT) && ctx->Visual->SoftwareAlpha + if ( (mask & GL_COLOR_BUFFER_BIT) + && ctx->DrawBuffer->UseSoftwareAlphaBuffers && ctx->Color.ColorMask[RCOMP]) { - gl_clear_alpha_buffers( ctx ); + _mesa_clear_alpha_buffers( ctx ); } #ifdef PROFILE @@ -427,7 +428,7 @@ _mesa_DrawBuffer( GLenum mode ) /* * Set current alpha buffer pointer */ - if (ctx->Visual->SoftwareAlpha) { + if (ctx->DrawBuffer->UseSoftwareAlphaBuffers) { if (ctx->Color.DriverDrawBuffer == GL_FRONT_LEFT) ctx->DrawBuffer->Alpha = ctx->DrawBuffer->FrontLeftAlpha; else if (ctx->Color.DriverDrawBuffer == GL_BACK_LEFT) @@ -552,12 +553,12 @@ _mesa_ResizeBuffersMESA( void ) _mesa_alloc_depth_buffer( ctx ); } if (ctx->DrawBuffer->UseSoftwareStencilBuffer) { - gl_alloc_stencil_buffer( ctx ); + _mesa_alloc_stencil_buffer( ctx ); } if (ctx->DrawBuffer->UseSoftwareAccumBuffer) { _mesa_alloc_accum_buffer( ctx ); } - if (ctx->Visual->SoftwareAlpha) { - gl_alloc_alpha_buffers( ctx ); + if (ctx->DrawBuffer->UseSoftwareAlphaBuffers) { + _mesa_alloc_alpha_buffers( ctx ); } } diff --git a/xc/extras/Mesa/src/context.c b/xc/extras/Mesa/src/context.c index 48e92df60..04c3e1c05 100644 --- a/xc/extras/Mesa/src/context.c +++ b/xc/extras/Mesa/src/context.c @@ -31,6 +31,7 @@ #include "accum.h" #include "alphabuf.h" #include "clip.h" +#include "colortab.h" #include "context.h" #include "cva.h" #include "depth.h" @@ -251,43 +252,61 @@ static void print_timings( GLcontext *ctx ) /* * Allocate a new GLvisual object. * Input: rgbFlag - GL_TRUE=RGB(A) mode, GL_FALSE=Color Index mode - * alphaFlag - alloc software alpha buffers? * dbFlag - double buffering? * stereoFlag - stereo buffer? - * depthFits - requested minimum bits per depth buffer value - * stencilFits - requested minimum bits per stencil buffer value - * accumFits - requested minimum bits per accum buffer component - * indexFits - number of bits per pixel if rgbFlag==GL_FALSE - * red/green/blue/alphaFits - number of bits per color component - * in frame buffer for RGB(A) mode. + * depthBits - requested bits per depth buffer value + * Any value in [0, 32] is acceptable but the actual + * depth type will be GLushort or GLuint as needed. + * stencilBits - requested minimum bits per stencil buffer value + * accumBits - requested minimum bits per accum buffer component + * indexBits - number of bits per pixel if rgbFlag==GL_FALSE + * red/green/blue/alphaBits - number of bits per color component + * in frame buffer for RGB(A) mode. + * We always use 8 in core Mesa though. * Return: pointer to new GLvisual or NULL if requested parameters can't * be met. */ -GLvisual *gl_create_visual( GLboolean rgbFlag, - GLboolean alphaFlag, - GLboolean dbFlag, - GLboolean stereoFlag, - GLint depthBits, - GLint stencilBits, - GLint accumBits, - GLint indexBits, - GLint redBits, - GLint greenBits, - GLint blueBits, - GLint alphaBits ) +GLvisual * +_mesa_create_visual( GLboolean rgbFlag, + GLboolean dbFlag, + GLboolean stereoFlag, + GLint redBits, + GLint greenBits, + GLint blueBits, + GLint alphaBits, + GLint indexBits, + GLint depthBits, + GLint stencilBits, + GLint accumRedBits, + GLint accumGreenBits, + GLint accumBlueBits, + GLint accumAlphaBits, + GLint numSamples ) { GLvisual *vis; - if (depthBits > (GLint) (8*sizeof(GLdepth))) { - /* can't meet depth buffer requirements */ + /* This is to catch bad values from device drivers not updated for + * Mesa 3.3. Some device drivers just passed 1. That's a REALLY + * bad value now (a 1-bit depth buffer!?!). + */ + assert(depthBits == 0 || depthBits > 1); + + if (depthBits < 0 || depthBits > 32) { + return NULL; + } + if (stencilBits < 0 || stencilBits > (GLint) (8 * sizeof(GLstencil))) { return NULL; } - if (stencilBits > (GLint) (8*sizeof(GLstencil))) { - /* can't meet stencil buffer requirements */ + if (accumRedBits < 0 || accumRedBits > (GLint) (8 * sizeof(GLaccum))) { return NULL; } - if (accumBits > (GLint) (8*sizeof(GLaccum))) { - /* can't meet accum buffer requirements */ + if (accumGreenBits < 0 || accumGreenBits > (GLint) (8 * sizeof(GLaccum))) { + return NULL; + } + if (accumBlueBits < 0 || accumBlueBits > (GLint) (8 * sizeof(GLaccum))) { + return NULL; + } + if (accumAlphaBits < 0 || accumAlphaBits > (GLint) (8 * sizeof(GLaccum))) { return NULL; } @@ -302,23 +321,72 @@ GLvisual *gl_create_visual( GLboolean rgbFlag, vis->RedBits = redBits; vis->GreenBits = greenBits; vis->BlueBits = blueBits; - vis->AlphaBits = alphaFlag ? 8*sizeof(GLubyte) : alphaBits; + vis->AlphaBits = alphaBits; + + vis->IndexBits = indexBits; + vis->DepthBits = depthBits; + vis->AccumRedBits = (accumRedBits > 0) ? (8 * sizeof(GLaccum)) : 0; + vis->AccumGreenBits = (accumGreenBits > 0) ? (8 * sizeof(GLaccum)) : 0; + vis->AccumBlueBits = (accumBlueBits > 0) ? (8 * sizeof(GLaccum)) : 0; + vis->AccumAlphaBits = (accumAlphaBits > 0) ? (8 * sizeof(GLaccum)) : 0; + vis->StencilBits = (stencilBits > 0) ? (8 * sizeof(GLstencil)) : 0; + + if (depthBits == 0) { + /* Special case. Even if we don't have a depth buffer we need + * good values for DepthMax for Z vertex transformation purposes. + */ + vis->DepthMax = 1; + vis->DepthMaxF = 1.0F; + } + else if (depthBits < 32) { + vis->DepthMax = (1 << depthBits) - 1; + vis->DepthMaxF = (GLfloat) vis->DepthMax; + } + else { + /* Special case since shift values greater than or equal to the + * number of bits in the left hand expression's type are + * undefined. + */ + vis->DepthMax = 0xffffffff; + vis->DepthMaxF = (GLfloat) vis->DepthMax; + } - vis->IndexBits = indexBits; - vis->DepthBits = (depthBits>0) ? 8*sizeof(GLdepth) : 0; - vis->AccumBits = (accumBits>0) ? 8*sizeof(GLaccum) : 0; - vis->StencilBits = (stencilBits>0) ? 8*sizeof(GLstencil) : 0; + return vis; +} - vis->SoftwareAlpha = alphaFlag; - return vis; +/* This function should no longer be used. Use _mesa_create_visual() instead */ +GLvisual *gl_create_visual( GLboolean rgbFlag, + GLboolean alphaFlag, + GLboolean dbFlag, + GLboolean stereoFlag, + GLint depthBits, + GLint stencilBits, + GLint accumBits, + GLint indexBits, + GLint redBits, + GLint greenBits, + GLint blueBits, + GLint alphaBits ) +{ + return _mesa_create_visual(rgbFlag, dbFlag, stereoFlag, + redBits, greenBits, blueBits, alphaBits, + indexBits, depthBits, stencilBits, + accumBits, accumBits, accumBits, accumBits, 0); } +void +_mesa_destroy_visual( GLvisual *vis ) +{ + FREE(vis); +} + +/* obsolete */ void gl_destroy_visual( GLvisual *vis ) { - FREE( vis ); + _mesa_destroy_visual(vis); } @@ -362,7 +430,9 @@ GLframebuffer *gl_create_framebuffer( GLvisual *visual, } if (softwareAccum) { assert(visual->RGBAflag); - assert(visual->AccumBits > 0); + assert(visual->AccumRedBits > 0); + assert(visual->AccumGreenBits > 0); + assert(visual->AccumBlueBits > 0); } if (softwareAlpha) { assert(visual->RGBAflag); @@ -386,8 +456,8 @@ GLframebuffer *gl_create_framebuffer( GLvisual *visual, void gl_destroy_framebuffer( GLframebuffer *buffer ) { if (buffer) { - if (buffer->Depth) { - FREE( buffer->Depth ); + if (buffer->DepthBuffer) { + FREE( buffer->DepthBuffer ); } if (buffer->Accum) { FREE( buffer->Accum ); @@ -440,7 +510,7 @@ static void one_time_init( void ) gl_init_clip(); gl_init_eval(); _mesa_init_fog(); - gl_init_math(); + _mesa_init_math(); gl_init_lists(); gl_init_shade(); gl_init_texture(); @@ -712,18 +782,6 @@ static void init_2d_map( struct gl_2d_map *map, int n, const float *initial ) } -static void init_color_table( struct gl_color_table *p ) -{ - p->Table[0] = 255; - p->Table[1] = 255; - p->Table[2] = 255; - p->Table[3] = 255; - p->Size = 1; - p->IntFormat = GL_RGBA; - p->Format = GL_RGBA; -} - - /* * Initialize the attribute groups in a GLcontext. */ @@ -750,13 +808,14 @@ static void init_attrib_groups( GLcontext *ctx ) ctx->Const.MaxLineWidthAA = MAX_LINE_WIDTH; ctx->Const.LineWidthGranularity = LINE_WIDTH_GRANULARITY; ctx->Const.NumAuxBuffers = NUM_AUX_BUFFERS; + ctx->Const.MaxColorTableSize = MAX_COLOR_TABLE_SIZE; /* Modelview matrix */ gl_matrix_ctr( &ctx->ModelView ); gl_matrix_alloc_inv( &ctx->ModelView ); ctx->ModelViewStackDepth = 0; - for (i = 0 ; i < MAX_MODELVIEW_STACK_DEPTH ; i++) { + for (i = 0; i < MAX_MODELVIEW_STACK_DEPTH - 1; i++) { gl_matrix_ctr( &ctx->ModelViewStack[i] ); gl_matrix_alloc_inv( &ctx->ModelViewStack[i] ); } @@ -773,7 +832,7 @@ static void init_attrib_groups( GLcontext *ctx ) ctx->NearFarStack[0][0] = 1.0; /* These values seem weird by make */ ctx->NearFarStack[0][1] = 0.0; /* sense mathematically. */ - for (i = 0 ; i < MAX_PROJECTION_STACK_DEPTH ; i++) { + for (i = 0; i < MAX_PROJECTION_STACK_DEPTH - 1; i++) { gl_matrix_ctr( &ctx->ProjectionStack[i] ); gl_matrix_alloc_inv( &ctx->ProjectionStack[i] ); } @@ -782,11 +841,18 @@ static void init_attrib_groups( GLcontext *ctx ) for (i=0; i<MAX_TEXTURE_UNITS; i++) { gl_matrix_ctr( &ctx->TextureMatrix[i] ); ctx->TextureStackDepth[i] = 0; - for (j = 0 ; j < MAX_TEXTURE_STACK_DEPTH ; j++) { + for (j = 0; j < MAX_TEXTURE_STACK_DEPTH - 1; j++) { ctx->TextureStack[i][j].inv = 0; } } + /* Color matrix */ + gl_matrix_ctr(&ctx->ColorMatrix); + ctx->ColorStackDepth = 0; + for (j = 0; j < MAX_COLOR_STACK_DEPTH - 1; j++) { + gl_matrix_ctr(&ctx->ColorStack[j]); + } + /* Accumulate buffer group */ ASSIGN_4V( ctx->Accum.ClearColor, 0.0, 0.0, 0.0, 0.0 ); @@ -845,6 +911,7 @@ static void init_attrib_groups( GLcontext *ctx ) ctx->Depth.Clear = 1.0; ctx->Depth.Func = GL_LESS; ctx->Depth.Mask = GL_TRUE; + ctx->Depth.OcclusionTest = GL_FALSE; /* Evaluators group */ ctx->Eval.Map1Color4 = GL_FALSE; @@ -922,10 +989,36 @@ static void init_attrib_groups( GLcontext *ctx ) ctx->Hint.Fog = GL_DONT_CARE; ctx->Hint.AllowDrawWin = GL_TRUE; - ctx->Hint.AllowDrawSpn = GL_TRUE; + ctx->Hint.AllowDrawFrg = GL_TRUE; ctx->Hint.AllowDrawMem = GL_TRUE; ctx->Hint.StrictLighting = GL_TRUE; + /* Histogram group */ + ctx->Histogram.Width = 0; + ctx->Histogram.Format = GL_RGBA; + ctx->Histogram.Sink = GL_FALSE; + ctx->Histogram.RedSize = 0xffffffff; + ctx->Histogram.GreenSize = 0xffffffff; + ctx->Histogram.BlueSize = 0xffffffff; + ctx->Histogram.AlphaSize = 0xffffffff; + ctx->Histogram.LuminanceSize = 0xffffffff; + for (i = 0; i < HISTOGRAM_TABLE_SIZE; i++) { + ctx->Histogram.Count[i][0] = 0; + ctx->Histogram.Count[i][1] = 0; + ctx->Histogram.Count[i][2] = 0; + ctx->Histogram.Count[i][3] = 0; + } + + /* Min/Max group */ + ctx->MinMax.Format = GL_RGBA; + ctx->MinMax.Sink = GL_FALSE; + ctx->MinMax.Min[RCOMP] = 1000; ctx->MinMax.Max[RCOMP] = -1000; + ctx->MinMax.Min[GCOMP] = 1000; ctx->MinMax.Max[GCOMP] = -1000; + ctx->MinMax.Min[BCOMP] = 1000; ctx->MinMax.Max[BCOMP] = -1000; + ctx->MinMax.Min[ACOMP] = 1000; ctx->MinMax.Max[ACOMP] = -1000; + + + /* Pipeline */ gl_pipeline_init( ctx ); gl_cva_init( ctx ); @@ -1022,6 +1115,30 @@ static void init_attrib_groups( GLcontext *ctx ) ctx->Pixel.MapGtoG[0] = 0.0; ctx->Pixel.MapBtoB[0] = 0.0; ctx->Pixel.MapAtoA[0] = 0.0; + ctx->Pixel.HistogramEnabled = GL_FALSE; + ctx->Pixel.MinMaxEnabled = GL_FALSE; + ctx->Pixel.PixelTextureEnabled = GL_FALSE; + ctx->Pixel.FragmentRgbSource = GL_PIXEL_GROUP_COLOR_SGIS; + ctx->Pixel.FragmentAlphaSource = GL_PIXEL_GROUP_COLOR_SGIS; + ctx->Pixel.PostColorMatrixRedBias = 0.0; + ctx->Pixel.PostColorMatrixRedScale = 1.0; + ctx->Pixel.PostColorMatrixGreenBias = 0.0; + ctx->Pixel.PostColorMatrixGreenScale = 1.0; + ctx->Pixel.PostColorMatrixBlueBias = 0.0; + ctx->Pixel.PostColorMatrixBlueScale = 1.0; + ctx->Pixel.PostColorMatrixAlphaBias = 0.0; + ctx->Pixel.PostColorMatrixAlphaScale = 1.0; + ctx->Pixel.ColorTableScale[0] = 1.0F; + ctx->Pixel.ColorTableScale[1] = 1.0F; + ctx->Pixel.ColorTableScale[2] = 1.0F; + ctx->Pixel.ColorTableScale[3] = 1.0F; + ctx->Pixel.ColorTableBias[0] = 0.0F; + ctx->Pixel.ColorTableBias[1] = 0.0F; + ctx->Pixel.ColorTableBias[2] = 0.0F; + ctx->Pixel.ColorTableBias[3] = 0.0F; + ctx->Pixel.ColorTableEnabled = GL_FALSE; + ctx->Pixel.PostConvolutionColorTableEnabled = GL_FALSE; + ctx->Pixel.PostColorMatrixColorTableEnabled = GL_FALSE; /* Point group */ ctx->Point.SmoothFlag = GL_FALSE; @@ -1077,7 +1194,7 @@ static void init_attrib_groups( GLcontext *ctx ) ctx->Texture.Enabled = 0; for (i=0; i<MAX_TEXTURE_UNITS; i++) init_texture_unit( ctx, i ); - init_color_table(&ctx->Texture.Palette); + _mesa_init_colortable(&ctx->Texture.Palette); /* Transformation group */ ctx->Transform.MatrixMode = GL_MODELVIEW; @@ -1100,8 +1217,8 @@ static void init_attrib_groups( GLcontext *ctx ) #define Sz 10 #define Tz 14 - ctx->Viewport.WindowMap.m[Sz] = 0.5 * DEPTH_SCALE; - ctx->Viewport.WindowMap.m[Tz] = 0.5 * DEPTH_SCALE; + ctx->Viewport.WindowMap.m[Sz] = 0.5 * ctx->Visual->DepthMaxF; + ctx->Viewport.WindowMap.m[Tz] = 0.5 * ctx->Visual->DepthMaxF; #undef Sz #undef Tz @@ -1185,6 +1302,23 @@ static void init_attrib_groups( GLcontext *ctx ) ctx->AttribStackDepth = 0; ctx->ClientAttribStackDepth = 0; + /* Display list */ + ctx->CallDepth = 0; + ctx->ExecuteFlag = GL_TRUE; + ctx->CompileFlag = GL_FALSE; + ctx->CurrentListPtr = NULL; + ctx->CurrentBlock = NULL; + ctx->CurrentListNum = 0; + ctx->CurrentPos = 0; + + /* Color tables */ + _mesa_init_colortable(&ctx->ColorTable); + _mesa_init_colortable(&ctx->ProxyColorTable); + _mesa_init_colortable(&ctx->PostConvolutionColorTable); + _mesa_init_colortable(&ctx->ProxyPostConvolutionColorTable); + _mesa_init_colortable(&ctx->PostColorMatrixColorTable); + _mesa_init_colortable(&ctx->ProxyPostColorMatrixColorTable); + /* Miscellaneous */ ctx->NewState = NEW_ALL; ctx->RenderMode = GL_RENDER; @@ -1196,18 +1330,11 @@ static void init_attrib_groups( GLcontext *ctx ) ctx->NeedEyeNormals = GL_FALSE; ctx->vb_proj_matrix = &ctx->ModelProjectMatrix; - /* Display list */ - ctx->CallDepth = 0; - ctx->ExecuteFlag = GL_TRUE; - ctx->CompileFlag = GL_FALSE; - ctx->CurrentListPtr = NULL; - ctx->CurrentBlock = NULL; - ctx->CurrentListNum = 0; - ctx->CurrentPos = 0; - ctx->ErrorValue = (GLenum) GL_NO_ERROR; ctx->CatchSignals = GL_TRUE; + ctx->OcclusionResult = GL_FALSE; + ctx->OcclusionResultSaved = GL_FALSE; /* For debug/development only */ ctx->NoRaster = getenv("MESA_NO_RASTER") ? GL_TRUE : GL_FALSE; @@ -1256,9 +1383,9 @@ static GLboolean alloc_proxy_textures( GLcontext *ctx ) out_of_memory = GL_FALSE; for (i=0;i<MAX_TEXTURE_LEVELS;i++) { - ctx->Texture.Proxy1D->Image[i] = gl_alloc_texture_image(); - ctx->Texture.Proxy2D->Image[i] = gl_alloc_texture_image(); - ctx->Texture.Proxy3D->Image[i] = gl_alloc_texture_image(); + ctx->Texture.Proxy1D->Image[i] = _mesa_alloc_texture_image(); + ctx->Texture.Proxy2D->Image[i] = _mesa_alloc_texture_image(); + ctx->Texture.Proxy3D->Image[i] = _mesa_alloc_texture_image(); if (!ctx->Texture.Proxy1D->Image[i] || !ctx->Texture.Proxy2D->Image[i] || !ctx->Texture.Proxy3D->Image[i]) { @@ -1268,13 +1395,13 @@ static GLboolean alloc_proxy_textures( GLcontext *ctx ) if (out_of_memory) { for (i=0;i<MAX_TEXTURE_LEVELS;i++) { if (ctx->Texture.Proxy1D->Image[i]) { - gl_free_texture_image(ctx->Texture.Proxy1D->Image[i]); + _mesa_free_texture_image(ctx->Texture.Proxy1D->Image[i]); } if (ctx->Texture.Proxy2D->Image[i]) { - gl_free_texture_image(ctx->Texture.Proxy2D->Image[i]); + _mesa_free_texture_image(ctx->Texture.Proxy2D->Image[i]); } if (ctx->Texture.Proxy3D->Image[i]) { - gl_free_texture_image(ctx->Texture.Proxy3D->Image[i]); + _mesa_free_texture_image(ctx->Texture.Proxy3D->Image[i]); } } gl_free_texture_object(NULL, ctx->Texture.Proxy1D); @@ -1373,8 +1500,8 @@ GLboolean gl_initialize_context_data( GLcontext *ctx, } /* setup API dispatch tables */ - ctx->Exec = CALLOC(_glapi_get_dispatch_table_size() * sizeof(void *)); - ctx->Save = CALLOC(_glapi_get_dispatch_table_size() * sizeof(void *)); + ctx->Exec = (struct _glapi_table *) CALLOC(_glapi_get_dispatch_table_size() * sizeof(void *)); + ctx->Save = (struct _glapi_table *) CALLOC(_glapi_get_dispatch_table_size() * sizeof(void *)); if (!ctx->Exec || !ctx->Save) { free_shared_state(ctx, ctx->Shared); FREE(ctx->VB); @@ -1427,8 +1554,8 @@ GLcontext *gl_create_context( GLvisual *visual, */ void gl_free_context_data( GLcontext *ctx ) { - GLuint i; struct gl_shine_tab *s, *tmps; + GLuint i, j; /* if we're destroying the current context, unbind it first */ if (ctx == gl_get_current_context()) { @@ -1442,17 +1569,23 @@ void gl_free_context_data( GLcontext *ctx ) #endif gl_matrix_dtr( &ctx->ModelView ); - for (i = 0 ; i < MAX_MODELVIEW_STACK_DEPTH ; i++) { + for (i = 0; i < MAX_MODELVIEW_STACK_DEPTH - 1; i++) { gl_matrix_dtr( &ctx->ModelViewStack[i] ); } gl_matrix_dtr( &ctx->ProjectionMatrix ); - for (i = 0 ; i < MAX_PROJECTION_STACK_DEPTH ; i++) { + for (i = 0; i < MAX_PROJECTION_STACK_DEPTH - 1; i++) { gl_matrix_dtr( &ctx->ProjectionStack[i] ); } + for (i = 0; i < MAX_TEXTURE_UNITS; i++) { + gl_matrix_dtr( &ctx->TextureMatrix[i] ); + for (j = 0; j < MAX_TEXTURE_STACK_DEPTH - 1; j++) { + gl_matrix_dtr( &ctx->TextureStack[i][j] ); + } + } FREE( ctx->PB ); - if(ctx->input != ctx->VB->IM) + if (ctx->input != ctx->VB->IM) gl_immediate_free( ctx->input ); gl_vb_free( ctx->VB ); @@ -1515,6 +1648,11 @@ void gl_free_context_data( GLcontext *ctx ) if (ctx->EvalMap.Map2Texture4.Points) FREE( ctx->EvalMap.Map2Texture4.Points ); + _mesa_free_colortable_data( &ctx->ColorTable ); + _mesa_free_colortable_data( &ctx->PostConvolutionColorTable ); + _mesa_free_colortable_data( &ctx->PostColorMatrixColorTable ); + _mesa_free_colortable_data( &ctx->Texture.Palette ); + /* Free cache of immediate buffers. */ while (ctx->nr_im_queued-- > 0) { struct immediate * next = ctx->freed_im_queue->next; diff --git a/xc/extras/Mesa/src/context.h b/xc/extras/Mesa/src/context.h index 535ac238e..b280fdae9 100644 --- a/xc/extras/Mesa/src/context.h +++ b/xc/extras/Mesa/src/context.h @@ -56,6 +56,24 @@ * the colorbuffer, depth buffer, stencil buffer and accum buffer which will * be used by the GL context and framebuffer. */ +extern GLvisual * +_mesa_create_visual( GLboolean rgbFlag, + GLboolean dbFlag, + GLboolean stereoFlag, + GLint redBits, + GLint greenBits, + GLint blueBits, + GLint alphaBits, + GLint indexBits, + GLint depthBits, + GLint stencilBits, + GLint accumRedBits, + GLint accumGreenBits, + GLint accumBlueBits, + GLint accumAlphaBits, + GLint numSamples ); + +/* this function is obsolete */ extern GLvisual *gl_create_visual( GLboolean rgbFlag, GLboolean alphaFlag, GLboolean dbFlag, @@ -69,7 +87,11 @@ extern GLvisual *gl_create_visual( GLboolean rgbFlag, GLint blueBits, GLint alphaBits ); -extern void gl_destroy_visual( GLvisual *vis ); + +extern void +_mesa_destroy_visual( GLvisual *vis ); + +/*obsolete */ extern void gl_destroy_visual( GLvisual *vis ); /* @@ -141,7 +163,7 @@ do { \ extern struct immediate *_mesa_CurrentInput; -#define GET_CURRENT_CONTEXT(C) GLcontext *C = _glapi_Context +#define GET_CURRENT_CONTEXT(C) GLcontext *C = (GLcontext *) _glapi_Context #define GET_IMMEDIATE struct immediate *IM = _mesa_CurrentInput diff --git a/xc/extras/Mesa/src/enable.c b/xc/extras/Mesa/src/enable.c index aff6cbb50..6c2220044 100644 --- a/xc/extras/Mesa/src/enable.c +++ b/xc/extras/Mesa/src/enable.c @@ -153,6 +153,9 @@ void _mesa_set_enable( GLcontext *ctx, GLenum cap, GLboolean state ) ctx->NewState |= NEW_FOG|NEW_RASTER_OPS; } break; + case GL_HISTOGRAM: + ctx->Pixel.HistogramEnabled = state; + break; case GL_LIGHT0: case GL_LIGHT1: case GL_LIGHT2: @@ -191,6 +194,7 @@ void _mesa_set_enable( GLcontext *ctx, GLenum cap, GLboolean state ) case GL_LINE_SMOOTH: if (ctx->Line.SmoothFlag!=state) { ctx->Line.SmoothFlag = state; + ctx->TriangleCaps ^= DD_LINE_SMOOTH; ctx->NewState |= NEW_RASTER_OPS; } break; @@ -267,6 +271,9 @@ void _mesa_set_enable( GLcontext *ctx, GLenum cap, GLboolean state ) case GL_MAP2_VERTEX_4: ctx->Eval.Map2Vertex4 = state; break; + case GL_MINMAX: + ctx->Pixel.MinMaxEnabled = state; + break; case GL_NORMALIZE: if (ctx->Transform.Normalize != state) { ctx->Transform.Normalize = state; @@ -327,8 +334,6 @@ void _mesa_set_enable( GLcontext *ctx, GLenum cap, GLboolean state ) break; case GL_SHARED_TEXTURE_PALETTE_EXT: ctx->Texture.SharedPalette = state; - if (ctx->Driver.UseGlobalTexturePalette) - (*ctx->Driver.UseGlobalTexturePalette)( ctx, state ); break; case GL_STENCIL_TEST: if (state && ctx->Visual->StencilBits==0) { @@ -452,6 +457,43 @@ void _mesa_set_enable( GLcontext *ctx, GLenum cap, GLboolean state ) ctx->Array.EdgeFlag.Enabled = state; break; + /* GL_HP_occlusion_test */ + case GL_OCCLUSION_TEST_HP: + if (ctx->Extensions.HaveHpOcclusionTest) { + ctx->Depth.OcclusionTest = state; + if (state) + ctx->OcclusionResult = ctx->OcclusionResultSaved; + else + ctx->OcclusionResultSaved = ctx->OcclusionResult; + ctx->NewState |= NEW_RASTER_OPS; + } + else { + gl_error( ctx, GL_INVALID_ENUM, state ? "glEnable": "glDisable" ); + return; + } + break; + + /* GL_SGIS_pixel_texture */ + case GL_PIXEL_TEXTURE_SGIS: + ctx->Pixel.PixelTextureEnabled = state; + break; + + /* GL_SGIX_pixel_texture */ + case GL_PIXEL_TEX_GEN_SGIX: + ctx->Pixel.PixelTextureEnabled = state; + break; + + /* GL_SGI_color_table */ + case GL_COLOR_TABLE_SGI: + ctx->Pixel.ColorTableEnabled = state; + break; + case GL_POST_CONVOLUTION_COLOR_TABLE_SGI: + ctx->Pixel.PostConvolutionColorTableEnabled = state; + break; + case GL_POST_COLOR_MATRIX_COLOR_TABLE_SGI: + ctx->Pixel.PostColorMatrixColorTableEnabled = state; + break; + default: if (state) { gl_error( ctx, GL_INVALID_ENUM, "glEnable" ); @@ -516,6 +558,8 @@ _mesa_IsEnabled( GLenum cap ) return ctx->Color.DitherFlag; case GL_FOG: return ctx->Fog.Enabled; + case GL_HISTOGRAM: + return ctx->Pixel.HistogramEnabled; case GL_LIGHTING: return ctx->Light.Enabled; case GL_LIGHT0: @@ -571,6 +615,8 @@ _mesa_IsEnabled( GLenum cap ) return ctx->Eval.Map2Vertex3; case GL_MAP2_VERTEX_4: return ctx->Eval.Map2Vertex4; + case GL_MINMAX: + return ctx->Pixel.MinMaxEnabled; case GL_NORMALIZE: return ctx->Transform.Normalize; case GL_POINT_SMOOTH: @@ -645,6 +691,33 @@ _mesa_IsEnabled( GLenum cap ) return ctx->Array.TexCoord[ctx->Array.ActiveTexture].Enabled; case GL_EDGE_FLAG_ARRAY: return ctx->Array.EdgeFlag.Enabled; + + /* GL_HP_occlusion_test */ + case GL_OCCLUSION_TEST_HP: + if (ctx->Extensions.HaveHpOcclusionTest) { + return ctx->Depth.OcclusionTest; + } + else { + gl_error( ctx, GL_INVALID_ENUM, "glIsEnabled" ); + return GL_FALSE; + } + + /* GL_SGIS_pixel_texture */ + case GL_PIXEL_TEXTURE_SGIS: + return ctx->Pixel.PixelTextureEnabled; + + /* GL_SGIX_pixel_texture */ + case GL_PIXEL_TEX_GEN_SGIX: + return ctx->Pixel.PixelTextureEnabled; + + /* GL_SGI_color_table */ + case GL_COLOR_TABLE_SGI: + return ctx->Pixel.ColorTableEnabled; + case GL_POST_CONVOLUTION_COLOR_TABLE_SGI: + return ctx->Pixel.PostConvolutionColorTableEnabled; + case GL_POST_COLOR_MATRIX_COLOR_TABLE_SGI: + return ctx->Pixel.PostColorMatrixColorTableEnabled; + default: gl_error( ctx, GL_INVALID_ENUM, "glIsEnabled" ); return GL_FALSE; diff --git a/xc/extras/Mesa/src/readpix.c b/xc/extras/Mesa/src/readpix.c index a1e01f0fd..df5ca64ff 100644 --- a/xc/extras/Mesa/src/readpix.c +++ b/xc/extras/Mesa/src/readpix.c @@ -75,14 +75,14 @@ static void read_index_pixels( GLcontext *ctx, (*ctx->Driver.ReadCI32Span)( ctx, readWidth, x, y, index ); if (ctx->Pixel.IndexShift!=0 || ctx->Pixel.IndexOffset!=0) { - gl_shift_and_offset_ci( ctx, readWidth, index); + _mesa_shift_and_offset_ci( ctx, readWidth, index); } if (ctx->Pixel.MapColorFlag) { - gl_map_ci(ctx, readWidth, index); + _mesa_map_ci(ctx, readWidth, index); } - dest = gl_pixel_addr_in_image(packing, pixels, + dest = _mesa_image_address(packing, pixels, width, height, GL_COLOR_INDEX, type, 0, j, 0); switch (type) { @@ -109,7 +109,7 @@ static void read_index_pixels( GLcontext *ctx, dst[i] = (GLushort) index[i]; } if (packing->SwapBytes) { - gl_swap2( (GLushort *) dst, readWidth ); + _mesa_swap2( (GLushort *) dst, readWidth ); } } break; @@ -120,7 +120,7 @@ static void read_index_pixels( GLcontext *ctx, dst[i] = (GLshort) index[i]; } if (packing->SwapBytes) { - gl_swap2( (GLushort *) dst, readWidth ); + _mesa_swap2( (GLushort *) dst, readWidth ); } } break; @@ -131,7 +131,7 @@ static void read_index_pixels( GLcontext *ctx, dst[i] = (GLuint) index[i]; } if (packing->SwapBytes) { - gl_swap4( (GLuint *) dst, readWidth ); + _mesa_swap4( (GLuint *) dst, readWidth ); } } break; @@ -142,7 +142,7 @@ static void read_index_pixels( GLcontext *ctx, dst[i] = (GLint) index[i]; } if (packing->SwapBytes) { - gl_swap4( (GLuint *) dst, readWidth ); + _mesa_swap4( (GLuint *) dst, readWidth ); } } break; @@ -153,7 +153,7 @@ static void read_index_pixels( GLcontext *ctx, dst[i] = (GLfloat) index[i]; } if (packing->SwapBytes) { - gl_swap4( (GLuint *) dst, readWidth ); + _mesa_swap4( (GLuint *) dst, readWidth ); } } break; @@ -199,36 +199,30 @@ static void read_depth_pixels( GLcontext *ctx, bias_or_scale = ctx->Pixel.DepthBias!=0.0 || ctx->Pixel.DepthScale!=1.0; - if (type==GL_UNSIGNED_SHORT && sizeof(GLdepth)==sizeof(GLushort) + if (type==GL_UNSIGNED_SHORT && ctx->Visual->DepthBits == 16 && !bias_or_scale && !packing->SwapBytes) { /* Special case: directly read 16-bit unsigned depth values. */ for (j=0;j<height;j++,y++) { - GLushort *dst = (GLushort*) gl_pixel_addr_in_image( packing, pixels, + GLdepth depth[MAX_WIDTH]; + GLushort *dst = (GLushort*) _mesa_image_address( packing, pixels, width, height, GL_DEPTH_COMPONENT, type, 0, j, 0 ); - (*ctx->Driver.ReadDepthSpan)( ctx, width, x, y, (GLdepth*) dst); + GLint i; + _mesa_read_depth_span(ctx, width, x, y, depth); + for (i = 0; i < width; i++) + dst[i] = depth[i]; } } - else if (type==GL_UNSIGNED_INT && sizeof(GLdepth)==sizeof(GLuint) + else if (type==GL_UNSIGNED_INT && ctx->Visual->DepthBits == 32 && !bias_or_scale && !packing->SwapBytes) { /* Special case: directly read 32-bit unsigned depth values. */ - /* Compute shift value to scale depth values up to 32-bit uints. */ - GLuint shift = 0; - GLuint max = MAX_DEPTH; - while ((max&0x80000000)==0) { - max = max << 1; - shift++; - } for (j=0;j<height;j++,y++) { - GLuint *dst = (GLuint *) gl_pixel_addr_in_image( packing, pixels, + GLdepth *dst = (GLdepth *) _mesa_image_address( packing, pixels, width, height, GL_DEPTH_COMPONENT, type, 0, j, 0 ); - (*ctx->Driver.ReadDepthSpan)( ctx, width, x, y, (GLdepth*) dst); - for (i=0;i<width;i++) { - dst[i] = dst[i] << shift; - } + _mesa_read_depth_span(ctx, width, x, y, dst); } } else { - /* General case (slow) */ + /* General case (slower) */ for (j=0;j<height;j++,y++) { GLfloat depth[MAX_WIDTH]; GLvoid *dest; @@ -243,7 +237,7 @@ static void read_depth_pixels( GLcontext *ctx, } } - dest = gl_pixel_addr_in_image(packing, pixels, + dest = _mesa_image_address(packing, pixels, width, height, GL_DEPTH_COMPONENT, type, 0, j, 0); switch (type) { @@ -270,7 +264,7 @@ static void read_depth_pixels( GLcontext *ctx, dst[i] = FLOAT_TO_USHORT( depth[i] ); } if (packing->SwapBytes) { - gl_swap2( (GLushort *) dst, readWidth ); + _mesa_swap2( (GLushort *) dst, readWidth ); } } break; @@ -281,7 +275,7 @@ static void read_depth_pixels( GLcontext *ctx, dst[i] = FLOAT_TO_SHORT( depth[i] ); } if (packing->SwapBytes) { - gl_swap2( (GLushort *) dst, readWidth ); + _mesa_swap2( (GLushort *) dst, readWidth ); } } break; @@ -292,7 +286,7 @@ static void read_depth_pixels( GLcontext *ctx, dst[i] = FLOAT_TO_UINT( depth[i] ); } if (packing->SwapBytes) { - gl_swap4( (GLuint *) dst, readWidth ); + _mesa_swap4( (GLuint *) dst, readWidth ); } } break; @@ -303,7 +297,7 @@ static void read_depth_pixels( GLcontext *ctx, dst[i] = FLOAT_TO_INT( depth[i] ); } if (packing->SwapBytes) { - gl_swap4( (GLuint *) dst, readWidth ); + _mesa_swap4( (GLuint *) dst, readWidth ); } } break; @@ -314,7 +308,7 @@ static void read_depth_pixels( GLcontext *ctx, dst[i] = depth[i]; } if (packing->SwapBytes) { - gl_swap4( (GLuint *) dst, readWidth ); + _mesa_swap4( (GLuint *) dst, readWidth ); } } break; @@ -364,17 +358,17 @@ static void read_stencil_pixels( GLcontext *ctx, GLvoid *dest; GLstencil stencil[MAX_WIDTH]; - gl_read_stencil_span( ctx, readWidth, x, y, stencil ); + _mesa_read_stencil_span( ctx, readWidth, x, y, stencil ); if (shift_or_offset) { - gl_shift_and_offset_stencil( ctx, readWidth, stencil ); + _mesa_shift_and_offset_stencil( ctx, readWidth, stencil ); } if (ctx->Pixel.MapStencilFlag) { - gl_map_stencil( ctx, readWidth, stencil ); + _mesa_map_stencil( ctx, readWidth, stencil ); } - dest = gl_pixel_addr_in_image( packing, pixels, + dest = _mesa_image_address( packing, pixels, width, height, GL_STENCIL_INDEX, type, 0, j, 0 ); switch (type) { @@ -407,7 +401,7 @@ static void read_stencil_pixels( GLcontext *ctx, dst[i] = (GLushort) stencil[i]; } if (packing->SwapBytes) { - gl_swap2( (GLushort *) dst, readWidth ); + _mesa_swap2( (GLushort *) dst, readWidth ); } } break; @@ -418,7 +412,7 @@ static void read_stencil_pixels( GLcontext *ctx, dst[i] = (GLshort) stencil[i]; } if (packing->SwapBytes) { - gl_swap2( (GLushort *) dst, readWidth ); + _mesa_swap2( (GLushort *) dst, readWidth ); } } break; @@ -429,7 +423,7 @@ static void read_stencil_pixels( GLcontext *ctx, dst[i] = (GLuint) stencil[i]; } if (packing->SwapBytes) { - gl_swap4( (GLuint *) dst, readWidth ); + _mesa_swap4( (GLuint *) dst, readWidth ); } } break; @@ -440,7 +434,7 @@ static void read_stencil_pixels( GLcontext *ctx, *dst++ = (GLint) stencil[i]; } if (packing->SwapBytes) { - gl_swap4( (GLuint *) dst, readWidth ); + _mesa_swap4( (GLuint *) dst, readWidth ); } } break; @@ -451,7 +445,7 @@ static void read_stencil_pixels( GLcontext *ctx, dst[i] = (GLfloat) stencil[i]; } if (packing->SwapBytes) { - gl_swap4( (GLuint *) dst, readWidth ); + _mesa_swap4( (GLuint *) dst, readWidth ); } } break; @@ -506,8 +500,17 @@ read_fast_rgba_pixels( GLcontext *ctx, GLvoid *pixels, const struct gl_pixelstore_attrib *packing ) { - /* can't do scale, bias or mapping */ - if (ctx->Pixel.ScaleOrBiasRGBA || ctx->Pixel.MapColorFlag) + GLboolean applyTransferOps; + + applyTransferOps = ctx->Pixel.ScaleOrBiasRGBA || + ctx->Pixel.MapColorFlag || + ctx->ColorMatrix.type != MATRIX_IDENTITY || + ctx->Pixel.ScaleOrBiasRGBApcm || + ctx->Pixel.ColorTableEnabled || + ctx->Pixel.PostColorMatrixColorTableEnabled || + ctx->Pixel.MinMaxEnabled; + /* can't do scale, bias, mapping, etc */ + if (applyTransferOps) return GL_FALSE; /* can't do fancy pixel packing */ @@ -564,9 +567,9 @@ read_fast_rgba_pixels( GLcontext *ctx, for (row=0; row<readHeight; row++) { (*ctx->Driver.ReadRGBASpan)(ctx, readWidth, srcX, srcY, (GLubyte (*)[4]) dest); - if (ctx->Visual->SoftwareAlpha) { - gl_read_alpha_span(ctx, readWidth, srcX, srcY, - (GLubyte (*)[4]) dest); + if (ctx->ReadBuffer->UseSoftwareAlphaBuffers) { + _mesa_read_alpha_span(ctx, readWidth, srcX, srcY, + (GLubyte (*)[4]) dest); } dest += rowLength * 4; srcY++; @@ -633,7 +636,7 @@ static void read_rgba_pixels( GLcontext *ctx, return; } - if (!gl_is_legal_format_and_type(format, type)) { + if (!_mesa_is_legal_format_and_type(format, type)) { gl_error(ctx, GL_INVALID_OPERATION, "glReadPixels(format or type)"); return; } @@ -646,14 +649,15 @@ static void read_rgba_pixels( GLcontext *ctx, gl_read_rgba_span( ctx, ctx->ReadBuffer, readWidth, x, y, rgba ); - dest = gl_pixel_addr_in_image( packing, pixels, width, height, - format, type, 0, j, 0); + dest = _mesa_image_address( packing, pixels, width, height, + format, type, 0, j, 0); - gl_pack_rgba_span( ctx, readWidth, (const GLubyte (*)[4]) rgba, - format, type, dest, packing, GL_TRUE ); + _mesa_pack_rgba_span( ctx, readWidth, (const GLubyte (*)[4]) rgba, + format, type, dest, packing, GL_TRUE ); } } else { + /* Convert color index pixels to RGBA */ GLint j; for (j=0;j<height;j++,y++) { GLubyte rgba[MAX_WIDTH][4]; @@ -663,16 +667,16 @@ static void read_rgba_pixels( GLcontext *ctx, (*ctx->Driver.ReadCI32Span)( ctx, readWidth, x, y, index ); if (ctx->Pixel.IndexShift!=0 || ctx->Pixel.IndexOffset!=0) { - gl_map_ci( ctx, readWidth, index ); + _mesa_map_ci( ctx, readWidth, index ); } - gl_map_ci_to_rgba(ctx, readWidth, index, rgba ); + _mesa_map_ci_to_rgba_ubyte(ctx, readWidth, index, rgba ); - dest = gl_pixel_addr_in_image( packing, pixels, width, height, - format, type, 0, j, 0); + dest = _mesa_image_address( packing, pixels, width, height, + format, type, 0, j, 0); - gl_pack_rgba_span( ctx, readWidth, (const GLubyte (*)[4]) rgba, - format, type, dest, packing, GL_TRUE ); + _mesa_pack_rgba_span( ctx, readWidth, (const GLubyte (*)[4]) rgba, + format, type, dest, packing, GL_TRUE ); } } @@ -693,15 +697,20 @@ _mesa_ReadPixels( GLint x, GLint y, GLsizei width, GLsizei height, return; } + if (ctx->Driver.ReadPixels && + (*ctx->Driver.ReadPixels)(ctx, x, y, width, height, + format, type, &ctx->Pack, pixels)) + return; + switch (format) { case GL_COLOR_INDEX: - read_index_pixels( ctx, x, y, width, height, type, pixels, &ctx->Pack ); + read_index_pixels(ctx, x, y, width, height, type, pixels, &ctx->Pack); break; case GL_STENCIL_INDEX: - read_stencil_pixels( ctx, x, y, width, height, type, pixels, &ctx->Pack ); + read_stencil_pixels(ctx, x,y, width,height, type, pixels, &ctx->Pack); break; case GL_DEPTH_COMPONENT: - read_depth_pixels( ctx, x, y, width, height, type, pixels, &ctx->Pack ); + read_depth_pixels(ctx, x, y, width, height, type, pixels, &ctx->Pack); break; case GL_RED: case GL_GREEN: @@ -714,7 +723,8 @@ _mesa_ReadPixels( GLint x, GLint y, GLsizei width, GLsizei height, case GL_BGR: case GL_BGRA: case GL_ABGR_EXT: - read_rgba_pixels( ctx, x, y, width, height, format, type, pixels, &ctx->Pack ); + read_rgba_pixels(ctx, x, y, width, height, + format, type, pixels, &ctx->Pack); break; default: gl_error( ctx, GL_INVALID_ENUM, "glReadPixels(format)" ); diff --git a/xc/extras/Mesa/src/span.c b/xc/extras/Mesa/src/span.c index 38f4449f1..653d0dc12 100644 --- a/xc/extras/Mesa/src/span.c +++ b/xc/extras/Mesa/src/span.c @@ -148,10 +148,10 @@ static void multi_write_index_span( GLcontext *ctx, GLuint n, /* make copy of incoming indexes */ MEMCPY( indexTmp, indexes, n * sizeof(GLuint) ); if (ctx->Color.SWLogicOpEnabled) { - gl_logicop_ci_span( ctx, n, x, y, indexTmp, mask ); + _mesa_logicop_ci_span( ctx, n, x, y, indexTmp, mask ); } if (ctx->Color.SWmasking) { - gl_mask_index_span( ctx, n, x, y, indexTmp ); + _mesa_mask_index_span( ctx, n, x, y, indexTmp ); } (*ctx->Driver.WriteCI32Span)( ctx, n, x, y, indexTmp, mask ); } @@ -218,7 +218,7 @@ void gl_write_index_span( GLcontext *ctx, if (ctx->Stencil.Enabled) { /* first stencil test */ - if (gl_stencil_and_depth_test_span(ctx, n, x, y, z, mask) == GL_FALSE) { + if (_mesa_stencil_and_ztest_span(ctx, n, x, y, z, mask) == GL_FALSE) { return; } } @@ -227,6 +227,9 @@ void gl_write_index_span( GLcontext *ctx, if (_mesa_depth_test_span( ctx, n, x, y, z, mask )==0) return; } + /* if we get here, something passed the depth test */ + ctx->OcclusionResult = GL_TRUE; + if (ctx->RasterMask & MULTI_DRAW_BIT) { /* draw to zero or two or more buffers */ multi_write_index_span( ctx, n, x, y, index, mask ); @@ -234,10 +237,10 @@ void gl_write_index_span( GLcontext *ctx, else { /* normal situation: draw to exactly one buffer */ if (ctx->Color.SWLogicOpEnabled) { - gl_logicop_ci_span( ctx, n, x, y, index, mask ); + _mesa_logicop_ci_span( ctx, n, x, y, index, mask ); } if (ctx->Color.SWmasking) { - gl_mask_index_span( ctx, n, x, y, index ); + _mesa_mask_index_span( ctx, n, x, y, index ); } /* write pixels */ @@ -278,7 +281,7 @@ void gl_write_monoindex_span( GLcontext *ctx, if (ctx->Stencil.Enabled) { /* first stencil test */ - if (gl_stencil_and_depth_test_span(ctx, n, x, y, z, mask) == GL_FALSE) { + if (_mesa_stencil_and_ztest_span(ctx, n, x, y, z, mask) == GL_FALSE) { return; } } @@ -287,6 +290,9 @@ void gl_write_monoindex_span( GLcontext *ctx, if (_mesa_depth_test_span( ctx, n, x, y, z, mask )==0) return; } + /* if we get here, something passed the depth test */ + ctx->OcclusionResult = GL_TRUE; + if (ctx->Color.DrawBuffer == GL_NONE) { /* write no pixels */ return; @@ -305,11 +311,11 @@ void gl_write_monoindex_span( GLcontext *ctx, } if (ctx->Color.SWLogicOpEnabled) { - gl_logicop_ci_span( ctx, n, x, y, indexes, mask ); + _mesa_logicop_ci_span( ctx, n, x, y, indexes, mask ); } if (ctx->Color.SWmasking) { - gl_mask_index_span( ctx, n, x, y, indexes ); + _mesa_mask_index_span( ctx, n, x, y, indexes ); } if (ctx->RasterMask & MULTI_DRAW_BIT) { @@ -319,10 +325,10 @@ void gl_write_monoindex_span( GLcontext *ctx, else { /* normal situation: draw to exactly one buffer */ if (ctx->Color.SWLogicOpEnabled) { - gl_logicop_ci_span( ctx, n, x, y, indexes, mask ); + _mesa_logicop_ci_span( ctx, n, x, y, indexes, mask ); } if (ctx->Color.SWmasking) { - gl_mask_index_span( ctx, n, x, y, indexes ); + _mesa_mask_index_span( ctx, n, x, y, indexes ); } (*ctx->Driver.WriteCI32Span)( ctx, n, x, y, indexes, mask ); } @@ -386,20 +392,20 @@ static void multi_write_rgba_span( GLcontext *ctx, GLuint n, MEMCPY( rgbaTmp, rgba, 4 * n * sizeof(GLubyte) ); if (ctx->Color.SWLogicOpEnabled) { - gl_logicop_rgba_span( ctx, n, x, y, rgbaTmp, mask ); + _mesa_logicop_rgba_span( ctx, n, x, y, rgbaTmp, mask ); } else if (ctx->Color.BlendEnabled) { _mesa_blend_span( ctx, n, x, y, rgbaTmp, mask ); } if (ctx->Color.SWmasking) { - gl_mask_rgba_span( ctx, n, x, y, rgbaTmp ); + _mesa_mask_rgba_span( ctx, n, x, y, rgbaTmp ); } (*ctx->Driver.WriteRGBASpan)( ctx, n, x, y, (const GLubyte (*)[4]) rgbaTmp, mask ); if (ctx->RasterMask & ALPHABUF_BIT) { - gl_write_alpha_span( ctx, n, x, y, - (const GLubyte (*)[4])rgbaTmp, mask ); + _mesa_write_alpha_span( ctx, n, x, y, + (const GLubyte (*)[4])rgbaTmp, mask ); } } } @@ -470,7 +476,7 @@ void gl_write_rgba_span( GLcontext *ctx, if (ctx->Stencil.Enabled) { /* first stencil test */ - if (gl_stencil_and_depth_test_span(ctx, n, x, y, z, mask) == GL_FALSE) { + if (_mesa_stencil_and_ztest_span(ctx, n, x, y, z, mask) == GL_FALSE) { return; } write_all = GL_FALSE; @@ -486,6 +492,9 @@ void gl_write_rgba_span( GLcontext *ctx, } } + /* if we get here, something passed the depth test */ + ctx->OcclusionResult = GL_TRUE; + if (ctx->RasterMask & MULTI_DRAW_BIT) { multi_write_rgba_span( ctx, n, x, y, (const GLubyte (*)[4]) rgba, @@ -495,7 +504,7 @@ void gl_write_rgba_span( GLcontext *ctx, /* normal: write to exactly one buffer */ /* logic op or blending */ if (ctx->Color.SWLogicOpEnabled) { - gl_logicop_rgba_span( ctx, n, x, y, rgba, mask ); + _mesa_logicop_rgba_span( ctx, n, x, y, rgba, mask ); } else if (ctx->Color.BlendEnabled) { _mesa_blend_span( ctx, n, x, y, rgba, mask ); @@ -503,7 +512,7 @@ void gl_write_rgba_span( GLcontext *ctx, /* Color component masking */ if (ctx->Color.SWmasking) { - gl_mask_rgba_span( ctx, n, x, y, rgba ); + _mesa_mask_rgba_span( ctx, n, x, y, rgba ); } /* write pixels */ @@ -512,9 +521,9 @@ void gl_write_rgba_span( GLcontext *ctx, write_all ? Null : mask ); if (ctx->RasterMask & ALPHABUF_BIT) { - gl_write_alpha_span( ctx, n, x, y, - (const GLubyte (*)[4]) rgba, - write_all ? Null : mask ); + _mesa_write_alpha_span( ctx, n, x, y, + (const GLubyte (*)[4]) rgba, + write_all ? Null : mask ); } } @@ -580,7 +589,7 @@ void gl_write_monocolor_span( GLcontext *ctx, if (ctx->Stencil.Enabled) { /* first stencil test */ - if (gl_stencil_and_depth_test_span(ctx, n, x, y, z, mask) == GL_FALSE) { + if (_mesa_stencil_and_ztest_span(ctx, n, x, y, z, mask) == GL_FALSE) { return; } write_all = GL_FALSE; @@ -596,6 +605,9 @@ void gl_write_monocolor_span( GLcontext *ctx, } } + /* if we get here, something passed the depth test */ + ctx->OcclusionResult = GL_TRUE; + if (ctx->Color.DrawBuffer == GL_NONE) { /* write no pixels */ return; @@ -617,7 +629,7 @@ void gl_write_monocolor_span( GLcontext *ctx, else { /* normal: write to exactly one buffer */ if (ctx->Color.SWLogicOpEnabled) { - gl_logicop_rgba_span( ctx, n, x, y, rgba, mask ); + _mesa_logicop_rgba_span( ctx, n, x, y, rgba, mask ); } else if (ctx->Color.BlendEnabled) { _mesa_blend_span( ctx, n, x, y, rgba, mask ); @@ -625,7 +637,7 @@ void gl_write_monocolor_span( GLcontext *ctx, /* Color component masking */ if (ctx->Color.SWmasking) { - gl_mask_rgba_span( ctx, n, x, y, rgba ); + _mesa_mask_rgba_span( ctx, n, x, y, rgba ); } /* write pixels */ @@ -633,9 +645,9 @@ void gl_write_monocolor_span( GLcontext *ctx, (const GLubyte (*)[4]) rgba, write_all ? Null : mask ); if (ctx->RasterMask & ALPHABUF_BIT) { - gl_write_alpha_span( ctx, n, x, y, - (const GLubyte (*)[4]) rgba, - write_all ? Null : mask ); + _mesa_write_alpha_span( ctx, n, x, y, + (const GLubyte (*)[4]) rgba, + write_all ? Null : mask ); } } } @@ -658,8 +670,8 @@ void gl_write_monocolor_span( GLcontext *ctx, else { (*ctx->Driver.WriteMonoRGBASpan)( ctx, n, x, y, mask ); if (ctx->RasterMask & ALPHABUF_BIT) { - gl_write_mono_alpha_span( ctx, n, x, y, (GLubyte) color[ACOMP], - write_all ? Null : mask ); + _mesa_write_mono_alpha_span( ctx, n, x, y, (GLubyte) color[ACOMP], + write_all ? Null : mask ); } } } @@ -724,7 +736,7 @@ void gl_write_texture_span( GLcontext *ctx, if (primitive==GL_BITMAP || (ctx->RasterMask & MULTI_DRAW_BIT)) { /* must make a copy of the colors since they may be modified */ - MEMCPY(rgbaBackup, rgbaIn, 4 * sizeof(GLubyte)); + MEMCPY(rgbaBackup, rgbaIn, 4 * n * sizeof(GLubyte)); rgba = rgbaBackup; } else { @@ -732,7 +744,7 @@ void gl_write_texture_span( GLcontext *ctx, } /* Texture */ - ASSERT(ctx->Texture.Enabled); + ASSERT(ctx->Texture.ReallyEnabled); gl_texture_pixels( ctx, 0, n, s, t, u, lambda, rgba ); /* Add base and specular colors */ @@ -769,7 +781,7 @@ void gl_write_texture_span( GLcontext *ctx, if (ctx->Stencil.Enabled) { /* first stencil test */ - if (gl_stencil_and_depth_test_span(ctx, n, x, y, z, mask) == GL_FALSE) { + if (_mesa_stencil_and_ztest_span(ctx, n, x, y, z, mask) == GL_FALSE) { return; } write_all = GL_FALSE; @@ -785,6 +797,9 @@ void gl_write_texture_span( GLcontext *ctx, } } + /* if we get here, something passed the depth test */ + ctx->OcclusionResult = GL_TRUE; + if (ctx->RasterMask & MULTI_DRAW_BIT) { multi_write_rgba_span( ctx, n, x, y, (const GLubyte (*)[4])rgba, write_all ? Null : mask ); @@ -792,20 +807,20 @@ void gl_write_texture_span( GLcontext *ctx, else { /* normal: write to exactly one buffer */ if (ctx->Color.SWLogicOpEnabled) { - gl_logicop_rgba_span( ctx, n, x, y, rgba, mask ); + _mesa_logicop_rgba_span( ctx, n, x, y, rgba, mask ); } else if (ctx->Color.BlendEnabled) { _mesa_blend_span( ctx, n, x, y, rgba, mask ); } if (ctx->Color.SWmasking) { - gl_mask_rgba_span( ctx, n, x, y, rgba ); + _mesa_mask_rgba_span( ctx, n, x, y, rgba ); } (*ctx->Driver.WriteRGBASpan)( ctx, n, x, y, (const GLubyte (*)[4])rgba, write_all ? Null : mask ); if (ctx->RasterMask & ALPHABUF_BIT) { - gl_write_alpha_span( ctx, n, x, y, (const GLubyte (*)[4]) rgba, - write_all ? Null : mask ); + _mesa_write_alpha_span( ctx, n, x, y, (const GLubyte (*)[4]) rgba, + write_all ? Null : mask ); } } } @@ -848,7 +863,7 @@ gl_write_multitexture_span( GLcontext *ctx, GLuint texUnits, if (primitive==GL_BITMAP || (ctx->RasterMask & MULTI_DRAW_BIT)) { /* must make a copy of the colors since they may be modified */ - MEMCPY(rgbaBackup, rgbaIn, 4 * sizeof(GLubyte)); + MEMCPY(rgbaBackup, rgbaIn, 4 * n * sizeof(GLubyte)); rgba = rgbaBackup; } else { @@ -856,7 +871,7 @@ gl_write_multitexture_span( GLcontext *ctx, GLuint texUnits, } /* Texture */ - ASSERT(ctx->Texture.Enabled); + ASSERT(ctx->Texture.ReallyEnabled); ASSERT(texUnits <= MAX_TEXTURE_UNITS); for (i=0;i<texUnits;i++) { gl_texture_pixels( ctx, i, n, s[i], t[i], u[i], lambda[i], rgba ); @@ -896,7 +911,7 @@ gl_write_multitexture_span( GLcontext *ctx, GLuint texUnits, if (ctx->Stencil.Enabled) { /* first stencil test */ - if (gl_stencil_and_depth_test_span(ctx, n, x, y, z, mask) == GL_FALSE) { + if (_mesa_stencil_and_ztest_span(ctx, n, x, y, z, mask) == GL_FALSE) { return; } write_all = GL_FALSE; @@ -912,26 +927,30 @@ gl_write_multitexture_span( GLcontext *ctx, GLuint texUnits, } } + /* if we get here, something passed the depth test */ + ctx->OcclusionResult = GL_TRUE; + if (ctx->RasterMask & MULTI_DRAW_BIT) { - multi_write_rgba_span( ctx, n, x, y, (const GLubyte (*)[4]) rgba, write_all ? Null : mask ); + multi_write_rgba_span( ctx, n, x, y, (const GLubyte (*)[4]) rgba, + write_all ? Null : mask ); } else { /* normal: write to exactly one buffer */ if (ctx->Color.SWLogicOpEnabled) { - gl_logicop_rgba_span( ctx, n, x, y, rgba, mask ); + _mesa_logicop_rgba_span( ctx, n, x, y, rgba, mask ); } else if (ctx->Color.BlendEnabled) { _mesa_blend_span( ctx, n, x, y, rgba, mask ); } if (ctx->Color.SWmasking) { - gl_mask_rgba_span( ctx, n, x, y, rgba ); + _mesa_mask_rgba_span( ctx, n, x, y, rgba ); } (*ctx->Driver.WriteRGBASpan)( ctx, n, x, y, (const GLubyte (*)[4])rgba, write_all ? Null : mask ); if (ctx->RasterMask & ALPHABUF_BIT) { - gl_write_alpha_span( ctx, n, x, y, (const GLubyte (*)[4])rgba, - write_all ? Null : mask ); + _mesa_write_alpha_span( ctx, n, x, y, (const GLubyte (*)[4])rgba, + write_all ? Null : mask ); } } } @@ -950,7 +969,7 @@ void gl_read_rgba_span( GLcontext *ctx, GLframebuffer *buffer, || x + (GLint) n < 0 || x >= buffer->Width) { /* completely above, below, or right */ /* XXX maybe leave undefined? */ - MEMSET( rgba, 0, 4 * n * sizeof(GLubyte)); + BZERO(rgba, 4 * n * sizeof(GLubyte)); } else { GLint skip, length; @@ -982,8 +1001,8 @@ void gl_read_rgba_span( GLcontext *ctx, GLframebuffer *buffer, } (*ctx->Driver.ReadRGBASpan)( ctx, length, x + skip, y, rgba + skip ); - if (ctx->Visual->SoftwareAlpha) { - gl_read_alpha_span( ctx, length, x + skip, y, rgba + skip ); + if (buffer->UseSoftwareAlphaBuffers) { + _mesa_read_alpha_span( ctx, length, x + skip, y, rgba + skip ); } } } @@ -1001,7 +1020,7 @@ void gl_read_index_span( GLcontext *ctx, GLframebuffer *buffer, if (y < 0 || y >= buffer->Height || x + (GLint) n < 0 || x >= buffer->Width) { /* completely above, below, or right */ - MEMSET(indx, 0, n * sizeof(GLuint)); + BZERO(indx, n * sizeof(GLuint)); } else { GLint skip, length; diff --git a/xc/extras/Mesa/src/state.c b/xc/extras/Mesa/src/state.c index b135a3df0..bb8452842 100644 --- a/xc/extras/Mesa/src/state.c +++ b/xc/extras/Mesa/src/state.c @@ -63,6 +63,7 @@ #include "mmath.h" #include "pipeline.h" #include "pixel.h" +#include "pixeltex.h" #include "points.h" #include "polygon.h" #include "quads.h" @@ -524,6 +525,17 @@ _mesa_init_exec_table(struct _glapi_table *exec) exec->GetColorTableParameterfvEXT = _mesa_GetColorTableParameterfv; exec->GetColorTableParameterivEXT = _mesa_GetColorTableParameteriv; + /* GL_SGIX_pixel_texture */ + exec->PixelTexGenSGIX = _mesa_PixelTexGenSGIX; + + /* GL_SGIS_pixel_texture */ + exec->PixelTexGenParameteriSGIS = _mesa_PixelTexGenParameteriSGIS; + exec->PixelTexGenParameterivSGIS = _mesa_PixelTexGenParameterivSGIS; + exec->PixelTexGenParameterfSGIS = _mesa_PixelTexGenParameterfSGIS; + exec->PixelTexGenParameterfvSGIS = _mesa_PixelTexGenParameterfvSGIS; + exec->GetPixelTexGenParameterivSGIS = _mesa_GetPixelTexGenParameterivSGIS; + exec->GetPixelTexGenParameterfvSGIS = _mesa_GetPixelTexGenParameterfvSGIS; + /* GL_EXT_compiled_vertex_array */ exec->LockArraysEXT = _mesa_LockArraysEXT; exec->UnlockArraysEXT = _mesa_UnlockArraysEXT; @@ -779,7 +791,8 @@ static void update_rasterflags( GLcontext *ctx ) if (ctx->Stencil.Enabled) ctx->RasterMask |= STENCIL_BIT; if (ctx->Color.SWmasking) ctx->RasterMask |= MASKING_BIT; - if (ctx->Visual->SoftwareAlpha && ctx->Color.ColorMask[ACOMP] + if (ctx->DrawBuffer->UseSoftwareAlphaBuffers + && ctx->Color.ColorMask[ACOMP] && ctx->Color.DrawBuffer != GL_NONE) ctx->RasterMask |= ALPHABUF_BIT; @@ -790,11 +803,14 @@ static void update_rasterflags( GLcontext *ctx ) ctx->RasterMask |= WINCLIP_BIT; } + if (ctx->Depth.OcclusionTest) + ctx->RasterMask |= OCCLUSION_BIT; + + /* If we're not drawing to exactly one color buffer set the * MULTI_DRAW_BIT flag. Also set it if we're drawing to no * buffers or the RGBA or CI mask disables all writes. */ - ctx->TriangleCaps &= ~DD_MULTIDRAW; if (ctx->Color.MultiDrawBuffer) { @@ -1132,6 +1148,10 @@ void gl_update_state( GLcontext *ctx ) ctx->ModelProjectWinMatrixUptodate = 0; } + if (ctx->NewState & NEW_COLOR_MATRIX) { + gl_matrix_analyze( &ctx->ColorMatrix ); + } + /* Figure out whether we can light in object space or not. If we * can, find the current positions of the lights in object space */ diff --git a/xc/extras/Mesa/src/types.h b/xc/extras/Mesa/src/types.h index b3af90a8c..00c4275e7 100644 --- a/xc/extras/Mesa/src/types.h +++ b/xc/extras/Mesa/src/types.h @@ -82,13 +82,7 @@ /* * Depth buffer data type: */ -#if DEPTH_BITS==16 - typedef GLushort GLdepth; -#elif DEPTH_BITS==32 - typedef GLint GLdepth; -#else -# error "illegal number of depth bits" -#endif +typedef GLuint GLdepth; /* Must be 32-bits! */ @@ -214,10 +208,17 @@ struct gl_texture_image { /* Data structure for color tables */ struct gl_color_table { - GLubyte Table[4 * MAX_TEXTURE_PALETTE_SIZE]; + GLvoid *Table; + GLenum TableType; /* GL_UNSIGNED_BYTE or GL_FLOAT */ GLuint Size; /* number of entries (rows) in table */ GLenum Format; GLenum IntFormat; + GLint RedSize; + GLint GreenSize; + GLint BlueSize; + GLint AlphaSize; + GLint LuminanceSize; + GLint IntensitySize; }; @@ -392,6 +393,7 @@ struct gl_depthbuffer_attrib { GLfloat Clear; /* Value to clear depth buffer to */ GLboolean Test; /* Depth buffering enabled flag */ GLboolean Mask; /* Depth buffer writable? */ + GLboolean OcclusionTest;/* XXX GL_HP_occlusion_test */ }; @@ -405,6 +407,7 @@ struct gl_enable_attrib { GLboolean DepthTest; GLboolean Dither; GLboolean Fog; + GLboolean Histogram; GLboolean Light[MAX_LIGHTS]; GLboolean Lighting; GLboolean LineSmooth; @@ -429,7 +432,9 @@ struct gl_enable_attrib { GLboolean Map2TextureCoord4; GLboolean Map2Vertex3; GLboolean Map2Vertex4; + GLboolean MinMax; GLboolean Normalize; + GLboolean PixelTexture; GLboolean PointSmooth; GLboolean PolygonOffsetPoint; GLboolean PolygonOffsetLine; @@ -495,7 +500,7 @@ struct gl_hint_attrib { /* GL_PGI_misc_hints */ GLenum AllowDrawWin; - GLenum AllowDrawSpn; + GLenum AllowDrawFrg; GLenum AllowDrawMem; GLenum StrictLighting; @@ -504,6 +509,26 @@ struct gl_hint_attrib { }; +struct gl_histogram_attrib { + GLuint Width; + GLint Format; + GLboolean Sink; + GLuint RedSize; + GLuint GreenSize; + GLuint BlueSize; + GLuint AlphaSize; + GLuint LuminanceSize; + GLuint Count[HISTOGRAM_TABLE_SIZE][4]; +}; + + +struct gl_minmax_attrib { + GLenum Format; + GLboolean Sink; + GLfloat Min[4], Max[4]; /* RGBA */ +}; + + struct gl_light_attrib { struct gl_light Light[MAX_LIGHTS]; /* Array of lights */ struct gl_lightmodel Model; /* Lighting model */ @@ -559,8 +584,7 @@ struct gl_pixel_attrib { GLint IndexShift, IndexOffset; GLboolean MapColorFlag; GLboolean MapStencilFlag; - GLfloat ZoomX; /* Pixel zoom X factor */ - GLfloat ZoomY; /* Pixel zoom Y factor */ + GLfloat ZoomX, ZoomY; GLint MapStoSsize; /* Size of each pixel map */ GLint MapItoIsize; GLint MapItoRsize; @@ -585,6 +609,33 @@ struct gl_pixel_attrib { GLfloat MapGtoG[MAX_PIXEL_MAP_TABLE]; GLfloat MapBtoB[MAX_PIXEL_MAP_TABLE]; GLfloat MapAtoA[MAX_PIXEL_MAP_TABLE]; + /* GL_EXT_histogram */ + GLboolean HistogramEnabled; + GLboolean MinMaxEnabled; + /* GL_SGIS_pixel_texture */ + GLboolean PixelTextureEnabled; + GLenum FragmentRgbSource; + GLenum FragmentAlphaSource; + /* GL_SGI_color_matrix */ + GLfloat PostColorMatrixRedScale; + GLfloat PostColorMatrixRedBias; + GLfloat PostColorMatrixGreenScale; + GLfloat PostColorMatrixGreenBias; + GLfloat PostColorMatrixBlueScale; + GLfloat PostColorMatrixBlueBias; + GLfloat PostColorMatrixAlphaScale; + GLfloat PostColorMatrixAlphaBias; + GLboolean ScaleOrBiasRGBApcm; + /* GL_SGI_color_table */ + GLfloat ColorTableScale[4]; + GLfloat ColorTableBias[4]; + GLboolean ColorTableEnabled; + GLfloat PCCTscale[4]; + GLfloat PCCTbias[4]; + GLboolean PostConvolutionColorTableEnabled; + GLfloat PCMCTscale[4]; + GLfloat PCMCTbias[4]; + GLboolean PostColorMatrixColorTableEnabled; }; @@ -774,6 +825,7 @@ struct gl_texture_unit { GLubyte Holes; /* elements not generated by texgen */ GLuint TexgenSize; /* size of element generated */ GLboolean AnyTransform; /* texgen or non-identity matrix */ + GLfloat LodBias; /* for biasing mipmap levels */ struct gl_texture_object *CurrentD[4]; struct gl_texture_object *Current; @@ -1192,11 +1244,16 @@ struct gl_visual { GLint IndexBits; /* Bits/pixel if in color index mode */ - GLint AccumBits; /* Number of bits per color channel, or 0 */ + GLint AccumRedBits; /* Number of bits in red accum channel */ + GLint AccumGreenBits; /* Number of bits in green accum channel */ + GLint AccumBlueBits; /* Number of bits in blue accum channel */ + GLint AccumAlphaBits; /* Number of bits in alpha accum channel */ GLint DepthBits; /* Number of bits in depth buffer, or 0 */ GLint StencilBits; /* Number of bits in stencil buffer, or 0 */ + GLint NumSamples; /* Samples/pixel for multisampling */ - GLboolean SoftwareAlpha; /* Implement software alpha buffer? */ + GLuint DepthMax; /* Max depth buffer value */ + GLfloat DepthMaxF; /* Float max depth buffer value */ }; @@ -1218,7 +1275,7 @@ struct gl_frame_buffer { GLboolean UseSoftwareAlphaBuffers; /* Software depth (aka Z) buffer */ - GLdepth *Depth; /* array [Width*Height] of GLdepth values */ + GLvoid *DepthBuffer; /* array [Width*Height] of GLushort or GLuint*/ /* Software stencil buffer */ GLstencil *Stencil; /* array [Width*Height] of GLstencil values */ @@ -1234,7 +1291,7 @@ struct gl_frame_buffer { GLubyte *Alpha; /* Points to current alpha buffer */ /* Drawing bounds: intersection of window size and scissor box */ - GLint Xmin, Xmax, Ymin, Ymax; + GLint Xmin, Xmax, Ymin, Ymax; /* [Xmin,Xmax] X [Ymin,Ymax] */ }; @@ -1254,6 +1311,7 @@ struct gl_constants { GLfloat MinLineWidthAA, MaxLineWidthAA; /* antialiased */ GLfloat LineWidthGranularity; GLuint NumAuxBuffers; + GLuint MaxColorTableSize; }; @@ -1264,6 +1322,10 @@ struct extension; struct gl_extensions { char *ext_string; struct extension *ext_list; + /* flags to quickly test if certain extensions are available */ + GLboolean HaveTextureEnvAdd; + GLboolean HaveTextureLodBias; + GLboolean HaveHpOcclusionTest; }; @@ -1282,6 +1344,8 @@ struct gl_extensions { #define WINCLIP_BIT 0x200 /* Clip pixels/primitives to window */ #define MULTI_DRAW_BIT 0x400 /* Write to more than one color- */ /* buffer or no buffers. */ +#define OCCLUSION_BIT 0x800 /* GL_HP_occlusion_test enabled */ + /* * Bits to indicate what state has to be updated (NewState) @@ -1304,6 +1368,7 @@ struct gl_extensions { #define NEW_NORMAL_TRANSFORM 0x8000 #define NEW_VIEWPORT 0x10000 #define NEW_TEXTURE_ENABLE 0x20000 +#define NEW_COLOR_MATRIX 0x40000 #define NEW_ALL ~0 @@ -1338,6 +1403,9 @@ struct gl_extensions { #define DD_TRI_CULL_FRONT_BACK 0x400000 /* not supported by most drivers */ #define DD_Z_NEVER 0x800000 #define DD_STENCIL 0x1000000 +#define DD_CLIP_FOG_COORD 0x2000000 + + #define DD_SW_SETUP (DD_TRI_CULL| \ DD_TRI_CULL_FRONT_BACK| \ @@ -1540,7 +1608,8 @@ typedef union node Node; #define VERT_EVAL_C2 0x2000000 /* - or just use 3 bits */ #define VERT_EVAL_P1 0x4000000 /* */ #define VERT_EVAL_P2 0x8000000 /* */ -#define VERT_FLOAT_RGBA 0x10000000 /* allow partial support for this */ +#define VERT_SPEC_RGB 0x10000000 +#define VERT_FOG_COORD 0x20000000 /* internal use only, currently */ #define VERT_EYE VERT_BEGIN /* for pipeline management & cva */ #define VERT_WIN VERT_END /* some overlaps can be tolerated */ @@ -1591,7 +1660,7 @@ typedef union node Node; #define VERT_DATA (VERT_TEX0_ANY|VERT_TEX1_ANY|VERT_RGBA| \ VERT_INDEX|VERT_EDGE|VERT_NORM| \ VERT_OBJ_ANY|VERT_MATERIAL|VERT_ELT| \ - VERT_EVAL_ANY) + VERT_EVAL_ANY|VERT_FOG_COORD) #define VERT_TO_PIPE (~VERT_END_VB) @@ -1676,6 +1745,11 @@ struct gl_context { GLuint TextureStackDepth[MAX_TEXTURE_UNITS]; GLmatrix TextureStack[MAX_TEXTURE_UNITS][MAX_TEXTURE_STACK_DEPTH - 1]; + /* Color matrix and stack */ + GLmatrix ColorMatrix; + GLuint ColorStackDepth; + GLmatrix ColorStack[MAX_COLOR_STACK_DEPTH - 1]; + /* Display lists */ GLuint CallDepth; /* Current recursion calling depth */ GLboolean ExecuteFlag; /* Execute GL commands? */ @@ -1711,9 +1785,11 @@ struct gl_context { struct gl_eval_attrib Eval; struct gl_fog_attrib Fog; struct gl_hint_attrib Hint; + struct gl_histogram_attrib Histogram; struct gl_light_attrib Light; struct gl_line_attrib Line; struct gl_list_attrib List; + struct gl_minmax_attrib MinMax; struct gl_pixel_attrib Pixel; struct gl_point_attrib Point; struct gl_polygon_attrib Polygon; @@ -1737,6 +1813,13 @@ struct gl_context { struct gl_feedback Feedback; /* Feedback */ struct gl_selection Select; /* Selection */ + struct gl_color_table ColorTable; /* Pre-convolution */ + struct gl_color_table ProxyColorTable; /* Pre-convolution */ + struct gl_color_table PostConvolutionColorTable; + struct gl_color_table ProxyPostConvolutionColorTable; + struct gl_color_table PostColorMatrixColorTable; + struct gl_color_table ProxyPostColorMatrixColorTable; + /* Optimized Accumulation buffer info */ GLboolean IntegerAccumMode; /* Storing unscaled integers? */ GLfloat IntegerAccumScaler; /* Implicit scale factor */ @@ -1764,7 +1847,6 @@ struct gl_context { GLboolean DoViewportMapping; - GLuint RenderFlags; /* Active inputs to render stage */ GLuint RequireWriteableFlags; /* What can the driver/clipping tolerate? */ @@ -1791,6 +1873,9 @@ struct gl_context { GLfloat backface_sign; + GLboolean OcclusionResult; /* GL_HP_occlusion_test */ + GLboolean OcclusionResultSaved; /* GL_HP_occlusion_test */ + /* Destination of immediate mode commands */ struct immediate *input; @@ -1863,7 +1948,8 @@ enum _verbose { VERBOSE_API = 0x40, VERBOSE_TRIANGLE_CHECKS = 0x80, VERBOSE_CULL = 0x100, - VERBOSE_DISPLAY_LIST = 0x200 + VERBOSE_DISPLAY_LIST = 0x200, + VERBOSE_LIGHTING = 0x400 }; diff --git a/xc/include/GL/glx.h b/xc/include/GL/glx.h index 367ce0a51..e4712b95f 100644 --- a/xc/include/GL/glx.h +++ b/xc/include/GL/glx.h @@ -1,26 +1,38 @@ #ifndef __GLX_glx_h__ #define __GLX_glx_h__ -/* $XFree86: xc/include/GL/glx.h,v 1.5 2000/03/02 16:07:29 martin Exp $ */ /* -** The contents of this file are subject to the GLX Public License Version 1.0 -** (the "License"). You may not use this file except in compliance with the -** License. You may obtain a copy of the License at Silicon Graphics, Inc., -** attn: Legal Services, 2011 N. Shoreline Blvd., Mountain View, CA 94043 -** or at http://www.sgi.com/software/opensource/glx/license.html. -** -** Software distributed under the License is distributed on an "AS IS" -** basis. ALL WARRANTIES ARE DISCLAIMED, INCLUDING, WITHOUT LIMITATION, ANY -** IMPLIED WARRANTIES OF MERCHANTABILITY, OF FITNESS FOR A PARTICULAR -** PURPOSE OR OF NON- INFRINGEMENT. See the License for the specific -** language governing rights and limitations under the License. -** -** The Original Software is GLX version 1.2 source code, released February, -** 1999. The developer of the Original Software is Silicon Graphics, Inc. -** Those portions of the Subject Software created by Silicon Graphics, Inc. -** are Copyright (c) 1991-9 Silicon Graphics, Inc. All Rights Reserved. -** -** $SGI$ +** License Applicability. Except to the extent portions of this file are +** made subject to an alternative license as permitted in the SGI Free +** Software License B, Version 1.0 (the "License"), the contents of this +** file are subject only to the provisions of the License. You may not use +** this file except in compliance with the License. You may obtain a copy +** of the License at Silicon Graphics, Inc., attn: Legal Services, 1600 +** Amphitheatre Parkway, Mountain View, CA 94043-1351, or at: +** +** http://oss.sgi.com/projects/FreeB +** +** Note that, as provided in the License, the Software is distributed on an +** "AS IS" basis, with ALL EXPRESS AND IMPLIED WARRANTIES AND CONDITIONS +** DISCLAIMED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES AND +** CONDITIONS OF MERCHANTABILITY, SATISFACTORY QUALITY, FITNESS FOR A +** PARTICULAR PURPOSE, AND NON-INFRINGEMENT. +** +** Original Code. The Original Code is: OpenGL Sample Implementation, +** Version 1.2.1, released January 26, 2000, developed by Silicon Graphics, +** Inc. The Original Code is Copyright (c) 1991-2000 Silicon Graphics, Inc. +** Copyright in any portions created by third parties is as indicated +** elsewhere herein. All Rights Reserved. +** +** Additional Notice Provisions: The application programming interfaces +** established by SGI in conjunction with the Original Code are The +** OpenGL(R) Graphics System: A Specification (Version 1.2.1), released +** April 1, 1999; The OpenGL(R) Graphics System Utility Library (Version +** 1.3), released November 4, 1998; and OpenGL(R) Graphics with the X +** Window System(R) (Version 1.3), released October 19, 1998. This software +** was created using the OpenGL(R) version 1.2.1 Sample Implementation +** published by SGI, but has not been independently verified as being +** compliant with the OpenGL(R) version 1.2.1 Specification. */ #include <X11/Xlib.h> @@ -39,19 +51,19 @@ extern "C" { typedef XID GLXContextID; typedef XID GLXPixmap; typedef XID GLXDrawable; -/* GLX 1.3 */ -typedef XID GLXFBConfigID; -typedef XID GLXPfuffer; -typedef XID GLXWindow; typedef XID GLXPbuffer; -typedef XID GLXFBConfig; - +typedef XID GLXWindow; +typedef XID GLXFBConfigID; /* ** GLXContext is a pointer to opaque data. -**/ +*/ typedef struct __GLXcontextRec *GLXContext; +/* +** GLXFBConfig is a pointer to opaque data. +*/ +typedef struct __GLXFBConfigRec *GLXFBConfig; /************************************************************************/ @@ -76,34 +88,57 @@ extern const char * glXGetClientString (Display *dpy, int name ); extern const char * glXQueryServerString (Display *dpy, int screen, int name ); extern const char * glXQueryExtensionsString (Display *dpy, int screen ); -/* GLX 1.3 */ -extern GLXFBConfig glXChooseFBConfig (Display *dpy, int screen, const int *attribList, int *nitems); +/* New for GLX 1.3 */ +extern GLXFBConfig * glXGetFBConfigs (Display *dpy, int screen, int *nelements); +extern GLXFBConfig * glXChooseFBConfig (Display *dpy, int screen, const int *attrib_list, int *nelements); extern int glXGetFBConfigAttrib (Display *dpy, GLXFBConfig config, int attribute, int *value); extern XVisualInfo * glXGetVisualFromFBConfig (Display *dpy, GLXFBConfig config); -extern GLXWindow glXCreateWindow (Display *dpy, GLXFBConfig config, Window win, const int *attribList); -extern void glXDestroyWindow (Display *dpy, GLXWindow window); -extern GLXPixmap glXCreatePixmap (Display *dpy, GLXFBConfig config,Pixmap pixmap, const int *attribList); +extern GLXWindow glXCreateWindow (Display *dpy, GLXFBConfig config, Window win, const int *attrib_list); +extern void glXDestroyWindow (Display *dpy, GLXWindow win); +extern GLXPixmap glXCreatePixmap (Display *dpy, GLXFBConfig config, Pixmap pixmap, const int *attrib_list); extern void glXDestroyPixmap (Display *dpy, GLXPixmap pixmap); -extern GLXPbuffer glXCreatePbuffer (Display *dpy, GLXFBConfig config, const int *attribList); +extern GLXPbuffer glXCreatePbuffer (Display *dpy, GLXFBConfig config, const int *attrib_list); extern void glXDestroyPbuffer (Display *dpy, GLXPbuffer pbuf); extern void glXQueryDrawable (Display *dpy, GLXDrawable draw, int attribute, unsigned int *value); -extern GLXContext glXCreateNewContext (Display *dpy, GLXFBConfig config, int renderType, GLXContext shareList, Bool direct); -extern Bool glXMakeContextCurrent (Display *dpy, GLXDrawable draw, GLXDrawable read, GLXContext ctx); +extern GLXContext glXCreateNewContext (Display *dpy, GLXFBConfig config, int render_type, GLXContext share_list, Bool direct); +extern Bool glXMakeContextCurrent (Display *display, GLXDrawable draw, GLXDrawable read, GLXContext ctx); extern GLXDrawable glXGetCurrentReadDrawable (void); +extern Display * glXGetCurrentDisplay (void); extern int glXQueryContext (Display *dpy, GLXContext ctx, int attribute, int *value); -extern void glXSelectEvent (Display *dpy, GLXDrawable drawable, unsigned long mask); -extern void glXGetSelectedEvent (Display *dpy, GLXDrawable drawable, unsigned long *mask); +extern void glXSelectEvent (Display *dpy, GLXDrawable draw, unsigned long event_mask); +extern void glXGetSelectedEvent (Display *dpy, GLXDrawable draw, unsigned long *event_mask); -/* Extensions */ -extern Display * glXGetCurrentDisplay (void); +/*** SGI GLX extensions */ extern GLXContextID glXGetContextIDEXT (const GLXContext ctx); extern GLXDrawable glXGetCurrentDrawableEXT (void); extern GLXContext glXImportContextEXT (Display *dpy, GLXContextID contextID); extern void glXFreeContextEXT (Display *dpy, GLXContext ctx); extern int glXQueryContextInfoEXT (Display *dpy, GLXContext ctx, int attribute, int *value); -extern void (*glXGetProcAddressARB(const GLubyte *procName))(); +extern void (*glXGetProcAddressARB(const GLubyte *procName))( void ); + +/*** Should these go here, or in another header? */ +/* +** GLX Events +*/ +typedef struct { + int event_type; /* GLX_DAMAGED or GLX_SAVED */ + int draw_type; /* GLX_WINDOW or GLX_PBUFFER */ + unsigned long serial; /* # of last request processed by server */ + Bool send_event; /* true if this came for SendEvent request */ + Display *display; /* display the event was read from */ + GLXDrawable drawable; /* XID of Drawable */ + unsigned int buffer_mask; /* mask indicating which buffers are affected */ + unsigned int aux_buffer; /* which aux buffer was affected */ + int x, y; + int width, height; + int count; /* if nonzero, at least this many more */ +} GLXPbufferClobberEvent; +typedef union __GLXEvent { + GLXPbufferClobberEvent glxpbufferclobber; + long pad[24]; +} GLXEvent; #ifdef __cplusplus } diff --git a/xc/include/GL/glxtokens.h b/xc/include/GL/glxtokens.h index 5a3e219c3..4efa20a71 100644 --- a/xc/include/GL/glxtokens.h +++ b/xc/include/GL/glxtokens.h @@ -1,26 +1,38 @@ #ifndef __GLX_glxtokens_h__ #define __GLX_glxtokens_h__ -/* $XFree86: xc/include/GL/glxtokens.h,v 1.3 2000/02/15 07:13:24 martin Exp $ */ /* -** The contents of this file are subject to the GLX Public License Version 1.0 -** (the "License"). You may not use this file except in compliance with the -** License. You may obtain a copy of the License at Silicon Graphics, Inc., -** attn: Legal Services, 2011 N. Shoreline Blvd., Mountain View, CA 94043 -** or at http://www.sgi.com/software/opensource/glx/license.html. -** -** Software distributed under the License is distributed on an "AS IS" -** basis. ALL WARRANTIES ARE DISCLAIMED, INCLUDING, WITHOUT LIMITATION, ANY -** IMPLIED WARRANTIES OF MERCHANTABILITY, OF FITNESS FOR A PARTICULAR -** PURPOSE OR OF NON- INFRINGEMENT. See the License for the specific -** language governing rights and limitations under the License. -** -** The Original Software is GLX version 1.2 source code, released February, -** 1999. The developer of the Original Software is Silicon Graphics, Inc. -** Those portions of the Subject Software created by Silicon Graphics, Inc. -** are Copyright (c) 1991-9 Silicon Graphics, Inc. All Rights Reserved. -** -** $SGI$ +** License Applicability. Except to the extent portions of this file are +** made subject to an alternative license as permitted in the SGI Free +** Software License B, Version 1.0 (the "License"), the contents of this +** file are subject only to the provisions of the License. You may not use +** this file except in compliance with the License. You may obtain a copy +** of the License at Silicon Graphics, Inc., attn: Legal Services, 1600 +** Amphitheatre Parkway, Mountain View, CA 94043-1351, or at: +** +** http://oss.sgi.com/projects/FreeB +** +** Note that, as provided in the License, the Software is distributed on an +** "AS IS" basis, with ALL EXPRESS AND IMPLIED WARRANTIES AND CONDITIONS +** DISCLAIMED, INCLUDING, WITHOUT LIMITATION, ANY IMPLIED WARRANTIES AND +** CONDITIONS OF MERCHANTABILITY, SATISFACTORY QUALITY, FITNESS FOR A +** PARTICULAR PURPOSE, AND NON-INFRINGEMENT. +** +** Original Code. The Original Code is: OpenGL Sample Implementation, +** Version 1.2.1, released January 26, 2000, developed by Silicon Graphics, +** Inc. The Original Code is Copyright (c) 1991-2000 Silicon Graphics, Inc. +** Copyright in any portions created by third parties is as indicated +** elsewhere herein. All Rights Reserved. +** +** Additional Notice Provisions: The application programming interfaces +** established by SGI in conjunction with the Original Code are The +** OpenGL(R) Graphics System: A Specification (Version 1.2.1), released +** April 1, 1999; The OpenGL(R) Graphics System Utility Library (Version +** 1.3), released November 4, 1998; and OpenGL(R) Graphics with the X +** Window System(R) (Version 1.3), released October 19, 1998. This software +** was created using the OpenGL(R) version 1.2.1 Sample Implementation +** published by SGI, but has not been independently verified as being +** compliant with the OpenGL(R) version 1.2.1 Specification. */ #ifdef __cplusplus @@ -29,9 +41,10 @@ extern "C" { #define GLX_VERSION_1_1 1 #define GLX_VERSION_1_2 1 +#define GLX_VERSION_1_3 1 /* -** Names for attributes to glXGetConfig. +** Visual Config Attributes (glXGetConfig, glXGetFBConfigAttrib) */ #define GLX_USE_GL 1 /* support GLX rendering */ #define GLX_BUFFER_SIZE 2 /* depth of the color buffer */ @@ -39,7 +52,7 @@ extern "C" { #define GLX_RGBA 4 /* true if RGBA mode */ #define GLX_DOUBLEBUFFER 5 /* double buffering supported */ #define GLX_STEREO 6 /* stereo buffering supported */ -#define GLX_AUX_BUFFERS 7 /* number of aux buffers */ +#define GLX_AUX_BUFFERS 7 /* number of aux buffers */ #define GLX_RED_SIZE 8 /* number of red component bits */ #define GLX_GREEN_SIZE 9 /* number of green component bits */ #define GLX_BLUE_SIZE 10 /* number of blue component bits */ @@ -50,6 +63,25 @@ extern "C" { #define GLX_ACCUM_GREEN_SIZE 15 /* number of green accum bits */ #define GLX_ACCUM_BLUE_SIZE 16 /* number of blue accum bits */ #define GLX_ACCUM_ALPHA_SIZE 17 /* number of alpha accum bits */ +/* +** FBConfig-specific attributes +*/ +#define GLX_X_VISUAL_TYPE 0x22 +#define GLX_CONFIG_CAVEAT 0x20 /* Like visual_info VISUAL_CAVEAT_EXT */ +#define GLX_TRANSPARENT_TYPE 0x23 +#define GLX_TRANSPARENT_INDEX_VALUE 0x24 +#define GLX_TRANSPARENT_RED_VALUE 0x25 +#define GLX_TRANSPARENT_GREEN_VALUE 0x26 +#define GLX_TRANSPARENT_BLUE_VALUE 0x27 +#define GLX_TRANSPARENT_ALPHA_VALUE 0x28 +#define GLX_DRAWABLE_TYPE 0x8010 +#define GLX_RENDER_TYPE 0x8011 +#define GLX_X_RENDERABLE 0x8012 +#define GLX_FBCONFIG_ID 0x8013 +#define GLX_MAX_PBUFFER_WIDTH 0x8016 +#define GLX_MAX_PBUFFER_HEIGHT 0x8017 +#define GLX_MAX_PBUFFER_PIXELS 0x8018 +#define GLX_VISUAL_ID 0x800B /* ** Error return values from glXGetConfig. Success is indicated by @@ -59,9 +91,85 @@ extern "C" { #define GLX_BAD_ATTRIBUTE 2 /* attribute to get is bad */ #define GLX_NO_EXTENSION 3 /* no glx extension on server */ #define GLX_BAD_VISUAL 4 /* visual # not known by GLX */ -#define GLX_BAD_CONTEXT 5 -#define GLX_BAD_VALUE 6 -#define GLX_BAD_ENUM 7 +#define GLX_BAD_CONTEXT 5 /* returned only by import_context EXT? */ +#define GLX_BAD_VALUE 6 /* returned only by glXSwapIntervalSGI? */ +#define GLX_BAD_ENUM 7 /* unused? */ + +/* FBConfig attribute values */ + +/* +** Generic "don't care" value for glX ChooseFBConfig attributes (except +** GLX_LEVEL) +*/ +#define GLX_DONT_CARE 0xFFFFFFFF + +/* GLX_RENDER_TYPE bits */ +#define GLX_RGBA_BIT 0x00000001 +#define GLX_COLOR_INDEX_BIT 0x00000002 + +/* GLX_DRAWABLE_TYPE bits */ +#define GLX_WINDOW_BIT 0x00000001 +#define GLX_PIXMAP_BIT 0x00000002 +#define GLX_PBUFFER_BIT 0x00000004 + +/* GLX_CONFIG_CAVEAT attribute values */ +#define GLX_NONE 0x8000 +#define GLX_SLOW_CONFIG 0x8001 +#define GLX_NON_CONFORMANT_CONFIG 0x800D + +/* GLX_X_VISUAL_TYPE attribute values */ +#define GLX_TRUE_COLOR 0x8002 +#define GLX_DIRECT_COLOR 0x8003 +#define GLX_PSEUDO_COLOR 0x8004 +#define GLX_STATIC_COLOR 0x8005 +#define GLX_GRAY_SCALE 0x8006 +#define GLX_STATIC_GRAY 0x8007 + +/* GLX_TRANSPARENT_TYPE attribute values */ +/* #define GLX_NONE 0x8000 */ +#define GLX_TRANSPARENT_RGB 0x8008 +#define GLX_TRANSPARENT_INDEX 0x8009 + +/* glXCreateGLXPbuffer attributes */ +#define GLX_PRESERVED_CONTENTS 0x801B +#define GLX_LARGEST_PBUFFER 0x801C +#define GLX_PBUFFER_HEIGHT 0x8040 /* New for GLX 1.3 */ +#define GLX_PBUFFER_WIDTH 0x8041 /* New for GLX 1.3 */ + +/* glXQueryGLXPBuffer attributes */ +#define GLX_WIDTH 0x801D +#define GLX_HEIGHT 0x801E +#define GLX_EVENT_MASK 0x801F + +/* glXCreateNewContext render_type attribute values */ +#define GLX_RGBA_TYPE 0x8014 +#define GLX_COLOR_INDEX_TYPE 0x8015 + +/* glXQueryContext attributes */ +/* #define GLX_FBCONFIG_ID 0x8013 */ +/* #define GLX_RENDER_TYPE 0x8011 */ +#define GLX_SCREEN 0x800C + +/* glXSelectEvent event mask bits */ +#define GLX_PBUFFER_CLOBBER_MASK 0x08000000 + +/* GLXPbufferClobberEvent event_type values */ +#define GLX_DAMAGED 0x8020 +#define GLX_SAVED 0x8021 + +/* GLXPbufferClobberEvent draw_type values */ +#define GLX_WINDOW 0x8022 +#define GLX_PBUFFER 0x8023 + +/* GLXPbufferClobberEvent buffer_mask bits */ +#define GLX_FRONT_LEFT_BUFFER_BIT 0x00000001 +#define GLX_FRONT_RIGHT_BUFFER_BIT 0x00000002 +#define GLX_BACK_LEFT_BUFFER_BIT 0x00000004 +#define GLX_BACK_RIGHT_BUFFER_BIT 0x00000008 +#define GLX_AUX_BUFFERS_BIT 0x00000010 +#define GLX_DEPTH_BUFFER_BIT 0x00000020 +#define GLX_STENCIL_BUFFER_BIT 0x00000040 +#define GLX_ACCUM_BUFFER_BIT 0x00000080 /* ** Extension return values from glXGetConfig. These are also @@ -71,27 +179,27 @@ extern "C" { #define GLX_X_VISUAL_TYPE_EXT 0x22 /* visual_info extension type */ #define GLX_TRANSPARENT_TYPE_EXT 0x23 /* visual_info extension */ #define GLX_TRANSPARENT_INDEX_VALUE_EXT 0x24 /* visual_info extension */ -#define GLX_TRANSPARENT_RED_VALUE_EXT 0x25 /* visual_info extension */ +#define GLX_TRANSPARENT_RED_VALUE_EXT 0x25 /* visual_info extension */ #define GLX_TRANSPARENT_GREEN_VALUE_EXT 0x26 /* visual_info extension */ -#define GLX_TRANSPARENT_BLUE_VALUE_EXT 0x27 /* visual_info extension */ +#define GLX_TRANSPARENT_BLUE_VALUE_EXT 0x27 /* visual_info extension */ #define GLX_TRANSPARENT_ALPHA_VALUE_EXT 0x28 /* visual_info extension */ /* Property values for visual_type */ -#define GLX_TRUE_COLOR_EXT 0x8002 -#define GLX_DIRECT_COLOR_EXT 0x8003 -#define GLX_PSEUDO_COLOR_EXT 0x8004 -#define GLX_STATIC_COLOR_EXT 0x8005 -#define GLX_GRAY_SCALE_EXT 0x8006 -#define GLX_STATIC_GRAY_EXT 0x8007 +#define GLX_TRUE_COLOR_EXT 0x8002 +#define GLX_DIRECT_COLOR_EXT 0x8003 +#define GLX_PSEUDO_COLOR_EXT 0x8004 +#define GLX_STATIC_COLOR_EXT 0x8005 +#define GLX_GRAY_SCALE_EXT 0x8006 +#define GLX_STATIC_GRAY_EXT 0x8007 /* Property values for transparent pixel */ -#define GLX_NONE_EXT 0x8000 -#define GLX_TRANSPARENT_RGB_EXT 0x8008 -#define GLX_TRANSPARENT_INDEX_EXT 0x8009 +#define GLX_NONE_EXT 0x8000 +#define GLX_TRANSPARENT_RGB_EXT 0x8008 +#define GLX_TRANSPARENT_INDEX_EXT 0x8009 /* Property values for visual_rating */ -#define GLX_VISUAL_CAVEAT_EXT 0x20 /* visual_rating extension type */ -#define GLX_SLOW_VISUAL_EXT 0x8001 +#define GLX_VISUAL_CAVEAT_EXT 0x20 /* visual_rating extension type */ +#define GLX_SLOW_VISUAL_EXT 0x8001 #define GLX_NON_CONFORMANT_VISUAL_EXT 0x800D /* @@ -109,11 +217,12 @@ extern "C" { #define GLX_SCREEN_EXT 0x800C /* screen number */ /* GLX Extension Strings */ -#define GLX_EXT_import_context 1 -#define GLX_EXT_visual_info 1 -#define GLX_EXT_visual_rating 1 +#define GLX_EXT_import_context 1 +#define GLX_EXT_visual_info 1 +#define GLX_EXT_visual_rating 1 #define GLX_ARB_get_proc_address 1 + #ifdef __cplusplus } #endif diff --git a/xc/lib/GL/Imakefile b/xc/lib/GL/Imakefile index a185089e4..79a9c4b7d 100644 --- a/xc/lib/GL/Imakefile +++ b/xc/lib/GL/Imakefile @@ -11,21 +11,20 @@ XCOMM $XFree86: xc/lib/GL/Imakefile,v 1.16 2000/03/02 16:07:30 martin Exp $ #define DoDebugLib DebugLibGlx #define DoProfileLib ProfileLibGlx -#if BuildXF86DRI -DRIDIRS = dri -MESADIRS = mesa/dri mesa/include/GL mesa/src -#endif -SUBDIRS = glx $(DRIDIRS) $(MESADIRS) + LIBNAME = GL + SOREV = $(SOGLREV) #ifdef SharedGLReqs REQUIREDLIBS = SharedGLReqs #endif -MakeSubdirs($(SUBDIRS)) -DependSubdirs($(SUBDIRS)) +#if 0 + LOWSRC = lowpc.c + LOWOBJ = lowpc.o - LIBNAME = GL - SOREV = $(SOGLREV) + HISRC = highpc.c + HIOBJ = highpc.o +#endif GLXOBJS = glx/?*.o GLXUOBJS = glx/unshared/?*.o @@ -40,19 +39,17 @@ DependSubdirs($(SUBDIRS)) DRIPOBJS = dri/profiled/XF86dri.o dri/profiled/dri_glx.o DRIDONES = dri/DONE -#if !GlxUseSGISI -#if GlxBuiltInGamma DRMOBJS = dri/drm/?*.o DRMUOBJS = dri/drm/unshared/?*.o DRMDOBJS = dri/drm/debugger/?*.o DRMPOBJS = dri/drm/profiled/?*.o DRMDONES = dri/drm/DONE - GAMMAOBJS = mesa/src/drv/gamma/?*.o - GAMMAUOBJS = mesa/src/drv/gamma/unshared/?*.o - GAMMADOBJS = mesa/src/drv/gamma/debugger/?*.o - GAMMAPOBJS = mesa/src/drv/gamma/profiled/?*.o - GAMMADONES = mesa/src/drv/gamma/DONE + MESAOBJS = mesa/src/?*.o mesa/src/X86/?*.o + MESAUOBJS = mesa/src/unshared/?*.o mesa/src/X86/unshared/?*.o + MESADOBJS = mesa/src/debugger/?*.o mesa/src/X86/debugger/?*.o + MESAPOBJS = mesa/src/profiled/?*.o mesa/src/X86/profiled/?*.o + MESADONES = mesa/src/DONE mesa/src/X86/DONE DRIMESAOBJS = mesa/dri/?*.o DRIMESAUOBJS = mesa/dri/unshared/?*.o @@ -60,18 +57,34 @@ DRIMESADOBJS = mesa/dri/debugger/?*.o DRIMESAPOBJS = mesa/dri/profiled/?*.o DRIMESADONES = mesa/dri/DONE + COMMONOBJS = mesa/src/drv/common/?*.o + COMMONUOBJS = mesa/src/drv/common/unshared/?*.o + COMMONDOBJS = mesa/src/drv/common/debugger/?*.o + COMMONPOBJS = mesa/src/drv/common/profiled/?*.o + COMMONDONES = mesa/src/drv/common/DONE + + +#if GlxUseSGISI + +XCOMM nothing + +#elif GlxBuiltInGamma + + GAMMAOBJS = mesa/src/drv/gamma/?*.o + GAMMAUOBJS = mesa/src/drv/gamma/unshared/?*.o + GAMMADOBJS = mesa/src/drv/gamma/debugger/?*.o + GAMMAPOBJS = mesa/src/drv/gamma/profiled/?*.o + GAMMADONES = mesa/src/drv/gamma/DONE + DRVOBJS = $(GAMMAOBJS) $(MESAOBJS) $(DRIMESAOBJS) $(DRMOBJS) DRVUOBJS = $(GAMMAUOBJS) $(MESAUOBJS) $(DRIMESAUOBJS) $(DRMUOBJS) DRVDOBJS = $(GAMMADOBJS) $(MESADOBJS) $(DRIMESADOBJS) $(DRMDOBJS) DRVPOBJS = $(GAMMAPOBJS) $(MESAPOBJS) $(DRIMESAPOBJS) $(DRMPOBJS) DRVDONES = $(GAMMADONES) $(MESADONES) $(DRIMESADONES) $(DRMDONES) + GLXSUBDIRS = glx dri mesa/dri mesa/include/GL mesa/src + #elif GlxBuiltInTdfx - DRMOBJS = dri/drm/?*.o - DRMUOBJS = dri/drm/unshared/?*.o - DRMDOBJS = dri/drm/debugger/?*.o - DRMPOBJS = dri/drm/profiled/?*.o - DRMDONES = dri/drm/DONE TDFXOBJS = mesa/src/drv/tdfx/?*.o TDFXUOBJS = mesa/src/drv/tdfx/unshared/?*.o @@ -79,51 +92,131 @@ DRIMESADONES = mesa/dri/DONE TDFXPOBJS = mesa/src/drv/tdfx/profiled/?*.o TDFXDONES = mesa/src/drv/tdfx/DONE - MESAOBJS = mesa/src/?*.o mesa/src/X86/?*.o - MESAUOBJS = mesa/src/unshared/?*.o mesa/src/X86/unshared/?*.o - MESADOBJS = mesa/src/debugger/?*.o mesa/src/X86/debugger/?*.o - MESAPOBJS = mesa/src/profiled/?*.o mesa/src/X86/profiled/?*.o - MESADONES = mesa/src/DONE mesa/src/X86/DONE - - DRIMESAOBJS = mesa/dri/?*.o -DRIMESAUOBJS = mesa/dri/unshared/?*.o -DRIMESADOBJS = mesa/dri/debugger/?*.o -DRIMESAPOBJS = mesa/dri/profiled/?*.o -DRIMESADONES = mesa/dri/DONE - DRVOBJS = $(TDFXOBJS) $(MESAOBJS) $(DRIMESAOBJS) $(DRMOBJS) DRVUOBJS = $(TDFXUOBJS) $(MESAUOBJS) $(DRIMESAUOBJS) $(DRMUOBJS) DRVDOBJS = $(TDFXDOBJS) $(MESADOBJS) $(DRIMESADOBJS) $(DRMDOBJS) DRVPOBJS = $(TDFXPOBJS) $(MESAPOBJS) $(DRIMESAPOBJS) $(DRMPOBJS) DRVDONES = $(TDFXDONES) $(MESADONES) $(DRIMESADONES) $(DRMDONES) - REQUIREDLIBS += -lglide3x +REQUIREDLIBS += -lglide3x + + GLXSUBDIRS = glx dri mesa/dri mesa/include/GL mesa/src + +#elif GlxBuiltInI810 + + I810OBJS = mesa/src/drv/i810/?*.o + I810UOBJS = mesa/src/drv/i810/unshared/?*.o + I810DOBJS = mesa/src/drv/i810/debugger/?*.o + I810POBJS = mesa/src/drv/i810/profiled/?*.o + I810DONES = mesa/src/drv/i810/DONE + + DRVOBJS = $(I810OBJS) $(COMMONOBJS) $(MESAOBJS) $(DRIMESAOBJS) $(DRMOBJS) + DRVUOBJS = $(I810UOBJS) $(COMMONUOBJS) $(MESAUOBJS) $(DRIMESAUOBJS) $(DRMUOBJS) + DRVDOBJS = $(I810DOBJS) $(COMMONDOBJS) $(MESADOBJS) $(DRIMESADOBJS) $(DRMDOBJS) + DRVPOBJS = $(I810POBJS) $(COMMONPOBJS) $(MESAPOBJS) $(DRIMESAPOBJS) $(DRMPOBJS) + DRVDONES = $(I810DONES) $(COMMONDONES) $(MESADONES) $(DRIMESADONES) $(DRMDONES) + + GLXSUBDIRS = glx dri mesa/dri mesa/include/GL mesa/src + +#elif GlxBuiltInMga + + MGAOBJS = mesa/src/drv/mga/?*.o + MGAUOBJS = mesa/src/drv/mga/unshared/?*.o + MGADOBJS = mesa/src/drv/mga/debugger/?*.o + MGAPOBJS = mesa/src/drv/mga/profiled/?*.o + MGADONES = mesa/src/drv/mga/DONE + + DRVOBJS = $(MGAOBJS) $(COMMONOBJS) $(MESAOBJS) $(DRIMESAOBJS) $(DRMOBJS) + DRVUOBJS = $(MGAUOBJS) $(COMMONUOBJS) $(MESAUOBJS) $(DRIMESAUOBJS) $(DRMUOBJS) + DRVDOBJS = $(MGADOBJS) $(COMMONDOBJS) $(MESADOBJS) $(DRIMESADOBJS) $(DRMDOBJS) + DRVPOBJS = $(MGAPOBJS) $(COMMONPOBJS) $(MESAPOBJS) $(DRIMESAPOBJS) $(DRMPOBJS) + DRVDONES = $(MGADONES) $(COMMONDONES) $(MESADONES) $(DRIMESADONES) $(DRMDONES) + + GLXSUBDIRS = glx dri mesa/dri mesa/include/GL mesa/src + +#elif GlxBuiltInR128 + + R128OBJS = mesa/src/drv/r128/?*.o + R128UOBJS = mesa/src/drv/r128/unshared/?*.o + R128DOBJS = mesa/src/drv/r128/debugger/?*.o + R128POBJS = mesa/src/drv/r128/profiled/?*.o + R128DONES = mesa/src/drv/r128/DONE + + DRVOBJS = $(R128OBJS) $(MESAOBJS) $(DRIMESAOBJS) $(DRMOBJS) + DRVUOBJS = $(R128UOBJS) $(MESAUOBJS) $(DRIMESAUOBJS) $(DRMUOBJS) + DRVDOBJS = $(R128DOBJS) $(MESADOBJS) $(DRIMESADOBJS) $(DRMDOBJS) + DRVPOBJS = $(R128POBJS) $(MESAPOBJS) $(DRIMESAPOBJS) $(DRMPOBJS) + DRVDONES = $(R128DONES) $(MESADONES) $(DRIMESADONES) $(DRMDONES) + + GLXSUBDIRS = glx dri mesa/dri mesa/include/GL mesa/src + #elif GlxBuiltInMesa + #ifndef GlxDriverUsesMesa - DRVOBJS = mesa/src/?*.o mesa/src/X/?*.o - DRVUOBJS = mesa/src/unshared/?*.o mesa/src/X/unshared/?*.o - DRVDOBJS = mesa/src/debugger/?*.o mesa/src/X/debugger/?*.o - DRVPOBJS = mesa/src/profiled/?*.o mesa/src/X/profiled/?*.o - DRVDONES = mesa/src/DONE mesa/src/X/DONE + DRVOBJS = mesa/src/?*.o + DRVUOBJS = mesa/src/unshared/?*.o + DRVDOBJS = mesa/src/debugger/?*.o + DRVPOBJS = mesa/src/profiled/?*.o + DRVDONES = mesa/src/DONE + + GLXSUBDIRS = glx dri mesa/dri mesa/include/GL mesa/src #endif + +#else + +XCOMM No built-in drivers. This is the usual case. +GLXSUBDIRS = glx dri + #endif + +#else + +XCOMM BuildXF86DRI was not defined. Just build an indirect-only libGL. +GLXSUBDIRS = glx + #endif + + + + +#if BuildXF86DRI +SUBDIRS = $(GLXSUBDIRS) +OTHERSUBDIRS = mesa/dri mesa/include/GL mesa/src +#else +SUBDIRS = glx #endif +MakeSubdirs($(SUBDIRS)) +MakefileSubdirs($(OTHERSUBDIRS)) +DependSubdirs($(SUBDIRS) $(OTHERSUBDIRS)) + + + #ifdef OS2Architecture OBJS = $(LIBNAME).a #else - OBJS = $(GLXOBJS) $(DRIOBJS) $(DRVOBJS) + OBJS = $(LOWOBJ) $(GLXOBJS) $(DRIOBJS) $(DRVOBJS) $(HIOBJ) #endif + #if HasSharedLibraries +#if 1 UOBJS = $(GLXUOBJS) $(DRIUOBJS) $(DRVUOBJS) #else UOBJS = $(OBJS) #endif +#else + UOBJS = $(OBJS) +#endif + DOBJS = $(GLXDOBJS) $(DRIDOBJS) $(DRVDOBJS) POBJS = $(GLXPOBJS) $(DRIPOBJS) $(DRVPOBJS) DONES = $(GLXDONES) $(DRIDONES) $(DRVDONES) +#if 0 +SubdirLibraryRule(highpc.o lowpc.o) +NormalLintTarget(highpc.c lowpc.c) +#endif + #if LocalThreads THREADOBJS = $(THREADS_LIBS) #endif @@ -134,19 +227,32 @@ DRIMESADONES = mesa/dri/DONE #define _LinkBuildLibrary(lib) LinkBuildLibrary(lib) #if NormalLibGlx -NormalDepLibraryTarget($(LIBNAME),$(SUBDIRS) $(DONES),$(UOBJS)) +NormalDepLibraryTarget($(LIBNAME),$(GLXSUBDIRS) $(DONES),$(UOBJS)) InstallLibrary($(LIBNAME),$(USRLIBDIR)) #endif #if SharedLibGlx -SharedDepLibraryTarget($(LIBNAME),$(SOREV),$(SUBDIRS) $(DONES),$(OBJS) $(THREADOBJS),.,.) +SharedDepLibraryTarget($(LIBNAME),$(SOREV),$(GLXSUBDIRS) $(DONES),$(OBJS) $(THREADOBJS),.,.) InstallSharedLibrary($(LIBNAME),$(SOREV),$(SHLIBDIR)) #endif #if DebugLibGlx -DebuggedDepLibraryTarget($(LIBNAME),$(SUBDIRS) $(DONES),$(DOBJS)) +DebuggedDepLibraryTarget($(LIBNAME),$(GLXSUBDIRS) $(DONES),$(DOBJS)) InstallLibrary($(LIBNAME)_d,$(USRLIBDIR)) #endif #if ProfileLibGlx -ProfiledDepLibraryTarget($(LIBNAME),$(SUBDIRS) $(DONES),$(POBJS)) +ProfiledDepLibraryTarget($(LIBNAME),$(GLXSUBDIRS) $(DONES),$(POBJS)) InstallLibrary($(LIBNAME)_p,$(USRLIBDIR)) #endif + + +XCOMM libGL has now been made, continue with building the drivers. + +#if BuildXF86DRI && !GlxBuiltInGamma && !GlxBuiltInTdfx && !GlxBuiltInI810 && !GlxBuiltInMga && !GlxBuiltInMesa + +DRIVERSUBDIRS = mesa/dri mesa/include/GL mesa/src + +MakeSubdirs($(DRIVERSUBDIRS)) +DependSubdirs($(DRIVERSUBDIRS)) +InstallSubdirs($(DRIVERSUBDIRS)) + +#endif diff --git a/xc/lib/GL/dri/drm/Imakefile b/xc/lib/GL/dri/drm/Imakefile index 55181daed..42b6202d6 100644 --- a/xc/lib/GL/dri/drm/Imakefile +++ b/xc/lib/GL/dri/drm/Imakefile @@ -12,8 +12,10 @@ ALLOC_DEFINES = -DMALLOC_0_RETURNS_NULL DEFINES = $(ALLOC_DEFINES) INCLUDES = -I$(XLIBSRC) -I$(EXTINCSRC) -I. - SRCS = xf86drm.c xf86drmHash.c xf86drmRandom.c xf86drmSL.c - OBJS = xf86drm.o xf86drmHash.o xf86drmRandom.o xf86drmSL.o + SRCS = xf86drm.c xf86drmHash.c xf86drmRandom.c xf86drmSL.c \ + xf86drmR128.c + OBJS = xf86drm.o xf86drmHash.o xf86drmRandom.o xf86drmSL.o \ + xf86drmR128.o #if defined(LinuxArchitecture) OS_SUBDIR = linux @@ -30,6 +32,9 @@ LinkSourceFile(xf86drm.h,$(XF86OSSRC)) LinkSourceFile(drm.h,$(XF86OSSRC)/$(OS_SUBDIR)/drm/kernel) LinkSourceFile(mga_drm.h,$(XF86OSSRC)/$(OS_SUBDIR)/drm/kernel) LinkSourceFile(i810_drm.h,$(XF86OSSRC)/$(OS_SUBDIR)/drm/kernel) +LinkSourceFile(xf86drmR128.c,$(XF86OSSRC)/$(OS_SUBDIR)/drm) +LinkSourceFile(xf86drmR128.h,$(XF86OSSRC)) +LinkSourceFile(r128_drm.h,$(XF86OSSRC)/$(OS_SUBDIR)/drm/kernel) #include <Library.tmpl> diff --git a/xc/lib/GL/mesa/dri/dri_mesa.c b/xc/lib/GL/mesa/dri/dri_mesa.c index 08f3dfcfd..b679b41a4 100644 --- a/xc/lib/GL/mesa/dri/dri_mesa.c +++ b/xc/lib/GL/mesa/dri/dri_mesa.c @@ -29,7 +29,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. /* * Authors: * Kevin E. Martin <kevin@precisioninsight.com> - * Brian Paul <brian@precisioninsight.com> + * Brian E. Paul <brian@precisioninsight.com> */ #ifdef GLX_DIRECT_RENDERING @@ -39,16 +39,12 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include <Xext.h> #include <extutil.h> #include "glxclient.h" -#include "GL/xmesa.h" #include "xf86dri.h" #include "sarea.h" #include "dri_mesaint.h" #include "dri_xmesaapi.h" - - -#if XMESA_MAJOR_VERSION != 3 || XMESA_MINOR_VERSION != 3 -#error using wrong version of Mesa (need 3.3) -#endif +#include "../src/context.h" +#include "../src/mmath.h" /* Context binding */ @@ -109,6 +105,8 @@ static __DRIdrawable *__driMesaFindDrawable(GLXDrawable draw) return pdraw; } +#if 0 +/* not used yet */ static void __driMesaRemoveDrawable(__DRIdrawable *pdraw) { int retcode; @@ -122,23 +120,22 @@ static void __driMesaRemoveDrawable(__DRIdrawable *pdraw) drmHashDelete(drawHash, pdp->draw); } } +#endif /*****************************************************************/ -static void driMesaInitAPI(__XMESAapi *XMesaAPI) +static void driMesaInitAPI(__MesaAPI *MesaAPI) { - XMesaAPI->InitDriver = XMesaInitDriver; - XMesaAPI->ResetDriver = XMesaResetDriver; - XMesaAPI->CreateVisual = XMesaCreateVisual; - XMesaAPI->DestroyVisual = XMesaDestroyVisual; - XMesaAPI->CreateContext = XMesaCreateContext; - XMesaAPI->DestroyContext = XMesaDestroyContext; - XMesaAPI->CreateWindowBuffer = XMesaCreateWindowBuffer; - XMesaAPI->CreatePixmapBuffer = XMesaCreatePixmapBuffer; - XMesaAPI->DestroyBuffer = XMesaDestroyBuffer; - XMesaAPI->SwapBuffers = XMesaSwapBuffers; - XMesaAPI->MakeCurrent = XMesaMakeCurrent; - XMesaAPI->UnbindContext = XMesaUnbindContext; + MesaAPI->InitDriver = XMesaInitDriver; + MesaAPI->ResetDriver = XMesaResetDriver; + MesaAPI->CreateVisual = XMesaCreateVisual; + MesaAPI->CreateContext = XMesaCreateContext; + MesaAPI->DestroyContext = XMesaDestroyContext; + MesaAPI->CreateWindowBuffer = XMesaCreateWindowBuffer; + MesaAPI->CreatePixmapBuffer = XMesaCreatePixmapBuffer; + MesaAPI->SwapBuffers = XMesaSwapBuffers; + MesaAPI->MakeCurrent = XMesaMakeCurrent; + MesaAPI->UnbindContext = XMesaUnbindContext; } /*****************************************************************/ @@ -176,7 +173,7 @@ static Bool driMesaUnbindContext(Display *dpy, int scrn, } /* Unbind Mesa's drawable from Mesa's context */ - (*psp->XMesaAPI.UnbindContext)(pcp->xm_ctx); + (*psp->MesaAPI.UnbindContext)(pcp); if (pdp->refcount == 0) { /* ERROR!!! */ @@ -279,7 +276,7 @@ static Bool driMesaBindContext(Display *dpy, int scrn, } /* Bind Mesa's drawable to Mesa's context */ - (*psp->XMesaAPI.MakeCurrent)(pcp->xm_ctx, pdp->xm_buf); + (*psp->MesaAPI.MakeCurrent)(pcp, pdp, pdp); return GL_TRUE; } @@ -307,14 +304,26 @@ void driMesaUpdateDrawableInfo(Display *dpy, int scrn, Xfree(pdp->pClipRects); } + if (pdp->pBackClipRects) { + Xfree(pdp->pBackClipRects); + } + + DRM_SPINUNLOCK(&psp->pSAREA->drawable_lock, psp->drawLockID); if (!XF86DRIGetDrawableInfo(dpy, scrn, pdp->draw, &pdp->index, &pdp->lastStamp, &pdp->x, &pdp->y, &pdp->w, &pdp->h, - &pdp->numClipRects, &pdp->pClipRects)) { + &pdp->numClipRects, &pdp->pClipRects, + &pdp->backX, + &pdp->backY, + &pdp->numBackClipRects, + &pdp->pBackClipRects + )) { pdp->numClipRects = 0; pdp->pClipRects = NULL; + pdp->numBackClipRects = 0; + pdp->pBackClipRects = 0; /* ERROR!!! */ } @@ -332,7 +341,7 @@ static void *driMesaCreateDrawable(Display *dpy, int scrn, GLXDrawable draw, __DRIscreenPrivate *psp; __DRIdrawablePrivate *pdp; int i; - XMesaVisual xm_vis = NULL; + GLvisual *mesaVis = NULL; pdp = (__DRIdrawablePrivate *)Xmalloc(sizeof(__DRIdrawablePrivate)); if (!pdp) { @@ -354,7 +363,9 @@ static void *driMesaCreateDrawable(Display *dpy, int scrn, GLXDrawable draw, pdp->w = 0; pdp->h = 0; pdp->numClipRects = 0; + pdp->numBackClipRects = 0; pdp->pClipRects = NULL; + pdp->pBackClipRects = NULL; pDRIScreen = __glXFindDRIScreen(dpy, scrn); pdp->driScreenPriv = psp = (__DRIscreenPrivate *)pDRIScreen->private; @@ -363,20 +374,19 @@ static void *driMesaCreateDrawable(Display *dpy, int scrn, GLXDrawable draw, for (i = 0; i < psp->numVisuals; i++) { if (vid == psp->visuals[i].vid) { - xm_vis = psp->visuals[i].xm_vis; + mesaVis = psp->visuals[i].mesaVisual; break; } } - if (1 /* NOT_DONE: Determine if it is a pixmap or not */) { - pdp->xm_buf = (*psp->XMesaAPI.CreateWindowBuffer)(xm_vis, draw, pdp); - } else { - XMesaVisual xm_vis = NULL; - XMesaColormap cmap = 0; - pdp->xm_buf = (*psp->XMesaAPI.CreatePixmapBuffer)(xm_vis, draw, cmap, - pdp); + /* XXX pixmap rendering not implemented yet */ + if (1) { + pdp->mesaBuffer = (*psp->MesaAPI.CreateWindowBuffer)(dpy, psp, pdp, mesaVis); + } + else { + pdp->mesaBuffer = (*psp->MesaAPI.CreatePixmapBuffer)(dpy, psp, pdp, mesaVis); } - if (!pdp->xm_buf) { + if (!pdp->mesaBuffer) { (void)XF86DRIDestroyDrawable(dpy, scrn, pdp->draw); Xfree(pdp); return NULL; @@ -402,7 +412,7 @@ static void driMesaSwapBuffers(Display *dpy, void *private) __DRIdrawablePrivate *pdp = (__DRIdrawablePrivate *)private; __DRIscreenPrivate *psp = pdp->driScreenPriv; - (*psp->XMesaAPI.SwapBuffers)(pdp->xm_buf); + (*psp->MesaAPI.SwapBuffers)(pdp); } static void driMesaDestroyDrawable(Display *dpy, void *private) @@ -412,7 +422,7 @@ static void driMesaDestroyDrawable(Display *dpy, void *private) int scrn = psp->myNum; if (pdp) { - (*psp->XMesaAPI.DestroyBuffer)(pdp->xm_buf); + gl_destroy_framebuffer(pdp->mesaBuffer); (void)XF86DRIDestroyDrawable(dpy, scrn, pdp->draw); if (pdp->pClipRects) Xfree(pdp->pClipRects); @@ -427,8 +437,6 @@ static void *driMesaCreateContext(Display *dpy, XVisualInfo *vis, void *shared, { __DRIcontextPrivate *pcp; __DRIcontextPrivate *pshare = (__DRIcontextPrivate *)shared; - XMesaContext shared_xm_ctx = (pshare ? - pshare->xm_ctx : (XMesaContext)NULL); __DRIscreenPrivate *psp; __DRIscreen *pDRIScreen; int i; @@ -443,7 +451,7 @@ static void *driMesaCreateContext(Display *dpy, XVisualInfo *vis, void *shared, return NULL; } psp->dummyContextPriv.driScreenPriv = psp; - psp->dummyContextPriv.xm_ctx = NULL; + psp->dummyContextPriv.mesaContext = NULL; psp->dummyContextPriv.driDrawablePriv = NULL; /* No other fields should be used! */ } @@ -453,8 +461,9 @@ static void *driMesaCreateContext(Display *dpy, XVisualInfo *vis, void *shared, return NULL; } + pcp->display = dpy; pcp->driScreenPriv = psp; - pcp->xm_ctx = NULL; + pcp->mesaContext = NULL; pcp->driDrawablePriv = NULL; if (!XF86DRICreateContext(dpy, vis->screen, vis->visual, @@ -463,12 +472,28 @@ static void *driMesaCreateContext(Display *dpy, XVisualInfo *vis, void *shared, return NULL; } - for (i = 0; i < psp->numVisuals; i++) - if (psp->visuals[i].vid == vis->visualid) - pcp->xm_ctx = (*psp->XMesaAPI.CreateContext) - (psp->visuals[i].xm_vis, shared_xm_ctx, pcp); - - if (!pcp->xm_ctx) { + for (i = 0; i < psp->numVisuals; i++) { + if (psp->visuals[i].vid == vis->visualid) { + GLvisual *mesaVis = psp->visuals[i].mesaVisual; + GLcontext *sharedMesaCtx = pshare ? pshare->mesaContext : NULL; + pcp->mesaContext = gl_create_context(mesaVis, + sharedMesaCtx, + NULL, /* set below */ + GL_TRUE); + if (pcp->mesaContext) { + /* Driver now creates its private context data */ + if ((*psp->MesaAPI.CreateContext)(dpy, mesaVis, pcp)) { + pcp->mesaContext->DriverCtx = pcp->driverPrivate; + } + else { + gl_destroy_context(pcp->mesaContext); + pcp->mesaContext = NULL; + } + } + } + } + + if (!pcp->mesaContext) { (void)XF86DRIDestroyContext(dpy, vis->screen, pcp->contextID); Xfree(pcp); return NULL; @@ -487,7 +512,8 @@ static void driMesaDestroyContext(Display *dpy, int scrn, void *private) if (pcp) { (void)XF86DRIDestroyContext(dpy, scrn, pcp->contextID); - (*pcp->driScreenPriv->XMesaAPI.DestroyContext)(pcp->xm_ctx); + (*pcp->driScreenPriv->MesaAPI.DestroyContext)(pcp); + gl_destroy_context(pcp->mesaContext); Xfree(pcp); } } @@ -565,7 +591,7 @@ static void *driMesaCreateScreen(Display *dpy, int scrn, __DRIscreen *psc, return NULL; } - driMesaInitAPI(&psp->XMesaAPI); + driMesaInitAPI(&psp->MesaAPI); if (!XF86DRIGetDeviceInfo(dpy, scrn, &hFB, @@ -627,22 +653,13 @@ static void *driMesaCreateScreen(Display *dpy, int scrn, __DRIscreen *psc, for (i = 0; i < numConfigs; i++, config++) { psp->visuals[i].vid = visinfo[i].visualid; - psp->visuals[i].xm_vis = - (*psp->XMesaAPI.CreateVisual)(dpy, - &visinfo[i], - config->rgba, - (config->alphaSize > 0), - config->doubleBuffer, - config->stereo, - GL_TRUE, /* ximage_flag */ - config->depthSize, - config->stencilSize, - config->accumRedSize, - config->level); - if (!psp->visuals[i].xm_vis) { + psp->visuals[i].mesaVisual = + (*psp->MesaAPI.CreateVisual) (dpy, psp, &visinfo[i], config); + + if (!psp->visuals[i].mesaVisual) { /* Free the visuals so far created */ while (--i >= 0) { - (*psp->XMesaAPI.DestroyVisual)(psp->visuals[i].xm_vis); + _mesa_destroy_visual(psp->visuals[i].mesaVisual); } Xfree(psp->visuals); XFree(visinfo); @@ -658,11 +675,10 @@ static void *driMesaCreateScreen(Display *dpy, int scrn, __DRIscreen *psc, XFree(visinfo); /* Initialize the screen specific GLX driver */ - if (psp->XMesaAPI.InitDriver) { - if (!(*psp->XMesaAPI.InitDriver)(psp)) { + if (psp->MesaAPI.InitDriver) { + if (!(*psp->MesaAPI.InitDriver)(psp)) { while (--psp->numVisuals >= 0) { - (*psp->XMesaAPI.DestroyVisual) - (psp->visuals[psp->numVisuals].xm_vis); + _mesa_destroy_visual(psp->visuals[psp->numVisuals].mesaVisual); } Xfree(psp->visuals); (void)drmUnmap((drmAddress)psp->pSAREA, SAREA_MAX); @@ -699,11 +715,10 @@ static void driMesaDestroyScreen(Display *dpy, int scrn, void *private) (void)XF86DRIDestroyContext(dpy, scrn, psp->dummyContextPriv.contextID); } - if (psp->XMesaAPI.ResetDriver) - (*psp->XMesaAPI.ResetDriver)(psp); + if (psp->MesaAPI.ResetDriver) + (*psp->MesaAPI.ResetDriver)(psp); while (--psp->numVisuals >= 0) { - (*psp->XMesaAPI.DestroyVisual) - (psp->visuals[psp->numVisuals].xm_vis); + _mesa_destroy_visual(psp->visuals[psp->numVisuals].mesaVisual); } Xfree(psp->visuals); (void)drmUnmap((drmAddress)psp->pSAREA, SAREA_MAX); diff --git a/xc/lib/GL/mesa/dri/dri_mesaint.h b/xc/lib/GL/mesa/dri/dri_mesaint.h index 6b64114d0..e8918724c 100644 --- a/xc/lib/GL/mesa/dri/dri_mesaint.h +++ b/xc/lib/GL/mesa/dri/dri_mesaint.h @@ -29,6 +29,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. /* * Authors: * Kevin E. Martin <kevin@precisioninsight.com> + * Brian E. Paul <brian@precisioninsight.com> * */ @@ -40,10 +41,10 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include <GL/glx.h> #include "xf86dri.h" #include "sarea.h" -#include "GL/xmesa.h" #include "dri_mesa.h" #include "dri_xmesaapi.h" + #define DRI_MESA_VALIDATE_DRAWABLE_INFO(dpy,scrn,pDrawPriv) \ do { \ if (*(pDrawPriv->pStamp) != pDrawPriv->lastStamp) { \ @@ -59,9 +60,9 @@ struct __DRIdrawablePrivateRec { drmDrawable hHWDrawable; /* - ** Mesa's private context information. This structure is opaque. + ** Mesa's private frame buffer information. This structure is opaque. */ - XMesaBuffer xm_buf; + GLframebuffer *mesaBuffer; /* ** X's drawable ID associated with this private drawable. @@ -104,6 +105,16 @@ struct __DRIdrawablePrivateRec { XF86DRIClipRectPtr pClipRects; /* + ** Information about the back and depthbuffer where different + ** from above. + */ + int backX; + int backY; + int backClipRectType; + int numBackClipRects; + XF86DRIClipRectPtr pBackClipRects; + + /* ** Pointer to context to which this drawable is currently bound. */ __DRIcontextPrivate *driContextPriv; @@ -128,7 +139,17 @@ struct __DRIcontextPrivateRec { /* ** Mesa's private context information. This structure is opaque. */ - XMesaContext xm_ctx; + GLcontext *mesaContext; + + /* + ** Device driver's private context data. This structure is opaque. + */ + void *driverPrivate; + + /* + ** This context's display pointer. + */ + Display *display; /* ** Pointer to drawable currently bound to this context. @@ -145,7 +166,7 @@ struct __DRIvisualPrivateRec { /* ** Mesa's private visual information. This structure is opaque. */ - XMesaVisual xm_vis; + GLvisual *mesaVisual; /* ** X's visual ID associated with this private visual. @@ -169,7 +190,7 @@ struct __DRIscreenPrivateRec { /* ** Function pointers associated with Mesa's GLX functions. */ - __XMESAapi XMesaAPI; + __MesaAPI MesaAPI; /* ** Core rendering library's driver version information. diff --git a/xc/lib/GL/mesa/dri/dri_xmesaapi.h b/xc/lib/GL/mesa/dri/dri_xmesaapi.h index 18aa3db8d..54f22df70 100644 --- a/xc/lib/GL/mesa/dri/dri_xmesaapi.h +++ b/xc/lib/GL/mesa/dri/dri_xmesaapi.h @@ -29,48 +29,110 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. /* * Authors: * Kevin E. Martin <kevin@precisioninsight.com> - * + * Brian E. Paul <brian@precisioninsight.com> */ + #ifndef _DRI_XMESAAPI_H_ #define _DRI_XMESAAPI_H_ -#ifdef GLX_DIRECT_RENDERING - -#include "GL/xmesa.h" +#include "glxclient.h" #include "dri_mesa.h" +#include "../src/types.h" + + +extern GLboolean XMesaInitDriver( __DRIscreenPrivate *driScrnPriv ); + +extern void XMesaResetDriver( __DRIscreenPrivate *driScrnPriv ); + +/* Driver creates a GLvisual and returns pointer to it. + */ +extern GLvisual *XMesaCreateVisual(Display *dpy, + __DRIscreenPrivate *driScrnPriv, + const XVisualInfo *visinfo, + const __GLXvisualConfig *config); + +/* Driver creates its private context struct and hooks it into + * the driContextPriv->driverPrivate field. Return true/false for + * success/error. + */ +extern GLboolean XMesaCreateContext( Display *dpy, GLvisual *mesaVis, + __DRIcontextPrivate *driContextPriv ); + +/* Driver frees data attached to driContextPriv->driverPrivate pointer. + */ +extern void XMesaDestroyContext( __DRIcontextPrivate *driContextPriv ); + +/* Driver creates a GLframebuffer struct indicating which ancillary + * buffers are in hardware or software. + */ +extern GLframebuffer *XMesaCreateWindowBuffer( Display *dpy, + __DRIscreenPrivate *driScrnPriv, + __DRIdrawablePrivate *driDrawPriv, + GLvisual *mesaVis); -typedef struct __XMESAapiRec __XMESAapi; +extern GLframebuffer *XMesaCreatePixmapBuffer( Display *dpy, + __DRIscreenPrivate *driScrnPriv, + __DRIdrawablePrivate *driDrawPriv, + GLvisual *mesaVis); -struct __XMESAapiRec { +extern GLboolean XMesaMakeCurrent( __DRIcontextPrivate *driContextPriv, + __DRIdrawablePrivate *driDrawPriv, + __DRIdrawablePrivate *driReadPriv ); + +extern GLboolean XMesaUnbindContext( __DRIcontextPrivate *driContextPriv ); + +extern void XMesaSwapBuffers( __DRIdrawablePrivate *driDrawPriv ); + + + + + +#define XMESA_VALIDATE_DRAWABLE_INFO(dpy, psp, pdp) \ +do { \ + while (*(pdp->pStamp) != pdp->lastStamp) { \ + DRM_UNLOCK(psp->fd, &psp->pSAREA->lock, \ + pdp->driContextPriv->hHWContext); \ + \ + DRM_SPINLOCK(&psp->pSAREA->drawable_lock, psp->drawLockID); \ + DRI_MESA_VALIDATE_DRAWABLE_INFO(dpy, psp->myNum, pdp); \ + DRM_SPINUNLOCK(&psp->pSAREA->drawable_lock, psp->drawLockID); \ + \ + DRM_LIGHT_LOCK(psp->fd, &psp->pSAREA->lock, \ + pdp->driContextPriv->hHWContext); \ + } \ +} while (0) + + + +typedef struct __MesaAPIRec __MesaAPI; + +struct __MesaAPIRec { /* XMESA Functions */ GLboolean (*InitDriver)(__DRIscreenPrivate *driScrnPriv); void (*ResetDriver)(__DRIscreenPrivate *driScrnPriv); - XMesaVisual (*CreateVisual)(XMesaDisplay *display, - XMesaVisualInfo visinfo, - GLboolean rgb_flag, - GLboolean alpha_flag, - GLboolean db_flag, - GLboolean stereo_flag, - GLboolean ximage_flag, - GLint depth_size, - GLint stencil_size, - GLint accum_size, - GLint level); - void (*DestroyVisual)(XMesaVisual v); - XMesaContext (*CreateContext)(XMesaVisual v, XMesaContext share_list, - __DRIcontextPrivate *driContextPriv); - void (*DestroyContext)(XMesaContext c); - XMesaBuffer (*CreateWindowBuffer)(XMesaVisual v, XMesaWindow w, - __DRIdrawablePrivate *driDrawPriv); - XMesaBuffer (*CreatePixmapBuffer)(XMesaVisual v, XMesaPixmap p, - XMesaColormap c, - __DRIdrawablePrivate *driDrawPriv); - void (*DestroyBuffer)(XMesaBuffer b); - void (*SwapBuffers)(XMesaBuffer b); - GLboolean (*MakeCurrent)(XMesaContext c, XMesaBuffer b); - GLboolean (*UnbindContext)(XMesaContext c); + GLvisual * (*CreateVisual)(Display *display, + __DRIscreenPrivate *driScrnPriv, + const XVisualInfo *visinfo, + const __GLXvisualConfig *config); + GLboolean (*CreateContext)(Display *dpy, GLvisual *mesaVis, + __DRIcontextPrivate *driContextPriv); + void (*DestroyContext)(__DRIcontextPrivate *driContextPriv); + GLframebuffer * (*CreateWindowBuffer)(Display *dpy, + __DRIscreenPrivate *driScrnPriv, + __DRIdrawablePrivate *driDrawPriv, + GLvisual *mesaVis); + GLframebuffer * (*CreatePixmapBuffer)(Display *dpy, + __DRIscreenPrivate *driScrnPriv, + __DRIdrawablePrivate *driDrawPriv, + GLvisual *mesaVis); + void (*SwapBuffers)(__DRIdrawablePrivate *driDrawPriv); + GLboolean (*MakeCurrent)(__DRIcontextPrivate *driContextPriv, + __DRIdrawablePrivate *driDrawPriv, + __DRIdrawablePrivate *driReadPriv); + GLboolean (*UnbindContext)(__DRIcontextPrivate *driContextPriv); }; -#endif + + #endif /* _DRI_XMESAAPI_H_ */ diff --git a/xc/lib/GL/mesa/src/Imakefile b/xc/lib/GL/mesa/src/Imakefile index bca14421c..4f5af973c 100644 --- a/xc/lib/GL/mesa/src/Imakefile +++ b/xc/lib/GL/mesa/src/Imakefile @@ -228,7 +228,7 @@ LinkSourceFile(zoom.h, ../../../../extras/Mesa/src) hash.c \ hint.c \ image.c \ - imaging.o \ + imaging.c \ light.c \ lines.c \ logic.c \ @@ -348,8 +348,8 @@ LinkSourceFile(zoom.h, ../../../../extras/Mesa/src) #ifdef i386Architecture ASM_SRCS = ASM_OBJS = -#ifdef FreeBSDArchitecture - ASM_DEFS = -DUSE_MMX_ASM -DUSE_X86_ASM +#ifdef MesaUse3DNow + ASM_DEFS = -DUSE_MMX_ASM -DUSE_X86_ASM -DUSE_3DNOW_ASM #else ASM_DEFS = -DUSE_MMX_ASM -DUSE_X86_ASM #endif @@ -368,9 +368,7 @@ LinkSourceFile(zoom.h, ../../../../extras/Mesa/src) #endif #if GlxBuiltInMesa || GlxDriverUsesMesa || !GlxUseBuiltInDRIDriver -# We have to go into X to make the xmesaP.h symbolic link - MESASUBDIRS = X - + MESASUBDIRS = ASMSUBDIRS = X86 #include <Library.tmpl> @@ -388,14 +386,4 @@ SUBDIRS = $(MESASUBDIRS) $(ASMSUBDIRS) drv MakeSubdirs($(SUBDIRS)) DependSubdirs($(SUBDIRS)) - -XCOMM #if !GlxUseBuiltInDRIDriver && !GlxDriverUsesMesa -#if 0 -LIBNAME = mesa_dri.so -ALL_OBJS = $(CORE_OBJS) X/?*.o X86/?*.o -ALL_DEPS = $(SUBDIRS) DONE X/DONE X86/DONE -SharedDepModuleTarget($(LIBNAME),$(ALL_DEPS),$(ALL_OBJS)) -InstallDynamicModule($(LIBNAME),$(MODULEDIR)/dri,.) -#endif - DependTarget() diff --git a/xc/lib/GL/mesa/src/X86/Imakefile b/xc/lib/GL/mesa/src/X86/Imakefile index 3b743961e..53402ac67 100644 --- a/xc/lib/GL/mesa/src/X86/Imakefile +++ b/xc/lib/GL/mesa/src/X86/Imakefile @@ -16,7 +16,6 @@ LinkSourceFile(x86.h, ../../../../../extras/Mesa/src/X86) LinkSourceFile(x86a.S, ../../../../../extras/Mesa/src/X86) LinkSourceFile(vertex.S, ../../../../../extras/Mesa/src/X86) LinkSourceFile(x86flatregs.m4, ../../../../../extras/Mesa/src/X86) -LinkSourceFile(x86a.S.m4, ../../../../../extras/Mesa/src/X86) LinkSourceFile(mmx.h, ../../../../../extras/Mesa/src/X86) LinkSourceFile(mmx_blend.S, ../../../../../extras/Mesa/src/X86) @@ -55,9 +54,7 @@ XCOMM We'll learn at runtime whether 3dNow, MMX, etc are really present. MMX_DEFS = -DUSE_MMX_ASM - -XCOMM Disabling 3DNow code for the time being -#if 0 +#ifdef MesaUse3DNow 3DNOW_SRCS = 3dnow.c 3dnow_norm_raw.S 3dnow_xform_masked1.S \ 3dnow_xform_masked2.S 3dnow_xform_masked3.S \ 3dnow_xform_masked4.S 3dnow_xform_raw1.S \ @@ -73,6 +70,7 @@ XCOMM Disabling 3DNow code for the time being 3DNOW_DEFS = -DUSE_3DNOW_ASM #endif + #endif DEFINES = $(ALLOC_DEFINES) GlxDefines -DFX $(X86_DEFS) $(MMX_DEFS) $(3DNOW_DEFS) @@ -96,7 +94,7 @@ STD_CPP_DEFINES = StandardDefines $(PROJECT_DEFINES) SubdirLibraryRule($(OBJS)) NormalLintTarget($(SRCS)) -#ifdef HAVE_3DNOW +#ifdef MesaUse3DNow ObjectFromAsmSource(3dnow_norm_raw, NullParameter) ObjectFromAsmSource(3dnow_xform_masked1, NullParameter) ObjectFromAsmSource(3dnow_xform_masked2, NullParameter) @@ -109,12 +107,11 @@ ObjectFromAsmSource(3dnow_xform_raw4, NullParameter) ObjectFromAsmSource(vertex_3dnow, NullParameter) #endif -#ifdef HAVE_MMX ObjectFromAsmSource(mmx_blend, NullParameter) -#endif ObjectFromAsmSource(common_x86asm, NullParameter) ObjectFromAsmSource(vertex, NullParameter) ObjectFromAsmSource(x86a, NullParameter) DependTarget() + diff --git a/xc/lib/GL/mesa/src/drv/Imakefile b/xc/lib/GL/mesa/src/drv/Imakefile index fadb29bb2..ed30e7196 100644 --- a/xc/lib/GL/mesa/src/drv/Imakefile +++ b/xc/lib/GL/mesa/src/drv/Imakefile @@ -16,6 +16,15 @@ DRIVER += gamma #if GlxBuiltInTdfx DRIVER += tdfx #endif +#if GlxBuiltInMga +DRIVER += common mga +#endif +#if GlxBuiltInI810 +DRIVER += common i810 +#endif +#if GlxBuiltInR128 +DRIVER += r128 +#endif SUBDIRS = $(DRIVER) #else @@ -23,6 +32,10 @@ SUBDIRS += gamma #if HasGlide3 SUBDIRS += tdfx #endif +SUBDIRS += common +SUBDIRS += mga +SUBDIRS += i810 +SUBDIRS += r128 #endif MakeSubdirs($(SUBDIRS)) diff --git a/xc/lib/GL/mesa/src/drv/gamma/Imakefile b/xc/lib/GL/mesa/src/drv/gamma/Imakefile index adddc51ec..5b86ec02f 100644 --- a/xc/lib/GL/mesa/src/drv/gamma/Imakefile +++ b/xc/lib/GL/mesa/src/drv/gamma/Imakefile @@ -7,7 +7,6 @@ XCOMM $XFree86: xc/lib/GL/mesa/src/drv/gamma/Imakefile,v 1.8 2000/03/02 16:07:35 #define DoDebugLib DebugLibGlx #define DoProfileLib ProfileLibGlx -LinkSourceFile(xmesaP.h, ../../../../../../extras/Mesa/src/X) LinkSourceFile(glapi.h, ../../../../../../extras/Mesa/src) @@ -58,6 +57,9 @@ XCOMM OBJS = $(DRIOBJS) $(DRMOBJS) $(GAMMAOBJS) SRCS = $(GAMMASRCS) OBJS = $(DRIOBJS) $(DRMOBJS) $(GAMMAOBJS) +#if !GlxBuiltInGamma +REQUIREDLIBS += -L../../../.. -lGL +#endif #if !GlxUseBuiltInDRIDriver #undef DoNormalLib NormalLibGlx diff --git a/xc/lib/GL/mesa/src/drv/gamma/gamma_gl.c b/xc/lib/GL/mesa/src/drv/gamma/gamma_gl.c index 3bd2fd0f3..17644089d 100644 --- a/xc/lib/GL/mesa/src/drv/gamma/gamma_gl.c +++ b/xc/lib/GL/mesa/src/drv/gamma/gamma_gl.c @@ -361,7 +361,7 @@ void _gamma_Clear(GLbitfield mask) unsigned int depth = 0; int do_clear = 0; #ifdef DO_VALIDATE - __DRIscreenPrivate *driScrnPriv = gCC->driContextPriv->driScreenPriv; + __DRIscreenPrivate *driScrnPriv = gCC->driScreenPriv; #endif DEBUG_GLCMDS(("Clear: %04x\n", (int)mask)); @@ -3280,10 +3280,10 @@ void _gamma_Viewport(GLint x, GLint y, GLsizei width, GLsizei height) DEBUG_GLCMDS(("Viewport: %d %d %d %d\n", (int)x, (int)y, (int)width, (int)height)); - gCCPriv->x = gCC->driContextPriv->driDrawablePriv->x + x; - gCCPriv->y = gCC->driContextPriv->driScreenPriv->fbHeight - - (gCC->driContextPriv->driDrawablePriv->y + - gCC->driContextPriv->driDrawablePriv->h) + y; + gCCPriv->x = gCC->driDrawablePriv->x + x; + gCCPriv->y = gCC->driScreenPriv->fbHeight - + (gCC->driDrawablePriv->y + + gCC->driDrawablePriv->h) + y; gCCPriv->w = width; gCCPriv->h = height; diff --git a/xc/lib/GL/mesa/src/drv/gamma/gamma_init.h b/xc/lib/GL/mesa/src/drv/gamma/gamma_init.h index ce804d018..3e2b14a0b 100644 --- a/xc/lib/GL/mesa/src/drv/gamma/gamma_init.h +++ b/xc/lib/GL/mesa/src/drv/gamma/gamma_init.h @@ -43,7 +43,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "gamma_regs.h" #include "gamma_macros.h" #include "gamma_texture.h" -#include "xmesaP.h" typedef struct { int regionCount; /* Count of register regions */ @@ -140,8 +139,8 @@ extern void gammaLoadHWMatrix(void); extern void gammaInitHW(gammaContextPrivate *gcp); extern float IdentityMatrix[16]; -extern XMesaContext nullCC; -extern XMesaContext gCC; +extern __DRIcontextPrivate *nullCC; +extern __DRIcontextPrivate *gCC; extern gammaContextPrivate *gCCPriv; #endif diff --git a/xc/lib/GL/mesa/src/drv/gamma/gamma_macros.h b/xc/lib/GL/mesa/src/drv/gamma/gamma_macros.h index ae923c7bf..c458bf642 100644 --- a/xc/lib/GL/mesa/src/drv/gamma/gamma_macros.h +++ b/xc/lib/GL/mesa/src/drv/gamma/gamma_macros.h @@ -228,14 +228,14 @@ do { \ #ifdef DO_VALIDATE #define VALIDATE_DRAWABLE_INFO_NO_LOCK(gcc,gcp) \ do { \ - __DRIcontextPrivate *pcp = gcc->driContextPriv; \ + __DRIcontextPrivate *pcp = gcc; \ __DRIscreenPrivate *psp = pcp->driScreenPriv; \ __DRIdrawablePrivate *pdp = pcp->driDrawablePriv; \ \ if (*(pdp->pStamp) != pdp->lastStamp) { \ int old_index = pdp->index; \ while (*(pdp->pStamp) != pdp->lastStamp) { \ - DRI_MESA_VALIDATE_DRAWABLE_INFO(gcc->display, psp->myNum, pdp);\ + DRI_MESA_VALIDATE_DRAWABLE_INFO(pcp->display, psp->myNum, pdp);\ } \ \ if (pdp->index != old_index) { \ @@ -303,7 +303,7 @@ do { \ #define VALIDATE_DRAWABLE_INFO(gcc,gcp) \ do { \ - __DRIcontextPrivate *pcp = gcc->driContextPriv; \ + __DRIcontextPrivate *pcp = gcc; \ __DRIscreenPrivate *psp = pcp->driScreenPriv; \ \ DRM_SPINLOCK(&psp->pSAREA->drawable_lock, psp->drawLockID); \ diff --git a/xc/lib/GL/mesa/src/drv/gamma/gamma_xmesa.c b/xc/lib/GL/mesa/src/drv/gamma/gamma_xmesa.c index 1f968e39b..1b6cf6141 100644 --- a/xc/lib/GL/mesa/src/drv/gamma/gamma_xmesa.c +++ b/xc/lib/GL/mesa/src/drv/gamma/gamma_xmesa.c @@ -36,25 +36,18 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include <X11/Xlibint.h> #include "gamma_init.h" +#include "gamma_gl.h" #include "glapi.h" +#include "context.h" +#include "mmath.h" -XMesaContext nullCC = NULL; -XMesaContext gCC = NULL; +__DRIcontextPrivate *nullCC = NULL; +__DRIcontextPrivate *gCC = NULL; gammaContextPrivate *gCCPriv = NULL; static struct _glapi_table *Dispatch = NULL; -static int count_bits(unsigned int n) -{ - int bits = 0; - - while (n > 0) { - if (n & 1) bits++; - n >>= 1; - } - return bits; -} GLboolean XMesaInitDriver(__DRIscreenPrivate *driScrnPriv) { @@ -83,75 +76,37 @@ void XMesaResetDriver(__DRIscreenPrivate *driScrnPriv) Xfree(driScrnPriv->private); } -XMesaVisual XMesaCreateVisual(XMesaDisplay *display, - XMesaVisualInfo visinfo, - GLboolean rgb_flag, - GLboolean alpha_flag, - GLboolean db_flag, - GLboolean stereo_flag, - GLboolean ximage_flag, - GLint depth_size, - GLint stencil_size, - GLint accum_size, - GLint level) +GLvisual *XMesaCreateVisual(Display *dpy, + __DRIscreenPrivate *driScrnPriv, + const XVisualInfo *visinfo, + const __GLXvisualConfig *config) { - XMesaVisual v; - - /* Only RGB visuals are supported on the GMX2000 */ - if (!rgb_flag) { - return NULL; - } - - v = (XMesaVisual)Xmalloc(sizeof(struct xmesa_visual)); - if (!v) { - return NULL; - } - - v->visinfo = (XVisualInfo *)Xmalloc(sizeof(*visinfo)); - if(!v->visinfo) { - Xfree(v); - return NULL; - } - memcpy(v->visinfo, visinfo, sizeof(*visinfo)); - - v->display = display; - v->level = level; - - v->gl_visual = (GLvisual *)Xmalloc(sizeof(GLvisual)); - if (!v->gl_visual) { - Xfree(v->visinfo); - XFree(v); - return NULL; - } - - v->gl_visual->RGBAflag = rgb_flag; - v->gl_visual->DBflag = db_flag; - v->gl_visual->StereoFlag = stereo_flag; - - v->gl_visual->RedBits = count_bits(visinfo->red_mask); - v->gl_visual->GreenBits = count_bits(visinfo->green_mask); - v->gl_visual->BlueBits = count_bits(visinfo->blue_mask); - v->gl_visual->AlphaBits = 0; /* Not currently supported */ - - v->gl_visual->AccumBits = accum_size; - v->gl_visual->DepthBits = depth_size; - v->gl_visual->StencilBits = stencil_size; - - return v; + /* Drivers may change the args to _mesa_create_visual() in order to + * setup special visuals. + */ + return _mesa_create_visual( config->rgba, + config->doubleBuffer, + config->stereo, + _mesa_bitcount(visinfo->red_mask), + _mesa_bitcount(visinfo->green_mask), + _mesa_bitcount(visinfo->blue_mask), + config->alphaSize, + 0, /* index bits */ + config->depthSize, + config->stencilSize, + config->accumRedSize, + config->accumGreenSize, + config->accumBlueSize, + config->accumAlphaSize, + 0 /* num samples */ ); } -void XMesaDestroyVisual(XMesaVisual v) -{ - Xfree(v->gl_visual); - Xfree(v->visinfo); - Xfree(v); -} -XMesaContext XMesaCreateContext(XMesaVisual v, XMesaContext share_list, - __DRIcontextPrivate *driContextPriv) +GLboolean XMesaCreateContext( Display *dpy, + GLvisual *mesaVis, + __DRIcontextPrivate *driContextPriv ) { int i; - XMesaContext c; gammaContextPrivate *cPriv; __DRIscreenPrivate *driScrnPriv = driContextPriv->driScreenPriv; gammaScreenPrivate *gPriv = (gammaScreenPrivate *)driScrnPriv->private; @@ -162,20 +117,9 @@ XMesaContext XMesaCreateContext(XMesaVisual v, XMesaContext share_list, _gamma_init_dispatch(Dispatch); } - c = (XMesaContext)Xmalloc(sizeof(struct xmesa_context)); - if (!c) { - return NULL; - } - - c->driContextPriv = driContextPriv; - c->xm_visual = v; - c->xm_buffer = NULL; /* Set by MakeCurrent */ - c->display = v->display; - cPriv = (gammaContextPrivate *)Xmalloc(sizeof(gammaContextPrivate)); if (!cPriv) { - Xfree(c); - return NULL; + return GL_FALSE; } cPriv->hHWContext = driContextPriv->hHWContext; @@ -338,17 +282,17 @@ XMesaContext XMesaCreateContext(XMesaVisual v, XMesaContext share_list, #ifdef FORCE_DEPTH32 cPriv->DepthSize = 32; #else - cPriv->DepthSize = v->gl_visual->DepthBits; + cPriv->DepthSize = mesaVis->DepthBits; #endif cPriv->zNear = 0.0; cPriv->zFar = 1.0; cPriv->Flags = GAMMA_FRONT_BUFFER; - cPriv->Flags |= (v->gl_visual->DBflag ? GAMMA_BACK_BUFFER : 0); + cPriv->Flags |= (mesaVis->DBflag ? GAMMA_BACK_BUFFER : 0); cPriv->Flags |= (cPriv->DepthSize > 0 ? GAMMA_DEPTH_BUFFER : 0); cPriv->EnabledFlags = GAMMA_FRONT_BUFFER; - cPriv->EnabledFlags |= (v->gl_visual->DBflag ? GAMMA_BACK_BUFFER : 0); + cPriv->EnabledFlags |= (mesaVis->DBflag ? GAMMA_BACK_BUFFER : 0); cPriv->DepthMode = (DepthModeDisable | DM_WriteMask | @@ -374,36 +318,60 @@ XMesaContext XMesaCreateContext(XMesaVisual v, XMesaContext share_list, cPriv->gammaScrnPriv = gPriv; - c->private = (void *)cPriv; + driContextPriv->driverPrivate = cPriv; /* Initialize the HW to a known state */ gammaInitHW(cPriv); - return c; + return GL_TRUE; } -void XMesaDestroyContext(XMesaContext c) +void XMesaDestroyContext(__DRIcontextPrivate *driContextPriv) { + gammaContextPrivate *cPriv; + cPriv = (gammaContextPrivate *) driContextPriv->driverPrivate; + if (cPriv) { + /* XXX free driver context data? */ + } } -XMesaBuffer XMesaCreateWindowBuffer(XMesaVisual v, XMesaWindow w, - __DRIdrawablePrivate *driDrawPriv) -{ - return (XMesaBuffer)1; -} -XMesaBuffer XMesaCreatePixmapBuffer(XMesaVisual v, XMesaPixmap p, - XMesaColormap c, - __DRIdrawablePrivate *driDrawPriv) +GLframebuffer *XMesaCreateWindowBuffer( Display *dpy, + __DRIscreenPrivate *driScrnPriv, + __DRIdrawablePrivate *driDrawPriv, + GLvisual *mesaVis) { - return (XMesaBuffer)1; + return gl_create_framebuffer(mesaVis, + GL_FALSE, /* software depth buffer? */ + mesaVis->StencilBits > 0, + mesaVis->AccumRedBits > 0, + mesaVis->AlphaBits > 0 + ); } -void XMesaDestroyBuffer(XMesaBuffer b) + +GLframebuffer *XMesaCreatePixmapBuffer( Display *dpy, + __DRIscreenPrivate *driScrnPriv, + __DRIdrawablePrivate *driDrawPriv, + GLvisual *mesaVis) { +#if 0 + /* Different drivers may have different combinations of hardware and + * software ancillary buffers. + */ + return gl_create_framebuffer(mesaVis, + GL_FALSE, /* software depth buffer? */ + mesaVis->StencilBits > 0, + mesaVis->AccumRedBits > 0, + mesaVis->AlphaBits > 0 + ); +#else + return NULL; /* not implemented yet */ +#endif } -void XMesaSwapBuffers(XMesaBuffer b) + +void XMesaSwapBuffers(__DRIdrawablePrivate *driDrawPriv) { /* ** NOT_DONE: This assumes buffer is currently bound to a context. @@ -420,11 +388,9 @@ void XMesaSwapBuffers(XMesaBuffer b) if (gCCPriv->EnabledFlags & GAMMA_BACK_BUFFER) { int src, dst, x0, y0, x1, h; int i; - __DRIdrawablePrivate *driDrawPriv = - gCC->driContextPriv->driDrawablePriv; int nRect = driDrawPriv->numClipRects; XF86DRIClipRectPtr pRect = driDrawPriv->pClipRects; - __DRIscreenPrivate *driScrnPriv = gCC->driContextPriv->driScreenPriv; + __DRIscreenPrivate *driScrnPriv = gCC->driScreenPriv; #ifdef DO_VALIDATE DRM_SPINLOCK(&driScrnPriv->pSAREA->drawable_lock, @@ -487,14 +453,17 @@ void XMesaSwapBuffers(XMesaBuffer b) } } -GLboolean XMesaMakeCurrent(XMesaContext c, XMesaBuffer b) +GLboolean XMesaMakeCurrent(__DRIcontextPrivate *driContextPriv, + __DRIdrawablePrivate *driDrawPriv, + __DRIdrawablePrivate *driReadPriv) { - if (c) { - gCC = c; - gCCPriv = (gammaContextPrivate *)c->private; + + if (driContextPriv) { + gCC = driContextPriv; + gCCPriv = (gammaContextPrivate *) driContextPriv->driverPrivate; gCCPriv->Window &= ~W_GIDMask; - gCCPriv->Window |= (gCC->driContextPriv->driDrawablePriv->index << 5); + gCCPriv->Window |= (driDrawPriv->index << 5); CHECK_DMA_BUFFER(gCC, gCCPriv, 1); WRITE(gCCPriv->buf, GLINTWindow, gCCPriv->Window); @@ -508,7 +477,7 @@ GLboolean XMesaMakeCurrent(XMesaContext c, XMesaBuffer b) } -GLboolean XMesaUnbindContext( XMesaContext c ) +GLboolean XMesaUnbindContext( __DRIcontextPrivate *driContextPriv ) { /* XXX not 100% sure what's supposed to be done here */ return GL_TRUE; diff --git a/xc/lib/GL/mesa/src/drv/i810/Imakefile b/xc/lib/GL/mesa/src/drv/i810/Imakefile index fcb0d2c30..6b72c80e4 100644 --- a/xc/lib/GL/mesa/src/drv/i810/Imakefile +++ b/xc/lib/GL/mesa/src/drv/i810/Imakefile @@ -53,14 +53,14 @@ MESA_INCLUDES = -I. -I.. -I../../include ../../../../dri/drm/xf86drmSL.o - I810SRCS = i810_xmesa.c i810clear.c \ + I810SRCS = i810_xmesa.c \ i810dd.c \ - i810pipeline.c i810span.c i810state.c i810swap.c \ + i810pipeline.c i810span.c i810state.c \ i810tex.c i810tris.c i810vb.c i810fastpath.c i810ioctl.c - I810OBJS = i810_xmesa.o i810clear.o \ + I810OBJS = i810_xmesa.o \ i810dd.o \ - i810pipeline.o i810span.o i810state.o i810swap.o \ + i810pipeline.o i810span.o i810state.o \ i810tex.o i810tris.o i810vb.o i810fastpath.o i810ioctl.o MESASRCS = ../../aatriangle.c \ @@ -94,7 +94,7 @@ MESA_INCLUDES = -I. -I.. -I../../include ../../glthread.c \ ../../hash.c \ ../../image.c \ - ../../imaging.o \ + ../../imaging.c \ ../../light.c \ ../../lines.c \ ../../logic.c \ @@ -268,6 +268,10 @@ XCOMM Disabling 3Dnow code for the time being. OBJS = $(DRIOBJS) $(DRMOBJS) $(MESAOBJS) $(ASMOBJS) $(COMMONOBJS) $(I810OBJS) REQUIREDLIBS += -lm +#if !GlxBuiltInI810 +REQUIREDLIBS += -L../../../.. -lGL +#endif + #if !GlxUseBuiltInDRIDriver #undef DoNormalLib NormalLibGlx diff --git a/xc/lib/GL/mesa/src/drv/i810/i810_3d_reg.h b/xc/lib/GL/mesa/src/drv/i810/i810_3d_reg.h index 8e6942497..a4b947b30 100644 --- a/xc/lib/GL/mesa/src/drv/i810/i810_3d_reg.h +++ b/xc/lib/GL/mesa/src/drv/i810/i810_3d_reg.h @@ -108,6 +108,8 @@ #define LCS_UPDATE_LINEWIDTH (0x1<<15) #define LCS_LINEWIDTH_MASK (0x7<<12) #define LCS_LINEWIDTH_SHIFT 12 +#define LCS_LINEWIDTH_0_5 (0x1<<12) +#define LCS_LINEWIDTH_1_0 (0x2<<12) #define LCS_UPDATE_ALPHA_INTERP (0x1<<11) #define LCS_ALPHA_FLAT (0x0<<10) #define LCS_ALPHA_INTERP (0x1<<10) @@ -616,9 +618,6 @@ typedef struct { #define DV_PF_555 (0x1<<8) #define DV_PF_565 (0x2<<8) - - - #define GFX_OP_ANTIALIAS ((0x3<<29)|(0x6<<24)) #define AA_UPDATE_EDGEFLAG (1<<13) #define AA_ENABLE_EDGEFLAG (1<<12) @@ -641,84 +640,16 @@ typedef struct { #define ST1_ENABLE (1<<16) #define ST1_MASK (0xffff) +#define I810_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value) -/* Indices into buf.Setup where various bits of state are mirrored per - * context and per buffer. These can be fired at the card as a unit, - * or in a piecewise fashion as required. - */ - -/* Destbuffer state - * - backbuffer linear offset and pitch -- invarient in the current dri - * - zbuffer linear offset and pitch -- also invarient - * - drawing origin in back and depth buffers. - * - * Keep the depth/back buffer state here to acommodate private buffers - * in the future. - */ -#define I810_DESTREG_DI0 0 /* CMD_OP_DESTBUFFER_INFO (2 dwords) */ -#define I810_DESTREG_DI1 1 -#define I810_DESTREG_ZB0 2 /* CMD_OP_Z_BUFFER_INFO */ -#define I810_DESTREG_ZB1 3 /* CMD_OP_Z_BUFFER_INFO */ -#define I810_DESTREG_DV0 4 /* GFX_OP_DESTBUFFER_VARS (2 dwords) */ -#define I810_DESTREG_DV1 5 -#define I810_DESTREG_DR0 6 /* GFX_OP_DRAWRECT_INFO (4 dwords) */ -#define I810_DESTREG_DR1 7 -#define I810_DESTREG_DR2 8 -#define I810_DESTREG_DR3 9 -#define I810_DESTREG_DR4 10 - -#define I810_DEST_SETUP_SIZE (11+1) - -/* Context state - */ -#define I810_CTXREG_VF 0 /* GFX_OP_VERTEX_FMT */ -#define I810_CTXREG_MT 1 /* GFX_OP_MAP_TEXELS */ -#define I810_CTXREG_MC0 2 /* GFX_OP_MAP_COLOR_STAGES - stage 0 */ -#define I810_CTXREG_MC1 3 /* GFX_OP_MAP_COLOR_STAGES - stage 1 */ -#define I810_CTXREG_MC2 4 /* GFX_OP_MAP_COLOR_STAGES - stage 2 */ -#define I810_CTXREG_MA0 5 /* GFX_OP_MAP_ALPHA_STAGES - stage 0 */ -#define I810_CTXREG_MA1 6 /* GFX_OP_MAP_ALPHA_STAGES - stage 1 */ -#define I810_CTXREG_MA2 7 /* GFX_OP_MAP_ALPHA_STAGES - stage 2 */ -#define I810_CTXREG_SDM 8 /* GFX_OP_SRC_DEST_MONO */ -#define I810_CTXREG_CF0 9 /* GFX_OP_COLOR_FACTOR */ -#define I810_CTXREG_CF1 10 -#define I810_CTXREG_FOG 11 /* GFX_OP_FOG_COLOR */ -#define I810_CTXREG_B1 12 /* GFX_OP_BOOL_1 */ -#define I810_CTXREG_B2 13 /* GFX_OP_BOOL_2 */ -#define I810_CTXREG_LCS 14 /* GFX_OP_LINEWIDTH_CULL_SHADE_MODE */ -#define I810_CTXREG_PV 15 /* GFX_OP_PV_RULE -- Invarient! */ -#define I810_CTXREG_ZA 16 /* GFX_OP_ZBIAS_ALPHAFUNC */ -#define I810_CTXREG_ST0 17 /* GFX_OP_STIPPLE */ -#define I810_CTXREG_ST1 18 -#define I810_CTXREG_AA 19 /* GFX_OP_ANTIALIAS */ -#define I810_CTX_SETUP_SIZE (20) /* pad to qword */ - - -/* Cliprect state - keep seperate from context as it is used for - * drawing triangles to the shared backbuffer, and - * changes more frequently than the 'normal' context. - */ -#define I810_CLIPREG_SCI0 0 /* GFX_OP_SCISSOR_INFO (3 dwords) */ -#define I810_CLIPREG_SCI1 1 -#define I810_CLIPREG_SCI2 2 -#define I810_CLIPREG_SC 3 /* GFX_OP_SCISSOR */ - -#define I810_CLIP_SETUP_SIZE 4 - -/* Texture state (per tex_buffer) - */ -#define I810_TEXREG_MI0 0 /* GFX_OP_MAP_INFO (4 dwords) */ -#define I810_TEXREG_MI1 1 -#define I810_TEXREG_MI2 2 -#define I810_TEXREG_MI3 3 -#define I810_TEXREG_MF 4 /* GFX_OP_MAP_FILTER */ -#define I810_TEXREG_MLC 5 /* GFX_OP_MAP_LOD_CTL */ -#define I810_TEXREG_MLL 6 /* GFX_OP_MAP_LOD_LIMITS */ -#define I810_TEXREG_MCS 7 /* GFX_OP_MAP_COORD_SETS ??? */ - -#define I810_TEX_SETUP_SIZE 8 +#define I810PACKCOLOR4444(r,g,b,a) \ + ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4)) +#define I810PACKCOLOR1555(r,g,b,a) \ + ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \ + ((a) ? 0x8000 : 0)) -#define I810_SET_FIELD( var, mask, value ) (var &= ~(mask), var |= value) +#define I810PACKCOLOR565(r,g,b) \ + ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3)) #endif diff --git a/xc/lib/GL/mesa/src/drv/i810/i810_init.h b/xc/lib/GL/mesa/src/drv/i810/i810_init.h index f6aa8bd30..df5362787 100644 --- a/xc/lib/GL/mesa/src/drv/i810/i810_init.h +++ b/xc/lib/GL/mesa/src/drv/i810/i810_init.h @@ -28,7 +28,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. /* * Authors: * Keith Whitwell <keithw@precisioninsight.com> - * Daryll Strauss <daryll@precisioninsight.com> (Origninal tdfx driver). * */ @@ -42,16 +41,18 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "dri_mesaint.h" #include "dri_mesa.h" #include "types.h" -#include "xmesaP.h" typedef struct { - drmHandle handle; - drmSize size; - drmAddress map; + drmHandle handle; + drmSize size; + char *map; } i810Region, *i810RegionPtr; typedef struct { - i810Region regs; + i810Region front; + i810Region back; + i810Region depth; + i810Region tex; int deviceID; int width; @@ -68,21 +69,22 @@ typedef struct { int backOffset; int depthOffset; - int auxPitch; - int auxPitchBits; + int backPitch; + int backPitchBits; int textureOffset; int textureSize; int logTextureGranularity; __DRIscreenPrivate *driScrnPriv; + drmBufMapPtr bufs; } i810ScreenPrivate; #include "i810context.h" -extern void i810XMesaUpdateState( i810ContextPtr imesa ); +extern void i810GetLock( i810ContextPtr imesa, GLuint flags ); extern void i810EmitHwStateLocked( i810ContextPtr imesa ); extern void i810EmitScissorValues( i810ContextPtr imesa, int box_nr, int emit ); extern void i810EmitDrawingRectangle( i810ContextPtr imesa ); @@ -90,6 +92,10 @@ extern void i810XMesaSetBackClipRects( i810ContextPtr imesa ); extern void i810XMesaSetFrontClipRects( i810ContextPtr imesa ); +#define GET_DISPATCH_AGE( imesa ) imesa->sarea->last_dispatch +#define GET_ENQUEUE_AGE( imesa ) imesa->sarea->last_enqueue + + /* Lock the hardware and validate our state. */ #define LOCK_HARDWARE( imesa ) \ @@ -97,38 +103,28 @@ extern void i810XMesaSetFrontClipRects( i810ContextPtr imesa ); char __ret=0; \ DRM_CAS(imesa->driHwLock, imesa->hHWContext, \ (DRM_LOCK_HELD|imesa->hHWContext), __ret); \ - if (__ret) { \ - drmGetLock(imesa->driFd, imesa->hHWContext, 0); \ - i810XMesaUpdateState( imesa ); \ - } \ + if (__ret) \ + i810GetLock( imesa, 0 ); \ } while (0) + /* Unlock the hardware using the global current context */ #define UNLOCK_HARDWARE(imesa) \ DRM_UNLOCK(imesa->driFd, imesa->driHwLock, imesa->hHWContext); -/* - This pair of macros makes a loop over the drawing operations - so it is not self contained and doesn't have the nice single - statement semantics of most macros -*/ -#define BEGIN_CLIP_LOOP(imesa) \ - do { \ - int _nc; \ - LOCK_HARDWARE( imesa ); \ - for (_nc = imesa->numClipRects; _nc ; _nc--) { \ - if (imesa->needClip) \ - i810EmitScissorValues(imesa, _nc-1, 1); - - - -#define END_CLIP_LOOP(imesa) \ - } \ - UNLOCK_HARDWARE(imesa); \ - } while (0) +/* This is the wrong way to do it, I'm sure. Otherwise the drm + * bitches that I've already got the heavyweight lock. At worst, + * this is 3 ioctls. The best solution probably only gets me down + * to 2 ioctls in the worst case. + */ +#define LOCK_HARDWARE_QUIESCENT( imesa ) do { \ + LOCK_HARDWARE( imesa ); \ + i810RegetLockQuiescent( imesa ); \ +} while(0) + #endif #endif diff --git a/xc/lib/GL/mesa/src/drv/i810/i810_xmesa.c b/xc/lib/GL/mesa/src/drv/i810/i810_xmesa.c index 50b7e0689..5edcf2620 100644 --- a/xc/lib/GL/mesa/src/drv/i810/i810_xmesa.c +++ b/xc/lib/GL/mesa/src/drv/i810/i810_xmesa.c @@ -46,10 +46,9 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "i810state.h" #include "i810tex.h" #include "i810span.h" -#include "i810depth.h" #include "i810tris.h" -#include "i810swap.h" #include "i810pipeline.h" +#include "i810ioctl.h" #include "i810_dri.h" @@ -57,36 +56,25 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #ifndef I810_DEBUG int I810_DEBUG = (0 - | DEBUG_ALWAYS_SYNC - | DEBUG_VERBOSE_RING - | DEBUG_VERBOSE_OUTREG +/* | DEBUG_ALWAYS_SYNC */ +/* | DEBUG_VERBOSE_RING */ +/* | DEBUG_VERBOSE_OUTREG */ /* | DEBUG_VERBOSE_MSG */ /* | DEBUG_NO_OUTRING */ /* | DEBUG_NO_OUTREG */ /* | DEBUG_VERBOSE_API */ /* | DEBUG_VERBOSE_2D */ /* | DEBUG_VERBOSE_DRI */ - | DEBUG_VALIDATE_RING +/* | DEBUG_VALIDATE_RING */ +/* | DEBUG_VERBOSE_IOCTL */ ); #endif static i810ContextPtr i810Ctx = 0; -i810Glx_t i810glx; -static int count_bits(unsigned int n) -{ - int bits = 0; - - while (n > 0) { - if (n & 1) bits++; - n >>= 1; - } - return bits; -} - -/* These functions are accessed by dlsym from dri_mesa_init.c: +/* These functions are accessed externally to the driver: * * XMesaInitDriver * XMesaResetDriver @@ -100,14 +88,26 @@ static int count_bits(unsigned int n) * XMesaSwapBuffers * XMesaMakeCurrent * - * So this is kind of the public interface to the driver. The driver - * uses the X11 mesa driver context as a kind of wrapper around its - * own driver context - but there isn't much justificiation for doing - * it that way - the DRI might as well use a (void *) to refer to the - * driver contexts. Nothing in the X context really gets used. */ +static drmBufMapPtr i810_create_empty_buffers(void) +{ + drmBufMapPtr retval; + + retval = (drmBufMapPtr)Xmalloc(sizeof(drmBufMap)); + if(retval == NULL) return NULL; + memset(retval, 0, sizeof(drmBufMap)); + retval->list = (drmBufPtr)Xmalloc(sizeof(drmBuf) * I810_DMA_BUF_NR); + if(retval->list == NULL) { + Xfree(retval); + return NULL; + } + memset(retval->list, 0, sizeof(drmBuf) * I810_DMA_BUF_NR); + fprintf(stderr, "retval : %p, retval->list : %p\n", retval, retval->list); + return retval; +} + GLboolean XMesaInitDriver(__DRIscreenPrivate *sPriv) { i810ScreenPrivate *i810Screen; @@ -120,8 +120,6 @@ GLboolean XMesaInitDriver(__DRIscreenPrivate *sPriv) i810Screen->driScrnPriv = sPriv; sPriv->private = (void *)i810Screen; - i810Screen->regs.handle=gDRIPriv->regs; - i810Screen->regs.size=gDRIPriv->regsSize; i810Screen->deviceID=gDRIPriv->deviceID; i810Screen->width=gDRIPriv->width; i810Screen->height=gDRIPriv->height; @@ -137,39 +135,60 @@ GLboolean XMesaInitDriver(__DRIscreenPrivate *sPriv) i810Screen->backOffset=gDRIPriv->backOffset; i810Screen->depthOffset=gDRIPriv->depthOffset; - i810Screen->auxPitch = gDRIPriv->auxPitch; - i810Screen->auxPitchBits = gDRIPriv->auxPitchBits; + i810Screen->backPitch = gDRIPriv->auxPitch; + i810Screen->backPitchBits = gDRIPriv->auxPitchBits; i810Screen->textureOffset=gDRIPriv->textureOffset; i810Screen->textureSize=gDRIPriv->textureSize; i810Screen->logTextureGranularity = gDRIPriv->logTextureGranularity; - - if (0) + if (1) fprintf(stderr, "Tex heap size %x, granularity %x bytes\n", i810Screen->textureSize, 1<<(i810Screen->logTextureGranularity)); + + i810Screen->bufs = i810_create_empty_buffers(); + if(i810Screen->bufs == NULL) + { + Xfree(i810Screen); + return GL_FALSE; + } + i810Screen->back.handle = gDRIPriv->backbuffer; + i810Screen->back.size = gDRIPriv->backbufferSize; + if (drmMap(sPriv->fd, - i810Screen->regs.handle, - i810Screen->regs.size, - &i810Screen->regs.map) != 0) + i810Screen->back.handle, + i810Screen->back.size, + (drmAddress *)&i810Screen->back.map) != 0) { Xfree(i810Screen); return GL_FALSE; } - /* Ditch i810glx in favor of i810Screen? - */ - memset(&i810glx, 0, sizeof(i810glx)); + i810Screen->depth.handle = gDRIPriv->depthbuffer; + i810Screen->depth.size = gDRIPriv->depthbufferSize; + + if (drmMap(sPriv->fd, + i810Screen->depth.handle, + i810Screen->depth.size, + (drmAddress *)&i810Screen->depth.map) != 0) + { + Xfree(i810Screen); + return GL_FALSE; + } + + i810Screen->tex.handle = gDRIPriv->textures; + i810Screen->tex.size = gDRIPriv->textureSize; + + if (drmMap(sPriv->fd, + i810Screen->tex.handle, + i810Screen->tex.size, + (drmAddress *)&i810Screen->tex.map) != 0) + { + Xfree(i810Screen); + return GL_FALSE; + } - i810glx.LpRing.mem.Start = gDRIPriv->ringOffset; - i810glx.LpRing.mem.Size = gDRIPriv->ringSize; - i810glx.LpRing.mem.End = gDRIPriv->ringOffset + gDRIPriv->ringSize; - i810glx.LpRing.virtual_start = sPriv->pFB + i810glx.LpRing.mem.Start; - i810glx.LpRing.tail_mask = i810glx.LpRing.mem.Size - 1; - i810glx.MMIOBase = i810Screen->regs.map; - i810glx.texVirtual = sPriv->pFB + i810Screen->textureOffset; - i810DDFastPathInit(); i810DDTrifuncInit(); i810DDSetupInit(); @@ -183,111 +202,75 @@ void XMesaResetDriver(__DRIscreenPrivate *sPriv) { i810ScreenPrivate *i810Screen = (i810ScreenPrivate *)sPriv->private; - drmUnmap(i810Screen->regs.map, i810Screen->regs.size); - Xfree(i810Screen); -} - -/* Accessed by dlsym from dri_mesa_init.c - */ -XMesaVisual XMesaCreateVisual(XMesaDisplay *display, - XMesaVisualInfo visinfo, - GLboolean rgb_flag, - GLboolean alpha_flag, - GLboolean db_flag, - GLboolean stereo_flag, - GLboolean ximage_flag, - GLint depth_size, - GLint stencil_size, - GLint accum_size, - GLint level) -{ - XMesaVisual v; - - /* Only RGB visuals are supported on the I810 boards */ - if (!rgb_flag) return 0; - - v = (XMesaVisual)Xmalloc(sizeof(struct xmesa_visual)); - if (!v) return 0; - - v->visinfo = (XVisualInfo *)Xmalloc(sizeof(*visinfo)); - if(!v->visinfo) { - Xfree(v); - return 0; - } - memcpy(v->visinfo, visinfo, sizeof(*visinfo)); - - v->display = display; - v->level = level; - - v->gl_visual = (GLvisual *)Xmalloc(sizeof(GLvisual)); - if (!v->gl_visual) { - Xfree(v->visinfo); - XFree(v); - return 0; - } - - v->gl_visual->RGBAflag = rgb_flag; - v->gl_visual->DBflag = db_flag; - v->gl_visual->StereoFlag = stereo_flag; - - v->gl_visual->RedBits = count_bits(visinfo->red_mask); - v->gl_visual->GreenBits = count_bits(visinfo->green_mask); - v->gl_visual->BlueBits = count_bits(visinfo->blue_mask); - v->gl_visual->AlphaBits = 0; /* Not currently supported */ + /* Need to unmap all the bufs and maps here: + */ - v->gl_visual->AccumBits = accum_size; - v->gl_visual->DepthBits = depth_size; - v->gl_visual->StencilBits = stencil_size; - return v; + Xfree(i810Screen); } -void XMesaDestroyVisual(XMesaVisual v) + +GLvisual *XMesaCreateVisual(Display *dpy, + __DRIscreenPrivate *driScrnPriv, + const XVisualInfo *visinfo, + const __GLXvisualConfig *config) { - Xfree(v->gl_visual); - Xfree(v->visinfo); - Xfree(v); + /* Drivers may change the args to _mesa_create_visual() in order to + * setup special visuals. + */ + return _mesa_create_visual( config->rgba, + config->doubleBuffer, + config->stereo, + _mesa_bitcount(visinfo->red_mask), + _mesa_bitcount(visinfo->green_mask), + _mesa_bitcount(visinfo->blue_mask), + config->alphaSize, + 0, /* index bits */ + config->depthSize, + config->stencilSize, + config->accumRedSize, + config->accumGreenSize, + config->accumBlueSize, + config->accumAlphaSize, + 0 /* num samples */ ); } -XMesaContext XMesaCreateContext(XMesaVisual v, XMesaContext share_list, - __DRIcontextPrivate *driContextPriv) + +GLboolean XMesaCreateContext( Display *dpy, GLvisual *mesaVis, + __DRIcontextPrivate *driContextPriv ) { - GLcontext *ctx; - XMesaContext c; + GLcontext *ctx = driContextPriv->mesaContext; i810ContextPtr imesa; __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv; i810ScreenPrivate *i810Screen = (i810ScreenPrivate *)sPriv->private; - I810SAREAPriv *saPriv=(I810SAREAPriv*)(((char*)sPriv->pSAREA)+ - sizeof(XF86DRISAREARec)); + drm_i810_sarea_t *saPriv=(drm_i810_sarea_t *)(((char*)sPriv->pSAREA)+ + sizeof(XF86DRISAREARec)); - GLcontext *shareCtx = 0; - - c = (XMesaContext)Xmalloc(sizeof(struct xmesa_context)); - if (!c) { - return 0; - } - - imesa = (i810ContextPtr)Xmalloc(sizeof(i810Context)); + imesa = (i810ContextPtr)Xcalloc(sizeof(i810Context), 1); if (!imesa) { - Xfree(c); - return 0; + return GL_FALSE; } - c->driContextPriv = driContextPriv; - c->xm_visual = v; - c->xm_buffer = 0; /* Set by MakeCurrent */ - c->display = v->display; - c->private = (void *)imesa; - if (share_list) - shareCtx=((i810ContextPtr)(share_list->private))->glCtx; + /* Set the maximum texture size small enough that we can guarentee + * that both texture units can bind a maximal texture and have them + * in memory at once. + */ + if (i810Screen->textureSize < 2*1024*1024) { + ctx->Const.MaxTextureLevels = 9; + ctx->Const.MaxTextureSize = 1<<8; + } else if (i810Screen->textureSize < 8*1024*1024) { + ctx->Const.MaxTextureLevels = 10; + ctx->Const.MaxTextureSize = 1<<9; + } else { + ctx->Const.MaxTextureLevels = 11; + ctx->Const.MaxTextureSize = 1<<10; + } - ctx = imesa->glCtx = gl_create_context(v->gl_visual, shareCtx, - (void*)imesa, GL_TRUE); /* Dri stuff */ - imesa->display = v->display; + imesa->display = dpy; imesa->hHWContext = driContextPriv->hHWContext; imesa->driFd = sPriv->fd; imesa->driHwLock = &sPriv->pSAREA->lock; @@ -295,10 +278,7 @@ XMesaContext XMesaCreateContext(XMesaVisual v, XMesaContext share_list, imesa->i810Screen = i810Screen; imesa->driScreen = sPriv; imesa->sarea = saPriv; - - imesa->glBuffer = gl_create_framebuffer(v->gl_visual); - - imesa->needClip=1; + imesa->glBuffer = NULL; imesa->texHeap = mmInit( 0, i810Screen->textureSize ); @@ -315,17 +295,21 @@ XMesaContext XMesaCreateContext(XMesaVisual v, XMesaContext share_list, imesa->TextureMode = ctx->Texture.Unit[0].EnvMode; imesa->CurrentTexObj[0] = 0; imesa->CurrentTexObj[1] = 0; + + ctx->DriverCtx = (void *) imesa; + imesa->glCtx = ctx; i810DDExtensionsInit( ctx ); i810DDInitStateFuncs( ctx ); i810DDInitTextureFuncs( ctx ); i810DDInitSpanFuncs( ctx ); - i810DDInitDepthFuncs( ctx ); i810DDInitDriverFuncs( ctx ); + i810DDInitIoctlFuncs( ctx ); ctx->Driver.TriangleCaps = (DD_TRI_CULL| DD_TRI_LIGHT_TWOSIDE| + DD_TRI_STIPPLE| DD_TRI_OFFSET); /* Ask mesa to clip fog coordinates for us. @@ -346,18 +330,19 @@ XMesaContext XMesaCreateContext(XMesaVisual v, XMesaContext share_list, i810DDInitState( imesa ); - return c; + driContextPriv->driverPrivate = (void *) imesa; + + return GL_TRUE; } -void XMesaDestroyContext(XMesaContext c) +void XMesaDestroyContext(__DRIcontextPrivate *driContextPriv) { - i810ContextPtr imesa = (i810ContextPtr) c->private; + i810ContextPtr imesa = (i810ContextPtr) driContextPriv->driverPrivate; if (imesa) { i810TextureObjectPtr next_t, t; gl_destroy_context(imesa->glCtx); - gl_destroy_framebuffer(imesa->glBuffer); foreach_s (t, next_t, &(imesa->TexObjList)) i810DestroyTexObj(imesa, t); @@ -366,58 +351,53 @@ void XMesaDestroyContext(XMesaContext c) i810DestroyTexObj(imesa, t); Xfree(imesa); - - c->private = 0; } } -XMesaBuffer XMesaCreateWindowBuffer(XMesaVisual v, XMesaWindow w, - __DRIdrawablePrivate *driDrawPriv) +GLframebuffer *XMesaCreateWindowBuffer( Display *dpy, + __DRIscreenPrivate *driScrnPriv, + __DRIdrawablePrivate *driDrawPriv, + GLvisual *mesaVis) { - return (XMesaBuffer)1; + return gl_create_framebuffer(mesaVis, + GL_FALSE, /* software depth buffer? */ + mesaVis->StencilBits > 0, + mesaVis->AccumRedBits > 0, + mesaVis->AlphaBits > 0 + ); } -XMesaBuffer XMesaCreatePixmapBuffer(XMesaVisual v, XMesaPixmap p, - XMesaColormap c, - __DRIdrawablePrivate *driDrawPriv) -{ - return (XMesaBuffer)1; -} -void XMesaDestroyBuffer(XMesaBuffer b) +GLframebuffer *XMesaCreatePixmapBuffer( Display *dpy, + __DRIscreenPrivate *driScrnPriv, + __DRIdrawablePrivate *driDrawPriv, + GLvisual *mesaVis) { +#if 0 + /* Different drivers may have different combinations of hardware and + * software ancillary buffers. + */ + return gl_create_framebuffer(mesaVis, + GL_FALSE, /* software depth buffer? */ + mesaVis->StencilBits > 0, + mesaVis->AccumRedBits > 0, + mesaVis->AlphaBits > 0 + ); +#else + return NULL; /* not implemented yet */ +#endif } -void XMesaSwapBuffers(XMesaBuffer bogus) + +void XMesaSwapBuffers(__DRIdrawablePrivate *driDrawPriv) { + /* XXX should do swap according to the buffer, not the context! */ i810ContextPtr imesa = i810Ctx; FLUSH_VB( imesa->glCtx, "swap buffers" ); i810SwapBuffers(imesa); } -static void i810InitClipRects( i810ContextPtr imesa ) -{ - switch (imesa->numClipRects) { - case 0: - imesa->ClipSetup[I810_CLIPREG_SC] = ( GFX_OP_SCISSOR | - SC_UPDATE_SCISSOR ); - imesa->ClipSetup[I810_CLIPREG_SCI1] = 0; - imesa->ClipSetup[I810_CLIPREG_SCI2] = 0; - imesa->needClip = 0; - imesa->dirty |= I810_EMIT_CLIPRECT; - break; - case 1: - imesa->needClip = 0; - i810EmitScissorValues( imesa, 0, 0 ); - imesa->dirty |= I810_EMIT_CLIPRECT; - break; - default: - imesa->needClip=1; - break; - } -} - void i810XMesaSetFrontClipRects( i810ContextPtr imesa ) @@ -426,12 +406,12 @@ void i810XMesaSetFrontClipRects( i810ContextPtr imesa ) imesa->numClipRects = dPriv->numClipRects; imesa->pClipRects = dPriv->pClipRects; + imesa->dirty |= I810_UPLOAD_CLIPRECTS; imesa->drawX = dPriv->x; imesa->drawY = dPriv->y; - imesa->drawOffset = imesa->i810Screen->fbOffset; + imesa->drawMap = imesa->driScreen->pFB; i810EmitDrawingRectangle( imesa ); - i810InitClipRects( imesa ); } @@ -440,7 +420,7 @@ void i810XMesaSetBackClipRects( i810ContextPtr imesa ) __DRIdrawablePrivate *dPriv = imesa->driDrawable; int i; - if (dPriv->numAuxClipRects == 0) + if (dPriv->numBackClipRects == 0) { if (I810_DEBUG & DEBUG_VERBOSE_DRI) fprintf(stderr, "FRONT_CLIPRECTS, %d rects\n", @@ -452,18 +432,18 @@ void i810XMesaSetBackClipRects( i810ContextPtr imesa ) imesa->drawY = dPriv->y; } else { if (I810_DEBUG & DEBUG_VERBOSE_DRI) - fprintf(stderr, "AUX_RECTS, %d rects\n", - dPriv->numAuxClipRects); + fprintf(stderr, "BACK_RECTS, %d rects\n", + dPriv->numBackClipRects); - imesa->numClipRects = dPriv->numAuxClipRects; - imesa->pClipRects = dPriv->pAuxClipRects; - imesa->drawX = dPriv->auxX; - imesa->drawY = dPriv->auxY; + imesa->numClipRects = dPriv->numBackClipRects; + imesa->pClipRects = dPriv->pBackClipRects; + imesa->drawX = dPriv->backX; + imesa->drawY = dPriv->backY; } - imesa->drawOffset = imesa->i810Screen->backOffset; + imesa->drawMap = imesa->i810Screen->back.map; i810EmitDrawingRectangle( imesa ); - i810InitClipRects( imesa ); + imesa->dirty |= I810_UPLOAD_CLIPRECTS; if (I810_DEBUG & DEBUG_VERBOSE_DRI) for (i = 0 ; i < imesa->numClipRects ; i++) @@ -478,6 +458,9 @@ void i810XMesaSetBackClipRects( i810ContextPtr imesa ) static void i810XMesaWindowMoved( i810ContextPtr imesa ) { + if (0) + fprintf(stderr, "i810XMesaWindowMoved\n\n"); + switch (imesa->glCtx->Color.DriverDrawBuffer) { case GL_FRONT_LEFT: i810XMesaSetFrontClipRects( imesa ); @@ -489,35 +472,40 @@ static void i810XMesaWindowMoved( i810ContextPtr imesa ) fprintf(stderr, "fallback buffer\n"); break; } - } -/* This looks buggy to me - the 'b' variable isn't used anywhere... - * Hmm - It seems that the drawable is already hooked in to - * driDrawablePriv. - */ -GLboolean XMesaMakeCurrent(XMesaContext c, XMesaBuffer b) +GLboolean XMesaUnbindContext(__DRIcontextPrivate *driContextPriv) { + i810ContextPtr i810 = (i810ContextPtr) driContextPriv->driverPrivate; + if (i810) + i810->dirty = ~0; - if (c->private==(void *)i810Ctx) return GL_TRUE; - - if (c) { - __DRIdrawablePrivate *dPriv = c->driContextPriv->driDrawablePriv; - - i810Ctx = (i810ContextPtr)c->private; + return GL_TRUE; +} - gl_make_current(i810Ctx->glCtx, i810Ctx->glBuffer); - i810Ctx->driDrawable = dPriv; +GLboolean XMesaMakeCurrent(__DRIcontextPrivate *driContextPriv, + __DRIdrawablePrivate *driDrawPriv, + __DRIdrawablePrivate *driReadPriv) +{ + if (driContextPriv) { + i810Ctx = (i810ContextPtr) driContextPriv->driverPrivate; + + gl_make_current2(i810Ctx->glCtx, driDrawPriv->mesaBuffer, + driReadPriv->mesaBuffer); + + + i810Ctx->driDrawable = driDrawPriv; i810Ctx->dirty = ~0; - + i810XMesaWindowMoved( i810Ctx ); - + if (!i810Ctx->glCtx->Viewport.Width) - gl_Viewport(i810Ctx->glCtx, 0, 0, dPriv->w, dPriv->h); - - } else { + gl_Viewport(i810Ctx->glCtx, 0, 0, driDrawPriv->w, driDrawPriv->h); + } + else + { gl_make_current(0,0); i810Ctx = NULL; } @@ -525,15 +513,26 @@ GLboolean XMesaMakeCurrent(XMesaContext c, XMesaBuffer b) } -void i810XMesaUpdateState( i810ContextPtr imesa ) +void i810GetLock( i810ContextPtr imesa, GLuint flags ) { __DRIdrawablePrivate *dPriv = imesa->driDrawable; __DRIscreenPrivate *sPriv = imesa->driScreen; - I810SAREAPriv *sarea = imesa->sarea; + drm_i810_sarea_t *sarea = imesa->sarea; int me = imesa->hHWContext; int stamp = dPriv->lastStamp; + if (0) fprintf(stderr, ".\n"); + + /* We know there has been contention. + */ + drmGetLock(imesa->driFd, imesa->hHWContext, flags); + + + /* Note contention for throttling hint + */ + imesa->any_contend = 1; + /* If the window moved, may need to set a new cliprect now. * * NOTE: This releases and regains the hw lock, so all state @@ -541,26 +540,24 @@ void i810XMesaUpdateState( i810ContextPtr imesa ) */ XMESA_VALIDATE_DRAWABLE_INFO(imesa->display, sPriv, dPriv); - i810glx.LpRing.synced = 0; - /* If another client has touched the ringbuffer, need to update - * where we think the pointers are: - */ - if (sarea->ringOwner != me) { - i810glx.c_ringlost++; - imesa->dirty |= I810_REFRESH_RING; - } - + if (0) + fprintf(stderr, "i810GetLock, last enque: %d last dispatch: %d\n", + sarea->last_enqueue, + sarea->last_dispatch); + /* If we lost context, need to dump all registers to hardware. * Note that we don't care about 2d contexts, even if they perform * accelerated commands, so the DRI locking in the X server is even * more broken than usual. */ if (sarea->ctxOwner != me) { - i810glx.c_ctxlost++; - imesa->dirty |= I810_UPLOAD_CTX; - imesa->dirty |= I810_EMIT_CLIPRECT; - imesa->dirty |= I810_UPLOAD_BUFFERS; + imesa->dirty |= (I810_UPLOAD_CTX | + I810_UPLOAD_CLIPRECTS | + I810_UPLOAD_BUFFERS | + I810_UPLOAD_TEX0 | + I810_UPLOAD_TEX1); + sarea->ctxOwner = me; } /* Shared texture managment - if another client has played with @@ -587,23 +584,18 @@ void i810XMesaUpdateState( i810ContextPtr imesa ) i810ResetGlobalLRU( imesa ); } + if (0) fprintf(stderr, "imesa %d sarea %d\n", imesa->texAge, sarea->texAge); + imesa->dirty |= I810_UPLOAD_TEX0IMAGE; + imesa->dirty |= I810_UPLOAD_TEX1IMAGE; imesa->texAge = sarea->texAge; - imesa->dirty |= I810_UPLOAD_TEX0IMAGE | I810_UPLOAD_TEX1IMAGE; } if (dPriv->lastStamp != stamp) i810XMesaWindowMoved( imesa ); - sarea->ctxOwner=me; - sarea->ringOwner=me; - - - _I810RefreshLpRing(imesa, 0); - - if (imesa->dirty) - i810EmitHwStateLocked( imesa ); - + + sarea->last_quiescent = -1; /* just kill it for now */ } diff --git a/xc/lib/GL/mesa/src/drv/i810/i810clear.c b/xc/lib/GL/mesa/src/drv/i810/i810clear.c deleted file mode 100644 index 5ba264059..000000000 --- a/xc/lib/GL/mesa/src/drv/i810/i810clear.c +++ /dev/null @@ -1,193 +0,0 @@ - - -#include "types.h" -#include "vbrender.h" -#include "i810log.h" - -#include <stdio.h> -#include <stdlib.h> -#include <unistd.h> - -#include "mm.h" -#include "i810lib.h" -#include "i810dd.h" -#include "i810clear.h" -#include "i810state.h" -#include "i810tris.h" - - - -/* Clear the depthbuffer. Always uses the auxillary cliprects and - * origin from 'dPriv'. - */ -static void i810_clear_depthbuffer( GLcontext *ctx, - GLboolean all, - GLint cx, GLint cy, - GLint cwidth, GLint cheight ) -{ - i810ContextPtr imesa = I810_CONTEXT( ctx ); - GLuint zval = (GLuint) (ctx->Depth.Clear * DEPTH_SCALE); - i810ScreenPrivate *i810Screen = imesa->i810Screen; - __DRIdrawablePrivate *dPriv = imesa->driDrawable; - -/* int _nc = dPriv->numAuxClipRects; */ -/* XF86DRIClipRectPtr box = dPriv->pAuxClipRects; */ - - int _nc = imesa->numClipRects; - XF86DRIClipRectPtr box = imesa->pClipRects; - - cy = dPriv->h-cy-cheight; - cx += dPriv->auxX; - cy += dPriv->auxY; - - while (_nc--) { - GLint x = box[_nc].x1; - GLint y = box[_nc].y1; - GLint width = box[_nc].x2 - x; - GLint height = box[_nc].y2 - y; - - if (!all) { - if (x < cx) width -= cx - x, x = cx; - if (y < cy) height -= cy - y, y = cy; - if (x + width > cx + cwidth) width = cx + cwidth - x; - if (y + height > cy + cheight) height = cy + cheight - y; - if (width <= 0) continue; - if (height <= 0) continue; - } - - if (I810_DEBUG&DEBUG_VERBOSE_2D) - fprintf(stderr, "clear depth rect %d,%d %dx%d\n", - (int) x, (int) y, (int) width, (int) height); - - { - int start = (i810Screen->depthOffset + - y * i810Screen->auxPitch + - x * 2); - - BEGIN_BATCH(imesa, 6); - - OUT_BATCH( BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3 ); - OUT_BATCH( BR13_SOLID_PATTERN | - (0xF0 << 16) | - i810Screen->auxPitch ); - OUT_BATCH( (height << 16) | (width * 2)); - OUT_BATCH( start ); - OUT_BATCH( zval ); - OUT_BATCH( 0 ); - - ADVANCE_BATCH(); - } - } -} - - -/* Clear the current drawbuffer. Checks 'imesa' to determine which set of - * cliprects and origin to use. - */ -static void i810_clear_colorbuffer( GLcontext *ctx, - GLboolean all, - GLint cx, GLint cy, - GLint cwidth, GLint cheight ) -{ - i810ContextPtr imesa = I810_CONTEXT( ctx ); - GLushort c = imesa->ClearColor; - i810ScreenPrivate *i810Screen = imesa->i810Screen; - __DRIdrawablePrivate *dPriv = imesa->driDrawable; - - int _nc = imesa->numClipRects; - XF86DRIClipRectPtr box = imesa->pClipRects; - - cy = dPriv->h-cy-cheight; - cx += imesa->drawX; - cy += imesa->drawY; - - while (_nc--) { - GLint x = box[_nc].x1; - GLint y = box[_nc].y1; - GLint width = box[_nc].x2 - x; - GLint height = box[_nc].y2 - y; - - if (!all) { - if (x < cx) width -= cx - x, x = cx; - if (y < cy) height -= cy - y, y = cy; - if (x + width > cx + cwidth) width = cx + cwidth - x; - if (y + height > cy + cheight) height = cy + cheight - y; - if (width <= 0) continue; - if (height <= 0) continue; - } - - if (I810_DEBUG&DEBUG_VERBOSE_2D) - fprintf(stderr, "clear color rect %d,%d %dx%d\n", - (int) x, (int) y, (int) width, (int) height); - - - { - int start = (imesa->drawOffset + - y * i810Screen->auxPitch + - x * i810Screen->cpp); - - BEGIN_BATCH( imesa, 6 ); - - OUT_BATCH( BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3 ); - OUT_BATCH( BR13_SOLID_PATTERN | - (0xF0 << 16) | - i810Screen->auxPitch ); - OUT_BATCH( (height << 16) | (width * i810Screen->cpp)); - OUT_BATCH( start ); - OUT_BATCH( c ); - OUT_BATCH( 0 ); - - ADVANCE_BATCH(); - } - } -} - - - - -/* - * i810Clear - * - * Clear the color and/or depth buffers. If 'all' is GL_TRUE, clear - * whole buffer, otherwise clear the region defined by the remaining - * parameters. - */ -GLbitfield i810Clear( GLcontext *ctx, GLbitfield mask, GLboolean all, - GLint cx, GLint cy, GLint cwidth, GLint cheight ) -{ - i810ContextPtr imesa = I810_CONTEXT( ctx ); - - if (I810_DEBUG&DEBUG_VERBOSE_API) - fprintf(stderr, "i810Clear( %d, %d, %d, %d, %d )\n", - (int)mask, (int)cx, (int)cy, (int)cwidth, (int)cheight ); - - LOCK_HARDWARE(imesa); - - { - BEGIN_BATCH( imesa, 2 ); - OUT_BATCH( INST_PARSER_CLIENT | INST_OP_FLUSH ); - OUT_BATCH( 0 ); - ADVANCE_BATCH(); - } - - if (mask & GL_COLOR_BUFFER_BIT) { - i810_clear_colorbuffer( ctx, all, cx, cy, cwidth, cheight ); - mask &= ~GL_COLOR_BUFFER_BIT; - } - - if ( (mask & GL_DEPTH_BUFFER_BIT) && ctx->Depth.Mask ) { - i810_clear_depthbuffer( ctx, all, cx, cy, cwidth, cheight ); - mask &= ~GL_DEPTH_BUFFER_BIT; - } - - { - BEGIN_BATCH( imesa, 2 ); - OUT_BATCH( INST_PARSER_CLIENT | INST_OP_FLUSH ); - OUT_BATCH( 0 ); - ADVANCE_BATCH(); - } - - UNLOCK_HARDWARE( imesa ); - return mask; -} - diff --git a/xc/lib/GL/mesa/src/drv/i810/i810clear.h b/xc/lib/GL/mesa/src/drv/i810/i810clear.h deleted file mode 100644 index aedbf84d9..000000000 --- a/xc/lib/GL/mesa/src/drv/i810/i810clear.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef _I810_CLEAR_H -#define _I810_CLEAR_H - -extern GLbitfield i810Clear( GLcontext *ctx, GLbitfield mask, GLboolean all, - GLint x, GLint y, GLint width, GLint height ); - -#endif diff --git a/xc/lib/GL/mesa/src/drv/i810/i810context.h b/xc/lib/GL/mesa/src/drv/i810/i810context.h index 9f316f6fd..629abf0b8 100644 --- a/xc/lib/GL/mesa/src/drv/i810/i810context.h +++ b/xc/lib/GL/mesa/src/drv/i810/i810context.h @@ -28,24 +28,32 @@ typedef struct i810_context_t i810Context; typedef struct i810_context_t *i810ContextPtr; +typedef struct i810_texture_object_t *i810TextureObjectPtr; #include <X11/Xlibint.h> #include "dri_tmm.h" #include "dri_mesaint.h" #include "dri_mesa.h" -#include "xmesaP.h" #include "types.h" #include "i810_init.h" -#include "i810_sarea.h" +#include "drm.h" +#include "mm.h" +#include "i810log.h" #include "i810tex.h" #include "i810vb.h" - -#define I810_FALLBACK_TEXTURE 0x1 -#define I810_FALLBACK_BUFFER 0x2 +/* Reasons to fallback on all primitives. (see also + * imesa->IndirectTriangles). + */ +#define I810_FALLBACK_TEXTURE 0x1 +#define I810_FALLBACK_DRAW_BUFFER 0x2 +#define I810_FALLBACK_READ_BUFFER 0x4 +#define I810_FALLBACK_COLORMASK 0x8 +#define I810_FALLBACK_STIPPLE 0x10 +#define I810_FALLBACK_SPECULAR 0x20 @@ -53,17 +61,6 @@ typedef struct i810_context_t *i810ContextPtr; */ #define I810_NEW_TEXTURE 0x1 -/* for i810ctx.dirty - manage driver->hw state changes, including - * lost contexts. - */ -#define I810_REQUIRE_QUIESCENT 0x1 -#define I810_UPLOAD_TEX0IMAGE 0x2 -#define I810_UPLOAD_TEX1IMAGE 0x4 -#define I810_UPLOAD_CTX 0x8 -#define I810_UPLOAD_BUFFERS 0x10 -#define I810_REFRESH_RING 0x20 -#define I810_EMIT_CLIPRECT 0x40 - typedef void (*i810_interp_func)( GLfloat t, GLfloat *result, @@ -88,7 +85,6 @@ struct i810_context_t { */ GLuint Setup[I810_CTX_SETUP_SIZE]; GLuint BufferSetup[I810_DEST_SETUP_SIZE]; - GLuint ClipSetup[I810_CLIP_SETUP_SIZE]; /* Support for CVA and the fast paths. @@ -125,24 +121,38 @@ struct i810_context_t { /* DRI stuff */ + drmBufPtr vertex_dma_buffer; + GLuint vertex_prim; + GLframebuffer *glBuffer; + /* Two flags to keep track of fallbacks. + */ + GLuint IndirectTriangles; GLuint Fallback; + + GLuint needClip; /* These refer to the current draw (front vs. back) buffer: */ - int drawOffset; /* draw buffer address in agp space */ + char *drawMap; /* draw buffer address in virtual mem */ + char *readMap; int drawX; /* origin of drawable in draw buffer */ int drawY; GLuint numClipRects; /* cliprects for that buffer */ XF86DRIClipRectPtr pClipRects; - int lastSwap; + int secondLastSwap; int texAge; + int ctxAge; + int dirtyAge; + int any_contend; /* throttle me harder */ - XF86DRIClipRectRec draw_rect; + int scissor; + drm_clip_rect_t draw_rect; + drm_clip_rect_t scissor_rect; drmContext hHWContext; drmLock *driHwLock; @@ -152,7 +162,7 @@ struct i810_context_t { __DRIdrawablePrivate *driDrawable; __DRIscreenPrivate *driScreen; i810ScreenPrivate *i810Screen; - I810SAREAPriv *sarea; + drm_i810_sarea_t *sarea; }; @@ -161,7 +171,7 @@ struct i810_context_t { */ #define I810_DEBUG 0 #ifndef I810_DEBUG -/* #warning "Debugging enabled - expect reduced performance" */ +#warning "Debugging enabled - expect reduced performance" extern int I810_DEBUG; #endif @@ -176,6 +186,7 @@ extern int I810_DEBUG; #define DEBUG_VALIDATE_RING 0x800 #define DEBUG_VERBOSE_LRU 0x1000 #define DEBUG_VERBOSE_DRI 0x2000 +#define DEBUG_VERBOSE_IOCTL 0x4000 diff --git a/xc/lib/GL/mesa/src/drv/i810/i810dd.c b/xc/lib/GL/mesa/src/drv/i810/i810dd.c index 17436bf0d..7c04f6d56 100644 --- a/xc/lib/GL/mesa/src/drv/i810/i810dd.c +++ b/xc/lib/GL/mesa/src/drv/i810/i810dd.c @@ -29,10 +29,7 @@ #include <stdio.h> #include "mm.h" -#include "i810lib.h" -#include "i810clear.h" #include "i810dd.h" -#include "i810depth.h" #include "i810log.h" #include "i810state.h" #include "i810span.h" @@ -59,7 +56,7 @@ static const GLubyte *i810DDGetString( GLcontext *ctx, GLenum name ) case GL_VENDOR: return "Keith Whitwell, Precision Insight Inc."; case GL_RENDERER: - return "DRI-I810"; + return "Mesa DRI I810 20000415"; default: return 0; } @@ -100,10 +97,13 @@ void i810DDExtensionsInit( GLcontext *ctx ) /* The imaging subset of 1.2 isn't supported by any mesa driver. */ gl_extensions_disable( ctx, "ARB_imaging" ); + gl_extensions_disable( ctx, "GL_EXT_blend_color" ); gl_extensions_disable( ctx, "GL_EXT_blend_minmax" ); gl_extensions_disable( ctx, "GL_EXT_blend_logic_op" ); gl_extensions_disable( ctx, "GL_EXT_blend_subtract" ); gl_extensions_disable( ctx, "GL_INGR_blend_func_separate" ); + gl_extensions_disable( ctx, "GL_EXT_texture_lod_bias" ); + gl_extensions_disable( ctx, "GL_MESA_resize_buffers" ); if (0) gl_extensions_disable( ctx, "GL_ARB_multitexture" ); @@ -115,18 +115,6 @@ void i810DDExtensionsInit( GLcontext *ctx ) } -static void i810DDFlush( GLcontext *ctx ) -{ - i810DmaFlush( I810_CONTEXT(ctx) ); -} - -static void i810DDFinish( GLcontext *ctx ) -{ - i810ContextPtr imesa = I810_CONTEXT(ctx); - LOCK_HARDWARE( imesa ); - i810DmaFinish( imesa ); - UNLOCK_HARDWARE( imesa ); -} void i810DDInitDriverFuncs( GLcontext *ctx ) @@ -139,8 +127,5 @@ void i810DDInitDriverFuncs( GLcontext *ctx ) ctx->Driver.Clear = i810Clear; - ctx->Driver.Flush = i810DDFlush; - ctx->Driver.Finish = i810DDFinish; - ctx->Driver.BuildPrecalcPipeline = i810DDBuildPrecalcPipeline; } diff --git a/xc/lib/GL/mesa/src/drv/i810/i810dma.h b/xc/lib/GL/mesa/src/drv/i810/i810dma.h deleted file mode 100644 index 9d472719a..000000000 --- a/xc/lib/GL/mesa/src/drv/i810/i810dma.h +++ /dev/null @@ -1,186 +0,0 @@ -/* - GLX Hardware Device Driver for Intel i810 - Copyright (C) 1999 Keith Whitwell <keithw@precisioninsight.com> - - This program is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 2 of the License, or - any later version. - - This program is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; if not, write to the Free Software - Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - - original by Jeff Hartmann <slicer@ionet.net> - 6/16/99: rewrite by John Carmack <johnc@idsoftware.com> - Oct 99: port to i180 by Keith Whitwell <keithw@precisioninsight.com> -*/ - -#ifndef I810DMA_H -#define I810DMA_H - -#include "i810lib.h" -#include "mm.h" - -/* a flush command will guarantee that all data added to the dma buffer -is on its way to the card, and will eventually complete with no more -intervention. -*/ -void i810DmaFlush( i810ContextPtr imesa ); - -/* the overflow function is called when a block can't be allocated -in the current dma buffer. It flushes the current buffer and -records some information */ -void i810DmaOverflow(int newDwords); - -/* a finish command will guarantee that all dma commands have actually -been consumed by the card. Note that there may still be a couple primitives -that have not yet been executed out of the internal FIFO, so this does not -guarantee that the drawing engine is idle. */ -void i810DmaFinish( i810ContextPtr imesa ); - - - -typedef struct { - unsigned long Start; - unsigned long End; - unsigned long Size; -} I810MemRange; - - - -typedef struct i810_batch_buffer { - I810MemRange mem; - char *virtual_start; - int head; - int space; - int additional_space; - int texture_age; -} i810BatchBuffer; - - - -#define I810_USE_BATCH 0 -#if I810_USE_BATCH - -#define BEGIN_BATCH( imesa, n ) \ - unsigned int outbatch; \ - volatile char *virt; \ - if (I810_DEBUG & DEBUG_VERBOSE_RING) \ - fprintf(stderr, \ - "BEGIN_BATCH(%d) in %s\n" \ - "(spc left %d/%ld, head %x vstart %p start %lx)\n", \ - n, __FUNCTION__, i810glx.dma_buffer->space, \ - i810glx.dma_buffer->mem.Size - i810glx.dma_buffer->head, \ - i810glx.dma_buffer->head, \ - i810glx.dma_buffer->virtual_start, \ - i810glx.dma_buffer->mem.Start ); \ - if (i810glx.dma_buffer->space < n*4) \ - i810DmaOverflow(n); \ - outbatch = i810glx.dma_buffer->head; \ - virt = i810glx.dma_buffer->virtual_start; - - -#define OUT_BATCH(val) { \ - *(volatile unsigned int *)(virt + outbatch) = val; \ - if (I810_DEBUG & DEBUG_VERBOSE_RING) \ - fprintf(stderr, "OUT_BATCH %x: %x\n", (int)(outbatch/4), (int)(val)); \ - outbatch += 4; \ -} - - -#define ADVANCE_BATCH() { \ - if (I810_DEBUG & DEBUG_VERBOSE_RING) \ - fprintf(stderr, "ADVANCE_BATCH(%f) in %s\n", \ - (outbatch - i810glx.dma_buffer->head) / 4.0, \ - __FUNCTION__); \ - i810glx.dma_buffer->space -= outbatch - i810glx.dma_buffer->head; \ - i810glx.dma_buffer->head = outbatch; \ -} - -#define FINISH_PRIM() - -#else - - -/* As an alternate path to dma, we can export the registers (and hence - * ringbuffer) to the client. For security we should alloc these - * things in agp memory which isn't exported to the client. But then - * again, the client could blit over such things if it wanted to hang - * the system. - * - * Malicious clients aren't really delt with by the DRI. - */ - - -extern void _I810RefreshLpRing( i810ContextPtr imesa, int update ); -extern int _I810WaitLpRing( i810ContextPtr imesa, int n, int timeout_usec ); -extern int _I810Sync( i810ContextPtr imesa ); - - -#define OUT_RING(n) { \ - if (I810_DEBUG & DEBUG_VERBOSE_RING) \ - fprintf(stderr, "OUT_RING %x: %x\n", outring, (int)(n)); \ - if (!(I810_DEBUG & DEBUG_NO_OUTRING)) { \ - *(volatile unsigned int *)(virt + outring) = n; \ - outring += 4; \ - outring &= ringmask; \ - } \ -} - -#define ADVANCE_LP_RING() { \ - i810glx.LpRing.tail = outring; \ - OUTREG(LP_RING + RING_TAIL, outring); \ -} - -#define BEGIN_LP_RING(imesa, n) \ - unsigned int outring, ringmask; \ - volatile char *virt; \ - if ((I810_DEBUG&DEBUG_ALWAYS_SYNC) && n>2) _I810Sync( imesa ); \ - if (i810glx.LpRing.space < n*4) _I810WaitLpRing( imesa, n*4, 0); \ - i810glx.LpRing.space -= n*4; \ - if (I810_DEBUG & DEBUG_VERBOSE_RING) \ - fprintf(stderr, "BEGIN_LP_RING %d in %s\n", n, __FUNCTION__); \ - if (I810_DEBUG & DEBUG_VALIDATE_RING) { \ - CARD32 tail = INREG(LP_RING+RING_TAIL); \ - if (tail != i810glx.LpRing.tail) { \ - fprintf(stderr, "tail %x pI810->LpRing.tail %x\n", \ - (int) tail, (int) i810glx.LpRing.tail); \ - exit(1); \ - } \ - } \ - i810glx.LpRing.synced = 0; \ - outring = i810glx.LpRing.tail; \ - ringmask = i810glx.LpRing.tail_mask; \ - virt = i810glx.LpRing.virtual_start; - - -#define EXTRAAA \ - -#define INREG(addr) *(volatile CARD32 *)(i810glx.MMIOBase + (addr)) -#define INREG16(addr) *(volatile CARD16 *)(i810glx.MMIOBase + (addr)) -#define INREG8(addr) *(volatile CARD8 *)(i810glx.MMIOBase + (addr)) - -#define OUTREG(addr, val) do { \ - if (I810_DEBUG&DEBUG_VERBOSE_OUTREG) \ - fprintf(stderr, "OUTREG(%x, %x)\n", addr, val); \ - if (!(I810_DEBUG&DEBUG_NO_OUTREG)) \ - *(volatile CARD32 *)(i810glx.MMIOBase + (addr)) = (val); \ -} while (0) - - -#define BEGIN_BATCH(imesa, n) BEGIN_LP_RING(imesa, n) -#define ADVANCE_BATCH() ADVANCE_LP_RING() -#define OUT_BATCH(val) OUT_RING(val) -#define FINISH_PRIM() OUTREG(LP_RING + RING_TAIL, i810glx.LpRing.tail) - -#endif - - - -#endif diff --git a/xc/lib/GL/mesa/src/drv/i810/i810ioctl.c b/xc/lib/GL/mesa/src/drv/i810/i810ioctl.c new file mode 100644 index 000000000..b4e86cff2 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/i810/i810ioctl.c @@ -0,0 +1,477 @@ +#include <stdio.h> +#include <unistd.h> + + +#include "types.h" +#include "pb.h" +#include "dd.h" + +#include "mm.h" +#include "i810context.h" +#include "i810log.h" +#include "i810ioctl.h" + +#include "drm.h" +#include <sys/ioctl.h> + +static drmBufPtr i810_get_buffer_ioctl( i810ContextPtr imesa ) +{ + drm_i810_dma_t dma; + drmBufPtr buf; + int retcode; + + if (I810_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "Getting dma buffer\n"); + + while (1) { + retcode = ioctl(imesa->driFd, DRM_IOCTL_I810_GETBUF, &dma); + + if (dma.granted == 1 && retcode == 0) + break; + + if (I810_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "Retcode : %d, granted : %d\n", retcode, dma.granted); + + ioctl(imesa->driFd, DRM_IOCTL_I810_FLUSH); + } + + if (I810_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, + "imesa->i810Screen->bufs->list : %p, " + "dma.request_idx : %d\n", + imesa->i810Screen->bufs->list, dma.request_idx); + + buf = &(imesa->i810Screen->bufs->list[dma.request_idx]); + buf->idx = dma.request_idx; + buf->used = 0; + buf->total = dma.request_size; + buf->address = (drmAddress)dma.virtual; + return buf; +} + + + +#define DEPTH_SCALE ((1<<16)-1) + +GLbitfield i810Clear( GLcontext *ctx, GLbitfield mask, GLboolean all, + GLint cx, GLint cy, GLint cw, GLint ch ) +{ + i810ContextPtr imesa = I810_CONTEXT( ctx ); + __DRIdrawablePrivate *dPriv = imesa->driDrawable; + const GLuint colorMask = *((GLuint *) &ctx->Color.ColorMask); + drm_i810_clear_t clear; + int i; + + clear.flags = 0; + clear.clear_color = imesa->ClearColor; + clear.clear_depth = (GLuint) (ctx->Depth.Clear * DEPTH_SCALE); + + FLUSH_BATCH( imesa ); + + if ((mask & DD_FRONT_LEFT_BIT) && colorMask == ~0) { + clear.flags |= I810_FRONT; + mask &= ~DD_FRONT_LEFT_BIT; + } + + if ((mask & DD_BACK_LEFT_BIT) && colorMask == ~0) { + clear.flags |= I810_BACK; + mask &= ~DD_BACK_LEFT_BIT; + } + + if ((mask & DD_DEPTH_BIT) && ctx->Depth.Mask) { + clear.flags |= I810_DEPTH; + mask &= ~DD_DEPTH_BIT; + } + + if (!clear.flags) + return mask; + + LOCK_HARDWARE( imesa ); + + /* flip top to bottom */ + cy = dPriv->h-cy-ch; + cx += imesa->drawX; + cy += imesa->drawY; + + if (I810_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "Clear, bufs %x nbox %d\n", + (int)clear.flags, (int)imesa->numClipRects); + + for (i = 0 ; i < imesa->numClipRects ; ) + { + int nr = MIN2(i + I810_NR_SAREA_CLIPRECTS, imesa->numClipRects); + XF86DRIClipRectRec *box = imesa->pClipRects; + drm_clip_rect_t *b = imesa->sarea->boxes; + int n = 0; + + if (!all) { + for ( ; i < nr ; i++) { + GLint x = box[i].x1; + GLint y = box[i].y1; + GLint w = box[i].x2 - x; + GLint h = box[i].y2 - y; + + if (x < cx) w -= cx - x, x = cx; + if (y < cy) h -= cy - y, y = cy; + if (x + w > cx + cw) w = cx + cw - x; + if (y + h > cy + ch) h = cy + ch - y; + if (w <= 0) continue; + if (h <= 0) continue; + + b->x1 = x; + b->y1 = y; + b->x2 = x + w; + b->y2 = y + h; + b++; + n++; + } + } else { + for ( ; i < nr ; i++) { + *b++ = *(drm_clip_rect_t *)&box[i]; + n++; + } + } + + imesa->sarea->nbox = n; + ioctl(imesa->driFd, DRM_IOCTL_I810_CLEAR, &clear); + } + + UNLOCK_HARDWARE( imesa ); + imesa->dirty |= I810_UPLOAD_CLIPRECTS; + + return mask; +} + + + + +/* + * Copy the back buffer to the front buffer. + */ +void i810SwapBuffers( i810ContextPtr imesa ) +{ + __DRIdrawablePrivate *dPriv = imesa->driDrawable; + XF86DRIClipRectPtr pbox; + int nbox; + int i; + int tmp; + + FLUSH_BATCH( imesa ); + LOCK_HARDWARE( imesa ); + + pbox = dPriv->pClipRects; + nbox = dPriv->numClipRects; + + for (i = 0 ; i < nbox ; ) + { + int nr = MIN2(i + I810_NR_SAREA_CLIPRECTS, dPriv->numClipRects); + XF86DRIClipRectRec *b = (XF86DRIClipRectRec *)imesa->sarea->boxes; + + imesa->sarea->nbox = nr - i; + + for ( ; i < nr ; i++) + *b++ = pbox[i]; + + ioctl(imesa->driFd, DRM_IOCTL_I810_SWAP); + } + + tmp = GET_ENQUEUE_AGE(imesa); + UNLOCK_HARDWARE( imesa ); + + if (GET_DISPATCH_AGE(imesa) < imesa->lastSwap) + i810WaitAge(imesa, imesa->lastSwap); + + imesa->lastSwap = tmp; + imesa->dirty |= I810_UPLOAD_CLIPRECTS; +} + + + + + + +/* This waits for *everybody* to finish rendering -- overkill. + */ +void i810DmaFinish( i810ContextPtr imesa ) +{ + FLUSH_BATCH( imesa ); + + if (imesa->sarea->last_quiescent != imesa->sarea->last_enqueue) { + + if (I810_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "i810DmaFinish\n"); + + LOCK_HARDWARE( imesa ); + i810RegetLockQuiescent( imesa ); + UNLOCK_HARDWARE( imesa ); + imesa->sarea->last_quiescent = imesa->sarea->last_enqueue; + } +} + + +void i810RegetLockQuiescent( i810ContextPtr imesa ) +{ + if (imesa->sarea->last_quiescent != imesa->sarea->last_enqueue) { + if (I810_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "i810RegetLockQuiescent\n"); + + drmUnlock(imesa->driFd, imesa->hHWContext); + i810GetLock( imesa, DRM_LOCK_QUIESCENT ); + imesa->sarea->last_quiescent = imesa->sarea->last_enqueue; + } +} + +void i810WaitAgeLocked( i810ContextPtr imesa, int age ) +{ + int i = 0; + + + while (++i < 500000 && GET_DISPATCH_AGE(imesa) < age) { + ioctl(imesa->driFd, DRM_IOCTL_I810_GETAGE); + } + + if (GET_DISPATCH_AGE(imesa) < age) { + if (0) + fprintf(stderr, "wait locked %d %d\n", age, GET_DISPATCH_AGE(imesa)); + ioctl(imesa->driFd, DRM_IOCTL_I810_FLUSH); + } +} + + +void i810WaitAge( i810ContextPtr imesa, int age ) +{ + int i = 0; + + while (++i < 500000 && GET_DISPATCH_AGE(imesa) < age) { + ioctl(imesa->driFd, DRM_IOCTL_I810_GETAGE); + } + + if (GET_DISPATCH_AGE(imesa) >= age) + return; + + i = 0; + while (++i < 1000 && GET_DISPATCH_AGE(imesa) < age) { + ioctl(imesa->driFd, DRM_IOCTL_I810_GETAGE); + usleep(1000); + } + + /* To be effective at letting other clients at the hardware, + * particularly the X server which regularly needs quiescence to + * touch the framebuffer, we really need to sleep *beyond* the + * point where our last buffer clears the hardware. + */ + if (imesa->any_contend) { + usleep(3000); + } + + imesa->any_contend = 0; + + if (GET_DISPATCH_AGE(imesa) < age) { + LOCK_HARDWARE(imesa); + if (GET_DISPATCH_AGE(imesa) < age) + ioctl(imesa->driFd, DRM_IOCTL_I810_FLUSH); + UNLOCK_HARDWARE(imesa); + } +} + + + +void i810FlushVertices( i810ContextPtr imesa ) +{ + if (!imesa->vertex_dma_buffer) return; + + LOCK_HARDWARE( imesa ); + i810FlushVerticesLocked( imesa ); + UNLOCK_HARDWARE( imesa ); +} + + +static int intersect_rect( drm_clip_rect_t *out, + drm_clip_rect_t *a, + drm_clip_rect_t *b ) +{ + *out = *a; + if (b->x1 > out->x1) out->x1 = b->x1; + if (b->y1 > out->y1) out->y1 = b->y1; + if (b->x2 < out->x2) out->x2 = b->x2; + if (b->y2 < out->y2) out->y2 = b->y2; + if (out->x1 >= out->x2) return 0; + if (out->y1 >= out->y2) return 0; + return 1; +} + + +static void age_imesa( i810ContextPtr imesa, int age ) +{ + if (imesa->CurrentTexObj[0]) imesa->CurrentTexObj[0]->age = age; + if (imesa->CurrentTexObj[1]) imesa->CurrentTexObj[1]->age = age; +} + +void i810FlushVerticesLocked( i810ContextPtr imesa ) +{ + drm_clip_rect_t *pbox = (drm_clip_rect_t *)imesa->pClipRects; + int nbox = imesa->numClipRects; + drmBufPtr buffer = imesa->vertex_dma_buffer; + drm_i810_vertex_t vertex; + int i; + + if (I810_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "i810FlushVerticesLocked, buf->used %d\n", + buffer->used); + + if (!buffer) + return; + + if (imesa->dirty & ~I810_UPLOAD_CLIPRECTS) + i810EmitHwStateLocked( imesa ); + + if (I810_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "i810FlushVerticesLocked, used %d\n", + buffer->used); + + imesa->vertex_dma_buffer = 0; + + vertex.idx = buffer->idx; + vertex.used = buffer->used; + vertex.discard = 0; + + if (!nbox) + vertex.used = 0; + + if (nbox > I810_NR_SAREA_CLIPRECTS) + imesa->dirty |= I810_UPLOAD_CLIPRECTS; + + imesa->sarea->vertex_prim = imesa->vertex_prim; + + if (!nbox || !(imesa->dirty & I810_UPLOAD_CLIPRECTS)) + { + if (nbox == 1) + imesa->sarea->nbox = 0; + else + imesa->sarea->nbox = nbox; + + if (I810_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "DRM_IOCTL_I810_VERTEX CASE1 nbox %d used %d\n", + nbox, vertex.used); + + vertex.discard = 1; + ioctl(imesa->driFd, DRM_IOCTL_I810_VERTEX, &vertex); + age_imesa(imesa, imesa->sarea->last_enqueue); + } + else + { + for (i = 0 ; i < nbox ; ) + { + int nr = MIN2(i + I810_NR_SAREA_CLIPRECTS, nbox); + drm_clip_rect_t *b = imesa->sarea->boxes; + + if (imesa->scissor) { + imesa->sarea->nbox = 0; + + for ( ; i < nr ; i++) { + b->x1 = pbox[i].x1 - imesa->drawX; + b->y1 = pbox[i].y1 - imesa->drawY; + b->x2 = pbox[i].x2 - imesa->drawX; + b->y2 = pbox[i].y2 - imesa->drawY; + + if (intersect_rect(b, b, &imesa->scissor_rect)) { + imesa->sarea->nbox++; + b++; + } + } + + /* Culled? + */ + if (!imesa->sarea->nbox) { + if (nr < nbox) continue; + vertex.used = 0; + } + } else { + imesa->sarea->nbox = nr - i; + for ( ; i < nr ; i++, b++) { + b->x1 = pbox[i].x1 - imesa->drawX; + b->y1 = pbox[i].y1 - imesa->drawY; + b->x2 = pbox[i].x2 - imesa->drawX; + b->y2 = pbox[i].y2 - imesa->drawY; + } + } + + /* Finished with the buffer? + */ + if (nr == nbox) + vertex.discard = 1; + + if (I810_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "DRM_IOCTL_I810_VERTEX nbox %d used %d\n", + nbox, vertex.used); + + ioctl(imesa->driFd, DRM_IOCTL_I810_VERTEX, &vertex); + age_imesa(imesa, imesa->sarea->last_enqueue); + } + } + + imesa->dirty = 0; + if (I810_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "finished i810FlushVerticesLocked\n"); +} + + +GLuint *i810AllocDwords( i810ContextPtr imesa, int dwords, GLuint prim ) +{ + GLuint *start; + + if (!imesa->vertex_dma_buffer) + { + if (I810_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "i810AllocPrimitiveVerts -- get buf\n"); + LOCK_HARDWARE(imesa); + imesa->vertex_dma_buffer = i810_get_buffer_ioctl( imesa ); + imesa->vertex_dma_buffer->used = 4; + imesa->vertex_prim = prim; + UNLOCK_HARDWARE(imesa); + } + else if (imesa->vertex_prim != prim || + imesa->vertex_dma_buffer->used + dwords * 4 > + imesa->vertex_dma_buffer->total) + { + if (I810_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "i810AllocPrimitiveVerts -- flush\n"); + i810FlushVertices( imesa ); + LOCK_HARDWARE(imesa); + imesa->vertex_dma_buffer = i810_get_buffer_ioctl( imesa ); + imesa->vertex_dma_buffer->used = 4; + imesa->vertex_prim = prim; + UNLOCK_HARDWARE(imesa); + } + + + if (0) + fprintf(stderr, "i810AllocPrimitiveVerts %d, buf %d, used %d\n", + dwords, imesa->vertex_dma_buffer->idx, + imesa->vertex_dma_buffer->used); + + start = (GLuint *)((char *)imesa->vertex_dma_buffer->address + + imesa->vertex_dma_buffer->used); + + imesa->vertex_dma_buffer->used += dwords * 4; + + return start; +} + +static void i810DDFlush( GLcontext *ctx ) +{ + i810ContextPtr imesa = I810_CONTEXT( ctx ); + FLUSH_BATCH( imesa ); +} + +static void i810DDFinish( GLcontext *ctx ) +{ + i810ContextPtr imesa = I810_CONTEXT( ctx ); + i810DmaFinish( imesa ); +} + +void i810DDInitIoctlFuncs( GLcontext *ctx ) +{ + ctx->Driver.Flush = i810DDFlush; + ctx->Driver.Finish = i810DDFinish; +} diff --git a/xc/lib/GL/mesa/src/drv/i810/i810ioctl.h b/xc/lib/GL/mesa/src/drv/i810/i810ioctl.h new file mode 100644 index 000000000..004b723b4 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/i810/i810ioctl.h @@ -0,0 +1,36 @@ +#ifndef MGA_IOCTL_H +#define MGA_IOCTL_H + +#include "i810context.h" + + +GLuint *i810AllocDwords( i810ContextPtr imesa, int dwords, GLuint prim ); + +void i810GetGeneralDmaBufferLocked( i810ContextPtr mmesa ); + +void i810FlushVertices( i810ContextPtr mmesa ); +void i810FlushVerticesLocked( i810ContextPtr mmesa ); + +void i810FlushGeneralLocked( i810ContextPtr imesa ); +void i810WaitAgeLocked( i810ContextPtr imesa, int age ); +void i810WaitAge( i810ContextPtr imesa, int age ); + +void i810DmaFinish( i810ContextPtr imesa ); + +void i810RegetLockQuiescent( i810ContextPtr imesa ); + +void i810DDInitIoctlFuncs( GLcontext *ctx ); + +void i810SwapBuffers( i810ContextPtr imesa ); + +GLbitfield i810Clear( GLcontext *ctx, GLbitfield mask, GLboolean all, + GLint cx, GLint cy, GLint cw, GLint ch ); + +#define FLUSH_BATCH(imesa) do { \ + if (I810_DEBUG&DEBUG_VERBOSE_IOCTL) \ + fprintf(stderr, "FLUSH_BATCH in %s\n", __FUNCTION__); \ + if (imesa->vertex_dma_buffer) i810FlushVertices(imesa); \ +} while (0) + + +#endif diff --git a/xc/lib/GL/mesa/src/drv/i810/i810lib.h b/xc/lib/GL/mesa/src/drv/i810/i810lib.h deleted file mode 100644 index ad80674f0..000000000 --- a/xc/lib/GL/mesa/src/drv/i810/i810lib.h +++ /dev/null @@ -1,130 +0,0 @@ -/* - * GLX Hardware Device Driver for Intel i810 - * Copyright (C) 1999 Keith Whitwell - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included - * in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS - * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE - * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * - */ - -#ifndef I810LIB_INC -#define I810LIB_INC - -#include <stdio.h> - -#include "i810context.h" -#include "mm.h" -#include "i810log.h" - - -struct i810_mem_range { - unsigned long Start; - unsigned long End; - unsigned long Size; -}; - -struct i810_batch_buffer; - -struct i810_ring_buffer { - int tail_mask; - struct i810_mem_range mem; - char *virtual_start; - int head; - int tail; - int space; - int synced; -}; - -typedef struct { - /* logging stuff */ - GLuint logLevel; - FILE *logFile; - - /* bookkeeping for texture swaps */ - GLuint dma_buffer_age; - GLuint current_texture_age; - - /* options */ - GLuint nullprims; /* skip all primitive generation */ - GLuint boxes; /* draw performance boxes */ - GLuint noFallback; /* don't fall back to software */ - GLuint skipDma; /* don't send anything to hardware */ - - /* performance counters */ - GLuint c_setupPointers; - GLuint c_triangles; - GLuint c_points; - GLuint c_lines; - GLuint c_drawWaits; - GLuint c_textureSwaps; - GLuint c_dmaFlush; - GLuint c_overflows; - - GLuint c_ringlost; - GLuint c_texlost; - GLuint c_ctxlost; - - GLuint hardwareWentIdle; /* cleared each swapbuffers, set if a - waitfordmacompletion ever exited - without having to wait */ - - unsigned char *texVirtual; - - - struct i810_batch_buffer *dma_buffer; - struct i810_ring_buffer LpRing; - unsigned char *MMIOBase; - -} i810Glx_t; - -extern i810Glx_t i810glx; - - -#define I810PACKCOLOR1555(r,g,b,a) \ - ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \ - ((a) ? 0x8000 : 0)) - -#define I810PACKCOLOR565(r,g,b) \ - ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3)) - -#define I810PACKCOLOR4444(r,g,b,a) \ - ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4)) - - -#include "i810_3d_reg.h" - -static __inline__ GLuint i810PackColor(GLuint format, - GLubyte r, GLubyte g, - GLubyte b, GLubyte a) -{ - switch (format) { - case DV_PF_555: - return I810PACKCOLOR1555(r,g,b,a); - case DV_PF_565: - return I810PACKCOLOR565(r,g,b); - default: - fprintf(stderr, "unknown format %d\n", (int)format); - return 0; - } -} - - - - -#endif diff --git a/xc/lib/GL/mesa/src/drv/i810/i810pipeline.c b/xc/lib/GL/mesa/src/drv/i810/i810pipeline.c index fb2d368fe..34171d943 100644 --- a/xc/lib/GL/mesa/src/drv/i810/i810pipeline.c +++ b/xc/lib/GL/mesa/src/drv/i810/i810pipeline.c @@ -1,13 +1,15 @@ /* #include "i810pipeline.h" */ #include <stdio.h> + +#include "types.h" +#include "fog.h" + #include "i810vb.h" #include "i810dd.h" -#include "i810lib.h" #include "i810tris.h" #include "i810pipeline.h" -#include "fog.h" static struct gl_pipeline_stage i810_fast_stage = { "I810 fast path", diff --git a/xc/lib/GL/mesa/src/drv/i810/i810span.c b/xc/lib/GL/mesa/src/drv/i810/i810span.c index 5ea27fd84..aa4f22d0c 100644 --- a/xc/lib/GL/mesa/src/drv/i810/i810span.c +++ b/xc/lib/GL/mesa/src/drv/i810/i810span.c @@ -1,31 +1,39 @@ #include "types.h" #include "i810dd.h" -#include "i810lib.h" -#include "i810dma.h" #include "i810log.h" #include "i810span.h" +#include "i810ioctl.h" #define DBG 0 - #define LOCAL_VARS \ - i810ContextPtr imesa = I810_CONTEXT(ctx); \ __DRIdrawablePrivate *dPriv = imesa->driDrawable; \ - __DRIscreenPrivate *sPriv = imesa->driScreen; \ i810ScreenPrivate *i810Screen = imesa->i810Screen; \ - GLuint pitch = i810Screen->auxPitch; \ + GLuint pitch = i810Screen->backPitch; \ GLuint height = dPriv->h; \ - char *buf = (char *)(sPriv->pFB + \ - imesa->drawOffset + \ - dPriv->x * 2 + \ + char *buf = (char *)(imesa->drawMap + \ + dPriv->x * 2 + \ + dPriv->y * pitch); \ + char *read_buf = (char *)(imesa->readMap + \ + dPriv->x * 2 + \ + dPriv->y * pitch); \ + GLushort p = I810_CONTEXT( ctx )->MonoColor; \ + (void) read_buf; (void) buf; (void) p + +#define LOCAL_DEPTH_VARS \ + __DRIdrawablePrivate *dPriv = imesa->driDrawable; \ + i810ScreenPrivate *i810Screen = imesa->i810Screen; \ + GLuint pitch = i810Screen->backPitch; \ + GLuint height = dPriv->h; \ + char *buf = (char *)(i810Screen->depth.map + \ + dPriv->x * 2 + \ dPriv->y * pitch) -#define INIT_MONO_PIXEL(p) \ - GLushort p = I810_CONTEXT( ctx )->MonoColor; +#define INIT_MONO_PIXEL(p) -#define CLIPPIXEL(_x,_y) (_x >= minx && _x <= maxx && \ - _y >= miny && _y <= maxy) +#define CLIPPIXEL(_x,_y) (_x >= minx && _x < maxx && \ + _y >= miny && _y < maxy) #define CLIPSPAN(_x,_y,_n,_x1,_n1,_i) \ @@ -34,15 +42,20 @@ _n1 = _n; \ _x1 = _x; \ if (_x1 < minx) _i += (minx - _x1), _x1 = minx; \ - if (_x1 + _n1 > maxx) n1 -= (_x1 + n1 - maxx); \ + if (_x1 + _n1 >= maxx) n1 -= (_x1 + n1 - maxx) + 1; \ } +#define Y_FLIP(_y) (height - _y - 1) + + +#define HW_LOCK() \ + i810ContextPtr imesa = I810_CONTEXT(ctx); \ + LOCK_HARDWARE_QUIESCENT(imesa); + #define HW_CLIPLOOP() \ do { \ __DRIdrawablePrivate *dPriv = imesa->driDrawable; \ int _nc = dPriv->numClipRects; \ - LOCK_HARDWARE(imesa); \ - if (!i810glx.LpRing.synced) _I810Sync( imesa ); \ while (_nc--) { \ int minx = dPriv->pClipRects[_nc].x1 - dPriv->x; \ int miny = dPriv->pClipRects[_nc].y1 - dPriv->y; \ @@ -52,13 +65,16 @@ #define HW_ENDCLIPLOOP() \ } \ - UNLOCK_HARDWARE(imesa); \ } while (0) +#define HW_UNLOCK() \ + UNLOCK_HARDWARE(imesa); + -#define Y_FLIP(_y) (height - _y) +/* 16 bit, 565 rgb color spanline and pixel functions + */ #define WRITE_RGBA( _x, _y, r, g, b, a ) \ *(GLushort *)(buf + _x*2 + _y*pitch) = ( (((int)r & 0xf8) << 8) | \ (((int)g & 0xfc) << 3) | \ @@ -66,13 +82,13 @@ #define WRITE_PIXEL( _x, _y, p ) \ *(GLushort *)(buf + _x*2 + _y*pitch) = p -#define READ_RGBA( rgba, _x, _y ) \ -do { \ - GLushort p = *(GLushort *)(buf + _x*2 + _y*pitch); \ - rgba[0] = (p >> 8) & 0xf8; \ - rgba[1] = (p >> 3) & 0xfc; \ - rgba[2] = (p << 3) & 0xf8; \ - rgba[3] = 0; /* or 255? */ \ +#define READ_RGBA( rgba, _x, _y ) \ +do { \ + GLushort p = *(GLushort *)(read_buf + _x*2 + _y*pitch); \ + rgba[0] = (p >> 8) & 0xf8; \ + rgba[1] = (p >> 3) & 0xfc; \ + rgba[2] = (p << 3) & 0xf8; \ + rgba[3] = 255; \ } while(0) #define TAG(x) i810##x##_565 @@ -81,28 +97,46 @@ do { \ - -#define WRITE_RGBA( _x, _y, r, g, b, a ) \ +/* 15 bit, 555 rgb color spanline and pixel functions + */ +#define WRITE_RGBA( _x, _y, r, g, b, a ) \ *(GLushort *)(buf + _x*2 + _y*pitch) = (((r & 0xf8) << 7) | \ - ((g & 0xf8) << 3) | \ + ((g & 0xf8) << 3) | \ ((b & 0xf8) >> 3)) #define WRITE_PIXEL( _x, _y, p ) \ *(GLushort *)(buf + _x*2 + _y*pitch) = p -#define READ_RGBA( rgba, _x, _y ) \ -do { \ - GLushort p = *(GLushort *)(buf + _x*2 + _y*pitch); \ - rgba[0] = (p >> 7) & 0xf8; \ - rgba[1] = (p >> 3) & 0xf8; \ - rgba[2] = (p << 3) & 0xf8; \ - rgba[3] = 0; /* or 255? */ \ +#define READ_RGBA( rgba, _x, _y ) \ +do { \ + GLushort p = *(GLushort *)(read_buf + _x*2 + _y*pitch); \ + rgba[0] = (p >> 7) & 0xf8; \ + rgba[1] = (p >> 3) & 0xf8; \ + rgba[2] = (p << 3) & 0xf8; \ + rgba[3] = 255; \ } while(0) #define TAG(x) i810##x##_555 #include "spantmp.h" + + +/* 16 bit depthbuffer functions. + */ +#define WRITE_DEPTH( _x, _y, d ) \ + *(GLushort *)(buf + _x*2 + _y*pitch) = d; + +#define READ_DEPTH( d, _x, _y ) \ + d = *(GLushort *)(buf + _x*2 + _y*pitch); + +/* d = 0xffff; */ + +#define TAG(x) i810##x##_16 +#include "depthtmp.h" + + + void i810DDInitSpanFuncs( GLcontext *ctx ) { if (1) { @@ -123,6 +157,11 @@ void i810DDInitSpanFuncs( GLcontext *ctx ) ctx->Driver.ReadRGBAPixels = i810ReadRGBAPixels_555; } + ctx->Driver.ReadDepthSpan = i810ReadDepthSpan_16; + ctx->Driver.WriteDepthSpan = i810WriteDepthSpan_16; + ctx->Driver.ReadDepthPixels = i810ReadDepthPixels_16; + ctx->Driver.WriteDepthPixels = i810WriteDepthPixels_16; + ctx->Driver.WriteCI8Span =NULL; ctx->Driver.WriteCI32Span =NULL; ctx->Driver.WriteMonoCISpan =NULL; diff --git a/xc/lib/GL/mesa/src/drv/i810/i810state.c b/xc/lib/GL/mesa/src/drv/i810/i810state.c index bc3391e42..80332e3b3 100644 --- a/xc/lib/GL/mesa/src/drv/i810/i810state.c +++ b/xc/lib/GL/mesa/src/drv/i810/i810state.c @@ -7,24 +7,40 @@ #include "dd.h" #include "mm.h" -#include "i810lib.h" #include "i810dd.h" #include "i810context.h" #include "i810state.h" -#include "i810depth.h" #include "i810tex.h" #include "i810log.h" #include "i810vb.h" #include "i810tris.h" +#include "i810ioctl.h" + + +static __inline__ GLuint i810PackColor(GLuint format, + GLubyte r, GLubyte g, + GLubyte b, GLubyte a) +{ + switch (format) { + case DV_PF_555: + return I810PACKCOLOR1555(r,g,b,a); + case DV_PF_565: + return I810PACKCOLOR565(r,g,b); + default: + fprintf(stderr, "unknown format %d\n", (int)format); + return 0; + } +} static void i810DDAlphaFunc(GLcontext *ctx, GLenum func, GLclampf ref) { i810ContextPtr imesa = I810_CONTEXT(ctx); - CARD32 a = (ZA_UPDATE_ALPHAFUNC|ZA_UPDATE_ALPHAREF); + FLUSH_BATCH(imesa); + switch (ctx->Color.AlphaFunc) { case GL_NEVER: a |= ZA_ALPHA_NEVER; break; case GL_LESS: a |= ZA_ALPHA_LESS; break; @@ -44,10 +60,6 @@ static void i810DDAlphaFunc(GLcontext *ctx, GLenum func, GLclampf ref) imesa->Setup[I810_CTXREG_ZA] |= a; } -/* This shouldn't get called, as the extension is disabled. However, - * there are internal Mesa calls, and rogue use of the api which must be - * caught. - */ static void i810DDBlendEquation(GLcontext *ctx, GLenum mode) { if (mode != GL_FUNC_ADD_EXT) { @@ -60,9 +72,8 @@ static void i810DDBlendEquation(GLcontext *ctx, GLenum mode) static void i810DDBlendFunc(GLcontext *ctx, GLenum sfactor, GLenum dfactor) { i810ContextPtr imesa = I810_CONTEXT(ctx); - GLuint a; - - a = SDM_UPDATE_SRC_BLEND | SDM_UPDATE_DST_BLEND; + GLuint a = SDM_UPDATE_SRC_BLEND | SDM_UPDATE_DST_BLEND; + FLUSH_BATCH(imesa); switch (ctx->Color.BlendSrcRGB) { case GL_ZERO: a |= SDM_SRC_ZERO; break; @@ -73,13 +84,8 @@ static void i810DDBlendFunc(GLcontext *ctx, GLenum sfactor, GLenum dfactor) case GL_ONE_MINUS_SRC_ALPHA: a |= SDM_SRC_INV_SRC_ALPHA; break; case GL_DST_ALPHA: a |= SDM_SRC_ONE; break; case GL_ONE_MINUS_DST_ALPHA: a |= SDM_SRC_ZERO; break; - case GL_SRC_ALPHA_SATURATE: - a |= SDM_SRC_SRC_ALPHA; /* use GFXRENDERSTATE_COLOR_FACTOR ??? */ - break; - default: - i810Error("unknown blend source func"); - exit(1); - return; + case GL_SRC_ALPHA_SATURATE: a |= SDM_SRC_SRC_ALPHA; break; + default: return; } switch (ctx->Color.BlendDstRGB) { @@ -91,10 +97,7 @@ static void i810DDBlendFunc(GLcontext *ctx, GLenum sfactor, GLenum dfactor) case GL_ONE_MINUS_SRC_COLOR: a |= SDM_DST_INV_SRC_COLOR; break; case GL_DST_ALPHA: a |= SDM_DST_ONE; break; case GL_ONE_MINUS_DST_ALPHA: a |= SDM_DST_ZERO; break; - default: - i810Error( "unknown blend dst func"); - exit(1); - return; + default: return; } imesa->dirty |= I810_UPLOAD_CTX; @@ -123,6 +126,8 @@ static void i810DDDepthFunc(GLcontext *ctx, GLenum func) i810ContextPtr imesa = I810_CONTEXT(ctx); int zmode; + FLUSH_BATCH(imesa); + switch(func) { case GL_NEVER: zmode = LCS_Z_NEVER; break; case GL_ALWAYS: zmode = LCS_Z_ALWAYS; break; @@ -134,9 +139,9 @@ static void i810DDDepthFunc(GLcontext *ctx, GLenum func) case GL_NOTEQUAL: zmode = LCS_Z_NOTEQUAL; break; default: return; } - + imesa->Setup[I810_CTXREG_LCS] &= ~LCS_Z_MASK; - imesa->Setup[I810_CTXREG_LCS] |= LCS_UPDATE_ZMODE | zmode; + imesa->Setup[I810_CTXREG_LCS] |= LCS_UPDATE_ZMODE | zmode; imesa->dirty |= I810_UPLOAD_CTX; } @@ -144,20 +149,62 @@ static void i810DDDepthMask(GLcontext *ctx, GLboolean flag) { i810ContextPtr imesa = I810_CONTEXT(ctx); + FLUSH_BATCH(imesa); + imesa->dirty |= I810_UPLOAD_CTX; imesa->Setup[I810_CTXREG_B2] &= ~B2_ZB_WRITE_ENABLE; - imesa->Setup[I810_CTXREG_B2] |= B2_UPDATE_ZB_WRITE_ENABLE; if (flag) imesa->Setup[I810_CTXREG_B2] |= B2_ZB_WRITE_ENABLE; } +/* ============================================================= + * Polygon stipple + * + * The i810 supports a 4x4 stipple natively, GL wants 32x32. + * Fortunately stipple is usually a repeating pattern. Could + * also consider using a multitexturing mechanism for this, but + * that has real issues, too. + */ +static void i810DDPolygonStipple( GLcontext *ctx, const GLubyte *mask ) +{ + i810ContextPtr imesa = I810_CONTEXT(ctx); + const GLubyte *m = mask; + GLubyte p[4]; + int i,j,k; + int active = (ctx->Polygon.StippleFlag && ctx->PB->primitive == GL_POLYGON); + FLUSH_BATCH(imesa); + ctx->Driver.TriangleCaps |= DD_TRI_STIPPLE; + if (active) { + imesa->dirty |= I810_UPLOAD_CTX; + imesa->Setup[I810_CTXREG_ST1] &= ~ST1_ENABLE; + } - - + p[0] = mask[0] & 0xf; p[0] |= p[0] << 4; + p[1] = mask[4] & 0xf; p[1] |= p[1] << 4; + p[2] = mask[8] & 0xf; p[2] |= p[2] << 4; + p[3] = mask[12] & 0xf; p[3] |= p[3] << 4; + + for (k = 0 ; k < 8 ; k++) + for (j = 0 ; j < 4; j++) + for (i = 0 ; i < 4 ; i++) + if (*m++ != p[j]) { + ctx->Driver.TriangleCaps &= ~DD_TRI_STIPPLE; + return; + } + + imesa->Setup[I810_CTXREG_ST1] &= ~0xffff; + imesa->Setup[I810_CTXREG_ST1] |= ( ((p[0] & 0xf) << 0) | + ((p[1] & 0xf) << 4) | + ((p[2] & 0xf) << 8) | + ((p[3] & 0xf) << 12) ); + + if (active) + imesa->Setup[I810_CTXREG_ST1] |= ST1_ENABLE; +} @@ -167,40 +214,26 @@ static void i810DDDepthMask(GLcontext *ctx, GLboolean flag) static void i810DDScissor( GLcontext *ctx, GLint x, GLint y, - GLsizei w, GLsizei h ) + GLsizei w, GLsizei h ) { i810ContextPtr imesa = I810_CONTEXT(ctx); - __DRIdrawablePrivate *dPriv = imesa->driDrawable; - int x1,x2,y1,y2; - x1 = ctx->Scissor.X; - x2 = ctx->Scissor.X + ctx->Scissor.Width - 1; - y1 = dPriv->h - ctx->Scissor.Y - ctx->Scissor.Height; - y2 = dPriv->h - ctx->Scissor.Y - 1; - - if (x1 < 0) x1 = 0; - if (y1 < 0) y1 = 0; - if (x2 >= dPriv->w) x2 = dPriv->w-1; - if (y2 >= dPriv->h) y2 = dPriv->h-1; - - if (x1 > x2 || y1 > y2) { - x1 = 0; x2 = 0; - y2 = 0; y1 = 1; - } + FLUSH_BATCH(imesa); + imesa->scissor_rect.x1 = x; + imesa->scissor_rect.y1 = imesa->driDrawable->h - (y+h); + imesa->scissor_rect.x2 = x+w; + imesa->scissor_rect.y2 = imesa->driDrawable->h - y; - /* Need to push this into drawing rectangle. - */ -#if 0 - imesa->Setup[I810_CTXREG_SCI0] = GFX_OP_SCISSOR_INFO; - imesa->Setup[I810_CTXREG_SCI1] = (y1<<16)|x1; - imesa->Setup[I810_CTXREG_SCI2] = (y2<<16)|x2; + if (I810_DEBUG&DEBUG_VERBOSE_2D) + fprintf(stderr, "SET SCISSOR %d,%d-%d,%d\n", + imesa->scissor_rect.x1, + imesa->scissor_rect.y1, + imesa->scissor_rect.x2, + imesa->scissor_rect.y2); - /* Need to intersect with cliprects??? - */ - imesa->dirty |= I810_UPLOAD_CTX; -#endif + imesa->dirty |= I810_UPLOAD_CLIPRECTS; } @@ -209,38 +242,56 @@ static void i810DDDither(GLcontext *ctx, GLboolean enable) } -static GLboolean i810DDSetBuffer(GLcontext *ctx, GLenum mode ) +static GLboolean i810DDSetDrawBuffer(GLcontext *ctx, GLenum mode ) { i810ContextPtr imesa = I810_CONTEXT(ctx); + FLUSH_BATCH(imesa); - fprintf(stderr, "i810DDSetBuffer %s\n", gl_lookup_enum_by_nr( mode )); - - imesa->Fallback &= ~I810_FALLBACK_BUFFER; + imesa->Fallback &= ~I810_FALLBACK_DRAW_BUFFER; if (mode == GL_FRONT_LEFT) { - imesa->drawOffset = imesa->i810Screen->fbOffset; + imesa->drawMap = imesa->driScreen->pFB; imesa->BufferSetup[I810_DESTREG_DI1] = (imesa->i810Screen->fbOffset | - imesa->i810Screen->auxPitchBits); + imesa->i810Screen->backPitchBits); imesa->dirty |= I810_UPLOAD_BUFFERS; i810XMesaSetFrontClipRects( imesa ); return GL_TRUE; } else if (mode == GL_BACK_LEFT) { - imesa->drawOffset = imesa->i810Screen->backOffset; + imesa->drawMap = imesa->i810Screen->back.map; imesa->BufferSetup[I810_DESTREG_DI1] = (imesa->i810Screen->backOffset | - imesa->i810Screen->auxPitchBits); + imesa->i810Screen->backPitchBits); imesa->dirty |= I810_UPLOAD_BUFFERS; i810XMesaSetBackClipRects( imesa ); return GL_TRUE; } - imesa->Fallback |= I810_FALLBACK_BUFFER; + imesa->Fallback |= I810_FALLBACK_DRAW_BUFFER; return GL_FALSE; } +static void i810DDSetReadBuffer(GLcontext *ctx, GLframebuffer *colorBuffer, + GLenum mode ) +{ + i810ContextPtr imesa = I810_CONTEXT(ctx); + + if (mode == GL_FRONT_LEFT) + { + imesa->readMap = imesa->driScreen->pFB; + imesa->Fallback &= ~I810_FALLBACK_READ_BUFFER; + } + else if (mode == GL_BACK_LEFT) + { + imesa->readMap = imesa->i810Screen->back.map; + imesa->Fallback &= ~I810_FALLBACK_READ_BUFFER; + } + else + imesa->Fallback |= I810_FALLBACK_READ_BUFFER; +} + static void i810DDSetColor(GLcontext *ctx, @@ -248,9 +299,7 @@ static void i810DDSetColor(GLcontext *ctx, GLubyte b, GLubyte a ) { i810ContextPtr imesa = I810_CONTEXT(ctx); - - imesa->MonoColor = i810PackColor( imesa->i810Screen->fbFormat, - r, g, b, a ); + imesa->MonoColor = i810PackColor( imesa->i810Screen->fbFormat, r, g, b, a ); } @@ -259,9 +308,7 @@ static void i810DDClearColor(GLcontext *ctx, GLubyte b, GLubyte a ) { i810ContextPtr imesa = I810_CONTEXT(ctx); - - imesa->ClearColor = i810PackColor( imesa->i810Screen->fbFormat, - r, g, b, a ); + imesa->ClearColor = i810PackColor( imesa->i810Screen->fbFormat, r, g, b, a ); } @@ -274,6 +321,8 @@ static void i810DDCullFaceFrontFace(GLcontext *ctx, GLenum unused) i810ContextPtr imesa = I810_CONTEXT(ctx); GLuint mode = LCS_CULL_BOTH; + FLUSH_BATCH(imesa); + if (ctx->Polygon.CullFaceMode != GL_FRONT_AND_BACK) { mode = LCS_CULL_CW; if (ctx->Polygon.CullFaceMode == GL_FRONT) @@ -288,27 +337,49 @@ static void i810DDCullFaceFrontFace(GLcontext *ctx, GLenum unused) { imesa->dirty |= I810_UPLOAD_CTX; imesa->Setup[I810_CTXREG_LCS] &= ~LCS_CULL_MASK; - imesa->Setup[I810_CTXREG_LCS] |= (LCS_UPDATE_CULL_MODE | mode); + imesa->Setup[I810_CTXREG_LCS] |= mode; } } static void i810DDReducedPrimitiveChange( GLcontext *ctx, GLenum prim ) { - if (ctx->Polygon.CullFlag) { - i810ContextPtr imesa = I810_CONTEXT(ctx); - GLuint mode = imesa->LcsCullMode; - - if (ctx->PB->primitive != GL_POLYGON) - mode = LCS_CULL_DISABLE; - - imesa->dirty |= I810_UPLOAD_CTX; - imesa->Setup[I810_CTXREG_LCS] &= ~LCS_CULL_MASK; - imesa->Setup[I810_CTXREG_LCS] |= (LCS_UPDATE_CULL_MODE | mode); + i810ContextPtr imesa = I810_CONTEXT(ctx); + FLUSH_BATCH(imesa); - LOCK_HARDWARE(imesa); - i810EmitHwStateLocked( imesa ); - UNLOCK_HARDWARE(imesa); + imesa->dirty |= I810_UPLOAD_CTX; + imesa->Setup[I810_CTXREG_LCS] &= ~LCS_CULL_MASK; + imesa->Setup[I810_CTXREG_ST1] &= ~ST1_ENABLE; + imesa->Setup[I810_CTXREG_AA] &= ~AA_ENABLE; + + switch (ctx->PB->primitive) { + case GL_POLYGON: + if (ctx->Polygon.StippleFlag && + (ctx->Driver.TriangleCaps & DD_TRI_STIPPLE)) + imesa->Setup[I810_CTXREG_ST1] |= ST1_ENABLE; + if (ctx->Polygon.CullFlag) + imesa->Setup[I810_CTXREG_LCS] |= imesa->LcsCullMode; + else + imesa->Setup[I810_CTXREG_LCS] |= LCS_CULL_DISABLE; + if (ctx->Polygon.SmoothFlag) + imesa->Setup[I810_CTXREG_AA] |= AA_ENABLE; + break; + case GL_LINES: + imesa->Setup[I810_CTXREG_LCS] &= ~LCS_LINEWIDTH_0_5; + if (ctx->Line.SmoothFlag) { + imesa->Setup[I810_CTXREG_AA] |= AA_ENABLE; + imesa->Setup[I810_CTXREG_LCS] |= LCS_LINEWIDTH_0_5; + } + imesa->Setup[I810_CTXREG_LCS] |= LCS_CULL_DISABLE; + break; + case GL_POINTS: + if (ctx->Point.SmoothFlag) + imesa->Setup[I810_CTXREG_AA] |= AA_ENABLE; + imesa->Setup[I810_CTXREG_LCS] |= LCS_CULL_DISABLE; + break; + default: + imesa->Setup[I810_CTXREG_LCS] |= LCS_CULL_DISABLE; + break; } } @@ -318,15 +389,36 @@ static void i810DDReducedPrimitiveChange( GLcontext *ctx, GLenum prim ) * Color masks */ -/* Mesa calls this from the wrong place. +/* Mesa calls this from the wrong place - it is called a very large + * number of redundant times. * - * Its a fallback... + * Colormask can be simulated by multipass or multitexture techniques. */ static GLboolean i810DDColorMask(GLcontext *ctx, GLboolean r, GLboolean g, GLboolean b, GLboolean a ) { - return 1; + i810ContextPtr imesa = I810_CONTEXT( ctx ); + GLuint tmp = 0; + GLuint rv = 1; + + imesa->Fallback &= ~I810_FALLBACK_COLORMASK; + + if (r && g && b) { + tmp = imesa->Setup[I810_CTXREG_B2] | B2_FB_WRITE_ENABLE; + } else if (!r && !g && !b) { + tmp = imesa->Setup[I810_CTXREG_B2] & ~B2_FB_WRITE_ENABLE; + } else { + rv = 0; + imesa->Fallback |= I810_FALLBACK_COLORMASK; + } + + if (tmp != imesa->Setup[I810_CTXREG_B2]) { + FLUSH_BATCH(imesa); + imesa->Setup[I810_CTXREG_B2] = tmp; + } + + return rv; } /* Seperate specular not fully implemented in hardware... Needs @@ -336,8 +428,14 @@ static GLboolean i810DDColorMask(GLcontext *ctx, static void i810DDLightModelfv(GLcontext *ctx, GLenum pname, const GLfloat *param) { - if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) { - I810_CONTEXT(ctx)->new_state |= I810_NEW_TEXTURE; + if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) + { + i810ContextPtr imesa = I810_CONTEXT( ctx ); + FLUSH_BATCH(imesa); + + imesa->Fallback &= ~I810_FALLBACK_SPECULAR; + if (ctx->Light.Model.ColorControl == GL_SEPARATE_SPECULAR_COLOR) + imesa->Fallback |= I810_FALLBACK_SPECULAR; } } @@ -372,64 +470,105 @@ static void i810DDEnable(GLcontext *ctx, GLenum cap, GLboolean state) switch(cap) { case GL_ALPHA_TEST: + FLUSH_BATCH(imesa); imesa->dirty |= I810_UPLOAD_CTX; imesa->Setup[I810_CTXREG_B1] &= ~B1_ALPHA_TEST_ENABLE; - imesa->Setup[I810_CTXREG_B1] |= B1_UPDATE_ALPHA_TEST_ENABLE; if (state) imesa->Setup[I810_CTXREG_B1] |= B1_ALPHA_TEST_ENABLE; break; case GL_BLEND: + FLUSH_BATCH(imesa); imesa->dirty |= I810_UPLOAD_CTX; imesa->Setup[I810_CTXREG_B1] &= ~B1_BLEND_ENABLE; - imesa->Setup[I810_CTXREG_B1] |= B1_UPDATE_BLEND_ENABLE; if (state) imesa->Setup[I810_CTXREG_B1] |= B1_BLEND_ENABLE; break; case GL_DEPTH_TEST: + FLUSH_BATCH(imesa); imesa->dirty |= I810_UPLOAD_CTX; imesa->Setup[I810_CTXREG_B1] &= ~B1_Z_TEST_ENABLE; - imesa->Setup[I810_CTXREG_B1] |= B1_UPDATE_Z_TEST_ENABLE; if (state) imesa->Setup[I810_CTXREG_B1] |= B1_Z_TEST_ENABLE; break; case GL_SCISSOR_TEST: -#if 0 - imesa->dirty |= I810_UPLOAD_CTX; - imesa->Setup[I810_CTXREG_SC] &= ~SC_ENABLE_MASK; - imesa->Setup[I810_CTXREG_SC] |= SC_UPDATE_SCISSOR; - if (state) - imesa->Setup[I810_CTXREG_SC] |= SC_ENABLE; -#endif + FLUSH_BATCH(imesa); + imesa->scissor = state; + imesa->dirty |= I810_UPLOAD_CLIPRECTS; + break; + case GL_POLYGON_STIPPLE: + if ((ctx->Driver.TriangleCaps & DD_TRI_STIPPLE) && + ctx->PB->primitive == GL_POLYGON) + { + FLUSH_BATCH(imesa); + imesa->dirty |= I810_UPLOAD_CTX; + imesa->Setup[I810_CTXREG_ST1] &= ~ST1_ENABLE; + if (state) + imesa->Setup[I810_CTXREG_ST1] |= ST1_ENABLE; + } + break; + case GL_LINE_SMOOTH: + if (ctx->PB->primitive == GL_LINE) { + FLUSH_BATCH(imesa); + imesa->dirty |= I810_UPLOAD_CTX; + imesa->Setup[I810_CTXREG_AA] &= ~AA_ENABLE; + imesa->Setup[I810_CTXREG_LCS] &= ~LCS_LINEWIDTH_0_5; + if (state) { + imesa->Setup[I810_CTXREG_AA] |= AA_ENABLE; + imesa->Setup[I810_CTXREG_LCS] |= LCS_LINEWIDTH_0_5; + } + } + break; + case GL_POINT_SMOOTH: + if (ctx->PB->primitive == GL_POINT) { + FLUSH_BATCH(imesa); + imesa->dirty |= I810_UPLOAD_CTX; + imesa->Setup[I810_CTXREG_AA] &= ~AA_ENABLE; + if (state) + imesa->Setup[I810_CTXREG_AA] |= AA_ENABLE; + } + break; + case GL_POLYGON_SMOOTH: + if (ctx->PB->primitive == GL_POLYGON) { + FLUSH_BATCH(imesa); + imesa->dirty |= I810_UPLOAD_CTX; + imesa->Setup[I810_CTXREG_AA] &= ~AA_ENABLE; + if (state) + imesa->Setup[I810_CTXREG_AA] |= AA_ENABLE; + } break; case GL_FOG: + FLUSH_BATCH(imesa); imesa->dirty |= I810_UPLOAD_CTX; imesa->Setup[I810_CTXREG_B1] &= ~B1_FOG_ENABLE; - imesa->Setup[I810_CTXREG_B1] |= B1_UPDATE_FOG_ENABLE; if (state) imesa->Setup[I810_CTXREG_B1] |= B1_FOG_ENABLE; break; case GL_CULL_FACE: if (ctx->PB->primitive == GL_POLYGON) { + FLUSH_BATCH(imesa); imesa->dirty |= I810_UPLOAD_CTX; imesa->Setup[I810_CTXREG_LCS] &= ~LCS_CULL_MASK; - imesa->Setup[I810_CTXREG_LCS] |= LCS_UPDATE_CULL_MODE; if (state) imesa->Setup[I810_CTXREG_LCS] |= imesa->LcsCullMode; else imesa->Setup[I810_CTXREG_LCS] |= LCS_CULL_DISABLE; } break; + case GL_TEXTURE_1D: + case GL_TEXTURE_3D: + FLUSH_BATCH(imesa); + imesa->new_state |= I810_NEW_TEXTURE; + break; case GL_TEXTURE_2D: + FLUSH_BATCH(imesa); imesa->new_state |= I810_NEW_TEXTURE; imesa->dirty |= I810_UPLOAD_CTX; if (ctx->Texture.CurrentUnit == 0) { imesa->Setup[I810_CTXREG_MT] &= ~MT_TEXEL0_ENABLE; - imesa->Setup[I810_CTXREG_MT] |= MT_UPDATE_TEXEL0_STATE; if (state) imesa->Setup[I810_CTXREG_MT] |= MT_TEXEL0_ENABLE; } else { imesa->Setup[I810_CTXREG_MT] &= ~MT_TEXEL1_ENABLE; - imesa->Setup[I810_CTXREG_MT] |= MT_UPDATE_TEXEL1_STATE; if (state) imesa->Setup[I810_CTXREG_MT] |= MT_TEXEL1_ENABLE; } @@ -444,92 +583,20 @@ static void i810DDEnable(GLcontext *ctx, GLenum cap, GLboolean state) /* ============================================================= */ -/* Delightfully few possibilities: - */ -void i810DDPrintState( const char *msg, GLuint state ) -{ - fprintf(stderr, "%s (0x%x): %s\n", - msg, - (unsigned int) state, - (state & I810_NEW_TEXTURE) ? "texture, " : ""); -} void i810DDUpdateHwState( GLcontext *ctx ) { i810ContextPtr imesa = I810_CONTEXT(ctx); - if (imesa->new_state & I810_NEW_TEXTURE) + if (imesa->new_state & I810_NEW_TEXTURE) { + FLUSH_BATCH(imesa); i810UpdateTextureState( ctx ); - - imesa->new_state = 0; - - if (imesa->dirty) { - LOCK_HARDWARE(imesa); - i810EmitHwStateLocked( imesa ); - UNLOCK_HARDWARE(imesa); - } -} - - - -/* - * i810DmaExecute - * Add a block of data to the dma buffer - * - * -- In ring buffer mode, must be called with lock held, and translates to - * OUT_RING rather than outbatch - * - * -- In dma mode, probably won't be used because state updates will have - * to be done via the kernel for security... - */ -static void i810DmaExecute( i810ContextPtr imesa, - GLuint *code, int dwords, const char *where ) -{ - if (I810_DEBUG & DEBUG_VERBOSE_RING) - fprintf(stderr, "i810DmaExecute (%s)\n", where); - - if (dwords & 1) { - i810Error( "Misaligned buffer in i810DmaExecute\n" ); - exit(1); } - { - int i; - BEGIN_BATCH( imesa, dwords); - - for ( i = 0 ; i < dwords ; i++ ) { - if (0) fprintf(stderr, "%d: %x\n", i, code[i]); - OUT_BATCH( code[i] ); - } - - ADVANCE_BATCH(); - } + imesa->new_state = 0; } - -void i810EmitScissorValues( i810ContextPtr imesa, int nr, int emit ) -{ - int x1 = imesa->pClipRects[nr].x1 - imesa->drawX; - int y1 = imesa->pClipRects[nr].y1 - imesa->drawY; - int x2 = imesa->pClipRects[nr].x2 - imesa->drawX; - int y2 = imesa->pClipRects[nr].y2 - imesa->drawY; - - if (I810_DEBUG&DEBUG_VERBOSE_DRI) - fprintf(stderr, "i810EmitScissorValues %d,%d - %d,%d\n", - x1,y1,x2,y2); - - imesa->ClipSetup[I810_CLIPREG_SCI1] = (x1 | (y1 << 16)); - imesa->ClipSetup[I810_CLIPREG_SCI2] = (x2 | (y2 << 16)); - imesa->ClipSetup[I810_CLIPREG_SC] = ( GFX_OP_SCISSOR | - SC_UPDATE_SCISSOR | - SC_ENABLE ); - - if (emit) - i810DmaExecute( imesa, - imesa->ClipSetup, I810_CLIP_SETUP_SIZE, "cliprect" ); -} - void i810EmitDrawingRectangle( i810ContextPtr imesa ) { __DRIdrawablePrivate *dPriv = imesa->driDrawable; @@ -545,7 +612,6 @@ void i810EmitDrawingRectangle( i810ContextPtr imesa ) */ imesa->BufferSetup[I810_DESTREG_DR4] = ((y0<<16) | (((unsigned)x0)&0xFFFF)); - /* Clip to screen. */ @@ -556,74 +622,74 @@ void i810EmitDrawingRectangle( i810ContextPtr imesa ) /* Onscreen drawing rectangle. - * - * TODO: clip again to GL scissor values. */ imesa->BufferSetup[I810_DESTREG_DR2] = ((y0<<16) | x0); - imesa->BufferSetup[I810_DESTREG_DR3] = ((y1<<16) | x1); + imesa->BufferSetup[I810_DESTREG_DR3] = (((y1+1)<<16) | (x1+1)); imesa->dirty |= I810_UPLOAD_BUFFERS; } static void i810DDPrintDirty( const char *msg, GLuint state ) { - fprintf(stderr, "%s (0x%x): %s%s%s%s%s%s%s\n", + fprintf(stderr, "%s (0x%x): %s%s%s%s%s\n", msg, (unsigned int) state, - (state & I810_REFRESH_RING) ? "read-lp-ring, " : "", - (state & I810_REQUIRE_QUIESCENT) ? "req-quiescent, " : "", (state & I810_UPLOAD_TEX0IMAGE) ? "upload-tex0, " : "", (state & I810_UPLOAD_TEX1IMAGE) ? "upload-tex1, " : "", (state & I810_UPLOAD_CTX) ? "upload-ctx, " : "", (state & I810_UPLOAD_BUFFERS) ? "upload-bufs, " : "", - (state & I810_EMIT_CLIPRECT) ? "emit-single-cliprect, " : "" + (state & I810_UPLOAD_CLIPRECTS) ? "upload-cliprects, " : "" ); } -/* Spew the state onto the ringbuffer and/or texture memory. +/* Push the state into the sarea and/or texture memory. */ void i810EmitHwStateLocked( i810ContextPtr imesa ) { if (I810_DEBUG & DEBUG_VERBOSE_API) - i810DDPrintDirty( "i810EmitHwStateLocked", imesa->dirty ); - - if (imesa->dirty & I810_REQUIRE_QUIESCENT) { - i810glx.c_drawWaits += _I810Sync( imesa ); - } + i810DDPrintDirty( "\n\n\ni810EmitHwStateLocked", imesa->dirty ); - /* TODO: Refine mechanism to be equivalent to UploadSubImage - */ - if ((imesa->dirty & I810_UPLOAD_TEX0IMAGE) && imesa->CurrentTexObj[0]) - i810UploadTexImages(imesa, imesa->CurrentTexObj[0]); + if (imesa->dirty & ~I810_UPLOAD_CLIPRECTS) + { + if ((imesa->dirty & I810_UPLOAD_TEX0IMAGE) && imesa->CurrentTexObj[0]) + i810UploadTexImages(imesa, imesa->CurrentTexObj[0]); - if ((imesa->dirty & I810_UPLOAD_TEX1IMAGE) && imesa->CurrentTexObj[1]) - i810UploadTexImages(imesa, imesa->CurrentTexObj[1]); + if ((imesa->dirty & I810_UPLOAD_TEX1IMAGE) && imesa->CurrentTexObj[1]) + i810UploadTexImages(imesa, imesa->CurrentTexObj[1]); - if ((imesa->dirty & I810_UPLOAD_CTX)) { - i810DmaExecute( imesa, imesa->Setup, I810_CTX_SETUP_SIZE, "context" ); - - if (imesa->CurrentTexObj[0]) - i810DmaExecute( imesa, imesa->CurrentTexObj[0]->Setup, - I810_TEX_SETUP_SIZE, "tex-0"); + if (imesa->dirty & I810_UPLOAD_CTX) + memcpy( imesa->sarea->ContextState, + imesa->Setup, + sizeof(imesa->Setup) ); + + if ((imesa->dirty & I810_UPLOAD_TEX0) && imesa->CurrentTexObj[0]) { + imesa->sarea->dirty |= I810_UPLOAD_TEX0; + memcpy(imesa->sarea->TexState[0], + imesa->CurrentTexObj[0]->Setup, + sizeof(imesa->sarea->TexState[0])); + } - if (imesa->CurrentTexObj[1]) - i810DmaExecute( imesa, imesa->CurrentTexObj[1]->Setup, - I810_TEX_SETUP_SIZE, "tex-1"); + if ((imesa->dirty & I810_UPLOAD_TEX1) && imesa->CurrentTexObj[1]) { + imesa->sarea->dirty |= I810_UPLOAD_TEX1; + memcpy(imesa->sarea->TexState[1], + imesa->CurrentTexObj[1]->Setup, + sizeof(imesa->sarea->TexState[1])); + } + + if (imesa->dirty & I810_UPLOAD_BUFFERS) + memcpy( imesa->sarea->BufferState, + imesa->BufferSetup, + sizeof(imesa->BufferSetup) ); + + imesa->sarea->dirty |= (imesa->dirty & + ~(I810_UPLOAD_TEX1|I810_UPLOAD_TEX0)); + imesa->dirty &= I810_UPLOAD_CLIPRECTS; } - - if (imesa->dirty & I810_UPLOAD_BUFFERS) - i810DmaExecute( imesa, imesa->BufferSetup, - I810_DEST_SETUP_SIZE, "buffers" ); - - if (imesa->dirty & I810_EMIT_CLIPRECT) - i810DmaExecute( imesa, imesa->ClipSetup, - I810_CLIP_SETUP_SIZE, "cliprect" ); - - imesa->dirty = 0; } + void i810DDInitState( i810ContextPtr imesa ) { i810ScreenPrivate *i810Screen = imesa->i810Screen; @@ -797,7 +863,7 @@ void i810DDInitState( i810ContextPtr imesa ) LCS_UPDATE_ZMODE | LCS_Z_LESS | LCS_UPDATE_LINEWIDTH | - (0x2<<LCS_LINEWIDTH_SHIFT) | + LCS_LINEWIDTH_1_0 | LCS_UPDATE_ALPHA_INTERP | LCS_ALPHA_INTERP | LCS_UPDATE_FOG_INTERP | @@ -825,11 +891,9 @@ void i810DDInitState( i810ContextPtr imesa ) imesa->Setup[I810_CTXREG_ST0] = GFX_OP_STIPPLE; imesa->Setup[I810_CTXREG_ST1] = 0; - - imesa->Setup[I810_CTXREG_AA] = ( GFX_OP_ANTIALIAS | AA_UPDATE_EDGEFLAG | - 0 | + AA_ENABLE_EDGEFLAG | /* ? */ AA_UPDATE_POLYWIDTH | AA_POLYWIDTH_05 | AA_UPDATE_LINEWIDTH | @@ -839,38 +903,29 @@ void i810DDInitState( i810ContextPtr imesa ) AA_UPDATE_AA_ENABLE | 0 ); - - - memset(imesa->ClipSetup, 0, sizeof(imesa->ClipSetup)); - imesa->ClipSetup[I810_CLIPREG_SCI0] = GFX_OP_SCISSOR_INFO; - imesa->ClipSetup[I810_CLIPREG_SCI1] = 0; - imesa->ClipSetup[I810_CLIPREG_SCI2] = 0; - imesa->ClipSetup[I810_CLIPREG_SC] = ( GFX_OP_SCISSOR | - SC_UPDATE_SCISSOR | - 0 ); - - /* This stuff is all invarient as long as we are using - * shared back and depth buffers. - */ memset(imesa->BufferSetup, 0, sizeof(imesa->BufferSetup)); - imesa->drawOffset = i810Screen->backOffset; imesa->BufferSetup[I810_DESTREG_DI0] = CMD_OP_DESTBUFFER_INFO; - if (imesa->glCtx->Color.DriverDrawBuffer == GL_BACK_LEFT) + if (imesa->glCtx->Color.DriverDrawBuffer == GL_BACK_LEFT) { + imesa->drawMap = i810Screen->back.map; imesa->BufferSetup[I810_DESTREG_DI1] = (i810Screen->backOffset | - i810Screen->auxPitchBits); - else + i810Screen->backPitchBits); + } else { + imesa->drawMap = imesa->driScreen->pFB; imesa->BufferSetup[I810_DESTREG_DI1] = (i810Screen->fbOffset | - i810Screen->auxPitchBits); + i810Screen->backPitchBits); + } + if (imesa->glCtx->Color.DriverDrawBuffer == GL_BACK_LEFT) { + imesa->readMap = i810Screen->back.map; + } else { + imesa->readMap = imesa->driScreen->pFB; + } imesa->BufferSetup[I810_DESTREG_DV0] = GFX_OP_DESTBUFFER_VARS; imesa->BufferSetup[I810_DESTREG_DV1] = (DV_HORG_BIAS_OGL | DV_VORG_BIAS_OGL | i810Screen->fbFormat); - imesa->BufferSetup[I810_DESTREG_ZB0] = CMD_OP_Z_BUFFER_INFO; - imesa->BufferSetup[I810_DESTREG_ZB1] = (i810Screen->depthOffset | - i810Screen->auxPitchBits); imesa->BufferSetup[I810_DESTREG_DR0] = GFX_OP_DRAWRECT_INFO; imesa->BufferSetup[I810_DESTREG_DR1] = DR1_RECT_CLIP_ENABLE; @@ -886,17 +941,31 @@ void i810DDUpdateState( GLcontext *ctx ) { i810ContextPtr imesa = I810_CONTEXT( ctx ); + /* Have to do this here to detect texture fallbacks in time: + */ + if (I810_CONTEXT(ctx)->new_state & I810_NEW_TEXTURE) + i810DDUpdateHwState( ctx ); + + if (ctx->NewState & INTERESTED) { i810DDChooseRenderState(ctx); i810ChooseRasterSetupFunc(ctx); } + + if (0) + fprintf(stderr, "IndirectTriangles %x Fallback %x\n", + imesa->IndirectTriangles, imesa->Fallback); - /* TODO: stop mesa from clobbering these. - */ - ctx->Driver.PointsFunc=imesa->PointsFunc; - ctx->Driver.LineFunc=imesa->LineFunc; - ctx->Driver.TriangleFunc=imesa->TriangleFunc; - ctx->Driver.QuadFunc=imesa->QuadFunc; + if (!imesa->Fallback) + { + ctx->IndirectTriangles &= ~DD_SW_RASTERIZE; + ctx->IndirectTriangles |= imesa->IndirectTriangles; + + ctx->Driver.PointsFunc=imesa->PointsFunc; + ctx->Driver.LineFunc=imesa->LineFunc; + ctx->Driver.TriangleFunc=imesa->TriangleFunc; + ctx->Driver.QuadFunc=imesa->QuadFunc; + } } @@ -919,8 +988,13 @@ void i810DDInitStateFuncs(GLcontext *ctx) ctx->Driver.ReducedPrimitiveChange = i810DDReducedPrimitiveChange; ctx->Driver.RenderStart = i810DDUpdateHwState; ctx->Driver.RenderFinish = 0; + + ctx->Driver.PolygonStipple = i810DDPolygonStipple; + ctx->Driver.LineStipple = 0; + + ctx->Driver.SetReadBuffer = i810DDSetReadBuffer; + ctx->Driver.SetDrawBuffer = i810DDSetDrawBuffer; - ctx->Driver.SetBuffer = i810DDSetBuffer; ctx->Driver.Color = i810DDSetColor; ctx->Driver.ClearColor = i810DDClearColor; ctx->Driver.Dither = i810DDDither; @@ -928,6 +1002,5 @@ void i810DDInitStateFuncs(GLcontext *ctx) ctx->Driver.Index = 0; ctx->Driver.ClearIndex = 0; ctx->Driver.IndexMask = 0; - } diff --git a/xc/lib/GL/mesa/src/drv/i810/i810state.h b/xc/lib/GL/mesa/src/drv/i810/i810state.h index d0551631e..b43a1a4ff 100644 --- a/xc/lib/GL/mesa/src/drv/i810/i810state.h +++ b/xc/lib/GL/mesa/src/drv/i810/i810state.h @@ -1,13 +1,12 @@ #ifndef _I810_STATE_H #define _I810_STATE_H +#include "i810context.h" extern void i810DDUpdateHwState( GLcontext *ctx ); extern void i810DDUpdateState( GLcontext *ctx ); extern void i810DDInitState( i810ContextPtr imesa ); extern void i810DDInitStateFuncs( GLcontext *ctx ); -extern void i810DDPrintState( const char *msg, GLuint state ); - #endif diff --git a/xc/lib/GL/mesa/src/drv/i810/i810swap.c b/xc/lib/GL/mesa/src/drv/i810/i810swap.c deleted file mode 100644 index 9220ef9f4..000000000 --- a/xc/lib/GL/mesa/src/drv/i810/i810swap.c +++ /dev/null @@ -1,259 +0,0 @@ - - -#include "types.h" -#include "vbrender.h" -#include "i810log.h" - -#include <stdio.h> -#include <stdlib.h> - -#include "mm.h" -#include "i810lib.h" -#include "i810dd.h" -#include "i810dma.h" -#include "i810state.h" -#include "i810swap.h" -#include "i810dma.h" - -/* - * i810BackToFront - * - * Blit the visible rectangles from the back buffer to the screen. - * Respects the frontbuffer cliprects, and applies the offset - * necessary if the backbuffer is positioned elsewhere in the screen. - */ -static int i810BackToFront( i810ContextPtr imesa ) -{ - __DRIdrawablePrivate *dPriv = imesa->driDrawable; - i810ScreenPrivate *i810Screen = imesa->i810Screen; - - - /* Use the frontbuffer cliprects: - */ - XF86DRIClipRectPtr pbox = dPriv->pClipRects; - int nbox = dPriv->numClipRects; - - if( nbox ) - { - int i; - int pitch = i810Screen->auxPitch; - - int dx = dPriv->auxX - dPriv->x; - int dy = dPriv->auxY - dPriv->y; - int ofs = ( i810Screen->backOffset + - dy * i810Screen->auxPitch + - dx * i810Screen->cpp); - - unsigned int BR13 = ((i810Screen->fbStride) | - (0xCC << 16)); - - - for (i=0; i < nbox; i++, pbox++) { - int w = pbox->x2 - pbox->x1; - int h = pbox->y2 - pbox->y1; - - int start = ofs + pbox->x1*i810Screen->cpp + pbox->y1*pitch; - int dst = pbox->x1*i810Screen->cpp + pbox->y1*i810Screen->fbStride; - - if (I810_DEBUG&DEBUG_VERBOSE_2D) - fprintf(stderr, "i810BackToFront %d,%d-%dx%d\n", - pbox->x1,pbox->y1,w,h); - - { - BEGIN_BATCH( imesa, 6 ); - OUT_BATCH( BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4 ); - OUT_BATCH( BR13 ); /* dest pitch, rop */ - - OUT_BATCH( (h << 16) | (w * i810Screen->cpp)); - OUT_BATCH( dst ); - - OUT_BATCH( pitch ); /* src pitch */ - OUT_BATCH( start ); - ADVANCE_BATCH(); - } - } - } - - return Success; -} - - -/* - * ClearBox - * - * Add hardware commands to draw a filled box for the debugging - * display. These are drawn into the current drawbuffer, so should - * work with both front and backbuffer rendering. (However, it - * is only ever called on swapbuffer - ie backbuffer rendering). - */ -static void ClearBox( i810ContextPtr imesa, - int cx, int cy, int cw, int ch, - int r, int g, int b ) -{ - __DRIdrawablePrivate *dPriv = imesa->driDrawable; - i810ScreenPrivate *i810Screen = imesa->i810Screen; - - int _nc = imesa->numClipRects; - - while (_nc--) { - int x1 = cx + dPriv->x; - int y1 = cy + dPriv->y; - int x2 = x1 + cw; - int y2 = y1 + ch; - - if (imesa->needClip) { - int rx1 = imesa->pClipRects[_nc].x1; - int ry1 = imesa->pClipRects[_nc].y1; - int rx2 = imesa->pClipRects[_nc].x2; - int ry2 = imesa->pClipRects[_nc].y2; - - - if (x2 < rx1) continue; - if (y2 < ry1) continue; - if (x1 > rx2) continue; - if (y1 > ry2) continue; - if (x1 < rx1) x1 = rx1; - if (y1 < ry1) y1 = ry1; - if (x2 > rx2) x2 = rx2; - if (y2 > ry2) y2 = ry2; - } - - - { - int start = (imesa->drawOffset + - y1 * i810Screen->auxPitch + - x1 * i810Screen->cpp); - - BEGIN_BATCH( imesa, 6 ); - - OUT_BATCH( BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3 ); - OUT_BATCH( BR13_SOLID_PATTERN | - (0xF0 << 16) | - i810Screen->auxPitch ); - OUT_BATCH( ((y2-y1) << 16) | ((x2-x1) * i810Screen->cpp)); - OUT_BATCH( start ); - OUT_BATCH( i810PackColor( i810Screen->fbFormat, r, g, b, 0 ) ); - OUT_BATCH( 0 ); - - if (I810_DEBUG&DEBUG_VERBOSE_2D) - fprintf(stderr, "box %d,%x %d,%d col %x (%d,%d,%d)\n", - (int)x1,(int)y1, (int)x2,(int)y2, - (int)i810PackColor( i810Screen->fbFormat, r, g, b, 0 ), - (int)r, (int)g, (int)b); - - ADVANCE_BATCH(); - } - } -} - - -/* - * performanceBoxes - * Draw some small boxesin the corner of the buffer - * based on some performance information - */ -static void i810PerformanceBoxes( i810ContextPtr imesa ) { - - - /* draw a box to show we are active, so if it is't seen it means - that it is completely software based. Purple is traditional for - direct rendering */ - ClearBox( imesa, 4, 4, 8, 8, 255, 0, 255 ); - - /* draw a red box if we had to wait for drawing to complete - (software render or texture swap) */ - if ( i810glx.c_drawWaits ) { - ClearBox( imesa, 16, 4, 8, 8, 255, 0, 0 ); - i810glx.c_drawWaits = 0; - } - - /* draw a blue box if the 3d context was lost - */ - if ( i810glx.c_ctxlost ) { - ClearBox( imesa, 28, 4, 8, 8, 0, 0, 255 ); - i810glx.c_ctxlost = 0; - } - - /* draw an orange box if texture state was stomped */ - if ( i810glx.c_texlost ) { - ClearBox( imesa, 40, 4, 8, 8, 255, 128, 0 ); - i810glx.c_texlost = 0; - } - - /* draw a yellow box if textures were swapped */ - if ( i810glx.c_textureSwaps ) { - ClearBox( imesa, 56, 4, 8, 8, 255, 255, 0 ); - i810glx.c_textureSwaps = 0; - } - - /* draw a green box if we had to wait for dma to complete (full utilization) - on the previous frame */ - if ( !i810glx.hardwareWentIdle ) { - ClearBox( imesa, 72, 4, 8, 8, 0, 255, 0 ); - } - i810glx.hardwareWentIdle = 0; - -#if 0 - /* show buffer utilization */ - if ( i810glx.c_dmaFlush > 1 ) { - /* draw a solid bar if we flushed more than one buffer */ - ClearBox( imesa, 4, 16, 252, 4, 255, 32, 32 ); - } else { - /* draw bars to represent the utilization of primary and - secondary buffers */ - ClearBox( imesa, 4, 16, 252, 4, 32, 32, 32 ); - t = i810glx.dma_buffer->mem.Size; - w = 252 * i810glx.dma_buffer->head / t; - if ( w < 1 ) { - w = 1; - } - ClearBox( imesa, 4, 16, w, 4, 196, 128, 128 ); - } -#endif - - i810glx.c_dmaFlush = 0; -} - - -static void i810SendDmaFlush( i810ContextPtr imesa ) -{ - BEGIN_BATCH( imesa, 2 ); - OUT_BATCH( INST_PARSER_CLIENT | INST_OP_FLUSH ); - OUT_BATCH( 0 ); - ADVANCE_BATCH(); -} - -void i810SwapBuffers( i810ContextPtr imesa ) -{ - if (I810_DEBUG & DEBUG_VERBOSE_API) - fprintf(stderr, "i810SwapBuffers()\n"); - - LOCK_HARDWARE( imesa ); - i810SendDmaFlush( imesa ); - if ( i810glx.boxes ) - i810PerformanceBoxes( imesa ); - i810BackToFront( imesa ); - - /* Check if we are emitting thousands of tiny frames, and if so - * throttle them. Would be better to simply go to sleep until - * our stuff had cleared, rather than polling. A dma solution - * should provide for this. - */ - if (imesa->lastSwap >= imesa->sarea->lastWrap && - imesa->lastSwap >= imesa->sarea->lastSync) { - - if (I810_DEBUG & DEBUG_VERBOSE_API) - fprintf(stderr, "."); - - _I810Sync( imesa ); - } - - imesa->lastSwap = imesa->sarea->lastSync; - if (imesa->sarea->lastWrap > imesa->lastSwap) - imesa->lastSwap = imesa->sarea->lastWrap; - - - UNLOCK_HARDWARE( imesa ); - -/* XSync(imesa->display, 0); */ -} diff --git a/xc/lib/GL/mesa/src/drv/i810/i810swap.h b/xc/lib/GL/mesa/src/drv/i810/i810swap.h deleted file mode 100644 index 1657a717d..000000000 --- a/xc/lib/GL/mesa/src/drv/i810/i810swap.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef I810_SWAP_H -#define I810_SWAP_H - -extern void i810SwapBuffers( i810ContextPtr imesa ); - -#endif diff --git a/xc/lib/GL/mesa/src/drv/i810/i810tex.c b/xc/lib/GL/mesa/src/drv/i810/i810tex.c index 039c0af59..8c88f2b2b 100644 --- a/xc/lib/GL/mesa/src/drv/i810/i810tex.c +++ b/xc/lib/GL/mesa/src/drv/i810/i810tex.c @@ -28,9 +28,10 @@ #include <GL/gl.h> #include "mm.h" -#include "i810lib.h" +#include "i810context.h" #include "i810tex.h" #include "i810log.h" +#include "i810ioctl.h" #include "simple_list.h" #include "enums.h" @@ -204,6 +205,7 @@ static i810TextureObjectPtr i810CreateTexObj(i810ContextPtr imesa, log_pitch++; t->dirty_images = 0; + t->bound = 0; for ( height = i = 0 ; i < I810_TEX_MAXLEVELS && tObj->Image[i] ; i++ ) { t->image[i].image = tObj->Image[i]; @@ -278,24 +280,24 @@ static i810TextureObjectPtr i810CreateTexObj(i810ContextPtr imesa, void i810DestroyTexObj(i810ContextPtr imesa, i810TextureObjectPtr t) { - int i; if (!t) return; /* This is sad - need to sync *in case* we upload a texture * to this newly free memory... */ if (t->MemBlock) { - imesa->dirty |= I810_REQUIRE_QUIESCENT; mmFreeMem(t->MemBlock); - t->MemBlock = 0; + t->MemBlock = 0; + + if (t->age > imesa->dirtyAge) + imesa->dirtyAge = t->age; } if (t->globj) t->globj->DriverData = 0; - for ( i = 0 ; i < 2 ; i++ ) - if ( imesa->CurrentTexObj[i] == t ) - imesa->CurrentTexObj[i] = 0; + if (t->bound) + imesa->CurrentTexObj[t->bound - 1] = 0; remove_from_list(t); free(t); @@ -305,9 +307,11 @@ void i810DestroyTexObj(i810ContextPtr imesa, i810TextureObjectPtr t) static void i810SwapOutTexObj(i810ContextPtr imesa, i810TextureObjectPtr t) { if (t->MemBlock) { - imesa->dirty |= I810_REQUIRE_QUIESCENT; mmFreeMem(t->MemBlock); t->MemBlock = 0; + + if (t->age > imesa->dirtyAge) + imesa->dirtyAge = t->age; } t->dirty_images = ~0; @@ -413,13 +417,28 @@ static void i810UploadTexLevel( i810TextureObjectPtr t, int level ) } break; + case GL_ALPHA: + { + GLushort *dst = (GLushort *)(t->BufAddr + t->image[level].offset); + GLubyte *src = (GLubyte *)image->Data; + i810Msg(10," CopyA: %p %p\n", dst, src); + + for (j = 0 ; j < image->Height ; j++, dst += (t->Pitch/2)) { + for (i = 0 ; i < image->Width ; i++) { + dst[i] = I810PACKCOLOR4444(255,255,255,src[0]); + src += 1; + } + } + } + break; + /* TODO: Translate color indices *now*: */ case GL_COLOR_INDEX: { GLubyte *dst = (GLubyte *)(t->BufAddr + t->image[level].offset); GLubyte *src = (GLubyte *)image->Data; - i810Msg(10," CopyIndex %p %p\n", dst, src); + i810Msg(10," CopyIndex: %p %p\n", dst, src); for (j = 0 ; j < image->Height ; j++, dst += t->Pitch) { for (i = 0 ; i < image->Width ; i++) { @@ -431,8 +450,8 @@ static void i810UploadTexLevel( i810TextureObjectPtr t, int level ) break; default: - i810Error("Not supported texture format %d\n",(int)image->Format); - exit(1); + i810Error("Not supported texture format %s\n", + gl_lookup_enum_by_nr(image->Format)); } } @@ -449,13 +468,19 @@ void i810PrintLocalLRU( i810ContextPtr imesa ) t->MemBlock->ofs / sz, t->MemBlock->ofs, t->MemBlock->size); + else + fprintf(stderr, "Texture (bound %d) at %x sz %x\n", + t->bound, + t->MemBlock->ofs, + t->MemBlock->size); + } } void i810PrintGlobalLRU( i810ContextPtr imesa ) { int i, j; - i810TexRegion *list = imesa->sarea->texList; + drm_i810_tex_region_t *list = imesa->sarea->texList; for (i = 0, j = I810_NR_TEX_REGIONS ; i < I810_NR_TEX_REGIONS ; i++) { fprintf(stderr, "list[%d] age %d next %d prev %d\n", @@ -471,7 +496,7 @@ void i810PrintGlobalLRU( i810ContextPtr imesa ) void i810ResetGlobalLRU( i810ContextPtr imesa ) { - i810TexRegion *list = imesa->sarea->texList; + drm_i810_tex_region_t *list = imesa->sarea->texList; int sz = 1 << imesa->i810Screen->logTextureGranularity; int i; @@ -481,7 +506,7 @@ void i810ResetGlobalLRU( i810ContextPtr imesa ) * when looking up objects at a particular location in texture * memory. */ - for (i = 0 ; (i+1) * sz < imesa->i810Screen->textureSize ; i++) { + for (i = 0 ; (i+1) * sz <= imesa->i810Screen->textureSize ; i++) { list[i].prev = i-1; list[i].next = i+1; list[i].age = 0; @@ -503,7 +528,7 @@ static void i810UpdateTexLRU( i810ContextPtr imesa, i810TextureObjectPtr t ) int logsz = imesa->i810Screen->logTextureGranularity; int start = t->MemBlock->ofs >> logsz; int end = (t->MemBlock->ofs + t->MemBlock->size - 1) >> logsz; - i810TexRegion *list = imesa->sarea->texList; + drm_i810_tex_region_t *list = imesa->sarea->texList; imesa->texAge = ++imesa->sarea->texAge; @@ -556,7 +581,7 @@ void i810TexturesGone( i810ContextPtr imesa, /* It overlaps - kick it off. Need to hold onto the currently bound * objects, however. */ - if (t == imesa->CurrentTexObj[0] || t == imesa->CurrentTexObj[1]) + if (t->bound) i810SwapOutTexObj( imesa, t ); else i810DestroyTexObj( imesa, t ); @@ -583,7 +608,6 @@ int i810UploadTexImages( i810ContextPtr imesa, i810TextureObjectPtr t ) { int i; int ofs; - i810glx.c_textureSwaps++; /* Do we need to eject LRU texture objects? */ @@ -594,18 +618,24 @@ int i810UploadTexImages( i810ContextPtr imesa, i810TextureObjectPtr t ) if (t->MemBlock) break; + if (imesa->TexObjList.prev->bound) { + fprintf(stderr, "Hit bound texture in upload\n"); + i810PrintLocalLRU( imesa ); + return -1; + } + if (imesa->TexObjList.prev == &(imesa->TexObjList)) { - fprintf(stderr, "Failed to upload texture, sz %d\n", t->totalSize); + fprintf(stderr, "Failed to upload texture, sz %d\n", t->totalSize); mmDumpMemInfo( imesa->texHeap ); return -1; } - + i810DestroyTexObj( imesa, imesa->TexObjList.prev ); } ofs = t->MemBlock->ofs; t->Setup[I810_TEXREG_MI3] = imesa->i810Screen->textureOffset + ofs; - t->BufAddr = i810glx.texVirtual + ofs; + t->BufAddr = imesa->i810Screen->tex.map + ofs; imesa->dirty |= I810_UPLOAD_CTX; } @@ -613,6 +643,14 @@ int i810UploadTexImages( i810ContextPtr imesa, i810TextureObjectPtr t ) */ i810UpdateTexLRU( imesa, t ); + if (I810_DEBUG & DEBUG_VERBOSE_LRU) + fprintf(stderr, "dispatch age: %d age freed memory: %d\n", + GET_DISPATCH_AGE(imesa), imesa->dirtyAge); + + if (imesa->dirtyAge >= GET_DISPATCH_AGE(imesa)) + i810WaitAgeLocked( imesa, imesa->dirtyAge ); + + if (t->dirty_images) { if (I810_DEBUG & DEBUG_VERBOSE_LRU) fprintf(stderr, "*"); @@ -694,21 +732,37 @@ static void i810UpdateTex0State( GLcontext *ctx ) if (t->dirty_images) imesa->dirty |= I810_UPLOAD_TEX0IMAGE; - + imesa->CurrentTexObj[0] = t; + t->bound = 1; + + if (t->MemBlock) + i810UpdateTexLRU( imesa, t ); switch (ctx->Texture.Unit[0].EnvMode) { - case GL_REPLACE: - imesa->Setup[I810_CTXREG_MC0] = ( GFX_OP_MAP_COLOR_STAGES | - MC_STAGE_0 | - MC_UPDATE_DEST | - MC_DEST_CURRENT | - MC_UPDATE_ARG1 | - MC_ARG1_TEX0_COLOR | - MC_UPDATE_ARG2 | - MC_ARG2_ONE | - MC_UPDATE_OP | - MC_OP_ARG1 ); + case GL_REPLACE: + if (t->image[0].internalFormat == GL_ALPHA) + imesa->Setup[I810_CTXREG_MC0] = ( GFX_OP_MAP_COLOR_STAGES | + MC_STAGE_0 | + MC_UPDATE_DEST | + MC_DEST_CURRENT | + MC_UPDATE_ARG1 | + MC_ARG1_TEX0_COLOR | + MC_UPDATE_ARG2 | + MC_ARG2_ITERATED_COLOR | + MC_UPDATE_OP | + MC_OP_ARG2 ); + else + imesa->Setup[I810_CTXREG_MC0] = ( GFX_OP_MAP_COLOR_STAGES | + MC_STAGE_0 | + MC_UPDATE_DEST | + MC_DEST_CURRENT | + MC_UPDATE_ARG1 | + MC_ARG1_TEX0_COLOR | + MC_UPDATE_ARG2 | + MC_ARG2_ONE | + MC_UPDATE_OP | + MC_OP_ARG1 ); if (t->image[0].internalFormat == GL_RGB) { ma_modulate_op = MA_OP_ARG1; @@ -812,16 +866,28 @@ static void i810UpdateTex0State( GLcontext *ctx ) MA_OP_ARG1 ); break; case GL_BLEND: - imesa->Setup[I810_CTXREG_MC0] = ( GFX_OP_MAP_COLOR_STAGES | - MC_STAGE_0 | - MC_UPDATE_DEST | - MC_DEST_CURRENT | - MC_UPDATE_ARG1 | - MC_ARG1_COLOR_FACTOR | - MC_UPDATE_ARG2 | - MC_ARG2_ITERATED_COLOR | - MC_UPDATE_OP | - MC_OP_LIN_BLEND_TEX0_COLOR ); + if (t->image[0].internalFormat == GL_ALPHA) + imesa->Setup[I810_CTXREG_MC0] = ( GFX_OP_MAP_COLOR_STAGES | + MC_STAGE_0 | + MC_UPDATE_DEST | + MC_DEST_CURRENT | + MC_UPDATE_ARG1 | + MC_ARG1_TEX0_COLOR | + MC_UPDATE_ARG2 | + MC_ARG2_ITERATED_COLOR | + MC_UPDATE_OP | + MC_OP_ARG2 ); + else + imesa->Setup[I810_CTXREG_MC0] = ( GFX_OP_MAP_COLOR_STAGES | + MC_STAGE_0 | + MC_UPDATE_DEST | + MC_DEST_CURRENT | + MC_UPDATE_ARG1 | + MC_ARG1_COLOR_FACTOR | + MC_UPDATE_ARG2 | + MC_ARG2_ITERATED_COLOR | + MC_UPDATE_OP | + MC_OP_LIN_BLEND_TEX0_COLOR ); if (t->image[0].internalFormat == GL_RGB) { imesa->Setup[I810_CTXREG_MA0] = ( GFX_OP_MAP_ALPHA_STAGES | @@ -911,7 +977,10 @@ static void i810UpdateTex1State( GLcontext *ctx ) imesa->dirty |= I810_UPLOAD_TEX1IMAGE; imesa->CurrentTexObj[1] = t; + t->bound = 2; + if (t->MemBlock) + i810UpdateTexLRU( imesa, t ); switch (ctx->Texture.Unit[1].EnvMode) { case GL_REPLACE: @@ -1078,11 +1147,15 @@ static void i810UpdateTex1State( GLcontext *ctx ) void i810UpdateTextureState( GLcontext *ctx ) { i810ContextPtr imesa = I810_CONTEXT(ctx); + if (imesa->CurrentTexObj[0]) imesa->CurrentTexObj[0]->bound = 0; + if (imesa->CurrentTexObj[1]) imesa->CurrentTexObj[1]->bound = 0; imesa->CurrentTexObj[0] = 0; - imesa->CurrentTexObj[1] = 0; + imesa->CurrentTexObj[1] = 0; i810UpdateTex0State( ctx ); i810UpdateTex1State( ctx ); - I810_CONTEXT( ctx )->dirty |= I810_UPLOAD_CTX; + I810_CONTEXT( ctx )->dirty |= (I810_UPLOAD_CTX | + I810_UPLOAD_TEX0 | + I810_UPLOAD_TEX1); } @@ -1091,25 +1164,30 @@ void i810UpdateTextureState( GLcontext *ctx ) * DRIVER functions *****************************************/ -static void i810TexEnv( GLcontext *ctx, GLenum pname, const GLfloat *param ) +static void i810TexEnv( GLcontext *ctx, GLenum target, + GLenum pname, const GLfloat *param ) { i810ContextPtr imesa = I810_CONTEXT( ctx ); if (pname == GL_TEXTURE_ENV_MODE) { + FLUSH_BATCH(imesa); imesa->new_state |= I810_NEW_TEXTURE; } else if (pname == GL_TEXTURE_ENV_COLOR) { struct gl_texture_unit *texUnit = &ctx->Texture.Unit[ctx->Texture.CurrentUnit]; - GLubyte c[4]; + GLfloat *fc = texUnit->EnvColor; GLuint col; - FLOAT_RGBA_TO_UBYTE_RGBA(texUnit->EnvColor, c); - col = (c[3]<<24) | (c[0]<<16) | (c[1]<<8) | (c[2]); + col = ((((GLubyte)fc[3])<<24) | + (((GLubyte)fc[0])<<16) | + (((GLubyte)fc[1])<<8) | + (((GLubyte)fc[2])<<0)); if (imesa->Setup[I810_CTXREG_CF1] != col) { + FLUSH_BATCH(imesa); imesa->Setup[I810_CTXREG_CF1] = col; imesa->dirty |= I810_UPLOAD_CTX; } @@ -1137,6 +1215,7 @@ static void i810TexImage( GLcontext *ctx, t = (i810TextureObjectPtr) tObj->DriverData; if (t) { + if (t->bound) FLUSH_BATCH(imesa); /* if this is the current object, it will force an update */ i810DestroyTexObj( imesa, t ); tObj->DriverData = 0; @@ -1163,10 +1242,10 @@ static void i810TexSubImage( GLcontext *ctx, GLenum target, t = (i810TextureObjectPtr) tObj->DriverData; if (t) { + if (t->bound) FLUSH_BATCH( imesa ); i810DestroyTexObj( imesa, t ); tObj->DriverData = 0; imesa->new_state |= I810_NEW_TEXTURE; - i810glx.c_textureSwaps++; } } @@ -1183,15 +1262,18 @@ static void i810TexParameter( GLcontext *ctx, GLenum target, switch (pname) { case GL_TEXTURE_MIN_FILTER: case GL_TEXTURE_MAG_FILTER: + if (t->bound) FLUSH_BATCH( imesa ); i810SetTexFilter(t,tObj->MinFilter,tObj->MagFilter); break; case GL_TEXTURE_WRAP_S: case GL_TEXTURE_WRAP_T: + if (t->bound) FLUSH_BATCH( imesa ); i810SetTexWrapping(t,tObj->WrapS,tObj->WrapT); break; case GL_TEXTURE_BORDER_COLOR: + if (t->bound) FLUSH_BATCH( imesa ); i810SetTexBorderColor(t,tObj->BorderColor); break; @@ -1206,7 +1288,14 @@ static void i810BindTexture( GLcontext *ctx, GLenum target, struct gl_texture_object *tObj ) { i810ContextPtr imesa = I810_CONTEXT( ctx ); - imesa->CurrentTexObj[ctx->Texture.CurrentUnit] = 0; + + FLUSH_BATCH(imesa); + + if (imesa->CurrentTexObj[ctx->Texture.CurrentUnit]) { + imesa->CurrentTexObj[ctx->Texture.CurrentUnit]->bound = 0; + imesa->CurrentTexObj[ctx->Texture.CurrentUnit] = 0; + } + imesa->new_state |= I810_NEW_TEXTURE; } @@ -1216,6 +1305,13 @@ static void i810DeleteTexture( GLcontext *ctx, struct gl_texture_object *tObj ) i810ContextPtr imesa = I810_CONTEXT( ctx ); if (t) { + + if (t->bound) { + FLUSH_BATCH(imesa); + imesa->CurrentTexObj[t->bound-1] = 0; + imesa->new_state |= I810_NEW_TEXTURE; + } + i810DestroyTexObj(imesa,t); tObj->DriverData=0; } diff --git a/xc/lib/GL/mesa/src/drv/i810/i810tex.h b/xc/lib/GL/mesa/src/drv/i810/i810tex.h index d2b153ad8..a16733ec1 100644 --- a/xc/lib/GL/mesa/src/drv/i810/i810tex.h +++ b/xc/lib/GL/mesa/src/drv/i810/i810tex.h @@ -61,10 +61,11 @@ struct i810_texture_object_t { int Height; int texelBytes; int totalSize; + int bound; PMemBlock MemBlock; char *BufAddr; - + GLuint min_level; GLuint max_level; GLuint dirty_images; @@ -87,8 +88,6 @@ struct i810_texture_object_t { #define I810_UPDATE_PALETTE 0x2 #define I810_FALLBACK_PALETTE 0x4 -typedef struct i810_texture_object_t *i810TextureObjectPtr; - void i810UpdateTextureState( GLcontext *ctx ); void i810DDInitTextureFuncs( GLcontext *ctx ); diff --git a/xc/lib/GL/mesa/src/drv/i810/i810tris.c b/xc/lib/GL/mesa/src/drv/i810/i810tris.c index 08e012c66..df28991f1 100644 --- a/xc/lib/GL/mesa/src/drv/i810/i810tris.c +++ b/xc/lib/GL/mesa/src/drv/i810/i810tris.c @@ -26,35 +26,17 @@ #include <stdio.h> #include <math.h> +#include "types.h" #include "vb.h" #include "pipeline.h" #include "mm.h" -#include "i810lib.h" #include "i810tris.h" #include "i810vb.h" #include "i810log.h" - -static void i810_null_quad( GLcontext *ctx, GLuint v0, - GLuint v1, GLuint v2, GLuint v3, GLuint pv ) -{ -} - -static void i810_null_triangle( GLcontext *ctx, GLuint v0, - GLuint v1, GLuint v2, GLuint pv ) -{ -} - -static void i810_null_line( GLcontext *ctx, GLuint v1, GLuint v2, GLuint pv ) -{ -} - -static void i810_null_points( GLcontext *ctx, GLuint first, GLuint last ) -{ -} - - +/* Used in i810tritmp.h + */ #define I810_COLOR(to, from) { \ (to)[0] = (from)[2]; \ (to)[1] = (from)[1]; \ @@ -69,17 +51,6 @@ static quad_func quad_tab[0x20]; static line_func line_tab[0x20]; static points_func points_tab[0x20]; -void i810PrintRenderState( const char *msg, GLuint state ) -{ - fprintf(stderr, "%s: (%x) %s%s%s%s%s%s\n", - msg, (int) state, - (state & I810_FLAT_BIT) ? "flat, " : "", - (state & I810_OFFSET_BIT) ? "offset, " : "", - (state & I810_TWOSIDE_BIT) ? "twoside, " : "", - (state & I810_ANTIALIAS_BIT) ? "antialias, " : "", - (state & I810_NODRAW_BIT) ? "no-draw, " : "", - (state & I810_FALLBACK_BIT) ? "fallback" : ""); -} #define IND (0) #define TAG(x) x @@ -89,33 +60,32 @@ void i810PrintRenderState( const char *msg, GLuint state ) #define TAG(x) x##_flat #include "i810tritmp.h" -#define IND (I810_OFFSET_BIT) +#define IND (I810_OFFSET_BIT) /* wide */ #define TAG(x) x##_offset #include "i810tritmp.h" -#define IND (I810_OFFSET_BIT|I810_FLAT_BIT) +#define IND (I810_OFFSET_BIT|I810_FLAT_BIT) /* wide|flat */ #define TAG(x) x##_offset_flat #include "i810tritmp.h" -#define IND (I810_TWOSIDE_BIT) +#define IND (I810_TWOSIDE_BIT) /* stipple */ #define TAG(x) x##_twoside #include "i810tritmp.h" -#define IND (I810_TWOSIDE_BIT|I810_FLAT_BIT) +#define IND (I810_TWOSIDE_BIT|I810_FLAT_BIT) /* stipple|flat */ #define TAG(x) x##_twoside_flat #include "i810tritmp.h" -#define IND (I810_TWOSIDE_BIT|I810_OFFSET_BIT) +#define IND (I810_TWOSIDE_BIT|I810_OFFSET_BIT) /* stipple|wide */ #define TAG(x) x##_twoside_offset #include "i810tritmp.h" -#define IND (I810_TWOSIDE_BIT|I810_OFFSET_BIT|I810_FLAT_BIT) +#define IND (I810_TWOSIDE_BIT|I810_OFFSET_BIT|I810_FLAT_BIT) /* stip|wide|flat*/ #define TAG(x) x##_twoside_offset_flat #include "i810tritmp.h" void i810DDTrifuncInit() { - int i; init(); init_flat(); init_offset(); @@ -124,128 +94,9 @@ void i810DDTrifuncInit() init_twoside_flat(); init_twoside_offset(); init_twoside_offset_flat(); - - /* Hmmm... - */ - for (i = 0 ; i < 0x20 ; i++) { - if (i & ~I810_FLAT_BIT) { - points_tab[i] = points_tab[i&I810_FLAT_BIT]; - line_tab[i] = line_tab[i&I810_FLAT_BIT]; - } - } - - for (i = 0 ; i < 0x20 ; i++) - if ((i & (I810_NODRAW_BIT|I810_FALLBACK_BIT)) == I810_NODRAW_BIT || - i810glx.nullprims) - { - quad_tab[i] = i810_null_quad; - tri_tab[i] = i810_null_triangle; - line_tab[i] = i810_null_line; - points_tab[i] = i810_null_points; - } - - if (i810glx.noFallback) { - for (i = 0 ; i < 0x10 ; i++) { - points_tab[i|I810_FALLBACK_BIT] = points_tab[i]; - line_tab[i|I810_FALLBACK_BIT] = line_tab[i]; - tri_tab[i|I810_FALLBACK_BIT] = tri_tab[i]; - quad_tab[i|I810_FALLBACK_BIT] = quad_tab[i]; - } - } - } -/* Everything is done via single triangle instructiopns at the moment; - * this can change fairly easily. - */ -#if I810_USE_BATCH - -GLuint *i810AllocPrimitiveVerts( i810ContextPtr imesa, int dwords ) -{ - GLuint orig_dwords = dwords; - - dwords+=2; - dwords&=~1; - - while (1) { - if (i810glx.dma_buffer->space < dwords * 4) - { - if (I810_DEBUG & DEBUG_VERBOSE_RING) - fprintf(stderr, "i810AllocPrimitiveVerts: dma buffer overflow\n"); - i810DmaOverflow( dwords ); - } - else - { - GLuint start = i810glx.dma_buffer->head; - i810glx.dma_buffer->head += dwords * 4; - i810glx.dma_buffer->space -= dwords * 4; - - if ((orig_dwords & 1) == 0) { - *(GLuint *)(i810glx.dma_buffer->virtual_start + start ) = 0; - start += 4; - } - - *(GLuint *)(i810glx.dma_buffer->virtual_start + start ) = - GFX_OP_PRIMITIVE | PR_TRIANGLES | (orig_dwords-1); - - return (GLuint *)(i810glx.dma_buffer->virtual_start + start + 4); - } - } -} - -#else - -/* Hardware lock is held. - */ -GLuint *i810AllocPrimitiveVerts( i810ContextPtr imesa, int dwords ) -{ - GLuint orig_dwords = dwords; - - dwords+=2; - dwords&=~1; - - while (1) - { - BEGIN_LP_RING( imesa, dwords ); - - if (outring + dwords * 4 != ((outring + dwords * 4) & ringmask)) - { - int i; - - if (I810_DEBUG & DEBUG_VERBOSE_RING) - fprintf(stderr, "\n\nwrap case in i810AllocPrimitiveVerts\n\n"); - - for (i = 0 ; i < dwords ; i++) - OUT_RING( 0 ); - ADVANCE_LP_RING(); - } - else - { - i810glx.LpRing.tail = outring + dwords * 4; - - if ((orig_dwords & 1) == 0) - OUT_RING(0); - - OUT_RING( GFX_OP_PRIMITIVE | PR_TRIANGLES | (orig_dwords-1) ); - return (GLuint *)(virt + outring); - } - } -} - -#if 0 -void i810FinishPrim( void ) -{ - char *virt = i810glx.LpRing.virtual_start; - - for (i = i810glx.LpRing.head ; i != i810glx.LpRing.tail ; i += 4) - fprintf(stderr, "prim %x (%f)", *(virt + i), *(float *)(virt + i)); - - OUTREG(LP_RING + RING_TAIL, i810glx.LpRing.tail); -} -#endif -#endif - void i810DDChooseRenderState( GLcontext *ctx ) @@ -253,50 +104,41 @@ void i810DDChooseRenderState( GLcontext *ctx ) i810ContextPtr imesa = I810_CONTEXT( ctx ); GLuint flags = ctx->TriangleCaps; - ctx->IndirectTriangles &= ~DD_SW_RASTERIZE; + imesa->IndirectTriangles = 0; if (flags) { GLuint ind = 0; GLuint shared = 0; - GLuint setup = imesa->setupindex; - GLuint fallback = I810_FALLBACK_BIT; - - if (i810glx.noFallback) fallback = 0; - if ((flags & DD_FLATSHADE) && (setup & I810_RGBA_BIT)) shared |= I810_FLAT_BIT; - if (flags & DD_MULTIDRAW) shared |= fallback; + if (flags & DD_FLATSHADE) shared |= I810_FLAT_BIT; + if (flags & DD_MULTIDRAW) shared |= I810_FALLBACK_BIT; if (flags & DD_SELECT) shared |= I810_FALLBACK_BIT; if (flags & DD_FEEDBACK) shared |= I810_FALLBACK_BIT; - ind = shared; - if (flags & DD_POINT_SMOOTH) ind |= I810_ANTIALIAS_BIT; - if (flags & DD_POINT_ATTEN) ind |= fallback; - - imesa->renderindex = ind; - imesa->PointsFunc = points_tab[ind]; - if (ind & I810_FALLBACK_BIT) - ctx->IndirectTriangles |= DD_POINT_SW_RASTERIZE; + imesa->renderindex = shared; + imesa->PointsFunc = points_tab[shared]; ind = shared; - if (flags & DD_LINE_SMOOTH) ind |= I810_ANTIALIAS_BIT; - if (flags & DD_LINE_STIPPLE) ind |= fallback; + if (flags & DD_LINE_WIDTH) ind |= I810_WIDE_LINE_BIT; + if (flags & DD_LINE_STIPPLE) ind |= I810_FALLBACK_BIT; imesa->renderindex |= ind; imesa->LineFunc = line_tab[ind]; if (ind & I810_FALLBACK_BIT) - ctx->IndirectTriangles |= DD_LINE_SW_RASTERIZE; + imesa->IndirectTriangles |= DD_LINE_SW_RASTERIZE; ind = shared; - if (flags & DD_TRI_SMOOTH) ind |= I810_ANTIALIAS_BIT; if (flags & DD_TRI_OFFSET) ind |= I810_OFFSET_BIT; if (flags & DD_TRI_LIGHT_TWOSIDE) ind |= I810_TWOSIDE_BIT; - if (flags & (DD_TRI_UNFILLED|DD_TRI_STIPPLE)) ind |= fallback; + if (flags & DD_TRI_UNFILLED) ind |= I810_FALLBACK_BIT; + if ((flags & DD_TRI_STIPPLE) && + (ctx->IndirectTriangles & DD_TRI_STIPPLE)) ind |= I810_FALLBACK_BIT; imesa->renderindex |= ind; imesa->TriangleFunc = tri_tab[ind]; imesa->QuadFunc = quad_tab[ind]; if (ind & I810_FALLBACK_BIT) - ctx->IndirectTriangles |= (DD_TRI_SW_RASTERIZE|DD_QUAD_SW_RASTERIZE); + imesa->IndirectTriangles |= (DD_TRI_SW_RASTERIZE|DD_QUAD_SW_RASTERIZE); } else if (imesa->renderindex) { @@ -307,9 +149,9 @@ void i810DDChooseRenderState( GLcontext *ctx ) imesa->QuadFunc = quad_tab[0]; } + if (I810_DEBUG&DEBUG_VERBOSE_API) { gl_print_tri_caps("tricaps", ctx->TriangleCaps); - i810PrintRenderState("i810: Render state", imesa->renderindex); } } diff --git a/xc/lib/GL/mesa/src/drv/i810/i810tris.h b/xc/lib/GL/mesa/src/drv/i810/i810tris.h index 81cdb5159..3b3843683 100644 --- a/xc/lib/GL/mesa/src/drv/i810/i810tris.h +++ b/xc/lib/GL/mesa/src/drv/i810/i810tris.h @@ -27,37 +27,48 @@ #define I810TRIS_INC #include "types.h" -#include "i810dma.h" +#include "i810ioctl.h" extern void i810PrintRenderState( const char *msg, GLuint state ); extern void i810DDChooseRenderState(GLcontext *ctx); extern void i810DDTrifuncInit( void ); -extern GLuint *i810AllocPrimitiveVerts( i810ContextPtr imesa, int dwords ); - - -/* Todo: - * - multidraw, ... - * - Antialiasing (?) - * - line and polygon stipple - * - select and feedback - * - stencil - * - point parameters - * - - */ -#define I810_ANTIALIAS_BIT 0 /* ignored for now, no fallback */ +/* shared */ #define I810_FLAT_BIT 0x1 + +/* triangle */ #define I810_OFFSET_BIT 0x2 #define I810_TWOSIDE_BIT 0x4 -#define I810_NODRAW_BIT 0x8 -#define I810_FALLBACK_BIT 0x10 -/* Not in use: - */ -#define I810_FEEDBACK_BIT 0x20 -#define I810_SELECT_BIT 0x40 -#define I810_POINT_PARAM_BIT 0x80 /* not needed? */ +/* line */ +#define I810_WIDE_LINE_BIT 0x2 +#define I810_STIPPLE_LINE_BIT 0x4 + +/* shared */ +#define I810_FALLBACK_BIT 0x8 + + + + + +static i810_vertex __inline__ *i810AllocTriangles( i810ContextPtr imesa, int nr) +{ + GLuint *start = i810AllocDwords( imesa, 30*nr, PR_TRIANGLES ); + return (i810_vertex *)start; +} + +static i810_vertex __inline__ *i810AllocLine( i810ContextPtr imesa ) +{ + GLuint *start = i810AllocDwords( imesa, 20, PR_LINES ); + return (i810_vertex *)start; +} + +static i810_vertex __inline__ *i810AllocRect( i810ContextPtr imesa ) +{ + GLuint *start = i810AllocDwords( imesa, 30, PR_RECTS ); + return (i810_vertex *)start; +} @@ -66,23 +77,17 @@ static void __inline__ i810_draw_triangle( i810ContextPtr imesa, i810_vertex *v1, i810_vertex *v2 ) { - i810_vertex *wv = (i810_vertex *)i810AllocPrimitiveVerts( imesa, 30 ); + i810_vertex *wv = i810AllocTriangles( imesa, 1 ); wv[0] = *v0; wv[1] = *v1; wv[2] = *v2; - FINISH_PRIM(); } - - -/* These can go soon, but for the meantime we're using triangles for - * everything. - */ static __inline__ void i810_draw_point( i810ContextPtr imesa, i810_vertex *tmp, float sz ) { - i810_vertex *wv = (i810_vertex *)i810AllocPrimitiveVerts( imesa, 6*10 ); + i810_vertex *wv = i810AllocTriangles( imesa, 2 ); wv[0] = *tmp; wv[0].x = tmp->x - sz; @@ -108,16 +113,25 @@ static __inline__ void i810_draw_point( i810ContextPtr imesa, wv[5].x = tmp->x - sz; wv[5].y = tmp->y - sz; - FINISH_PRIM(); } -static __inline__ void i810_draw_line( i810ContextPtr imesa, - i810_vertex *tmp0, - i810_vertex *tmp1, - float width ) +static __inline__ void i810_draw_line_line( i810ContextPtr imesa, + i810_vertex *tmp0, + i810_vertex *tmp1 ) { - i810_vertex *wv = (i810_vertex *)i810AllocPrimitiveVerts( imesa, 6 * 10 ); + i810_vertex *wv = i810AllocLine( imesa ); + wv[0] = *tmp0; + wv[1] = *tmp1; +} + +static __inline__ void i810_draw_tri_line( i810ContextPtr imesa, + i810_vertex *tmp0, + i810_vertex *tmp1, + float width ) +{ + i810_vertex *wv = i810AllocTriangles( imesa, 2 ); + float dx, dy, ix, iy; dx = tmp0->x - tmp1->x; @@ -151,8 +165,15 @@ static __inline__ void i810_draw_line( i810ContextPtr imesa, wv[5] = *tmp1; wv[5].x = tmp1->x + ix; wv[5].y = tmp1->y + iy; +} - FINISH_PRIM(); + +static __inline__ void i810_draw_line( i810ContextPtr imesa, + i810_vertex *tmp0, + i810_vertex *tmp1, + float width ) +{ + i810_draw_line_line( imesa, tmp0, tmp1 ); } #endif diff --git a/xc/lib/GL/mesa/src/drv/i810/i810tritmp.h b/xc/lib/GL/mesa/src/drv/i810/i810tritmp.h index 97c101c17..9d6b43d93 100644 --- a/xc/lib/GL/mesa/src/drv/i810/i810tritmp.h +++ b/xc/lib/GL/mesa/src/drv/i810/i810tritmp.h @@ -63,44 +63,37 @@ static __inline__ void TAG(triangle)( GLcontext *ctx, GLuint e0, } #endif - i810glx.c_triangles++; - - BEGIN_CLIP_LOOP(imesa) - { - i810_vertex *wv = (i810_vertex *)i810AllocPrimitiveVerts( imesa, 30 ); - wv[0] = *v0; + { + i810_vertex *wv = i810AllocTriangles( imesa, 1 ); + wv[0] = *v0; #if (IND & (I810_FLAT_BIT|I810_TWOSIDE_BIT)) - *((int *)(&wv[0].color)) = c0; + *((int *)(&wv[0].color)) = c0; #endif #if (IND & I810_OFFSET_BIT) - wv[0].z = v0->z + offset; + wv[0].z = v0->z + offset; #endif - wv[1] = *v1; + wv[1] = *v1; #if (IND & (I810_FLAT_BIT|I810_TWOSIDE_BIT)) - *((int *)(&wv[1].color)) = c1; + *((int *)(&wv[1].color)) = c1; #endif #if (IND & I810_OFFSET_BIT) - wv[1].z = v1->z + offset; + wv[1].z = v1->z + offset; #endif - wv[2] = *v2; + wv[2] = *v2; #if (IND & (I810_FLAT_BIT|I810_TWOSIDE_BIT)) - *((int *)(&wv[2].color)) = c2; + *((int *)(&wv[2].color)) = c2; #endif #if (IND & I810_OFFSET_BIT) - wv[2].z = v2->z + offset; + wv[2].z = v2->z + offset; #endif - - FINISH_PRIM(); - } - END_CLIP_LOOP(imesa); + } } - static void TAG(quad)( GLcontext *ctx, GLuint v0, GLuint v1, GLuint v2, GLuint v3, GLuint pv ) @@ -109,25 +102,35 @@ static void TAG(quad)( GLcontext *ctx, GLuint v0, TAG(triangle)( ctx, v1, v2, v3, pv ); } - -#if ((IND & ~I810_FLAT_BIT) == 0) - static void TAG(line)( GLcontext *ctx, GLuint v0, GLuint v1, GLuint pv ) { i810ContextPtr imesa = I810_CONTEXT( ctx ); i810VertexPtr i810VB = I810_DRIVER_DATA(ctx->VB)->verts; - i810_vertex tmp0 = i810VB[v0].v; - i810_vertex tmp1 = i810VB[v1].v; - float width = ctx->Line.Width; + int tmp0, tmp1; + (void) tmp0; (void) tmp1; + if (IND & I810_FLAT_BIT) { - *(int *)&tmp1.color = *(int *)&tmp0.color = - *(int *)&i810VB[pv].v.color; - } + tmp0 = *(int *)&i810VB[v0].v.color; + tmp1 = *(int *)&i810VB[v1].v.color; + i810VB[v0].v.color = i810VB[pv].v.color; + i810VB[v1].v.color = i810VB[pv].v.color; + } - BEGIN_CLIP_LOOP(imesa) - i810_draw_line( imesa, &tmp0, &tmp1, width ); - END_CLIP_LOOP(imesa); + if (IND & I810_WIDE_LINE_BIT) + { + i810_draw_tri_line( imesa, &i810VB[v0].v, &i810VB[v1].v, + ctx->Line.Width ); + } + else + { + i810_draw_line_line( imesa, &i810VB[v0].v, &i810VB[v1].v ); + } + + if (IND & I810_FLAT_BIT) { + *(int *)&i810VB[v0].v.color = tmp0; + *(int *)&i810VB[v1].v.color = tmp1; + } } @@ -143,28 +146,22 @@ static void TAG(points)( GLcontext *ctx, GLuint first, GLuint last ) * ctx->Driver.ReducedPrimitiveChange() callback. */ - BEGIN_CLIP_LOOP(imesa) - for(i=first;i<=last;i++) { - if(VB->ClipMask[i]==0) { - i810_vertex *tmp = &i810VB[i].v; - i810_draw_point( imesa, tmp, sz ); - } + for(i=first;i<=last;i++) { + if(VB->ClipMask[i]==0) { + i810_vertex *tmp = &i810VB[i].v; + i810_draw_point( imesa, tmp, sz ); } - END_CLIP_LOOP(imesa); + } } -#endif static void TAG(init)( void ) { tri_tab[IND] = TAG(triangle); quad_tab[IND] = TAG(quad); - -#if ((IND & ~I810_FLAT_BIT) == 0) line_tab[IND] = TAG(line); points_tab[IND] = TAG(points); -#endif } diff --git a/xc/lib/GL/mesa/src/drv/i810/i810vb.c b/xc/lib/GL/mesa/src/drv/i810/i810vb.c index 6ba7eb9a5..6f8d163c4 100644 --- a/xc/lib/GL/mesa/src/drv/i810/i810vb.c +++ b/xc/lib/GL/mesa/src/drv/i810/i810vb.c @@ -23,11 +23,9 @@ * */ -#include "i810lib.h" #include "i810context.h" #include "i810vb.h" #include "i810log.h" -#include "i810dma.h" #include "stages.h" diff --git a/xc/lib/GL/mesa/src/drv/mga/Imakefile b/xc/lib/GL/mesa/src/drv/mga/Imakefile index 18736b079..cbcd09821 100644 --- a/xc/lib/GL/mesa/src/drv/mga/Imakefile +++ b/xc/lib/GL/mesa/src/drv/mga/Imakefile @@ -18,6 +18,15 @@ OS_SUBDIR = linux OS_SUBDIR = bsd #endif +#ifdef i386Architecture +#ifdef MesaUse3DNow + ASM_DEFS = -DUSE_MMX_ASM -DUSE_X86_ASM -DUSE_3DNOW_ASM +#else + ASM_DEFS = -DUSE_MMX_ASM -DUSE_X86_ASM +#endif +#endif + + #if BuildXF86DRI DRI_DEFINES = GlxDefines -DDRIVERTS DRI_INCLUDES = -I../../../../dri -I../../../../glx \ @@ -33,7 +42,7 @@ MESA_INCLUDES = -I. -I.. -I../../include - DEFINES = $(ALLOC_DEFINES) $(DRI_DEFINES) + DEFINES = $(ALLOC_DEFINES) $(DRI_DEFINES) $(ASM_DEFS) INCLUDES = -I$(XLIBSRC) -I$(EXTINCSRC) $(MESA_INCLUDES) $(DRI_INCLUDES) #if 0 @@ -62,13 +71,13 @@ MESA_INCLUDES = -I. -I.. -I../../include MGASRCS = mgaclear.c mgacnvtex.c mgadd.c \ - mgafastpath.c \ + mgafastpath.c mgaeltpath.c \ mgapipeline.c \ mgaspan.c mgastate.c mgatex.c \ mgatris.c mgavb.c mgaioctl.c mga_xmesa.c mgabuffers.c MGAOBJS = mgaclear.o mgacnvtex.o mgadd.o \ - mgafastpath.o \ + mgafastpath.o mgaeltpath.o \ mgapipeline.o \ mgaspan.o mgastate.o mgatex.o \ mgatris.o mgavb.o mgaioctl.o mga_xmesa.o mgabuffers.o @@ -104,7 +113,7 @@ MESA_INCLUDES = -I. -I.. -I../../include ../../glthread.c \ ../../hash.c \ ../../image.c \ - ../../imaging.o \ + ../../imaging.c \ ../../light.c \ ../../lines.c \ ../../logic.c \ @@ -239,8 +248,7 @@ MESA_INCLUDES = -I. -I.. -I../../include MMX_OBJS = ../../X86/mmx_blend.o -XCOMM Disabling 3Dnow code for the time being. -#if 0 +#ifdef MesaUse3DNow 3DNOW_SRCS = ../../X86/3dnow.c \ ../../X86/3dnow_norm_raw.S \ ../../X86/3dnow_xform_masked1.S \ @@ -264,9 +272,9 @@ XCOMM Disabling 3Dnow code for the time being. ../../X86/3dnow_xform_raw3.o \ ../../X86/3dnow_xform_raw4.o \ ../../X86/vertex_3dnow.o -#endif #endif +#endif ASMSRCS = $(X86_SRCS) $(MMX_SRCS) $(3DNOW_SRCS) ASMOBJS = $(X86_OBJS) $(MMX_OBJS) $(3DNOW_OBJS) @@ -278,6 +286,10 @@ XCOMM Disabling 3Dnow code for the time being. OBJS = $(LOWOBJ) $(DRIOBJS) $(DRMOBJS) $(MESAOBJS) $(ASMOBJS) $(COMMONOBJS) $(MGAOBJS) $(HIOBJ) REQUIREDLIBS += -lm +#if !GlxBuiltInMga +REQUIREDLIBS += -L../../../.. -lGL +#endif + #if !GlxUseBuiltInDRIDriver #undef DoNormalLib NormalLibGlx diff --git a/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.c b/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.c index 496c29a05..c6aadc144 100644 --- a/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.c +++ b/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.c @@ -27,7 +27,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. /* * Authors: - * Daryll Strauss <daryll@precisioninsight.com> + * Keith Whitwell <keithw@precisioninsight.com> * */ @@ -36,10 +36,12 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include <X11/Xlibint.h> #include <stdio.h> +#include "drm.h" #include "mga_xmesa.h" #include "context.h" #include "vbxform.h" #include "matrix.h" +#include "mmath.h" #include "simple_list.h" #include "mgadd.h" @@ -49,20 +51,25 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "mgadepth.h" #include "mgatris.h" #include "mgapipeline.h" +#include "mgabuffers.h" #include "xf86dri.h" -#include "mga_dri.h" -#include "mga_drm_public.h" #include "mga_xmesa.h" +#include "mga_dri.h" + #ifndef MGA_DEBUG int MGA_DEBUG = (0 -/* | MGA_DEBUG_ALWAYS_SYNC */ -/* | MGA_DEBUG_VERBOSE_MSG */ +/* | DEBUG_ALWAYS_SYNC */ +/* | DEBUG_VERBOSE_MSG */ +/* | DEBUG_VERBOSE_LRU */ +/* | DEBUG_VERBOSE_DRI */ +/* | DEBUG_VERBOSE_IOCTL */ +/* | DEBUG_VERBOSE_2D */ ); #endif @@ -71,18 +78,7 @@ static mgaContextPtr mgaCtx = 0; mgaGlx_t mgaglx; -static int count_bits(unsigned int n) -{ - int bits = 0; - - while (n > 0) { - if (n & 1) bits++; - n >>= 1; - } - return bits; -} - -/* These functions are accessed by dlsym from dri_mesa_init.c: +/* These functions are accessed externally to the driver: * * XMesaInitDriver * XMesaResetDriver @@ -96,18 +92,12 @@ static int count_bits(unsigned int n) * XMesaSwapBuffers * XMesaMakeCurrent * - * So this is kind of the public interface to the driver. The driver - * uses the X11 mesa driver context as a kind of wrapper around its - * own driver context - but there isn't much justificiation for doing - * it that way - the DRI might as well use a (void *) to refer to the - * driver contexts. Nothing in the X context really gets used. */ - GLboolean XMesaInitDriver(__DRIscreenPrivate *sPriv) { mgaScreenPrivate *mgaScreen; - MGADRIPtr gDRIPriv = (MGADRIPtr)sPriv->pDevPriv; + MGADRIPtr serverInfo = (MGADRIPtr)sPriv->pDevPriv; /* Allocate the private area */ mgaScreen = (mgaScreenPrivate *)Xmalloc(sizeof(mgaScreenPrivate)); @@ -116,30 +106,84 @@ GLboolean XMesaInitDriver(__DRIscreenPrivate *sPriv) mgaScreen->sPriv = sPriv; sPriv->private = (void *)mgaScreen; - mgaScreen->chipset=gDRIPriv->chipset; - mgaScreen->width=gDRIPriv->width; - mgaScreen->height=gDRIPriv->height; - mgaScreen->mem=gDRIPriv->mem; - mgaScreen->cpp=gDRIPriv->cpp; - mgaScreen->frontPitch=gDRIPriv->frontPitch; - mgaScreen->frontOffset=gDRIPriv->frontOffset; - mgaScreen->backOffset=gDRIPriv->backOffset; - mgaScreen->backPitch = gDRIPriv->backPitch; - mgaScreen->depthOffset=gDRIPriv->depthOffset; - mgaScreen->depthPitch = gDRIPriv->depthPitch; - mgaScreen->textureOffset=gDRIPriv->textureOffset; - mgaScreen->textureSize=gDRIPriv->textureSize; - mgaScreen->logTextureGranularity = gDRIPriv->logTextureGranularity; + /* + fprintf(stderr, "serverInfo->chipset: %d\n", serverInfo->chipset); + */ + if (serverInfo->chipset != MGA_CARD_TYPE_G200 && + serverInfo->chipset != MGA_CARD_TYPE_G400) + return GL_FALSE; + + mgaScreen->chipset = serverInfo->chipset; + mgaScreen->width = serverInfo->width; + mgaScreen->height = serverInfo->height; + mgaScreen->mem = serverInfo->mem; + mgaScreen->cpp = serverInfo->cpp; + mgaScreen->frontPitch = serverInfo->frontPitch; + mgaScreen->frontOffset = serverInfo->frontOffset; + mgaScreen->backOffset = serverInfo->backOffset; + mgaScreen->backPitch = serverInfo->backPitch; + mgaScreen->depthOffset = serverInfo->depthOffset; + mgaScreen->depthPitch = serverInfo->depthPitch; + + + mgaScreen->agp.handle = serverInfo->agp; + mgaScreen->agp.size = serverInfo->agpSize; + + if (drmMap(sPriv->fd, + mgaScreen->agp.handle, + mgaScreen->agp.size, + (drmAddress *)&mgaScreen->agp.map) != 0) + { + Xfree(mgaScreen); + return GL_FALSE; + } - mgaScreen->bufs = drmMapBufs(sPriv->fd); + mgaScreen->textureOffset[MGA_CARD_HEAP] = serverInfo->textureOffset; + mgaScreen->textureOffset[MGA_AGP_HEAP] = (serverInfo->agpTextureOffset | + PDEA_pagpxfer_enable | 1); + /* + fprintf(stderr, "CARD texture size %x, granul %d --> %x\n", + serverInfo->textureSize, serverInfo->logTextureGranularity, + 1<<serverInfo->logTextureGranularity); + */ + + mgaScreen->textureSize[MGA_CARD_HEAP] = serverInfo->textureSize; + mgaScreen->textureSize[MGA_AGP_HEAP] = serverInfo->agpTextureSize; + + mgaScreen->logTextureGranularity[MGA_CARD_HEAP] = + serverInfo->logTextureGranularity; + mgaScreen->logTextureGranularity[MGA_AGP_HEAP] = + serverInfo->logAgpTextureGranularity; + + mgaScreen->texVirtual[MGA_CARD_HEAP] = (mgaScreen->sPriv->pFB + + serverInfo->textureOffset); + mgaScreen->texVirtual[MGA_AGP_HEAP] = (mgaScreen->agp.map + + serverInfo->agpTextureOffset); + + mgaScreen->mAccess = serverInfo->mAccess; + + + /* For calculating setupdma addresses. + */ + mgaScreen->dmaOffset = serverInfo->agpBufferOffset; + + /* + fprintf(stderr, "\n\n\nbackOffset: %x pitch %x\n", + mgaScreen->backOffset, + mgaScreen->backPitch); + */ + + mgaScreen->Attrib = MGA_PF_565; + mgaScreen->bufs = drmMapBufs(sPriv->fd); /* Other mgaglx stuff, too?? */ memset(&mgaglx, 0, sizeof(mgaglx)); mgaDDFastPathInit(); + mgaDDEltPathInit(); mgaDDTrifuncInit(); mgaDDSetupInit(); @@ -153,106 +197,53 @@ void XMesaResetDriver(__DRIscreenPrivate *sPriv) Xfree(sPriv->private); } -/* Accessed by dlsym from dri_mesa_init.c - */ -XMesaVisual XMesaCreateVisual(XMesaDisplay *display, - XMesaVisualInfo visinfo, - GLboolean rgb_flag, - GLboolean alpha_flag, - GLboolean db_flag, - GLboolean stereo_flag, - GLboolean ximage_flag, - GLint depth_size, - GLint stencil_size, - GLint accum_size, - GLint level) -{ - XMesaVisual v; - /* Only RGB visuals are supported on the MGA boards */ - if (!rgb_flag) return 0; - - v = (XMesaVisual)Xmalloc(sizeof(struct xmesa_visual)); - if (!v) return 0; - - v->visinfo = (XVisualInfo *)Xmalloc(sizeof(*visinfo)); - if(!v->visinfo) { - Xfree(v); - return 0; - } - memcpy(v->visinfo, visinfo, sizeof(*visinfo)); - - v->display = display; - v->level = level; - - v->gl_visual = (GLvisual *)Xmalloc(sizeof(GLvisual)); - if (!v->gl_visual) { - Xfree(v->visinfo); - XFree(v); - return 0; - } - - v->gl_visual->RGBAflag = rgb_flag; - v->gl_visual->DBflag = db_flag; - v->gl_visual->StereoFlag = stereo_flag; - - v->gl_visual->RedBits = count_bits(visinfo->red_mask); - v->gl_visual->GreenBits = count_bits(visinfo->green_mask); - v->gl_visual->BlueBits = count_bits(visinfo->blue_mask); - v->gl_visual->AlphaBits = 0; /* Not currently supported */ - - v->gl_visual->AccumBits = accum_size; - v->gl_visual->DepthBits = depth_size; - v->gl_visual->StencilBits = stencil_size; - - return v; -} - -void XMesaDestroyVisual(XMesaVisual v) +GLvisual *XMesaCreateVisual(Display *dpy, + __DRIscreenPrivate *driScrnPriv, + const XVisualInfo *visinfo, + const __GLXvisualConfig *config) { - Xfree(v->gl_visual); - Xfree(v->visinfo); - Xfree(v); + /* Drivers may change the args to _mesa_create_visual() in order to + * setup special visuals. + */ + return _mesa_create_visual( config->rgba, + config->doubleBuffer, + config->stereo, + _mesa_bitcount(visinfo->red_mask), + _mesa_bitcount(visinfo->green_mask), + _mesa_bitcount(visinfo->blue_mask), + config->alphaSize, + 0, /* index bits */ + config->depthSize, + config->stencilSize, + config->accumRedSize, + config->accumGreenSize, + config->accumBlueSize, + config->accumAlphaSize, + 0 /* num samples */ ); } -XMesaContext XMesaCreateContext(XMesaVisual v, XMesaContext share_list, - __DRIcontextPrivate *driContextPriv) + +GLboolean XMesaCreateContext( Display *dpy, GLvisual *mesaVis, + __DRIcontextPrivate *driContextPriv ) { + int i; GLcontext *ctx; - XMesaContext c; mgaContextPtr mmesa; __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv; mgaScreenPrivate *mgaScreen = (mgaScreenPrivate *)sPriv->private; drm_mga_sarea_t *saPriv=(drm_mga_sarea_t*)(((char*)sPriv->pSAREA)+ sizeof(XF86DRISAREARec)); - GLcontext *shareCtx = 0; + /*fprintf(stderr, "XMesaCreateContext\n");*/ - c = (XMesaContext)Xmalloc(sizeof(struct xmesa_context)); - if (!c) { - return 0; - } - - mmesa = (mgaContextPtr)Xmalloc(sizeof(mgaContext)); + mmesa = (mgaContextPtr)Xcalloc(sizeof(mgaContext), 1); if (!mmesa) { - Xfree(c); - return 0; + return GL_FALSE; } - c->driContextPriv = driContextPriv; - c->xm_visual = v; - c->xm_buffer = 0; /* Set by MakeCurrent */ - c->display = v->display; - c->private = (void *)mmesa; - - if (share_list) - shareCtx=((mgaContextPtr)(share_list->private))->glCtx; - - ctx = mmesa->glCtx = gl_create_context(v->gl_visual, shareCtx, - (void*)mmesa, GL_TRUE); + ctx = driContextPriv->mesaContext; - /* Dri stuff - */ - mmesa->display = v->display; + mmesa->display = dpy; mmesa->hHWContext = driContextPriv->hHWContext; mmesa->driFd = sPriv->fd; mmesa->driHwLock = &sPriv->pSAREA->lock; @@ -260,41 +251,42 @@ XMesaContext XMesaCreateContext(XMesaVisual v, XMesaContext share_list, mmesa->mgaScreen = mgaScreen; mmesa->driScreen = sPriv; mmesa->sarea = saPriv; + mmesa->glBuffer = NULL; - mmesa->glBuffer=gl_create_framebuffer(v->gl_visual); - + make_empty_list(&mmesa->SwappedOut); - mmesa->needClip=1; + mmesa->lastTexHeap = mgaScreen->texVirtual[MGA_AGP_HEAP] ? 2 : 1; - mmesa->texHeap = mmInit( 0, mgaScreen->textureSize ); + for (i = 0 ; i < mmesa->lastTexHeap ; i++) { + mmesa->texHeap[i] = mmInit( 0, mgaScreen->textureSize[i]); + make_empty_list(&mmesa->TexObjList[i]); + } - /* Utah stuff - */ mmesa->renderindex = -1; /* impossible value */ mmesa->new_state = ~0; mmesa->dirty = ~0; - - mmesa->warp_pipe = 0; - - - make_empty_list(&mmesa->SwappedOut); - make_empty_list(&mmesa->TexObjList); - + mmesa->warp_pipe = 0; mmesa->CurrentTexObj[0] = 0; mmesa->CurrentTexObj[1] = 0; + mmesa->texAge[0] = 0; + mmesa->texAge[1] = 0; + + ctx->DriverCtx = (void *) mmesa; + mmesa->glCtx = ctx; + mgaDDExtensionsInit( ctx ); mgaDDInitStateFuncs( ctx ); mgaDDInitTextureFuncs( ctx ); mgaDDInitSpanFuncs( ctx ); - mgaDDInitDepthFuncs( ctx ); mgaDDInitDriverFuncs( ctx ); mgaDDInitIoctlFuncs( ctx ); ctx->Driver.TriangleCaps = (DD_TRI_CULL| DD_TRI_LIGHT_TWOSIDE| + DD_TRI_STIPPLE| DD_TRI_OFFSET); /* Ask mesa to clip fog coordinates for us. @@ -312,19 +304,21 @@ XMesaContext XMesaCreateContext(XMesaVisual v, XMesaContext share_list, mgaDDRegisterPipelineStages(ctx->PipelineStage, ctx->PipelineStage, ctx->NrPipelineStages); - return c; + + mgaInitState( mmesa ); + + driContextPriv->driverPrivate = (void *) mmesa; + + return GL_TRUE; } -void XMesaDestroyContext(XMesaContext c) +void XMesaDestroyContext(__DRIcontextPrivate *driContextPriv) { - mgaContextPtr mmesa = (mgaContextPtr) c->private; + mgaContextPtr mmesa = (mgaContextPtr) driContextPriv->driverPrivate; if (mmesa) { /* mgaTextureObjectPtr next_t, t; */ - gl_destroy_context(mmesa->glCtx); - gl_destroy_framebuffer(mmesa->glBuffer); - /* foreach_s (t, next_t, &(mmesa->TexObjList)) */ /* mgaDestroyTexObj(mmesa, t); */ @@ -333,90 +327,62 @@ void XMesaDestroyContext(XMesaContext c) Xfree(mmesa); - c->private = 0; + driContextPriv->driverPrivate = NULL; } } -XMesaBuffer XMesaCreateWindowBuffer(XMesaVisual v, XMesaWindow w, - __DRIdrawablePrivate *driDrawPriv) -{ - return (XMesaBuffer)1; -} -XMesaBuffer XMesaCreatePixmapBuffer(XMesaVisual v, XMesaPixmap p, - XMesaColormap c, - __DRIdrawablePrivate *driDrawPriv) +GLframebuffer *XMesaCreateWindowBuffer( Display *dpy, + __DRIscreenPrivate *driScrnPriv, + __DRIdrawablePrivate *driDrawPriv, + GLvisual *mesaVis) { - return (XMesaBuffer)1; + return gl_create_framebuffer(mesaVis, + GL_FALSE, /* software depth buffer? */ + mesaVis->StencilBits > 0, + mesaVis->AccumRedBits > 0, + mesaVis->AlphaBits > 0 + ); } -void XMesaDestroyBuffer(XMesaBuffer b) + +GLframebuffer *XMesaCreatePixmapBuffer( Display *dpy, + __DRIscreenPrivate *driScrnPriv, + __DRIdrawablePrivate *driDrawPriv, + GLvisual *mesaVis) { +#if 0 + /* Different drivers may have different combinations of hardware and + * software ancillary buffers. + */ + return gl_create_framebuffer(mesaVis, + GL_FALSE, /* software depth buffer? */ + mesaVis->StencilBits > 0, + mesaVis->AccumRedBits > 0, + mesaVis->AlphaBits > 0 + ); +#else + return NULL; /* not implemented yet */ +#endif } -void XMesaSwapBuffers(XMesaBuffer bogus_value_do_not_use) + +void XMesaSwapBuffers(__DRIdrawablePrivate *driDrawPriv) { + /* XXX should do swap according to the buffer, not the context! */ mgaContextPtr mmesa = mgaCtx; FLUSH_VB( mmesa->glCtx, "swap buffers" ); mgaSwapBuffers(mmesa); } - - - -void mgaXMesaSetFrontClipRects( mgaContextPtr mmesa ) -{ - __DRIdrawablePrivate *dPriv = mmesa->driDrawable; - - mmesa->numClipRects = dPriv->numClipRects; - mmesa->pClipRects = dPriv->pClipRects; - mmesa->drawX = dPriv->x; - mmesa->drawY = dPriv->y; - - mmesa->drawOffset = mmesa->mgaScreen->frontOffset; -} - - -void mgaXMesaSetBackClipRects( mgaContextPtr mmesa ) -{ - __DRIdrawablePrivate *dPriv = mmesa->driDrawable; - - if (dPriv->numAuxClipRects == 0) - { - mmesa->numClipRects = dPriv->numClipRects; - mmesa->pClipRects = dPriv->pClipRects; - mmesa->drawX = dPriv->x; - mmesa->drawY = dPriv->y; - } else { - mmesa->numClipRects = dPriv->numAuxClipRects; - mmesa->pClipRects = dPriv->pAuxClipRects; - mmesa->drawX = dPriv->auxX; - mmesa->drawY = dPriv->auxY; - } - - mmesa->drawOffset = mmesa->mgaScreen->backOffset; -} - - -static void mgaXMesaWindowMoved( mgaContextPtr mmesa ) +GLboolean XMesaUnbindContext(__DRIcontextPrivate *driContextPriv) { - /* Clear any contaminated CVA data. - */ - mmesa->setupdone = 0; - - switch (mmesa->glCtx->Color.DriverDrawBuffer) { - case GL_FRONT_LEFT: - mgaXMesaSetFrontClipRects( mmesa ); - break; - case GL_BACK_LEFT: - mgaXMesaSetBackClipRects( mmesa ); - break; - default: - fprintf(stderr, "fallback buffer\n"); - break; - } + mgaContextPtr mmesa = (mgaContextPtr) driContextPriv->driverPrivate; + if (mmesa) + mmesa->dirty = ~0; + return GL_TRUE; } @@ -426,27 +392,24 @@ static void mgaXMesaWindowMoved( mgaContextPtr mmesa ) * * But why are we doing context initialization here??? */ -GLboolean XMesaMakeCurrent(XMesaContext c, XMesaBuffer b) +GLboolean XMesaMakeCurrent(__DRIcontextPrivate *driContextPriv, + __DRIdrawablePrivate *driDrawPriv, + __DRIdrawablePrivate *driReadPriv) { + if (driContextPriv) { + mgaCtx = (mgaContextPtr) driContextPriv->driverPrivate; - if (c->private==(void *)mgaCtx) return GL_TRUE; - - if (c) { - __DRIdrawablePrivate *dPriv = c->driContextPriv->driDrawablePriv; - - mgaCtx = (mgaContextPtr)c->private; + gl_make_current2(mgaCtx->glCtx, driDrawPriv->mesaBuffer, driReadPriv->mesaBuffer); - - gl_make_current(mgaCtx->glCtx, mgaCtx->glBuffer); - - mgaXMesaWindowMoved( mgaCtx ); - mgaCtx->driDrawable = dPriv; + mgaCtx->driDrawable = driDrawPriv; mgaCtx->dirty = ~0; + mgaCtx->dirty_cliprects = (MGA_FRONT|MGA_BACK); if (!mgaCtx->glCtx->Viewport.Width) - gl_Viewport(mgaCtx->glCtx, 0, 0, dPriv->w, dPriv->h); + gl_Viewport(mgaCtx->glCtx, 0, 0, driDrawPriv->w, driDrawPriv->h); - } else { + } + else { gl_make_current(0,0); mgaCtx = NULL; } @@ -455,58 +418,37 @@ GLboolean XMesaMakeCurrent(XMesaContext c, XMesaBuffer b) } -void mgaXMesaUpdateState( mgaContextPtr mmesa ) +void mgaGetLock( mgaContextPtr mmesa, GLuint flags ) { __DRIdrawablePrivate *dPriv = mmesa->driDrawable; - __DRIscreenPrivate *sPriv = mmesa->driScreen; drm_mga_sarea_t *sarea = mmesa->sarea; - int me = mmesa->hHWContext; - int stamp = dPriv->lastStamp; - - /* If the window moved, may need to set a new cliprect now. - * - * NOTE: This releases and regains the hw lock, so all state - * checking must be done *after* this call: - */ - XMESA_VALIDATE_DRAWABLE_INFO(mmesa->display, sPriv, dPriv); + int i; - if (sarea->ctxOwner != me) { - mmesa->dirty |= MGA_UPLOAD_CTX; - } + drmGetLock(mmesa->driFd, mmesa->hHWContext, flags); - if (sarea->texAge != mmesa->texAge) { - int sz = 1 << (mmesa->mgaScreen->logTextureGranularity); - int idx, nr = 0; - - /* Have to go right round from the back to ensure stuff ends up - * LRU in our local list... - */ - for (idx = sarea->texList[MGA_NR_TEX_REGIONS].prev ; - idx != MGA_NR_TEX_REGIONS && nr < MGA_NR_TEX_REGIONS ; - idx = sarea->texList[idx].prev, nr++) - { - if (sarea->texList[idx].age > mmesa->texAge) - mgaTexturesGone(mmesa, idx * sz, sz, 1); - } - - if (nr == MGA_NR_TEX_REGIONS) { - mgaTexturesGone(mmesa, 0, mmesa->mgaScreen->textureSize, 0); - mgaResetGlobalLRU( mmesa ); - } - - mmesa->texAge = sarea->texAge; - mmesa->dirty |= MGA_UPLOAD_TEX0IMAGE | MGA_UPLOAD_TEX1IMAGE; + if (*(dPriv->pStamp) != dPriv->lastStamp) { + mmesa->setupdone = 0; + mmesa->dirty_cliprects = (MGA_FRONT|MGA_BACK); + mgaUpdateRects( mmesa, (MGA_FRONT|MGA_BACK) ); } - if (dPriv->lastStamp != stamp) - mgaXMesaWindowMoved( mmesa ); + mmesa->dirty |= MGA_UPLOAD_CTX | MGA_UPLOAD_CLIPRECTS; - sarea->ctxOwner=me; -} + mmesa->sarea->dirty |= MGA_UPLOAD_CTX; + if (sarea->ctxOwner != me) { + mmesa->dirty |= (MGA_UPLOAD_CTX | MGA_UPLOAD_TEX0 | + MGA_UPLOAD_TEX1 | MGA_UPLOAD_PIPE); + sarea->ctxOwner=me; + } + for (i = 0 ; i < mmesa->lastTexHeap ; i++) + if (sarea->texAge[i] != mmesa->texAge[i]) + mgaAgeTextures( mmesa, i ); + sarea->last_quiescent = -1; /* just kill it for now */ +} diff --git a/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.h b/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.h index d563bd429..489b71836 100644 --- a/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.h +++ b/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.h @@ -28,7 +28,6 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. /* * Authors: * Keith Whitwell <keithw@precisioninsight.com> - * Daryll Strauss <daryll@precisioninsight.com> (Origninal tdfx driver). * */ @@ -42,7 +41,13 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "dri_mesaint.h" #include "dri_mesa.h" #include "types.h" -#include "xmesaP.h" +#include "mgaregs.h" + +typedef struct { + drmHandle handle; + drmSize size; + char *map; +} mgaRegion, *mgaRegionPtr; typedef struct { @@ -54,53 +59,69 @@ typedef struct { int cpp; /* for front and back buffers */ int Attrib; + unsigned int mAccess; - int frontOffset; - int frontPitch; - int backOffset; - int backPitch; + unsigned int frontOffset; + unsigned int frontPitch; + unsigned int backOffset; + unsigned int backPitch; - int depthOffset; - int depthPitch; + unsigned int depthOffset; + unsigned int depthPitch; int depthCpp; - int textureOffset; - int textureSize; - int logTextureGranularity; + unsigned int dmaOffset; + + unsigned int textureOffset[MGA_NR_TEX_HEAPS]; + unsigned int textureSize[MGA_NR_TEX_HEAPS]; + int logTextureGranularity[MGA_NR_TEX_HEAPS]; + char *texVirtual[MGA_NR_TEX_HEAPS]; + __DRIscreenPrivate *sPriv; drmBufMapPtr bufs; + /* Maps the dma buffers as well as textures ? + */ + mgaRegion agp; + } mgaScreenPrivate; #include "mgalib.h" -extern void mgaXMesaUpdateState( mgaContextPtr mmesa ); +extern void mgaGetLock( mgaContextPtr mmesa, GLuint flags ); extern void mgaEmitHwStateLocked( mgaContextPtr mmesa ); extern void mgaEmitScissorValues( mgaContextPtr mmesa, int box_nr, int emit ); -extern void mgaXMesaSetBackClipRects( mgaContextPtr mmesa ); -extern void mgaXMesaSetFrontClipRects( mgaContextPtr mmesa ); + +#define GET_DISPATCH_AGE( mmesa ) mmesa->sarea->last_dispatch +#define GET_ENQUEUE_AGE( mmesa ) mmesa->sarea->last_enqueue /* Lock the hardware and validate our state. */ -#define LOCK_HARDWARE( mmesa ) \ - do { \ - char __ret=0; \ - DRM_CAS(mmesa->driHwLock, mmesa->hHWContext, \ - (DRM_LOCK_HELD|mmesa->hHWContext), __ret); \ - if (__ret) { \ - drmGetLock(mmesa->driFd, mmesa->hHWContext, 0); \ - mgaXMesaUpdateState( mmesa ); \ - } \ +#define LOCK_HARDWARE( mmesa ) \ + do { \ + char __ret=0; \ + DRM_CAS(mmesa->driHwLock, mmesa->hHWContext, \ + (DRM_LOCK_HELD|mmesa->hHWContext), __ret); \ + if (__ret) \ + mgaGetLock( mmesa, 0 ); \ } while (0) +/* + */ +#define LOCK_HARDWARE_QUIESCENT( mmesa ) do { \ + LOCK_HARDWARE( mmesa ); \ + mgaUpdateLock( mmesa, DRM_LOCK_QUIESCENT | DRM_LOCK_FLUSH ); \ +} while (0) + + /* Unlock the hardware using the global current context */ -#define UNLOCK_HARDWARE(mmesa) \ +#define UNLOCK_HARDWARE(mmesa) \ DRM_UNLOCK(mmesa->driFd, mmesa->driHwLock, mmesa->hHWContext); @@ -109,6 +130,8 @@ extern void mgaXMesaSetFrontClipRects( mgaContextPtr mmesa ); #define REFRESH_DRAWABLE_INFO( mmesa ) \ do { \ LOCK_HARDWARE( mmesa ); \ + mmesa->lastX = mmesa->drawX; \ + mmesa->lastY = mmesa->drawY; \ UNLOCK_HARDWARE( mmesa ); \ } while (0) diff --git a/xc/lib/GL/mesa/src/drv/mga/mgaeltpath.c b/xc/lib/GL/mesa/src/drv/mga/mgaeltpath.c new file mode 100644 index 000000000..4751eb091 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/mga/mgaeltpath.c @@ -0,0 +1,457 @@ +/* + * GLX Hardware Device Driver for Matrox G400 + * Copyright (C) 1999 Keith Whitwell + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE + * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +#include <stdio.h> + +#include "types.h" +#include "enums.h" +#include "cva.h" +#include "vertices.h" +#include "mmath.h" +#include "xform.h" + +#include "mgalib.h" +#include "mgapipeline.h" +#include "mgatris.h" +#include "mgastate.h" +#include "mgavb.h" + + +/* Always use a full-sized stride for vertices. [FIXME] + * Stride in the buffers must be a quadword multiple. + */ +#define BUFFER_STRIDE 12 +#define CLIP_STRIDE 10 + + +static void fire_elts( mgaContextPtr mmesa ) +{ + LOCK_HARDWARE( mmesa ); + + /* Fire queued elements and discard that buffer if its contents + * won't be referenced by future elements. + */ + if (mmesa->elt_buf) { + GLuint retain = (mmesa->elt_buf == mmesa->retained_buf); + + if (mmesa->first_elt != mmesa->next_elt) { + mgaFireEltsLocked( mmesa, + ((GLuint)mmesa->first_elt - + (GLuint)mmesa->elt_buf->address), + ((GLuint)mmesa->next_elt - + (GLuint)mmesa->elt_buf->address), + !retain ); + } else if (!retain) + mgaReleaseBufLocked( mmesa, mmesa->elt_buf ); + + mmesa->elt_buf = 0; + } + else if (mmesa->vertex_dma_buffer) + { + mgaFlushVerticesLocked( mmesa ); + } + + mgaGetEltBufLocked( mmesa ); + + UNLOCK_HARDWARE( mmesa ); + + mmesa->next_vert = (GLfloat *)((GLuint)mmesa->elt_buf->address + + mmesa->elt_buf->total - + BUFFER_STRIDE * sizeof(GLfloat)); + + mmesa->next_vert_phys = (mmesa->mgaScreen->dmaOffset + + mmesa->elt_buf->idx * MGA_DMA_BUF_SZ + + mmesa->elt_buf->total - + BUFFER_STRIDE * sizeof(GLfloat)); + + mmesa->first_elt = (GLuint *)mmesa->elt_buf->address; + mmesa->next_elt = (GLuint *)mmesa->elt_buf->address; + +} + + +static void release_bufs( mgaContextPtr mmesa ) +{ + if (mmesa->retained_buf && mmesa->retained_buf != mmesa->elt_buf) + { + LOCK_HARDWARE( mmesa ); + if (mmesa->first_elt != mmesa->next_elt) { + mgaFireEltsLocked( mmesa, + ((GLuint)mmesa->first_elt - + (GLuint)mmesa->elt_buf->address), + ((GLuint)mmesa->next_elt - + (GLuint)mmesa->elt_buf->address), + 0 ); + + mmesa->first_elt = mmesa->next_elt; + } + + mgaReleaseBufLocked( mmesa, mmesa->retained_buf ); + UNLOCK_HARDWARE( mmesa ); + } + + mmesa->retained_buf = 0; +} + + + + +#define NEGATIVE(f) (f < 0) +#define DIFFERENT_SIGNS(a,b) ((a*b) < 0) +#define LINTERP( T, A, B ) ( (A) + (T) * ( (B) - (A) ) ) + + +#define INTERP_RGBA(t, out, a, b) { \ + int i; \ + for (i = 0; i < 4; i++) { \ + GLfloat fa = UBYTE_COLOR_TO_FLOAT_COLOR(a[i]); \ + GLfloat fb = UBYTE_COLOR_TO_FLOAT_COLOR(b[i]); \ + GLfloat fo = LINTERP(t, fa, fb); \ + FLOAT_COLOR_TO_UBYTE_COLOR(out[i], fo); \ + } \ +} + + +#define CLIP(SGN,V,PLANE) \ +if (mask & PLANE) { \ + GLuint *indata = inlist[in]; \ + GLuint *outdata = inlist[in ^= 1]; \ + GLuint nr = n; \ + GLfloat *J = verts[indata[nr-1]]; \ + GLfloat dpJ = (SGN J[V]) + J[3]; \ + \ + for (i = n = 0 ; i < nr ; i++) { \ + GLuint elt_i = indata[i]; \ + GLfloat *I = verts[elt_i]; \ + GLfloat dpI = (SGN I[V]) + I[3]; \ + \ + if (DIFFERENT_SIGNS(dpI, dpJ)) { \ + GLfloat *O = verts[next_vert]; \ + outdata[n++] = next_vert++; \ + \ + if (NEGATIVE(dpI)) { \ + GLfloat t = dpI / (dpI - dpJ); \ + interp(t, O, I, J); \ + } \ + else \ + { \ + GLfloat t = dpJ / (dpJ - dpI); \ + interp(t, O, J, I); \ + } \ + } \ + \ + if (!NEGATIVE(dpI)) \ + outdata[n++] = elt_i; \ + \ + J = I; \ + dpJ = dpI; \ + } \ + \ + if (n < 3) return; \ +} + + +static void mga_tri_clip( mgaContextPtr mmesa, + struct vertex_buffer *VB, + GLuint *elt, + GLubyte mask ) +{ + struct mga_elt_tab *tab = mmesa->elt_tab; + mga_interp_func interp = tab->interp; + GLuint inlist[2][VB_MAX_CLIPPED_VERTS]; + GLuint in = 0; + GLuint n = 3, next_vert = 3; + GLuint i; + GLfloat verts[VB_MAX_CLIPPED_VERTS][CLIP_STRIDE]; + + /* Build temporary vertices in clipspace. This is the potential + * downside to this path. + */ + tab->build_tri_verts( mmesa, VB, (GLfloat *)verts, elt ); + + inlist[0][0] = 0; + inlist[0][1] = 1; + inlist[0][2] = 2; + + CLIP(-,0,CLIP_RIGHT_BIT); + CLIP(+,0,CLIP_LEFT_BIT); + CLIP(-,1,CLIP_TOP_BIT); + CLIP(+,1,CLIP_BOTTOM_BIT); + CLIP(-,2,CLIP_FAR_BIT); + CLIP(+,2,CLIP_NEAR_BIT); + + + { + GLuint *out = inlist[in]; + GLuint space = (GLuint)mmesa->next_vert - (GLuint)mmesa->next_elt; + + if (space < n * (BUFFER_STRIDE + 3) * sizeof(GLuint)) + fire_elts(mmesa); + + /* Project the new vertices and emit to dma buffers. Translate + * out values to physical addresses for setup dma. + */ + tab->project_and_emit_verts( mmesa, (GLfloat *)verts, out, n ); + + /* Convert the planar polygon to a list of triangles and emit to + * elt buffers. + */ + for (i = 2 ; i < n ; i++) { + mmesa->next_elt[0] = out[0]; + mmesa->next_elt[1] = out[i-1]; + mmesa->next_elt[2] = out[i]; + mmesa->next_elt += 3; + } + } +} + + + + +/* Build a table of functions to clip each primitive type. These + * produce a list of elements in the appropriate 'reduced' primitive, + * ie (points, lines, triangles) containing all the clipped and + * unclipped primitives from the original list. + */ + +#define INIT(x) + +#define TRI_THRESHOLD (3 * sizeof(GLuint)) + +#define UNCLIPPED_VERT(x) (mmesa->first_vert_phys - x * BUFFER_STRIDE * 4) + +#define TRIANGLE( e2, e1, e0 ) \ +do { \ + if ((GLuint)mmesa->next_vert - \ + (GLuint)mmesa->next_elt < TRI_THRESHOLD) \ + fire_elts(mmesa); \ + mmesa->next_elt[0] = UNCLIPPED_VERT(e2); \ + mmesa->next_elt[1] = UNCLIPPED_VERT(e1); \ + mmesa->next_elt[2] = UNCLIPPED_VERT(e0); \ + mmesa->next_elt+=3; \ +} while (0) + +#define CLIP_TRIANGLE( e2, e1, e0 ) \ +do { \ + GLubyte ormask = mask[e2] | mask[e1] | mask[e0]; \ + if (ormask == 0) { \ + TRIANGLE( e2, e1, e0 ); \ + } else if ((mask[e2] & mask[e1] & mask[e0]) == 0) { \ + out[0] = e2; \ + out[1] = e1; \ + out[2] = e0; \ + mga_tri_clip( mmesa, VB, out, ormask ); \ + } \ +} while (0) + +#define LOCAL_VARS \ + mgaContextPtr mmesa = MGA_CONTEXT( VB->ctx ); \ + GLuint *elt = VB->EltPtr->data; \ + GLuint out[VB_MAX_CLIPPED_VERTS]; \ + GLubyte *mask = VB->ClipMask; \ + (void) mask; (void) out; (void) elt; (void) mmesa; + + + +#define RENDER_POINTS(start, count) +#define RENDER_LINE(i1, i0) +#define RENDER_TRI(i2, i1, i0, pv, parity) \ +do { \ + GLuint e2 = elt[i2], e1 = elt[i1], e0 = elt[i0]; \ + if (parity) e2 = elt[i1], e1 = elt[i2]; \ + CLIP_TRIANGLE( e2, e1, e0 ); \ +} while (0) + +#define RENDER_QUAD(i3, i2, i1, i0, pv ) \ + CLIP_TRIANGLE(elt[i3], elt[i2], elt[i0]); \ + CLIP_TRIANGLE(elt[i2], elt[i1], elt[i0]) + +#define TAG(x) mga_##x##_elt +#include "render_tmp.h" + + + +#define LOCAL_VARS \ + mgaContextPtr mmesa = MGA_CONTEXT( VB->ctx ); \ + GLuint *elt = VB->EltPtr->data; \ + (void) elt; (void) mmesa; + +#define RENDER_POINTS(start, count) +#define RENDER_LINE(i1, i0) +#define RENDER_TRI(i2, i1, i0, pv, parity) \ +do { \ + GLuint e2 = elt[i2], e1 = elt[i1], e0 = elt[i0]; \ + if (parity) e2 = elt[i1], e1 = elt[i2]; \ + TRIANGLE( e2, e1, e0 ); \ +} while (0) + +#define RENDER_QUAD(i3, i2, i1, i0, pv ) \ + TRIANGLE(elt[i3], elt[i2], elt[i0]); \ + TRIANGLE(elt[i2], elt[i1], elt[i0]) + +#define TAG(x) mga_##x##_elt_unclipped +#include "render_tmp.h" + + + + +static void refresh_projection_matrix( GLcontext *ctx ) +{ + mgaContextPtr mmesa = MGA_CONTEXT(ctx); + GLfloat *m = mmesa->device_matrix; + GLmatrix *mat = &ctx->Viewport.WindowMap; + + REFRESH_DRAWABLE_INFO(mmesa); + + m[MAT_SX] = mat->m[MAT_SX]; + m[MAT_TX] = mat->m[MAT_TX] + mmesa->drawX + .5; + m[MAT_SY] = (- mat->m[MAT_SY]); + m[MAT_TY] = (- mat->m[MAT_TY]) + mmesa->driDrawable->h + mmesa->drawY - .5; + m[MAT_SZ] = mat->m[MAT_SZ] * (1.0 / 0x10000); + m[MAT_TZ] = mat->m[MAT_TZ] * (1.0 / 0x10000); +} + +#define CLIP_UBYTE_B 0 +#define CLIP_UBYTE_G 1 +#define CLIP_UBYTE_R 2 +#define CLIP_UBYTE_A 3 + + +#define TYPE (0) +#define TAG(x) x +#include "mgaelttmp.h" + +#define TYPE (MGA_RGBA_BIT) +#define TAG(x) x##_RGBA +#include "mgaelttmp.h" + +#define TYPE (MGA_TEX0_BIT) +#define TAG(x) x##_TEX0 +#include "mgaelttmp.h" + +#define TYPE (MGA_RGBA_BIT|MGA_TEX0_BIT) +#define TAG(x) x##_RGBA_TEX0 +#include "mgaelttmp.h" + +#define TYPE (MGA_RGBA_BIT|MGA_TEX0_BIT|MGA_TEX1_BIT) +#define TAG(x) x##_RGBA_TEX0_TEX1 +#include "mgaelttmp.h" + +#define TYPE (MGA_TEX0_BIT|MGA_TEX1_BIT) +#define TAG(x) x##_TEX0_TEX1 +#include "mgaelttmp.h" + + +/* Very sparsely popluated array - fix the indices. + */ +static struct mga_elt_tab mgaEltTab[0x80]; + +void mgaDDEltPathInit( void ) +{ + mga_render_init_elt(); + mga_render_init_elt_unclipped(); + + mga_init_eltpath( &mgaEltTab[0] ); + mga_init_eltpath_RGBA( &mgaEltTab[MGA_RGBA_BIT] ); + mga_init_eltpath_TEX0( &mgaEltTab[MGA_TEX0_BIT] ); + mga_init_eltpath_RGBA_TEX0( &mgaEltTab[MGA_RGBA_BIT|MGA_TEX0_BIT] ); + mga_init_eltpath_TEX0_TEX1( &mgaEltTab[MGA_TEX0_BIT|MGA_TEX1_BIT] ); + mga_init_eltpath_RGBA_TEX0_TEX1( &mgaEltTab[MGA_RGBA_BIT|MGA_TEX0_BIT| + MGA_TEX1_BIT] ); +} + +#define VALID_SETUP (MGA_RGBA_BIT|MGA_TEX0_BIT|MGA_TEX1_BIT) + + + +/* Use a temporary array for device coordinates, so that we can easily + * tap into existing mesa assembly. Otherwise consider emitting + * device coordinates to dma buffers directly from the project/cliptest + * routine. (requires output stride, potential loss of writecombining + * efficiency?) + * + * This path is a lot closer to the standard vertex path in the + * initial stages than the original fastpath. A slightly more optimal + * path could be constructed, but would require us to write new + * assembly. + */ +void mgaDDEltPath( struct vertex_buffer *VB ) +{ + GLcontext *ctx = VB->ctx; + GLenum prim = ctx->CVA.elt_mode; + mgaContextPtr mmesa = MGA_CONTEXT( ctx ); + struct mga_elt_tab *tab = &mgaEltTab[mmesa->setupindex & VALID_SETUP]; + + VB->ClipPtr = TransformRaw(&VB->Clip, &ctx->ModelProjectMatrix, VB->ObjPtr ); + + refresh_projection_matrix( ctx ); + + VB->ClipAndMask = ~0; + VB->ClipOrMask = 0; + VB->Projected = gl_clip_tab[VB->ClipPtr->size]( VB->ClipPtr, + &VB->Win, + VB->ClipMask, + &VB->ClipOrMask, + &VB->ClipAndMask ); + + if (VB->ClipAndMask) + return; + + if (mmesa->vertex_dma_buffer) + mgaFlushVertices( mmesa ); + + if (mmesa->new_state) + mgaDDUpdateHwState( ctx ); + + /* Allocate a single buffer to hold unclipped vertices. All + * unclipped vertices must be contiguous. + */ + if ((GLuint)mmesa->next_vert - (GLuint)mmesa->next_elt < + VB->Count * BUFFER_STRIDE * sizeof(GLuint)) + fire_elts( mmesa ); + + mmesa->retained_buf = mmesa->elt_buf; + + /* Emit unclipped vertices to the buffer. + */ + tab->emit_unclipped_verts( VB ); + + /* Emit indices and clipped vertices to one or more buffers. + */ + if (VB->ClipOrMask) { + mmesa->elt_tab = tab; + mga_render_tab_elt[prim]( VB, 0, VB->EltPtr->count, 0 ); + } else + mga_render_tab_elt_unclipped[prim]( VB, 0, VB->EltPtr->count, 0 ); + + /* Send to hardware and release any retained buffers. + */ + release_bufs( mmesa ); + + /* This indicates that there is no cached data to reuse. + */ + VB->pipeline->data_valid = 0; + VB->pipeline->new_state = 0; +} + diff --git a/xc/lib/GL/mesa/src/drv/mga/mgaelttmp.h b/xc/lib/GL/mesa/src/drv/mga/mgaelttmp.h new file mode 100644 index 000000000..ce758a532 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/mga/mgaelttmp.h @@ -0,0 +1,269 @@ +/* + * DRI Hardware Device Driver for G200/G400 + * Copyright (C) 1999 Keith Whitwell + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included + * in all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS + * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE + * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. + * + */ + +/* Buffers fill from high addresses down with vertices and from low + * addresses up with elements. + */ + + +/* Emit the bulk of the vertices to the first dma buffer. Leave + * empty slots for clipped vertices so that we can still address + * vertices by index. + */ +static void TAG(emit_unclipped_verts)( struct vertex_buffer *VB ) +{ + GLuint i; + mgaContextPtr mmesa = MGA_CONTEXT(VB->ctx); + GLfloat *dev = VB->Projected->start; + GLubyte *color = VB->ColorPtr->start; + GLfloat *tex0_data = VB->TexCoordPtr[0]->start; + GLfloat *tex1_data = VB->TexCoordPtr[1]->start; + GLuint color_stride = VB->ColorPtr->stride; + GLuint tex0_stride = VB->TexCoordPtr[0]->stride; + GLuint tex1_stride = VB->TexCoordPtr[1]->stride; + + GLfloat *f = mmesa->next_vert; + GLuint count = VB->Count; + GLubyte *clipmask = VB->ClipMask; + + const GLfloat *m = mmesa->device_matrix; + const GLfloat sx = m[0], sy = m[5], sz = m[10]; + const GLfloat tx = m[12], ty = m[13], tz = m[14]; + + mmesa->retained_buf = mmesa->elt_buf; + mmesa->first_vert_phys = mmesa->next_vert_phys; + + for (i = 0 ; i < count ; f -= BUFFER_STRIDE, i++) + { + if (!clipmask[i]) + { + f[0] = sx * dev[0] + tx; + f[1] = sy * dev[1] + ty; + f[2] = sz * dev[2] + tz; + f[3] = dev[3]; + + if (TYPE & MGA_RGBA_BIT) { +#if defined(USE_X86_ASM) + __asm__ ( + "movl (%%edx),%%eax \n" + "bswap %%eax \n" + "rorl $8,%%eax \n" + "movl %%eax,16(%%edi) \n" + : + : "d" (color), "D" (f) + : "%eax" ); +#else + GLubyte *b = (GLubyte *)&f[4]; + b[CLIP_UBYTE_B] = color[2]; + b[CLIP_UBYTE_G] = color[1]; + b[CLIP_UBYTE_R] = color[0]; + b[CLIP_UBYTE_A] = color[3]; +#endif + } + + if (TYPE & MGA_TEX0_BIT) { +/* fprintf(stderr, "i %d tex0 %f, %f\n", i, */ +/* tex0_data[0], tex0_data[1]); */ + *(int*)&f[6] = *(int*)&tex0_data[0]; + *(int*)&f[7] = *(int*)&tex0_data[1]; + } + + if (TYPE & MGA_TEX1_BIT) { + *(int*)&f[8] = *(int*)&tex1_data[0]; + *(int*)&f[9] = *(int*)&tex1_data[1]; + } + } + + STRIDE_F(dev, 16); + if (TYPE & MGA_RGBA_BIT) color += color_stride; + if (TYPE & MGA_TEX0_BIT) STRIDE_F(tex0_data, tex0_stride); + if (TYPE & MGA_TEX1_BIT) STRIDE_F(tex1_data, tex1_stride); + } + + mmesa->next_vert = f; + mmesa->next_vert_phys -= count * BUFFER_STRIDE * sizeof(GLuint); +} + + +/* Build three temporary clipspace vertex for clipping a triangle. + * Recreate from the VB data rather than trying to read back from + * uncached memory. + */ +static void TAG(build_tri_verts)( mgaContextPtr mmesa, + struct vertex_buffer *VB, + GLfloat *O, + GLuint *elt ) +{ + int i; + + for (i = 0 ; i < 3 ; i++, O += CLIP_STRIDE) { + GLfloat *clip = VB->Clip.start + elt[i]*4; + + O[0] = clip[0]; + O[1] = clip[1]; + O[2] = clip[2]; + O[3] = clip[3]; + + if (TYPE & MGA_RGBA_BIT) { + GLubyte *col = VEC_ELT(VB->ColorPtr, GLubyte, elt[i]); + GLubyte *b = (GLubyte *)&O[4]; + b[CLIP_UBYTE_R] = col[0]; + b[CLIP_UBYTE_G] = col[1]; + b[CLIP_UBYTE_B] = col[2]; + b[CLIP_UBYTE_A] = col[3]; + } + + if (0) + fprintf(stderr, + "build_tri_vert elt[%d]: %d phys: %x (first_phys %x elt_buf %x\n", + i, elt[i], UNCLIPPED_VERT(elt[i]), + mmesa->first_vert_phys, (GLuint)mmesa->elt_buf); + + *(GLuint *)&O[5] = UNCLIPPED_VERT(elt[i]); + + if (TYPE & MGA_TEX0_BIT) { + GLfloat *tex0_data = VEC_ELT(VB->TexCoordPtr[0], GLfloat, elt[i]); + *(int*)&O[6] = *(int*)&tex0_data[0]; + *(int*)&O[7] = *(int*)&tex0_data[1]; + } + + if (TYPE & MGA_TEX1_BIT) { + GLfloat *tex1_data = VEC_ELT(VB->TexCoordPtr[1], GLfloat, elt[i]); + *(int*)&O[8] = *(int*)&tex1_data[0]; + *(int*)&O[9] = *(int*)&tex1_data[1]; + } + } +} + + +/* Interpolate between two of the vertices constructed above. + */ +static void TAG(interp)( GLfloat t, + GLfloat *O, + const GLfloat *I, + const GLfloat *J ) +{ + O[0] = LINTERP(t, I[0], J[0]); + O[1] = LINTERP(t, I[1], J[1]); + O[2] = LINTERP(t, I[2], J[2]); + O[3] = LINTERP(t, I[3], J[3]); + + if (TYPE & MGA_RGBA_BIT) { + INTERP_RGBA(t, + ((GLubyte *)&(O[4])), + ((GLubyte *)&(I[4])), + ((GLubyte *)&(J[4]))); + } + + if (0) fprintf(stderr, "setting 0x%x to ~0\n", (GLuint)&O[5]); + + *(GLuint *)&O[5] = ~0; /* note that this is a new vertex */ + + if (TYPE & MGA_TEX0_BIT) { + O[6] = LINTERP(t, I[6], J[6]); + O[7] = LINTERP(t, I[7], J[7]); + } + + if (TYPE & MGA_TEX1_BIT) { + O[8] = LINTERP(t, I[8], J[8]); + O[9] = LINTERP(t, I[9], J[9]); + } +} + + + +/* When clipping is complete, scan the final vertex list and emit any + * new ones to dma buffers. Update the element list to a format + * suitable for sending to hardware. + */ +static void TAG(project_and_emit_verts)( mgaContextPtr mmesa, + const GLfloat *verts, + GLuint *elt, + int nr) +{ + + GLfloat *O = mmesa->next_vert; + GLuint phys = mmesa->next_vert_phys; + + const GLfloat *m = mmesa->device_matrix; + const GLfloat sx = m[0], sy = m[5], sz = m[10]; + const GLfloat tx = m[12], ty = m[13], tz = m[14]; + GLuint i; + + for (i = 0 ; i < nr ; i++) { + const GLfloat *I = &verts[elt[i] * CLIP_STRIDE]; + GLuint tmp = *(GLuint *)&I[5]; + + if (0) fprintf(stderr, "elt[%d] (tmp 0x%x %d) %d --> ", i, (GLuint)&I[5], + tmp, elt[i]); + + + if ((elt[i] = tmp) == ~0) + { + GLfloat oow = 1.0/I[3]; + + elt[i] = phys; + phys -= BUFFER_STRIDE * sizeof(GLuint); + + O[0] = sx * I[0] * oow + tx; + O[1] = sy * I[1] * oow + ty; + O[2] = sz * I[2] * oow + tz; + O[3] = oow; + + if (TYPE & MGA_RGBA_BIT) { + *(int*)&O[4] = *(int*)&I[4]; + } + + if (TYPE & MGA_TEX0_BIT) { + *(int*)&O[6] = *(int*)&I[6]; + *(int*)&O[7] = *(int*)&I[7]; + } + + if (TYPE & MGA_TEX1_BIT) { + *(int*)&O[8] = *(int*)&I[8]; + *(int*)&O[9] = *(int*)&I[9]; + } + + O -= BUFFER_STRIDE; + } + if (0) fprintf(stderr, "0x%x\n", elt[i]); + } + + mmesa->next_vert = O; + mmesa->next_vert_phys = phys; +} + + + +static void TAG(mga_init_eltpath)( struct mga_elt_tab *tab ) +{ + tab->emit_unclipped_verts = TAG(emit_unclipped_verts); + tab->build_tri_verts = TAG(build_tri_verts); + tab->interp = TAG(interp); + tab->project_and_emit_verts = TAG(project_and_emit_verts); +} + +#undef TYPE +#undef TAG +#undef STRIDE diff --git a/xc/lib/GL/mesa/src/drv/mga/mgafastpath.c b/xc/lib/GL/mesa/src/drv/mga/mgafastpath.c index 8017e7f02..76e0047f8 100644 --- a/xc/lib/GL/mesa/src/drv/mga/mgafastpath.c +++ b/xc/lib/GL/mesa/src/drv/mga/mgafastpath.c @@ -380,8 +380,10 @@ static void mga_project_vertices( struct vertex_buffer *VB ) GLmatrix *mat = &ctx->Viewport.WindowMap; GLfloat m[16]; + REFRESH_DRAWABLE_INFO(mmesa); + m[MAT_SX] = mat->m[MAT_SX]; - m[MAT_TX] = mat->m[MAT_TX] + mmesa->drawX - .5; + m[MAT_TX] = mat->m[MAT_TX] + mmesa->drawX + .5; m[MAT_SY] = (- mat->m[MAT_SY]); m[MAT_TY] = (- mat->m[MAT_TY]) + mmesa->driDrawable->h + mmesa->drawY - .5; m[MAT_SZ] = mat->m[MAT_SZ] * (1.0 / 0x10000); @@ -401,8 +403,10 @@ static void mga_project_clipped_vertices( struct vertex_buffer *VB ) GLmatrix *mat = &ctx->Viewport.WindowMap; GLfloat m[16]; + REFRESH_DRAWABLE_INFO(mmesa); + m[MAT_SX] = mat->m[MAT_SX]; - m[MAT_TX] = mat->m[MAT_TX] + mmesa->drawX - .5; + m[MAT_TX] = mat->m[MAT_TX] + mmesa->drawX + .5; m[MAT_SY] = (- mat->m[MAT_SY]); m[MAT_TY] = (- mat->m[MAT_TY]) + mmesa->driDrawable->h + mmesa->drawY - .5; m[MAT_SZ] = mat->m[MAT_SZ] * (1.0 / 0x10000); @@ -484,6 +488,16 @@ void mgaDDFastPath( struct vertex_buffer *VB ) gl_prepare_arrays_cva( VB ); /* still need this */ + if (gl_reduce_prim[prim] == GL_TRIANGLES && + VB->Count < (MGA_DMA_BUF_SZ / 48) && + (ctx->ModelProjectMatrix.flags & (MAT_FLAG_GENERAL| + MAT_FLAG_PERSPECTIVE)) && + mmesa->mgaScreen->chipset == MGA_CARD_TYPE_G400) + { + mgaDDEltPath( VB ); + return; + } + /* Reserve enough space for the pathological case. */ if (VB->EltPtr->count * 12 > MGA_DRIVER_DATA(VB)->size) { @@ -507,18 +521,12 @@ void mgaDDFastPath( struct vertex_buffer *VB ) ctx->CVA.elt_mode = gl_reduce_prim[prim]; VB->EltPtr = &(MGA_DRIVER_DATA(VB)->clipped_elements); - LOCK_HARDWARE( mmesa ); mga_project_clipped_vertices( VB ); /* clip->device space */ mga_render_elements_direct( VB ); /* render using new list */ - mgaFlushVerticesLocked( mmesa ); - UNLOCK_HARDWARE( mmesa ); } } else { - LOCK_HARDWARE( mmesa ); mga_project_vertices( VB ); /* clip->device space */ mga_render_elements_direct( VB ); /* render using orig list */ - mgaFlushVerticesLocked( mmesa ); - UNLOCK_HARDWARE( mmesa ); } /* This indicates that there is no cached data to reuse. diff --git a/xc/lib/GL/mesa/src/drv/mga/mgafasttmp.h b/xc/lib/GL/mesa/src/drv/mga/mgafasttmp.h index 43caddcac..683640409 100644 --- a/xc/lib/GL/mesa/src/drv/mga/mgafasttmp.h +++ b/xc/lib/GL/mesa/src/drv/mga/mgafasttmp.h @@ -39,7 +39,6 @@ static void TAG(mga_setup_full)( struct vertex_buffer *VB, GLuint do_cliptest ) const GLfloat * const m = ctx->ModelProjectMatrix.m; GLuint start = VB->CopyStart; GLuint count = VB->Count; - GLuint i; gl_xform_points3_v16_general(MGA_DRIVER_DATA(VB)->verts[start].f, m, @@ -71,26 +70,63 @@ static void TAG(mga_setup_full)( struct vertex_buffer *VB, GLuint do_cliptest ) GLuint tex1_stride = VB->TexCoordPtr[1]->stride; GLfloat *f = MGA_DRIVER_DATA(VB)->verts[start].f; - - for (i = start ; i < count ; i++, f += 16) { + GLfloat *end = f+(16*(count-start)); + while (f != end) { if (TYPE & MGA_RGBA_BIT) { +#if defined(USE_X86_ASM) + __asm__ ( + "movl (%%edx),%%eax \n" + "bswap %%eax \n" + "rorl $8,%%eax \n" + "movl %%eax,16(%%edi) \n" + : + : "d" (color), "D" (f) + : "%eax" ); +#else + GLubyte *col = color; GLubyte *b = (GLubyte *)&f[CLIP_UBYTE_COLOR]; - GLubyte *col = color; color += color_stride; - b[CLIP_UBYTE_R] = col[0]; - b[CLIP_UBYTE_G] = col[1]; b[CLIP_UBYTE_B] = col[2]; + b[CLIP_UBYTE_G] = col[1]; + b[CLIP_UBYTE_R] = col[0]; b[CLIP_UBYTE_A] = col[3]; +#endif } if (TYPE & MGA_TEX0_BIT) { - f[CLIP_S0] = tex0_data[0]; - f[CLIP_T0] = tex0_data[1]; - STRIDE_F(tex0_data, tex0_stride); +#if defined (USE_X86_ASM) + __asm__ ( + "movl (%%ecx), %%eax \n" + "movl %%eax, 24(%%edi) \n" + "movl 4(%%ecx), %%eax \n" + "movl %%eax, 28(%%edi)" + : + : "c" (tex0_data), "D" (f) + : "%eax"); +#else + *(unsigned int *)(f+CLIP_S0) = *(unsigned int *)tex0_data; + *(unsigned int *)(f+CLIP_T0) = *(unsigned int *)(tex0_data+1); +#endif } if (TYPE & MGA_TEX1_BIT) { - f[CLIP_S1] = tex1_data[0]; - f[CLIP_T1] = tex1_data[1]; - STRIDE_F(tex1_data, tex1_stride); + /* Hits a second cache line. + */ +#if defined (USE_X86_ASM) + __asm__ ( + "movl (%%esi), %%eax \n" + "movl %%eax, 32(%%edi) \n" + "movl 4(%%esi), %%eax \n" + "movl %%eax, 36(%%edi)" + : + : "S" (tex1_data), "D" (f) + : "%eax"); +#else + *(unsigned int *)(f+CLIP_S1) = *(unsigned int *)tex1_data; + *(unsigned int *)(f+CLIP_T1) = *(unsigned int *)(tex1_data+1); +#endif } + if(TYPE & MGA_RGBA_BIT)color += color_stride; + if(TYPE & MGA_TEX0_BIT)STRIDE_F(tex0_data, tex0_stride); + if(TYPE & MGA_TEX1_BIT)STRIDE_F(tex1_data, tex1_stride); + f += 16; } } diff --git a/xc/lib/GL/mesa/src/drv/mga/mgaioctl.c b/xc/lib/GL/mesa/src/drv/mga/mgaioctl.c index c1819924d..640849e3f 100644 --- a/xc/lib/GL/mesa/src/drv/mga/mgaioctl.c +++ b/xc/lib/GL/mesa/src/drv/mga/mgaioctl.c @@ -14,114 +14,137 @@ #include "mgalog.h" #include "mgavb.h" #include "mgatris.h" +#include "mgabuffers.h" + #include "drm.h" #include <sys/ioctl.h> +#define DEPTH_SCALE 65535.0F + static void mga_iload_dma_ioctl(mgaContextPtr mmesa, - int x1, int y1, int x2, int y2, - unsigned long dest, unsigned int maccess) + unsigned long dest, + int length) { int retcode; drm_mga_iload_t iload; - drmBufPtr buf = mmesa->dma_buffer; + drmBufPtr buf = mmesa->iload_buffer; iload.idx = buf->idx; iload.destOrg = dest; - iload.mAccess = maccess; - iload.texture.x1 = x1; - iload.texture.y1 = y1; - iload.texture.y2 = x2; - iload.texture.x2 = y2; + iload.length = length; + + if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "DRM_IOCTL_MGA_ILOAD idx %d dst %x length %d\n", + iload.idx, iload.destOrg, iload.length); + if ((retcode = ioctl(mmesa->driFd, DRM_IOCTL_MGA_ILOAD, &iload))) { printf("send iload retcode = %d\n", retcode); exit(1); } -} + mmesa->iload_buffer = 0; + + if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "finished iload dma put\n"); + +} -static void mga_vertex_dma_ioctl(mgaContextPtr mmesa) +int mgaUpdateLock( mgaContextPtr mmesa, drmLockFlags flags ) { - int retcode; - int size = MGA_DMA_BUF_SZ; - drmDMAReq dma; - drmBufPtr buf = mmesa->dma_buffer; + drm_lock_t lock; + + lock.flags = 0; - dma.context = mmesa->hHWContext; - dma.send_count = 1; - dma.send_list = &buf->idx; - dma.send_sizes = &size; - dma.flags = DRM_DMA_WAIT; - dma.request_count = 0; - dma.request_size = 0; - dma.request_list = 0; - dma.request_sizes = 0; - - if ((retcode = drmDMA(mmesa->driFd, &dma))) { - printf("send iload retcode = %d\n", retcode); - exit(1); + if (mmesa->sarea->last_quiescent != mmesa->sarea->last_enqueue && + flags & DRM_LOCK_QUIESCENT) { + if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "mgaLockQuiescent\n"); + lock.flags |= _DRM_LOCK_QUIESCENT; + } + + if (flags & DRM_LOCK_FLUSH) lock.flags |= _DRM_LOCK_FLUSH; + if (flags & DRM_LOCK_FLUSH_ALL) lock.flags |= _DRM_LOCK_FLUSH_ALL; + + if (!lock.flags) + return 0; + + if(ioctl(mmesa->driFd, DRM_IOCTL_MGA_FLUSH, &lock)) { + fprintf(stderr, "Lockupdate failed\n"); + return -1; } + + if(flags & DRM_LOCK_QUIESCENT) + mmesa->sarea->last_quiescent = mmesa->sarea->last_enqueue; + + return 0; } - -static void mga_get_buffer_ioctl( mgaContextPtr mmesa ) +static drmBufPtr mga_get_buffer_ioctl( mgaContextPtr mmesa ) { int idx = 0; int size = 0; drmDMAReq dma; int retcode; + drmBufPtr buf; - fprintf(stderr, "Getting dma buffer\n"); + if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "Getting dma buffer\n"); dma.context = mmesa->hHWContext; dma.send_count = 0; dma.send_list = NULL; dma.send_sizes = NULL; - dma.flags = DRM_DMA_WAIT; + dma.flags = 0; dma.request_count = 1; dma.request_size = MGA_DMA_BUF_SZ; dma.request_list = &idx; dma.request_sizes = &size; - - if ((retcode = drmDMA(mmesa->driFd, &dma))) { - fprintf(stderr, "request drmDMA retcode = %d\n", retcode); - exit(1); - } + dma.granted_count = 0; - mmesa->dma_buffer = &mmesa->mgaScreen->bufs->list[idx]; -} -static void mga_swap_ioctl( mgaContextPtr mmesa ) -{ - int retcode; - drm_mga_swap_t swap; - - if((retcode = ioctl(mmesa->driFd, DRM_IOCTL_MGA_SWAP, &swap))) { - printf("send swap retcode = %d\n", retcode); - exit(1); - } -} + if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "drmDMA (get) ctx %d count %d size 0x%x\n", + dma.context, dma.request_count, + dma.request_size); + while (1) { + retcode = drmDMA(mmesa->driFd, &dma); + if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "retcode %d sz %d idx %d count %d\n", + retcode, + dma.request_sizes[0], + dma.request_list[0], + dma.granted_count); -static void mga_clear_ioctl( mgaContextPtr mmesa, int flags, int col, int zval ) -{ - int retcode; - drm_mga_clear_t clear; - - clear.flags = flags; - clear.clear_color = col; - clear.clear_depth = zval; - - if((retcode = ioctl(mmesa->driFd, DRM_IOCTL_MGA_CLEAR, &clear))) { - printf("send clear retcode = %d\n", retcode); - exit(1); + if (retcode == 0 && + dma.request_sizes[0] && + dma.granted_count) + break; + + if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "\n\nflush"); + mgaUpdateLock( mmesa, DRM_LOCK_FLUSH ); } -} + buf = &(mmesa->mgaScreen->bufs->list[idx]); + buf->used = 0; + if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, + "drmDMA (get) returns size[0] 0x%x idx[0] %d\n" + "dma_buffer now: buf idx: %d size: %d used: %d\n", + dma.request_sizes[0], dma.request_list[0], + buf->idx, buf->total, + buf->used); + if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "finished getbuffer\n"); + + return buf; +} @@ -130,52 +153,59 @@ GLbitfield mgaClear( GLcontext *ctx, GLbitfield mask, GLboolean all, GLint cx, GLint cy, GLint cw, GLint ch ) { mgaContextPtr mmesa = MGA_CONTEXT( ctx ); - GLuint c = mmesa->ClearColor; - mgaUI32 zval = (mgaUI32) (ctx->Depth.Clear * DEPTH_SCALE); __DRIdrawablePrivate *dPriv = mmesa->driDrawable; - int flags = 0; + const GLuint colorMask = *((GLuint *) &ctx->Color.ColorMask); + drm_mga_clear_t clear; + int retcode; int i; + static int nrclears; - mgaMsg( 10, "mgaClear( %i, %i, %i, %i, %i )\n", - mask, x, y, width, height ); - + if (0) fprintf(stderr, "clear %d: %d,%d %dx%d\n", all,cx,cy,cw,ch); - mgaFlushVertices( mmesa ); + clear.flags = 0; + clear.clear_color = mmesa->ClearColor; + clear.clear_depth = (mgaUI32) (ctx->Depth.Clear * DEPTH_SCALE); + FLUSH_BATCH( mmesa ); + + if ((mask & DD_FRONT_LEFT_BIT) && colorMask == ~0) { + clear.flags |= MGA_FRONT; + mask &= ~DD_FRONT_LEFT_BIT; + } - if (mask & GL_COLOR_BUFFER_BIT) { - if (ctx->Color.DriverDrawBuffer == GL_FRONT_LEFT) { - flags |= MGA_CLEAR_FRONT; - mask &= ~GL_COLOR_BUFFER_BIT; - } else if (ctx->Color.DriverDrawBuffer == GL_BACK_LEFT) { - flags |= MGA_CLEAR_BACK; - mask &= ~GL_COLOR_BUFFER_BIT; - } + if ((mask & DD_BACK_LEFT_BIT) && colorMask == ~0) { + clear.flags |= MGA_BACK; + mask &= ~DD_BACK_LEFT_BIT; } - if ((flags & GL_DEPTH_BUFFER_BIT) && ctx->Depth.Mask) { - flags |= MGA_CLEAR_DEPTH; - mask &= ~GL_DEPTH_BUFFER_BIT; + if ((mask & DD_DEPTH_BIT) && ctx->Depth.Mask) { + clear.flags |= MGA_DEPTH; + mask &= ~DD_DEPTH_BIT; } - if (!flags) + if (!clear.flags) return mask; LOCK_HARDWARE( mmesa ); - + + if (mmesa->dirty_cliprects) + mgaUpdateRects( mmesa, (MGA_FRONT|MGA_BACK)); + /* flip top to bottom */ cy = dPriv->h-cy-ch; cx += mmesa->drawX; cy += mmesa->drawY; - for (i = 0 ; i < dPriv->numClipRects ; ) { + if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "Clear, bufs %x nbox %d\n", + (int)clear.flags, (int)mmesa->numClipRects); - /* Use the cliprects for the current draw buffer - */ + for (i = 0 ; i < mmesa->numClipRects ; ) + { int nr = MIN2(i + MGA_NR_SAREA_CLIPRECTS, mmesa->numClipRects); XF86DRIClipRectRec *box = mmesa->pClipRects; - xf86drmClipRectRec *b = mmesa->sarea->boxes; - mmesa->sarea->nbox = nr - i; + drm_clip_rect_t *b = mmesa->sarea->boxes; + int n = 0; if (!all) { for ( ; i < nr ; i++) { @@ -196,16 +226,37 @@ GLbitfield mgaClear( GLcontext *ctx, GLbitfield mask, GLboolean all, b->x2 = x + w; b->y2 = y + h; b++; + n++; } } else { - for ( ; i < nr ; i++) - *b++ = *(xf86drmClipRectRec *)&box[i]; + for ( ; i < nr ; i++) { + *b++ = *(drm_clip_rect_t *)&box[i]; + n++; + } } - mga_clear_ioctl( mmesa, mask, c, zval ); + + if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, + "DRM_IOCTL_MGA_CLEAR flag 0x%x color %x depth %x nbox %d\n", + clear.flags, clear.clear_color, + clear.clear_depth, mmesa->sarea->nbox); + + + mmesa->sarea->nbox = n; + + retcode = ioctl(mmesa->driFd, DRM_IOCTL_MGA_CLEAR, &clear); + if (retcode) { + printf("send clear retcode = %d\n", retcode); + exit(1); + } + if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "finished clear %d\n", ++nrclears); } UNLOCK_HARDWARE( mmesa ); + mmesa->dirty |= MGA_UPLOAD_CLIPRECTS; + return mask; } @@ -218,50 +269,61 @@ GLbitfield mgaClear( GLcontext *ctx, GLbitfield mask, GLboolean all, void mgaSwapBuffers( mgaContextPtr mmesa ) { __DRIdrawablePrivate *dPriv = mmesa->driDrawable; + XF86DRIClipRectPtr pbox; + int nbox; + drm_mga_swap_t swap; + static int nrswaps; + int retcode; int i; + int tmp; - mgaFlushVertices( mmesa ); - LOCK_HARDWARE( mmesa ); - { - /* Use the frontbuffer cliprects - */ - XF86DRIClipRectPtr pbox = dPriv->pClipRects; - int nbox = dPriv->numClipRects; + FLUSH_BATCH( mmesa ); - for (i = 0 ; i < nbox ; ) - { - int nr = MIN2(i + MGA_NR_SAREA_CLIPRECTS, dPriv->numClipRects); - XF86DRIClipRectRec *b = (XF86DRIClipRectRec *)mmesa->sarea->boxes; - mmesa->sarea->nbox = nr - i; + LOCK_HARDWARE( mmesa ); + + /* Use the frontbuffer cliprects + */ + if (mmesa->dirty_cliprects & MGA_FRONT) + mgaUpdateRects( mmesa, MGA_FRONT ); + - for ( ; i < nr ; i++) - *b++ = pbox[i]; - - mga_swap_ioctl( mmesa ); - } - } + pbox = dPriv->pClipRects; + nbox = dPriv->numClipRects; + if (0) fprintf(stderr, "swap, nbox %d\n", nbox); -#if 1 - UNLOCK_HARDWARE(mmesa); -#else + for (i = 0 ; i < nbox ; ) { - last_enqueue = mmesa->sarea->lastEnqueue; - last_dispatch = mmesa->sarea->lastDispatch; - UNLOCK_HARDWARE; + int nr = MIN2(i + MGA_NR_SAREA_CLIPRECTS, dPriv->numClipRects); + XF86DRIClipRectRec *b = (XF86DRIClipRectRec *)mmesa->sarea->boxes; + + mmesa->sarea->nbox = nr - i; + + for ( ; i < nr ; i++) + *b++ = pbox[i]; - /* Throttle runaway apps - there should be an easier way to sleep - * on dma without locking out the rest of the system! - */ - if (mmesa->lastSwap > last_dispatch) { - drmGetLock(mmesa->driFd, mmesa->hHWContext, DRM_LOCK_QUIESCENT); - DRM_UNLOCK(mmesa->driFd, mmesa->driHwLock, mmesa->hHWContext); + if (0) + fprintf(stderr, "DRM_IOCTL_MGA_SWAP\n"); + + if((retcode = ioctl(mmesa->driFd, DRM_IOCTL_MGA_SWAP, &swap))) { + printf("send swap retcode = %d\n", retcode); + exit(1); } - mmesa->lastSwap = last_enqueue; + if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "finished swap %d\n", ++nrswaps); } -#endif + + tmp = GET_ENQUEUE_AGE(mmesa); + + UNLOCK_HARDWARE( mmesa ); + + if (GET_DISPATCH_AGE(mmesa) < mmesa->lastSwap) + mgaWaitAge(mmesa, mmesa->lastSwap); + + mmesa->lastSwap = tmp; + mmesa->dirty |= MGA_UPLOAD_CLIPRECTS; } @@ -269,13 +331,165 @@ void mgaSwapBuffers( mgaContextPtr mmesa ) */ void mgaDDFinish( GLcontext *ctx ) { - mgaContextPtr mmesa = MGA_CONTEXT( ctx ); - drmGetLock(mmesa->driFd, mmesa->hHWContext, DRM_LOCK_QUIESCENT); - DRM_UNLOCK(mmesa->driFd, mmesa->driHwLock, mmesa->hHWContext); + mgaContextPtr mmesa = MGA_CONTEXT(ctx); + + FLUSH_BATCH( mmesa ); + + if (mmesa->sarea->last_quiescent != mmesa->sarea->last_enqueue) { + if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "mgaRegetLockQuiescent\n"); + + LOCK_HARDWARE( mmesa ); + mgaUpdateLock( mmesa, DRM_LOCK_QUIESCENT | DRM_LOCK_FLUSH); + UNLOCK_HARDWARE( mmesa ); + + mmesa->sarea->last_quiescent = mmesa->sarea->last_enqueue; + } +} + +void mgaWaitAgeLocked( mgaContextPtr mmesa, int age ) +{ + if (GET_DISPATCH_AGE(mmesa) < age) { + if (0) fprintf(stderr, "\n\n\nmgaWaitAgeLocked\n"); + mgaUpdateLock( mmesa, DRM_LOCK_FLUSH ); + } +} + + +void mgaWaitAge( mgaContextPtr mmesa, int age ) +{ + if (GET_DISPATCH_AGE(mmesa) < age) { + LOCK_HARDWARE(mmesa); + if (GET_DISPATCH_AGE(mmesa) < age) { + if (0) fprintf(stderr, "\n\n\nmgaWaitAge\n"); + mgaUpdateLock( mmesa, DRM_LOCK_FLUSH ); + } + UNLOCK_HARDWARE(mmesa); + } +} + + +static int intersect_rect( drm_clip_rect_t *out, + drm_clip_rect_t *a, + drm_clip_rect_t *b ) +{ + *out = *a; + if (b->x1 > out->x1) out->x1 = b->x1; + if (b->y1 > out->y1) out->y1 = b->y1; + if (b->x2 < out->x2) out->x2 = b->x2; + if (b->y2 < out->y2) out->y2 = b->y2; + if (out->x1 >= out->x2) return 0; + if (out->y1 >= out->y2) return 0; + return 1; +} + + + + +static void age_mmesa( mgaContextPtr mmesa, int age ) +{ + if (mmesa->CurrentTexObj[0]) mmesa->CurrentTexObj[0]->age = age; + if (mmesa->CurrentTexObj[1]) mmesa->CurrentTexObj[1]->age = age; } +void mgaFlushVerticesLocked( mgaContextPtr mmesa ) +{ + drm_clip_rect_t *pbox = (drm_clip_rect_t *)mmesa->pClipRects; + int nbox = mmesa->numClipRects; + drmBufPtr buffer = mmesa->vertex_dma_buffer; + drm_mga_vertex_t vertex; + int i; + + mmesa->vertex_dma_buffer = 0; + + if (!buffer) + return; + + if (mmesa->dirty_cliprects & mmesa->draw_buffer) + mgaUpdateRects( mmesa, mmesa->draw_buffer ); + + if (mmesa->dirty & ~MGA_UPLOAD_CLIPRECTS) + mgaEmitHwStateLocked( mmesa ); + + /* FIXME: Workaround bug in kernel module. + */ + mmesa->sarea->dirty |= MGA_UPLOAD_CTX; + + /* FIXME: dstorg bug + */ + if (0) + if (mmesa->lastX != mmesa->drawX || mmesa->lastY != mmesa->drawY) + fprintf(stderr, "****** last: %d,%d current: %d,%d\n", + mmesa->lastX, mmesa->lastY, + mmesa->drawX, mmesa->drawY); + + vertex.idx = buffer->idx; + vertex.used = buffer->used; + vertex.discard = 0; + + if (!nbox) + vertex.used = 0; + + if (nbox >= MGA_NR_SAREA_CLIPRECTS) + mmesa->dirty |= MGA_UPLOAD_CLIPRECTS; + + if (!vertex.used || !(mmesa->dirty & MGA_UPLOAD_CLIPRECTS)) + { + if (nbox == 1) + mmesa->sarea->nbox = 0; + else + mmesa->sarea->nbox = nbox; + + if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "Firing vertex -- case a nbox %d\n", nbox); + + vertex.discard = 1; + ioctl(mmesa->driFd, DRM_IOCTL_MGA_VERTEX, &vertex); + age_mmesa(mmesa, mmesa->sarea->last_enqueue); + } + else + { + for (i = 0 ; i < nbox ; ) + { + int nr = MIN2(i + MGA_NR_SAREA_CLIPRECTS, nbox); + drm_clip_rect_t *b = mmesa->sarea->boxes; + + if (mmesa->scissor) { + mmesa->sarea->nbox = 0; + + for ( ; i < nr ; i++) { + *b = pbox[i]; + if (intersect_rect(b, b, &mmesa->scissor_rect)) { + mmesa->sarea->nbox++; + b++; + } + } + + /* Culled? + */ + if (!mmesa->sarea->nbox) { + if (nr < nbox) continue; + vertex.used = 0; + } + } else { + mmesa->sarea->nbox = nr - i; + for ( ; i < nr ; i++) + *b++ = pbox[i]; + } + + /* Finished with the buffer? + */ + if (nr == nbox) + vertex.discard = 1; + mmesa->sarea->dirty |= MGA_UPLOAD_CLIPRECTS; + ioctl(mmesa->driFd, DRM_IOCTL_MGA_VERTEX, &vertex); + age_mmesa(mmesa, mmesa->sarea->last_enqueue); + } + } + mmesa->dirty &= ~MGA_UPLOAD_CLIPRECTS; +} void mgaFlushVertices( mgaContextPtr mmesa ) { @@ -284,38 +498,221 @@ void mgaFlushVertices( mgaContextPtr mmesa ) UNLOCK_HARDWARE( mmesa ); } +void mgaFlushEltsLocked( mgaContextPtr mmesa ) +{ + if (mmesa->first_elt != mmesa->next_elt) { + mgaFireEltsLocked( mmesa, + ((GLuint)mmesa->first_elt - + (GLuint)mmesa->elt_buf->address), + ((GLuint)mmesa->next_elt - + (GLuint)mmesa->elt_buf->address), + 0 ); + mmesa->first_elt = mmesa->next_elt; + } +} -void mgaFlushVerticesLocked( mgaContextPtr mmesa ) +void mgaFlushElts( mgaContextPtr mmesa ) +{ + LOCK_HARDWARE( mmesa ); + mgaFlushEltsLocked( mmesa ); + UNLOCK_HARDWARE( mmesa ); +} + + +mgaUI32 *mgaAllocVertexDwords( mgaContextPtr mmesa, int dwords ) +{ + int bytes = dwords * 4; + mgaUI32 *head; + + if (!mmesa->vertex_dma_buffer) { + LOCK_HARDWARE( mmesa ); + + if (mmesa->first_elt != mmesa->next_elt) + mgaFlushEltsLocked(mmesa); + + mmesa->vertex_dma_buffer = mga_get_buffer_ioctl( mmesa ); + UNLOCK_HARDWARE( mmesa ); + } else if (mmesa->vertex_dma_buffer->used + bytes > + mmesa->vertex_dma_buffer->total) { + LOCK_HARDWARE( mmesa ); + mgaFlushVerticesLocked( mmesa ); + mmesa->vertex_dma_buffer = mga_get_buffer_ioctl( mmesa ); + UNLOCK_HARDWARE( mmesa ); + } + + head = (mgaUI32 *)((char *)mmesa->vertex_dma_buffer->address + + mmesa->vertex_dma_buffer->used); + + mmesa->vertex_dma_buffer->used += bytes; + return head; +} + + +void mgaFireILoadLocked( mgaContextPtr mmesa, + GLuint offset, GLuint length ) +{ + if (!mmesa->iload_buffer) { + fprintf(stderr, "mgaFireILoad: no buffer\n"); + return; + } + + if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "mgaFireILoad idx %d ofs 0x%x length %d\n", + mmesa->iload_buffer->idx, (int)offset, (int)length ); + + mga_iload_dma_ioctl( mmesa, offset, length ); +} + +void mgaGetILoadBufferLocked( mgaContextPtr mmesa ) +{ + if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) + fprintf(stderr, "mgaGetIloadBuffer (buffer now %p)\n", + mmesa->iload_buffer); + + mmesa->iload_buffer = mga_get_buffer_ioctl( mmesa ); +} + + + void mgaDDFlush( GLcontext *ctx ) { - XF86DRIClipRectPtr pbox = mmesa->pClipRects; + mgaContextPtr mmesa = MGA_CONTEXT( ctx ); + + + FLUSH_BATCH( mmesa ); + + /* This may be called redundantly - dispatch_age may trail what + * has actually been sent and processed by the hardware. + */ + if (GET_DISPATCH_AGE( mmesa ) < mmesa->sarea->last_enqueue) { + LOCK_HARDWARE( mmesa ); + if (0) fprintf(stderr, "mgaDDFlush %d %d\n", GET_DISPATCH_AGE( mmesa ), mmesa->sarea->last_enqueue); + mgaUpdateLock( mmesa, DRM_LOCK_FLUSH ); + UNLOCK_HARDWARE( mmesa ); + } +} + + + +void mgaFireEltsLocked( mgaContextPtr mmesa, + GLuint start, + GLuint end, + GLuint discard ) +{ + drm_clip_rect_t *pbox = (drm_clip_rect_t *)mmesa->pClipRects; int nbox = mmesa->numClipRects; + drmBufPtr buffer = mmesa->elt_buf; + drm_mga_indices_t elts; int i; - if (mmesa->dirty) + + if (0) fprintf(stderr, "FireElts %d %d\n", start/4, end/4); + + if (!buffer) + return; + + if (mmesa->dirty_cliprects & mmesa->draw_buffer) + mgaUpdateRects( mmesa, mmesa->draw_buffer ); + + if (mmesa->dirty & ~MGA_UPLOAD_CLIPRECTS) mgaEmitHwStateLocked( mmesa ); - for (i = 0 ; i < nbox ; ) + /* FIXME: Workaround bug in kernel module. + */ + mmesa->sarea->dirty |= MGA_UPLOAD_CTX; + + elts.idx = buffer->idx; + elts.start = start; + elts.end = end; + elts.discard = 0; + + if (!nbox) + elts.end = start; + + if (nbox >= MGA_NR_SAREA_CLIPRECTS) + mmesa->dirty |= MGA_UPLOAD_CLIPRECTS; + + if (elts.end == start || !(mmesa->dirty & MGA_UPLOAD_CLIPRECTS)) { - int nr = MIN2(i + MGA_NR_SAREA_CLIPRECTS, nbox); - XF86DRIClipRectRec *b = (XF86DRIClipRectRec *)mmesa->sarea->boxes; - mmesa->sarea->nbox = nr - i; + if (nbox == 1) + mmesa->sarea->nbox = 0; + else + mmesa->sarea->nbox = nbox; + + if (0) + fprintf(stderr, "Firing elts -- case a nbox %d\n", nbox); + + elts.discard = discard; + ioctl(mmesa->driFd, DRM_IOCTL_MGA_INDICES, &elts); + age_mmesa(mmesa, mmesa->sarea->last_enqueue); + } + else + { + for (i = 0 ; i < nbox ; ) + { + int nr = MIN2(i + MGA_NR_SAREA_CLIPRECTS, nbox); + drm_clip_rect_t *b = mmesa->sarea->boxes; + + if (mmesa->scissor) { + mmesa->sarea->nbox = 0; + + for ( ; i < nr ; i++) { + *b = pbox[i]; + if (intersect_rect(b, b, &mmesa->scissor_rect)) { + mmesa->sarea->nbox++; + b++; + } + } + + /* Culled? + */ + if (!mmesa->sarea->nbox) { + if (nr < nbox) continue; + elts.end = start; + } + } else { + mmesa->sarea->nbox = nr - i; + for ( ; i < nr ; i++) + *b++ = pbox[i]; + } - for ( ; i < nr ; i++) - *b++ = pbox[i]; - - mga_vertex_dma_ioctl( mmesa ); + /* Potentially finished with the buffer? + */ + if (nr == nbox) + elts.discard = discard; - break; /* fix dma multiple dispatch */ + if (0) + fprintf(stderr, "Firing elts -- case b nbox %d\n", nbox); + + mmesa->sarea->dirty |= MGA_UPLOAD_CLIPRECTS; + ioctl(mmesa->driFd, DRM_IOCTL_MGA_INDICES, &elts); + age_mmesa(mmesa, mmesa->sarea->last_enqueue); + } } - mga_get_buffer_ioctl( mmesa ); + mmesa->dirty &= ~MGA_UPLOAD_CLIPRECTS; +} + +void mgaGetEltBufLocked( mgaContextPtr mmesa ) +{ + mmesa->elt_buf = mga_get_buffer_ioctl( mmesa ); } +void mgaReleaseBufLocked( mgaContextPtr mmesa, drmBufPtr buffer ) +{ + drm_mga_vertex_t vertex; + + if (!buffer) return; + + vertex.idx = buffer->idx; + vertex.used = 0; + vertex.discard = 1; + ioctl(mmesa->driFd, DRM_IOCTL_MGA_VERTEX, &vertex); +} void mgaDDInitIoctlFuncs( GLcontext *ctx ) { ctx->Driver.Clear = mgaClear; - ctx->Driver.Flush = 0; + ctx->Driver.Flush = mgaDDFlush; ctx->Driver.Finish = mgaDDFinish; } diff --git a/xc/lib/GL/mesa/src/drv/mga/mgaioctl.h b/xc/lib/GL/mesa/src/drv/mga/mgaioctl.h index 22ca26e17..900e4a4f8 100644 --- a/xc/lib/GL/mesa/src/drv/mga/mgaioctl.h +++ b/xc/lib/GL/mesa/src/drv/mga/mgaioctl.h @@ -9,9 +9,37 @@ GLbitfield mgaClear( GLcontext *ctx, GLbitfield mask, GLboolean all, void mgaSwapBuffers( mgaContextPtr mmesa ); + + +mgaUI32 *mgaAllocVertexDwords( mgaContextPtr mmesa, int dwords ); + + +void mgaGetILoadBufferLocked( mgaContextPtr mmesa ); + + +void mgaFireILoadLocked( mgaContextPtr mmesa, + GLuint offset, GLuint length ); + +void mgaWaitAgeLocked( mgaContextPtr mmesa, int age ); +void mgaWaitAge( mgaContextPtr mmesa, int age ); +int mgaUpdateLock( mgaContextPtr mmesa, drmLockFlags flags ); + void mgaFlushVertices( mgaContextPtr mmesa ); void mgaFlushVerticesLocked( mgaContextPtr mmesa ); + +void mgaFireEltsLocked( mgaContextPtr mmesa, + GLuint start, + GLuint end, + GLuint discard ); + +void mgaGetEltBufLocked( mgaContextPtr mmesa ); +void mgaReleaseBufLocked( mgaContextPtr mmesa, drmBufPtr buffer ); + +void mgaFlushEltsLocked( mgaContextPtr mmesa ); +void mgaFlushElts( mgaContextPtr mmesa ) ; + + /* upload texture */ @@ -19,5 +47,12 @@ void mgaDDFinish( GLcontext *ctx ); void mgaDDInitIoctlFuncs( GLcontext *ctx ); +#define FLUSH_BATCH(mmesa) do { \ + if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL) \ + fprintf(stderr, "FLUSH_BATCH in %s\n", __FUNCTION__); \ + if (mmesa->vertex_dma_buffer) mgaFlushVertices(mmesa); \ + else if (mmesa->next_elt != mmesa->first_elt) mgaFlushElts(mmesa); \ +} while (0) + #endif diff --git a/xc/lib/GL/mesa/src/drv/mga/mgalib.h b/xc/lib/GL/mesa/src/drv/mga/mgalib.h index 4600a69a0..7d086ae28 100644 --- a/xc/lib/GL/mesa/src/drv/mga/mgalib.h +++ b/xc/lib/GL/mesa/src/drv/mga/mgalib.h @@ -32,10 +32,10 @@ #include "dri_tmm.h" #include "dri_mesaint.h" #include "dri_mesa.h" -#include "xmesaP.h" #include "types.h" +#include "drm.h" #include "mgacommon.h" #include "mm.h" #include "mgalog.h" @@ -43,7 +43,6 @@ #include "mgatex.h" #include "mgavb.h" -#include "mga_drm_public.h" #include "mga_xmesa.h" @@ -51,11 +50,8 @@ #define MGA_FIELD(field,val) (((val) << (field ## _SHIFT)) & ~(field ## _MASK)) #define MGA_GET_FIELD(field, val) ((val & ~(field ## _MASK)) >> (field ## _SHIFT)) -#define MGA_CHIP_MGAG200 0 -#define MGA_CHIP_MGAG400 1 - -#define MGA_IS_G200(mmesa) (mmesa->mgaScreen->chipset == MGA_CHIP_MGAG200) -#define MGA_IS_G400(mmesa) (mmesa->mgaScreen->chipset == MGA_CHIP_MGAG400) +#define MGA_IS_G200(mmesa) (mmesa->mgaScreen->chipset == MGA_CARD_TYPE_G200) +#define MGA_IS_G400(mmesa) (mmesa->mgaScreen->chipset == MGA_CARD_TYPE_G400) /* SoftwareFallback @@ -65,6 +61,7 @@ */ #define MGA_FALLBACK_TEXTURE 0x1 #define MGA_FALLBACK_BUFFER 0x2 +#define MGA_FALLBACK_STIPPLE 0x3 /* For mgaCtx->new_state. @@ -97,17 +94,45 @@ typedef void (*mga_interp_func)( GLfloat t, #define MGA_PF_8888 (10 << 4) #define MGA_PF_HASALPHA (8 << 4) + + +/* Reasons why the GL_BLEND fallback mightn't work: + */ +#define MGA_BLEND_ENV_COLOR 0x1 +#define MGA_BLEND_MULTITEX 0x2 + +struct mga_elt_tab { + void (*emit_unclipped_verts)( struct vertex_buffer *VB ); + + void (*build_tri_verts)( mgaContextPtr mmesa, + struct vertex_buffer *VB, + GLfloat *O, GLuint *elt ); + + void (*interp)( GLfloat t, GLfloat *O, + const GLfloat *I, const GLfloat *J ); + + void (*project_and_emit_verts)( mgaContextPtr mmesa, + const GLfloat *verts, + GLuint *elts, + int nr ); +}; + struct mga_context_t { GLcontext *glCtx; - /* Hardware state - moved from mgabuf.h - */ - mgaUI32 Setup[MGA_CTX_SETUP_SIZE]; - /* Variable sized vertices + /* Bookkeeping for texturing */ - mgaUI32 vertsize; + int lastTexHeap; + struct mga_texture_object_s TexObjList[MGA_NR_TEX_HEAPS]; + struct mga_texture_object_s SwappedOut; + struct mga_texture_object_s *CurrentTexObj[2]; + memHeap_t *texHeap[MGA_NR_TEX_HEAPS]; + int c_texupload; + int c_texusage; + int tex_thrash; + /* Map GL texture units onto hardware. */ @@ -116,72 +141,99 @@ struct mga_context_t { mgaUI32 tex_dest[2]; + /* Manage fallbacks + */ + mgaUI32 IndirectTriangles; + int Fallback; - /* bookkeeping for textureing */ - struct mga_texture_object_s TexObjList; - struct mga_texture_object_s SwappedOut; - struct mga_texture_object_s *CurrentTexObj[2]; - - - /* shared texture palette */ - mgaUI16 GlobalPalette[256]; - - int Fallback; /* or'ed values of FALLBACK_* */ - /* Support for CVA and the fast paths */ + /* Support for CVA and the fastpath + */ unsigned int setupdone; unsigned int setupindex; unsigned int renderindex; unsigned int using_fast_path; - unsigned int using_immediate_fast_path; mga_interp_func interp; - /* Shortcircuit some state changes */ + + /* Support for limited GL_BLEND fallback + */ + unsigned int blend_flags; + unsigned int envcolor; + + + /* Shortcircuit some state changes + */ points_func PointsFunc; line_func LineFunc; triangle_func TriangleFunc; quad_func QuadFunc; - /* Manage our own state */ + + /* Manage driver and hardware state + */ GLuint new_state; GLuint dirty; - - GLubyte clearcolor[4]; - GLushort MonoColor; - GLushort ClearColor; + GLuint Setup[MGA_CTX_SETUP_SIZE]; + GLuint warp_pipe; + GLuint vertsize; + GLushort MonoColor; + GLushort ClearColor; + GLuint poly_stipple; - /* DRI stuff + /* Dma buffers */ - drmBufPtr dma_buffer; + drmBufPtr vertex_dma_buffer; + drmBufPtr iload_buffer; - GLframebuffer *glBuffer; - memHeap_t *texHeap; + + /* Drawable, cliprect and scissor information + */ + int dirty_cliprects; /* which sets of cliprects are uptodate? */ + int draw_buffer; /* which buffer are we rendering to */ + unsigned int drawOffset; /* draw buffer address in space */ + int read_buffer; + int readOffset; + int drawX, drawY; /* origin of drawable in draw buffer */ + int lastX, lastY; /* detect DSTORG bug */ + GLuint numClipRects; /* cliprects for the draw buffer */ + XF86DRIClipRectPtr pClipRects; + XF86DRIClipRectRec draw_rect; + drm_clip_rect_t scissor_rect; + int scissor; - GLuint needClip; - GLuint warp_pipe; - /* These refer to the current draw (front vs. back) buffer: + /* Texture aging and DMA based aging. */ - int drawOffset; /* draw buffer address in agp space */ - int drawX; /* origin of drawable in draw buffer */ - int drawY; - GLuint numClipRects; /* cliprects for that buffer */ - XF86DRIClipRectPtr pClipRects; + unsigned int texAge[MGA_NR_TEX_HEAPS];/* texture LRU age */ + unsigned int dirtyAge; /* buffer age for synchronization */ + unsigned int lastSwap; /* throttling runaway apps */ - int texAge; - XF86DRIClipRectRec draw_rect; + /* Mirrors of some DRI state. + */ + GLframebuffer *glBuffer; drmContext hHWContext; drmLock *driHwLock; int driFd; Display *display; - __DRIdrawablePrivate *driDrawable; __DRIscreenPrivate *driScreen; mgaScreenPrivate *mgaScreen; drm_mga_sarea_t *sarea; + + + /* New setupdma path + */ + drmBufPtr elt_buf, retained_buf; + GLuint *first_elt, *next_elt; + GLfloat *next_vert; + GLuint next_vert_phys; + GLuint first_vert_phys; + struct mga_elt_tab *elt_tab; + GLfloat device_matrix[16]; }; @@ -191,16 +243,12 @@ typedef struct { /* dma stuff */ mgaUI32 systemTexture; - mgaUI32 noSetupDma; mgaUI32 default32BitTextures; - mgaUI32 swapBuffersCount; /* options */ mgaUI32 nullprims; /* skip all primitive generation */ - mgaUI32 noFallback; /* don't fall back to software, do - best-effort rendering */ - mgaUI32 skipDma; /* don't send anything to the hardware */ + mgaUI32 noFallback; /* performance counters */ mgaUI32 c_textureUtilization; @@ -240,10 +288,12 @@ extern mgaGlx_t mgaglx; extern int MGA_DEBUG; #endif -#define MGA_DEBUG_ALWAYS_SYNC 0x1 -#define MGA_DEBUG_VERBOSE_MSG 0x2 -#define MGA_DEBUG_VERBOSE_LRU 0x4 -#define MGA_DEBUG_VERBOSE_DRI 0x8 +#define DEBUG_ALWAYS_SYNC 0x1 +#define DEBUG_VERBOSE_MSG 0x2 +#define DEBUG_VERBOSE_LRU 0x4 +#define DEBUG_VERBOSE_DRI 0x8 +#define DEBUG_VERBOSE_IOCTL 0x10 +#define DEBUG_VERBOSE_2D 0x20 static __inline__ mgaUI32 mgaPackColor(mgaUI32 format, mgaUI8 r, mgaUI8 g, diff --git a/xc/lib/GL/mesa/src/drv/mga/mgapipeline.h b/xc/lib/GL/mesa/src/drv/mga/mgapipeline.h index d42abddfe..dc0179227 100644 --- a/xc/lib/GL/mesa/src/drv/mga/mgapipeline.h +++ b/xc/lib/GL/mesa/src/drv/mga/mgapipeline.h @@ -12,4 +12,7 @@ extern GLboolean mgaDDBuildPrecalcPipeline( GLcontext *ctx ); extern void mgaDDFastPath( struct vertex_buffer *VB ); extern void mgaDDFastPathInit( void ); +extern void mgaDDEltPath( struct vertex_buffer *VB ); +extern void mgaDDEltPathInit( void ); + #endif diff --git a/xc/lib/GL/mesa/src/drv/mga/mgarender.c b/xc/lib/GL/mesa/src/drv/mga/mgarender.c deleted file mode 100644 index 6f406db2d..000000000 --- a/xc/lib/GL/mesa/src/drv/mga/mgarender.c +++ /dev/null @@ -1,334 +0,0 @@ -#include <stdio.h> -#include "mgadd.h" -#include "mgavb.h" -#include "mgadma.h" -#include "mgalib.h" -#include "mgatris.h" -#include "mgastate.h" -#include "xsmesaP.h" -#include "enums.h" - -#define POINT(x) mga_draw_point(&gWin[x], psize) -#define LINE(x,y) mga_draw_line(&gWin[x], &gWin[y], lwidth) -#define TRI(x,y,z) mga_draw_triangle(&gWin[x], &gWin[y], &gWin[z]) - - -/* Direct, and no clipping required. I haven't written the clip funcs - * yet, so this is only useful for the fast path, which does its own - * clipping. - */ -#define RENDER_POINTS( start, count ) \ -do { \ - GLuint e; \ - for(e=start;e<=count;e++) \ - POINT(elt[e]); \ -} while (0) - -#define RENDER_LINE( i1, i ) \ -do { \ - GLuint e1 = elt[i1], e = elt[i]; \ - LINE( e1, e ); \ -} while (0) - - -#define RENDER_TRI( i2, i1, i, pv, parity) \ -do { \ -{ GLuint e2 = elt[i2], e1 = elt[i1], e = elt[i]; \ - if (parity) {GLuint tmp = e2; e2 = e1; e1 = tmp;} \ - TRI(e2, e1, e); \ -}} while (0) - - -#define RENDER_QUAD( i3, i2, i1, i, pv) \ -do { \ - GLuint e3 = elt[i3], e2 = elt[i2], e1 = elt[i1], e = elt[i]; \ - TRI(e3, e2, e); \ - TRI(e2, e1, e); \ -} while (0) - -#define LOCAL_VARS \ - mgaVertexPtr gWin = MGA_DRIVER_DATA(VB)->verts; \ - const GLuint *elt = VB->EltPtr->data; \ - const GLfloat lwidth = VB->ctx->Line.Width; \ - const GLfloat psize = VB->ctx->Point.Size; \ - GLcontext *ctx = VB->ctx; \ - (void) lwidth; (void)psize; (void)ctx; (void) gWin; - - -#define TAG(x) x##_mga_smooth_indirect -#include "render_tmp.h" - - - - -#define RENDER_POINTS( start, count ) \ -do { \ - GLuint e; \ - for(e=start;e<=count;e++) \ - POINT(e); \ -} while (0) - -#define RENDER_LINE( i1, i ) \ -do { \ - LINE( i1, i ); \ -} while (0) - - -#define RENDER_TRI( i2, i1, i, pv, parity) \ -do { \ - GLuint e2 = i2, e1 = i1; \ - if (parity) {GLuint tmp = e2; e2 = e1; e1 = tmp;} \ - TRI(e2, e1, i); \ -} while (0) - - -#define RENDER_QUAD( i3, i2, i1, i, pv) \ -do { \ - TRI(i3, i2, i); \ - TRI(i2, i1, i); \ -} while (0) - -#define LOCAL_VARS \ - mgaVertexPtr gWin = MGA_DRIVER_DATA(VB)->verts; \ - const GLfloat lwidth = VB->ctx->Line.Width; \ - const GLfloat psize = VB->ctx->Point.Size; \ - GLcontext *ctx = VB->ctx; \ - (void) lwidth; (void)psize; (void)ctx; (void) gWin; - -#define TAG(x) x##_mga_smooth_direct -#include "render_tmp.h" - - - - - -/* Vertex array rendering via. the SetupDma function - no clipping required. - */ -#define RENDER_POINTS( start, count ) \ -do { \ - FatalError("Dead code in mgarender.c\n"); \ -} while (0) - -#define RENDER_LINE( i1, i ) \ -do { \ - FatalError("Dead code in mgarender.c\n"); \ -} while (0) - - -#define RENDER_TRI( i2, i1, i, pv, parity) \ -do { \ - GLuint e2 = elt[i2], e1 = elt[i1], e = elt[i]; \ - if (/*parity*/0) {GLuint tmp = e2; e2 = e1; e1 = tmp;} \ - TRI(e2, e1, e); \ -} while (0) - -#define RENDER_QUAD( i3, i2, i1, i, pv) \ -do { \ - GLuint e3 = elt[i3], e2 = elt[i2], e1 = elt[i1], e = elt[i]; \ - TRI(e3, e2, e); \ - TRI(e2, e1, e); \ -} while (0) - -#define LOCAL_VARS \ - mgaVertexBufferPtr mgaVB = MGA_DRIVER_DATA(VB); \ - mgaUI32 phys = mgaVB->vert_phys_start; \ - const GLuint *elt = VB->EltPtr->data; \ - (void) phys; (void) elt; - -#define PRESERVE_VB_DEFS -#undef TRI -#define VERT_ADDR_10( phys, elt ) ( phys + elt * 48 ) -#define TRI( ee0, ee1, ee2 ) \ -{ \ - mgaVB->elt_buf[0] = VERT_ADDR_10(phys, ee0); \ - mgaVB->elt_buf[1] = VERT_ADDR_10(phys, ee1); \ - mgaVB->elt_buf[2] = VERT_ADDR_10(phys, ee2); \ - mgaVB->elt_buf += 3; \ -} -#define TAG(x) x##_mga_elt_10 -#include "render_tmp.h" - - -#define TAG(x) x##_mga_elt_8 -#undef TRI -#define VERT_ADDR_8( phys, elt ) ( phys + elt * 32 ) -#define TRI( ee0, ee1, ee2 ) \ -{ \ - mgaVB->elt_buf[0] = VERT_ADDR_8(phys, ee0); \ - mgaVB->elt_buf[1] = VERT_ADDR_8(phys, ee1); \ - mgaVB->elt_buf[2] = VERT_ADDR_8(phys, ee2); \ - mgaVB->elt_buf += 3; \ -} -#include "render_tmp.h" - - - - -/* Currently only used on the fast path - need a set of render funcs - * for clipped primitives. - */ -void mgaDDRenderElementsDirect( struct vertex_buffer *VB ) -{ - mgaVertexBufferPtr mgaVB = MGA_DRIVER_DATA(VB); - GLcontext *ctx = VB->ctx; - mgaContextPtr mmesa = MGA_CONTEXT( ctx ); - GLenum prim = ctx->CVA.elt_mode; - GLuint nr = VB->EltPtr->count; - render_func func = render_tab_mga_smooth_indirect[prim]; - GLuint p = 0; - mgaUI32 *start = mgaVB->elt_buf; - - struct vertex_buffer *saved_vb = ctx->VB; - - if (mmesa->new_state) - mgaDDUpdateHwState( ctx ); - - /* Are we using Setup DMA? - */ - if (start) { - switch (MGA_CONTEXT(ctx)->vertsize) { - case 10: - func = render_tab_mga_elt_10[prim]; - break; - case 8: - func = render_tab_mga_elt_8[prim]; - break; - default: - } - } - - ctx->VB = VB; - - do { - func( VB, 0, nr, 0 ); - } while (ctx->Driver.MultipassFunc && - ctx->Driver.MultipassFunc( VB, ++p )); - - ctx->VB = saved_vb; - - - if (start && nr) { - if (0) - fprintf(stderr, "%d/%d elts\n", nr, mgaVB->elt_buf-start); - mgaSetupDma( start, mgaVB->elt_buf - start ); - mgaVB->elt_buf = mgaVB->vert_buf = 0; - } -} - - -void mgaDDRenderElementsImmediate( struct vertex_buffer *VB ) -{ - GLcontext *ctx = VB->ctx; - mgaContextPtr mmesa = MGA_CONTEXT( ctx ); - GLuint nr = VB->EltPtr->count; - render_func *tab = render_tab_mga_smooth_indirect; - GLuint parity = VB->Parity; - GLuint p = 0; - GLuint i, next; - - if (mmesa->new_state) - mgaDDUpdateHwState( ctx ); - - do { - for ( i= VB->CopyStart ; i < nr ; parity = 0, i = next ) - { - GLenum prim = VB->Primitive[i]; - next = VB->NextPrimitive[i]; - tab[prim]( VB, i, next, parity ); - } - } while (ctx->Driver.MultipassFunc && - ctx->Driver.MultipassFunc( VB, ++p )); -} - - -void mgaDDRenderDirect( struct vertex_buffer *VB ) -{ - GLcontext *ctx = VB->ctx; - mgaContextPtr mmesa = MGA_CONTEXT( ctx ); - GLuint nr = VB->Count; - render_func *tab = render_tab_mga_smooth_direct; - GLuint parity = VB->Parity; - GLuint p = 0; - GLuint i, next; - - if (mmesa->new_state) - mgaDDUpdateHwState( ctx ); - - do { - for ( i= VB->CopyStart ; i < nr ; parity = 0, i = next ) - { - GLenum prim = VB->Primitive[i]; - next = VB->NextPrimitive[i]; - tab[prim]( VB, i, next, parity ); - } - } while (ctx->Driver.MultipassFunc && - ctx->Driver.MultipassFunc( VB, ++p )); -} - - -static void optimized_render_vb_triangle_mga_smooth_indirect(struct vertex_buffer *VB, - GLuint start, - GLuint count, - GLuint parity) -{ - mgaVertexPtr gWin = MGA_DRIVER_DATA(VB)->verts; - const GLuint *elt = VB->EltPtr->data; - GLcontext *ctx = VB->ctx; - mgaContextPtr mmesa = MGA_CONTEXT( ctx ); - - mgaUI32 vertsize = mmesa->vertsize; - - /* We know how many dwords we need so we can allocate all of it - * in one call */ - mgaUI32 *wv = mgaAllocSecondaryBuffer( count * vertsize ); - - int vertex; - - (void)ctx; (void) gWin; (void) parity; - - - for(vertex=start+2;vertex<count;vertex+=3){ - GLuint e2=elt[vertex-2],e1=elt[vertex-1],e=elt[vertex]; - mgaUI32 *src; - - int j; - - if(parity){ - GLuint tmp=e2; - e2=e1; - e1=tmp; - } - - src=&gWin[e2].ui[0]; - - for(j=vertsize;j;j--){ - *wv++=*src++; - } - - src=&gWin[e1].ui[0]; - for(j=vertsize;j;j--){ - *wv++=*src++; - } - - src=&gWin[e].ui[0]; - for(j=vertsize;j;j--){ - *wv++=*src++; - } - } - -} - - -void mgaDDRenderInit() -{ - - render_init_mga_smooth_indirect(); - render_init_mga_smooth_direct(); - render_init_mga_elt_10(); - render_init_mga_elt_8(); - - render_tab_mga_smooth_indirect[GL_TRIANGLES] = - optimized_render_vb_triangle_mga_smooth_indirect; -} - - diff --git a/xc/lib/GL/mesa/src/drv/mga/mgarender.h b/xc/lib/GL/mesa/src/drv/mga/mgarender.h deleted file mode 100644 index c772ac459..000000000 --- a/xc/lib/GL/mesa/src/drv/mga/mgarender.h +++ /dev/null @@ -1,10 +0,0 @@ - -#ifndef _MGA_RENDER_H -#define _MGA_RENDER_H - -extern void mgaDDRenderElementsDirect( struct vertex_buffer *VB ); -extern void mgaDDRenderElementsImmediate( struct vertex_buffer *VB ); -extern void mgaDDRenderDirect( struct vertex_buffer *VB ); -extern void mgaDDRenderInit(); - -#endif diff --git a/xc/lib/GL/mesa/src/drv/mga/mgastate.c b/xc/lib/GL/mesa/src/drv/mga/mgastate.c index ff9063e0b..7a3b82930 100644 --- a/xc/lib/GL/mesa/src/drv/mga/mgastate.c +++ b/xc/lib/GL/mesa/src/drv/mga/mgastate.c @@ -16,7 +16,7 @@ #include "mgavb.h" #include "mgatris.h" #include "mgaregs.h" -#include "mga_drm_public.h" +#include "mgabuffers.h" static void mgaUpdateZMode(const GLcontext *ctx) { @@ -60,17 +60,20 @@ static void mgaUpdateZMode(const GLcontext *ctx) static void mgaDDAlphaFunc(GLcontext *ctx, GLenum func, GLclampf ref) { + FLUSH_BATCH( MGA_CONTEXT(ctx) ); MGA_CONTEXT(ctx)->new_state |= MGA_NEW_ALPHA; } static void mgaDDBlendEquation(GLcontext *ctx, GLenum mode) { + FLUSH_BATCH( MGA_CONTEXT(ctx) ); MGA_CONTEXT(ctx)->new_state |= MGA_NEW_ALPHA; } static void mgaDDBlendFunc(GLcontext *ctx, GLenum sfactor, GLenum dfactor) { + FLUSH_BATCH( MGA_CONTEXT(ctx) ); MGA_CONTEXT(ctx)->new_state |= MGA_NEW_ALPHA; } @@ -78,6 +81,7 @@ static void mgaDDBlendFuncSeparate( GLcontext *ctx, GLenum sfactorRGB, GLenum dfactorRGB, GLenum sfactorA, GLenum dfactorA ) { + FLUSH_BATCH( MGA_CONTEXT(ctx) ); MGA_CONTEXT(ctx)->new_state |= MGA_NEW_ALPHA; } @@ -87,6 +91,7 @@ static void mgaDDLightModelfv(GLcontext *ctx, GLenum pname, const GLfloat *param) { if (pname == GL_LIGHT_MODEL_COLOR_CONTROL) { + FLUSH_BATCH( MGA_CONTEXT(ctx) ); MGA_CONTEXT(ctx)->new_state |= MGA_NEW_TEXTURE; } } @@ -95,6 +100,7 @@ static void mgaDDLightModelfv(GLcontext *ctx, GLenum pname, static void mgaDDShadeModel(GLcontext *ctx, GLenum mode) { if (1) { + FLUSH_BATCH( MGA_CONTEXT(ctx) ); MGA_CONTEXT(ctx)->new_state |= MGA_NEW_TEXTURE; mgaMsg(8, "mgaDDShadeModel: %x\n", mode); } @@ -103,11 +109,13 @@ static void mgaDDShadeModel(GLcontext *ctx, GLenum mode) static void mgaDDDepthFunc(GLcontext *ctx, GLenum func) { + FLUSH_BATCH( MGA_CONTEXT(ctx) ); MGA_CONTEXT(ctx)->new_state |= MGA_NEW_DEPTH; } static void mgaDDDepthMask(GLcontext *ctx, GLboolean flag) { + FLUSH_BATCH( MGA_CONTEXT(ctx) ); MGA_CONTEXT(ctx)->new_state |= MGA_NEW_DEPTH; } @@ -134,6 +142,7 @@ static void mgaUpdateFogAttrib( GLcontext *ctx ) static void mgaDDFogfv(GLcontext *ctx, GLenum pname, const GLfloat *param) { + FLUSH_BATCH( MGA_CONTEXT(ctx) ); MGA_CONTEXT(ctx)->new_state |= MGA_NEW_FOG; } @@ -148,10 +157,11 @@ static void mgaDDFogfv(GLcontext *ctx, GLenum pname, const GLfloat *param) static void mgaUpdateAlphaMode(GLcontext *ctx) { mgaContextPtr mmesa = MGA_CONTEXT( ctx ); + mgaScreenPrivate *mgaScreen = mmesa->mgaScreen; int a = 0; /* determine source of alpha for blending and testing */ - if ( !ctx->Texture.Enabled || (mmesa->Fallback & MGA_FALLBACK_TEXTURE)) + if ( !ctx->Texture.Enabled ) a |= AC_alphasel_diffused; else { switch (ctx->Texture.Unit[0].EnvMode) { @@ -168,7 +178,7 @@ static void mgaUpdateAlphaMode(GLcontext *ctx) } - /* alpha test control - disabled by default. + /* alpha test control. */ if (ctx->Color.AlphaEnabled) { GLubyte ref = ctx->Color.AlphaRef; @@ -219,13 +229,13 @@ static void mgaUpdateAlphaMode(GLcontext *ctx) case GL_ONE_MINUS_SRC_ALPHA: a |= AC_src_om_src_alpha; break; case GL_DST_ALPHA: - if (0) /*(mgaScreen->Attrib & MGA_PF_HASALPHA)*/ + if (mgaScreen->Attrib & MGA_PF_HASALPHA) a |= AC_src_dst_alpha; else a |= AC_src_one; break; case GL_ONE_MINUS_DST_ALPHA: - if (0) /*(mgaScreen->Attrib & MGA_PF_HASALPHA)*/ + if (mgaScreen->Attrib & MGA_PF_HASALPHA) a |= AC_src_om_dst_alpha; else a |= AC_src_zero; @@ -250,13 +260,13 @@ static void mgaUpdateAlphaMode(GLcontext *ctx) case GL_ONE_MINUS_SRC_COLOR: a |= AC_dst_om_src_color; break; case GL_DST_ALPHA: - if (0) /*(mgaDB->Attrib & MGA_PF_HASALPHA)*/ + if (mgaScreen->Attrib & MGA_PF_HASALPHA) a |= AC_dst_dst_alpha; else a |= AC_dst_one; break; case GL_ONE_MINUS_DST_ALPHA: - if (0) /*(mgaScreen->Attrib & MGA_PF_HASALPHA)*/ + if (mgaScreen->Attrib & MGA_PF_HASALPHA) a |= AC_dst_om_dst_alpha; else a |= AC_dst_zero; @@ -282,50 +292,44 @@ static void mgaUpdateAlphaMode(GLcontext *ctx) * Hardware clipping */ -static void mgaUpdateClipping(const GLcontext *ctx) +void mgaUpdateClipping(const GLcontext *ctx) { -#if 0 - mgaContextPtr mmesa = MGA_CONTEXT( ctx ); - __DRIdrawablePrivate *dPriv = mmesa->driDrawable; - int x1,x2,y1,y2; - - if ( ctx->Scissor.Enabled) { - x1 = ctx->Scissor.X; - x2 = ctx->Scissor.X + ctx->Scissor.Width - 1; - y1 = dPriv->Height - ctx->Scissor.Y - ctx->Scissor.Height; - y2 = dPriv->Height - ctx->Scissor.Y - 1; - } else { - x1 = 0; - y1 = 0; - x2 = mgaDB->Width-1; - y2 = mgaDB->Height-1; - } - - if (x1 < 0) x1 = 0; - if (y1 < 0) y1 = 0; - if (x2 >= mgaDB->Width) x2 = mgaDB->Width-1; - if (y2 >= mgaDB->Height) y2 = mgaDB->Height-1; - - if (x1 > x2 || y1 > y2) { - x1 = 0; x2 = 0; - y2 = 0; y1 = 1; - } - - - mmesa->Setup[MGA_CTXREG_CXBNDRY] = (MGA_FIELD(CXB_cxright,x2) | - MGA_FIELD(CXB_cxleft,x1)); - mmesa->Setup[MGA_CTXREG_YTOP] = y1*mgaDB->Pitch; - mmesa->Setup[MGA_CTXREG_YBOT] = y2*mgaDB->Pitch; - + mgaContextPtr mmesa = MGA_CONTEXT(ctx); - mmesa->dirty |= MGA_UPLOAD_CTX; -#endif + if (mmesa->driDrawable) + { + int x1 = mmesa->driDrawable->x + ctx->Scissor.X; + int y1 = mmesa->driDrawable->y + mmesa->driDrawable->h - (ctx->Scissor.Y+ + ctx->Scissor.Height); + int x2 = mmesa->driDrawable->x + ctx->Scissor.X+ctx->Scissor.Width; + int y2 = mmesa->driDrawable->y + mmesa->driDrawable->h - ctx->Scissor.Y; + + if (x1 < 0) x1 = 0; + if (y1 < 0) y1 = 0; + if (x2 < 0) x2 = 0; + if (y2 < 0) y2 = 0; + + mmesa->scissor_rect.x1 = x1; + mmesa->scissor_rect.y1 = y1; + mmesa->scissor_rect.x2 = x2; + mmesa->scissor_rect.y2 = y2; + + if (MGA_DEBUG&DEBUG_VERBOSE_2D) + fprintf(stderr, "SET SCISSOR %d,%d-%d,%d\n", + mmesa->scissor_rect.x1, + mmesa->scissor_rect.y1, + mmesa->scissor_rect.x2, + mmesa->scissor_rect.y2); + + mmesa->dirty |= MGA_UPLOAD_CLIPRECTS; + } } static void mgaDDScissor( GLcontext *ctx, GLint x, GLint y, GLsizei w, GLsizei h ) { + FLUSH_BATCH( MGA_CONTEXT(ctx) ); MGA_CONTEXT(ctx)->new_state |= MGA_NEW_CLIP; } @@ -339,35 +343,6 @@ static void mgaDDDither(GLcontext *ctx, GLboolean enable) } -static GLboolean mgaDDSetBuffer(GLcontext *ctx, GLenum mode ) -{ - mgaContextPtr mmesa = MGA_CONTEXT(ctx); - - mmesa->Fallback &= ~MGA_FALLBACK_BUFFER; - - if (mode == GL_FRONT_LEFT) - { - mmesa->drawOffset = mmesa->mgaScreen->fbOffset; - mmesa->Setup[MGA_CTXREG_DSTORG] = mmesa->mgaScreen->fbOffset; - mmesa->dirty |= MGA_UPLOAD_CTX; - mgaXMesaSetFrontClipRects( mmesa ); - return GL_TRUE; - } - else if (mode == GL_BACK_LEFT) - { - mmesa->drawOffset = mmesa->mgaScreen->backOffset; - mmesa->Setup[MGA_CTXREG_DSTORG] = mmesa->mgaScreen->backOffset; - mmesa->dirty |= MGA_UPLOAD_CTX; - mgaXMesaSetBackClipRects( mmesa ); - return GL_TRUE; - } - else - { - mmesa->Fallback |= MGA_FALLBACK_BUFFER; - return GL_FALSE; - } -} - static void mgaDDSetColor(GLcontext *ctx, @@ -376,7 +351,7 @@ static void mgaDDSetColor(GLcontext *ctx, { mgaContextPtr mmesa = MGA_CONTEXT(ctx); - mmesa->MonoColor = mgaPackColor( mmesa->mgaScreen->fbFormat, + mmesa->MonoColor = mgaPackColor( mmesa->mgaScreen->Attrib, r, g, b, a ); } @@ -387,7 +362,7 @@ static void mgaDDClearColor(GLcontext *ctx, { mgaContextPtr mmesa = MGA_CONTEXT(ctx); - mmesa->ClearColor = mgaPackColor( mmesa->mgaScreen->fbFormat, + mmesa->ClearColor = mgaPackColor( mmesa->mgaScreen->Attrib, r, g, b, a ); } @@ -426,6 +401,7 @@ static void mgaUpdateCull( GLcontext *ctx ) static void mgaDDCullFaceFrontFace(GLcontext *ctx, GLenum mode) { + FLUSH_BATCH( MGA_CONTEXT(ctx) ); MGA_CONTEXT(ctx)->new_state |= MGA_NEW_CULL; } @@ -461,6 +437,7 @@ static GLboolean mgaDDColorMask(GLcontext *ctx, } if (mmesa->Setup[MGA_CTXREG_PLNWT] != mask) { + FLUSH_BATCH( MGA_CONTEXT(ctx) ); mmesa->Setup[MGA_CTXREG_PLNWT] = mask; MGA_CONTEXT(ctx)->new_state |= MGA_NEW_MASK; mmesa->dirty |= MGA_UPLOAD_CTX; @@ -470,6 +447,83 @@ static GLboolean mgaDDColorMask(GLcontext *ctx, } /* ============================================================= + * Polygon stipple + * + * The mga supports a subset of possible 4x4 stipples natively, GL + * wants 32x32. Fortunately stipple is usually a repeating pattern. + */ +static int mgaStipples[16] = { + 0xffff, + 0xa5a5, + 0x5a5a, + 0xa0a0, + 0x5050, + 0x0a0a, + 0x0505, + 0x8020, + 0x0401, + 0x1040, + 0x0208, + 0x0802, + 0x4010, + 0x0104, + 0x2080, + 0x0000 +}; + +static void mgaDDPolygonStipple( GLcontext *ctx, const GLubyte *mask ) +{ + mgaContextPtr mmesa = MGA_CONTEXT(ctx); + const GLubyte *m = mask; + GLubyte p[4]; + int i,j,k; + int active = (ctx->Polygon.StippleFlag && ctx->PB->primitive == GL_POLYGON); + GLuint stipple; + + FLUSH_BATCH(mmesa); + ctx->Driver.TriangleCaps |= DD_TRI_STIPPLE; + + if (active) { + mmesa->dirty |= MGA_UPLOAD_CTX; + mmesa->Setup[MGA_CTXREG_DWGCTL] &= ~(0xf<<20); + } + + p[0] = mask[0] & 0xf; p[0] |= p[0] << 4; + p[1] = mask[4] & 0xf; p[1] |= p[1] << 4; + p[2] = mask[8] & 0xf; p[2] |= p[2] << 4; + p[3] = mask[12] & 0xf; p[3] |= p[3] << 4; + + for (k = 0 ; k < 8 ; k++) + for (j = 0 ; j < 4; j++) + for (i = 0 ; i < 4 ; i++) + if (*m++ != p[j]) { + ctx->Driver.TriangleCaps &= ~DD_TRI_STIPPLE; + return; + } + + stipple = ( ((p[0] & 0xf) << 0) | + ((p[1] & 0xf) << 4) | + ((p[2] & 0xf) << 8) | + ((p[3] & 0xf) << 12) ); + + for (i = 0 ; i < 16 ; i++) + if (mgaStipples[i] == stipple) { + mmesa->poly_stipple = i<<20; + break; + } + + if (i == 16) { + ctx->Driver.TriangleCaps &= ~DD_TRI_STIPPLE; + return; + } + + if (active) { + mmesa->Setup[MGA_CTXREG_DWGCTL] &= ~(0xf<<20); + mmesa->Setup[MGA_CTXREG_DWGCTL] |= mmesa->poly_stipple; + } +} + +/* ============================================================= */ @@ -477,15 +531,16 @@ static GLboolean mgaDDColorMask(GLcontext *ctx, static void mgaDDPrintDirty( const char *msg, GLuint state ) { - fprintf(stderr, "%s (0x%x): %s%s%s%s%s%s\n", + fprintf(stderr, "%s (0x%x): %s%s%s%s%s%s%s\n", msg, (unsigned int) state, - (state & MGA_REQUIRE_QUIESCENT) ? "req-quiescent, " : "", + (state & MGA_WAIT_AGE) ? "wait-age, " : "", (state & MGA_UPLOAD_TEX0IMAGE) ? "upload-tex0-img, " : "", (state & MGA_UPLOAD_TEX1IMAGE) ? "upload-tex1-img, " : "", (state & MGA_UPLOAD_CTX) ? "upload-ctx, " : "", (state & MGA_UPLOAD_TEX0) ? "upload-tex0, " : "", - (state & MGA_UPLOAD_TEX1) ? "upload-tex1, " : "" + (state & MGA_UPLOAD_TEX1) ? "upload-tex1, " : "", + (state & MGA_UPLOAD_PIPE) ? "upload-pipe, " : "" ); } @@ -494,7 +549,7 @@ static void mgaDDPrintDirty( const char *msg, GLuint state ) */ void mgaEmitHwStateLocked( mgaContextPtr mmesa ) { - if (MGA_DEBUG & MGA_DEBUG_VERBOSE_MSG) + if (MGA_DEBUG & DEBUG_VERBOSE_MSG) mgaDDPrintDirty( "mgaEmitHwStateLocked", mmesa->dirty ); if ((mmesa->dirty & MGA_UPLOAD_TEX0IMAGE) && mmesa->CurrentTexObj[0]) @@ -503,27 +558,34 @@ void mgaEmitHwStateLocked( mgaContextPtr mmesa ) if ((mmesa->dirty & MGA_UPLOAD_TEX1IMAGE) && mmesa->CurrentTexObj[1]) mgaUploadTexImages(mmesa, mmesa->CurrentTexObj[1]); - if (mmesa->dirty & MGA_UPLOAD_CTX) { + if (mmesa->dirty & MGA_UPLOAD_CTX) memcpy( mmesa->sarea->ContextState, mmesa->Setup, sizeof(mmesa->Setup)); - if (mmesa->CurrentTexObj[0]) + if ((mmesa->dirty & MGA_UPLOAD_TEX0) && mmesa->CurrentTexObj[0]) memcpy(mmesa->sarea->TexState[0], mmesa->CurrentTexObj[0]->Setup, sizeof(mmesa->sarea->TexState[0])); - if (mmesa->CurrentTexObj[1]) + if ((mmesa->dirty & MGA_UPLOAD_TEX1) && mmesa->CurrentTexObj[1]) memcpy(mmesa->sarea->TexState[1], mmesa->CurrentTexObj[1]->Setup, sizeof(mmesa->sarea->TexState[1])); - } - if (mmesa->dirty & MGA_UPLOAD_PIPE) - mmesa->sarea->WarpPipe = mmesa->setupindex & MGA_WARP_T2GZSAF; - + mmesa->sarea->WarpPipe = ((mmesa->setupindex & MGA_WARP_T2GZSAF) | + MGA_ALPHA_BIT | MGA_SPEC_BIT | MGA_FOG_BIT); + + mmesa->sarea->dirty |= mmesa->dirty; - mmesa->dirty = 0; + +#if 0 + mgaPrintSetupFlags("warp pipe", mmesa->sarea->WarpPipe); + fprintf(stderr, "in mgaEmitHwStateLocked: dirty now %x\n", + mmesa->sarea->dirty); +#endif + + mmesa->dirty &= (MGA_UPLOAD_CLIPRECTS|MGA_WAIT_AGE); } @@ -533,29 +595,50 @@ void mgaEmitHwStateLocked( mgaContextPtr mmesa ) static void mgaDDEnable(GLcontext *ctx, GLenum cap, GLboolean state) { + mgaContextPtr mmesa = MGA_CONTEXT( ctx ); + switch(cap) { case GL_ALPHA_TEST: - MGA_CONTEXT(ctx)->new_state |= MGA_NEW_ALPHA; + FLUSH_BATCH( mmesa ); + mmesa->new_state |= MGA_NEW_ALPHA; break; case GL_BLEND: - MGA_CONTEXT(ctx)->new_state |= MGA_NEW_ALPHA; + FLUSH_BATCH( mmesa ); + mmesa->new_state |= MGA_NEW_ALPHA; break; case GL_DEPTH_TEST: - MGA_CONTEXT(ctx)->new_state |= MGA_NEW_DEPTH; + FLUSH_BATCH( mmesa ); + mmesa->new_state |= MGA_NEW_DEPTH; break; case GL_SCISSOR_TEST: - MGA_CONTEXT(ctx)->new_state |= MGA_NEW_CLIP; + FLUSH_BATCH( mmesa ); + mmesa->scissor = state; + mmesa->new_state |= MGA_NEW_CLIP; break; case GL_FOG: - MGA_CONTEXT(ctx)->new_state |= MGA_NEW_FOG; + FLUSH_BATCH( mmesa ); + mmesa->new_state |= MGA_NEW_FOG; break; case GL_CULL_FACE: - MGA_CONTEXT(ctx)->new_state |= MGA_NEW_CULL; + FLUSH_BATCH( mmesa ); + mmesa->new_state |= MGA_NEW_CULL; break; case GL_TEXTURE_1D: case GL_TEXTURE_2D: case GL_TEXTURE_3D: - MGA_CONTEXT(ctx)->new_state |= MGA_NEW_TEXTURE; + FLUSH_BATCH( mmesa ); + mmesa->new_state |= MGA_NEW_TEXTURE; + break; + case GL_POLYGON_STIPPLE: + if ((ctx->Driver.TriangleCaps & DD_TRI_STIPPLE) && + ctx->PB->primitive == GL_POLYGON) + { + FLUSH_BATCH(mmesa); + mmesa->dirty |= MGA_UPLOAD_CTX; + mmesa->Setup[MGA_CTXREG_DWGCTL] &= ~(0xf<<20); + if (state) + mmesa->Setup[MGA_CTXREG_DWGCTL] |= mmesa->poly_stipple; + } break; default: ; @@ -581,6 +664,7 @@ static void mgaWarpUpdateState( GLcontext *ctx ) { mmesa->warp_pipe = index; mmesa->new_state |= MGA_NEW_WARP; + mmesa->dirty |= MGA_UPLOAD_PIPE; } } @@ -611,21 +695,15 @@ void mgaDDUpdateHwState( GLcontext *ctx ) if (new_state) { - mmesa->new_state = 0; + FLUSH_BATCH( mmesa ); - /* Emit any vertices for the current state. This will also - * push the current state into the sarea. - */ -/* mgaFlushVertices( mmesa ); */ + mmesa->new_state = 0; if (MESA_VERBOSE&VERBOSE_DRIVER) mgaDDPrintState("UpdateHwState", new_state); if (new_state & MGA_NEW_DEPTH) - { mgaUpdateZMode(ctx); - mgaDDInitDepthFuncs(ctx); - } if (new_state & MGA_NEW_ALPHA) mgaUpdateAlphaMode(ctx); @@ -641,8 +719,6 @@ void mgaDDUpdateHwState( GLcontext *ctx ) if (new_state & (MGA_NEW_WARP|MGA_NEW_TEXTURE)) mgaUpdateTextureState(ctx); - - mmesa->new_state = 0; /* tex uploads scribble newstate */ } } @@ -654,8 +730,17 @@ void mgaDDUpdateHwState( GLcontext *ctx ) void mgaDDReducedPrimitiveChange( GLcontext *ctx, GLenum prim ) { - mgaFlushVertices( MGA_CONTEXT(ctx) ); - mgaUpdateCull(ctx); + mgaContextPtr mmesa = MGA_CONTEXT(ctx); + + FLUSH_BATCH( mmesa ); + mgaUpdateCull(ctx); + + if (ctx->Polygon.StippleFlag && (ctx->Driver.TriangleCaps & DD_TRI_STIPPLE)) + { + mmesa->Setup[MGA_CTXREG_DWGCTL] &= ~(0xf<<20); + if (ctx->PB->primitive == GL_POLYGON) + mmesa->Setup[MGA_CTXREG_DWGCTL] |= mmesa->poly_stipple; + } } @@ -677,10 +762,16 @@ void mgaDDUpdateState( GLcontext *ctx ) /* Have to do this here to detect texture fallbacks in time: */ - if (MGA_CONTEXT(ctx)->new_state & MGA_NEW_TEXTURE) + if (mmesa->new_state & MGA_NEW_TEXTURE) mgaDDUpdateHwState( ctx ); - if (!mmesa->Fallback || mgaglx.noFallback) { + if (0) fprintf(stderr, "fallback %x indirect %x\n", mmesa->Fallback, + mmesa->IndirectTriangles); + + if (!mmesa->Fallback) { + ctx->IndirectTriangles &= ~DD_SW_RASTERIZE; + ctx->IndirectTriangles |= mmesa->IndirectTriangles; + ctx->Driver.PointsFunc=mmesa->PointsFunc; ctx->Driver.LineFunc=mmesa->LineFunc; ctx->Driver.TriangleFunc=mmesa->TriangleFunc; @@ -689,6 +780,60 @@ void mgaDDUpdateState( GLcontext *ctx ) } + +void mgaInitState( mgaContextPtr mmesa ) +{ + mgaScreenPrivate *mgaScreen = mmesa->mgaScreen; + GLcontext *ctx = mmesa->glCtx; + + if (ctx->Color.DriverDrawBuffer == GL_BACK_LEFT) { + mmesa->draw_buffer = MGA_BACK; + mmesa->read_buffer = MGA_BACK; + mmesa->drawOffset = mmesa->mgaScreen->backOffset; + mmesa->readOffset = mmesa->mgaScreen->backOffset; + mmesa->Setup[MGA_CTXREG_DSTORG] = mgaScreen->backOffset; + } else { + mmesa->drawOffset = mmesa->mgaScreen->frontOffset; + mmesa->readOffset = mmesa->mgaScreen->frontOffset; + mmesa->draw_buffer = MGA_FRONT; + mmesa->read_buffer = MGA_FRONT; + mmesa->Setup[MGA_CTXREG_DSTORG] = mgaScreen->frontOffset; + } + +/* mmesa->Setup[MGA_CTXREG_MACCESS] = mgaScreen->mAccess; */ +/* mmesa->Setup[MGA_CTXREG_DWGCTL] = ( DC_clipdis_disable | */ +/* (0xC << DC_bop_SHIFT) | */ +/* DC_shftzero_enable | */ +/* DC_zmode_nozcmp | */ +/* DC_atype_zi ); */ + + + mmesa->Setup[MGA_CTXREG_MACCESS] = 0x1; + mmesa->Setup[MGA_CTXREG_DWGCTL] = 0xc4074; + + + mmesa->Setup[MGA_CTXREG_PLNWT] = ~0; + mmesa->Setup[MGA_CTXREG_ALPHACTRL] = ( AC_src_one | + AC_dst_zero | + AC_amode_FCOL | + AC_astipple_disable | + AC_aten_disable | + AC_atmode_noacmp | + AC_alphasel_fromtex ); + + mmesa->Setup[MGA_CTXREG_FOGCOLOR] = + MGAPACKCOLOR888((GLubyte)(ctx->Fog.Color[0]*255.0F), + (GLubyte)(ctx->Fog.Color[1]*255.0F), + (GLubyte)(ctx->Fog.Color[2]*255.0F)); + + mmesa->Setup[MGA_CTXREG_WFLAG] = 0; + mmesa->Setup[MGA_CTXREG_TDUAL0] = 0; + mmesa->Setup[MGA_CTXREG_TDUAL1] = 0; + mmesa->Setup[MGA_CTXREG_FCOL] = 0; + mmesa->new_state = ~0; +} + + void mgaDDInitStateFuncs( GLcontext *ctx ) { ctx->Driver.UpdateState = mgaDDUpdateState; @@ -710,11 +855,14 @@ void mgaDDInitStateFuncs( GLcontext *ctx ) ctx->Driver.RenderStart = mgaDDUpdateHwState; ctx->Driver.RenderFinish = 0; - ctx->Driver.SetBuffer = mgaDDSetBuffer; + ctx->Driver.SetDrawBuffer = mgaDDSetDrawBuffer; + ctx->Driver.SetReadBuffer = mgaDDSetReadBuffer; ctx->Driver.Color = mgaDDSetColor; ctx->Driver.ClearColor = mgaDDClearColor; ctx->Driver.Dither = mgaDDDither; + ctx->Driver.PolygonStipple = mgaDDPolygonStipple; + ctx->Driver.Index = 0; ctx->Driver.ClearIndex = 0; ctx->Driver.IndexMask = 0; diff --git a/xc/lib/GL/mesa/src/drv/mga/mgatex.c b/xc/lib/GL/mesa/src/drv/mga/mgatex.c index be7ad6018..eafccbaa2 100644 --- a/xc/lib/GL/mesa/src/drv/mga/mgatex.c +++ b/xc/lib/GL/mesa/src/drv/mga/mgatex.c @@ -47,22 +47,25 @@ * to it. */ static void mgaDestroyTexObj( mgaContextPtr mmesa, mgaTextureObjectPtr t ) { - int i; if ( !t ) return; /* free the texture memory */ - mmFreeMem( t->MemBlock ); + if (t->MemBlock) { + mmFreeMem( t->MemBlock ); + t->MemBlock = 0; + + if (t->age > mmesa->dirtyAge) + mmesa->dirtyAge = t->age; + } /* free mesa's link */ - t->tObj->DriverData = NULL; + if (t->tObj) + t->tObj->DriverData = NULL; /* see if it was the driver's current object */ - for ( i = 0 ; i < 2 ; i++ ) { - if ( mmesa->CurrentTexObj[i] == t ) { - mmesa->CurrentTexObj[i] = NULL; - } - } + if (t->bound) + mmesa->CurrentTexObj[t->bound - 1] = 0; remove_from_list(t); free( t ); @@ -73,6 +76,9 @@ static void mgaSwapOutTexObj(mgaContextPtr mmesa, mgaTextureObjectPtr t) if (t->MemBlock) { mmFreeMem(t->MemBlock); t->MemBlock = 0; + + if (t->age > mmesa->dirtyAge) + mmesa->dirtyAge = t->age; } t->dirty_images = ~0; @@ -80,22 +86,76 @@ static void mgaSwapOutTexObj(mgaContextPtr mmesa, mgaTextureObjectPtr t) } -void mgaResetGlobalLRU( mgaContextPtr mmesa ) +static void mgaPrintLocalLRU( mgaContextPtr mmesa, int heap ) +{ + mgaTextureObjectPtr t; + int sz = 1 << (mmesa->mgaScreen->logTextureGranularity[heap]); + + fprintf(stderr, "\nLocal LRU, heap %d:\n", heap); + + foreach( t, &(mmesa->TexObjList[heap]) ) { + if (!t->tObj) + fprintf(stderr, "Placeholder %d at %x sz %x\n", + t->MemBlock->ofs / sz, + t->MemBlock->ofs, + t->MemBlock->size); + else + fprintf(stderr, "Texture (bound %d) at %x sz %x\n", + t->bound, + t->MemBlock->ofs, + t->MemBlock->size); + + } + + fprintf(stderr, "\n\n"); +} + +static void mgaPrintGlobalLRU( mgaContextPtr mmesa, int heap ) +{ + int i, j; + drm_mga_tex_region_t *list = mmesa->sarea->texList[heap]; + + fprintf(stderr, "\nGlobal LRU, heap %d list %p:\n", heap, list); + + for (i = 0, j = MGA_NR_TEX_REGIONS ; i < MGA_NR_TEX_REGIONS ; i++) { + fprintf(stderr, "list[%d] age %d next %d prev %d\n", + j, list[j].age, list[j].next, list[j].prev); + j = list[j].next; + if (j == MGA_NR_TEX_REGIONS) break; + } + + if (j != MGA_NR_TEX_REGIONS) { + fprintf(stderr, "Loop detected in global LRU\n\n\n"); + for (i = 0 ; i < MGA_NR_TEX_REGIONS ; i++) { + fprintf(stderr, "list[%d] age %d next %d prev %d\n", + i, list[i].age, list[i].next, list[i].prev); + } + } + + fprintf(stderr, "\n\n"); +} + + +static void mgaResetGlobalLRU( mgaContextPtr mmesa, GLuint heap ) { - mgaTexRegion *list = mmesa->sarea->texList; - int sz = 1 << mmesa->mgaScreen->logTextureGranularity; + drm_mga_tex_region_t *list = mmesa->sarea->texList[heap]; + int sz = 1 << mmesa->mgaScreen->logTextureGranularity[heap]; int i; + mmesa->texAge[heap] = ++mmesa->sarea->texAge[heap]; + + if (0) fprintf(stderr, "mgaResetGlobalLRU %d\n", (int)heap); + /* (Re)initialize the global circular LRU list. The last element * in the array (MGA_NR_TEX_REGIONS) is the sentinal. Keeping it * at the end of the array allows it to be addressed rationally * when looking up objects at a particular location in texture * memory. */ - for (i = 0 ; (i+1) * sz < mmesa->mgaScreen->textureSize ; i++) { + for (i = 0 ; (i+1) * sz <= mmesa->mgaScreen->textureSize[heap] ; i++) { list[i].prev = i-1; list[i].next = i+1; - list[i].age = 0; + list[i].age = mmesa->sarea->texAge[heap]; } i--; @@ -104,30 +164,41 @@ void mgaResetGlobalLRU( mgaContextPtr mmesa ) list[i].next = MGA_NR_TEX_REGIONS; list[MGA_NR_TEX_REGIONS].prev = i; list[MGA_NR_TEX_REGIONS].next = 0; - mmesa->sarea->texAge = 0; + } static void mgaUpdateTexLRU( mgaContextPtr mmesa, mgaTextureObjectPtr t ) { int i; - int logsz = mmesa->mgaScreen->logTextureGranularity; + int heap = t->heap; + int logsz = mmesa->mgaScreen->logTextureGranularity[heap]; int start = t->MemBlock->ofs >> logsz; int end = (t->MemBlock->ofs + t->MemBlock->size - 1) >> logsz; - mgaTexRegion *list = mmesa->sarea->texList; + drm_mga_tex_region_t *list = mmesa->sarea->texList[heap]; - mmesa->texAge = ++mmesa->sarea->texAge; + mmesa->texAge[heap] = ++mmesa->sarea->texAge[heap]; + + if (!t->MemBlock) { + fprintf(stderr, "no memblock\n\n"); + return; + } /* Update our local LRU */ - move_to_head( &(mmesa->TexObjList), t ); + move_to_head( &(mmesa->TexObjList[heap]), t ); + + + if (0) + fprintf(stderr, "mgaUpdateTexLRU heap %d list %p\n", heap, list); + /* Update the global LRU */ for (i = start ; i <= end ; i++) { list[i].in_use = 1; - list[i].age = mmesa->texAge; + list[i].age = mmesa->texAge[heap]; /* remove_from_list(i) */ @@ -141,8 +212,12 @@ static void mgaUpdateTexLRU( mgaContextPtr mmesa, mgaTextureObjectPtr t ) list[(unsigned)list[MGA_NR_TEX_REGIONS].next].prev = i; list[MGA_NR_TEX_REGIONS].next = i; } -} + if (0) { + mgaPrintGlobalLRU(mmesa, t->heap); + mgaPrintLocalLRU(mmesa, t->heap); + } +} /* Called for every shared texture region which has increased in age * since we last held the lock. @@ -151,23 +226,29 @@ static void mgaUpdateTexLRU( mgaContextPtr mmesa, mgaTextureObjectPtr t ) * and pushes a placeholder texture onto the LRU list to represent * the other client's textures. */ -void mgaTexturesGone( mgaContextPtr mmesa, - GLuint offset, - GLuint size, - GLuint in_use ) +static void mgaTexturesGone( mgaContextPtr mmesa, + GLuint heap, + GLuint offset, + GLuint size, + GLuint in_use ) { mgaTextureObjectPtr t, tmp; - - foreach_s ( t, tmp, &mmesa->TexObjList ) { + + + + foreach_s ( t, tmp, &(mmesa->TexObjList[heap]) ) { if (t->MemBlock->ofs >= offset + size || t->MemBlock->ofs + t->MemBlock->size <= offset) continue; + + + /* It overlaps - kick it off. Need to hold onto the currently bound * objects, however. */ - if (t == mmesa->CurrentTexObj[0] || t == mmesa->CurrentTexObj[1]) + if (t->bound) mgaSwapOutTexObj( mmesa, t ); else mgaDestroyTexObj( mmesa, t ); @@ -178,12 +259,54 @@ void mgaTexturesGone( mgaContextPtr mmesa, t = (mgaTextureObjectPtr) calloc(1,sizeof(*t)); if (!t) return; - t->MemBlock = mmAllocMem( mmesa->texHeap, size, 0, offset); - insert_at_head( &mmesa->TexObjList, t ); + t->heap = heap; + t->MemBlock = mmAllocMem( mmesa->texHeap[heap], size, 0, offset); + if (!t->MemBlock) { + fprintf(stderr, "Couldn't alloc placeholder sz %x ofs %x\n", + (int)size, (int)offset); + mmDumpMemInfo( mmesa->texHeap[heap]); + return; + } + insert_at_head( &(mmesa->TexObjList[heap]), t ); } } +void mgaAgeTextures( mgaContextPtr mmesa, int heap ) +{ + drm_mga_sarea_t *sarea = mmesa->sarea; + int sz = 1 << (mmesa->mgaScreen->logTextureGranularity[heap]); + int idx, nr = 0; + + /* Have to go right round from the back to ensure stuff ends up + * LRU in our local list... Fix with a cursor pointer. + */ + for (idx = sarea->texList[heap][MGA_NR_TEX_REGIONS].prev ; + idx != MGA_NR_TEX_REGIONS && nr < MGA_NR_TEX_REGIONS ; + idx = sarea->texList[heap][idx].prev, nr++) + { + if (sarea->texList[heap][idx].age > mmesa->texAge[heap]) { + mgaTexturesGone(mmesa, heap, idx * sz, sz, 1); + } + } + + if (nr == MGA_NR_TEX_REGIONS) { + mgaTexturesGone(mmesa, heap, 0, + mmesa->mgaScreen->textureSize[heap], 0); + mgaResetGlobalLRU( mmesa, heap ); + } + + + if (0) { + mgaPrintGlobalLRU( mmesa, heap ); + mgaPrintLocalLRU( mmesa, heap ); + } + + mmesa->texAge[heap] = sarea->texAge[heap]; + mmesa->dirty |= MGA_UPLOAD_TEX0IMAGE | MGA_UPLOAD_TEX1IMAGE; +} + + /* * mgaSetTexWrappings */ @@ -281,22 +404,22 @@ static void mgaSetTexBorderColor(mgaTextureObjectPtr t, GLubyte color[4]) { /* - * mgaUploadSubImage + * mgaUploadSubImageLocked * * Perform an iload based update of a resident buffer. This is used for * both initial loading of the entire image, and texSubImage updates. * * Performed with the hardware lock held. */ -static void mgaUploadSubImage( mgaContextPtr mmesa, - mgaTextureObjectPtr t, - int level, - int x, int y, int width, int height ) { +static void mgaUploadSubImageLocked( mgaContextPtr mmesa, + mgaTextureObjectPtr t, + int level, + int x, int y, int width, int height ) { int x2; int dwords; - int dstorg; + int offset; struct gl_texture_image *image; - int texelBytes, texelsPerDword, texelMaccess; + int texelBytes, texelsPerDword, texelMaccess, length; if ( level < 0 || level >= MGA_TEX_MAXLEVELS ) { mgaMsg( 1, "mgaUploadSubImage: bad level: %i\n", level ); @@ -310,15 +433,9 @@ static void mgaUploadSubImage( mgaContextPtr mmesa, } /* find the proper destination offset for this level */ - dstorg = (mmesa->mgaScreen->textureOffset + t->MemBlock->ofs + + offset = (t->MemBlock->ofs + t->offsets[level]); - /* turn on PCI/AGP if needed - if ( textureHeapPhysical ) { - dstorg |= 1 | mgaglx.use_agp; - } - */ - texelBytes = t->texelBytes; switch( texelBytes ) { case 1: @@ -363,7 +480,7 @@ static void mgaUploadSubImage( mgaContextPtr mmesa, x = (x + (texelsPerDword-1)) & ~(texelsPerDword-1); width = x2 - x; } - + /* we may not be able to upload the entire texture in one batch due to register limits or dma buffer limits. Recursively split it up. */ @@ -374,7 +491,8 @@ static void mgaUploadSubImage( mgaContextPtr mmesa, } mgaMsg(10, "mgaUploadSubImage: recursively subdividing\n" ); - mgaUploadSubImage( mmesa, t, level, x, y, width, height >> 1 ); + mgaUploadSubImageLocked( mmesa, t, level, x, y, + width, height >> 1 ); y += ( height >> 1 ); height -= ( height >> 1 ); } @@ -385,31 +503,50 @@ static void mgaUploadSubImage( mgaContextPtr mmesa, /* bump the performance counter */ mgaglx.c_textureSwaps += ( dwords << 2 ); - -#if 0 - - /* fill in the secondary buffer with properly converted texels - from the mesa buffer */ - mgaConvertTexture( dest, texelBytes, image, x, y, width, height ); - - /* send the secondary data */ - mgaSecondaryDma( TT_BLIT, dest, dwords ); -#endif - + length = dwords * 4; + + /* Fill in the secondary buffer with properly converted texels + * from the mesa buffer. */ + if(t->heap == MGA_CARD_HEAP) { + mgaGetILoadBufferLocked( mmesa ); + mgaConvertTexture( (mgaUI32 *)mmesa->iload_buffer->address, + texelBytes, image, x, y, width, height ); + if(length < 64) length = 64; + mgaMsg(10, "TexelBytes : %d, offset: %d, length : %d\n", + texelBytes, + mmesa->mgaScreen->textureOffset[t->heap] + + offset + + y * width * 4/texelsPerDword, + length); + + mgaFireILoadLocked( mmesa, + mmesa->mgaScreen->textureOffset[t->heap] + + offset + + y * width * 4/texelsPerDword, + length); + } else { + /* This works, is slower for uploads to card space and needs + * additional synchronization with the dma stream. + */ + mgaConvertTexture( (mgaUI32 *) + (mmesa->mgaScreen->texVirtual[t->heap] + + offset + + y * width * 4/texelsPerDword), + texelBytes, image, x, y, width, height ); + } } - static void mgaUploadTexLevel( mgaContextPtr mmesa, - mgaTextureObjectPtr t, - int l ) + mgaTextureObjectPtr t, + int l ) { - mgaUploadSubImage( mmesa, - t, - l, - 0, 0, - t->tObj->Image[l]->Width, - t->tObj->Image[l]->Height); + mgaUploadSubImageLocked( mmesa, + t, + l, + 0, 0, + t->tObj->Image[l]->Width, + t->tObj->Image[l]->Height); } @@ -527,9 +664,11 @@ static void mgaCreateTexObj(mgaContextPtr mmesa, struct gl_texture_object *tObj) /* fill in our mga texture object */ t->tObj = tObj; t->ctx = mmesa; + t->age = 0; + t->bound = 0; - insert_at_tail(&(mmesa->TexObjList), t); + insert_at_tail(&(mmesa->SwappedOut), t); t->MemBlock = 0; @@ -596,34 +735,61 @@ static void mgaCreateTexObj(mgaContextPtr mmesa, struct gl_texture_object *tObj) tObj->DriverData = t; } +static void mgaMigrateTexture( mgaContextPtr mmesa, mgaTextureObjectPtr t ) +{ + /* NOT DONE */ +} -int mgaUploadTexImages( mgaContextPtr mmesa, mgaTextureObjectPtr t ) +static int mgaChooseTexHeap( mgaContextPtr mmesa, mgaTextureObjectPtr t ) { + return 0; +} + +int mgaUploadTexImages( mgaContextPtr mmesa, mgaTextureObjectPtr t ) +{ + int heap; int i; int ofs; mgaglx.c_textureSwaps++; + heap = t->heap = mgaChooseTexHeap( mmesa, t ); + /* Do we need to eject LRU texture objects? */ if (!t->MemBlock) { while (1) { - t->MemBlock = mmAllocMem( mmesa->texHeap, t->totalSize, 12, 0 ); + mgaTextureObjectPtr tmp = mmesa->TexObjList[heap].prev; + + t->MemBlock = mmAllocMem( mmesa->texHeap[heap], + t->totalSize, + 6, 0 ); if (t->MemBlock) break; - if (mmesa->TexObjList.prev == &(mmesa->TexObjList)) { - fprintf(stderr, "Failed to upload texture, sz %d\n", t->totalSize); - mmDumpMemInfo( mmesa->texHeap ); + if (mmesa->TexObjList[heap].prev->bound) { + fprintf(stderr, + "Hit bound texture in upload\n"); return -1; } - mgaDestroyTexObj( mmesa, mmesa->TexObjList.prev ); + if (mmesa->TexObjList[heap].prev == + &(mmesa->TexObjList[heap])) + { + fprintf(stderr, "Failed to upload texture, " + "sz %d\n", t->totalSize); + mmDumpMemInfo( mmesa->texHeap[heap] ); + return -1; + } + + mgaDestroyTexObj( mmesa, tmp ); } - ofs = t->MemBlock->ofs; + ofs = t->MemBlock->ofs + + mmesa->mgaScreen->textureOffset[heap] + ; t->Setup[MGA_TEXREG_ORG] = ofs; t->Setup[MGA_TEXREG_ORG1] = ofs + t->offsets[1]; @@ -638,8 +804,16 @@ int mgaUploadTexImages( mgaContextPtr mmesa, mgaTextureObjectPtr t ) */ mgaUpdateTexLRU( mmesa, t ); + + if (MGA_DEBUG&DEBUG_VERBOSE_LRU) + fprintf(stderr, "dispatch age: %d age freed memory: %d\n", + GET_DISPATCH_AGE(mmesa), mmesa->dirtyAge); + + if (mmesa->dirtyAge >= GET_DISPATCH_AGE(mmesa)) + mgaWaitAgeLocked( mmesa, mmesa->dirtyAge ); + if (t->dirty_images) { - if (MGA_DEBUG & MGA_DEBUG_VERBOSE_MSG) + if (MGA_DEBUG&DEBUG_VERBOSE_LRU) fprintf(stderr, "*"); for (i = 0 ; i <= t->lastLevel ; i++) @@ -692,12 +866,10 @@ static void mgaUpdateTextureEnvG200( GLcontext *ctx ) } } -/* I don't have the alpha values correct yet: - */ static void mgaUpdateTextureStage( GLcontext *ctx, int unit ) { mgaContextPtr mmesa = MGA_CONTEXT( ctx ); - mgaUI32 *reg = &mmesa->Setup[MGA_CTXREG_TDUAL0 + unit]; + GLuint *reg = &mmesa->Setup[MGA_CTXREG_TDUAL0 + unit]; GLuint source = mmesa->tmu_source[unit]; struct gl_texture_object *tObj = ctx->Texture.Unit[source].Current; @@ -725,13 +897,13 @@ static void mgaUpdateTextureStage( GLcontext *ctx, int unit ) *reg = ( TD0_color_arg2_diffuse | TD0_color_sel_mul | TD0_alpha_arg2_diffuse | - TD0_alpha_sel_arg1); + TD0_alpha_sel_mul); else *reg = ( TD0_color_arg2_prevstage | TD0_color_alpha_prevstage | TD0_color_sel_mul | TD0_alpha_arg2_prevstage | - TD0_alpha_sel_arg1); + TD0_alpha_sel_mul); break; case GL_DECAL: *reg = (TD0_color_arg2_fcol | @@ -751,20 +923,49 @@ static void mgaUpdateTextureStage( GLcontext *ctx, int unit ) TD0_color_add_add | TD0_color_sel_add | TD0_alpha_arg2_diffuse | - TD0_alpha_sel_arg1); + TD0_alpha_sel_add); else *reg = ( TD0_color_arg2_prevstage | TD0_color_alpha_prevstage | TD0_color_add_add | TD0_color_sel_add | TD0_alpha_arg2_prevstage | - TD0_alpha_sel_arg1); + TD0_alpha_sel_add); break; case GL_BLEND: - /* Use a multipass mechanism to do this: + if (0) + fprintf(stderr, "GL_BLEND unit %d flags %x\n", unit, + mmesa->blend_flags); + + if (mmesa->blend_flags) + mmesa->Fallback |= MGA_FALLBACK_TEXTURE; + return; + + /* Do singletexture GL_BLEND with 'all ones' env-color + * by using both texture units. Multitexture gl_blend + * is a fallback. */ - mmesa->Fallback |= MGA_FALLBACK_TEXTURE; + if (unit == 0) { + /* Part 1: R1 = Rf ( 1 - Rt ) + * A1 = Af At + */ + *reg = ( TD0_color_arg2_diffuse | + TD0_color_arg1_inv_enable | + TD0_color_sel_mul | + TD0_alpha_arg2_diffuse | + TD0_alpha_sel_arg1); + } else { + /* Part 2: R2 = R1 + Rt + * A2 = A1 + */ + *reg = ( TD0_color_arg2_prevstage | + TD0_color_add_add | + TD0_color_sel_add | + TD0_alpha_arg2_prevstage | + TD0_alpha_sel_arg2); + } + break; default: } @@ -782,9 +983,8 @@ static void mgaUpdateTextureObject( GLcontext *ctx, int unit ) { mgaMsg(15,"mgaUpdateTextureState %d\n", unit); /* disable texturing until it is known to be good */ - mmesa->Setup[MGA_CTXREG_DWGCTL] = - (( mmesa->Setup[MGA_CTXREG_DWGCTL] & DC_opcod_MASK ) | - DC_opcod_trap); + mmesa->Setup[MGA_CTXREG_DWGCTL] &= DC_opcod_MASK; + mmesa->Setup[MGA_CTXREG_DWGCTL] |= DC_opcod_trap; enabled = (ctx->Texture.Enabled>>(source*4))&TEXTURE0_ANY; if (enabled != TEXTURE0_2D) { @@ -797,6 +997,8 @@ static void mgaUpdateTextureObject( GLcontext *ctx, int unit ) { if ( !tObj || tObj != ctx->Texture.Unit[source].CurrentD[2] ) return; + +/* fprintf(stderr, "unit %d: %d\n", unit, tObj->Name); */ /* if the texture object doesn't exist at all (never used or swapped out), create it now, uploading all texture images */ @@ -804,7 +1006,6 @@ static void mgaUpdateTextureObject( GLcontext *ctx, int unit ) { if ( !tObj->DriverData ) { /* clear the current pointer so that texture object can be swapped out if necessary to make room */ - mmesa->CurrentTexObj[source] = NULL; mgaCreateTexObj( mmesa, tObj ); if ( !tObj->DriverData ) { @@ -815,9 +1016,8 @@ static void mgaUpdateTextureObject( GLcontext *ctx, int unit ) { } /* we definately have a valid texture now */ - mmesa->Setup[MGA_CTXREG_DWGCTL] = - (( mmesa->Setup[MGA_CTXREG_DWGCTL] & DC_opcod_MASK ) | - DC_opcod_texture_trap); + mmesa->Setup[MGA_CTXREG_DWGCTL] &= DC_opcod_MASK; + mmesa->Setup[MGA_CTXREG_DWGCTL] |= DC_opcod_texture_trap; t = (mgaTextureObjectPtr)tObj->DriverData; @@ -825,6 +1025,11 @@ static void mgaUpdateTextureObject( GLcontext *ctx, int unit ) { mmesa->dirty |= (MGA_UPLOAD_TEX0IMAGE << unit); mmesa->CurrentTexObj[unit] = t; + t->bound = unit+1; + + if (t->MemBlock) + mgaUpdateTexLRU( mmesa, t ); + t->Setup[MGA_TEXREG_CTL2] &= ~TMC_dualtex_enable; if (ctx->Texture.Enabled == (TEXTURE0_2D|TEXTURE1_2D)) @@ -848,23 +1053,31 @@ void mgaUpdateTextureState( GLcontext *ctx ) mgaContextPtr mmesa = MGA_CONTEXT( ctx ); mmesa->Fallback &= ~MGA_FALLBACK_TEXTURE; + if (mmesa->CurrentTexObj[0]) mmesa->CurrentTexObj[0]->bound = 0; + if (mmesa->CurrentTexObj[1]) mmesa->CurrentTexObj[1]->bound = 0; + mmesa->CurrentTexObj[0] = 0; + mmesa->CurrentTexObj[1] = 0; + if (MGA_IS_G400(mmesa)) { mgaUpdateTextureObject( ctx, 0 ); mgaUpdateTextureStage( ctx, 0 ); - mmesa->Setup[MGA_CTXREG_TDUAL1] = mmesa->Setup[MGA_CTXREG_TDUAL0]; + mmesa->Setup[MGA_CTXREG_TDUAL1] = + mmesa->Setup[MGA_CTXREG_TDUAL0]; if (mmesa->multitex) { mgaUpdateTextureObject( ctx, 1 ); mgaUpdateTextureStage( ctx, 1 ); } + + mmesa->dirty |= MGA_UPLOAD_TEX0 | MGA_UPLOAD_TEX1; } else { mgaUpdateTextureObject( ctx, 0 ); - mgaUpdateTextureEnvG200( ctx ); + mgaUpdateTextureEnvG200( ctx ); } /* schedule the register writes */ - mmesa->dirty |= MGA_UPLOAD_CTX; + mmesa->dirty |= MGA_UPLOAD_CTX | MGA_UPLOAD_TEX0; } @@ -880,14 +1093,57 @@ Driver functions called directly from mesa /* * mgaTexEnv */ -void mgaTexEnv( GLcontext *ctx, GLenum pname, const GLfloat *param ) { +void mgaTexEnv( GLcontext *ctx, GLenum pname, const GLfloat *param ) +{ + mgaContextPtr mmesa = MGA_CONTEXT(ctx); mgaMsg( 10, "mgaTexEnv( %i )\n", pname ); + if (pname == GL_TEXTURE_ENV_MODE) { /* force the texture state to be updated */ - MGA_CONTEXT(ctx)->CurrentTexObj[0] = 0; + FLUSH_BATCH( MGA_CONTEXT(ctx) ); MGA_CONTEXT(ctx)->new_state |= MGA_NEW_TEXTURE; } + else if (pname == GL_TEXTURE_ENV_COLOR) + { + struct gl_texture_unit *texUnit = + &ctx->Texture.Unit[ctx->Texture.CurrentUnit]; + GLfloat *fc = texUnit->EnvColor; + GLubyte c[4]; + GLuint col; + + + c[0] = fc[0]; + c[1] = fc[1]; + c[2] = fc[2]; + c[3] = fc[3]; + + /* No alpha at 16bpp? + */ + col = mgaPackColor( mmesa->mgaScreen->Attrib, + c[0], c[1], c[2], c[3] ); + + mmesa->envcolor = (c[3]<<24) | (c[0]<<16) | (c[1]<<8) | (c[2]); + + if (mmesa->Setup[MGA_CTXREG_FCOL] != col) { + FLUSH_BATCH(mmesa); + mmesa->Setup[MGA_CTXREG_FCOL] = col; + mmesa->dirty |= MGA_UPLOAD_CTX; + + mmesa->blend_flags &= ~MGA_BLEND_ENV_COLOR; + + /* Actually just require all four components to be + * equal. This permits a single-pass GL_BLEND. + * + * More complex multitexture/multipass fallbacks + * for blend can be done later. + */ + if (mmesa->envcolor != 0x0 && + mmesa->envcolor != 0xffffffff) + mmesa->blend_flags |= MGA_BLEND_ENV_COLOR; + } + } + } /* @@ -907,6 +1163,7 @@ void mgaTexImage( GLcontext *ctx, GLenum target, mgaUpdateTextureState time. */ t = (mgaTextureObjectPtr) tObj->DriverData; if ( t ) { + if (t->bound) FLUSH_BATCH(mmesa); /* if this is the current object, it will force an update */ mgaDestroyTexObj( mmesa, t ); mmesa->new_state |= MGA_NEW_TEXTURE; @@ -936,6 +1193,7 @@ void mgaTexSubImage( GLcontext *ctx, GLenum target, mgaUpdateTextureState time. */ t = (mgaTextureObjectPtr) tObj->DriverData; if ( t ) { + if (t->bound) FLUSH_BATCH(mmesa); /* if this is the current object, it will force an update */ mgaDestroyTexObj( mmesa, t ); mmesa->new_state |= MGA_NEW_TEXTURE; @@ -956,7 +1214,9 @@ void mgaTexSubImage( GLcontext *ctx, GLenum target, */ void mgaTexParameter( GLcontext *ctx, GLenum target, struct gl_texture_object *tObj, - GLenum pname, const GLfloat *params ) { + GLenum pname, const GLfloat *params ) +{ + mgaContextPtr mmesa = MGA_CONTEXT( ctx ); mgaTextureObjectPtr t; mgaMsg( 10, "mgaTexParameter( %p, %i )\n", tObj, pname ); @@ -973,52 +1233,68 @@ void mgaTexParameter( GLcontext *ctx, GLenum target, switch (pname) { case GL_TEXTURE_MIN_FILTER: case GL_TEXTURE_MAG_FILTER: + if (t->bound) FLUSH_BATCH(mmesa); mgaSetTexFilter( t, tObj->MinFilter, tObj->MagFilter ); break; case GL_TEXTURE_WRAP_S: case GL_TEXTURE_WRAP_T: + if (t->bound) FLUSH_BATCH(mmesa); mgaSetTexWrapping(t,tObj->WrapS,tObj->WrapT); break; case GL_TEXTURE_BORDER_COLOR: + if (t->bound) FLUSH_BATCH(mmesa); mgaSetTexBorderColor(t,tObj->BorderColor); break; default: return; } - /* force the texture state to be updated */ - MGA_CONTEXT(ctx)->CurrentTexObj[0] = NULL; - MGA_CONTEXT(ctx)->new_state |= MGA_NEW_TEXTURE; + + mmesa->new_state |= MGA_NEW_TEXTURE; } /* * mgaBindTexture */ void mgaBindTexture( GLcontext *ctx, GLenum target, - struct gl_texture_object *tObj ) { + struct gl_texture_object *tObj ) +{ + mgaContextPtr mmesa = MGA_CONTEXT( ctx ); mgaMsg( 10, "mgaBindTexture( %p )\n", tObj ); - + + FLUSH_BATCH(mmesa); + + if (mmesa->CurrentTexObj[ctx->Texture.CurrentUnit]) { + mmesa->CurrentTexObj[ctx->Texture.CurrentUnit]->bound = 0; + mmesa->CurrentTexObj[ctx->Texture.CurrentUnit] = 0; + } + /* force the texture state to be updated */ - MGA_CONTEXT(ctx)->CurrentTexObj[0] = NULL; MGA_CONTEXT(ctx)->new_state |= MGA_NEW_TEXTURE; } /* * mgaDeleteTexture */ -void mgaDeleteTexture( GLcontext *ctx, struct gl_texture_object *tObj ) { +void mgaDeleteTexture( GLcontext *ctx, struct gl_texture_object *tObj ) +{ + mgaContextPtr mmesa = MGA_CONTEXT( ctx ); + mgaTextureObjectPtr t = (mgaTextureObjectPtr)tObj->DriverData; mgaMsg( 10, "mgaDeleteTexture( %p )\n", tObj ); - /* delete our driver data */ - if ( tObj->DriverData ) { - mgaContextPtr mmesa = MGA_CONTEXT( ctx ); - mgaDestroyTexObj( mmesa, - (mgaTextureObjectPtr)(tObj->DriverData) ); + if ( t ) { + if (t->bound) { + FLUSH_BATCH(mmesa); + mmesa->CurrentTexObj[t->bound-1] = 0; + mmesa->new_state |= MGA_NEW_TEXTURE; + } + + mgaDestroyTexObj( mmesa, t ); mmesa->new_state |= MGA_NEW_TEXTURE; } } diff --git a/xc/lib/GL/mesa/src/drv/mga/mgatris.c b/xc/lib/GL/mesa/src/drv/mga/mgatris.c index bd8ef083f..387a79f3e 100644 --- a/xc/lib/GL/mesa/src/drv/mga/mgatris.c +++ b/xc/lib/GL/mesa/src/drv/mga/mgatris.c @@ -27,6 +27,7 @@ #include <stdio.h> #include <math.h> +#include "types.h" #include "vb.h" #include "pipeline.h" @@ -122,34 +123,14 @@ void mgaDDTrifuncInit() init_twoside_offset(); init_twoside_offset_flat(); - /* Hmmm... - */ - for (i = 0 ; i < 0x20 ; i++) { - if (i & ~MGA_FLAT_BIT) { - points_tab[i] = points_tab[i&MGA_FLAT_BIT]; - line_tab[i] = line_tab[i&MGA_FLAT_BIT]; - } - } - for (i = 0 ; i < 0x20 ; i++) - if ((i & (MGA_NODRAW_BIT|MGA_FALLBACK_BIT)) == MGA_NODRAW_BIT || - mgaglx.nullprims) + if ((i & (MGA_NODRAW_BIT|MGA_FALLBACK_BIT)) == MGA_NODRAW_BIT) { quad_tab[i] = mga_null_quad; tri_tab[i] = mga_null_triangle; line_tab[i] = mga_null_line; points_tab[i] = mga_null_points; } - - if (mgaglx.noFallback) { - for (i = 0 ; i < 0x10 ; i++) { - points_tab[i|MGA_FALLBACK_BIT] = points_tab[i]; - line_tab[i|MGA_FALLBACK_BIT] = line_tab[i]; - tri_tab[i|MGA_FALLBACK_BIT] = tri_tab[i]; - quad_tab[i|MGA_FALLBACK_BIT] = quad_tab[i]; - } - } - } @@ -162,50 +143,61 @@ void mgaDDChooseRenderState( GLcontext *ctx ) mgaContextPtr mmesa = MGA_CONTEXT( ctx ); GLuint flags = ctx->TriangleCaps; - ctx->IndirectTriangles &= ~DD_SW_RASTERIZE; + if (mmesa->Fallback) + return; + + mmesa->IndirectTriangles = 0; if (flags) { GLuint ind = 0; GLuint shared = 0; - GLuint fallback = MGA_FALLBACK_BIT; - - if (mgaglx.noFallback) fallback = 0; if (flags & DD_Z_NEVER) shared |= MGA_NODRAW_BIT; if (flags & DD_FLATSHADE) shared |= MGA_FLAT_BIT; - if (flags & DD_MULTIDRAW) shared |= fallback; - if (flags & (DD_SELECT|DD_FEEDBACK)) shared |= MGA_FALLBACK_BIT; + if (flags & (DD_MULTIDRAW| + DD_SELECT| + DD_FEEDBACK)) shared |= MGA_FALLBACK_BIT; if (flags & DD_STENCIL) shared |= MGA_FALLBACK_BIT; ind = shared; +#if 0 if (flags & DD_POINT_SMOOTH) ind |= MGA_ANTIALIAS_BIT; - if (flags & DD_POINT_ATTEN) ind |= fallback; +#else + if (flags & DD_POINT_SMOOTH) ind |= MGA_FALLBACK_BIT; +#endif mmesa->renderindex = ind; mmesa->PointsFunc = points_tab[ind]; if (ind & MGA_FALLBACK_BIT) - ctx->IndirectTriangles |= DD_POINT_SW_RASTERIZE; + mmesa->IndirectTriangles |= DD_POINT_SW_RASTERIZE; ind = shared; +#if 0 if (flags & DD_LINE_SMOOTH) ind |= MGA_ANTIALIAS_BIT; - if (flags & DD_LINE_STIPPLE) ind |= fallback; +#else + if (flags & DD_LINE_SMOOTH) ind |= MGA_FALLBACK_BIT; +#endif + if (flags & DD_LINE_STIPPLE) ind |= MGA_FALLBACK_BIT; mmesa->renderindex |= ind; mmesa->LineFunc = line_tab[ind]; if (ind & MGA_FALLBACK_BIT) - ctx->IndirectTriangles |= DD_LINE_SW_RASTERIZE; + mmesa->IndirectTriangles |= DD_LINE_SW_RASTERIZE; ind = shared; if (flags & DD_TRI_SMOOTH) ind |= MGA_ANTIALIAS_BIT; if (flags & DD_TRI_OFFSET) ind |= MGA_OFFSET_BIT; if (flags & DD_TRI_LIGHT_TWOSIDE) ind |= MGA_TWOSIDE_BIT; - if (flags & (DD_TRI_UNFILLED|DD_TRI_STIPPLE)) ind |= fallback; + if (flags & DD_TRI_UNFILLED) ind |= MGA_FALLBACK_BIT; + if ((flags & DD_TRI_STIPPLE) && + (ctx->IndirectTriangles & DD_TRI_STIPPLE)) ind |= MGA_FALLBACK_BIT; mmesa->renderindex |= ind; mmesa->TriangleFunc = tri_tab[ind]; mmesa->QuadFunc = quad_tab[ind]; if (ind & MGA_FALLBACK_BIT) - ctx->IndirectTriangles |= (DD_TRI_SW_RASTERIZE | DD_QUAD_SW_RASTERIZE); + mmesa->IndirectTriangles |= (DD_TRI_SW_RASTERIZE | + DD_QUAD_SW_RASTERIZE); } else if (mmesa->renderindex) { diff --git a/xc/lib/GL/mesa/src/drv/mga/mgatritmp.h b/xc/lib/GL/mesa/src/drv/mga/mgatritmp.h index ac5a545d2..2a9d16b86 100644 --- a/xc/lib/GL/mesa/src/drv/mga/mgatritmp.h +++ b/xc/lib/GL/mesa/src/drv/mga/mgatritmp.h @@ -98,19 +98,31 @@ static void TAG(quad)( GLcontext *ctx, GLuint v0, } -#if ((IND & ~MGA_FLAT_BIT) == 0) - static void TAG(line)( GLcontext *ctx, GLuint v0, GLuint v1, GLuint pv ) { mgaContextPtr mmesa = MGA_CONTEXT( ctx ); mgaVertexPtr mgaVB = MGA_DRIVER_DATA(ctx->VB)->verts; float width = ctx->Line.Width; - if (IND & MGA_FLAT_BIT) { + if (IND & (MGA_TWOSIDE_BIT|MGA_FLAT_BIT)) { mgaVertex tmp0 = mgaVB[v0]; mgaVertex tmp1 = mgaVB[v1]; - *(int *)&tmp0.warp1.color = *(int *)&mgaVB[pv].warp1.color; - *(int *)&tmp1.warp1.color = *(int *)&mgaVB[pv].warp1.color; + + if (IND & MGA_TWOSIDE_BIT) { + GLubyte (*vbcolor)[4] = ctx->VB->ColorPtr->data; + + if (IND & MGA_FLAT_BIT) { + MGA_COLOR((char *)&tmp0.warp1.color,vbcolor[pv]); + *(int *)&tmp1.warp1.color = *(int *)&tmp0.warp1.color; + } else { + MGA_COLOR((char *)&tmp0.warp1.color,vbcolor[v0]); + MGA_COLOR((char *)&tmp1.warp1.color,vbcolor[v1]); + } + + } else { + *(int *)&tmp0.warp1.color = *(int *)&mgaVB[pv].warp1.color; + *(int *)&tmp1.warp1.color = *(int *)&mgaVB[pv].warp1.color; + } mga_draw_line( mmesa, &tmp0, &tmp1, width ); } else @@ -125,13 +137,20 @@ static void TAG(points)( GLcontext *ctx, GLuint first, GLuint last ) mgaVertexPtr mgaVB = MGA_DRIVER_DATA(VB)->verts; GLfloat sz = ctx->Point.Size * .5; int i; - + for(i=first;i<=last;i++) - if(VB->ClipMask[i]==0) - mga_draw_point( mmesa, &mgaVB[i], sz ); + if(VB->ClipMask[i]==0) { + if (IND & MGA_TWOSIDE_BIT) { + GLubyte (*vbcolor)[4] = VB->ColorPtr->data; + mgaVertex tmp0 = mgaVB[i]; + MGA_COLOR((char *)&tmp0.warp1.color, vbcolor[i]); + mga_draw_point( mmesa, &tmp0, sz ); + } else + mga_draw_point( mmesa, &mgaVB[i], sz ); + } } -#endif + static void TAG(init)( void ) @@ -139,10 +158,9 @@ static void TAG(init)( void ) tri_tab[IND] = TAG(triangle); quad_tab[IND] = TAG(quad); -#if ((IND & ~MGA_FLAT_BIT) == 0) line_tab[IND] = TAG(line); points_tab[IND] = TAG(points); -#endif + } diff --git a/xc/lib/GL/mesa/src/drv/mga/mgavb.c b/xc/lib/GL/mesa/src/drv/mga/mgavb.c index f78c542c8..2d61f301d 100644 --- a/xc/lib/GL/mesa/src/drv/mga/mgavb.c +++ b/xc/lib/GL/mesa/src/drv/mga/mgavb.c @@ -104,7 +104,7 @@ static void name(struct vertex_buffer *VB, GLuint start, GLuint end) \ GLfloat yoffset = mmesa->driDrawable->h - 0.5 + mmesa->drawY; \ int i; \ (void) xoffset; (void) yoffset; \ - \ + if (0) fprintf(stderr, "V"); \ gl_import_client_data( VB, VB->ctx->RenderFlags, \ (VB->ClipOrMask \ ? VEC_WRITABLE|VEC_GOOD_STRIDE \ @@ -260,11 +260,21 @@ void mgaChooseRasterSetupFunc(GLcontext *ctx) mmesa->tex_dest[0] = MGA_TEX0_BIT; mmesa->tex_dest[1] = MGA_TEX1_BIT; mmesa->multitex = 0; + mmesa->blend_flags &= ~MGA_BLEND_MULTITEX; if (ctx->Texture.Enabled & 0xf) { if (ctx->Texture.Unit[0].EnvMode == GL_REPLACE) funcindex &= ~MGA_RGBA_BIT; + if (ctx->Texture.Unit[0].EnvMode == GL_BLEND && + mmesa->envcolor) + { + mmesa->multitex = 1; + mmesa->vertsize = 10; + mmesa->tmu_source[1] = 0; + funcindex |= MGA_TEX1_BIT; + } + funcindex |= MGA_TEX0_BIT; } @@ -272,7 +282,8 @@ void mgaChooseRasterSetupFunc(GLcontext *ctx) if (ctx->Texture.Enabled & 0xf) { mmesa->multitex = 1; mmesa->vertsize = 10; - funcindex |= MGA_TEX1_BIT; + mmesa->blend_flags |= MGA_BLEND_MULTITEX; + funcindex |= MGA_TEX1_BIT; } else { /* Just a funny way of doing single texturing */ @@ -281,11 +292,25 @@ void mgaChooseRasterSetupFunc(GLcontext *ctx) if (ctx->Texture.Unit[1].EnvMode == GL_REPLACE) funcindex &= ~MGA_RGBA_BIT; + + if (ctx->Texture.Unit[0].EnvMode == GL_BLEND && + mmesa->envcolor) + { + mmesa->multitex = 1; + mmesa->vertsize = 10; + mmesa->tmu_source[1] = 1; + funcindex |= MGA_TEX1_BIT; + } funcindex |= MGA_TEX0_BIT; } } + /* Not really a good place to do this - need to make the mga state + * management code more event-driven so this can be calculated for + * free. + */ + if (ctx->Color.BlendEnabled) funcindex |= MGA_ALPHA_BIT; @@ -298,6 +323,7 @@ void mgaChooseRasterSetupFunc(GLcontext *ctx) if (0) mgaPrintSetupFlags("xsmesa: full setup function", funcindex); + mmesa->dirty |= MGA_UPLOAD_PIPE; mmesa->setupindex = funcindex; /* Called by mesa's clip functons: @@ -477,17 +503,3 @@ void mgaDDUnregisterVB( struct vertex_buffer *VB ) } -mgaUI32 *mgaAllocVertexDwords( mgaContextPtr mmesa, int dwords ) -{ - int bytes = dwords * 4; - mgaUI32 *head; - - if (mmesa->dma_buffer->used + bytes > mmesa->dma_buffer->total) - mgaFlushVertices( mmesa ); - - head = (mgaUI32 *)((char *)mmesa->dma_buffer->address + - mmesa->dma_buffer->used); - - mmesa->dma_buffer->used += bytes; - return head; -} diff --git a/xc/lib/GL/mesa/src/drv/r128/Imakefile b/xc/lib/GL/mesa/src/drv/r128/Imakefile new file mode 100644 index 000000000..4cd07b8ff --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/Imakefile @@ -0,0 +1,325 @@ +XCOMM $XFree86$ + +#include <Threads.tmpl> + +#define DoNormalLib NormalLibGlx +#define DoSharedLib SharedLibGlx +#define DoExtraLib SharedLibGlx +#define DoDebugLib DebugLibGlx +#define DoProfileLib ProfileLibGlx + +#if Malloc0ReturnsNull +ALLOC_DEFINES = -DMALLOC_0_RETURNS_NULL +#endif + +#if BuildXF86DRI + DRI_DEFINES = GlxDefines -DDRIVERTS + DRI_INCLUDES = -I../../../../dri \ + -I../../../../glx \ + -I../../../dri \ + -I$(TOP)/include \ + -I$(TOP)/include/GL \ + -I$(XF86OSSRC) \ + -I$(XF86COMSRC) \ + -I$(SERVERSRC)/GL/dri \ + -I$(XF86DRIVERSRC)/r128 \ + -I../../../include \ + -I../.. \ + -I../../X \ + -I../common +#endif + +LinkSourceFile(mm.c, ../common) +LinkSourceFile(mm.h, ../common) +LinkSourceFile(hwlog.c, ../common) +LinkSourceFile(hwlog.h, ../common) + +MESA_INCLUDES = -I. -I.. -I../../include + + DEFINES = $(ALLOC_DEFINES) $(DRI_DEFINES) + INCLUDES = -I$(XLIBSRC) -I$(EXTINCSRC) $(MESA_INCLUDES) $(DRI_INCLUDES) + + R128SRCS = r128_cce.c \ + r128_clear.c \ + r128_context.c \ + r128_dd.c \ + r128_fastpath.c \ + r128_pipeline.c \ + r128_screen.c \ + r128_span.c \ + r128_state.c \ + r128_swap.c \ + r128_tex.c \ + r128_tris.c \ + r128_vb.c \ + r128_xmesa.c + + R128OBJS = r128_cce.o \ + r128_clear.o \ + r128_context.o \ + r128_dd.o \ + r128_fastpath.o \ + r128_pipeline.o \ + r128_screen.o \ + r128_span.o \ + r128_state.o \ + r128_swap.o \ + r128_tex.o \ + r128_tris.o \ + r128_vb.o \ + r128_xmesa.o + +#if !GlxUseBuiltInDRIDriver + DRISRCS = ../../../dri/dri_mesa.c \ + ../../../../dri/dri_tmm.c + + DRIOBJS = ../../../dri/dri_mesa.o \ + ../../../../dri/dri_tmm.o + + DRMSRCS = ../../../../dri/drm/xf86drm.c \ + ../../../../dri/drm/xf86drmHash.c \ + ../../../../dri/drm/xf86drmRandom.c \ + ../../../../dri/drm/xf86drmSL.c \ + ../../../../dri/drm/xf86drmR128.c + + DRMOBJS = ../../../../dri/drm/xf86drm.o \ + ../../../../dri/drm/xf86drmHash.o \ + ../../../../dri/drm/xf86drmRandom.o \ + ../../../../dri/drm/xf86drmSL.o \ + ../../../../dri/drm/xf86drmR128.o + + MESASRCS = ../../aatriangle.c \ + ../../accum.c \ + ../../alpha.c \ + ../../alphabuf.c \ + ../../attrib.c \ + ../../bbox.c \ + ../../bitmap.c \ + ../../blend.c \ + ../../buffers.c \ + ../../clip.c \ + ../../colortab.c \ + ../../config.c \ + ../../context.c \ + ../../copypix.c \ + ../../cva.c \ + ../../debug_xform.c \ + ../../depth.c \ + ../../dlist.c \ + ../../drawpix.c \ + ../../enable.c \ + ../../enums.c \ + ../../eval.c \ + ../../extensions.c \ + ../../feedback.c \ + ../../fog.c \ + ../../get.c \ + ../../glapi.c \ + ../../glapinoop.c \ + ../../glthread.c \ + ../../hash.c \ + ../../image.c \ + ../../imaging.c \ + ../../light.c \ + ../../lines.c \ + ../../logic.c \ + ../../masking.c \ + ../../matrix.c \ + ../../mem.c \ + ../../mmath.c \ + ../../pb.c \ + ../../pipeline.c \ + ../../pixel.c \ + ../../pixeltex.c \ + ../../points.c \ + ../../polygon.c \ + ../../quads.c \ + ../../rastpos.c \ + ../../readpix.c \ + ../../rect.c \ + ../../scissor.c \ + ../../shade.c \ + ../../span.c \ + ../../stages.c \ + ../../state.c \ + ../../stencil.c \ + ../../teximage.c \ + ../../texobj.c \ + ../../texstate.c \ + ../../texture.c \ + ../../texutil.c \ + ../../translate.c \ + ../../triangle.c \ + ../../varray.c \ + ../../vb.c \ + ../../vbcull.c \ + ../../vbfill.c \ + ../../vbindirect.c \ + ../../vbrender.c \ + ../../vbxform.c \ + ../../vector.c \ + ../../vertices.c \ + ../../winpos.c \ + ../../xform.c \ + ../../zoom.c \ + ../../X86/common_x86.c + + MESAOBJS = ../../aatriangle.o \ + ../../accum.o \ + ../../alpha.o \ + ../../alphabuf.o \ + ../../attrib.o \ + ../../bbox.o \ + ../../bitmap.o \ + ../../blend.o \ + ../../buffers.o \ + ../../clip.o \ + ../../colortab.o \ + ../../config.o \ + ../../context.o \ + ../../copypix.o \ + ../../cva.o \ + ../../debug_xform.o \ + ../../depth.o \ + ../../dlist.o \ + ../../drawpix.o \ + ../../enable.o \ + ../../enums.o \ + ../../eval.o \ + ../../extensions.o \ + ../../feedback.o \ + ../../fog.o \ + ../../get.o \ + ../../hash.o \ + ../../hint.o \ + ../../image.o \ + ../../imaging.o \ + ../../light.o \ + ../../lines.o \ + ../../logic.o \ + ../../masking.o \ + ../../matrix.o \ + ../../mem.o \ + ../../mmath.o \ + ../../pb.o \ + ../../pipeline.o \ + ../../pixel.o \ + ../../pixeltex.o \ + ../../points.o \ + ../../polygon.o \ + ../../quads.o \ + ../../rastpos.o \ + ../../readpix.o \ + ../../rect.o \ + ../../scissor.o \ + ../../shade.o \ + ../../span.o \ + ../../stages.o \ + ../../state.o \ + ../../stencil.o \ + ../../teximage.o \ + ../../texobj.o \ + ../../texstate.o \ + ../../texture.o \ + ../../texutil.o \ + ../../translate.o \ + ../../triangle.o \ + ../../varray.o \ + ../../vb.o \ + ../../vbcull.o \ + ../../vbfill.o \ + ../../vbindirect.o \ + ../../vbrender.o \ + ../../vbxform.o \ + ../../vector.o \ + ../../vertices.o \ + ../../winpos.o \ + ../../xform.o \ + ../../zoom.o + +#ifdef i386Architecture + X86_SRCS = ../../X86/x86.c \ + ../../X86/x86a.S \ + ../../X86/common_x86.c \ + ../../X86/common_x86asm.S \ + ../../X86/vertex.S + + X86_OBJS = ../../X86/x86.o \ + ../../X86/x86a.o \ + ../../X86/common_x86.o \ + ../../X86/common_x86asm.o \ + ../../X86/vertex.o + + MMX_SRCS = ../../X86/mmx_blend.S + + MMX_OBJS = ../../X86/mmx_blend.o + +XCOMM Disabling 3Dnow code for the time being. +#if 0 + 3DNOW_SRCS = ../../X86/3dnow.c \ + ../../X86/3dnow_norm_raw.S \ + ../../X86/3dnow_xform_masked1.S \ + ../../X86/3dnow_xform_masked2.S \ + ../../X86/3dnow_xform_masked3.S \ + ../../X86/3dnow_xform_masked4.S \ + ../../X86/3dnow_xform_raw1.S \ + ../../X86/3dnow_xform_raw2.S \ + ../../X86/3dnow_xform_raw3.S \ + ../../X86/3dnow_xform_raw4.S \ + ../../X86/vertex_3dnow.S + + 3DNOW_OBJS = ../../X86/3dnow.o \ + ../../X86/3dnow_norm_raw.o \ + ../../X86/3dnow_xform_masked1.o \ + ../../X86/3dnow_xform_masked2.o \ + ../../X86/3dnow_xform_masked3.o \ + ../../X86/3dnow_xform_masked4.o \ + ../../X86/3dnow_xform_raw1.o \ + ../../X86/3dnow_xform_raw2.o \ + ../../X86/3dnow_xform_raw3.o \ + ../../X86/3dnow_xform_raw4.o \ + ../../X86/vertex_3dnow.o +#endif + +#endif +#endif + + ASMSRCS = $(X86_SRCS) $(MMX_SRCS) $(3DNOW_SRCS) + ASMOBJS = $(X86_OBJS) $(MMX_OBJS) $(3DNOW_OBJS) + + COMMONSRCS = mm.c hwlog.c + COMMONOBJS = mm.o hwlog.o + + SRCS = $(DRISRCS) $(DRMSRCS) $(MESASRCS) $(ASMSRCS) \ + $(COMMONSRCS) $(R128SRCS) + OBJS = $(DRIOBJS) $(DRMOBJS) $(MESAOBJS) $(ASMOBJS) \ + $(COMMONOBJS) $(R128OBJS) + +REQUIREDLIBS += -lm +#if !GlxBuiltInMga +REQUIREDLIBS += -L../../../.. -lGL +#endif + +#if !GlxUseBuiltInDRIDriver +#undef DoNormalLib NormalLibGlx +#undef DoExtraLib SharedLibGlx +#undef DoDebugLib DebugLibGlx +#undef DoProfileLib ProfileLibGlx +#endif + +#include <Library.tmpl> + +LibraryObjectRule() + +SubdirLibraryRule($(OBJS)) +NormalLintTarget($(SRCS)) + +#if !GlxUseBuiltInDRIDriver +LIBNAME = r128_dri.so +ALL_OBJS = $(OBJS) +ALL_DEPS = DONE +SharedDepModuleTarget($(LIBNAME),$(ALL_DEPS),$(ALL_OBJS)) +InstallDynamicModule($(LIBNAME),$(MODULEDIR)/dri,.) +#endif + +DependTarget() diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_cce.c b/xc/lib/GL/mesa/src/drv/r128/r128_cce.c new file mode 100644 index 000000000..e949dd37c --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_cce.c @@ -0,0 +1,389 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#include "r128_init.h" +#include "r128_mesa.h" +#include "r128_xmesa.h" +#include "r128_context.h" +#include "r128_lock.h" +#include "r128_reg.h" +#include "r128_cce.h" + +#if USE_USER_SPACE_RING + +#define USE_IOCTLS 0 +#define DO_SECURITY_CHECK 1 +#define R128_TIMEOUT 2000000 + +#if DEBUG +static void r128RingStatus(r128ScreenPtr pScrn) +{ + unsigned char *R128MMIO = pScrn->mmio; + + R128_DEBUG(("GUI_STAT = 0x%08x\n", + (unsigned int)INREG(R128_GUI_STAT))); + R128_DEBUG(("PM4_STAT = 0x%08x\n", + (unsigned int)INREG(R128_PM4_STAT))); + R128_DEBUG(("PM4_BUFFER_DL_WPTR = 0x%08x\n", + (unsigned int)INREG(R128_PM4_BUFFER_DL_WPTR))); + R128_DEBUG(("PM4_BUFFER_DL_RPTR = 0x%08x\n", + (unsigned int)INREG(R128_PM4_BUFFER_DL_RPTR))); + R128_DEBUG(("ringWrite = 0x%08x\n", pScrn->SAREA->ringWrite)); + R128_DEBUG(("*ringReadPtr = 0x%08x\n", *pScrn->ringReadPtr)); +} +#endif + +/* FIXME: Requires access to secure registers */ +static int INPLL(r128ScreenPtr pScrn, int addr) +{ + unsigned char *R128MMIO = pScrn->mmio; + + OUTREG8(R128_CLOCK_CNTL_INDEX, addr & 0x1f); + return INREG(R128_CLOCK_CNTL_DATA); +} + +/* FIXME: Requires access to secure registers */ +static void r128EngineFlush(r128ScreenPtr pScrn) +{ + unsigned char *R128MMIO = pScrn->mmio; + int i; + + OUTREGP(R128_PC_NGUI_CTLSTAT, R128_PC_FLUSH_ALL, ~R128_PC_FLUSH_ALL); + for (i = 0; i < R128_TIMEOUT; i++) { + if (!(INREG(R128_PC_NGUI_CTLSTAT) & R128_PC_BUSY)) break; + } +} + +/* FIXME: Requires access to secure registers */ +static void r128EngineReset(r128ScreenPtr pScrn) +{ +#if USE_IOCTLS +#if DEBUG + r128RingStatus(pScrn); +#endif + + (void)drmR128EngineReset(pScrn->driScreen->fd); +#else + unsigned char *R128MMIO = pScrn->mmio; + CARD32 clock_cntl_index; + CARD32 mclk_cntl; + CARD32 gen_reset_cntl; + +#if DEBUG + r128RingStatus(pScrn); +#endif + + r128EngineFlush(pScrn); + + clock_cntl_index = INREG(R128_CLOCK_CNTL_INDEX); + mclk_cntl = INPLL(pScrn, R128_MCLK_CNTL); + + OUTPLL(R128_MCLK_CNTL, mclk_cntl | R128_FORCE_GCP | R128_FORCE_PIPE3D_CPP); + + gen_reset_cntl = INREG(R128_GEN_RESET_CNTL); + + OUTREG(R128_GEN_RESET_CNTL, gen_reset_cntl | R128_SOFT_RESET_GUI); + INREG(R128_GEN_RESET_CNTL); + OUTREG(R128_GEN_RESET_CNTL, gen_reset_cntl & ~R128_SOFT_RESET_GUI); + INREG(R128_GEN_RESET_CNTL); + + OUTPLL(R128_MCLK_CNTL, mclk_cntl); + OUTREG(R128_CLOCK_CNTL_INDEX, clock_cntl_index); + OUTREG(R128_GEN_RESET_CNTL, gen_reset_cntl); + + /* Reset the ring buffer status */ + if (R128CCE_USE_RING_BUFFER(pScrn->CCEMode)) { + OUTREG(R128_PM4_BUFFER_DL_WPTR, 0); + OUTREG(R128_PM4_BUFFER_DL_RPTR, 0); + pScrn->SAREA->ringWrite = 0; + *pScrn->ringReadPtr = 0; + } +#endif + fprintf(stderr, "Error: Rage 128 timed out... exiting\n"); + exit(-1); +} + +#define r128CCEWaitForFifo(pScrn, entries) \ +do { \ + if (pScrn->CCEFifoSlots < entries) \ + r128CCEWaitForFifoFunction(pScrn, entries); \ + pScrn->CCEFifoSlots -= entries; \ +} while (0) + +/* Wait for at least `entries' slots are free. The actual number of + slots available is stored in info->CCEFifoSize. */ +static void r128CCEWaitForFifoFunction(r128ScreenPtr pScrn, int entries) +{ + unsigned char *R128MMIO = pScrn->mmio; + int i; + + for (;;) { + for (i = 0; i < R128_TIMEOUT; i++) { + pScrn->CCEFifoSlots = INREG(R128_PM4_STAT) & R128_PM4_FIFOCNT_MASK; + if (pScrn->CCEFifoSlots >= entries) return; + } + R128_DEBUG(("Reseting Engine: PM4_STAT = 0x%08x\n", + (unsigned int)INREG(R128_PM4_STAT))); + r128EngineReset(pScrn); + } +} + +/* Wait until the CCE is completely idle: the FIFO has drained and the + CCE is idle. */ +void r128CCEWaitForIdle(r128ScreenPtr pScrn) +{ +#if USE_IOCTLS + if (drmR128WaitForIdle(pScrn->driScreen->fd) < 0) { + fprintf(stderr, "Error: Rage 128 timed out... exiting\n"); + exit(-1); + } +#else + unsigned char *R128MMIO = pScrn->mmio; + int i; + + if (R128CCE_USE_RING_BUFFER(pScrn->CCEMode)) { + OUTREGP(R128_PM4_BUFFER_DL_WPTR, + R128_PM4_BUFFER_DL_DONE, ~R128_PM4_BUFFER_DL_DONE); + + for (;;) { + for (i = 0; i < R128_TIMEOUT; i++) { + if (*pScrn->ringReadPtr == pScrn->SAREA->ringWrite) { + int pm4stat = INREG(R128_PM4_STAT); + if ((pm4stat & R128_PM4_FIFOCNT_MASK) == pScrn->CCEFifoSize + && !(pm4stat & (R128_PM4_BUSY | R128_PM4_GUI_ACTIVE))) + return; + } + } + R128_DEBUG(("Reseting Engine: PM4_STAT = 0x%08x\n", + (unsigned int)INREG(R128_PM4_STAT))); + r128EngineReset(pScrn); + } + } else { + r128CCEWaitForFifoFunction(pScrn, pScrn->CCEFifoSize); + + for (;;) { + for (i = 0; i < R128_TIMEOUT; i++) { + if (!(INREG(R128_PM4_STAT) + & (R128_PM4_BUSY | R128_PM4_GUI_ACTIVE))) { + r128EngineFlush(pScrn); + return; + } + } + R128_DEBUG(("Reseting Engine: PM4_STAT = 0x%08x\n", + (unsigned int)INREG(R128_PM4_STAT))); + r128EngineReset(pScrn); + } + } +#endif +} + +/* Send a packet to the CCE via the PIO registers */ +static void r128CCESubmitPacketPIO(r128ContextPtr r128ctx, + CARD32 *buf, int count) +{ + unsigned char *R128MMIO = r128ctx->r128Screen->mmio; +#if DO_SECURITY_CHECK + CARD32 tmp = 0; + int psize = 0; + int writing = 1; + int addr = R128_PM4_FIFO_DATA_EVEN; +#endif + +#if DO_SECURITY_CHECK + while (count > 0) { + tmp = *buf++; + if (!psize) { + writing = 1; + + if ((tmp & R128_CCE_PACKET_MASK) == R128_CCE_PACKET0) { + if ((tmp & R128_CCE_PACKET0_REG_MASK) <= (0x1004 >> 2)) { + if ((tmp & R128_CCE_PACKET0_REG_MASK) != + (R128_PM4_VC_FPU_SETUP >> 2)) { + writing = 0; + } + } + psize = ((tmp & R128_CCE_PACKET_COUNT_MASK) >> 16) + 2; + } else if ((tmp & R128_CCE_PACKET_MASK) == R128_CCE_PACKET1) { + if ((tmp & R128_CCE_PACKET1_REG0_MASK) <= (0x1004 >> 2)) { + if ((tmp & R128_CCE_PACKET1_REG0_MASK) != + (R128_PM4_VC_FPU_SETUP >> 2)) { + writing = 0; + } + } else if ((tmp & R128_CCE_PACKET1_REG1_MASK) <= + (0x1004 << 9)) { + if ((tmp & R128_CCE_PACKET1_REG1_MASK) != + (R128_PM4_VC_FPU_SETUP << 9)) { + writing = 0; + } + } + psize = 3; + } else { + psize = ((tmp & R128_CCE_PACKET_COUNT_MASK) >> 16) + 2; + } + } + psize--; + + if (writing) { + r128CCEWaitForFifo(r128ctx->r128Screen, 1); + OUTREG(addr, tmp); + addr ^= 0x0004; + } + + count--; + } + + if (addr == R128_PM4_FIFO_DATA_ODD) { + r128CCEWaitForFifo(r128ctx->r128Screen, 1); + OUTREG(addr, R128_CCE_PACKET2); + } +#else + while (count > 1) { + r128CCEWaitForFifo(r128ctx->r128Screen, 2); + OUTREG(R128_PM4_FIFO_DATA_EVEN, *buf++); + OUTREG(R128_PM4_FIFO_DATA_ODD, *buf++); + count -= 2; + } + + if (count) { + r128CCEWaitForFifo(r128ctx->r128Screen, 2); + OUTREG(R128_PM4_FIFO_DATA_EVEN, *buf); + OUTREG(R128_PM4_FIFO_DATA_ODD, R128_CCE_PACKET2); + } +#endif +} + +/* Send a packet to the CCE via the ring */ +static void r128CCESubmitPacketRing(r128ContextPtr r128ctx, + CARD32 *buf, int count) +{ + r128ScreenPtr r128scrn = r128ctx->r128Screen; + unsigned char *R128MMIO = r128ctx->r128Screen->mmio; + int ringWrite = r128scrn->SAREA->ringWrite; + int *ringWritePtr = r128scrn->ringStartPtr + ringWrite; + int timeout; +#if DO_SECURITY_CHECK + CARD32 tmp = 0; + int psize = 0; + int writing = 1; +#endif + + if (count > r128scrn->ringEntries) { + /* FIXME */ + return; + } + + while (count > 0) { +#if DO_SECURITY_CHECK + tmp = *buf++; + if (!psize) { + writing = 1; + + if ((tmp & R128_CCE_PACKET_MASK) == R128_CCE_PACKET0) { + if ((tmp & R128_CCE_PACKET0_REG_MASK) <= (0x1004 >> 2)) { + if ((tmp & R128_CCE_PACKET0_REG_MASK) != + (R128_PM4_VC_FPU_SETUP >> 2)) { + writing = 0; + } + } + psize = ((tmp & R128_CCE_PACKET_COUNT_MASK) >> 16) + 2; + } else if ((tmp & R128_CCE_PACKET_MASK) == R128_CCE_PACKET1) { + if ((tmp & R128_CCE_PACKET1_REG0_MASK) <= (0x1004 >> 2)) { + if ((tmp & R128_CCE_PACKET1_REG0_MASK) != + (R128_PM4_VC_FPU_SETUP >> 2)) { + writing = 0; + } + } else if ((tmp & R128_CCE_PACKET1_REG1_MASK) <= + (0x1004 << 9)) { + if ((tmp & R128_CCE_PACKET1_REG1_MASK) != + (R128_PM4_VC_FPU_SETUP << 9)) { + writing = 0; + } + } + psize = 3; + } else { + psize = ((tmp & R128_CCE_PACKET_COUNT_MASK) >> 16) + 2; + } + } + psize--; + + if (writing) { + ringWrite++; + *ringWritePtr++ = tmp; + } +#else + ringWrite++; + *ringWritePtr++ = *buf++; +#endif + if (ringWrite >= r128scrn->ringEntries) { + ringWrite = 0; + ringWritePtr = r128scrn->ringStartPtr; + } + timeout = 0; + while (ringWrite == *r128scrn->ringReadPtr) { + (void)INREG(R128_PM4_BUFFER_DL_RPTR); + if (timeout++ >= R128_TIMEOUT) r128EngineReset(r128scrn); + } + + count--; + } + + if (ringWrite < 32) { + memcpy(r128scrn->ringEndPtr, + r128scrn->ringStartPtr, + ringWrite * sizeof(int)); + } + + r128scrn->SAREA->ringWrite = ringWrite; + OUTREG(R128_PM4_BUFFER_DL_WPTR, ringWrite); +} + +void r128CCESubmitPackets(r128ContextPtr r128ctx, CARD32 *buf, int count) +{ +#if USE_IOCTLS + if (drmR128SubmitPackets(r128ctx->r128Screen->driScreen->fd, + r128ctx->CCEbuf, r128ctx->CCEcount, + 0) < 0) { + r128EngineReset(r128ctx->r128Screen); + fprintf(stderr, "Error: Illegal CCE packet... exiting\n"); + exit(-1); + } +#else + if (R128CCE_USE_RING_BUFFER(r128ctx->r128Screen->CCEMode)) + r128CCESubmitPacketRing(r128ctx, buf, count); + else + r128CCESubmitPacketPIO(r128ctx, buf, count); +#endif +} + +#endif diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_cce.h b/xc/lib/GL/mesa/src/drv/r128/r128_cce.h new file mode 100644 index 000000000..162686cb7 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_cce.h @@ -0,0 +1,142 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#ifndef _R128_CCE_H_ +#define _R128_CCE_H_ + +#ifdef GLX_DIRECT_RENDERING + +#include "r128_dri.h" +#include "r128_reg.h" + +#include "xf86drmR128.h" + +typedef union { + float f; + int i; +} floatTOint; + +#define R128_DEFAULT_TOTAL_CCE_TIMEOUT 1000000 /* usecs */ + +/* Insert an integer value into the CCE ring buffer. */ +#define R128CCE(v) \ + do { \ + r128ctx->CCEbuf[r128ctx->CCEcount] = (v); \ + r128ctx->CCEcount++; \ + } while (0) + +/* Insert an floating point value into the CCE ring buffer. */ +#define R128CCEF(v) \ + do { \ + floatTOint fTi; \ + fTi.f = (v); \ + r128ctx->CCEbuf[r128ctx->CCEcount] = fTi.i; \ + r128ctx->CCEcount++; \ + } while (0) + +#if USE_USER_SPACE_RING + +#define R128CCE_SUBMIT_PACKETS() \ + do { \ + r128CCESubmitPackets(r128ctx, r128ctx->CCEbuf, r128ctx->CCEcount); \ + r128ctx->CCEcount = 0; \ + } while (0) + +#define R128CCE_WAIT_FOR_IDLE(r128ctx) \ + r128CCEWaitForIdle(r128ctx->r128Screen) + +#else /* if !USE_USER_SPACE_RING */ + +#define R128CCE_SUBMIT_PACKETS() \ + do { \ + CARD32 *_buf; \ + int _c = r128ctx->CCEcount; \ + int _fd = r128ctx->r128Screen->driScreen->fd; \ + int _to = 0; \ + int _ret; \ + \ + do { \ + _buf = r128ctx->CCEbuf + (r128ctx->CCEcount - _c); \ + _ret = drmR128SubmitPackets(_fd, _buf, &_c, 0); \ + } while (_ret < 0 && _ret == -EBUSY && _to++ < r128ctx->CCEtimeout); \ + if (_ret < 0) { \ + (void)drmR128EngineReset(_fd); \ + fprintf(stderr, "Error: Could not submit packet... exiting\n"); \ + exit(-1); \ + } \ + r128ctx->CCEcount = 0; \ + } while (0) + +#define R128CCE_WAIT_FOR_IDLE(r128ctx) \ + do { \ + int _fd = r128ctx->r128Screen->driScreen->fd; \ + int _to = 0; \ + int _ret; \ + \ + (void)drmR128EngineFlush(_fd); \ + do { \ + _ret = drmR128CCEWaitForIdle(_fd); \ + } while (_ret < 0 && _ret == -EBUSY && _to++ < r128ctx->CCEtimeout); \ + if (_ret < 0) { \ + (void)drmR128EngineReset(_fd); \ + fprintf(stderr, "Error: Rage 128 timed out... exiting\n"); \ + exit(-1); \ + } \ + } while (0) + +#endif + +#define R128CCE_WAIT_FOR_IDLE_LOCK(r128ctx) \ + do { \ + LOCK_HARDWARE(r128ctx); \ + R128CCE_WAIT_FOR_IDLE(r128ctx); \ + UNLOCK_HARDWARE(r128ctx); \ + } while (0) + + +/* Insert a type-[0123] packet header into the ring buffer */ +#define R128CCE0(p,r,n) R128CCE((p) | ((n) << 16) | ((r) >> 2)) +#define R128CCE1(p,r1,r2) R128CCE((p) | (((r2) >> 2) << 11) | ((r1) >> 2)) +#define R128CCE2(p) R128CCE((p)) +#define R128CCE3(p,n) R128CCE((p) | ((n) << 16)) + + +#if USE_USER_SPACE_RING +extern void r128CCEWaitForIdle(r128ScreenPtr pScrn); +extern void r128CCESubmitPackets(r128ContextPtr r128ctx, + CARD32 *buf, int count); +#endif + +#endif +#endif /* _R128_CCE_H_ */ diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_ccevb.h b/xc/lib/GL/mesa/src/drv/r128/r128_ccevb.h new file mode 100644 index 000000000..2084b8672 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_ccevb.h @@ -0,0 +1,224 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#ifndef _R128_CCEVB_H_ +#define _R128_CCEVB_H_ + +#ifdef GLX_DIRECT_RENDERING + +#include "xf86drmR128.h" + +typedef struct { + CARD32 *buf; /* Pointer to current VB */ + int index; /* Index of current VB */ + int start; /* in bytes from the beginning of the VB map */ + int size; /* in vertices */ + int count; /* in vertices */ + drmR128PrimType prim; /* Primitive type for vertices in VB */ + int done; /* VB has been sent to ring */ +} r128CCEVertBuf, *r128CCEVertBufPtr; + + + +/* Flush the CPU's write-combining cache */ +/* FIXME: This code is both processor and compiler specific */ +#define R128_FLUSH_WC_MEMORY() \ + do { \ + int xchangeDummy; \ + \ + __asm__ volatile("push %%eax ;" \ + "xchg %%eax, %0 ;" \ + "pop %%eax" : : "m" (xchangeDummy)); \ + __asm__ volatile("push %%eax ;" \ + "push %%ebx ;" \ + "push %%ecx ;" \ + "push %%edx ;" \ + "movl $0,%%eax ;" \ + "cpuid ;" \ + "pop %%edx ;" \ + "pop %%ecx ;" \ + "pop %%ebx ;" \ + "pop %%eax" : /* no outputs */ : /* no inputs */); \ + } while (0) + + +/* Get a new VB from the pool of vertex buffers in AGP space */ +/* NOTE: By default the primitive type for a VB is set to individual tris */ +#define R128CCE_GET_NEW_VB(r128ctx) \ + do { \ + r128CCEVertBufPtr vb = &r128ctx->vb; \ + int to = 0; \ + int fd = r128ctx->r128Screen->driScreen->fd; \ + int num; \ + int index; \ + int size; \ + \ + vb->buf = NULL; \ + \ + LOCK_HARDWARE(r128ctx); \ + while (!vb->buf && to++ < r128ctx->CCEtimeout) { \ + /* Ask the kernel a new vertex buffer */ \ + num = drmR128GetVertexBuffers(fd, 1, &index, &size); \ + \ + if (num > 0) { \ + vb->buf = (CARD32 *)(r128ctx->r128Screen-> \ + vbBufs->list[index].address); \ + vb->index = index; \ + vb->start = index*r128ctx->r128Screen->vbBufSize; \ + vb->size = size/sizeof(r128_vertex); \ + vb->count = 0; \ + vb->prim = DRM_R128_PRIM_TRI_LIST; \ + vb->done = GL_FALSE; \ + } \ + } \ + UNLOCK_HARDWARE(r128ctx); \ + \ + if (!vb->buf) { \ + (void)drmR128EngineReset(fd); \ + fprintf(stderr, "Error: Could not get new VB... exiting\n"); \ + exit(-1); \ + } \ + } while (0) + +/* Submit a VB to the hardware for processing */ +/* NOTE: This macro is only called while holding the hardware lock */ +#define R128CCE_SUBMIT_VB(r128ctx) \ + do { \ + int index = r128ctx->vb.index; \ + int size = r128ctx->vb.count; \ + int fd = r128ctx->r128Screen->driScreen->fd; \ + int to = 0; \ + int ret; \ + CARD32 prim; \ + \ + switch (r128ctx->vb.prim) { \ + case DRM_R128_PRIM_NONE: \ + prim = R128_CCE_VC_CNTL_PRIM_TYPE_NONE; \ + break; \ + case DRM_R128_PRIM_POINT: \ + prim = R128_CCE_VC_CNTL_PRIM_TYPE_POINT; \ + break; \ + case DRM_R128_PRIM_LINE: \ + prim = R128_CCE_VC_CNTL_PRIM_TYPE_LINE; \ + break; \ + case DRM_R128_PRIM_POLY_LINE: \ + prim = R128_CCE_VC_CNTL_PRIM_TYPE_POLY_LINE; \ + break; \ + case DRM_R128_PRIM_TRI_LIST: \ + prim = R128_CCE_VC_CNTL_PRIM_TYPE_TRI_LIST; \ + break; \ + case DRM_R128_PRIM_TRI_FAN: \ + prim = R128_CCE_VC_CNTL_PRIM_TYPE_TRI_FAN; \ + break; \ + case DRM_R128_PRIM_TRI_STRIP: \ + prim = R128_CCE_VC_CNTL_PRIM_TYPE_TRI_STRIP; \ + break; \ + case DRM_R128_PRIM_TRI_TYPE2: \ + prim = R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2; \ + break; \ + default: \ + prim = R128_CCE_VC_CNTL_PRIM_TYPE_NONE; \ + break; \ + } \ + \ + /* Send the vertex buffer to the hardware */ \ + BEGIN_CLIP_LOOP(r128ctx); \ + \ + R128CCE3(R128_CCE_PACKET3_3D_RNDR_GEN_INDX_PRIM, 3); \ + R128CCE(r128ctx->r128Screen->vbOffset + r128ctx->vb.start); \ + R128CCE(r128ctx->vb.count); \ + R128CCE(R128_FULL_VERTEX_FORMAT); \ + R128CCE(prim | R128_CCE_VC_CNTL_PRIM_WALK_LIST | \ + (r128ctx->vb.count << R128_CCE_VC_CNTL_NUM_SHIFT)); \ + R128CCE_SUBMIT_PACKETS(); \ + \ + END_CLIP_LOOP(r128ctx); \ + \ + /* Tell the kernel to release the vertex buffer */ \ + do { \ + ret = drmR128FlushVertexBuffers(fd, 1, &index, &size, \ + r128ctx->vb.prim); \ + } while (ret < 0 && ret == -EBUSY && to++ < r128ctx->CCEtimeout); \ + if (ret < 0) { \ + (void)drmR128EngineReset(fd); \ + fprintf(stderr, "Error: Could not flush VB... exiting\n"); \ + exit(-1); \ + } \ + \ + r128ctx->vb.done = GL_TRUE; \ + } while (0) + +/* Flush the vertex buffer (assuming we already hold the lock) */ +#define R128CCE_FLUSH_VB(r128ctx) \ + do { \ + if (r128ctx->vb.count && !r128ctx->vb.done) { \ + /* FIXME: Is this _really_ needed? */ \ + if (!R128CCE_USE_RING_BUFFER(r128ctx->r128Screen->CCEMode)) \ + R128CCE_WAIT_FOR_IDLE(r128ctx); \ + \ + R128CCE_SUBMIT_VB(r128ctx); \ + } \ + } while (0) + +/* Flush the vertex buffer */ +#define R128CCE_FLUSH_VB_LOCK(r128ctx) \ + do { \ + LOCK_HARDWARE(r128ctx); \ + R128CCE_FLUSH_VB(r128ctx); \ + UNLOCK_HARDWARE(r128ctx); \ + } while (0) + +/* Reserve space in a VB to store `n' vertices, and set the pointer `p' + to point to the next vertex in the current VB. If adding these + vertices to the VB would exceed the size of the VB, then flush the + current VB, get a new one from the pool of VBs, reserve space in the + new VB for the `n' vertices, and set the pointer `p' to point to the + first vertex in the new VB. */ +#define R128CCE_ALLOC_VB_SPACE(r128ctx, p, n) \ + do { \ + r128CCEVertBufPtr vb = &r128ctx->vb; \ + \ + if (vb->done) R128CCE_GET_NEW_VB(r128ctx); \ + \ + if (vb->count + (n) > vb->size) { \ + R128CCE_FLUSH_VB_LOCK(r128ctx); \ + R128CCE_GET_NEW_VB(r128ctx); \ + } \ + \ + (p) = (r128_vertex *)vb->buf + vb->count; \ + vb->count += (n); \ + } while (0) + +#endif +#endif /* _R128_CCEVB_H_ */ diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_clear.c b/xc/lib/GL/mesa/src/drv/r128/r128_clear.c new file mode 100644 index 000000000..9ab0581b0 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_clear.c @@ -0,0 +1,248 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#include "r128_init.h" +#include "r128_mesa.h" +#include "r128_xmesa.h" +#include "r128_context.h" +#include "r128_lock.h" +#include "r128_reg.h" +#include "r128_cce.h" +#include "r128_state.h" +#include "r128_vb.h" +#include "r128_clear.h" + +/* Clear the depth buffer */ +void r128ClearDepthBuffer(r128ContextPtr r128ctx, GLboolean all, + GLint cx, GLint cy, GLint cw, GLint ch) +{ + __DRIdrawablePrivate *dPriv = r128ctx->driDrawable; + int nc; + XF86DRIClipRectPtr c; + int dst_bpp; + CARD32 write_mask; + + if (!(r128ctx->regs.tex_cntl_c & R128_Z_WRITE_ENABLE)) return; + + switch (r128ctx->regs.z_sten_cntl_c & R128_Z_PIX_WIDTH_MASK) { + case R128_Z_PIX_WIDTH_16: + write_mask = 0x0000ffff; + dst_bpp = R128_GMC_DST_16BPP; + break; + case R128_Z_PIX_WIDTH_24: + write_mask = 0x00ffffff; + dst_bpp = R128_GMC_DST_32BPP; + break; + case R128_Z_PIX_WIDTH_32: + write_mask = 0xffffffff; + dst_bpp = R128_GMC_DST_32BPP; + break; + default: return; + } + + cx += dPriv->x; + cy = dPriv->y + dPriv->h - cy - ch; + + LOCK_HARDWARE(r128ctx); + + /* Flush any outstanding vertex buffers */ + R128CCE_FLUSH_VB(r128ctx); + + /* Init the clip rects here in case they changed during the + LOCK_HARDWARE macro */ + c = dPriv->pClipRects; + nc = dPriv->numClipRects; + + /* Set the write mask so that we _only_ clear the Z buffer */ + R128CCE0(R128_CCE_PACKET0, R128_DP_WRITE_MASK, 0); + R128CCE(write_mask); + + /* Temporarily disable Z and stencil buffer and texture mapping modes */ + R128CCE0(R128_CCE_PACKET0, R128_TEX_CNTL_C, 0); + R128CCE(r128ctx->regs.tex_cntl_c & ~(R128_Z_ENABLE | + R128_STENCIL_ENABLE | + R128_TEXMAP_ENABLE)); + + /* Cycle through the clip rects */ + while (nc--) { + int x = c[nc].x1; + int y = c[nc].y1; + int w = c[nc].x2 - x; + int h = c[nc].y2 - y; + + if (!all) { + if (x < cx) w -= cx - x, x = cx; + if (y < cy) h -= cy - y, y = cy; + + if (x + w > cx + cw) w = cx + cw - x; + if (y + h > cy + ch) h = cy + ch - y; + + if (w <= 0 || h <= 0) continue; + } + + x += r128ctx->r128Screen->depthX; + y += r128ctx->r128Screen->depthY; + + R128CCE3(R128_CCE_PACKET3_CNTL_PAINT_MULTI, 3); + R128CCE(R128_GMC_BRUSH_SOLID_COLOR + | dst_bpp + | R128_GMC_SRC_DATATYPE_COLOR + | R128_ROP3_P + | R128_GMC_3D_FCN_EN /* FIXME?? */ + | R128_GMC_CLR_CMP_CNTL_DIS /* FIXME?? */ + | R128_AUX_CLIP_DIS /* FIXME?? */ + | R128_GMC_WR_MSK_DIS); /* FIXME?? */ + R128CCE(r128ctx->ClearDepth); + R128CCE((x << 16) | y); + R128CCE((w << 16) | h); + } + +#if 0 + /* Set the write mask so that we _only_ clear the Z buffer */ + R128CCE0(R128_CCE_PACKET0, R128_DP_WRITE_MASK, 0); + R128CCE(0xffffffff); + + /* Restore Z and stencil buffer and texture mapping modes */ + R128CCE0(R128_CCE_PACKET0, R128_TEX_CNTL_C, 0); + R128CCE(r128ctx->regs.tex_cntl_c); +#else + /* FIXME: We should be able to optimize this by restoring only the + registers that change (above) */ + /* NOTE: The restore of TEX_CNTL_C and R128_DP_WRITE_MASK is handled by + vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_ALL_DIRTY; +#endif + + R128CCE_SUBMIT_PACKETS(); + + UNLOCK_HARDWARE(r128ctx); +} + +/* Clear a color buffer */ +void r128ClearColorBuffer(r128ContextPtr r128ctx, GLboolean all, + GLint cx, GLint cy, GLint cw, GLint ch, + GLint drawX, GLint drawY) +{ + __DRIdrawablePrivate *dPriv = r128ctx->driDrawable; + int nc; + XF86DRIClipRectPtr c; + int dst_bpp; + + switch (r128ctx->r128Screen->bpp) { + case 8: + dst_bpp = R128_GMC_DST_8BPP_CI; + break; + case 16: + if (r128ctx->r128Screen->depth == 15) dst_bpp = R128_GMC_DST_15BPP; + else dst_bpp = R128_GMC_DST_16BPP; + break; + case 24: + dst_bpp = R128_GMC_DST_24BPP; + break; + case 32: + default: + dst_bpp = R128_GMC_DST_32BPP; + break; + } + + cx += dPriv->x; + cy = dPriv->y + dPriv->h - cy - ch; + + LOCK_HARDWARE(r128ctx); + + /* Flush any outstanding vertex buffers */ + R128CCE_FLUSH_VB(r128ctx); + + /* Init the clip rects here in case they changed during the + LOCK_HARDWARE macro */ + c = dPriv->pClipRects; + nc = dPriv->numClipRects; + + /* Temporarily disable Z and stencil buffer and texture mapping modes */ + R128CCE0(R128_CCE_PACKET0, R128_TEX_CNTL_C, 0); + R128CCE(r128ctx->regs.tex_cntl_c & ~(R128_Z_ENABLE | + R128_STENCIL_ENABLE | + R128_TEXMAP_ENABLE)); + + /* Cycle through the clip rects */ + while (nc--) { + int x = c[nc].x1; + int y = c[nc].y1; + int w = c[nc].x2 - x; + int h = c[nc].y2 - y; + + if (!all) { + if (x < cx) w -= cx - x, x = cx; + if (y < cy) h -= cy - y, y = cy; + + if (x + w > cx + cw) w = cx + cw - x; + if (y + h > cy + ch) h = cy + ch - h; + + if (w <= 0 || h <= 0) continue; + } + + x += drawX; + y += drawY; + + R128CCE3(R128_CCE_PACKET3_CNTL_PAINT_MULTI, 3); + R128CCE(R128_GMC_BRUSH_SOLID_COLOR + | dst_bpp + | R128_GMC_SRC_DATATYPE_COLOR + | R128_ROP3_P + | R128_GMC_3D_FCN_EN /* FIXME?? */ + | R128_GMC_CLR_CMP_CNTL_DIS /* FIXME?? */ + | R128_AUX_CLIP_DIS); /* FIXME?? */ + R128CCE(r128ctx->ClearColor); + R128CCE((x << 16) | y); + R128CCE((w << 16) | h); + } + +#if 0 + /* Restore Z and stencil buffer and texture mapping modes */ + R128CCE0(R128_CCE_PACKET0, R128_TEX_CNTL_C, 0); + R128CCE(r128ctx->regs.tex_cntl_c); +#else + /* FIXME: We should be able to optimize this by restoring only the + registers that change (above) */ + /* NOTE: The restore of TEX_CNTL_C is handled by + vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_ALL_DIRTY; +#endif + + R128CCE_SUBMIT_PACKETS(); + + UNLOCK_HARDWARE(r128ctx); +} diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_clear.h b/xc/lib/GL/mesa/src/drv/r128/r128_clear.h new file mode 100644 index 000000000..7018b05b4 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_clear.h @@ -0,0 +1,47 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#ifndef _R128_CLEAR_H_ +#define _R128_CLEAR_H_ + +#ifdef GLX_DIRECT_RENDERING + +extern void r128ClearDepthBuffer(r128ContextPtr r128ctx, GLboolean all, + GLint x, GLint y, GLint width, GLint height); +extern void r128ClearColorBuffer(r128ContextPtr r128ctx, GLboolean all, + GLint x, GLint y, GLint width, GLint height, + GLint drawX, GLint drawY); + +#endif +#endif /* _R128_CLEAR_H_ */ diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_context.c b/xc/lib/GL/mesa/src/drv/r128/r128_context.c new file mode 100644 index 000000000..01573f559 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_context.c @@ -0,0 +1,203 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#include <stdlib.h> + +#include "r128_init.h" +#include "r128_mesa.h" +#include "r128_xmesa.h" +#include "r128_context.h" +#include "r128_cce.h" +#include "r128_dd.h" +#include "r128_state.h" +#include "r128_span.h" +#include "r128_tex.h" +#include "r128_vb.h" +#include "r128_pipeline.h" + +#include "context.h" +#include "simple_list.h" + +/* Create the device specific context */ +GLboolean r128CreateContext(Display *dpy, GLvisual *glVisual, + __DRIcontextPrivate *driContextPriv) +{ + r128ContextPtr r128ctx; + r128ScreenPtr r128scrn; + GLcontext *glCtx = driContextPriv->mesaContext; + int i; + char *v; + + r128ctx = (r128ContextPtr)Xmalloc(sizeof(*r128ctx)); + if (!r128ctx) return GL_FALSE; + + /* Initialize r128Context */ + r128ctx->glCtx = glCtx; + r128ctx->display = dpy; + r128ctx->driContext = driContextPriv; + r128ctx->driDrawable = NULL; /* Set by XMesaMakeCurrent */ + + if (getenv("LIBGL_SOFTWARE_RENDERING")) + r128ctx->SWonly = GL_TRUE; + else + r128ctx->SWonly = GL_FALSE; + if (getenv("LIBGL_NO_SOFTWARE_FALLBACKS")) + r128ctx->SWfallbackDisable = GL_TRUE; + else + r128ctx->SWfallbackDisable = GL_FALSE; + r128scrn = r128ctx->r128Screen = + (r128ScreenPtr)(driContextPriv->driScreenPriv->private); + + r128ctx->CurrentTexObj[0] = NULL; + r128ctx->CurrentTexObj[1] = NULL; + make_empty_list(&r128ctx->SwappedOut); + for (i = 0; i < r128scrn->NRTexHeaps; i++) { + make_empty_list(&r128ctx->TexObjList[i]); + r128ctx->texHeap[i] = mmInit(0, r128scrn->texSize[i]); + r128ctx->lastTexAge[i] = -1; + } + + r128ctx->lastSwapAge = 0; + + r128ctx->useFastPath = GL_FALSE; + + r128ctx->vb.start = 0; + r128ctx->vb.count = 0; + r128ctx->vb.size = 0; + r128ctx->vb.index = 0; + r128ctx->vb.buf = NULL; + r128ctx->vb.done = GL_TRUE; + + if (r128scrn->IsPCI || getenv("LIBGL_DISABLE_VERTEX_BUFFERS")) + r128ctx->disableVB = GL_TRUE; + else + r128ctx->disableVB = GL_FALSE; + + r128ctx->CCEbuf = (CARD32 *)malloc(sizeof(*r128ctx->CCEbuf) * + r128scrn->ringEntries); + r128ctx->CCEcount = 0; + + if ((v = getenv("LIBGL_CCE_TIMEOUT"))) + r128ctx->CCEtimeout = strtoul(v, NULL, 10); + else + r128ctx->CCEtimeout = (R128_DEFAULT_TOTAL_CCE_TIMEOUT / + R128_DEFAULT_CCE_TIMEOUT); + if (r128ctx->CCEtimeout <= 0) r128ctx->CCEtimeout = 1; + + /* Initialize GLcontext */ + glCtx->DriverCtx = (void *)r128ctx; + + r128DDInitExtensions(glCtx); + + r128DDInitDriverFuncs(glCtx); + r128DDInitStateFuncs(glCtx); + r128DDInitSpanFuncs(glCtx); + r128DDInitTextureFuncs(glCtx); + + glCtx->Driver.TriangleCaps = (DD_TRI_CULL + | DD_TRI_LIGHT_TWOSIDE + | DD_TRI_OFFSET); +#if 0 + /* FIXME */ + glCtx->TriangleCaps |= DD_CLIP_FOG_COORD; +#endif + + /* Reset Mesa's current 2D texture pointers to the driver's textures */ + glCtx->Shared->DefaultD[2][0].DriverData = NULL; + glCtx->Shared->DefaultD[2][1].DriverData = NULL; + + /* If Mesa has current a vertex buffer, make sure the driver's VB + data is up to date */ + if (glCtx->VB) r128DDRegisterVB(glCtx->VB); + + /* Register the fast path */ + if (glCtx->NrPipelineStages) + glCtx->NrPipelineStages = + r128RegisterPipelineStages(glCtx->PipelineStage, + glCtx->PipelineStage, + glCtx->NrPipelineStages); + + r128DDInitState(r128ctx); + + driContextPriv->driverPrivate = (void *)r128ctx; + + return GL_TRUE; +} + +/* Destroy the device specific context */ +void r128DestroyContext(r128ContextPtr r128ctx) +{ + if (r128ctx) { + r128TexObjPtr t, next_t; + int i; + + free(r128ctx->CCEbuf); + + for (i = 0; i < r128ctx->r128Screen->NRTexHeaps; i++) { + foreach_s (t, next_t, &r128ctx->TexObjList[i]) + r128DestroyTexObj(r128ctx, t); + } + + foreach_s (t, next_t, &r128ctx->SwappedOut) + r128DestroyTexObj(r128ctx, t); + + gl_destroy_context(r128ctx->glCtx); + Xfree(r128ctx); + } +} + +/* Load the device specific context into the hardware. The actual + setting of the hardware state is done in the r128UpdateHWState(). */ +r128ContextPtr r128MakeCurrent(r128ContextPtr oldCtx, + r128ContextPtr newCtx, + __DRIdrawablePrivate *dPriv) +{ + if (oldCtx) { + if (!R128CCE_USE_RING_BUFFER(newCtx->r128Screen->CCEMode)) + newCtx->dirty |= R128_REQUIRE_QUIESCENCE; + if (oldCtx != newCtx) { + newCtx->dirty |= R128_UPDATE_CONTEXT; + newCtx->dirty_context |= R128_CTX_ALL_DIRTY; + } + if (oldCtx->driDrawable != dPriv) + newCtx->dirty |= R128_UPDATE_WINPOS; + } else { + newCtx->dirty |= R128_UPDATE_CONTEXT; + newCtx->dirty_context |= R128_CTX_ALL_DIRTY; + } + + newCtx->driDrawable = dPriv; + + return newCtx; +} diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_context.h b/xc/lib/GL/mesa/src/drv/r128/r128_context.h new file mode 100644 index 000000000..189a22cbe --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_context.h @@ -0,0 +1,219 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#ifndef _R128_CONTEXT_H_ +#define _R128_CONTEXT_H_ + +#ifdef GLX_DIRECT_RENDERING + +#include "r128_texobj.h" +#include "r128_fastpath.h" +#include "r128_ccevb.h" + +/* Flags for what needs to be updated before a new primitive is rendered */ +#define R128_CLEAN 0x0000 +#define R128_REQUIRE_QUIESCENCE 0x0001 +#define R128_UPDATE_CONTEXT 0x0002 +#define R128_UPDATE_WINPOS 0x0004 +#define R128_UPDATE_TEX0IMAGES 0x0008 +#define R128_UPDATE_TEX1IMAGES 0x0010 +#define R128_UPDATE_TEXSTATE 0x0020 +#define R128_ALL_DIRTY 0xffff + +/* Flags for what context state needs to be updated */ +#define R128_CTX_CLEAN 0x0000 +#define R128_CTX_MISC 0x0001 +#define R128_CTX_ENGINESTATE 0x0002 +#define R128_CTX_TEX0STATE 0x0004 +#define R128_CTX_TEX1STATE 0x0008 +#define R128_CTX_TEXENVSTATE 0x0010 +#define R128_CTX_FOGSTATE 0x0020 +#define R128_CTX_FOGTABLE 0x0040 +#define R128_CTX_ZSTENSTATE 0x0080 +#define R128_CTX_SCISSORS 0x0100 +#define R128_CTX_ALPHASTATE 0x0200 +#define R128_CTX_SETUPSTATE 0x0400 +#define R128_CTX_WIN_Z_POS 0x0800 +#define R128_CTX_FLUSH_PIX_CACHE 0x1000 +#define R128_CTX_ALL_DIRTY 0xffff + +/* Flags for software fallback cases */ +#define R128_FALLBACK_TEXTURE 0x0001 +#define R128_FALLBACK_DRAW_BUFFER 0x0002 +#define R128_FALLBACK_READ_BUFFER 0x0004 +#define R128_FALLBACK_COLORMASK 0x0008 +#define R128_FALLBACK_STIPPLE 0x0010 + +/* NOTE: The groups below need to be kept together so that a single + memcpy can be used to transfer data to the ring buffer */ +typedef struct { + CARD32 scale_3d_cntl; /* 0x1a00 */ + + CARD32 aux_sc_cntl; /* 0x1660 */ + CARD32 aux1_sc_left; + CARD32 aux1_sc_right; + CARD32 aux1_sc_top; + CARD32 aux1_sc_bottom; + CARD32 aux2_sc_left; + CARD32 aux2_sc_right; + CARD32 aux2_sc_top; + CARD32 aux2_sc_bottom; + CARD32 aux3_sc_left; + CARD32 aux3_sc_right; + CARD32 aux3_sc_top; + CARD32 aux3_sc_bottom; /* 0x1690 */ + + CARD32 dst_pitch_offset_c; /* 0x1c80 */ + CARD32 dp_gui_master_cntl; + CARD32 sc_top_left_c; + CARD32 sc_bottom_right_c; + CARD32 z_offset_c; + CARD32 z_pitch_c; + CARD32 z_sten_cntl_c; + CARD32 tex_cntl_c; + CARD32 misc_3d_state_cntl_reg; + CARD32 texture_clr_cmp_clr_c; + CARD32 texture_clr_cmp_msk_c; + CARD32 fog_color_c; + CARD32 prim_tex_cntl_c; + CARD32 prim_texture_combine_cntl_c; + CARD32 tex_size_pitch_c; + CARD32 prim_tex_offset[R128_TEX_MAXLEVELS]; /* 0x1ce4 */ + + CARD32 sec_tex_cntl_c; /* 0x1d00 */ + CARD32 sec_tex_combine_cntl_c; + CARD32 sec_tex_offset[R128_TEX_MAXLEVELS]; + CARD32 constant_color_c; + CARD32 prim_texture_border_color_c; + CARD32 sec_texture_border_color_c; + CARD32 sten_ref_mask_c; + CARD32 plane_3d_mask_c; /* 0x1d44 */ + + CARD32 setup_cntl; /* 0x1bc4 */ + + CARD32 pm4_vc_fpu_setup; /* 0x071c */ + + CARD32 fog_3d_table_start; /* 0x1810 */ + CARD32 fog_3d_table_end; + CARD32 fog_3d_table_density; /* 0x181c */ + + CARD32 window_xy_offset; /* 0x1bcc */ + + CARD32 dp_write_mask; /* 0x16cc */ + + CARD32 pc_gui_ctlstat; /* 0x1748 */ +} r128ContextRegs; + +typedef struct { + GLcontext *glCtx; /* Mesa context */ + int dirty; /* Hardware state to be updated */ + int dirty_context; /* Context state to be updated */ + + int SWonly; /* Force software-only rendering */ + int SWfallbackDisable; /* Disable software fallbacks */ + + r128TexObjPtr CurrentTexObj[2]; /* Ptr to current texture + object associated with + each texture unit */ + /* List of tex swapped in per heap*/ + r128TexObj TexObjList[R128_NR_TEX_HEAPS]; + r128TexObj SwappedOut; /* List of textures swapped out */ + memHeap_t *texHeap[R128_NR_TEX_HEAPS]; /* Global tex heaps */ + /* Last known global tex heap ages */ + int lastTexAge[R128_NR_TEX_HEAPS]; + + CARD32 lastSwapAge; /* Last known swap age */ + + GLenum FogMode; /* Current fog equation */ + + int Scissor; + XF86DRIClipRectRec ScissorRect; /* Current software scissor */ + + int useFastPath; /* Currently using Fast Path code */ + int SetupIndex; /* Raster setup function index */ + int SetupDone; /* Partial raster setup done? */ + int RenderIndex; /* Render state function index */ + r128InterpFunc interp; /* Current vert interp function */ + + r128CCEVertBuf vb; /* VB currently being filled */ + int disableVB; /* Disable the use of vertex buffers */ + + points_func PointsFunc; /* Current Points, Line, Triangle */ + line_func LineFunc; /* and Quad rendering functions */ + triangle_func TriangleFunc; + quad_func QuadFunc; + + CARD32 IndirectTriangles; /* Flags for point, line, + tri and quad software + fallbacks */ + CARD32 Fallback; /* Need software fallback */ + + r128ContextRegs regs; /* Hardware state */ + CARD32 Color; /* Current draw color */ + CARD32 ClearColor; /* Color used to clear color buffer */ + CARD32 ClearDepth; /* Value used to clear depth buffer */ + + int drawX; /* x-offset to current draw buffer */ + int drawY; /* y-offset to current draw buffer */ + + int readX; /* x-offset to current read buffer */ + int readY; /* y-offset to current read buffer */ + + CARD32 *CCEbuf; /* buffer to submit to CCE */ + int CCEcount; /* number of dwords in CCEbuf */ + + int CCEtimeout; /* number of times to loop + before exiting */ + + Display *display; /* X server display */ + + __DRIcontextPrivate *driContext; /* DRI context */ + __DRIdrawablePrivate *driDrawable; /* DRI drawable bound to this ctx */ + + r128ScreenPtr r128Screen; /* Screen private DRI data */ +} r128ContextRec, *r128ContextPtr; + +#define R128_MESACTX(r128ctx) ((r128ctx)->glCtx) +#define R128_DRIDRAWABLE(r128ctx) ((r128ctx)->driDrawable) +#define R128_DRISCREEN(r128ctx) ((r128ctx)->r128Screen->driScreen) + +extern GLboolean r128CreateContext(Display *dpy, GLvisual *glVisual, + __DRIcontextPrivate *driContextPriv); +extern void r128DestroyContext(r128ContextPtr r128ctx); +extern r128ContextPtr r128MakeCurrent(r128ContextPtr oldCtx, + r128ContextPtr newCtx, + __DRIdrawablePrivate *dPriv); + +#endif +#endif /* _R128_CONTEXT_H_ */ diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_dd.c b/xc/lib/GL/mesa/src/drv/r128/r128_dd.c new file mode 100644 index 000000000..0ed7ae471 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_dd.c @@ -0,0 +1,182 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#include "r128_init.h" +#include "r128_mesa.h" +#include "r128_xmesa.h" +#include "r128_context.h" +#include "r128_lock.h" +#include "r128_cce.h" +#include "r128_clear.h" +#include "r128_state.h" +#include "r128_vb.h" +#include "r128_pipeline.h" +#include "r128_dd.h" + +/* Driver entry point for clearing color and ancillary buffers */ +static GLbitfield r128DDClear(GLcontext *ctx, GLbitfield mask, GLboolean all, + GLint x, GLint y, GLint width, GLint height) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + + if (r128ctx->SWonly) { + /* FIXME: Provide software fallback for this case?? */ + } + + if (mask & DD_FRONT_LEFT_BIT) { + r128ClearColorBuffer(r128ctx, all, x, y, width, height, + r128ctx->r128Screen->fbX, + r128ctx->r128Screen->fbY); + mask &= ~DD_FRONT_LEFT_BIT; + } + + if (mask & DD_BACK_LEFT_BIT) { + r128ClearColorBuffer(r128ctx, all, x, y, width, height, + r128ctx->r128Screen->backX, + r128ctx->r128Screen->backY); + mask &= ~DD_BACK_LEFT_BIT; + } + + if (mask & DD_DEPTH_BIT) { + r128ClearDepthBuffer(r128ctx, all, x, y, width, height); + mask &= ~DD_DEPTH_BIT; + } + +#if 0 + /* FIXME: Add stencil support */ + if (mask & DD_STENCIL_BIT) { + r128ClearStencilBuffer(r128ctx, all, x, y, width, height); + mask &= ~DD_STENCIL_BIT; + } +#endif + + return mask; +} + +/* Return the current color buffer size */ +static void r128DDGetBufferSize(GLcontext *ctx, GLuint *width, GLuint *height) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + + *width = r128ctx->driDrawable->w; + *height = r128ctx->driDrawable->h; +} + +/* Return various strings for glGetString() */ +static const GLubyte *r128DDGetString(GLcontext *ctx, GLenum name) +{ + switch (name) { + case GL_VENDOR: + return (GLubyte *)"Precision Insight, Inc."; + case GL_RENDERER: + return (GLubyte *)"Mesa DRI Rage128 20000320"; + default: + return NULL; + } +} + +/* Send all commands to the hardware. If vertex buffers or indirect + buffers are in use, then we need to make sure they are sent to the + hardware. All commands that are normally sent to the ring are + already considered `flushed'. */ +static void r128DDFlush(GLcontext *ctx) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + + R128CCE_FLUSH_VB_LOCK(r128ctx); +} + +/* Make sure all commands have been sent to the hardware and have + completed processing. */ +static void r128DDFinish(GLcontext *ctx) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + + r128DDFlush(ctx); + R128CCE_WAIT_FOR_IDLE_LOCK(r128ctx); +} + +/* Return various parameters requested by Mesa */ +static GLint r128DDGetParameteri(const GLcontext *ctx, GLint param) +{ + switch (param) { +#if 0 + /* FIXME: Support for these needs to be added to Mesa */ + case DD_MAX_TEXTURE_SIZE: return 1024; + case DD_MAX_TEXTURES: return 2; +#endif +#if 0 + case DD_HAVE_HARDWARE_FOG: return 1; /* FIXME: Add HW fog support */ +#endif + default: return 0; + } +} + +/* Initialize the extensions supported by this driver */ +void r128DDInitExtensions(GLcontext *ctx) +{ + /* FIXME: Are there other extensions to enable/disable??? */ + gl_extensions_disable(ctx, "GL_EXT_shared_texture_palette"); + gl_extensions_disable(ctx, "GL_EXT_paletted_texture"); + gl_extensions_disable(ctx, "GL_EXT_point_parameters"); + gl_extensions_disable(ctx, "ARB_imaging"); + gl_extensions_disable(ctx, "GL_EXT_blend_minmax"); + gl_extensions_disable(ctx, "GL_EXT_blend_logic_op"); + gl_extensions_disable(ctx, "GL_EXT_blend_subtract"); + gl_extensions_disable(ctx, "GL_INGR_blend_func_separate"); + + if (getenv("LIBGL_NO_MULTITEXTURE")) + gl_extensions_disable(ctx, "GL_ARB_multitexture"); +} + +/* Initialize the driver's misc functions */ +void r128DDInitDriverFuncs(GLcontext *ctx) +{ + ctx->Driver.Clear = r128DDClear; + + ctx->Driver.GetBufferSize = r128DDGetBufferSize; + ctx->Driver.GetString = r128DDGetString; + ctx->Driver.Finish = r128DDFinish; + ctx->Driver.Flush = r128DDFlush; + + ctx->Driver.Error = NULL; + ctx->Driver.GetParameteri = r128DDGetParameteri; + + ctx->Driver.DrawPixels = NULL; + ctx->Driver.Bitmap = NULL; + + ctx->Driver.RegisterVB = r128DDRegisterVB; + ctx->Driver.UnregisterVB = r128DDUnregisterVB; + ctx->Driver.BuildPrecalcPipeline = r128DDBuildPrecalcPipeline; +} diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_dd.h b/xc/lib/GL/mesa/src/drv/r128/r128_dd.h new file mode 100644 index 000000000..91aa02586 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_dd.h @@ -0,0 +1,44 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#ifndef _R128_DD_H_ +#define _R128_DD_H_ + +#ifdef GLX_DIRECT_RENDERING + +extern void r128DDInitExtensions(GLcontext *ctx); +extern void r128DDInitDriverFuncs(GLcontext *ctx); + +#endif +#endif /* _R128_DD_H_ */ diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_fastpath.c b/xc/lib/GL/mesa/src/drv/r128/r128_fastpath.c new file mode 100644 index 000000000..330e5a23d --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_fastpath.c @@ -0,0 +1,551 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#include "r128_init.h" +#include "r128_mesa.h" +#include "r128_state.h" +#include "r128_vb.h" +#include "r128_tris.h" +#include "r128_fastpath.h" + +#include "mmath.h" +#include "cva.h" +#include "vertices.h" + +/* FIXME: These routines were copied from the i810 driver, and were only + slightly modified for the Rage 128. They still need to be optmizied + and cleaned up. Also, support for USE_RHW2 needs to be added. */ + +typedef struct r128_fast_table { + r128BuildVerticesFunc build_vertices; + r128InterpFunc interp; +} r128FastPathTable; + +#define POINT(x) r128DrawPointVB(r128ctx, &vert[x].v, psize) +#define LINE(x,y) r128DrawLineVB(r128ctx, &vert[x].v, &vert[y].v, lwidth) +#define TRI(x,y,z) r128DrawTriangleVB(r128ctx, &vert[x].v, &vert[y].v, &vert[z].v) + +/* Direct, and no clipping required. The clip funcs have not been + written yet, so this is only useful for the fast path. */ +#define RENDER_POINTS(start, count) \ +do { \ + GLuint e; \ + for (e = start; e <= count; e++) \ + POINT(elt[e]); \ +} while (0) + +#define RENDER_LINE(i1, i) \ +do { \ + GLuint e1 = elt[i1], e = elt[i]; \ + LINE(e1, e); \ +} while (0) + +#define RENDER_TRI(i2, i1, i, pv, parity) \ +do { \ + GLuint e2 = elt[i2], e1 = elt[i1], e = elt[i]; \ + if (parity) { \ + GLuint tmp = e2; \ + e2 = e1; \ + e1 = tmp; \ + } \ + TRI(e2, e1, e); \ +} while (0) + +#define RENDER_QUAD(i3, i2, i1, i, pv) \ +do { \ + GLuint e3 = elt[i3], e2 = elt[i2], e1 = elt[i1], e = elt[i]; \ + TRI(e3, e2, e); \ + TRI(e2, e1, e); \ +} while (0) + +#define LOCAL_VARS \ + r128VertexPtr vert = R128_DRIVER_DATA(VB)->verts; \ + const GLuint *elt = VB->EltPtr->data; \ + GLcontext *ctx = VB->ctx; \ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); \ + const GLfloat lwidth = ctx->Line.Width; \ + const GLfloat psize = ctx->Point.Size; \ + (void) lwidth; (void)psize; (void) vert; + +#define TAG(x) x##_r128_smooth_indirect +#include "render_tmp.h" + + + +#define NEGATIVE(f) (f < 0) +#define DIFFERENT_SIGNS(a,b) ((a*b) < 0) +#define LINTERP(T, A, B) ((A) + (T) * ((B) - (A))) + + +#define INTERP_RGBA(t, out, a, b) \ +do { \ + int i; \ + for (i = 0; i < 4; i++) { \ + GLfloat fa = UBYTE_COLOR_TO_FLOAT_COLOR(a[i]); \ + GLfloat fb = UBYTE_COLOR_TO_FLOAT_COLOR(b[i]); \ + GLfloat fo = LINTERP(t, fa, fb); \ + FLOAT_COLOR_TO_UBYTE_COLOR(out[i], fo); \ + } \ +} while (0) + + +#define CLIP(SGN, V, PLANE) \ +do { \ + if (mask & PLANE) { \ + GLuint *indata = inlist[in]; \ + GLuint *outdata = inlist[in ^= 1]; \ + GLuint nr = n; \ + GLfloat *J = verts[indata[nr-1]].f; \ + GLfloat dpJ = (SGN J[V]) + J[3]; \ + \ + inlist[0] = vlist1; \ + for (i = n = 0 ; i < nr ; i++) { \ + GLuint elt_i = indata[i]; \ + GLfloat *I = verts[elt_i].f; \ + GLfloat dpI = (SGN I[V]) + I[3]; \ + \ + if (DIFFERENT_SIGNS(dpI, dpJ)) { \ + GLfloat *O = verts[next_vert].f; \ + GLfloat t, *in, *out; \ + \ + if (NEGATIVE(dpI)) { \ + t = dpI / (dpI - dpJ); \ + in = I; \ + out = J; \ + } else { \ + t = dpJ / (dpJ - dpI); \ + in = J; \ + out = I; \ + } \ + \ + interp(t, O, in, out); \ + \ + clipmask[next_vert] = 0; \ + outdata[n++] = next_vert++; \ + } \ + \ + clipmask[elt_i] |= PLANE; /* don't set up */ \ + \ + if (!NEGATIVE(dpI)) { \ + outdata[n++] = elt_i; \ + clipmask[elt_i] &= ~PLANE; /* set up after all */ \ + } \ + \ + J = I; \ + dpJ = dpI; \ + } \ + \ + if (n < 3) return; \ + } \ +} while (0) + +#define LINE_CLIP(x,y,z,w,PLANE) \ +do { \ + if (mask & PLANE) { \ + GLfloat dpI = DOT4V(I,x,y,z,w); \ + GLfloat dpJ = DOT4V(J,x,y,z,w); \ + \ + if (DIFFERENT_SIGNS(dpI, dpJ)) { \ + GLfloat *O = verts[next_vert].f; \ + GLfloat t = dpI / (dpI - dpJ); \ + \ + interp(t, O, I, J); \ + \ + clipmask[next_vert] = 0; \ + \ + if (NEGATIVE(dpI)) { \ + clipmask[elts[0]] |= PLANE; \ + I = O; \ + elts[0] = next_vert++; \ + } else { \ + clipmask[elts[1]] |= PLANE; \ + J = O; \ + elts[1] = next_vert++; \ + } \ + } else if (NEGATIVE(dpI)) return; \ + } \ +} while (0) + + +static void r128TriClip(GLuint **p_elts, + r128Vertex *verts, + GLubyte *clipmask, + GLuint *p_next_vert, + GLubyte mask, + r128InterpFunc interp) +{ + GLuint *elts = *p_elts; + GLuint next_vert = *p_next_vert; + GLuint in = 0; + GLuint n = 3; + GLuint vlist1[VB_MAX_CLIPPED_VERTS]; + GLuint vlist2[VB_MAX_CLIPPED_VERTS]; + GLuint *inlist[2]; + GLuint *out; + GLuint i; + + inlist[0] = elts; + inlist[1] = vlist2; + + CLIP(-,0,CLIP_RIGHT_BIT); + CLIP(+,0,CLIP_LEFT_BIT); + CLIP(-,1,CLIP_TOP_BIT); + CLIP(+,1,CLIP_BOTTOM_BIT); + CLIP(-,2,CLIP_FAR_BIT); + CLIP(+,2,CLIP_NEAR_BIT); + + /* Convert the planar polygon to a list of triangles */ + out = inlist[in]; + + for (i = 2 ; i < n ; i++) { + elts[0] = out[0]; + elts[1] = out[i-1]; + elts[2] = out[i]; + elts += 3; + } + + *p_next_vert = next_vert; + *p_elts = elts; +} + + +static void r128LineClip(GLuint **p_elts, + r128Vertex *verts, + GLubyte *clipmask, + GLuint *p_next_vert, + GLubyte mask, + r128InterpFunc interp) +{ + GLuint *elts = *p_elts; + GLfloat *I = verts[elts[0]].f; + GLfloat *J = verts[elts[1]].f; + GLuint next_vert = *p_next_vert; + + LINE_CLIP(1,0,0,-1,CLIP_LEFT_BIT); + LINE_CLIP(-1,0,0,1,CLIP_RIGHT_BIT); + LINE_CLIP(0,1,0,-1,CLIP_TOP_BIT); + LINE_CLIP(0,-1,0,1,CLIP_BOTTOM_BIT); + LINE_CLIP(0,0,1,-1,CLIP_FAR_BIT); + LINE_CLIP(0,0,-1,1,CLIP_NEAR_BIT); + + *p_next_vert = next_vert; + *p_elts += 2; +} + + + +#define CLIP_POINT(e) \ +do { \ + if (mask[e]) *out++ = e; \ +} while (0) + +#define CLIP_LINE(e1, e0) \ +do { \ + GLubyte ormask = mask[e0] | mask[e1]; \ + out[0] = e1; \ + out[1] = e0; \ + out += 2; \ + if (ormask) { \ + out-=2; \ + if (!(mask[e0] & mask[e1])) { \ + r128LineClip(&out, verts, mask, &next_vert, ormask, interp); \ + } \ + } \ +} while (0) + +#define CLIP_TRIANGLE(e2, e1, e0) \ +do { \ + GLubyte ormask; \ + out[0] = e2; \ + out[1] = e1; \ + out[2] = e0; \ + out += 3; \ + ormask = mask[e2] | mask[e1] | mask[e0]; \ + if (ormask) { \ + out -= 3; \ + if (!(mask[e2] & mask[e1] & mask[e0])) { \ + r128TriClip(&out, verts, mask, &next_vert, ormask, interp); \ + } \ + } \ +} while (0) + + + +/* Build a table of functions to clip each primitive type. These + * produce a list of elements in the appropriate 'reduced' primitive, + * ie (points, lines, triangles) containing all the clipped and + * unclipped primitives from the original list. + */ +#define LOCAL_VARS \ + r128ContextPtr r128ctx = R128_CONTEXT(VB->ctx); \ + r128VertexBufferPtr r128VB = R128_DRIVER_DATA(VB); \ + GLuint *elt = VB->EltPtr->data; \ + r128Vertex *verts = r128VB->verts; \ + GLuint next_vert = r128VB->last_vert; \ + GLuint *out = r128VB->clipped_elements.data; \ + GLubyte *mask = VB->ClipMask; \ + r128InterpFunc interp = r128ctx->interp; \ + (void) interp; (void) verts; + +#define POSTFIX \ + r128VB->clipped_elements.count = out - r128VB->clipped_elements.data; \ + r128VB->last_vert = next_vert; + + +#define INIT(x) + +#define RENDER_POINTS(start, count) \ +do { \ + GLuint i; \ + for (i = start; i < count; i++) \ + CLIP_POINT(elt[i]); \ +} while (0) + +#define RENDER_LINE(i1, i0) \ +do { \ + CLIP_LINE(elt[i1], elt[i0]); \ +} while (0) + +#define RENDER_TRI(i2, i1, i0, pv, parity) \ +do { \ + GLuint e2 = elt[i2], e1 = elt[i1], e0 = elt[i0]; \ + if (parity) e2 = elt[i1], e1 = elt[i2]; \ + CLIP_TRIANGLE(e2, e1, e0); \ +} while (0) + +#define RENDER_QUAD(i3, i2, i1, i0, pv) \ +do { \ + CLIP_TRIANGLE(elt[i3], elt[i2], elt[i0]); \ + CLIP_TRIANGLE(elt[i2], elt[i1], elt[i0]); \ +} while (0) + +#define TAG(x) r128_clip_##x##_elt +#include "render_tmp.h" + + +/* Pack rgba and/or texture into the remaining half of a 32 byte vertex. + */ +#define CLIP_UBYTE_COLOR 4 +#define CLIP_UBYTE_B 0 +#define CLIP_UBYTE_G 1 +#define CLIP_UBYTE_R 2 +#define CLIP_UBYTE_A 3 +#define CLIP_S0 6 +#define CLIP_T0 7 +#define CLIP_S1 8 +#define CLIP_T1 9 + +#define TYPE (0) +#define TAG(x) x +#include "r128_fasttmp.h" + +#define TYPE (R128_RGBA_BIT) +#define TAG(x) x##_RGBA +#include "r128_fasttmp.h" + +#define TYPE (R128_TEX0_BIT) +#define TAG(x) x##_TEX0 +#include "r128_fasttmp.h" + +#define TYPE (R128_RGBA_BIT | R128_TEX0_BIT) +#define TAG(x) x##_RGBA_TEX0 +#include "r128_fasttmp.h" + +#define TYPE (R128_RGBA_BIT | R128_TEX0_BIT | R128_TEX1_BIT) +#define TAG(x) x##_RGBA_TEX0_TEX1 +#include "r128_fasttmp.h" + +/* This one *could* get away with sneaking TEX1 into the color and + * specular slots, thus fitting inside a cache line. Would be even + * better to switch to a smaller vertex. + */ +#define TYPE (R128_TEX0_BIT | R128_TEX1_BIT) +#define TAG(x) x##_TEX0_TEX1 +#include "r128_fasttmp.h" + + + +/* Render elements directly from original list of vertices. */ +static void r128RenderElementsDirect(struct vertex_buffer *VB) +{ + GLcontext *ctx = VB->ctx; + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + GLenum prim = ctx->CVA.elt_mode; + GLuint nr = VB->EltPtr->count; + render_func func = render_tab_r128_smooth_indirect[prim]; + GLuint p = 0; + + if (r128ctx->dirty) r128UpdateHWState(r128ctx); + + do { + func(VB, 0, nr, 0); + } while (ctx->Driver.MultipassFunc && + ctx->Driver.MultipassFunc(VB, ++p)); +} + +/* Project vertices from clip to device space */ +static void r128ProjectVertices(struct vertex_buffer *VB) +{ + GLcontext *ctx = VB->ctx; + GLmatrix *mat = &ctx->Viewport.WindowMap; + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + r128VertexBufferPtr r128VB = R128_DRIVER_DATA(VB); + GLfloat m[16]; + + m[MAT_SX] = mat->m[MAT_SX]; + m[MAT_TX] = mat->m[MAT_TX]; + m[MAT_SY] = -mat->m[MAT_SY]; + m[MAT_TY] = -mat->m[MAT_TY] + r128ctx->driDrawable->h; + m[MAT_SZ] = mat->m[MAT_SZ]; + m[MAT_TZ] = mat->m[MAT_TZ]; + + switch (ctx->Visual->DepthBits) { + case 16: m[MAT_SZ] /= 65536.0; m[MAT_TZ] /= 65536.0; break; + case 24: m[MAT_SZ] /= 16777216.0; m[MAT_TZ] /= 16777216.0; break; + case 32: m[MAT_SZ] /= 4294967296.0; m[MAT_TZ] /= 4294967296.0; break; + default: m[MAT_SZ] /= 65536.0; m[MAT_TZ] /= 65536.0; break; + } + +#if USE_RHW2 + /* FIXME: Handle RHW2?? */ + gl_project_v16(r128VB->verts[VB->CopyStart].f, + r128VB->verts[r128VB->last_vert].f, + m, + 16 * 4); +#else + gl_project_v16(r128VB->verts[VB->CopyStart].f, + r128VB->verts[r128VB->last_vert].f, + m, + 16 * 4); +#endif +} + +/* Project clipped vertices from clip to device space */ +static void r128ProjectClippedVertices(struct vertex_buffer *VB) +{ + GLcontext *ctx = VB->ctx; + GLmatrix *mat = &ctx->Viewport.WindowMap; + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + r128VertexBufferPtr r128VB = R128_DRIVER_DATA(VB); + GLfloat m[16]; + + m[MAT_SX] = mat->m[MAT_SX]; + m[MAT_TX] = mat->m[MAT_TX]; + m[MAT_SY] = -mat->m[MAT_SY]; + m[MAT_TY] = -mat->m[MAT_TY] + r128ctx->driDrawable->h; + m[MAT_SZ] = mat->m[MAT_SZ]; + m[MAT_TZ] = mat->m[MAT_TZ]; + + switch (ctx->Visual->DepthBits) { + case 16: m[MAT_SZ] /= 65536.0; m[MAT_TZ] /= 65536.0; break; + case 24: m[MAT_SZ] /= 16777216.0; m[MAT_TZ] /= 16777216.0; break; + case 32: m[MAT_SZ] /= 4294967296.0; m[MAT_TZ] /= 4294967296.0; break; + default: m[MAT_SZ] /= 65536.0; m[MAT_TZ] /= 65536.0; break; + } + +#if USE_RHW2 + /* FIXME: Handle RHW2?? */ + gl_project_clipped_v16(r128VB->verts[VB->CopyStart].f, + r128VB->verts[r128VB->last_vert].f, + m, + 16 * 4, + VB->ClipMask + VB->CopyStart); +#else + gl_project_clipped_v16(r128VB->verts[VB->CopyStart].f, + r128VB->verts[r128VB->last_vert].f, + m, + 16 * 4, + VB->ClipMask + VB->CopyStart); +#endif +} + +static r128FastPathTable r128FastTab[0x80]; + +/* Initialize the table of fast path support functions */ +void r128FastPathInit(void) +{ + r128_clip_render_init_elt(); + render_init_r128_smooth_indirect(); + + r128_init_fastpath(&r128FastTab[0]); + r128_init_fastpath_RGBA(&r128FastTab[R128_RGBA_BIT]); + r128_init_fastpath_TEX0(&r128FastTab[R128_TEX0_BIT]); + r128_init_fastpath_RGBA_TEX0(&r128FastTab[R128_RGBA_BIT|R128_TEX0_BIT]); + r128_init_fastpath_TEX0_TEX1(&r128FastTab[R128_TEX0_BIT|R128_TEX1_BIT]); + r128_init_fastpath_RGBA_TEX0_TEX1(&r128FastTab[R128_RGBA_BIT|R128_TEX0_BIT| + R128_TEX1_BIT]); +} + +#define VALID_SETUP (R128_RGBA_BIT | R128_TEX0_BIT | R128_TEX1_BIT) + +void r128FastPath(struct vertex_buffer *VB) +{ + GLcontext *ctx = VB->ctx; + GLenum prim = ctx->CVA.elt_mode; + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + r128FastPathTable *tab = &r128FastTab[r128ctx->SetupIndex & VALID_SETUP]; + GLuint do_cliptest = 1; + + gl_prepare_arrays_cva(VB); /* still need this */ + + /* Reserve enough space for the pathological case */ + if (VB->EltPtr->count * 12 > R128_DRIVER_DATA(VB)->size) { + r128ResizeVB(VB, VB->EltPtr->count * 12); + do_cliptest = 1; + } + + tab->build_vertices(VB, do_cliptest); /* object->clip space */ + + if (r128ctx->dirty) r128UpdateHWState(r128ctx); + + if (VB->ClipOrMask) { + if (!VB->ClipAndMask) { + render_func *clip = r128_clip_render_tab_elt; + + r128ctx->interp = tab->interp; + clip[prim](VB, 0, VB->EltPtr->count, 0); /* build new elts */ + ctx->CVA.elt_mode = gl_reduce_prim[prim]; + VB->EltPtr = &(R128_DRIVER_DATA(VB)->clipped_elements); + r128ProjectClippedVertices(VB); /* clip->device space */ + r128RenderElementsDirect(VB); /* render using new list */ + } + } else { + r128ProjectVertices(VB); /* clip->device space */ + r128RenderElementsDirect(VB); /* render using orig list */ + } + + /* This indicates that there is no cached data to reuse */ + VB->pipeline->data_valid = 0; + VB->pipeline->new_state = 0; +} diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_fastpath.h b/xc/lib/GL/mesa/src/drv/r128/r128_fastpath.h new file mode 100644 index 000000000..47bb92049 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_fastpath.h @@ -0,0 +1,48 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#ifndef _R128_FASTPATH_H_ +#define _R128_FASTPATH_H_ + +typedef void (*r128BuildVerticesFunc)(struct vertex_buffer *VB, + GLuint do_cliptest); +typedef void (*r128InterpFunc)(GLfloat t, + GLfloat *result, + const GLfloat *in, + const GLfloat *out); + +extern void r128FastPathInit(void); +extern void r128FastPath(struct vertex_buffer *VB); + +#endif /* _R128_FASTPATH_H_ */ diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_fasttmp.h b/xc/lib/GL/mesa/src/drv/r128/r128_fasttmp.h new file mode 100644 index 000000000..e76dd52b4 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_fasttmp.h @@ -0,0 +1,155 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +/* FIXME: These routines were copied from the i810 driver, and were only + slightly modified for the Rage 128. They still need to be optmizied + and cleaned up. Also, support for USE_RHW2 needs to be added. */ + +/* The first part of setup is applied to all vertices, clipped or + * unclipped. This data w!ill be used for clipping, and then all + * vertices with a zero clipmask will be projected to device space. + * + * This could be split into several loops, but - it seems that the + * large stride of the fxVertices makes cache issues the big + * performance factor, and that multiple loops mean multiple cache + * misses.... + */ +static void TAG(r128_setup_full)(struct vertex_buffer *VB, GLuint do_cliptest) +{ + GLcontext *ctx = VB->ctx; + r128VertexBufferPtr r128VB = R128_DRIVER_DATA(VB); + const GLfloat *m = ctx->ModelProjectMatrix.m; + GLuint start = VB->CopyStart; + GLuint count = VB->Count; + GLuint i; + + gl_xform_points3_v16_general(r128VB->verts[start].f, + m, + VB->ObjPtr->start, + VB->ObjPtr->stride, + count - start); + + if (do_cliptest) { + VB->ClipAndMask = ~0; + VB->ClipOrMask = 0; + gl_cliptest_points4_v16(r128VB->verts[start].f, + r128VB->verts[count].f, + &(VB->ClipOrMask), + &(VB->ClipAndMask), + VB->ClipMask + start); + } + + /* These branches are all resolved at compile time. Hopefully all + * the pointers are valid addresses even when not enabled. + */ + if (TYPE) { + GLubyte *color = VB->ColorPtr->start; + GLfloat *tex0_data = VB->TexCoordPtr[0]->start; + GLfloat *tex1_data = VB->TexCoordPtr[1]->start; + + GLuint color_stride = VB->ColorPtr->stride; + GLuint tex0_stride = VB->TexCoordPtr[0]->stride; + GLuint tex1_stride = VB->TexCoordPtr[1]->stride; + + GLfloat *f = r128VB->verts[start].f; + + for (i = start ; i < count ; i++, f += 16) { + if (TYPE & R128_RGBA_BIT) { + GLubyte *b = (GLubyte *)&f[CLIP_UBYTE_COLOR]; + GLubyte *col = color; color += color_stride; + b[CLIP_UBYTE_R] = col[0]; + b[CLIP_UBYTE_G] = col[1]; + b[CLIP_UBYTE_B] = col[2]; + b[CLIP_UBYTE_A] = col[3]; + } + if (TYPE & R128_TEX0_BIT) { + f[CLIP_S0] = tex0_data[0]; + f[CLIP_T0] = tex0_data[1]; + STRIDE_F(tex0_data, tex0_stride); + } + if (TYPE & R128_TEX1_BIT) { + f[CLIP_S1] = tex1_data[0]; + f[CLIP_T1] = tex1_data[1]; + STRIDE_F(tex1_data, tex1_stride); + } + } + } + + r128VB->clipped_elements.count = start; + r128VB->last_vert = count; +} + + +/* Changed to just put the interp func instead of the whole clip + * routine into the header. Less code and better chance of doing some + * of this stuff in assembly. + */ +static void TAG(r128_interp_vert)(GLfloat t, + GLfloat *O, + const GLfloat *I, + const GLfloat *J) +{ + O[0] = LINTERP(t, I[0], J[0]); + O[1] = LINTERP(t, I[1], J[1]); + O[2] = LINTERP(t, I[2], J[2]); + O[3] = LINTERP(t, I[3], J[3]); + + if (TYPE & R128_RGBA_BIT) { + INTERP_RGBA(t, + ((GLubyte *)&(O[4])), + ((GLubyte *)&(I[4])), + ((GLubyte *)&(J[4]))); + } + + if (TYPE & R128_TEX0_BIT) { + O[6] = LINTERP(t, I[6], J[6]); + O[7] = LINTERP(t, I[7], J[7]); + } + + if (TYPE & R128_TEX1_BIT) { + O[8] = LINTERP(t, I[8], J[8]); + O[9] = LINTERP(t, I[9], J[9]); + } +} + + +static void TAG(r128_init_fastpath)(r128FastPathTable *tab) +{ + tab->build_vertices = TAG(r128_setup_full); + tab->interp = TAG(r128_interp_vert); +} + +#undef TYPE +#undef TAG +#undef SIZE diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_init.h b/xc/lib/GL/mesa/src/drv/r128/r128_init.h new file mode 100644 index 000000000..fcaf70a51 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_init.h @@ -0,0 +1,92 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#ifndef _R128_INIT_H_ +#define _R128_INIT_H_ + +#ifdef GLX_DIRECT_RENDERING + +#include <X11/Xlibint.h> + +#include "types.h" +#include "xf86drm.h" +#include "dri_tmm.h" +#include "dri_mesaint.h" + +#include "r128_screen.h" +#include "r128_context.h" + +/* NOTE: The vertex buffer code is currently unstable because of the + switches between CCE and MMIO mode in the X server. Fixing the X + server to use the CCE should fix this problem. So, for now, it is + recommended that you do not use it. */ + +#define DEBUG 1 +#define DEBUG_LOCKING 1 +#define USE_FAST_PATH 1 +#define USE_USER_SPACE_RING 0 + + +#if DEBUG + +#include <stdio.h> +#define R128_DEBUG(p) \ + do { \ + printf p ; \ + fflush(stdout); \ + } while (0) + +extern int R128_DEBUG_FLAGS; + +#define DEBUG_VERBOSE_2D 0x0001 +#define DEBUG_VERBOSE_CCE 0x0008 +#define DEBUG_VERBOSE_OUTREG 0x0010 +#define DEBUG_ALWAYS_SYNC 0x0040 +#define DEBUG_VERBOSE_MSG 0x0080 +#define DEBUG_NO_OUTRING 0x0100 +#define DEBUG_NO_OUTREG 0x0200 +#define DEBUG_VERBOSE_API 0x0400 +#define DEBUG_VALIDATE_RING 0x0800 +#define DEBUG_VERBOSE_LRU 0x1000 +#define DEBUG_VERBOSE_DRI 0x2000 +#define DEBUG_VERBOSE_IOCTL 0x4000 + +#else + +#define R128_DEBUG_FLAGS 0 + +#endif + +#endif +#endif /* _R128_INIT_H_ */ diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_lock.h b/xc/lib/GL/mesa/src/drv/r128/r128_lock.h new file mode 100644 index 000000000..7fd81f807 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_lock.h @@ -0,0 +1,134 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#ifndef _R128_LOCK_H_ +#define _R128_LOCK_H_ + +#ifdef GLX_DIRECT_RENDERING + +/* Turn DEBUG_LOCKING on to find locking conflicts (see r128_init.h) */ +#if DEBUG_LOCKING +extern char *prevLockFile; +extern int prevLockLine; + +#define DEBUG_LOCK() \ + do { \ + prevLockFile = (__FILE__); \ + prevLockLine = (__LINE__); \ + } while (0) + +#define DEBUG_RESET() \ + do { \ + prevLockFile = 0; \ + prevLockLine = 0; \ + } while (0) + +#define DEBUG_CHECK_LOCK() \ + do { \ + if (prevLockFile) { \ + fprintf(stderr, \ + "LOCK SET!\n\tPrevious %s:%d\n\tCurrent: %s:%d\n", \ + prevLockFile, prevLockLine, __FILE__, __LINE__); \ + exit(1); \ + } \ + } while (0) + +#else + +#define DEBUG_LOCK() +#define DEBUG_RESET() +#define DEBUG_CHECK_LOCK() + +#endif + +/* + * !!! We may want to separate locks from locks with validation. This + * could be used to improve performance for those things commands that + * do not do any drawing !!! + */ + +/* Lock the hardware using the current context */ +#define LOCK_HARDWARE(CC) \ + do { \ + char __ret = 0; \ + __DRIcontextPrivate *cPriv = CC->driContext; \ + __DRIscreenPrivate *sPriv = CC->r128Screen->driScreen; \ + \ + DEBUG_CHECK_LOCK(); \ + DRM_CAS(&sPriv->pSAREA->lock, cPriv->hHWContext, \ + DRM_LOCK_HELD|cPriv->hHWContext, __ret); \ + if (__ret) { \ + /* We lost the context, so we need to request the lock from \ + the kernel and update our state. */ \ + drmGetLock(sPriv->fd, cPriv->hHWContext, 0); \ + XMesaUpdateState(cPriv); \ + } \ + DEBUG_LOCK(); \ + } while (0) + +/* Unlock the hardware using the current context */ +#define UNLOCK_HARDWARE(CC) \ + do { \ + __DRIcontextPrivate *cPriv = CC->driContext; \ + __DRIscreenPrivate *sPriv = CC->r128Screen->driScreen; \ + \ + DRM_UNLOCK(sPriv->fd, &sPriv->pSAREA->lock, cPriv->hHWContext); \ + DEBUG_RESET(); \ + } while (0) + +/* + * This pair of macros makes a loop over the drawing operations, so it + * is not self contained and does not have the nice single statement + * semantics of most macros. + */ +#define BEGIN_CLIP_LOOP(CC) \ + do { \ + __DRIdrawablePrivate *_dPriv = CC->driDrawable; \ + XF86DRIClipRectPtr _pc = _dPriv->pClipRects; \ + int _nc, _sc; \ + \ + for (_nc = _dPriv->numClipRects; _nc > 0; _nc -= 3, _pc += 3) { \ + _sc = (_nc <= 3) ? _nc : 3; \ + r128SetClipRects(CC, _pc, _sc) + +/* FIXME: This should be a function call to turn off aux clipping */ +#define END_CLIP_LOOP(CC) \ + R128CCE0(R128_CCE_PACKET0, R128_AUX_SC_CNTL, 0); \ + R128CCE(0x00000000); \ + R128CCE_SUBMIT_PACKETS(); \ + } \ + } while (0) + +#endif +#endif /* _R128_LOCK_H_ */ diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_mesa.h b/xc/lib/GL/mesa/src/drv/r128/r128_mesa.h new file mode 100644 index 000000000..3a697b466 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_mesa.h @@ -0,0 +1,43 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#ifndef _R128_MESA_H_ +#define _R128_MESA_H_ + +#ifdef GLX_DIRECT_RENDERING + +#define R128_CONTEXT(ctx) ((r128ContextPtr)(ctx->DriverCtx)) + +#endif +#endif /* _R128_MESA_H_ */ diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_pipeline.c b/xc/lib/GL/mesa/src/drv/r128/r128_pipeline.c new file mode 100644 index 000000000..55487ffcd --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_pipeline.c @@ -0,0 +1,126 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#include "r128_init.h" +#include "r128_mesa.h" +#include "r128_vb.h" +#include "r128_fastpath.h" +#include "r128_pipeline.h" + +#include "types.h" + +static struct gl_pipeline_stage r128FastStage = { + "R128 Fast Path", + (PIPE_OP_VERT_XFORM | + PIPE_OP_RAST_SETUP_0 | + PIPE_OP_RAST_SETUP_1 | + PIPE_OP_RENDER), + PIPE_PRECALC, + 0, 0, 0, 0, 0, 0, 0, 0, 0, + r128FastPath +}; + +/* Build the PRECALC pipeline with our stage, if possible. Otherwise, + return GL_FALSE */ +GLboolean r128DDBuildPrecalcPipeline(GLcontext *ctx) +{ +#if USE_FAST_PATH + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + struct gl_pipeline *pipe = &ctx->CVA.pre; + + if (r128ctx->RenderIndex == 0 && + !(ctx->Enabled & (TEXTURE0_3D | + TEXTURE1_3D | + ENABLE_TEXMAT0 | + ENABLE_TEXMAT1 | + ENABLE_TEXGEN0 | + ENABLE_TEXGEN1 | + ENABLE_USERCLIP | + ENABLE_LIGHT | + ENABLE_FOG)) && + (ctx->Array.Flags & (VERT_OBJ_234 | + VERT_TEX0_4 | + VERT_TEX1_4 | + VERT_ELT)) == (VERT_OBJ_23 | + VERT_ELT)) { + pipe->stages[0] = &r128FastStage; + pipe->stages[1] = 0; + pipe->new_inputs = ctx->RenderFlags & VERT_DATA; + pipe->ops = pipe->stages[0]->ops; + + r128ctx->useFastPath = GL_TRUE; + return GL_TRUE; + } + + if (r128ctx->useFastPath) { + r128ctx->useFastPath = GL_FALSE; + + ctx->CVA.VB->ClipOrMask = 0; + ctx->CVA.VB->ClipAndMask = CLIP_ALL_BITS; + ctx->Array.NewArrayState |= ctx->Array.Summary; + } +#endif + + return GL_FALSE; +} + +/* Register the pipeline with our stages included */ +GLuint r128RegisterPipelineStages(struct gl_pipeline_stage *out, + const struct gl_pipeline_stage *in, + GLuint nr) +{ +#if USE_FAST_PATH + int i; + + for (i = 0; i < nr; i++) { + out[i] = in[i]; + switch (in[i].ops) { + case PIPE_OP_RAST_SETUP_0: + out[i].cva_state_change = (NEW_LIGHTING | + NEW_TEXTURING | + NEW_RASTER_OPS); + out[i].state_change = ~0; + out[i].check = r128CheckPartialRasterSetup; + out[i].run = r128PartialRasterSetup; + break; + + case PIPE_OP_RAST_SETUP_0|PIPE_OP_RAST_SETUP_1: + out[i].run = r128DoRasterSetup; + break; + } + } +#endif + + return nr; +} diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_pipeline.h b/xc/lib/GL/mesa/src/drv/r128/r128_pipeline.h new file mode 100644 index 000000000..280e6b943 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_pipeline.h @@ -0,0 +1,43 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#ifndef _R128_PIPELINE_H_ +#define _R128_PIPELINE_H_ + +extern GLboolean r128DDBuildPrecalcPipeline(GLcontext *ctx); +extern GLuint r128RegisterPipelineStages(struct gl_pipeline_stage *out, + const struct gl_pipeline_stage *in, + GLuint nr); + +#endif /* _R128_PIPELINE_H_ */ diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_screen.c b/xc/lib/GL/mesa/src/drv/r128/r128_screen.c new file mode 100644 index 000000000..b385271f4 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_screen.c @@ -0,0 +1,258 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#include "r128_dri.h" +#include "r128_reg.h" + +#include "r128_init.h" +#include "r128_context.h" +#include "r128_xmesa.h" +#include "r128_cce.h" +#include "r128_tris.h" +#include "r128_vb.h" +#include "r128_fastpath.h" + +#include <sys/mman.h> + +/* Create the device specific screen private data struct */ +r128ScreenPtr r128CreateScreen(__DRIscreenPrivate *sPriv) +{ + r128ScreenPtr r128Screen; + R128DRIPtr r128DRIPriv = (R128DRIPtr)sPriv->pDevPriv; + + /* Allocate the private area */ + r128Screen = (r128ScreenPtr)Xmalloc(sizeof(*r128Screen)); + if (!r128Screen) return NULL; + + /* This is first since which regions we map depends on whether or + not we are using a PCI card */ + r128Screen->IsPCI = r128DRIPriv->IsPCI; + + r128Screen->mmioRgn.handle = r128DRIPriv->registerHandle; + r128Screen->mmioRgn.size = r128DRIPriv->registerSize; + if (drmMap(sPriv->fd, + r128Screen->mmioRgn.handle, + r128Screen->mmioRgn.size, + (drmAddressPtr)&r128Screen->mmio)) { + Xfree(r128Screen); + return NULL; + } + + if (!r128Screen->IsPCI) { + r128Screen->ringRgn.handle = r128DRIPriv->ringHandle; + r128Screen->ringRgn.size = r128DRIPriv->ringMapSize; + if (drmMap(sPriv->fd, + r128Screen->ringRgn.handle, + r128Screen->ringRgn.size, + (drmAddressPtr)&r128Screen->ring)) { + drmUnmap((drmAddress)r128Screen->mmio, r128Screen->mmioRgn.size); + Xfree(r128Screen); + return NULL; + } + + r128Screen->ringReadRgn.handle = r128DRIPriv->ringReadPtrHandle; + r128Screen->ringReadRgn.size = r128DRIPriv->ringReadMapSize; + if (drmMap(sPriv->fd, + r128Screen->ringReadRgn.handle, + r128Screen->ringReadRgn.size, + (drmAddressPtr)&r128Screen->ringReadPtr)) { + drmUnmap((drmAddress)r128Screen->ring, r128Screen->ringRgn.size); + drmUnmap((drmAddress)r128Screen->mmio, r128Screen->mmioRgn.size); + Xfree(r128Screen); + return NULL; + } + + r128Screen->vbRgn.handle = r128DRIPriv->vbHandle; + r128Screen->vbRgn.size = r128DRIPriv->vbMapSize; + r128Screen->vbOffset = r128DRIPriv->vbOffset; + if (drmMap(sPriv->fd, + r128Screen->vbRgn.handle, + r128Screen->vbRgn.size, + (drmAddressPtr)&r128Screen->vb)) { + drmUnmap((drmAddress)r128Screen->ringReadPtr, + r128Screen->ringReadRgn.size); + drmUnmap((drmAddress)r128Screen->ring, r128Screen->ringRgn.size); + drmUnmap((drmAddress)r128Screen->mmio, r128Screen->mmioRgn.size); + Xfree(r128Screen); + return NULL; + } + r128Screen->vbOffset = r128DRIPriv->vbOffset; + r128Screen->vbBufSize = r128DRIPriv->vbBufSize; + + r128Screen->indRgn.handle = r128DRIPriv->indHandle; + r128Screen->indRgn.size = r128DRIPriv->indMapSize; + if (drmMap(sPriv->fd, + r128Screen->indRgn.handle, + r128Screen->indRgn.size, + (drmAddressPtr)&r128Screen->ind)) { + drmUnmap((drmAddress)r128Screen->vb, r128Screen->vbRgn.size); + drmUnmap((drmAddress)r128Screen->ringReadPtr, + r128Screen->ringReadRgn.size); + drmUnmap((drmAddress)r128Screen->ring, r128Screen->ringRgn.size); + drmUnmap((drmAddress)r128Screen->mmio, r128Screen->mmioRgn.size); + Xfree(r128Screen); + return NULL; + } + + r128Screen->agpTexRgn.handle = r128DRIPriv->agpTexHandle; + r128Screen->agpTexRgn.size = r128DRIPriv->agpTexMapSize; + if (drmMap(sPriv->fd, + r128Screen->agpTexRgn.handle, + r128Screen->agpTexRgn.size, + (drmAddressPtr)&r128Screen->agpTex)) { + drmUnmap((drmAddress)r128Screen->ind, r128Screen->indRgn.size); + drmUnmap((drmAddress)r128Screen->vb, r128Screen->vbRgn.size); + drmUnmap((drmAddress)r128Screen->ringReadPtr, + r128Screen->ringReadRgn.size); + drmUnmap((drmAddress)r128Screen->ring, r128Screen->ringRgn.size); + drmUnmap((drmAddress)r128Screen->mmio, r128Screen->mmioRgn.size); + Xfree(r128Screen); + return NULL; + } + r128Screen->agpTexOffset = r128DRIPriv->agpTexOffset; + + if (!(r128Screen->vbBufs = drmMapBufs(sPriv->fd))) { + drmUnmap((drmAddress)r128Screen->agpTex, + r128Screen->agpTexRgn.size); + drmUnmap((drmAddress)r128Screen->ind, r128Screen->indRgn.size); + drmUnmap((drmAddress)r128Screen->vb, r128Screen->vbRgn.size); + drmUnmap((drmAddress)r128Screen->ringReadPtr, + r128Screen->ringReadRgn.size); + drmUnmap((drmAddress)r128Screen->ring, r128Screen->ringRgn.size); + drmUnmap((drmAddress)r128Screen->mmio, r128Screen->mmioRgn.size); + Xfree(r128Screen); + return NULL; + } + } + + r128Screen->deviceID = r128DRIPriv->deviceID; + + r128Screen->width = r128DRIPriv->width; + r128Screen->height = r128DRIPriv->height; + r128Screen->depth = r128DRIPriv->depth; + r128Screen->bpp = r128DRIPriv->bpp; + r128Screen->pixel_code = (r128Screen->bpp != 16 ? + r128Screen->bpp : + r128Screen->depth); + + r128Screen->fb = sPriv->pFB; + r128Screen->fbOffset = sPriv->fbOrigin; + r128Screen->fbStride = sPriv->fbStride; + r128Screen->fbSize = sPriv->fbSize; + + r128Screen->fbX = r128DRIPriv->fbX; + r128Screen->fbY = r128DRIPriv->fbY; + r128Screen->backX = r128DRIPriv->backX; + r128Screen->backY = r128DRIPriv->backY; + r128Screen->depthX = r128DRIPriv->depthX; + r128Screen->depthY = r128DRIPriv->depthY; + + r128Screen->texOffset[R128_LOCAL_TEX_HEAP] = (r128DRIPriv->textureY * + r128Screen->fbStride + + r128DRIPriv->textureX * + (r128Screen->bpp/8)); + r128Screen->texSize[R128_LOCAL_TEX_HEAP] = r128DRIPriv->textureSize; + r128Screen->log2TexGran[R128_LOCAL_TEX_HEAP] = r128DRIPriv->log2TexGran; + + if (r128Screen->IsPCI) { + r128Screen->texOffset[R128_AGP_TEX_HEAP] = 0; + r128Screen->texSize[R128_AGP_TEX_HEAP] = 0; + r128Screen->log2TexGran[R128_AGP_TEX_HEAP] = 0; + r128Screen->NRTexHeaps = R128_NR_TEX_HEAPS-1; + } else { + r128Screen->texOffset[R128_AGP_TEX_HEAP] = 0; + r128Screen->texSize[R128_AGP_TEX_HEAP] = + r128DRIPriv->agpTexMapSize; + r128Screen->log2TexGran[R128_AGP_TEX_HEAP] = + r128DRIPriv->log2AGPTexGran; + r128Screen->NRTexHeaps = R128_NR_TEX_HEAPS; + } + +#if 1 + /* FIXME: For testing only */ + if (getenv("LIBGL_SHOW_BUFFERS")) { + r128Screen->backX = 0; + r128Screen->backY = r128DRIPriv->height/2; + r128Screen->depthX = r128DRIPriv->width/2; + r128Screen->depthY = r128DRIPriv->height/2; + } +#endif + + r128Screen->CCEMode = r128DRIPriv->CCEMode; + r128Screen->CCEFifoSize = r128DRIPriv->CCEFifoSize; + + r128Screen->ringEntries = r128DRIPriv->ringSize/sizeof(CARD32); + if (!r128Screen->IsPCI) { + r128Screen->ringStartPtr = (int *)r128Screen->ring; + r128Screen->ringEndPtr = (int *)(r128Screen->ring + + r128DRIPriv->ringSize); + } + + r128Screen->MMIOFifoSlots = 0; + r128Screen->CCEFifoSlots = 0; + + r128Screen->CCEFifoAddr = R128_PM4_FIFO_DATA_EVEN; + + r128Screen->SAREA = (R128SAREAPrivPtr)((char *)sPriv->pSAREA + + sizeof(XF86DRISAREARec)); + + r128Screen->driScreen = sPriv; + + r128FastPathInit(); + r128TriangleFuncsInit(); + r128SetupInit(); + + return r128Screen; +} + +/* Destroy the device specific screen private data struct */ +void r128DestroyScreen(__DRIscreenPrivate *sPriv) +{ + r128ScreenPtr r128Screen = (r128ScreenPtr)sPriv->private; + + if (!r128Screen->IsPCI) { + drmUnmapBufs(r128Screen->vbBufs); + + drmUnmap((drmAddress)r128Screen->agpTex, r128Screen->agpTexRgn.size); + drmUnmap((drmAddress)r128Screen->ind, r128Screen->indRgn.size); + drmUnmap((drmAddress)r128Screen->vb, r128Screen->vbRgn.size); + drmUnmap((drmAddress)r128Screen->ringReadPtr, + r128Screen->ringReadRgn.size); + drmUnmap((drmAddress)r128Screen->ring, r128Screen->ringRgn.size); + } + drmUnmap((drmAddress)r128Screen->mmio, r128Screen->mmioRgn.size); + + Xfree(r128Screen); + sPriv->private = NULL; +} diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_screen.h b/xc/lib/GL/mesa/src/drv/r128/r128_screen.h new file mode 100644 index 000000000..02deb64e9 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_screen.h @@ -0,0 +1,129 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#ifndef _R128_SCREEN_H_ +#define _R128_SCREEN_H_ + +#ifdef GLX_DIRECT_RENDERING + +#include "r128_sarea.h" + +typedef struct { + drmHandle handle; /* Handle to the DRM region */ + drmSize size; /* Size of the DRM region */ +} r128RegionRec, *r128RegionPtr; + +typedef struct { + /* MMIO register data */ + r128RegionRec mmioRgn; + unsigned char *mmio; + + /* CCE ring buffer data */ + r128RegionRec ringRgn; + unsigned char *ring; + + /* CCE ring read pointer data */ + r128RegionRec ringReadRgn; + + /* CCE vertex buffer data */ + r128RegionRec vbRgn; + unsigned char *vb; + int vbOffset; + int vbBufSize; + drmBufMapPtr vbBufs; + + /* CCE indirect buffer data */ + r128RegionRec indRgn; + unsigned char *ind; + + /* CCE AGP Texture data */ + r128RegionRec agpTexRgn; + unsigned char *agpTex; + int agpTexOffset; + + /* Frame buffer data */ + unsigned char *fb; + unsigned long fbOffset; + int fbStride; + int fbSize; + + int IsPCI; /* Current card is a PCI card */ + + int CCEMode; /* CCE mode that server/clients use */ + int CCEFifoSize; /* Size of the CCE command FIFO */ + + /* CCE ring buffer data */ + int ringEntries; + + volatile int *ringReadPtr; /* Pointer to current read addr */ + int *ringStartPtr; /* Pointer to end of ring buffer */ + int *ringEndPtr; /* Pointer to end of ring buffer */ + + /* DRI screen private data */ + int deviceID; /* PCI device ID */ + int width; /* Width in pixels of display */ + int height; /* Height in scanlines of display */ + int depth; /* Depth of display (8, 15, 16, 24) */ + int bpp; /* Bit depth of disp (8, 16, 24, 32) */ + int pixel_code; /* 8, 15, 16, 24, 32 */ + + int fbX; /* Start of frame buffer */ + int fbY; + int backX; /* Start of shared back buffer */ + int backY; + int depthX; /* Start of shared depth buffer */ + int depthY; + + /* Shared texture data */ + int NRTexHeaps; + int texOffset[R128_NR_TEX_HEAPS]; + int texSize[R128_NR_TEX_HEAPS]; + int log2TexGran[R128_NR_TEX_HEAPS]; + + int MMIOFifoSlots; /* Free slots in the FIFO (64 max) */ + int CCEFifoSlots; /* Free slots in the CCE FIFO */ + + int CCEFifoAddr; /* MMIO offset to write next CCE + value (only used when CCE is + in PIO mode). */ + R128SAREAPrivPtr SAREA; /* Pointer to SAREA private data */ + + __DRIscreenPrivate *driScreen; +} r128ScreenRec, *r128ScreenPtr; + +r128ScreenPtr r128CreateScreen(__DRIscreenPrivate *sPriv); +void r128DestroyScreen(__DRIscreenPrivate *sPriv); + +#endif +#endif /* _R128_SCREEN_H_ */ diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_span.c b/xc/lib/GL/mesa/src/drv/r128/r128_span.c new file mode 100644 index 000000000..b5d1774fd --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_span.c @@ -0,0 +1,329 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * Keith Whitwell <keith@precisioninsight.com> + * Gareth Hughes <gareth@precisioninsight.com> + * + */ + +#include "r128_init.h" +#include "r128_mesa.h" +#include "r128_xmesa.h" +#include "r128_context.h" +#include "r128_lock.h" +#include "r128_state.h" +#include "r128_reg.h" +#include "r128_cce.h" +#include "r128_span.h" + +#define DBG 0 + +#define LOCAL_VARS \ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); \ + r128ScreenPtr r128scrn = r128ctx->r128Screen; \ + __DRIdrawablePrivate *dPriv = r128ctx->driDrawable; \ + GLuint pitch = r128scrn->fbStride; \ + GLuint height = dPriv->h; \ + char *buf = (char *)(r128scrn->fb + \ + (r128ctx->drawX + dPriv->x) * (r128scrn->bpp/8) + \ + (r128ctx->drawY + dPriv->y) * pitch); \ + char *read_buf = (char *)(r128scrn->fb + \ + (r128ctx->readX + dPriv->x) * (r128scrn->bpp/8)+\ + (r128ctx->readY + dPriv->y) * pitch); \ + GLushort p; \ + (void) read_buf; (void) buf; (void) p + +#define LOCAL_DEPTH_VARS \ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); \ + r128ScreenPtr r128scrn = r128ctx->r128Screen; \ + __DRIdrawablePrivate *dPriv = r128ctx->driDrawable; \ + GLuint pitch = r128scrn->fbStride; \ + GLuint height = dPriv->h; \ + char *buf = (char *)(r128scrn->fb + \ + (r128scrn->depthX + dPriv->x) * (r128scrn->bpp/8) + \ + (r128scrn->depthY + dPriv->y) * pitch); \ + (void) buf + +#define INIT_MONO_PIXEL(p) \ + p = R128_CONTEXT(ctx)->Color + +#define CLIPPIXEL(_x, _y) \ + ((_x >= minx) && (_x < maxx) && (_y >= miny) && (_y < maxy)) + + +#define CLIPSPAN(_x, _y, _n, _x1, _n1, _i) \ + if (( _y < miny) || (_y >= maxy)) { \ + _n1 = 0, _x1 = x; \ + } else { \ + _n1 = _n; \ + _x1 = _x; \ + if (_x1 < minx) _i += (minx - _x1), _x1 = minx; \ + if (_x1 + _n1 >= maxx) n1 -= (_x1 + n1 - maxx) + 1; \ + } + +#define Y_FLIP(_y) (height - _y - 1) + + +#define HW_LOCK() \ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); \ + LOCK_HARDWARE(r128ctx); \ + R128CCE_WAIT_FOR_IDLE(r128ctx); + +#define HW_CLIPLOOP() \ + do { \ + __DRIdrawablePrivate *dPriv = r128ctx->driDrawable; \ + int _nc = dPriv->numClipRects; \ + \ + while (_nc--) { \ + int minx = dPriv->pClipRects[_nc].x1 - dPriv->x; \ + int miny = dPriv->pClipRects[_nc].y1 - dPriv->y; \ + int maxx = dPriv->pClipRects[_nc].x2 - dPriv->x; \ + int maxy = dPriv->pClipRects[_nc].y2 - dPriv->y; + +#define HW_ENDCLIPLOOP() \ + } \ + } while (0) + +#define HW_UNLOCK() \ + UNLOCK_HARDWARE(r128ctx) + + + +/* 16 bit, RGB565 color spanline and pixel functions */ +#define WRITE_RGBA(_x, _y, r, g, b, a) \ + *(GLushort *)(buf + _x*2 + _y*pitch) = ((((int)r & 0xf8) << 8) | \ + (((int)g & 0xfc) << 3) | \ + (((int)b & 0xf8) >> 3) ) + +#define WRITE_PIXEL(_x, _y, p) \ + *(GLushort *)(buf + _x*2 + _y*pitch) = p + +#define READ_RGBA(rgba, _x, _y) \ + do { \ + GLushort p = *(GLushort *)(read_buf + _x*2 + _y*pitch); \ + rgba[0] = (p >> 8) & 0xf8; \ + rgba[1] = (p >> 3) & 0xfc; \ + rgba[2] = (p << 3) & 0xf8; \ + rgba[3] = 0xff; \ + } while (0) + +#define TAG(x) r128##x##_RGB565 +#include "spantmp.h" + + + +/* 15 bit, ARGB1555 color spanline and pixel functions */ +#define WRITE_RGBA(_x, _y, r, g, b, a) \ + *(GLushort *)(buf + _x*2 + _y*pitch) = (((r & 0xf8) << 7) | \ + ((g & 0xf8) << 2) | \ + ((b & 0xf8) >> 3) | \ + ((a) ? 0x8000 : 0)) + +#define WRITE_PIXEL(_x, _y, p) \ + *(GLushort *)(buf + _x*2 + _y*pitch) = p + +#define READ_RGBA(rgba, _x, _y) \ + do { \ + GLushort p = *(GLushort *)(read_buf + _x*2 + _y*pitch); \ + rgba[0] = (p >> 7) & 0xf8; \ + rgba[1] = (p >> 2) & 0xf8; \ + rgba[2] = (p << 3) & 0xf8; \ + rgba[3] = (p & 0x8000) ? 0xff : 0; \ + } while (0) + +#define TAG(x) r128##x##_ARGB1555 +#include "spantmp.h" + + + +/* 16 bit depthbuffer functions */ +#define WRITE_DEPTH(_x, _y, d) \ + *(GLdepth *)(buf + _x*2 + _y*pitch) = d + +#define READ_DEPTH(d, _x, _y) \ + d = *(GLdepth *)(buf + _x*2 + _y*pitch) + +#define TAG(x) r128##x##_16 +#include "depthtmp.h" + + + +/* 24 bit, RGB888 color spanline and pixel functions */ +#define WRITE_RGBA(_x, _y, r, g, b, a) \ + *(GLuint *)(buf + _x*3 + _y*pitch) = ((r << 16) | \ + (g << 8) | \ + (b << 0)) + +#define WRITE_PIXEL(_x, _y, p) \ + *(GLuint *)(buf + _x*3 + _y*pitch) = p + +#define READ_RGBA(rgba, _x, _y) \ + do { \ + GLuint p = *(GLuint *)(read_buf + _x*3 + _y*pitch); \ + rgba[0] = (p >> 16) & 0xff; \ + rgba[1] = (p >> 8) & 0xff; \ + rgba[2] = (p >> 0) & 0xff; \ + rgba[3] = 0xff; \ + } while (0) + +#define TAG(x) r128##x##_RGB888 +#include "spantmp.h" + + + +/* 24 bit depthbuffer functions */ +#define WRITE_DEPTH(_x, _y, d) \ + *(GLdepth *)(buf + _x*3 + _y*pitch) = d + +#define READ_DEPTH(d, _x, _y) \ + d = *(GLdepth *)(buf + _x*3 + _y*pitch) + +#define TAG(x) r128##x##_24 +#include "depthtmp.h" + + + +/* 32 bit, ARGB8888 color spanline and pixel functions */ +#define WRITE_RGBA(_x, _y, r, g, b, a) \ + *(GLuint *)(buf + _x*4 + _y*pitch) = ((r << 16) | \ + (g << 8) | \ + (b << 0) | \ + (a << 24) ) + +#define WRITE_PIXEL(_x, _y, p) \ + *(GLuint *)(buf + _x*4 + _y*pitch) = p + +#define READ_RGBA(rgba, _x, _y) \ + do { \ + GLuint p = *(GLuint *)(read_buf + _x*4 + _y*pitch); \ + rgba[0] = (p >> 16) & 0xff; \ + rgba[1] = (p >> 8) & 0xff; \ + rgba[2] = (p >> 0) & 0xff; \ + rgba[3] = (p >> 24) & 0xff; \ + } while (0) + +#define TAG(x) r128##x##_ARGB8888 +#include "spantmp.h" + + + +/* 32 bit depthbuffer functions */ +#define WRITE_DEPTH(_x, _y, d) \ + *(GLdepth *)(buf + _x*4 + _y*pitch) = d + +#define READ_DEPTH(d, _x, _y) \ + d = *(GLdepth *)(buf + _x*4 + _y*pitch) + +#define TAG(x) r128##x##_32 +#include "depthtmp.h" + + + +void r128DDInitSpanFuncs(GLcontext *ctx) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + + switch (r128ctx->r128Screen->pixel_code) { + case 8: /* Color Index mode not supported */ + break; + + case 15: + ctx->Driver.WriteRGBASpan = r128WriteRGBASpan_ARGB1555; + ctx->Driver.WriteRGBSpan = r128WriteRGBSpan_ARGB1555; + ctx->Driver.WriteMonoRGBASpan = r128WriteMonoRGBASpan_ARGB1555; + ctx->Driver.WriteRGBAPixels = r128WriteRGBAPixels_ARGB1555; + ctx->Driver.WriteMonoRGBAPixels = r128WriteMonoRGBAPixels_ARGB1555; + ctx->Driver.ReadRGBASpan = r128ReadRGBASpan_ARGB1555; + ctx->Driver.ReadRGBAPixels = r128ReadRGBAPixels_ARGB1555; + + ctx->Driver.ReadDepthSpan = r128ReadDepthSpan_16; + ctx->Driver.WriteDepthSpan = r128WriteDepthSpan_16; + ctx->Driver.ReadDepthPixels = r128ReadDepthPixels_16; + ctx->Driver.WriteDepthPixels = r128WriteDepthPixels_16; + break; + + case 16: + ctx->Driver.WriteRGBASpan = r128WriteRGBASpan_RGB565; + ctx->Driver.WriteRGBSpan = r128WriteRGBSpan_RGB565; + ctx->Driver.WriteMonoRGBASpan = r128WriteMonoRGBASpan_RGB565; + ctx->Driver.WriteRGBAPixels = r128WriteRGBAPixels_RGB565; + ctx->Driver.WriteMonoRGBAPixels = r128WriteMonoRGBAPixels_RGB565; + ctx->Driver.ReadRGBASpan = r128ReadRGBASpan_RGB565; + ctx->Driver.ReadRGBAPixels = r128ReadRGBAPixels_RGB565; + + ctx->Driver.ReadDepthSpan = r128ReadDepthSpan_16; + ctx->Driver.WriteDepthSpan = r128WriteDepthSpan_16; + ctx->Driver.ReadDepthPixels = r128ReadDepthPixels_16; + ctx->Driver.WriteDepthPixels = r128WriteDepthPixels_16; + break; + + case 24: + ctx->Driver.WriteRGBASpan = r128WriteRGBASpan_RGB888; + ctx->Driver.WriteRGBSpan = r128WriteRGBSpan_RGB888; + ctx->Driver.WriteMonoRGBASpan = r128WriteMonoRGBASpan_RGB888; + ctx->Driver.WriteRGBAPixels = r128WriteRGBAPixels_RGB888; + ctx->Driver.WriteMonoRGBAPixels = r128WriteMonoRGBAPixels_RGB888; + ctx->Driver.ReadRGBASpan = r128ReadRGBASpan_RGB888; + ctx->Driver.ReadRGBAPixels = r128ReadRGBAPixels_RGB888; + + ctx->Driver.ReadDepthSpan = r128ReadDepthSpan_24; + ctx->Driver.WriteDepthSpan = r128WriteDepthSpan_24; + ctx->Driver.ReadDepthPixels = r128ReadDepthPixels_24; + ctx->Driver.WriteDepthPixels = r128WriteDepthPixels_24; + break; + + case 32: + ctx->Driver.WriteRGBASpan = r128WriteRGBASpan_ARGB8888; + ctx->Driver.WriteRGBSpan = r128WriteRGBSpan_ARGB8888; + ctx->Driver.WriteMonoRGBASpan = r128WriteMonoRGBASpan_ARGB8888; + ctx->Driver.WriteRGBAPixels = r128WriteRGBAPixels_ARGB8888; + ctx->Driver.WriteMonoRGBAPixels = r128WriteMonoRGBAPixels_ARGB8888; + ctx->Driver.ReadRGBASpan = r128ReadRGBASpan_ARGB8888; + ctx->Driver.ReadRGBAPixels = r128ReadRGBAPixels_ARGB8888; + + ctx->Driver.ReadDepthSpan = r128ReadDepthSpan_32; + ctx->Driver.WriteDepthSpan = r128WriteDepthSpan_32; + ctx->Driver.ReadDepthPixels = r128ReadDepthPixels_32; + ctx->Driver.WriteDepthPixels = r128WriteDepthPixels_32; + break; + + default: + break; + } + + ctx->Driver.WriteCI8Span = NULL; + ctx->Driver.WriteCI32Span = NULL; + ctx->Driver.WriteMonoCISpan = NULL; + ctx->Driver.WriteCI32Pixels = NULL; + ctx->Driver.WriteMonoCIPixels = NULL; + ctx->Driver.ReadCI32Span = NULL; + ctx->Driver.ReadCI32Pixels = NULL; +} diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_span.h b/xc/lib/GL/mesa/src/drv/r128/r128_span.h new file mode 100644 index 000000000..f83a4da9f --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_span.h @@ -0,0 +1,44 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * Gareth Hughes <gareth@precisioninsight.com> + * + */ + +#ifndef _R128_SPAN_H_ +#define _R128_SPAN_H_ + +#ifdef GLX_DIRECT_RENDERING + +extern void r128DDInitSpanFuncs(GLcontext *ctx); + +#endif +#endif /* _R128_SPAN_H_ */ diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_state.c b/xc/lib/GL/mesa/src/drv/r128/r128_state.c new file mode 100644 index 000000000..3d1ceaa24 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_state.c @@ -0,0 +1,1309 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#include "r128_init.h" +#include "r128_mesa.h" +#include "r128_xmesa.h" +#include "r128_context.h" +#include "r128_lock.h" +#include "r128_state.h" +#include "r128_reg.h" +#include "r128_cce.h" +#include "r128_tris.h" +#include "r128_vb.h" +#include "r128_tex.h" + +#include "mmath.h" + +#define INTERESTED (~(NEW_MODELVIEW | \ + NEW_PROJECTION | \ + NEW_TEXTURE_MATRIX | \ + NEW_USER_CLIP | \ + NEW_CLIENT_STATE | \ + NEW_TEXTURE_ENABLE)) + +static void r128DDUpdateState(GLcontext *ctx) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + + if (R128_DEBUG_FLAGS & DEBUG_VERBOSE_API) { + fprintf(stderr, "r128DDUpdateState(%p)\n", ctx); + } + + if (ctx->NewState & INTERESTED) { + r128ChooseRenderState(ctx); + r128ChooseRasterSetupFunc(ctx); + } + + if (!r128ctx->Fallback) { + ctx->IndirectTriangles &= ~DD_SW_RASTERIZE; + ctx->IndirectTriangles |= r128ctx->IndirectTriangles; + + ctx->Driver.PointsFunc = r128ctx->PointsFunc; + ctx->Driver.LineFunc = r128ctx->LineFunc; + ctx->Driver.TriangleFunc = r128ctx->TriangleFunc; + ctx->Driver.QuadFunc = r128ctx->QuadFunc; + ctx->Driver.RectFunc = NULL; + } +} + +static void r128DDUpdateHWState(GLcontext *ctx) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + + /* FIXME: state is being updated too often */ + if (r128ctx->dirty) + r128UpdateHWState(r128ctx); +} + +static void r128DDReducedPrimitiveChange(GLcontext *ctx, GLenum prim) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + + /* FIXME: Also need to flush between tris and tristrips/fans when we + support them directly */ + R128CCE_FLUSH_VB_LOCK(r128ctx); +} + +static void r128DDClearColor(GLcontext *ctx, + GLubyte r, GLubyte g, GLubyte b, GLubyte a) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + + r128ctx->ClearColor = r128PackColor(r128ctx->r128Screen->depth, + r, g, b, a); +} + +static void r128DDColor(GLcontext *ctx, + GLubyte r, GLubyte g, GLubyte b, GLubyte a) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + + r128ctx->Color = r128PackColor(r128ctx->r128Screen->depth, r, g, b, a); +} + +static GLboolean r128DDSetDrawBuffer(GLcontext *ctx, GLenum mode) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + int x = r128ctx->driDrawable->x; + int y = r128ctx->driDrawable->y; + int found; + + r128ctx->Fallback &= ~R128_FALLBACK_DRAW_BUFFER; + + switch (mode) { + case GL_FRONT_LEFT: + r128ctx->drawX = r128ctx->r128Screen->fbX; + r128ctx->drawY = r128ctx->r128Screen->fbY; + found = GL_TRUE; + break; + case GL_BACK_LEFT: + r128ctx->drawX = r128ctx->r128Screen->backX; + r128ctx->drawY = r128ctx->r128Screen->backY; + found = GL_TRUE; + break; + default: + r128ctx->Fallback |= R128_FALLBACK_DRAW_BUFFER; + found = GL_FALSE; + break; + } + + x += r128ctx->drawX; + y += r128ctx->drawY; + + R128CCE_FLUSH_VB_LOCK(r128ctx); + r128ctx->regs.window_xy_offset = ((y << R128_WINDOW_Y_SHIFT) | + (x << R128_WINDOW_X_SHIFT)); + + /* Recalculate the Z buffer offset since we might be drawing to the + back buffer and window_xy_offset affects both color buffer and + depth drawing */ + r128ctx->regs.z_offset_c = ((r128ctx->r128Screen->depthX - + r128ctx->drawX) * + (r128ctx->r128Screen->bpp/8) + + (r128ctx->r128Screen->depthY - + r128ctx->drawY) * + r128ctx->r128Screen->fbStride); + + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_WIN_Z_POS; + return found; +} + +static void r128DDSetReadBuffer(GLcontext *ctx, + GLframebuffer *colorBuffer, + GLenum mode) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + + r128ctx->Fallback &= ~R128_FALLBACK_READ_BUFFER; + + switch (mode) { + case GL_FRONT_LEFT: + r128ctx->readX = r128ctx->r128Screen->fbX; + r128ctx->readY = r128ctx->r128Screen->fbY; + break; + case GL_BACK_LEFT: + r128ctx->readX = r128ctx->r128Screen->backX; + r128ctx->readY = r128ctx->r128Screen->backY; + break; + default: + r128ctx->Fallback |= R128_FALLBACK_READ_BUFFER; + break; + } +} + +static GLboolean r128DDColorMask(GLcontext *ctx, + GLboolean r, GLboolean g, + GLboolean b, GLboolean a) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + + GLuint mask = r128PackColor(r128ctx->r128Screen->pixel_code, + ctx->Color.ColorMask[RCOMP], + ctx->Color.ColorMask[GCOMP], + ctx->Color.ColorMask[BCOMP], + ctx->Color.ColorMask[ACOMP]); + + if (r128ctx->regs.plane_3d_mask_c != mask) { + R128CCE_FLUSH_VB_LOCK(r128ctx); + r128ctx->regs.plane_3d_mask_c = mask; + + /* FIXME: Load into hardware now??? */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_MISC; + } + + return GL_TRUE; +} + +static void r128DDDither(GLcontext *ctx, GLboolean enable) +{ +} + +static void r128DDAlphaFunc(GLcontext *ctx, GLenum func, GLclampf ref) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + CARD32 a = r128ctx->regs.misc_3d_state_cntl_reg; + + a &= ~(R128_ALPHA_TEST_MASK | R128_REF_ALPHA_MASK); + a |= ctx->Color.AlphaRef & R128_REF_ALPHA_MASK; + + switch (func) { + case GL_NEVER: a |= R128_ALPHA_TEST_NEVER; break; + case GL_LESS: a |= R128_ALPHA_TEST_LESS; break; + case GL_LEQUAL: a |= R128_ALPHA_TEST_LESSEQUAL; break; + case GL_EQUAL: a |= R128_ALPHA_TEST_EQUAL; break; + case GL_GEQUAL: a |= R128_ALPHA_TEST_GREATEREQUAL; break; + case GL_GREATER: a |= R128_ALPHA_TEST_GREATER; break; + case GL_NOTEQUAL: a |= R128_ALPHA_TEST_NEQUAL; break; + case GL_ALWAYS: a |= R128_ALPHA_TEST_ALWAYS; + break; + default: + /* ERROR!!! */ + return; + } + + if (r128ctx->regs.misc_3d_state_cntl_reg != a) { + R128CCE_FLUSH_VB_LOCK(r128ctx); + r128ctx->regs.misc_3d_state_cntl_reg = a; + + /* FIXME: Load into hardware now??? */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_ALPHASTATE; + } +} + +static void r128DDBlendFunc(GLcontext *ctx, GLenum sfactor, GLenum dfactor) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + CARD32 b = r128ctx->regs.misc_3d_state_cntl_reg; + + b &= ~(R128_ALPHA_BLEND_SRC_MASK | R128_ALPHA_BLEND_DST_MASK); + + switch (sfactor) { + case GL_ZERO: b |= R128_ALPHA_BLEND_SRC_ZERO; + break; + case GL_ONE: b |= R128_ALPHA_BLEND_SRC_ONE; + break; + case GL_DST_COLOR: b |= R128_ALPHA_BLEND_SRC_DESTCOLOR; + break; + case GL_ONE_MINUS_DST_COLOR: b |= R128_ALPHA_BLEND_SRC_INVDESTCOLOR; + break; + case GL_SRC_ALPHA: b |= R128_ALPHA_BLEND_SRC_SRCALPHA; + break; + case GL_ONE_MINUS_SRC_ALPHA: b |= R128_ALPHA_BLEND_SRC_INVSRCALPHA; + break; + case GL_DST_ALPHA: b |= R128_ALPHA_BLEND_SRC_DESTALPHA; + break; + case GL_ONE_MINUS_DST_ALPHA: b |= R128_ALPHA_BLEND_SRC_INVDESTALPHA; + break; + case GL_SRC_ALPHA_SATURATE: b |= R128_ALPHA_BLEND_SRC_SRCALPHASAT; + break; +#if 0 + /* FIXME: These are not supported directly by the Rage 128. + They could be emulated using something like the TexEnv + modes. */ + case GL_CONSTANT_COLOR: b |= 0; + break; + case GL_ONE_MINUS_CONSTANT_COLOR: b |= 0; + break; + case GL_CONSTANT_ALPHA: b |= 0; + break; + case GL_ONE_MINUS_CONSTANT_ALPHA: b |= 0; + break; +#endif + default: + /* ERROR!!! */ + return; + } + + switch (dfactor) { + case GL_ZERO: b |= R128_ALPHA_BLEND_DST_ZERO; + break; + case GL_ONE: b |= R128_ALPHA_BLEND_DST_ONE; + break; + case GL_SRC_COLOR: b |= R128_ALPHA_BLEND_DST_SRCCOLOR; + break; + case GL_ONE_MINUS_SRC_COLOR: b |= R128_ALPHA_BLEND_DST_INVSRCCOLOR; + break; + case GL_SRC_ALPHA: b |= R128_ALPHA_BLEND_DST_SRCALPHA; + break; + case GL_ONE_MINUS_SRC_ALPHA: b |= R128_ALPHA_BLEND_DST_INVSRCALPHA; + break; + case GL_DST_ALPHA: b |= R128_ALPHA_BLEND_DST_DESTALPHA; + break; + case GL_ONE_MINUS_DST_ALPHA: b |= R128_ALPHA_BLEND_DST_INVDESTALPHA; + break; +#if 0 + /* FIXME: These are not supported directly by the Rage 128. + They could be emulated using something like the TexEnv + modes. */ + case GL_CONSTANT_COLOR: b |= 0; + break; + case GL_ONE_MINUS_CONSTANT_COLOR: b |= 0; + break; + case GL_CONSTANT_ALPHA: b |= 0; + break; + case GL_ONE_MINUS_CONSTANT_ALPHA: b |= 0; + break; +#endif + default: + /* ERROR!!! */ + return; + } + + if (r128ctx->regs.misc_3d_state_cntl_reg != b) { + R128CCE_FLUSH_VB_LOCK(r128ctx); + r128ctx->regs.misc_3d_state_cntl_reg = b; + + /* FIXME: Load into hardware now??? */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_ALPHASTATE; + } +} + +static void r128DDBlendFuncSeparate(GLcontext *ctx, GLenum sfactorRGB, + GLenum dfactorRGB, GLenum sfactorA, + GLenum dfactorA) +{ + if (sfactorRGB != sfactorA || dfactorRGB != dfactorA) { + /* ERROR!!! */ + return; + } + + r128DDBlendFunc(ctx, sfactorRGB, dfactorRGB); +} + +static void r128DDClearDepth(GLcontext *ctx, GLclampd d) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + + switch (r128ctx->regs.z_sten_cntl_c & R128_Z_PIX_WIDTH_MASK) { + case R128_Z_PIX_WIDTH_16: r128ctx->ClearDepth = d * 0x0000ffff; break; + case R128_Z_PIX_WIDTH_24: r128ctx->ClearDepth = d * 0x00ffffff; break; + case R128_Z_PIX_WIDTH_32: r128ctx->ClearDepth = d * 0xffffffff; break; + default: return; + } +} + +static void r128DDCullFace(GLcontext *ctx, GLenum mode) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + CARD32 f = r128ctx->regs.pm4_vc_fpu_setup; + + if (!ctx->Polygon.CullFlag) return; + + f &= ~(R128_BACKFACE_MASK | R128_FRONTFACE_MASK); + + switch (mode) { + case GL_FRONT: f |= R128_BACKFACE_SOLID; break; + case GL_BACK: f |= R128_FRONTFACE_SOLID; break; + case GL_FRONT_AND_BACK: break; + default: return; + } + + if (r128ctx->regs.pm4_vc_fpu_setup != f) { + R128CCE_FLUSH_VB_LOCK(r128ctx); + r128ctx->regs.pm4_vc_fpu_setup = f; + + /* FIXME: Load into hardware now??? */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_SETUPSTATE; + } +} + +static void r128DDFrontFace(GLcontext *ctx, GLenum mode) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + CARD32 f = r128ctx->regs.pm4_vc_fpu_setup; + + f &= ~R128_FRONT_DIR_MASK; + + switch (mode) { + case GL_CW: f |= R128_FRONT_DIR_CW; break; + case GL_CCW: f |= R128_FRONT_DIR_CCW; break; + default: return; + } + + if (r128ctx->regs.pm4_vc_fpu_setup != f) { + R128CCE_FLUSH_VB_LOCK(r128ctx); + r128ctx->regs.pm4_vc_fpu_setup = f; + + /* FIXME: Load into hardware now??? */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_SETUPSTATE; + } +} + +static void r128DDDepthFunc(GLcontext *ctx, GLenum func) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + CARD32 z = r128ctx->regs.z_sten_cntl_c; + + z &= ~R128_Z_TEST_MASK; + + switch (func) { + case GL_NEVER: z |= R128_Z_TEST_NEVER; break; + case GL_LESS: z |= R128_Z_TEST_LESS; break; + case GL_LEQUAL: z |= R128_Z_TEST_LESSEQUAL; break; + case GL_EQUAL: z |= R128_Z_TEST_EQUAL; break; + case GL_GEQUAL: z |= R128_Z_TEST_GREATEREQUAL; break; + case GL_GREATER: z |= R128_Z_TEST_GREATER; break; + case GL_NOTEQUAL: z |= R128_Z_TEST_NEQUAL; break; + case GL_ALWAYS: z |= R128_Z_TEST_ALWAYS; break; + default: return; + } + + if (r128ctx->regs.z_sten_cntl_c != z) { + R128CCE_FLUSH_VB_LOCK(r128ctx); + r128ctx->regs.z_sten_cntl_c = z; + + /* FIXME: Load into hardware now??? */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_ZSTENSTATE; + } +} + +static void r128DDDepthMask(GLcontext *ctx, GLboolean flag) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + CARD32 t = r128ctx->regs.tex_cntl_c; + + if (flag) t |= R128_Z_WRITE_ENABLE; + else t &= ~R128_Z_WRITE_ENABLE; + + if (r128ctx->regs.tex_cntl_c != t) { + R128CCE_FLUSH_VB_LOCK(r128ctx); + r128ctx->regs.tex_cntl_c = t; + + /* FIXME: Load into hardware now??? */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_ENGINESTATE; + } +} + +static void r128DDEnable(GLcontext *ctx, GLenum cap, GLboolean state) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + CARD32 t = r128ctx->regs.tex_cntl_c; + CARD32 f = r128ctx->regs.pm4_vc_fpu_setup; + + if (R128_DEBUG_FLAGS & DEBUG_VERBOSE_API) { + fprintf(stderr, "r128DDEnable( %p, 0x%x = %s )\n", + ctx, cap, state ? "GL_TRUE" : "GL_FALSE"); + } + + switch (cap) { + case GL_ALPHA_TEST: + if (state) t |= R128_ALPHA_TEST_ENABLE; + else t &= ~R128_ALPHA_TEST_ENABLE; + break; + + case GL_AUTO_NORMAL: return; + + case GL_BLEND: + if (state) t |= R128_ALPHA_ENABLE; + else t &= ~R128_ALPHA_ENABLE; + break; + + case GL_CLIP_PLANE0: + case GL_CLIP_PLANE1: + case GL_CLIP_PLANE2: + case GL_CLIP_PLANE3: + case GL_CLIP_PLANE4: + case GL_CLIP_PLANE5: + case GL_COLOR_MATERIAL: return; + + case GL_CULL_FACE: + f &= ~(R128_BACKFACE_MASK | R128_FRONTFACE_MASK); + if (state) { + switch (ctx->Polygon.CullFaceMode) { + case GL_FRONT: f |= R128_BACKFACE_SOLID; break; + case GL_BACK: f |= R128_FRONTFACE_SOLID; break; + case GL_FRONT_AND_BACK: break; + default: return; + } + } else { + f |= R128_BACKFACE_SOLID | R128_FRONTFACE_SOLID; + } + break; + + case GL_DEPTH_TEST: + if (state) t |= R128_Z_ENABLE; + else t &= ~R128_Z_ENABLE; + break; + + case GL_DITHER: + if (state) t |= R128_DITHER_ENABLE; + else t &= ~R128_DITHER_ENABLE; + break; + + case GL_FOG: + if (state) t |= R128_FOG_ENABLE; + else t &= ~R128_FOG_ENABLE; + break; + + case GL_LIGHT0: + case GL_LIGHT1: + case GL_LIGHT2: + case GL_LIGHT3: + case GL_LIGHT4: + case GL_LIGHT5: + case GL_LIGHT6: + case GL_LIGHT7: + case GL_LIGHTING: + case GL_LINE_SMOOTH: + case GL_LINE_STIPPLE: + case GL_INDEX_LOGIC_OP: + case GL_COLOR_LOGIC_OP: + case GL_MAP1_COLOR_4: + case GL_MAP1_INDEX: + case GL_MAP1_NORMAL: + case GL_MAP1_TEXTURE_COORD_1: + case GL_MAP1_TEXTURE_COORD_2: + case GL_MAP1_TEXTURE_COORD_3: + case GL_MAP1_TEXTURE_COORD_4: + case GL_MAP1_VERTEX_3: + case GL_MAP1_VERTEX_4: + case GL_MAP2_COLOR_4: + case GL_MAP2_INDEX: + case GL_MAP2_NORMAL: + case GL_MAP2_TEXTURE_COORD_1: + case GL_MAP2_TEXTURE_COORD_2: + case GL_MAP2_TEXTURE_COORD_3: + case GL_MAP2_TEXTURE_COORD_4: + case GL_MAP2_VERTEX_3: + case GL_MAP2_VERTEX_4: + case GL_NORMALIZE: + case GL_POINT_SMOOTH: + case GL_POLYGON_SMOOTH: + case GL_POLYGON_STIPPLE: + case GL_POLYGON_OFFSET_POINT: + case GL_POLYGON_OFFSET_LINE: + case GL_POLYGON_OFFSET_FILL: + case GL_RESCALE_NORMAL_EXT: return; + + case GL_SCISSOR_TEST: + /* FIXME: Hook up the software scissor */ +#if 0 + r128ctx->Scissor = state; +#endif + break; + + case GL_SHARED_TEXTURE_PALETTE_EXT: + case GL_STENCIL_TEST: return; + + case GL_TEXTURE_1D: + case GL_TEXTURE_2D: + /* This is handled in r128UpdateTex[01]State() */ + r128ctx->dirty |= R128_UPDATE_TEXSTATE; + break; + + case GL_TEXTURE_3D: + case GL_TEXTURE_GEN_Q: + case GL_TEXTURE_GEN_R: + case GL_TEXTURE_GEN_S: + case GL_TEXTURE_GEN_T: return; + + /* Client state */ + case GL_VERTEX_ARRAY: + case GL_NORMAL_ARRAY: + case GL_COLOR_ARRAY: + case GL_INDEX_ARRAY: + case GL_TEXTURE_COORD_ARRAY: + case GL_EDGE_FLAG_ARRAY: return; + + default: return; + } + + if (r128ctx->regs.tex_cntl_c != t) { + R128CCE_FLUSH_VB_LOCK(r128ctx); + r128ctx->regs.tex_cntl_c = t; + + /* FIXME: Load into hardware now??? */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_ENGINESTATE; + } + if (r128ctx->regs.pm4_vc_fpu_setup != f) { + R128CCE_FLUSH_VB_LOCK(r128ctx); + r128ctx->regs.pm4_vc_fpu_setup = f; + + /* FIXME: Load into hardware now??? */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_SETUPSTATE; + } + +} + +static void r128DDFogfv(GLcontext *ctx, GLenum pname, const GLfloat *param) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + GLubyte c[4]; + CARD32 col; + floatTOint fog; + GLenum mode; + + if (R128_DEBUG_FLAGS & DEBUG_VERBOSE_API) { + fprintf(stderr, "r128DDFogfv(%p, 0x%x)\n", ctx, pname); + } + + switch (pname) { + case GL_FOG_MODE: + mode = (GLenum)(GLint)*param; + if (r128ctx->FogMode != mode) { + R128CCE_FLUSH_VB_LOCK(r128ctx); + r128ctx->FogMode = mode; + + /* FIXME: Load into hardware now??? */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_FOGTABLE; + } + break; + + case GL_FOG_DENSITY: + fog.f = *param; + if (r128ctx->regs.fog_3d_table_density != fog.i) { + R128CCE_FLUSH_VB_LOCK(r128ctx); + r128ctx->regs.fog_3d_table_density = fog.i; + + /* FIXME: Load into hardware now??? */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_FOGSTATE; + } + break; + + case GL_FOG_START: + fog.f = *param; + if (r128ctx->regs.fog_3d_table_start != fog.i) { + R128CCE_FLUSH_VB_LOCK(r128ctx); + r128ctx->regs.fog_3d_table_start = fog.i; + + /* FIXME: Load into hardware now??? */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_FOGSTATE; + } + break; + + case GL_FOG_END: + fog.f = *param; + if (r128ctx->regs.fog_3d_table_end != fog.i) { + R128CCE_FLUSH_VB_LOCK(r128ctx); + r128ctx->regs.fog_3d_table_end = fog.i; + + /* FIXME: Load into hardware now??? */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_FOGSTATE; + } + break; + + case GL_FOG_COLOR: + FLOAT_RGBA_TO_UBYTE_RGBA(c, ctx->Fog.Color); + col = r128PackColor(32, c[0], c[1], c[2], c[3]); + if (r128ctx->regs.fog_color_c != col) { + R128CCE_FLUSH_VB_LOCK(r128ctx); + r128ctx->regs.fog_color_c = col; + + /* FIXME: Load into hardware now??? */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_FOGSTATE; + } + break; + + default: + return; + } +} + +static void r128DDScissor(GLcontext *ctx, + GLint x, GLint y, GLsizei w, GLsizei h) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + + r128ctx->ScissorRect.x1 = x; + r128ctx->ScissorRect.y1 = r128ctx->driDrawable->h - (y + h); + r128ctx->ScissorRect.x2 = x + w; + r128ctx->ScissorRect.y2 = r128ctx->driDrawable->h - y; +} + +/* Initialize the driver's state functions */ +void r128DDInitStateFuncs(GLcontext *ctx) +{ + ctx->Driver.UpdateState = r128DDUpdateState; + + ctx->Driver.ClearIndex = NULL; + ctx->Driver.ClearColor = r128DDClearColor; + ctx->Driver.Index = NULL; + ctx->Driver.Color = r128DDColor; + ctx->Driver.SetDrawBuffer = r128DDSetDrawBuffer; + ctx->Driver.SetReadBuffer = r128DDSetReadBuffer; + + ctx->Driver.IndexMask = NULL; + ctx->Driver.ColorMask = r128DDColorMask; + ctx->Driver.LogicOp = NULL; + ctx->Driver.Dither = r128DDDither; + + ctx->Driver.NearFar = NULL; + + ctx->Driver.RenderStart = r128DDUpdateHWState; + ctx->Driver.RenderFinish = NULL; + ctx->Driver.RasterSetup = NULL; + + ctx->Driver.RenderVBClippedTab = NULL; + ctx->Driver.RenderVBCulledTab = NULL; + ctx->Driver.RenderVBRawTab = NULL; + + ctx->Driver.ReducedPrimitiveChange = r128DDReducedPrimitiveChange; + ctx->Driver.MultipassFunc = NULL; + + ctx->Driver.AlphaFunc = r128DDAlphaFunc; + ctx->Driver.BlendEquation = NULL; + ctx->Driver.BlendFunc = r128DDBlendFunc; + ctx->Driver.BlendFuncSeparate = r128DDBlendFuncSeparate; + ctx->Driver.ClearDepth = r128DDClearDepth; + ctx->Driver.CullFace = r128DDCullFace; + ctx->Driver.FrontFace = r128DDFrontFace; + ctx->Driver.DepthFunc = r128DDDepthFunc; + ctx->Driver.DepthMask = r128DDDepthMask; + ctx->Driver.DepthRange = NULL; + ctx->Driver.Enable = r128DDEnable; + ctx->Driver.Fogfv = r128DDFogfv; + ctx->Driver.Hint = NULL; + ctx->Driver.Lightfv = NULL; + ctx->Driver.LightModelfv = NULL; + ctx->Driver.PolygonMode = NULL; + ctx->Driver.Scissor = r128DDScissor; + ctx->Driver.ShadeModel = NULL; + ctx->Driver.ClearStencil = NULL; + ctx->Driver.StencilFunc = NULL; + ctx->Driver.StencilMask = NULL; + ctx->Driver.StencilOp = NULL; + ctx->Driver.Viewport = NULL; +} + +/* Initialize the context's hardware state */ +void r128DDInitState(r128ContextPtr r128ctx) +{ + int dst_bpp, depth_bpp, pitch, i; + CARD32 depthClear; + + pitch = r128ctx->r128Screen->fbStride / r128ctx->r128Screen->bpp; + + switch (r128ctx->r128Screen->pixel_code) { + case 8: dst_bpp = R128_GMC_DST_8BPP_CI; break; + case 15: dst_bpp = R128_GMC_DST_15BPP; break; + case 16: dst_bpp = R128_GMC_DST_16BPP; break; + case 24: dst_bpp = R128_GMC_DST_24BPP; break; + case 32: dst_bpp = R128_GMC_DST_32BPP; break; + default: + fprintf(stderr, "Error: Unsupported pixel depth %d... exiting\n", + r128ctx->r128Screen->pixel_code); + exit(-1); + } + + /* FIXME: Figure out how to use 16bpp depth buffer in 32bpp mode */ + switch (r128ctx->glCtx->Visual->DepthBits) { + case 16: depthClear = 0x0000ffff; depth_bpp = R128_Z_PIX_WIDTH_16; break; + case 24: depthClear = 0x00ffffff; depth_bpp = R128_Z_PIX_WIDTH_24; break; + case 32: depthClear = 0xffffffff; depth_bpp = R128_Z_PIX_WIDTH_32; break; + default: + fprintf(stderr, "Error: Unsupported depth %d... exiting\n", + r128ctx->r128Screen->bpp); + exit(-1); + break; + } + + r128ctx->dirty = R128_ALL_DIRTY; + r128ctx->dirty_context = R128_CTX_ALL_DIRTY; + + r128ctx->RenderIndex = R128_FALLBACK_BIT; + r128ctx->PointsFunc = NULL; + r128ctx->LineFunc = NULL; + r128ctx->TriangleFunc = NULL; + r128ctx->QuadFunc = NULL; + + r128ctx->IndirectTriangles = 0; + r128ctx->Fallback = 0; + + if (r128ctx->glCtx->Visual->DBflag) { + r128ctx->drawX = r128ctx->r128Screen->backX; + r128ctx->drawY = r128ctx->r128Screen->backY; + r128ctx->readX = r128ctx->r128Screen->backX; + r128ctx->readY = r128ctx->r128Screen->backY; + } else { + r128ctx->drawX = r128ctx->r128Screen->fbX; + r128ctx->drawY = r128ctx->r128Screen->fbY; + r128ctx->readX = r128ctx->r128Screen->fbX; + r128ctx->readY = r128ctx->r128Screen->fbY; + } + + r128ctx->ClearColor = 0x00000000; + r128ctx->ClearDepth = depthClear; + + r128ctx->regs.scale_3d_cntl = + R128_SCALE_DITHER_TABLE | + R128_TEX_CACHE_SIZE_FULL | + R128_DITHER_INIT_RESET | + R128_SCALE_3D_TEXMAP_SHADE | + R128_SCALE_PIX_REPLICATE | + /* R128_TEX_CACHE_SPLIT | */ + R128_ALPHA_COMB_ADD_CLAMP | + R128_FOG_TABLE | + R128_ALPHA_BLEND_SRC_ONE | + R128_ALPHA_BLEND_DST_ZERO | + R128_ALPHA_TEST_ALWAYS | + R128_COMPOSITE_SHADOW_CMP_EQUAL | + R128_TEX_MAP_ALPHA_IN_TEXTURE | + R128_TEX_CACHE_LINE_SIZE_8QW; + + r128ctx->regs.dst_pitch_offset_c = pitch << R128_PITCH_SHIFT; + + r128ctx->regs.dp_gui_master_cntl = + R128_GMC_DST_PITCH_OFFSET_CNTL | + R128_GMC_DST_CLIPPING | + R128_GMC_BRUSH_SOLID_COLOR | + dst_bpp | + R128_GMC_SRC_DATATYPE_COLOR | + R128_GMC_BYTE_MSB_TO_LSB | + R128_GMC_CONVERSION_TEMP_6500 | + R128_ROP3_S | + R128_DP_SRC_SOURCE_MEMORY | + R128_GMC_3D_FCN_EN | + R128_GMC_CLR_CMP_CNTL_DIS | + R128_AUX_CLIP_DIS | + R128_GMC_WR_MSK_DIS; + + r128ctx->regs.sc_top_left_c = 0x00000000; + r128ctx->regs.sc_bottom_right_c = 0x1fff1fff; + + r128ctx->regs.aux_sc_cntl = 0x00000000; + + r128ctx->regs.aux1_sc_left = 0x00000000; + r128ctx->regs.aux1_sc_right = 0x00001fff; + r128ctx->regs.aux1_sc_top = 0x00000000; + r128ctx->regs.aux1_sc_bottom = 0x00001fff; + + r128ctx->regs.aux2_sc_left = 0x00000000; + r128ctx->regs.aux2_sc_right = 0x00001fff; + r128ctx->regs.aux2_sc_top = 0x00000000; + r128ctx->regs.aux2_sc_bottom = 0x00001fff; + + r128ctx->regs.aux3_sc_left = 0x00000000; + r128ctx->regs.aux3_sc_right = 0x00001fff; + r128ctx->regs.aux3_sc_top = 0x00000000; + r128ctx->regs.aux3_sc_bottom = 0x00001fff; + + r128ctx->regs.z_offset_c = (r128ctx->r128Screen->depthX * + (r128ctx->r128Screen->bpp/8) + + r128ctx->r128Screen->depthY * + r128ctx->r128Screen->fbStride); + r128ctx->regs.z_pitch_c = pitch; + + r128ctx->regs.z_sten_cntl_c = + depth_bpp | + R128_Z_TEST_LESS | + R128_STENCIL_TEST_ALWAYS | + R128_STENCIL_S_FAIL_KEEP | + R128_STENCIL_ZPASS_KEEP | + R128_STENCIL_ZFAIL_KEEP; + + r128ctx->regs.tex_cntl_c = + R128_Z_WRITE_ENABLE | + R128_SHADE_ENABLE | + R128_DITHER_ENABLE | + R128_ALPHA_IN_TEX_COMPLETE_A | + R128_LIGHT_DIS | + R128_ALPHA_LIGHT_DIS | + R128_TEX_CACHE_FLUSH | + (0x0f << R128_LOD_BIAS_SHIFT); + + r128ctx->regs.misc_3d_state_cntl_reg = + R128_MISC_SCALE_3D_TEXMAP_SHADE | + R128_MISC_SCALE_PIX_REPLICATE | + R128_ALPHA_COMB_ADD_CLAMP | + R128_FOG_TABLE | + R128_ALPHA_BLEND_SRC_ONE | + R128_ALPHA_BLEND_DST_ZERO | + R128_ALPHA_TEST_ALWAYS; + + r128ctx->regs.texture_clr_cmp_clr_c = 0x00000000; + r128ctx->regs.texture_clr_cmp_msk_c = 0xffffffff; + + r128ctx->regs.prim_tex_cntl_c = + R128_MIN_BLEND_NEAREST | + R128_MAG_BLEND_NEAREST | + R128_MIP_MAP_DISABLE | + R128_TEX_CLAMP_S_WRAP | + R128_TEX_CLAMP_T_WRAP; + + r128ctx->regs.prim_texture_combine_cntl_c = + R128_COMB_MODULATE | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_COPY | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA; + + r128ctx->regs.tex_size_pitch_c = + (0 << R128_TEX_PITCH_SHIFT) | + (0 << R128_TEX_SIZE_SHIFT) | + (0 << R128_TEX_HEIGHT_SHIFT) | + (0 << R128_TEX_MIN_SIZE_SHIFT) | + (0 << R128_SEC_TEX_PITCH_SHIFT) | + (0 << R128_SEC_TEX_SIZE_SHIFT) | + (0 << R128_SEC_TEX_HEIGHT_SHIFT) | + (0 << R128_SEC_TEX_MIN_SIZE_SHIFT); + + for (i = 0; i < R128_TEX_MAXLEVELS; i++) + r128ctx->regs.prim_tex_offset[i] = 0x00000000; + + r128ctx->regs.sec_tex_cntl_c = + R128_SEC_SELECT_PRIM_ST; + + r128ctx->regs.sec_tex_combine_cntl_c = + R128_COMB_DIS | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_DIS | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA; + + for (i = 0; i < R128_TEX_MAXLEVELS; i++) + r128ctx->regs.sec_tex_offset[i] = 0x00000000; + + r128ctx->regs.constant_color_c = 0x00ffffff; + r128ctx->regs.prim_texture_border_color_c = 0x00ffffff; + r128ctx->regs.sec_texture_border_color_c = 0x00ffffff; + r128ctx->regs.sten_ref_mask_c = 0xffff0000; + r128ctx->regs.plane_3d_mask_c = 0xffffffff; + + r128ctx->regs.setup_cntl = + R128_COLOR_GOURAUD | + R128_PRIM_TYPE_TRI | +#if 1 + /* FIXME: Let r128 multiply? */ + R128_TEXTURE_ST_MULT_W | +#else + /* FIXME: Or, pre multiply? */ + R128_TEXTURE_ST_DIRECT | +#endif + R128_STARTING_VERTEX_1 | + R128_ENDING_VERTEX_3 | + R128_SU_POLY_LINE_NOT_LAST | + R128_SUB_PIX_4BITS; + + r128ctx->regs.pm4_vc_fpu_setup = + R128_FRONT_DIR_CCW | + R128_BACKFACE_SOLID | + R128_FRONTFACE_SOLID | + R128_FPU_COLOR_GOURAUD | + R128_FPU_SUB_PIX_4BITS | + R128_FPU_MODE_3D | + R128_TRAP_BITS_DISABLE | + R128_XFACTOR_2 | + R128_YFACTOR_2 | + R128_FLAT_SHADE_VERTEX_OGL | + R128_FPU_ROUND_TRUNCATE | + R128_WM_SEL_8DW; + + r128ctx->FogMode = GL_EXP; + r128ctx->regs.fog_color_c = 0x00808080; + r128ctx->regs.fog_3d_table_start = 0x00000000; + r128ctx->regs.fog_3d_table_end = 0xffffffff; + r128ctx->regs.fog_3d_table_density = 0x00000000; + + r128ctx->regs.window_xy_offset = 0x00000000; + + r128ctx->regs.dp_write_mask = 0xffffffff; + + r128ctx->regs.pc_gui_ctlstat = R128_PC_FLUSH_GUI; + + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_ALL_DIRTY; +} + +/* Upload the fog table for the current fog mode */ +static void r128UploadFogTable(r128ContextPtr r128ctx) +{ + int i; + + R128CCE0(R128_CCE_PACKET0, R128_FOG_TABLE_INDEX, 0); + R128CCE(0x00000000); + + R128CCE0(R128_CCE_PACKET0_ONE_REG_WR, R128_FOG_TABLE_DATA, 255); + + switch (r128ctx->FogMode) { + case GL_LINEAR: + for (i = 0; i < 256; i++) { + R128CCE(255 - i); + } + break; + case GL_EXP: + for (i = 0; i < 256; i++) { + R128CCE(255 - FLOAT_TO_UBYTE(exp(i - 255))); + } + break; + case GL_EXP2: + for (i = 0; i < 256; i++) { + R128CCE(255 - FLOAT_TO_UBYTE(exp((i - 255) * (i - 255)))); + } + break; + } +} + +/* Load the current context's state into the hardware */ +/* NOTE: This function is only called while holding the hardware lock */ +static void r128LoadContext(r128ContextPtr r128ctx) +{ + int i; + int tex_size_pitch_done = GL_FALSE; + + if (R128_DEBUG_FLAGS & DEBUG_VERBOSE_API) { + fprintf(stderr, "r128LoadContext(%p)\n", r128ctx->glCtx); + } + +#if 0 + r128ctx->dirty_context = R128_CTX_ALL_DIRTY; +#endif + +#if 1 + /* FIXME: Why do these need to be updated even when they don't change? */ + r128ctx->dirty_context |= (R128_CTX_MISC | + R128_CTX_ENGINESTATE | + R128_CTX_ALPHASTATE); +#endif + +#if 1 + /* FIXME: Is this _really_ needed? */ + if (r128ctx->dirty_context) + if (!R128CCE_USE_RING_BUFFER(r128ctx->r128Screen->CCEMode)) + R128CCE_WAIT_FOR_IDLE(r128ctx); +#endif + + if (r128ctx->dirty_context & R128_CTX_MISC) { + R128CCE1(R128_CCE_PACKET1, R128_SCALE_3D_CNTL, R128_DP_WRITE_MASK); + R128CCE(r128ctx->regs.scale_3d_cntl); + R128CCE(r128ctx->regs.dp_write_mask); + + R128CCE0(R128_CCE_PACKET0, R128_DST_PITCH_OFFSET_C, 1); + R128CCE(r128ctx->regs.dst_pitch_offset_c); + R128CCE(r128ctx->regs.dp_gui_master_cntl); + + R128CCE0(R128_CCE_PACKET0, R128_TEXTURE_CLR_CMP_CLR_C, 1); + R128CCE(r128ctx->regs.texture_clr_cmp_clr_c); + R128CCE(r128ctx->regs.texture_clr_cmp_msk_c); + + R128CCE0(R128_CCE_PACKET0, R128_STEN_REF_MASK_C, 1); + R128CCE(r128ctx->regs.sten_ref_mask_c); + R128CCE(r128ctx->regs.plane_3d_mask_c); + } + + if (r128ctx->dirty_context & R128_CTX_ENGINESTATE) { + R128CCE0(R128_CCE_PACKET0, R128_TEX_CNTL_C, 0); + R128CCE(r128ctx->regs.tex_cntl_c); + } + + if (r128ctx->dirty_context & R128_CTX_TEX0STATE) { + R128CCE0(R128_CCE_PACKET0, R128_PRIM_TEX_CNTL_C, 2+R128_TEX_MAXLEVELS); + R128CCE(r128ctx->regs.prim_tex_cntl_c); + R128CCE(r128ctx->regs.prim_texture_combine_cntl_c); + R128CCE(r128ctx->regs.tex_size_pitch_c); + for (i = 0; i < R128_TEX_MAXLEVELS; i++) + R128CCE(r128ctx->regs.prim_tex_offset[i]); + + R128CCE0(R128_CCE_PACKET0, R128_PRIM_TEXTURE_BORDER_COLOR_C, 0); + R128CCE(r128ctx->regs.prim_texture_border_color_c); + + tex_size_pitch_done = GL_TRUE; + } + + if (r128ctx->dirty_context & R128_CTX_TEX1STATE) { + if (!tex_size_pitch_done) { + R128CCE0(R128_CCE_PACKET0, R128_TEX_SIZE_PITCH_C, 0); + R128CCE(r128ctx->regs.tex_size_pitch_c); + } + + R128CCE0(R128_CCE_PACKET0, R128_SEC_TEX_CNTL_C, 1+R128_TEX_MAXLEVELS); + R128CCE(r128ctx->regs.sec_tex_cntl_c); + R128CCE(r128ctx->regs.sec_tex_combine_cntl_c); + for (i = 0; i < R128_TEX_MAXLEVELS; i++) + R128CCE(r128ctx->regs.sec_tex_offset[i]); + + R128CCE0(R128_CCE_PACKET0, R128_SEC_TEXTURE_BORDER_COLOR_C, 0); + R128CCE(r128ctx->regs.sec_texture_border_color_c); + } + + if (r128ctx->dirty_context & R128_CTX_TEXENVSTATE) { + R128CCE0(R128_CCE_PACKET0, R128_CONSTANT_COLOR_C, 0); + R128CCE(r128ctx->regs.constant_color_c); + } + + if (r128ctx->dirty_context & R128_CTX_FOGSTATE) { + R128CCE0(R128_CCE_PACKET0, R128_FOG_3D_TABLE_START, 1); + R128CCE(r128ctx->regs.fog_3d_table_start); + R128CCE(r128ctx->regs.fog_3d_table_end); + + R128CCE1(R128_CCE_PACKET1, + R128_FOG_COLOR_C, R128_FOG_3D_TABLE_DENSITY); + R128CCE(r128ctx->regs.fog_color_c); + R128CCE(r128ctx->regs.fog_3d_table_density); + } + + if (r128ctx->dirty_context & R128_CTX_FOGTABLE) { + r128UploadFogTable(r128ctx); + } + + if (r128ctx->dirty_context & R128_CTX_ZSTENSTATE) { + R128CCE0(R128_CCE_PACKET0, R128_Z_STEN_CNTL_C, 0); + R128CCE(r128ctx->regs.z_sten_cntl_c); + } + + if (r128ctx->dirty_context & R128_CTX_SCISSORS) { + R128CCE0(R128_CCE_PACKET0, R128_SC_TOP_LEFT_C, 1); + R128CCE(r128ctx->regs.sc_top_left_c); + R128CCE(r128ctx->regs.sc_bottom_right_c); + } + + if (r128ctx->dirty_context & (R128_CTX_ALPHASTATE | + R128_CTX_FOGSTATE)) { + R128CCE0(R128_CCE_PACKET0, R128_MISC_3D_STATE_CNTL_REG, 0); + R128CCE(r128ctx->regs.misc_3d_state_cntl_reg); + } + + if (r128ctx->dirty_context & R128_CTX_SETUPSTATE) { + R128CCE1(R128_CCE_PACKET1, R128_SETUP_CNTL, R128_PM4_VC_FPU_SETUP); + R128CCE(r128ctx->regs.setup_cntl); + R128CCE(r128ctx->regs.pm4_vc_fpu_setup); + } + + if (r128ctx->dirty_context & R128_CTX_WIN_Z_POS) { + R128CCE0(R128_CCE_PACKET0, R128_WINDOW_XY_OFFSET, 0); + R128CCE(r128ctx->regs.window_xy_offset); + + R128CCE0(R128_CCE_PACKET0, R128_Z_OFFSET_C, 1); + R128CCE(r128ctx->regs.z_offset_c); + R128CCE(r128ctx->regs.z_pitch_c); + } + +#if 0 + if (r128ctx->dirty_context & R128_CTX_FLUSH_PIX_CACHE) { + R128CCE0(R128_CCE_PACKET0, R128_PC_GUI_CTLSTAT, 0); + R128CCE(r128ctx->regs.pc_gui_ctlstat); + } +#endif + + R128CCE_SUBMIT_PACKETS(); + + /* Turn off the texture cache flushing */ + r128ctx->regs.tex_cntl_c &= ~R128_TEX_CACHE_FLUSH; + + /* Turn off the pixel cache flushing */ + r128ctx->regs.pc_gui_ctlstat &= ~R128_PC_FLUSH_ALL; + + r128ctx->dirty_context = R128_CTX_CLEAN; +} + +/* Set the hardware clip rects for drawing to the current color buffer */ +/* NOTE: This function is only called while holding the hardware lock */ +void r128SetClipRects(r128ContextPtr r128ctx, + XF86DRIClipRectPtr pc, int nc) +{ + if (!pc) return; + + /* Clear any previous auxiliary scissors */ + r128ctx->regs.aux_sc_cntl = 0x00000000; + + switch (nc) { + case 3: + R128CCE0(R128_CCE_PACKET0, R128_AUX3_SC_LEFT, 3); + R128CCE(pc[2].x1 + r128ctx->drawX); + R128CCE(pc[2].x2-1 + r128ctx->drawX); + R128CCE(pc[2].y1 + r128ctx->drawY); + R128CCE(pc[2].y2-1 + r128ctx->drawY); + + r128ctx->regs.aux_sc_cntl |= R128_AUX3_SC_EN | R128_AUX3_SC_MODE_OR; + + case 2: + R128CCE0(R128_CCE_PACKET0, R128_AUX2_SC_LEFT, 3); + R128CCE(pc[1].x1 + r128ctx->drawX); + R128CCE(pc[1].x2-1 + r128ctx->drawX); + R128CCE(pc[1].y1 + r128ctx->drawY); + R128CCE(pc[1].y2-1 + r128ctx->drawY); + + r128ctx->regs.aux_sc_cntl |= R128_AUX2_SC_EN | R128_AUX2_SC_MODE_OR; + + case 1: + R128CCE0(R128_CCE_PACKET0, R128_AUX1_SC_LEFT, 3); + R128CCE(pc[0].x1 + r128ctx->drawX); + R128CCE(pc[0].x2-1 + r128ctx->drawX); + R128CCE(pc[0].y1 + r128ctx->drawY); + R128CCE(pc[0].y2-1 + r128ctx->drawY); + + r128ctx->regs.aux_sc_cntl |= R128_AUX1_SC_EN | R128_AUX1_SC_MODE_OR; + break; + + default: + return; + } + + R128CCE0(R128_CCE_PACKET0, R128_AUX_SC_CNTL, 0); + R128CCE(r128ctx->regs.aux_sc_cntl); + + R128CCE_SUBMIT_PACKETS(); +} + +/* Update the driver's notion of the window position */ +/* NOTE: This function is only called while holding the hardware lock */ +static void r128UpdateWindowPosition(r128ContextPtr r128ctx) +{ + int x = r128ctx->driDrawable->x + r128ctx->drawX; + int y = r128ctx->driDrawable->y + r128ctx->drawY; + +#if 0 + /* FIXME: Is this _really_ needed? */ + R128CCE_FLUSH_VB(r128ctx); +#endif + r128ctx->regs.window_xy_offset = ((y << R128_WINDOW_Y_SHIFT) | + (x << R128_WINDOW_X_SHIFT)); + + /* Recalculate the Z buffer offset since we might be drawing to the + back buffer and window_xy_offset affects both color buffer and + depth drawing */ + r128ctx->regs.z_offset_c = ((r128ctx->r128Screen->depthX - + r128ctx->drawX) * + (r128ctx->r128Screen->bpp/8) + + (r128ctx->r128Screen->depthY - + r128ctx->drawY) * + r128ctx->r128Screen->fbStride); + + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_WIN_Z_POS; +} + +/* Update the hardware state */ +/* NOTE: This function is only called while holding the hardware lock */ +static void r128UpdateHWStateLocked(r128ContextPtr r128ctx) +{ + if (r128ctx->dirty & R128_REQUIRE_QUIESCENCE) + R128CCE_WAIT_FOR_IDLE(r128ctx); + + /* Update any state that might have changed recently */ + + /* Update the clip rects */ + if (r128ctx->dirty & R128_UPDATE_WINPOS) + r128UpdateWindowPosition(r128ctx); + + /* Update texture state and then upload the images */ + /* Note: Texture images can only be updated after the state has been set */ + if (r128ctx->dirty & R128_UPDATE_TEXSTATE) + r128UpdateTextureState(r128ctx); + if (r128ctx->dirty & R128_UPDATE_TEX0IMAGES) + r128UploadTexImages(r128ctx, r128ctx->CurrentTexObj[0]); + if (r128ctx->dirty & R128_UPDATE_TEX1IMAGES) + r128UploadTexImages(r128ctx, r128ctx->CurrentTexObj[1]); + + /* Load the state into the hardware */ + /* Note: This must be done after all other state has been set */ + if (r128ctx->dirty & R128_UPDATE_CONTEXT) + r128LoadContext(r128ctx); + + r128ctx->dirty = R128_CLEAN; +} + +/* Update the hardware state */ +void r128UpdateHWState(r128ContextPtr r128ctx) +{ + LOCK_HARDWARE(r128ctx); + r128UpdateHWStateLocked(r128ctx); + UNLOCK_HARDWARE(r128ctx); +} + +/* Update the driver's state */ +/* NOTE: This function is only called while holding the hardware lock */ +void r128UpdateState(r128ContextPtr r128ctx, int winMoved) +{ + R128SAREAPrivPtr sarea = r128ctx->r128Screen->SAREA; + int i; + + if (sarea->ctxOwner != r128ctx->driContext->hHWContext) { + sarea->ctxOwner = r128ctx->driContext->hHWContext; + r128ctx->dirty_context = R128_CTX_ALL_DIRTY; + r128LoadContext(r128ctx); + } + + for (i = 0; i < r128ctx->r128Screen->NRTexHeaps; i++) + r128AgeTextures(r128ctx, i); + + if (winMoved) r128ctx->dirty |= R128_UPDATE_WINPOS; +} diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_state.h b/xc/lib/GL/mesa/src/drv/r128/r128_state.h new file mode 100644 index 000000000..f847452f0 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_state.h @@ -0,0 +1,50 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#ifndef _R128_STATE_H_ +#define _R128_STATE_H_ + +#ifdef GLX_DIRECT_RENDERING + +extern void r128DDInitState(r128ContextPtr r128ctx); +extern void r128DDInitStateFuncs(GLcontext *ctx); + +extern void r128UpdateState(r128ContextPtr r128ctx, int winMoved); +extern void r128UpdateHWState(r128ContextPtr r128ctx); + +extern void r128SetClipRects(r128ContextPtr r128ctx, + XF86DRIClipRectPtr pc, int nc); + +#endif +#endif /* _R128_STATE_H_ */ diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_swap.c b/xc/lib/GL/mesa/src/drv/r128/r128_swap.c new file mode 100644 index 000000000..6b347023d --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_swap.c @@ -0,0 +1,125 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#include "r128_init.h" +#include "r128_mesa.h" +#include "r128_xmesa.h" +#include "r128_context.h" +#include "r128_lock.h" +#include "r128_reg.h" +#include "r128_cce.h" +#include "r128_state.h" +#include "r128_vb.h" +#include "r128_swap.h" + +/* Copy the back color buffer to the front color buffer */ +void r128SwapBuffers(r128ContextPtr r128ctx) +{ + unsigned char *R128MMIO = r128ctx->r128Screen->mmio; + __DRIdrawablePrivate *dPriv = r128ctx->driDrawable; + int nc; + XF86DRIClipRectPtr c; + int dst_bpp; + CARD32 swapAge; + + if (r128ctx->SWonly) { + /* FIXME: Provide software fallback for this case?? */ + } + + switch (r128ctx->r128Screen->bpp) { + case 8: + dst_bpp = R128_GMC_DST_8BPP_CI; + break; + case 16: + if (r128ctx->r128Screen->depth == 15) dst_bpp = R128_GMC_DST_15BPP; + else dst_bpp = R128_GMC_DST_16BPP; + break; + case 24: + dst_bpp = R128_GMC_DST_24BPP; + break; + case 32: + default: + dst_bpp = R128_GMC_DST_32BPP; + break; + } + + LOCK_HARDWARE(r128ctx); + + /* Flush any outstanding vertex buffers */ + R128CCE_FLUSH_VB(r128ctx); + + /* Throttle the frame rate -- only allow one pending swap buffers + request at a time */ + while (r128ctx->lastSwapAge > (swapAge = INREG(R128_SWAP_AGE_REG))); + + /* Init the clip rects here in case they changed during the + LOCK_HARDWARE macro */ + c = dPriv->pClipRects; + nc = dPriv->numClipRects; + + /* Cycle through the clip rects */ + while (nc--) { + int fx = c[nc].x1; + int fy = c[nc].y1; + int fw = c[nc].x2 - fx; + int fh = c[nc].y2 - fy; + int bx = fx + r128ctx->r128Screen->backX; + int by = fy + r128ctx->r128Screen->backY; + + fx += r128ctx->r128Screen->fbX; + fy += r128ctx->r128Screen->fbY; + + R128CCE3(R128_CCE_PACKET3_CNTL_BITBLT_MULTI, 3); + R128CCE(R128_GMC_BRUSH_NONE + | R128_GMC_SRC_DATATYPE_COLOR + | R128_DP_SRC_SOURCE_MEMORY + | dst_bpp + | R128_ROP3_S); + R128CCE((bx << 16) | by); + R128CCE((fx << 16) | fy); + R128CCE((fw << 16) | fh); + } + + ++swapAge; + R128CCE0(R128_CCE_PACKET0, R128_SWAP_AGE_REG, 0); + R128CCE(swapAge); + r128ctx->lastSwapAge = swapAge; + + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_ALL_DIRTY; + + R128CCE_SUBMIT_PACKETS(); + + UNLOCK_HARDWARE(r128ctx); +} diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_swap.h b/xc/lib/GL/mesa/src/drv/r128/r128_swap.h new file mode 100644 index 000000000..32851041c --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_swap.h @@ -0,0 +1,43 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#ifndef _R128_SWAP_H_ +#define _R128_SWAP_H_ + +#ifdef GLX_DIRECT_RENDERING + +extern void r128SwapBuffers(r128ContextPtr r128ctx); + +#endif +#endif /* _R128_SWAP_H_ */ diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_tex.c b/xc/lib/GL/mesa/src/drv/r128/r128_tex.c new file mode 100644 index 000000000..d75345404 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_tex.c @@ -0,0 +1,1851 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * Gareth Hughes <gareth@precisioninsight.com> + * + */ + +#include "r128_init.h" +#include "r128_mesa.h" +#include "r128_xmesa.h" +#include "r128_context.h" +#include "r128_lock.h" +#include "r128_state.h" +#include "r128_reg.h" +#include "r128_cce.h" +#include "r128_vb.h" +#include "r128_tex.h" + +#include "mmath.h" +#include "simple_list.h" + +static void r128SetTexWrap(r128TexObjPtr t, GLenum srwap, GLenum twrap); +static void r128SetTexFilter(r128TexObjPtr t, GLenum minf, GLenum magf); +static void r128SetTexBorderColor(r128TexObjPtr t, GLubyte c[4]); + +/* Allocate and initialize hardware state associated with texture `t' */ +/* NOTE: This function is only called while holding the hardware lock */ +static r128TexObjPtr r128CreateTexObj(r128ContextPtr r128ctx, + struct gl_texture_object *tObj) +{ + r128TexObjPtr t; + struct gl_texture_image *image; + int log2Pitch, log2Height, log2Size, log2MinSize; + int totalSize; + int i; + + image = tObj->Image[0]; + if (!image) return NULL; /* ERROR!!! */ + + t = (r128TexObjPtr)calloc(1,sizeof(*t)); + if (!t) return NULL; /* ERROR!!! */ + + if (R128_DEBUG_FLAGS & DEBUG_VERBOSE_API) + fprintf(stderr, "r128CreateTexObj(%p)\n", tObj); + + switch (image->Format) { + case GL_RGBA: + case GL_ALPHA: + case GL_LUMINANCE_ALPHA: + case GL_INTENSITY: + if (r128ctx->r128Screen->bpp == 32) { + t->texelBytes = 4; + t->textureFormat = R128_DATATYPE_ARGB8888; + } else { + t->texelBytes = 2; + t->textureFormat = R128_DATATYPE_ARGB4444; + } + break; + + case GL_RGB: + if (r128ctx->r128Screen->bpp == 32) { + t->texelBytes = 4; + t->textureFormat = R128_DATATYPE_ARGB8888; + } else { + t->texelBytes = 2; + t->textureFormat = R128_DATATYPE_RGB565; + } + break; + + case GL_LUMINANCE: + if (r128ctx->r128Screen->bpp == 32) { + t->texelBytes = 4; + t->textureFormat = R128_DATATYPE_ARGB8888; + } else { + t->texelBytes = 2; + /* Use this to get true greys */ + t->textureFormat = R128_DATATYPE_ARGB1555; + } + break; + + case GL_COLOR_INDEX: + t->texelBytes = 1; + t->textureFormat = R128_DATATYPE_CI8; + break; + + default: + /* ERROR!!! */ + fprintf(stderr, "r128CreateTexObj: bad image->Format\n"); + free(t); + return NULL; + } + + /* Calculate dimensions in log domain */ + for (i = 1, log2Height = 0; i < image->Height; i *= 2) log2Height++; + for (i = 1, log2Pitch = 0; i < image->Width; i *= 2) log2Pitch++; + if (image->Width > image->Height) log2Size = log2Pitch; + else log2Size = log2Height; + + t->dirty_images = 0; + + /* Calculate mipmap offsets and dimensions */ + totalSize = 0; + for (i = 0; i <= log2Size && tObj->Image[i]; i++) { + t->image[i].offset = totalSize; + t->image[i].width = tObj->Image[i]->Width; + t->image[i].height = tObj->Image[i]->Height; + t->dirty_images |= 1 << i; + totalSize += (tObj->Image[i]->Height * + tObj->Image[i]->Width * + t->texelBytes); + + /* Offsets must be 32-byte aligned for host data blits */ + totalSize = (totalSize + 31) & ~31; + } + log2MinSize = log2Size - i + 1; + + t->totalSize = totalSize; + t->internFormat = image->IntFormat; + + t->bound = 0; + t->heap = 0; /* This is set in r128UploadTexImages */ + t->tObj = tObj; + + t->memBlock = NULL; + t->bufAddr = NULL; + + t->regs.tex_cntl = t->textureFormat; + t->regs.size_pitch = ((log2Pitch << R128_TEX_PITCH_SHIFT) | + (log2Size << R128_TEX_SIZE_SHIFT) | + (log2Height << R128_TEX_HEIGHT_SHIFT) | + (log2MinSize << R128_TEX_MIN_SIZE_SHIFT)); + t->regs.border_color = 0x00000000; + + if (log2MinSize == log2Size || + log2MinSize != 0) + t->regs.tex_cntl |= R128_MIP_MAP_DISABLE; + + r128SetTexWrap(t, tObj->WrapS, tObj->WrapT); + r128SetTexFilter(t, tObj->MinFilter, tObj->MagFilter); + r128SetTexBorderColor(t, tObj->BorderColor); + + tObj->DriverData = t; + + make_empty_list(t); + + return t; +} + +/* Destroy hardware state associated with texture `t' */ +/* NOTE: This function can be called while holding the hardware lock and + while not holding the lock*/ +void r128DestroyTexObj(r128ContextPtr r128ctx, r128TexObjPtr t) +{ + if (!t) return; + + if (t->memBlock) { + mmFreeMem(t->memBlock); + t->memBlock = NULL; + } + + if (t->tObj) t->tObj->DriverData = NULL; + if (t->bound) r128ctx->CurrentTexObj[t->bound-1] = NULL; + + remove_from_list(t); + free(t); +} + +/* Keep track of swapped out texture objects */ +/* NOTE: This function is only called while holding the hardware lock */ +static void r128SwapOutTexObj(r128ContextPtr r128ctx, r128TexObjPtr t) +{ + if (t->memBlock) { + mmFreeMem(t->memBlock); + t->memBlock = NULL; + } + + t->dirty_images = ~0; + move_to_tail(&r128ctx->SwappedOut, t); +} + +/* Print out debugging information about texture LRU */ +void r128PrintLocalLRU(r128ContextPtr r128ctx, int heap) +{ + r128TexObjPtr t; + int sz = 1 << (r128ctx->r128Screen->log2TexGran[heap]); + + foreach(t, &r128ctx->TexObjList[heap]) { + if (!t->tObj) { + fprintf(stderr, "Placeholder %d at 0x%x sz 0x%x\n", + t->memBlock->ofs / sz, + t->memBlock->ofs, + t->memBlock->size); + } else { + fprintf(stderr, "Texture (bound %d) at 0x%x sz 0x%x\n", + t->bound, + t->memBlock->ofs, + t->memBlock->size); + } + } +} + +void r128PrintGlobalLRU(r128ContextPtr r128ctx, int heap) +{ + R128TexRegion *list = r128ctx->r128Screen->SAREA->texList[heap]; + int i, j; + + for (i = 0, j = R128_NR_TEX_REGIONS ; i < R128_NR_TEX_REGIONS ; i++) { + fprintf(stderr, "list[%d] age %d next %d prev %d\n", + j, list[j].age, list[j].next, list[j].prev); + j = list[j].next; + if (j == R128_NR_TEX_REGIONS) break; + } + + if (j != R128_NR_TEX_REGIONS) { + fprintf(stderr, "Loop detected in global LRU\n"); + } +} + +/* Reset the global texture LRU */ +/* NOTE: This function is only called while holding the hardware lock */ +static void r128ResetGlobalLRU(r128ContextPtr r128ctx, int heap) +{ + R128TexRegion *list = r128ctx->r128Screen->SAREA->texList[heap]; + int log2sz = 1 << r128ctx->r128Screen->log2TexGran[heap]; + int i; + + /* + * (Re)initialize the global circular LRU list. The last element in + * the array (R128_NR_TEX_REGIONS) is the sentinal. Keeping it at + * the end of the array allows it to be addressed rationally when + * looking up objects at a particular location in texture memory. + */ + + for (i = 0; (i+1) * log2sz <= r128ctx->r128Screen->texSize[heap]; i++) { + list[i].prev = i-1; + list[i].next = i+1; + list[i].age = 0; + } + + i--; + list[0].prev = R128_NR_TEX_REGIONS; + list[i].prev = i-1; + list[i].next = R128_NR_TEX_REGIONS; + list[R128_NR_TEX_REGIONS].prev = i; + list[R128_NR_TEX_REGIONS].next = 0; + r128ctx->r128Screen->SAREA->texAge[heap] = 0; +} + +/* Update the local and glock texture LRUs */ +/* NOTE: This function is only called while holding the hardware lock */ +static void r128UpdateTexLRU(r128ContextPtr r128ctx, r128TexObjPtr t) +{ + int heap = t->heap; + R128TexRegion *list = r128ctx->r128Screen->SAREA->texList[heap]; + int log2sz = r128ctx->r128Screen->log2TexGran[heap]; + + int start = t->memBlock->ofs >> log2sz; + int end = (t->memBlock->ofs + t->memBlock->size-1) >> log2sz; + int i; + + r128ctx->lastTexAge[heap] = ++r128ctx->r128Screen->SAREA->texAge[heap]; + + /* Update our local LRU */ + move_to_head(&r128ctx->TexObjList[heap], t); + + /* Update the global LRU */ + for (i = start ; i <= end ; i++) { + list[i].in_use = 1; + list[i].age = r128ctx->lastTexAge[heap]; + + /* remove_from_list(i) */ + list[(CARD32)list[i].next].prev = list[i].prev; + list[(CARD32)list[i].prev].next = list[i].next; + + /* insert_at_head(list, i) */ + list[i].prev = R128_NR_TEX_REGIONS; + list[i].next = list[R128_NR_TEX_REGIONS].next; + list[(CARD32)list[R128_NR_TEX_REGIONS].next].prev = i; + list[R128_NR_TEX_REGIONS].next = i; + } +} + +/* Update our notion of what textures have been changed since we last + held the lock. This pertains to both our local textures and the + textures belonging to other clients. Keep track of other client's + textures by pushing a placeholder texture onto the LRU list -- these + are denoted by (tObj == NULL). */ +/* NOTE: This function is only called while holding the hardware lock */ +static void r128TexturesGone(r128ContextPtr r128ctx, int heap, + int offset, int size, int in_use) +{ + r128TexObjPtr t, tmp; + + foreach_s (t, tmp, &r128ctx->TexObjList[heap]) { + if (t->memBlock->ofs >= offset + size || + t->memBlock->ofs + t->memBlock->size <= offset) + continue; + + /* It overlaps - kick it out. Need to hold onto the currently + bound objects, however. */ + if (t->bound) r128SwapOutTexObj(r128ctx, t); + else r128DestroyTexObj(r128ctx, t); + } + + if (in_use) { + t = (r128TexObjPtr) calloc(1,sizeof(*t)); + if (!t) return; + + t->memBlock = mmAllocMem(r128ctx->texHeap[heap], size, 0, offset); + insert_at_head(&r128ctx->TexObjList[heap], t); + } +} + +/* Update our client's shared texture state. If another client has + modified a region in which we have textures, then we need to figure + out which of our textures has been removed, and update our global + LRU. */ +void r128AgeTextures(r128ContextPtr r128ctx, int heap) +{ + R128SAREAPrivPtr sarea = r128ctx->r128Screen->SAREA; + + if (sarea->texAge[heap] != r128ctx->lastTexAge[heap]) { + int log2sz = 1 << r128ctx->r128Screen->log2TexGran[heap]; + int nr = 0; + int idx; + + for (idx = sarea->texList[heap][R128_NR_TEX_REGIONS].prev; + idx != R128_NR_TEX_REGIONS && nr < R128_NR_TEX_REGIONS; + idx = sarea->texList[heap][idx].prev, nr++) { + + /* If switching texturing schemes, then the SAREA might not + have been properly cleared, so we need to reset the + global texture LRU. */ + if (idx * log2sz > r128ctx->r128Screen->texSize[heap]) { + nr = R128_NR_TEX_REGIONS; + break; + } + + if (sarea->texList[heap][idx].age > r128ctx->lastTexAge[heap]) + r128TexturesGone(r128ctx, heap, idx * log2sz, log2sz, + sarea->texList[heap][idx].in_use); + } + + if (nr == R128_NR_TEX_REGIONS) { + r128TexturesGone(r128ctx, heap, + 0, r128ctx->r128Screen->texSize[heap], 0); + r128ResetGlobalLRU(r128ctx, heap); + } + + r128ctx->dirty |= R128_UPDATE_TEX0IMAGES; + r128ctx->dirty |= R128_UPDATE_TEX1IMAGES; + r128ctx->lastTexAge[heap] = sarea->texAge[heap]; + } +} + +/* Convert a block of Mesa-formatted texture to an 8bpp hardware format */ +static void r128ConvertTexture8bpp(r128ContextPtr r128ctx, + struct gl_texture_image *image, + int x, int y, int width, int height, + int pitch) +{ + CARD8 *src; + CARD32 pix; + int i, j; + + switch (image->Format) { + case GL_RGB: + for (i = 0; i < height; i++) { + src = (CARD8 *)image->Data + ((y + i) * pitch + x) * 3; + for (j = width >> 2; j; j--) { + pix = ((R128PACKCOLOR332( src[0], src[1], src[2]) ) | + (R128PACKCOLOR332( src[3], src[4], src[5]) << 8) | + (R128PACKCOLOR332( src[6], src[7], src[8]) << 16) | + (R128PACKCOLOR332( src[9], src[10], src[11]) << 24)); + R128CCE(pix); + src += 12; + } + } + break; + + case GL_ALPHA: + case GL_LUMINANCE: + case GL_INTENSITY: + case GL_COLOR_INDEX: + for (i = 0; i < height; i++) { + src = (CARD8 *)image->Data + ((y + i) * pitch + x); + for (j = width >> 2; j; j--) { + pix = src[0] | (src[1] << 8) | (src[2] << 16) | (src[3] << 24); + R128CCE(pix); + src += 4; + } + } + break; + + default: + fprintf(stderr, "r128ConvertTexture8bpp: unsupported format 0x%x\n", + image->Format); + } +} + +/* Convert a block of Mesa-formatted texture to a 16bpp hardware format */ +static void r128ConvertTexture16bpp(r128ContextPtr r128ctx, + struct gl_texture_image *image, + int x, int y, int width, int height, + int pitch) +{ + CARD8 *src; + CARD32 pix; + int i, j; + + switch (image->Format) { + case GL_RGB: + for (i = 0; i < height; i++) { + src = (CARD8 *)image->Data + ((y + i) * pitch + x) * 3; + for (j = width >> 1; j; j--) { + pix = ((R128PACKCOLOR565(src[0], src[1], src[2]) ) | + (R128PACKCOLOR565(src[3], src[4], src[5]) << 16)); + R128CCE(pix); + src += 6; + } + } + break; + + case GL_RGBA: + for (i = 0; i < height; i++) { + src = (CARD8 *)image->Data + ((y + i) * pitch + x) * 4; + for (j = width >> 1; j; j--) { + pix = + ((R128PACKCOLOR4444(src[0], src[1], src[2], src[3]) ) | + (R128PACKCOLOR4444(src[4], src[5], src[6], src[7])<<16)); + R128CCE(pix); + src += 8; + } + } + break; + + case GL_ALPHA: + for (i = 0; i < height; i++) { + src = (CARD8 *)image->Data + ((y + i) * pitch + x); + for (j = width >> 1; j; j--) { + pix = ((R128PACKCOLOR4444(0xff, 0xff, 0xff, src[0]) ) | + (R128PACKCOLOR4444(0xff, 0xff, 0xff, src[1]) << 16)); + R128CCE(pix); + src += 2; + } + } + break; + + case GL_LUMINANCE: + for (i = 0; i < height; i++) { + src = (CARD8 *)image->Data + ((y + i) * pitch + x); + for (j = width >> 1; j; j--) { + pix = ((R128PACKCOLOR1555(src[0], src[0], src[0], 0xff) ) | + (R128PACKCOLOR1555(src[1], src[1], src[1], 0xff)<<16)); + R128CCE(pix); + src += 2; + } + } + break; + + case GL_LUMINANCE_ALPHA: + for (i = 0; i < height; i++) { + src = (CARD8 *)image->Data + ((y + i) * pitch + x) * 2; + for (j = width >> 1; j; j--) { + pix = + ((R128PACKCOLOR4444(src[0], src[0], src[0], src[1]) ) | + (R128PACKCOLOR4444(src[2], src[2], src[2], src[3])<<16)); + R128CCE(pix); + src += 4; + } + } + break; + + case GL_INTENSITY: + for (i = 0; i < height; i++) { + src = (CARD8 *)image->Data + ((y + i) * pitch + x); + for (j = width >> 1; j; j--) { + pix = + ((R128PACKCOLOR4444(src[0], src[0], src[0], src[0]) ) | + (R128PACKCOLOR4444(src[1], src[1], src[1], src[1])<<16)); + R128CCE(pix); + src += 2; + } + } + break; + + default: + fprintf(stderr, "r128ConvertTexture16bpp: unsupported format 0x%x\n", + image->Format); + } +} + +/* Convert a block of Mesa-formatted texture to a 32bpp hardware format */ +static void r128ConvertTexture32bpp(r128ContextPtr r128ctx, + struct gl_texture_image *image, + int x, int y, int width, int height, + int pitch) +{ + CARD8 *src; + CARD32 pix; + int i, j; + + switch (image->Format) { + case GL_RGB: + for (i = 0; i < height; i++) { + src = (CARD8 *)image->Data + ((y + i) * pitch + x) * 3; + for (j = width; j; j--) { + pix = R128PACKCOLOR8888(src[0], src[1], src[2], 0xff); + R128CCE(pix); + src += 3; + } + } + break; + + case GL_RGBA: + for (i = 0; i < height; i++) { + src = (CARD8 *)image->Data + ((y + i) * pitch + x) * 4; + for (j = width; j; j--) { + pix = R128PACKCOLOR8888(src[0], src[1], src[2], src[3]); + R128CCE(pix); + src += 4; + } + } + break; + + case GL_ALPHA: + for (i = 0; i < height; i++) { + src = (CARD8 *)image->Data + ((y + i) * pitch + x); + for (j = width; j; j--) { + pix = R128PACKCOLOR8888(0xff, 0xff, 0xff, src[0]); + R128CCE(pix); + src += 1; + } + } + break; + + case GL_LUMINANCE: + for (i = 0 ; i < height ; i++) { + src = (CARD8 *)image->Data + ((y + i) * pitch + x); + for (j = width; j; j--) { + pix = R128PACKCOLOR8888(src[0], src[0], src[0], 0xff); + R128CCE(pix); + src += 1; + } + } + break; + + case GL_LUMINANCE_ALPHA: + for (i = 0; i < height; i++) { + src = (CARD8 *)image->Data + ((y + i) * pitch + x) * 2; + for (j = width; j; j-- ) { + pix = R128PACKCOLOR8888(src[0], src[0], src[0], src[1]); + R128CCE(pix); + src += 2; + } + } + break; + + case GL_INTENSITY: + for (i = 0; i < height; i++) { + src = (CARD8 *)image->Data + ((y + i) * pitch + x); + for (j = width; j; j--) { + pix = R128PACKCOLOR8888(src[0], src[0], src[0], src[0]); + R128CCE(pix); + src += 1; + } + } + break; + + default: + fprintf(stderr, "r128ConvertTexture32bpp: unsupported format 0x%x\n", + image->Format); + } +} + +/* Upload the texture image associated with texture `t' at level `level' + at the address relative to `start'. */ +/* NOTE: This function is only called while holding the hardware lock */ +static void r128UploadSubImage(r128ContextPtr r128ctx, + r128TexObjPtr t, int level, + int x, int y, int width, int height) +{ + struct gl_texture_image *image; + int texelsPerDword = 0; + int imageWidth, imageHeight; + int remaining, rows; + int format, pitch, dwords; + CARD32 offset; + + /* Ensure we have a valid texture to upload */ + if (level < 0 || level > R128_TEX_MAXLEVELS) return; + if (!(image = t->tObj->Image[level])) return; + + /* FIXME: support RGB888 (i.e., 24bpp) textures? */ + switch (t->texelBytes) { + case 1: texelsPerDword = 4; break; + case 2: texelsPerDword = 2; break; + case 4: texelsPerDword = 1; break; + } + + imageWidth = image->Width; + imageHeight = image->Height; + + format = t->textureFormat >> 16; + + /* The texel upload routines have a minimum width, so force the size + if needed */ + if (imageWidth < texelsPerDword) { + int factor; + + factor = texelsPerDword / imageWidth; + imageWidth = texelsPerDword; + imageHeight /= factor; + if (imageHeight == 0) { + /* In this case, the texel converter will actually walk a + texel or two off the end of the image, but normal malloc + alignment should prevent it from ever causing a fault. */ + imageHeight = 1; + } + } + + /* We can't upload to a pitch less than 8 texels so we will need to + linearly upload all modified rows for textures smaller than this. + This makes the x/y/width/height different for the blitter and the + texture walker. */ + if (imageWidth >= 8) { + /* The texture walker and the blitter look identical */ + pitch = imageWidth >> 3; + } else { + int factor; + int y2; + int start, end; + + start = (y * imageWidth) & ~7; + end = (y + height) * imageWidth; + + if (end - start < 8) { + /* Handle the case where the total number of texels uploaded + is < 8 */ + x = 0; + y = start / 8; + width = end - start; + height = 1; + } else { + /* Upload some number of full 8 texel blit rows */ + factor = 8 / imageWidth; + + y2 = y + height - 1; + y /= factor; + y2 /= factor; + + x = 0; + width = 8; + height = y2 - y + 1; + } + + /* Fixed pitch of 8 */ + pitch = 1; + } + + dwords = width * height / texelsPerDword; + offset = (CARD32)(t->bufAddr + t->image[level].offset); + + /* Fix offset for AGP textures */ + if (t->heap == R128_AGP_TEX_HEAP) + offset += R128_AGP_TEX_OFFSET + r128ctx->r128Screen->agpTexOffset; + + if (R128_DEBUG_FLAGS & DEBUG_VERBOSE_API) { + fprintf(stderr, "r128UploadSubImage: %d,%d of %d,%d at %d,%d\n", + width, height, image->Width, image->Height, x, y); + fprintf(stderr, " blit ofs: 0x%08x pitch: 0x%x dwords: %d " + "level: %d format: %x\n", + (int)offset, pitch, dwords, level, format); + } + + /* Subdivide the texture if required */ + if (dwords < R128_CCE_PACKET_MAX_DWORDS) { + rows = height; + } else { + rows = (R128_CCE_PACKET_MAX_DWORDS * texelsPerDword) / (2 * width); + } + + /* Flush the pixel cache, and mark the contents as Read Invalid */ + R128CCE0(R128_CCE_PACKET0, R128_PC_GUI_CTLSTAT, 0); + R128CCE(r128ctx->regs.pc_gui_ctlstat | + R128_PC_RI_GUI | + R128_PC_FLUSH_GUI); + R128CCE_SUBMIT_PACKETS(); + + /* Build the CCE host data blit header */ + R128CCE3(R128_CCE_PACKET3_CNTL_HOSTDATA_BLT, 0); + + /* DP_GUI_MASTER_CNTL */ + R128CCE(R128_GMC_DST_PITCH_OFFSET_CNTL | + R128_GMC_BRUSH_NONE | + (format << 8) | + R128_GMC_SRC_DATATYPE_COLOR | + R128_ROP3_S | + R128_DP_SRC_SOURCE_HOST_DATA | + R128_GMC_CLR_CMP_CNTL_DIS | + R128_AUX_CLIP_DIS | + R128_GMC_WR_MSK_DIS ); + + /* DST_OFFSET_PITCH - fixed at the moment until we get better ring + control */ + R128CCE((pitch << 21) | (offset>>5)); + + /* FRGD_COLOR, BKGD_COLOR */ + R128CCE(0xffffffff); + R128CCE(0xffffffff); + + for (remaining = height; remaining > 0; remaining -= rows, y += rows) { + height = (remaining >= rows) ? rows : remaining; + dwords = width * height / texelsPerDword; + + if (R128_DEBUG_FLAGS & DEBUG_VERBOSE_API) { + fprintf(stderr, " blitting: %d,%d at %d,%d - %d dwords\n", + width, height, x, y, dwords); + } + + r128ctx->CCEbuf[0] &= ~R128_CCE_PACKET_COUNT_MASK; + r128ctx->CCEbuf[0] |= (dwords + 6) << 16; + + /* Blit coords, size */ + R128CCE((y << 16) | x); + R128CCE((height << 16) | width); + R128CCE(dwords); + + /* Actually do the texture conversion */ + switch (t->texelBytes) { + case 1: + r128ConvertTexture8bpp(r128ctx, image, + x, y, width, height, width); + break; + case 2: + r128ConvertTexture16bpp(r128ctx, image, + x, y, width, height, width); + break; + case 4: + r128ConvertTexture32bpp(r128ctx, + image, x, y, width, height, width); + break; + } + + /* Flush the pixel cache */ + R128CCE0(R128_CCE_PACKET0, R128_PC_GUI_CTLSTAT, 0 ); + R128CCE(r128ctx->regs.pc_gui_ctlstat | R128_PC_FLUSH_GUI); + + /* Save the partial blit header */ + R128CCE_SUBMIT_PACKETS(); + r128ctx->CCEcount = 5; + } + + /* Clean up CCE ring buffer */ + r128ctx->CCEcount = 0; +} + +/* Upload the texture images associated with texture `t'. This might + require removing our own and/or other client's texture objects to + make room for these images. */ +/* NOTE: This function is only called while holding the hardware lock */ +int r128UploadTexImages(r128ContextPtr r128ctx, r128TexObjPtr t) +{ + int i; + int minLevel; + int maxLevel; + int heap; + + if (!t) return 0; + + /* Choose the heap appropriately */ + heap = t->heap = R128_LOCAL_TEX_HEAP; + if (!r128ctx->r128Screen->IsPCI && + t->totalSize > r128ctx->r128Screen->texSize[heap]) + heap = t->heap = R128_AGP_TEX_HEAP; + + /* Do we need to eject LRU texture objects? */ + if (!t->memBlock) { + /* Allocate a memory block on a 4k boundary (1<<12 == 4096) */ + t->memBlock = mmAllocMem(r128ctx->texHeap[heap], t->totalSize, 12, 0); + + /* Try AGP before kicking anything out of local mem */ + if (!t->memBlock && heap == R128_LOCAL_TEX_HEAP) { + t->memBlock = mmAllocMem(r128ctx->texHeap[R128_AGP_TEX_HEAP], + t->totalSize, 12, 0); + + if (t->memBlock) heap = t->heap = R128_AGP_TEX_HEAP; + } + + /* Kick out textures until the requested texture fits */ + while (!t->memBlock) { + if (r128ctx->TexObjList[heap].prev->bound) { + fprintf(stderr, + "r128UploadTexImages: ran into bound texture\n"); + return -1; + } + if (r128ctx->TexObjList[heap].prev == + &(r128ctx->TexObjList[heap])) { + if (r128ctx->r128Screen->IsPCI) { + fprintf(stderr, "r128UploadTexImages: upload texture " + "failure on local texture heaps, sz=%d\n", + t->totalSize); + return -1; + } else if (heap == R128_LOCAL_TEX_HEAP) { + heap = t->heap = R128_AGP_TEX_HEAP; + continue; + } else { + fprintf(stderr, "r128UploadTexImages: upload texture " + "failure on both local and AGP texture heaps, " + "sz=%d\n", + t->totalSize); + return -1; + } + } + + r128DestroyTexObj(r128ctx, r128ctx->TexObjList[heap].prev); + + t->memBlock = mmAllocMem(r128ctx->texHeap[heap], + t->totalSize, 12, 0); + } + + /* Set the base offset of the texture image */ + t->bufAddr = (unsigned char *)r128ctx->r128Screen->texOffset[heap]; + t->bufAddr += t->memBlock->ofs; + + maxLevel = ((t->regs.size_pitch & R128_TEX_SIZE_MASK) >> + R128_TEX_SIZE_SHIFT); + minLevel = ((t->regs.size_pitch & R128_TEX_MIN_SIZE_MASK) >> + R128_TEX_MIN_SIZE_SHIFT); + + /* Update the hardware's texture image addresses */ + switch (t->bound) { + case 1: + /* Set texture offsets */ + if (t->regs.tex_cntl & R128_MIP_MAP_DISABLE) { + for (i = 0; i < R128_TEX_MAXLEVELS; i++) + r128ctx->regs.prim_tex_offset[i] = (CARD32)t->bufAddr; + } else { + for (i = maxLevel; i >= minLevel; i--) + r128ctx->regs.prim_tex_offset[i] = + t->image[maxLevel-i].offset + (CARD32)t->bufAddr; + } + /* Fix AGP texture offsets */ + if (heap == R128_AGP_TEX_HEAP) + for (i = 0; i < R128_TEX_MAXLEVELS; i++) + r128ctx->regs.prim_tex_offset[i] += + R128_AGP_TEX_OFFSET + + r128ctx->r128Screen->agpTexOffset; + /* Force loading the new state into the hardware */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_TEX0STATE; + break; + + case 2: + /* Set texture offsets */ + if (t->regs.tex_cntl & R128_MIP_MAP_DISABLE) { + for (i = 0; i < R128_TEX_MAXLEVELS; i++) + r128ctx->regs.sec_tex_offset[i] = (CARD32)t->bufAddr; + } else { + for (i = maxLevel; i >= minLevel; i--) + r128ctx->regs.sec_tex_offset[i] = + t->image[maxLevel-i].offset + (CARD32)t->bufAddr; + } + /* Fix AGP texture offsets */ + if (heap == R128_AGP_TEX_HEAP) + for (i = 0; i < R128_TEX_MAXLEVELS; i++) + r128ctx->regs.sec_tex_offset[i] += + R128_AGP_TEX_OFFSET + + r128ctx->r128Screen->agpTexOffset; + /* Force loading the new state into the hardware */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_TEX1STATE; + break; + + default: + return -1; + } + } + + /* Let the world know we've used this memory recently */ + r128UpdateTexLRU(r128ctx, t); + + /* Upload any images that are new */ + if (t->dirty_images) { + int num_levels = (((t->regs.size_pitch & R128_TEX_SIZE_MASK) >> + R128_TEX_SIZE_SHIFT) - + ((t->regs.size_pitch & R128_TEX_MIN_SIZE_MASK) >> + R128_TEX_MIN_SIZE_SHIFT)); + + for (i = 0; i <= num_levels; i++) { + if (t->dirty_images & (1<<i)) { + r128UploadSubImage(r128ctx, t, i, 0, 0, + t->image[i].width, t->image[i].height); + } + } + + r128ctx->regs.tex_cntl_c |= R128_TEX_CACHE_FLUSH; + + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_ENGINESTATE; + } + + t->dirty_images = 0; + return 0; +} + +/* Update the hardware state for texture unit 0 */ +/* NOTE: This function is only called while holding the hardware lock */ +static void r128UpdateTex0State(r128ContextPtr r128ctx) +{ + GLcontext *ctx = r128ctx->glCtx; + r128TexObjPtr t; + struct gl_texture_object *tObj; + int i; + CARD32 tex_size_pitch, tex_combine_cntl; + + /* Only update the hardware texture state if the texture is current, + complete and enabled. */ + if (!(tObj = ctx->Texture.Unit[0].Current)) return; + if ((tObj != ctx->Texture.Unit[0].CurrentD[2]) && + (tObj != ctx->Texture.Unit[0].CurrentD[1])) return; + if (!tObj->Complete) return; + + /* If neither tex0 nor tex1 is enabled, then disable tex0. However, + if tex1 is enabled but tex0 is disabled, then we need to enable + tex0 and have it to copy the input (see how tex_combine_cntl is + setup below). */ + if (!(ctx->Texture.Enabled & (ENABLE_TEX0 | ENABLE_TEX1))) { + r128ctx->regs.tex_cntl_c &= ~R128_TEXMAP_ENABLE; + return; + } + + /* If this is the first time the texture has been used, then create + a new texture object for it. */ + t = tObj->DriverData; + if (!t) t = r128CreateTexObj(r128ctx, tObj); + if (!t) return; + + if (R128_DEBUG_FLAGS & DEBUG_VERBOSE_API) + fprintf(stderr, "r128UpdateTex0State(%p, 0x%08x)\n", + tObj, (int)t->dirty_images); + + /* Force any texture images to be loaded into the hardware */ + if (t->dirty_images) r128ctx->dirty |= R128_UPDATE_TEX0IMAGES; + + /* Bind texture to texture 0 unit */ + r128ctx->CurrentTexObj[0] = t; + t->bound = 1; + + if (t->memBlock) r128UpdateTexLRU(r128ctx, t); + + /* Set the texture environment state */ + switch (ctx->Texture.Unit[0].EnvMode) { + case GL_REPLACE: + switch (tObj->Image[0]->Format) { + case GL_RGBA: + case GL_LUMINANCE_ALPHA: + case GL_INTENSITY: + tex_combine_cntl = (R128_COMB_DIS | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_DIS | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + break; + case GL_RGB: + case GL_LUMINANCE: + tex_combine_cntl = (R128_COMB_DIS | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_COPY_INP | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + break; + case GL_ALPHA: + tex_combine_cntl = (R128_COMB_COPY_INP | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_DIS | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + break; + case GL_COLOR_INDEX: + default: + return; + } + break; + + case GL_BLEND: + switch (tObj->Image[0]->Format) { + case GL_RGBA: + case GL_LUMINANCE_ALPHA: + switch (r128ctx->regs.constant_color_c & + R128_CONSTANT_COLOR_MASK) { + case R128_CONSTANT_COLOR_ZERO: + tex_combine_cntl = (R128_COMB_MODULATE | + R128_COLOR_FACTOR_NTEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_MODULATE | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + break; + case R128_CONSTANT_COLOR_ONE: + default: + tex_combine_cntl = (R128_COMB_MODULATE | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_MODULATE | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + r128ctx->Fallback |= R128_FALLBACK_TEXTURE; + break; + } + break; + case GL_RGB: + case GL_LUMINANCE: + switch (r128ctx->regs.constant_color_c & + R128_CONSTANT_COLOR_MASK) { + case R128_CONSTANT_COLOR_ZERO: + tex_combine_cntl = (R128_COMB_MODULATE | + R128_COLOR_FACTOR_NTEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_COPY_INP | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + break; + case R128_CONSTANT_COLOR_ONE: + default: + tex_combine_cntl = (R128_COMB_MODULATE | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_COPY_INP | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + r128ctx->Fallback |= R128_FALLBACK_TEXTURE; + break; + } + break; + case GL_ALPHA: + tex_combine_cntl = (R128_COMB_COPY_INP | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_MODULATE | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + break; + case GL_INTENSITY: + switch (r128ctx->regs.constant_color_c & + R128_CONSTANT_COLOR_MASK) { + case R128_CONSTANT_COLOR_ZERO: + tex_combine_cntl = (R128_COMB_MODULATE | + R128_COLOR_FACTOR_NTEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_MODULATE | + R128_ALPHA_FACTOR_NTEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + break; + case R128_CONSTANT_COLOR_ONE: + default: + tex_combine_cntl = (R128_COMB_MODULATE | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_MODULATE | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + r128ctx->Fallback |= R128_FALLBACK_TEXTURE; + break; + } + break; + case GL_COLOR_INDEX: + default: + return; + } + break; + + case GL_MODULATE: + switch (tObj->Image[0]->Format) { + case GL_RGBA: + case GL_LUMINANCE_ALPHA: + case GL_INTENSITY: + tex_combine_cntl = (R128_COMB_MODULATE | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_MODULATE | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + break; + case GL_RGB: + case GL_LUMINANCE: + tex_combine_cntl = (R128_COMB_MODULATE | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_COPY_INP | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + break; + case GL_ALPHA: + tex_combine_cntl = (R128_COMB_COPY_INP | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_MODULATE | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + break; + case GL_COLOR_INDEX: + default: + return; + } + break; + + case GL_DECAL: + switch (tObj->Image[0]->Format) { + case GL_RGBA: + tex_combine_cntl = (R128_COMB_BLEND_TEXTURE | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_COPY_INP | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + break; + case GL_RGB: + tex_combine_cntl = (R128_COMB_DIS | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_COPY_INP | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + break; + case GL_ALPHA: + case GL_LUMINANCE: + case GL_LUMINANCE_ALPHA: + case GL_INTENSITY: + /* Undefined behaviour - just copy the input */ + tex_combine_cntl = (R128_COMB_COPY_INP | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_COPY_INP | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + break; + case GL_COLOR_INDEX: + default: + return; + } + break; + + case GL_ADD: + switch (tObj->Image[0]->Format) { + case GL_RGBA: + case GL_LUMINANCE_ALPHA: + case GL_INTENSITY: + tex_combine_cntl = (R128_COMB_ADD | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_MODULATE | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + break; + case GL_RGB: + case GL_LUMINANCE: + tex_combine_cntl = (R128_COMB_ADD | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_COPY_INP | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + break; + case GL_ALPHA: + tex_combine_cntl = (R128_COMB_COPY_INP | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_MODULATE | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + break; + case GL_COLOR_INDEX: + default: + return; + } + break; + + default: + return; + } + + /* If tex0 is disabled, then make sure it just copies the input */ + if (!(ctx->Texture.Enabled & ENABLE_TEX0)) + tex_combine_cntl = (R128_COMB_COPY_INP | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_INT_COLOR | + R128_COMB_ALPHA_COPY_INP | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_INT_ALPHA); + + /* Enable tex0 */ + r128ctx->regs.tex_cntl_c |= R128_TEXMAP_ENABLE; + + tex_size_pitch = r128ctx->regs.tex_size_pitch_c; + tex_size_pitch &= ~R128_TEX_SIZE_PITCH_MASK; + tex_size_pitch |= t->regs.size_pitch << R128_TEX_SIZE_PITCH_SHIFT; + + /* Set the primary texture state in r128ctx->regs */ + r128ctx->regs.prim_tex_cntl_c = t->regs.tex_cntl; + r128ctx->regs.prim_texture_combine_cntl_c = tex_combine_cntl; + r128ctx->regs.tex_size_pitch_c = tex_size_pitch; + r128ctx->regs.prim_texture_border_color_c = t->regs.border_color; + + /* Set texture offsets */ + if (t->regs.tex_cntl & R128_MIP_MAP_DISABLE) { + for (i = 0; i < R128_TEX_MAXLEVELS; i++) + r128ctx->regs.prim_tex_offset[i] = (CARD32)t->bufAddr; + } else { + int maxLevel = ((t->regs.size_pitch & R128_TEX_SIZE_MASK) >> + R128_TEX_SIZE_SHIFT); + int minLevel = ((t->regs.size_pitch & R128_TEX_MIN_SIZE_MASK) >> + R128_TEX_MIN_SIZE_SHIFT); + for (i = maxLevel; i >= minLevel; i--) + r128ctx->regs.prim_tex_offset[i] = + t->image[maxLevel-i].offset + (CARD32)t->bufAddr; + } + /* Fix AGP texture offsets */ + if (t->heap == R128_AGP_TEX_HEAP) + for (i = 0; i < R128_TEX_MAXLEVELS; i++) + r128ctx->regs.prim_tex_offset[i] += + R128_AGP_TEX_OFFSET + r128ctx->r128Screen->agpTexOffset; + + /* Force loading the new state into the hardware */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_TEX0STATE | R128_CTX_ENGINESTATE; +} + +/* Update the hardware state for texture unit 1 */ +/* NOTE: This function is only called while holding the hardware lock */ +static void r128UpdateTex1State(r128ContextPtr r128ctx) +{ + GLcontext *ctx = r128ctx->glCtx; + r128TexObjPtr t; + struct gl_texture_object *tObj; + int i; + CARD32 tex_size_pitch, tex_combine_cntl, tex_cntl; + + /* Only update the hardware texture state if the texture is current, + complete and enabled. */ + if (!(tObj = ctx->Texture.Unit[1].Current)) return; + if ((tObj != ctx->Texture.Unit[1].CurrentD[2]) && + (tObj != ctx->Texture.Unit[1].CurrentD[1])) return; + if (!tObj->Complete) return; + + /* If tex1 is not enabled, then disable it */ + if (!(ctx->Texture.Enabled & ENABLE_TEX1)) { + r128ctx->regs.tex_cntl_c &= ~R128_SEC_TEXMAP_ENABLE; + return; + } + + /* If this is the first time the texture has been used, then create + a new texture object for it. */ + t = tObj->DriverData; + if (!t) t = r128CreateTexObj(r128ctx, tObj); + if (!t) return; + + if (R128_DEBUG_FLAGS & DEBUG_VERBOSE_API) + fprintf(stderr, "r128UpdateTex1State(%p, 0x%08x)\n", + tObj, (int)t->dirty_images); + + /* Force any texture images to be loaded into the hardware */ + if (t->dirty_images) r128ctx->dirty |= R128_UPDATE_TEX1IMAGES; + + /* Bind texture to texture 1 unit */ + r128ctx->CurrentTexObj[1] = t; + t->bound = 2; + + if (t->memBlock) r128UpdateTexLRU(r128ctx, t); + + /* Set the texture environment state */ + switch (ctx->Texture.Unit[1].EnvMode) { + case GL_REPLACE: + switch (tObj->Image[0]->Format) { + case GL_RGBA: + case GL_LUMINANCE_ALPHA: + case GL_INTENSITY: + tex_combine_cntl = (R128_COMB_DIS | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_DIS | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA); + break; + case GL_RGB: + case GL_LUMINANCE: + tex_combine_cntl = (R128_COMB_DIS | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_COPY_INP | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA); + break; + case GL_ALPHA: + tex_combine_cntl = (R128_COMB_COPY_INP | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_DIS | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA); + break; + case GL_COLOR_INDEX: + default: + return; + } + break; + + case GL_BLEND: + switch (tObj->Image[0]->Format) { + case GL_RGBA: + case GL_LUMINANCE_ALPHA: + switch ( r128ctx->regs.constant_color_c & R128_CONSTANT_COLOR_MASK ) { + case R128_CONSTANT_COLOR_ZERO: + tex_combine_cntl = (R128_COMB_MODULATE | + R128_COLOR_FACTOR_NTEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_MODULATE | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA); + break; + case R128_CONSTANT_COLOR_ONE: + default: + tex_combine_cntl = (R128_COMB_MODULATE | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_MODULATE | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA); + r128ctx->Fallback |= R128_FALLBACK_TEXTURE; + break; + } + break; + case GL_RGB: + case GL_LUMINANCE: + switch (r128ctx->regs.constant_color_c & + R128_CONSTANT_COLOR_MASK) { + case R128_CONSTANT_COLOR_ZERO: + tex_combine_cntl = (R128_COMB_MODULATE | + R128_COLOR_FACTOR_NTEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_COPY_INP | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA ); + break; + case R128_CONSTANT_COLOR_ONE: + default: + tex_combine_cntl = (R128_COMB_MODULATE | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_COPY_INP | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA ); + r128ctx->Fallback |= R128_FALLBACK_TEXTURE; + break; + } + break; + case GL_ALPHA: + tex_combine_cntl = (R128_COMB_COPY_INP | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_MODULATE | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA); + break; + case GL_INTENSITY: + switch (r128ctx->regs.constant_color_c & + R128_CONSTANT_COLOR_MASK) { + case R128_CONSTANT_COLOR_ZERO: + tex_combine_cntl = (R128_COMB_MODULATE | + R128_COLOR_FACTOR_NTEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_MODULATE | + R128_ALPHA_FACTOR_NTEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA); + break; + case R128_CONSTANT_COLOR_ONE: + default: + tex_combine_cntl = (R128_COMB_MODULATE | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_MODULATE | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA); + r128ctx->Fallback |= R128_FALLBACK_TEXTURE; + break; + } + break; + case GL_COLOR_INDEX: + default: + return; + } + break; + + case GL_MODULATE: + switch (tObj->Image[0]->Format) { + case GL_RGBA: + case GL_LUMINANCE_ALPHA: + case GL_INTENSITY: + tex_combine_cntl = (R128_COMB_MODULATE | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_MODULATE | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA); + break; + case GL_RGB: + case GL_LUMINANCE: + tex_combine_cntl = (R128_COMB_MODULATE | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_COPY_INP | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA); + break; + case GL_ALPHA: + tex_combine_cntl = (R128_COMB_COPY_INP | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_MODULATE | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA); + break; + case GL_COLOR_INDEX: + default: + return; + } + break; + + case GL_DECAL: + switch (tObj->Image[0]->Format) { + case GL_RGBA: + tex_combine_cntl = (R128_COMB_BLEND_TEXTURE | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_COPY_INP | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA); + break; + case GL_RGB: + tex_combine_cntl = (R128_COMB_DIS | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_COPY_INP | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA); + break; + case GL_ALPHA: + case GL_LUMINANCE: + case GL_LUMINANCE_ALPHA: + case GL_INTENSITY: + /* Undefined behaviour - just copy the input */ + tex_combine_cntl = (R128_COMB_COPY_INP | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_COPY_INP | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA); + break; + case GL_COLOR_INDEX: + default: + return; + } + break; + + case GL_ADD: + switch (tObj->Image[0]->Format) { + case GL_RGBA: + case GL_LUMINANCE_ALPHA: + case GL_INTENSITY: + tex_combine_cntl = (R128_COMB_ADD | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_MODULATE | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA); + break; + case GL_RGB: + case GL_LUMINANCE: + tex_combine_cntl = (R128_COMB_ADD | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_COPY_INP | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA); + break; + case GL_ALPHA: + tex_combine_cntl = (R128_COMB_COPY_INP | + R128_COLOR_FACTOR_TEX | + R128_INPUT_FACTOR_PREV_COLOR | + R128_COMB_ALPHA_MODULATE | + R128_ALPHA_FACTOR_TEX_ALPHA | + R128_INP_FACTOR_A_PREV_ALPHA); + break; + case GL_COLOR_INDEX: + default: + return; + } + break; + + default: + return; + } + + /* Enable tex1 */ + r128ctx->regs.tex_cntl_c |= R128_SEC_TEXMAP_ENABLE; + + tex_size_pitch = r128ctx->regs.tex_size_pitch_c; + tex_size_pitch &= ~R128_SEC_TEX_SIZE_PITCH_MASK; + tex_size_pitch |= t->regs.size_pitch << R128_SEC_TEX_SIZE_PITCH_SHIFT; + + tex_cntl = t->regs.tex_cntl | R128_SEC_SELECT_SEC_ST; + + /* Set the secondary texture state in r128ctx->regs */ + r128ctx->regs.sec_tex_cntl_c = tex_cntl; + r128ctx->regs.sec_tex_combine_cntl_c = tex_combine_cntl; + r128ctx->regs.tex_size_pitch_c = tex_size_pitch; + r128ctx->regs.sec_texture_border_color_c = t->regs.border_color; + + /* Set texture offsets */ + if (t->regs.tex_cntl & R128_MIP_MAP_DISABLE) { + for (i = 0; i < R128_TEX_MAXLEVELS; i++) + r128ctx->regs.sec_tex_offset[i] = (CARD32)t->bufAddr; + } else { + int maxLevel = ((t->regs.size_pitch & R128_TEX_SIZE_MASK) >> + R128_TEX_SIZE_SHIFT); + int minLevel = ((t->regs.size_pitch & R128_TEX_MIN_SIZE_MASK) >> + R128_TEX_MIN_SIZE_SHIFT); + for (i = maxLevel; i >= minLevel; i--) + r128ctx->regs.sec_tex_offset[i] = + t->image[maxLevel-i].offset + (CARD32)t->bufAddr; + } + /* Fix AGP texture offsets */ + if (t->heap == R128_AGP_TEX_HEAP) + for (i = 0; i < R128_TEX_MAXLEVELS; i++) + r128ctx->regs.sec_tex_offset[i] += + R128_AGP_TEX_OFFSET + r128ctx->r128Screen->agpTexOffset; + + /* Force loading the new state into the hardware */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_TEX1STATE | R128_CTX_ENGINESTATE; +} + +/* Update the hardware texture state */ +/* NOTE: This function is only called while holding the hardware lock */ +void r128UpdateTextureState(r128ContextPtr r128ctx) +{ + /* Clear the GL_BLEND texturing fallback */ + r128ctx->Fallback &= ~R128_FALLBACK_TEXTURE; + + /* Unbind any currently bound textures */ + if (r128ctx->CurrentTexObj[0]) r128ctx->CurrentTexObj[0]->bound = 0; + if (r128ctx->CurrentTexObj[1]) r128ctx->CurrentTexObj[1]->bound = 0; + r128ctx->CurrentTexObj[0] = NULL; + r128ctx->CurrentTexObj[1] = NULL; + + /* Update the texture unit 0/1 state */ + r128UpdateTex0State(r128ctx); + r128UpdateTex1State(r128ctx); +} + +/* Set the texture wrap mode */ +static void r128SetTexWrap(r128TexObjPtr t, GLenum swrap, GLenum twrap) +{ + t->regs.tex_cntl &= ~(R128_TEX_CLAMP_S_MASK | R128_TEX_CLAMP_T_MASK); + + switch (swrap) { + case GL_CLAMP: t->regs.tex_cntl |= R128_TEX_CLAMP_S_CLAMP; break; + case GL_REPEAT: t->regs.tex_cntl |= R128_TEX_CLAMP_S_WRAP; break; + default: /* ERROR!! */ return; + } + + switch (twrap) { + case GL_CLAMP: t->regs.tex_cntl |= R128_TEX_CLAMP_T_CLAMP; break; + case GL_REPEAT: t->regs.tex_cntl |= R128_TEX_CLAMP_T_WRAP; break; + default: /* ERROR!! */ return; + } +} + +/* Set the texture filter mode */ +static void r128SetTexFilter(r128TexObjPtr t, GLenum minf, GLenum magf) +{ + t->regs.tex_cntl &= ~(R128_MIN_BLEND_MASK | R128_MAG_BLEND_MASK); + + switch (minf) { + case GL_NEAREST: + t->regs.tex_cntl |= R128_MIN_BLEND_NEAREST; + break; + case GL_LINEAR: + t->regs.tex_cntl |= R128_MIN_BLEND_LINEAR; + break; + case GL_NEAREST_MIPMAP_NEAREST: + t->regs.tex_cntl |= R128_MIN_BLEND_MIPNEAREST; + break; + case GL_LINEAR_MIPMAP_NEAREST: + t->regs.tex_cntl |= R128_MIN_BLEND_LINEARMIPNEAREST; + break; + case GL_NEAREST_MIPMAP_LINEAR: + t->regs.tex_cntl |= R128_MIN_BLEND_MIPLINEAR; + break; + case GL_LINEAR_MIPMAP_LINEAR: + t->regs.tex_cntl |= R128_MIN_BLEND_LINEARMIPLINEAR; + break; + default: /* ERROR!! */ return; + } + + switch (magf) { + case GL_NEAREST: + t->regs.tex_cntl |= R128_MAG_BLEND_NEAREST; + break; + case GL_LINEAR: + t->regs.tex_cntl |= R128_MAG_BLEND_LINEAR; + break; + } +} + +/* Set the texture border color */ +static void r128SetTexBorderColor(r128TexObjPtr t, GLubyte c[4]) +{ + t->regs.border_color = r128PackColor(32, c[0], c[1], c[2], c[3]); +} + +/* Set the texture environment state */ +static void r128DDTexEnv(GLcontext *ctx, GLenum target, GLenum pname, + const GLfloat *param) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + struct gl_texture_unit *texUnit; + GLubyte c[4]; + CARD32 col; + + /* FIXME: Add texture LOD bias extension */ + + switch (pname) { + case GL_TEXTURE_ENV_MODE: + /* TexEnv modes are handled in UpdateTextureState */ + R128CCE_FLUSH_VB_LOCK(r128ctx); + r128ctx->dirty |= R128_UPDATE_TEXSTATE; + break; + case GL_TEXTURE_ENV_COLOR: + texUnit = &ctx->Texture.Unit[ctx->Texture.CurrentUnit]; + FLOAT_RGBA_TO_UBYTE_RGBA(texUnit->EnvColor, c); + col = r128PackColor(32, c[0], c[1], c[2], c[3]); + if (r128ctx->regs.constant_color_c != col) { + R128CCE_FLUSH_VB_LOCK(r128ctx); + r128ctx->regs.constant_color_c = col; + + /* FIXME: Load into hardware now??? */ + r128ctx->dirty |= R128_UPDATE_CONTEXT; + r128ctx->dirty_context |= R128_CTX_TEXENVSTATE; + } + break; + default: + return; + } +} + +/* Upload a new texture image */ +static void r128DDTexImage(GLcontext *ctx, GLenum target, + struct gl_texture_object *tObj, GLint level, + GLint internalFormat, + const struct gl_texture_image *image) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + r128TexObjPtr t; + + if (R128_DEBUG_FLAGS & DEBUG_VERBOSE_API) + fprintf(stderr, "r128DDTexImage(%p, level %d)\n", tObj, level); + + if ((target != GL_TEXTURE_2D) && (target != GL_TEXTURE_1D)) return; + if (level >= R128_TEX_MAXLEVELS) return; + + t = (r128TexObjPtr)tObj->DriverData; + if (t) { + if (t->bound) R128CCE_FLUSH_VB_LOCK(r128ctx); + + /* Destroy the old texture, and upload a new one. The actual + uploading of the texture image occurs in the UploadSubImage + function. */ + r128DestroyTexObj(r128ctx, t); + r128ctx->dirty |= R128_UPDATE_TEXSTATE; + } +} + +/* Upload a new texture sub-image */ +static void r128DDTexSubImage(GLcontext *ctx, GLenum target, + struct gl_texture_object *tObj, GLint level, + GLint xoffset, GLint yoffset, + GLsizei width, GLsizei height, + GLint internalFormat, + const struct gl_texture_image *image) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + r128TexObjPtr t; + + if (R128_DEBUG_FLAGS & DEBUG_VERBOSE_API) + fprintf(stderr, "r128DDTexSubImage(%p, level %d) " + "size: %d,%d of %d,%d\n", + tObj, level, width, height, image->Width, image->Height); + + if ((target != GL_TEXTURE_2D) && (target != GL_TEXTURE_1D)) return; + if (level >= R128_TEX_MAXLEVELS) return; + + t = (r128TexObjPtr)tObj->DriverData; + if (t) { + if (t->bound) R128CCE_FLUSH_VB_LOCK(r128ctx); + + LOCK_HARDWARE(r128ctx); + r128UploadSubImage(r128ctx, t, level, + xoffset, yoffset, width, height); + UNLOCK_HARDWARE(r128ctx); + + /* Update the context state */ + r128ctx->regs.tex_cntl_c |= R128_TEX_CACHE_FLUSH; + + r128ctx->dirty |= (R128_UPDATE_CONTEXT | + R128_UPDATE_TEXSTATE); + r128ctx->dirty_context |= (R128_CTX_ENGINESTATE | + R128_CTX_TEX0STATE | + R128_CTX_TEX1STATE); + } +} + +/* Set the texture parameter state */ +static void r128DDTexParameter(GLcontext *ctx, GLenum target, + struct gl_texture_object *tObj, + GLenum pname, const GLfloat *params) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + r128TexObjPtr t = (r128TexObjPtr)tObj->DriverData; + + if (!t) return; + if ((target != GL_TEXTURE_2D) && (target != GL_TEXTURE_1D)) return; + + switch (pname) { + case GL_TEXTURE_MIN_FILTER: + case GL_TEXTURE_MAG_FILTER: + if (t->bound) R128CCE_FLUSH_VB_LOCK(r128ctx); + r128SetTexFilter(t, tObj->MinFilter, tObj->MagFilter); + break; + + case GL_TEXTURE_WRAP_S: + case GL_TEXTURE_WRAP_T: + if (t->bound) R128CCE_FLUSH_VB_LOCK(r128ctx); + r128SetTexWrap(t, tObj->WrapS, tObj->WrapT); + break; + + case GL_TEXTURE_BORDER_COLOR: + if (t->bound) R128CCE_FLUSH_VB_LOCK(r128ctx); + r128SetTexBorderColor(t, tObj->BorderColor); + break; + + default: + return; + } + + r128ctx->dirty |= R128_UPDATE_TEXSTATE; +} + +/* Bind a texture to the currently active texture unit */ +static void r128DDBindTexture(GLcontext *ctx, GLenum target, + struct gl_texture_object *tObj) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + + R128CCE_FLUSH_VB_LOCK(r128ctx); + + /* Unbind the old texture */ + if (r128ctx->CurrentTexObj[ctx->Texture.CurrentUnit]) { + r128ctx->CurrentTexObj[ctx->Texture.CurrentUnit]->bound = 0; + r128ctx->CurrentTexObj[ctx->Texture.CurrentUnit] = NULL; + } + + /* The actualy binding occurs in the Tex[01]UpdateState function */ + r128ctx->dirty |= R128_UPDATE_TEXSTATE; +} + +/* Remove texture from AGP/local texture memory */ +static void r128DDDeleteTexture(GLcontext *ctx, + struct gl_texture_object *tObj) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + r128TexObjPtr t = (r128TexObjPtr)tObj->DriverData; + + if (t) { + if (t->bound) { + R128CCE_FLUSH_VB_LOCK(r128ctx); + + r128ctx->CurrentTexObj[t->bound-1] = 0; + r128ctx->dirty |= R128_UPDATE_TEXSTATE; + } + + r128DestroyTexObj(r128ctx, t); + tObj->DriverData = NULL; + } +} + +/* Determine if a texture is currently residing in either AGP/local + texture memory */ +static GLboolean r128DDIsTextureResident(GLcontext *ctx, + struct gl_texture_object *tObj) +{ + r128TexObjPtr t = (r128TexObjPtr)tObj->DriverData; + + return t && t->memBlock; +} + +/* Initialize the driver's texture functions */ +void r128DDInitTextureFuncs(GLcontext *ctx) +{ + ctx->Driver.TexEnv = r128DDTexEnv; + ctx->Driver.TexImage = r128DDTexImage; + ctx->Driver.TexSubImage = r128DDTexSubImage; + ctx->Driver.TexParameter = r128DDTexParameter; + ctx->Driver.BindTexture = r128DDBindTexture; + ctx->Driver.DeleteTexture = r128DDDeleteTexture; + ctx->Driver.UpdateTexturePalette = NULL; + ctx->Driver.ActiveTexture = NULL; + ctx->Driver.IsTextureResident = r128DDIsTextureResident; + ctx->Driver.PrioritizeTexture = NULL; +} diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_tex.h b/xc/lib/GL/mesa/src/drv/r128/r128_tex.h new file mode 100644 index 000000000..20893110c --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_tex.h @@ -0,0 +1,82 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * Gareth Hughes <gareth@precisioninsight.com> + * + */ + +#ifndef _R128_TEX_H_ +#define _R128_TEX_H_ + +#ifdef GLX_DIRECT_RENDERING + +extern void r128AgeTextures(r128ContextPtr r128ctx, int heap); +extern int r128UploadTexImages(r128ContextPtr r128ctx, r128TexObjPtr t); +extern void r128UpdateTextureState(r128ContextPtr r128ctx); +extern void r128DestroyTexObj(r128ContextPtr r128ctx, r128TexObjPtr t); + +extern void r128DDInitTextureFuncs(GLcontext *ctx); + +#define R128PACKCOLOR332(r, g, b) \ + (((r) & 0xe0) | (((g) & 0xe0) >> 3) | (((b) & 0xc0) >> 6)) + +#define R128PACKCOLOR1555(r, g, b, a) \ + ((((r) & 0xf8) << 7) | (((g) & 0xf8) << 2) | (((b) & 0xf8) >> 3) | \ + ((a) ? 0x8000 : 0)) + +#define R128PACKCOLOR565(r, g, b) \ + ((((r) & 0xf8) << 8) | (((g) & 0xfc) << 3) | (((b) & 0xf8) >> 3)) + +#define R128PACKCOLOR888(r, g, b) \ + (((r) << 16) | ((g) << 8) | (b)) + +#define R128PACKCOLOR8888(r, g, b, a) \ + (((a) << 24) | ((r) << 16) | ((g) << 8) | (b)) + +#define R128PACKCOLOR4444(r, g, b, a) \ + ((((a) & 0xf0) << 8) | (((r) & 0xf0) << 4) | ((g) & 0xf0) | ((b) >> 4)) + +static __inline__ CARD32 r128PackColor(GLuint depth, + GLubyte r, GLubyte g, + GLubyte b, GLubyte a) +{ + switch (depth) { + case 8: return R128PACKCOLOR332(r, g, b); + case 15: return R128PACKCOLOR1555(r, g, b, a); + case 16: return R128PACKCOLOR565(r, g, b); + case 24: return R128PACKCOLOR888(r, g, b); + case 32: return R128PACKCOLOR8888(r, g, b, a); + default: return 0; + } +} + +#endif +#endif /* _R128_TEX_H_ */ diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_texobj.h b/xc/lib/GL/mesa/src/drv/r128/r128_texobj.h new file mode 100644 index 000000000..588b768ed --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_texobj.h @@ -0,0 +1,87 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * Gareth Hughes <gareth@precisioninsight.com> + * + */ + +#ifndef _R128_TEXOBJ_H_ +#define _R128_TEXOBJ_H_ + +#include "mm.h" + +#define R128_TEX_MAXLEVELS 11 + +/* Setup registers for each texture */ +typedef struct { + CARD32 tex_cntl; + CARD32 size_pitch; + CARD32 border_color; +} r128TextureRegs; + +/* Individual texture image information */ +typedef struct { + int offset; /* Offset into locally shared texture space (i.e., + relative to bufAddr (below) */ + int width; /* Width of texture image */ + int height; /* Height of texture image */ +} r128TexImage; + +typedef struct r128_tex_obj r128TexObj, *r128TexObjPtr; + +/* Texture object in locally shared texture space */ +struct r128_tex_obj { + r128TexObjPtr next, prev; + + struct gl_texture_object *tObj; /* Mesa texture object */ + + PMemBlock memBlock; /* Memory block containing texture */ + unsigned char *bufAddr; /* Offset to start of locally + shared texture block */ + + CARD32 dirty_images; /* Flags for whether or not + images need to be uploaded to + local or AGP texture space */ + int bound; /* Texture unit currently bound to */ + int heap; /* Texture heap currently stored in */ + r128TexImage image[R128_TEX_MAXLEVELS]; /* Image data for all + mipmap levels */ + int totalSize; /* Total size of the texture + including all mipmap levels */ + int internFormat; /* Internal GL format used to store + texture on card */ + int textureFormat; /* Actual hardware format */ + int texelBytes; /* Number of bytes per texel */ + + r128TextureRegs regs; /* Setup regs for texture */ +}; + +#endif /* _R128_TEXOBJ_H_ */ diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_tris.c b/xc/lib/GL/mesa/src/drv/r128/r128_tris.c new file mode 100644 index 000000000..1c1b45daf --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_tris.c @@ -0,0 +1,548 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#include "r128_init.h" +#include "r128_mesa.h" +#include "r128_xmesa.h" +#include "r128_context.h" +#include "r128_lock.h" +#include "r128_reg.h" +#include "r128_cce.h" +#include "r128_vb.h" +#include "r128_tris.h" +#include "r128_state.h" + +static triangle_func tri_tab[0x40]; /* only 0x20 actually used */ +static quad_func quad_tab[0x40]; /* only 0x20 actually used */ +static line_func line_tab[0x40]; /* less than 0x20 used */ +static points_func points_tab[0x40]; /* less than 0x20 used */ + +/* Draw a triangle from the vertices in the vertex buffer */ +void r128DrawTriangleVB(r128ContextPtr r128ctx, + r128_vertex *v0, + r128_vertex *v1, + r128_vertex *v2) +{ + r128_vertex *vbptr; + + if (r128ctx->disableVB) { + r128DrawTriangle(r128ctx, v0, v1, v2); + return; + } + + R128CCE_ALLOC_VB_SPACE(r128ctx, vbptr, 3); + + *vbptr++ = *v0; + *vbptr++ = *v1; + *vbptr++ = *v2; +} + +/* Draw a triangle */ +void r128DrawTriangle(r128ContextPtr r128ctx, + r128_vertex *v0, + r128_vertex *v1, + r128_vertex *v2) +{ + LOCK_HARDWARE(r128ctx); + BEGIN_CLIP_LOOP(r128ctx); + +#if USE_RHW2 + R128CCE3(R128_CCE_PACKET3_3D_RNDR_GEN_PRIM, 34); +#else + R128CCE3(R128_CCE_PACKET3_3D_RNDR_GEN_PRIM, 31); +#endif + R128CCE(R128_FULL_VERTEX_FORMAT); + R128CCE(R128_CCE_VC_CNTL_PRIM_TYPE_TRI_LIST | + R128_CCE_VC_CNTL_PRIM_WALK_RING | + (3 << R128_CCE_VC_CNTL_NUM_SHIFT)); + + R128CCE_SEND_VERTEX(v0); + R128CCE_SEND_VERTEX(v1); + R128CCE_SEND_VERTEX(v2); + + R128CCE_SUBMIT_PACKETS(); + + END_CLIP_LOOP(r128ctx); + UNLOCK_HARDWARE(r128ctx); +} + +/* Draw a line from the vertices in the vertex buffer */ +void r128DrawLineVB(r128ContextPtr r128ctx, + r128_vertex *v0, r128_vertex *v1, + float width) +{ + float dx, dy, ix, iy; + r128_vertex *vbptr; + + /* FIXME: Use r128's line primitive for width 1 lines */ + if (r128ctx->disableVB) { + r128DrawLine(r128ctx, v0, v1, width); + return; + } + + R128CCE_ALLOC_VB_SPACE(r128ctx, vbptr, 3); + + dx = v0->x - v1->x; + dy = v0->y - v1->y; + + ix = width * 0.5; iy = 0; + if (dx*dx > dy*dy) { + iy = ix; ix = 0; + } + + *vbptr = *v0; vbptr->x = v0->x - ix; vbptr->y = v0->y - iy; + *++vbptr = *v1; vbptr->x = v1->x + ix; vbptr->y = v1->y + iy; + *++vbptr = *v0; vbptr->x = v0->x + ix; vbptr->y = v0->y + iy; + *++vbptr = *v0; vbptr->x = v0->x - ix; vbptr->y = v0->y - iy; + *++vbptr = *v1; vbptr->x = v1->x - ix; vbptr->y = v1->y - iy; + *++vbptr = *v1; vbptr->x = v1->x + ix; vbptr->y = v1->y + iy; +} + +/* Draw a line */ +void r128DrawLine(r128ContextPtr r128ctx, + r128_vertex *v0, r128_vertex *v1, + float width) +{ + LOCK_HARDWARE(r128ctx); + if (width != 1) { + float dx, dy, ix, iy; + + dx = v0->x - v1->x; + dy = v0->y - v1->y; + + ix = width * 0.5; iy = 0; + if (dx*dx > dy*dy) { + iy = ix; ix = 0; + } + + BEGIN_CLIP_LOOP(r128ctx); + +#if USE_RHW2 + R128CCE3(R128_CCE_PACKET3_3D_RNDR_GEN_PRIM, 67); +#else + R128CCE3(R128_CCE_PACKET3_3D_RNDR_GEN_PRIM, 61); +#endif + R128CCE(R128_FULL_VERTEX_FORMAT); + R128CCE(R128_CCE_VC_CNTL_PRIM_TYPE_TRI_LIST | + R128_CCE_VC_CNTL_PRIM_WALK_RING | + (6 << R128_CCE_VC_CNTL_NUM_SHIFT)); + + R128CCEF(v0->x - ix); + R128CCEF(v0->y - iy); + R128CCEF(v0->z); + R128CCEF(v0->rhw); + R128CCE(*(int *)&v0->dif_argb); + R128CCE(*(int *)&v0->spec_frgb); + R128CCEF(v0->tu0); + R128CCEF(v0->tv0); + R128CCEF(v0->tu1); + R128CCEF(v0->tv1); +#if USE_RHW2 + R128CCEF(v0->rhw2); +#endif + + R128CCEF(v1->x + ix); + R128CCEF(v1->y + iy); + R128CCEF(v1->z); + R128CCEF(v1->rhw); + R128CCE(*(int *)&v1->dif_argb); + R128CCE(*(int *)&v1->spec_frgb); + R128CCEF(v1->tu0); + R128CCEF(v1->tv0); + R128CCEF(v1->tu1); + R128CCEF(v1->tv1); +#if USE_RHW2 + R128CCEF(v1->rhw2); +#endif + + R128CCEF(v0->x + ix); + R128CCEF(v0->y + iy); + R128CCEF(v0->z); + R128CCEF(v0->rhw); + R128CCE(*(int *)&v0->dif_argb); + R128CCE(*(int *)&v0->spec_frgb); + R128CCEF(v0->tu0); + R128CCEF(v0->tv0); + R128CCEF(v0->tu1); + R128CCEF(v0->tv1); +#if USE_RHW2 + R128CCEF(v0->rhw2); +#endif + + R128CCEF(v0->x - ix); + R128CCEF(v0->y - iy); + R128CCEF(v0->z); + R128CCEF(v0->rhw); + R128CCE(*(int *)&v0->dif_argb); + R128CCE(*(int *)&v0->spec_frgb); + R128CCEF(v0->tu0); + R128CCEF(v0->tv0); + R128CCEF(v0->tu1); + R128CCEF(v0->tv1); +#if USE_RHW2 + R128CCEF(v0->rhw2); +#endif + + R128CCEF(v1->x - ix); + R128CCEF(v1->y - iy); + R128CCEF(v1->z); + R128CCEF(v1->rhw); + R128CCE(*(int *)&v1->dif_argb); + R128CCE(*(int *)&v1->spec_frgb); + R128CCEF(v1->tu0); + R128CCEF(v1->tv0); + R128CCEF(v1->tu1); + R128CCEF(v1->tv1); +#if USE_RHW2 + R128CCEF(v1->rhw2); +#endif + + R128CCEF(v1->x + ix); + R128CCEF(v1->y + iy); + R128CCEF(v1->z); + R128CCEF(v1->rhw); + R128CCE(*(int *)&v1->dif_argb); + R128CCE(*(int *)&v1->spec_frgb); + R128CCEF(v1->tu0); + R128CCEF(v1->tv0); + R128CCEF(v1->tu1); + R128CCEF(v1->tv1); +#if USE_RHW2 + R128CCEF(v1->rhw2); +#endif + + R128CCE_SUBMIT_PACKETS(); + + END_CLIP_LOOP(r128ctx); + } else { + BEGIN_CLIP_LOOP(r128ctx); + +#if USE_RHW2 + R128CCE3(R128_CCE_PACKET3_3D_RNDR_GEN_PRIM, 23); +#else + R128CCE3(R128_CCE_PACKET3_3D_RNDR_GEN_PRIM, 21); +#endif + R128CCE(R128_FULL_VERTEX_FORMAT); + R128CCE(R128_CCE_VC_CNTL_PRIM_TYPE_LINE | + R128_CCE_VC_CNTL_PRIM_WALK_RING | + (2 << R128_CCE_VC_CNTL_NUM_SHIFT)); + + R128CCE_SEND_VERTEX(v0); + R128CCE_SEND_VERTEX(v1); + + R128CCE_SUBMIT_PACKETS(); + + END_CLIP_LOOP(r128ctx); + } + UNLOCK_HARDWARE(r128ctx); +} + +/* Draw a point from the vertices in the vertex buffer */ +void r128DrawPointVB(r128ContextPtr r128ctx, + r128_vertex *v0, float size) +{ + r128_vertex *vbptr; + + /* FIXME: Use r128's point primitive for diameter 1 points */ + if (r128ctx->disableVB) { + r128DrawPoint(r128ctx, v0, size); + return; + } + + R128CCE_ALLOC_VB_SPACE(r128ctx, vbptr, 3); + + *vbptr = *v0; vbptr->x = v0->x - size; vbptr->y = v0->y - size; + *++vbptr = *v0; vbptr->x = v0->x + size; vbptr->y = v0->y - size; + *++vbptr = *v0; vbptr->x = v0->x + size; vbptr->y = v0->y + size; + *++vbptr = *v0; vbptr->x = v0->x + size; vbptr->y = v0->y + size; + *++vbptr = *v0; vbptr->x = v0->x - size; vbptr->y = v0->y + size; + *++vbptr = *v0; vbptr->x = v0->x - size; vbptr->y = v0->y - size; +} + +/* Draw a point */ +void r128DrawPoint(r128ContextPtr r128ctx, + r128_vertex *v0, float size) +{ + LOCK_HARDWARE(r128ctx); + if (size != 0.5) { + BEGIN_CLIP_LOOP(r128ctx); + +#if USE_RHW2 + R128CCE3(R128_CCE_PACKET3_3D_RNDR_GEN_PRIM, 67); +#else + R128CCE3(R128_CCE_PACKET3_3D_RNDR_GEN_PRIM, 61); +#endif + R128CCE(R128_FULL_VERTEX_FORMAT); + R128CCE(R128_CCE_VC_CNTL_PRIM_TYPE_TRI_LIST | + R128_CCE_VC_CNTL_PRIM_WALK_RING | + (6 << R128_CCE_VC_CNTL_NUM_SHIFT)); + + R128CCEF(v0->x - size); + R128CCEF(v0->y - size); + R128CCEF(v0->z); + R128CCEF(v0->rhw); + R128CCE(*(int *)&v0->dif_argb); + R128CCE(*(int *)&v0->spec_frgb); + R128CCEF(v0->tu0); + R128CCEF(v0->tv0); + R128CCEF(v0->tu1); + R128CCEF(v0->tv1); +#if USE_RHW2 + R128CCEF(v0->rhw2); +#endif + + R128CCEF(v0->x + size); + R128CCEF(v0->y - size); + R128CCEF(v0->z); + R128CCEF(v0->rhw); + R128CCE(*(int *)&v0->dif_argb); + R128CCE(*(int *)&v0->spec_frgb); + R128CCEF(v0->tu0); + R128CCEF(v0->tv0); + R128CCEF(v0->tu1); + R128CCEF(v0->tv1); +#if USE_RHW2 + R128CCEF(v0->rhw2); +#endif + + R128CCEF(v0->x + size); + R128CCEF(v0->y + size); + R128CCEF(v0->z); + R128CCEF(v0->rhw); + R128CCE(*(int *)&v0->dif_argb); + R128CCE(*(int *)&v0->spec_frgb); + R128CCEF(v0->tu0); + R128CCEF(v0->tv0); + R128CCEF(v0->tu1); + R128CCEF(v0->tv1); +#if USE_RHW2 + R128CCEF(v0->rhw2); +#endif + + R128CCEF(v0->x + size); + R128CCEF(v0->y + size); + R128CCEF(v0->z); + R128CCEF(v0->rhw); + R128CCE(*(int *)&v0->dif_argb); + R128CCE(*(int *)&v0->spec_frgb); + R128CCEF(v0->tu0); + R128CCEF(v0->tv0); + R128CCEF(v0->tu1); + R128CCEF(v0->tv1); +#if USE_RHW2 + R128CCEF(v0->rhw2); +#endif + + R128CCEF(v0->x - size); + R128CCEF(v0->y + size); + R128CCEF(v0->z); + R128CCEF(v0->rhw); + R128CCE(*(int *)&v0->dif_argb); + R128CCE(*(int *)&v0->spec_frgb); + R128CCEF(v0->tu0); + R128CCEF(v0->tv0); + R128CCEF(v0->tu1); + R128CCEF(v0->tv1); +#if USE_RHW2 + R128CCEF(v0->rhw2); +#endif + + R128CCEF(v0->x - size); + R128CCEF(v0->y - size); + R128CCEF(v0->z); + R128CCEF(v0->rhw); + R128CCE(*(int *)&v0->dif_argb); + R128CCE(*(int *)&v0->spec_frgb); + R128CCEF(v0->tu0); + R128CCEF(v0->tv0); + R128CCEF(v0->tu1); + R128CCEF(v0->tv1); +#if USE_RHW2 + R128CCEF(v0->rhw2); +#endif + + R128CCE_SUBMIT_PACKETS(); + + END_CLIP_LOOP(r128ctx); + } else { + BEGIN_CLIP_LOOP(r128ctx); + +#if USE_RHW2 + R128CCE3(R128_CCE_PACKET3_3D_RNDR_GEN_PRIM, 12); +#else + R128CCE3(R128_CCE_PACKET3_3D_RNDR_GEN_PRIM, 11); +#endif + R128CCE(R128_FULL_VERTEX_FORMAT); + R128CCE(R128_CCE_VC_CNTL_PRIM_TYPE_POINT | + R128_CCE_VC_CNTL_PRIM_WALK_RING | + (1 << R128_CCE_VC_CNTL_NUM_SHIFT)); + + R128CCE_SEND_VERTEX(v0); + + R128CCE_SUBMIT_PACKETS(); + + END_CLIP_LOOP(r128ctx); + } + UNLOCK_HARDWARE(r128ctx); +} + +#define R128_COLOR(to, from) \ +do { \ + (to)[0] = (from)[2]; \ + (to)[1] = (from)[1]; \ + (to)[2] = (from)[0]; \ + (to)[3] = (from)[3]; \ +} while (0) + +#define IND (0) +#define TAG(x) x +#include "r128_tritmp.h" + +#define IND (R128_FLAT_BIT) +#define TAG(x) x##_flat +#include "r128_tritmp.h" + +#define IND (R128_OFFSET_BIT) +#define TAG(x) x##_offset +#include "r128_tritmp.h" + +#define IND (R128_OFFSET_BIT | R128_FLAT_BIT) +#define TAG(x) x##_offset_flat +#include "r128_tritmp.h" + +#define IND (R128_TWOSIDE_BIT) +#define TAG(x) x##_twoside +#include "r128_tritmp.h" + +#define IND (R128_TWOSIDE_BIT | R128_FLAT_BIT) +#define TAG(x) x##_twoside_flat +#include "r128_tritmp.h" + +#define IND (R128_TWOSIDE_BIT | R128_OFFSET_BIT) +#define TAG(x) x##_twoside_offset +#include "r128_tritmp.h" + +#define IND (R128_TWOSIDE_BIT | R128_OFFSET_BIT | R128_FLAT_BIT) +#define TAG(x) x##_twoside_offset_flat +#include "r128_tritmp.h" + +/* Initialize the table of points, line and triangle drawing functions */ +void r128TriangleFuncsInit(void) +{ + init(); + init_flat(); + init_offset(); + init_offset_flat(); + init_twoside(); + init_twoside_flat(); + init_twoside_offset(); + init_twoside_offset_flat(); +} + +/* Setup the Point, Line, Triangle and Quad functions based on the + current rendering state. Wherever possible, use the hardware to + render the primitive. Otherwise, fallback to software rendering. */ +void r128ChooseRenderState(GLcontext *ctx) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + GLuint flags = ctx->TriangleCaps; + + if (r128ctx->Fallback) return; + + if (r128ctx->SWonly) { + r128ctx->IndirectTriangles = DD_SW_RASTERIZE; + r128ctx->PointsFunc = NULL; + r128ctx->LineFunc = NULL; + r128ctx->TriangleFunc = NULL; + r128ctx->QuadFunc = NULL; + return; + } else { + r128ctx->IndirectTriangles = 0; + } + + if (flags) { + CARD32 index = 0; + CARD32 shared = 0; + CARD32 fallback = R128_FALLBACK_BIT; + + if (r128ctx->SWfallbackDisable) fallback = 0; /* No fallbacks */ + if (r128ctx->SWonly) shared = fallback; /* Everything's a fallback */ + + if (flags & DD_FLATSHADE) shared |= R128_FLAT_BIT; + if (flags & DD_MULTIDRAW) shared |= fallback; + if (flags & DD_SELECT) shared |= R128_FALLBACK_BIT; + if (flags & DD_FEEDBACK) shared |= R128_FALLBACK_BIT; + + /* Setup PointFunc */ + index = shared; + if (flags & DD_POINT_SMOOTH) index |= fallback; + if (flags & DD_POINT_ATTEN) index |= fallback; + + r128ctx->RenderIndex = index; + r128ctx->PointsFunc = points_tab[index]; + if (index & R128_FALLBACK_BIT) + r128ctx->IndirectTriangles |= DD_POINT_SW_RASTERIZE; + + /* Setup LineFunc */ + index = shared; + if (flags & DD_LINE_SMOOTH) index |= fallback; + if (flags & DD_LINE_STIPPLE) index |= fallback; + + r128ctx->RenderIndex |= index; + r128ctx->LineFunc = line_tab[index]; + if (index & R128_FALLBACK_BIT) + r128ctx->IndirectTriangles |= DD_LINE_SW_RASTERIZE; + + /* Setup TriangleFunc and QuadFunc */ + index = shared; + if (flags & DD_TRI_SMOOTH) index |= fallback; + if (flags & DD_TRI_OFFSET) index |= R128_OFFSET_BIT; + if (flags & DD_TRI_LIGHT_TWOSIDE) index |= R128_TWOSIDE_BIT; + if (flags & DD_TRI_UNFILLED) index |= fallback; + if (flags & DD_TRI_STIPPLE) index |= fallback; + + r128ctx->RenderIndex |= index; + r128ctx->TriangleFunc = tri_tab[index]; + r128ctx->QuadFunc = quad_tab[index]; + if (index & R128_FALLBACK_BIT) + r128ctx->IndirectTriangles |= (DD_TRI_SW_RASTERIZE | + DD_QUAD_SW_RASTERIZE); + } else if (r128ctx->RenderIndex) { + r128ctx->RenderIndex = 0; + r128ctx->PointsFunc = points_tab[0]; + r128ctx->LineFunc = line_tab[0]; + r128ctx->TriangleFunc = tri_tab[0]; + r128ctx->QuadFunc = quad_tab[0]; + } +} diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_tris.h b/xc/lib/GL/mesa/src/drv/r128/r128_tris.h new file mode 100644 index 000000000..0980f2791 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_tris.h @@ -0,0 +1,76 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#ifndef _R128_TRIS_H_ +#define _R128_TRIS_H_ + +#ifdef GLX_DIRECT_RENDERING + +#include "r128_vb.h" + +#define R128_ANTIALIAS_BIT 0x00 /* ignored for now, no fallback */ +#define R128_FLAT_BIT 0x01 +#define R128_OFFSET_BIT 0x02 +#define R128_TWOSIDE_BIT 0x04 +#define R128_NODRAW_BIT 0x08 +#define R128_FALLBACK_BIT 0x10 +#define R128_FEEDBACK_BIT 0x20 +#define R128_SELECT_BIT 0x40 +#define R128_POINT_PARAM_BIT 0x80 /* not needed? */ + +extern void r128DrawTriangleVB(r128ContextPtr r128ctx, + r128_vertex *v0, + r128_vertex *v1, + r128_vertex *v2); +extern void r128DrawLineVB(r128ContextPtr r128ctx, + r128_vertex *tmp0, r128_vertex *tmp1, + float width); +extern void r128DrawPointVB(r128ContextPtr r128ctx, + r128_vertex *tmp, float size); + +extern void r128DrawTriangle(r128ContextPtr r128ctx, + r128_vertex *v0, + r128_vertex *v1, + r128_vertex *v2); +extern void r128DrawLine(r128ContextPtr r128ctx, + r128_vertex *tmp0, r128_vertex *tmp1, + float width); +extern void r128DrawPoint(r128ContextPtr r128ctx, + r128_vertex *tmp, float size); + +extern void r128ChooseRenderState(GLcontext *ctx); +extern void r128TriangleFuncsInit(void); + +#endif +#endif /* _R128_TRIS_H_ */ diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_tritmp.h b/xc/lib/GL/mesa/src/drv/r128/r128_tritmp.h new file mode 100644 index 000000000..833bd832a --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_tritmp.h @@ -0,0 +1,327 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#if !defined(TAG) || !defined(IND) + this is an error +#endif + +/* Draw a single triangle. Note that the device-dependent vertex data + might need to be changed based on the render state. */ +static void TAG(triangle)(GLcontext *ctx, + GLuint e0, GLuint e1, GLuint e2, + GLuint pv) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + struct vertex_buffer *VB = ctx->VB; + r128VertexPtr r128verts = R128_DRIVER_DATA(VB)->verts; + const r128_vertex *v0 = &r128verts[e0].v; + const r128_vertex *v1 = &r128verts[e1].v; + const r128_vertex *v2 = &r128verts[e2].v; + +#if (IND & R128_OFFSET_BIT) + GLfloat offset; +#endif + +#if (IND & (R128_FLAT_BIT | R128_TWOSIDE_BIT)) + int c0 = *(int *)&r128verts[pv].v.dif_argb; + int c1 = c0; + int c2 = c0; +#endif + +#if (IND & R128_OFFSET_BIT) + switch (ctx->Visual->DepthBits) { + case 16: offset = ctx->Polygon.OffsetUnits / 65536.0; break; + case 24: offset = ctx->Polygon.OffsetUnits / 16777216.0; break; + case 32: offset = ctx->Polygon.OffsetUnits / 4294967296.0; break; + default: offset = ctx->Polygon.OffsetUnits / 65536.0; break; + } +#endif + +#if (IND & (R128_TWOSIDE_BIT | R128_OFFSET_BIT)) + { + GLfloat ex = v0->x - v2->x; + GLfloat ey = v0->y - v2->y; + GLfloat fx = v1->x - v2->x; + GLfloat fy = v1->y - v2->y; + GLfloat c = ex*fy - ey*fx; + +#if (IND & R128_TWOSIDE_BIT) + { + GLuint facing = (c > 0.0) ^ ctx->Polygon.FrontBit; + GLubyte (*vbcolor)[4] = VB->Color[facing]->data; + if (IND & R128_FLAT_BIT) { + R128_COLOR((char *)&c0, vbcolor[pv]); + c2 = c1 = c0; + } else { + R128_COLOR((char *)&c0, vbcolor[e0]); + R128_COLOR((char *)&c1, vbcolor[e1]); + R128_COLOR((char *)&c2, vbcolor[e2]); + } + } +#endif + +#if (IND & R128_OFFSET_BIT) + { + if (c * c > 1e-16) { + GLfloat factor = ctx->Polygon.OffsetFactor; + GLfloat ez = v0->z - v2->z; + GLfloat fz = v1->z - v2->z; + GLfloat a = ey*fz - ez*fy; + GLfloat b = ez*fx - ex*fz; + GLfloat ic = 1.0 / c; + GLfloat ac = a * ic; + GLfloat bc = b * ic; + if (ac < 0.0f) ac = -ac; + if (bc < 0.0f) bc = -bc; + offset += MAX2(ac, bc) * factor; + } + } +#endif + } +#endif + + LOCK_HARDWARE(r128ctx); + if (r128ctx->regs.tex_cntl_c & (R128_TEXMAP_ENABLE | + R128_SEC_TEXMAP_ENABLE)) { + BEGIN_CLIP_LOOP(r128ctx); + +#if USE_RHW2 + R128CCE3(R128_CCE_PACKET3_3D_RNDR_GEN_PRIM, 34); +#else + R128CCE3(R128_CCE_PACKET3_3D_RNDR_GEN_PRIM, 31); +#endif + R128CCE(R128_FULL_VERTEX_FORMAT); + R128CCE(R128_CCE_VC_CNTL_PRIM_TYPE_TRI_LIST | + R128_CCE_VC_CNTL_PRIM_WALK_RING | + (3 << R128_CCE_VC_CNTL_NUM_SHIFT)); + + R128CCEF(v0->x); + R128CCEF(v0->y); +#if (IND & R128_OFFSET_BIT) + R128CCEF(v0->z + offset); +#else + R128CCEF(v0->z); +#endif + R128CCEF(v0->rhw); + +#if (IND & (R128_FLAT_BIT | R128_TWOSIDE_BIT)) + R128CCE(c0); +#else + R128CCE(*(int *)&v0->dif_argb); +#endif + R128CCE(*(int *)&v0->spec_frgb); + + R128CCEF(v0->tu0); + R128CCEF(v0->tv0); + R128CCEF(v0->tu1); + R128CCEF(v0->tv1); +#if USE_RHW2 + R128CCEF(v0->rhw2); +#endif + + R128CCEF(v1->x); + R128CCEF(v1->y); +#if (IND & R128_OFFSET_BIT) + R128CCEF(v1->z + offset); +#else + R128CCEF(v1->z); +#endif + R128CCEF(v1->rhw); + +#if (IND & (R128_FLAT_BIT | R128_TWOSIDE_BIT)) + R128CCE(c1); +#else + R128CCE(*(int *)&v1->dif_argb); +#endif + R128CCE(*(int *)&v1->spec_frgb); + + R128CCEF(v1->tu0); + R128CCEF(v1->tv0); + R128CCEF(v1->tu1); + R128CCEF(v1->tv1); +#if USE_RHW2 + R128CCEF(v1->rhw2); +#endif + + R128CCEF(v2->x); + R128CCEF(v2->y); +#if (IND & R128_OFFSET_BIT) + R128CCEF(v2->z + offset); +#else + R128CCEF(v2->z); +#endif + R128CCEF(v2->rhw); + +#if (IND & (R128_FLAT_BIT | R128_TWOSIDE_BIT)) + R128CCE(c2); +#else + R128CCE(*(int *)&v2->dif_argb); +#endif + R128CCE(*(int *)&v2->spec_frgb); + + R128CCEF(v2->tu0); + R128CCEF(v2->tv0); + R128CCEF(v2->tu1); + R128CCEF(v2->tv1); +#if USE_RHW2 + R128CCEF(v2->rhw2); +#endif + + R128CCE_SUBMIT_PACKETS(); + + END_CLIP_LOOP(r128ctx); + } else { + BEGIN_CLIP_LOOP(r128ctx); + + R128CCE3(R128_CCE_PACKET3_3D_RNDR_GEN_PRIM, 13); + R128CCE(R128_CCE_VC_FRMT_DIFFUSE_ARGB); + R128CCE(R128_CCE_VC_CNTL_PRIM_TYPE_TRI_LIST | + R128_CCE_VC_CNTL_PRIM_WALK_RING | + (3 << R128_CCE_VC_CNTL_NUM_SHIFT)); + + R128CCEF(v0->x); + R128CCEF(v0->y); +#if (IND & R128_OFFSET_BIT) + R128CCEF(v0->z + offset); +#else + R128CCEF(v0->z); +#endif + +#if (IND & (R128_FLAT_BIT | R128_TWOSIDE_BIT)) + R128CCE(c0); +#else + R128CCE(*(int *)&v0->dif_argb); +#endif + + R128CCEF(v1->x); + R128CCEF(v1->y); +#if (IND & R128_OFFSET_BIT) + R128CCEF(v1->z + offset); +#else + R128CCEF(v1->z); +#endif + +#if (IND & (R128_FLAT_BIT | R128_TWOSIDE_BIT)) + R128CCE(c1); +#else + R128CCE(*(int *)&v1->dif_argb); +#endif + + R128CCEF(v2->x); + R128CCEF(v2->y); +#if (IND & R128_OFFSET_BIT) + R128CCEF(v2->z + offset); +#else + R128CCEF(v2->z); +#endif + +#if (IND & (R128_FLAT_BIT | R128_TWOSIDE_BIT)) + R128CCE(c2); +#else + R128CCE(*(int *)&v2->dif_argb); +#endif + + R128CCE_SUBMIT_PACKETS(); + + END_CLIP_LOOP(r128ctx); + } + UNLOCK_HARDWARE(r128ctx); +} + +static void TAG(quad)(GLcontext *ctx, + GLuint v0, GLuint v1, GLuint v2, GLuint v3, + GLuint pv) +{ + TAG(triangle)(ctx, v0, v1, v3, pv); + TAG(triangle)(ctx, v1, v2, v3, pv); +} + +#if ((IND & ~R128_FLAT_BIT) == 0) + +/* Draw a single line. Note that the device-dependent vertex data might + need to be changed based on the render state. */ +static void TAG(line)(GLcontext *ctx, + GLuint v0, GLuint v1, + GLuint pv) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + r128VertexPtr r128verts = R128_DRIVER_DATA(ctx->VB)->verts; + r128_vertex tmp0 = r128verts[v0].v; + r128_vertex tmp1 = r128verts[v1].v; + float width = ctx->Line.Width; + + if (IND & R128_FLAT_BIT) { + *(int *)&tmp1.dif_argb = + *(int *)&tmp0.dif_argb = + *(int *)&r128verts[pv].v.dif_argb; + } + + r128DrawLine(r128ctx, &tmp0, &tmp1, width); +} + +/* Draw a set of points. Note that the device-dependent vertex data + might need to be changed based on the render state. */ +static void TAG(points)(GLcontext *ctx, + GLuint first, GLuint last) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + struct vertex_buffer *VB = ctx->VB; + r128VertexPtr r128verts = R128_DRIVER_DATA(VB)->verts; + GLfloat size = ctx->Point.Size * 0.5; + int i; + + for(i = first; i <= last; i++) { + if(VB->ClipMask[i] == 0) { + r128_vertex *tmp = &r128verts[i].v; + r128DrawPoint(r128ctx, tmp, size); + } + } +} + +#endif + +/* Initialize the table of primitives to render. */ +static void TAG(init)(void) +{ + tri_tab[IND] = TAG(triangle); + quad_tab[IND] = TAG(quad); + +#if ((IND & ~R128_FLAT_BIT) == 0) + line_tab[IND] = TAG(line); + points_tab[IND] = TAG(points); +#endif +} + +#undef IND +#undef TAG diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_vb.c b/xc/lib/GL/mesa/src/drv/r128/r128_vb.c new file mode 100644 index 000000000..f14ec21bd --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_vb.c @@ -0,0 +1,470 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#include "r128_init.h" +#include "r128_mesa.h" +#include "r128_xmesa.h" +#include "r128_context.h" +#include "r128_lock.h" +#include "r128_reg.h" +#include "r128_cce.h" +#include "r128_state.h" +#include "r128_vb.h" + +#include "stages.h" + +#define TEX0 \ +do { \ + v->v.tu0 = tc0[i][0]; \ + v->v.tv0 = tc0[i][1]; \ +} while (0) + +#define TEX1 \ +do { \ + v->v.tu1 = tc1[i][0]; \ + v->v.tv1 = tc1[i][1]; \ +} while (0) + +#define SPC \ +do { \ + GLubyte *spec = &(VB->Spec[0][i][0]); \ + v->v.spec_frgb.r = spec[0]; \ + v->v.spec_frgb.g = spec[1]; \ + v->v.spec_frgb.b = spec[2]; \ +} while (0) + +#define FOG \ +do { \ + GLubyte *spec = &(VB->Spec[0][i][0]); \ + v->v.spec_frgb.a = spec[3]; \ +} while (0) + +#define COL \ +do { \ + GLubyte *col = &(VB->Color[0]->data[i][0]); \ + v->v.dif_argb.a = col[3]; \ + v->v.dif_argb.r = col[0]; \ + v->v.dif_argb.g = col[1]; \ + v->v.dif_argb.b = col[2]; \ +} while (0) + +#if 1 +/* FIXME: These are handled by the Rage 128 */ +#define TEX0_4 +#define TEX1_4 +#else +#define TEX0_4 \ +do { \ + if (VB->TexCoordPtr[0]->size == 4) { \ + GLfloat (*tc)[4] = VB->TexCoordPtr[0]->data; \ + v = &(R128_DRIVER_DATA(VB)->verts[start]); \ + for (i = start; i < end; i++, v++) { \ + float oow = 1.0 / tc[i][3]; \ + v->v.rhw *= tc[i][3]; \ + v->v.tu0 *= oow; \ + v->v.tv0 *= oow; \ + } \ + } \ +} while (0) + +#if USE_RHW2 +#define TEX1_4 \ +do { \ + if (VB->TexCoordPtr[1]->size == 4) { \ + GLfloat (*tc)[4] = VB->TexCoordPtr[1]->data; \ + v = &(R128_DRIVER_DATA(VB)->verts[start]); \ + for (i = start; i < end; i++, v++) { \ + float oow = 1.0 / tc[i][3]; \ + v->v.rhw2 *= tc[i][3]; \ + v->v.tu1 *= oow; \ + v->v.tv1 *= oow; \ + } \ + } \ +} while (0) +#else +#define TEX1_4 +#endif +#endif + +#if USE_RHW2 +#define COORD \ +do { \ + GLfloat *win = VB->Win.data[i]; \ + v->v.x = win[0]; \ + v->v.y = r128height - win[1]; \ + v->v.z = scale * win[2]; \ + v->v.rhw = v->v.rhw2 = win[3]; \ +} while (0) +#else +#define COORD \ +do { \ + GLfloat *win = VB->Win.data[i]; \ + v->v.x = win[0]; \ + v->v.y = r128height - win[1]; \ + v->v.z = scale * win[2]; \ + v->v.rhw = win[3]; \ +} while (0) +#endif + +#define NOP + +/* Setup the r128 vertex buffer entries */ +#define SETUPFUNC(name,win,col,tex0,tex1,tex0_4,tex1_4,spec,fog) \ +static void name(struct vertex_buffer *VB, GLuint start, GLuint end) \ +{ \ + r128ContextPtr r128ctx = R128_CONTEXT(VB->ctx); \ + __DRIdrawablePrivate *dPriv = r128ctx->driDrawable; \ + r128VertexPtr v; \ + GLfloat (*tc0)[4]; \ + GLfloat (*tc1)[4]; \ + GLfloat r128height = dPriv->h; \ + GLfloat scale; \ + int i; \ + \ + (void) r128height; (void) r128ctx; \ + \ + gl_import_client_data(VB, VB->ctx->RenderFlags, \ + (VB->ClipOrMask \ + ? VEC_WRITABLE | VEC_GOOD_STRIDE \ + : VEC_GOOD_STRIDE)); \ + \ + switch (VB->ctx->Visual->DepthBits) { \ + case 16: scale = 1.0 / 65536.0; break; \ + case 24: scale = 1.0 / 16777216.0; break; \ + case 32: scale = 1.0 / 4294967296.0; break; \ + default: scale = 1.0 / 65536.0; break; \ + } \ + \ + tc0 = VB->TexCoordPtr[0]->data; \ + tc1 = VB->TexCoordPtr[1]->data; \ + \ + v = &(R128_DRIVER_DATA(VB)->verts[start]); \ + \ + if (VB->ClipOrMask == 0) \ + for (i = start; i < end; i++, v++) { \ + win; \ + col; \ + spec; \ + fog; \ + tex0; \ + tex1; \ + } \ + else \ + for (i = start; i < end; i++, v++) { \ + if (VB->ClipMask[i] == 0) { \ + win; \ + spec; \ + fog; \ + tex0; \ + tex1; \ + } \ + col; \ + } \ + tex0_4; \ + tex1_4; \ +} + + +SETUPFUNC(rs_wt0, COORD, NOP, TEX0, NOP, TEX0_4, NOP, NOP, NOP) +SETUPFUNC(rs_wt1, COORD, NOP, NOP, TEX1, NOP, TEX1_4, NOP, NOP) +SETUPFUNC(rs_wt0t1, COORD, NOP, TEX0, TEX1, TEX0_4, TEX1_4, NOP, NOP) +SETUPFUNC(rs_wft0, COORD, NOP, TEX0, NOP, TEX0_4, NOP, NOP, FOG) +SETUPFUNC(rs_wft1, COORD, NOP, NOP, TEX1, NOP, TEX1_4, NOP, FOG) +SETUPFUNC(rs_wft0t1, COORD, NOP, TEX0, TEX1, TEX0_4, TEX1_4, NOP, FOG) +SETUPFUNC(rs_wg, COORD, COL, NOP, NOP, NOP, NOP, NOP, NOP) +SETUPFUNC(rs_wgs, COORD, COL, NOP, NOP, NOP, NOP, SPC, NOP) +SETUPFUNC(rs_wgt0, COORD, COL, TEX0, NOP, TEX0_4, NOP, NOP, NOP) +SETUPFUNC(rs_wgt1, COORD, COL, NOP, TEX1, NOP, TEX1_4, NOP, NOP) +SETUPFUNC(rs_wgt0t1, COORD, COL, TEX0, TEX1, TEX0_4, TEX1_4, NOP, NOP) +SETUPFUNC(rs_wgst0, COORD, COL, TEX0, NOP, TEX0_4, NOP, SPC, NOP) +SETUPFUNC(rs_wgst1, COORD, COL, NOP, TEX1, NOP, TEX1_4, SPC, NOP) +SETUPFUNC(rs_wgst0t1, COORD, COL, TEX0, TEX1, TEX0_4, TEX1_4, SPC, NOP) +SETUPFUNC(rs_wgf, COORD, COL, NOP, NOP, NOP, NOP, NOP, FOG) +SETUPFUNC(rs_wgfs, COORD, COL, NOP, NOP, NOP, NOP, SPC, FOG) +SETUPFUNC(rs_wgft0, COORD, COL, TEX0, NOP, TEX0_4, NOP, NOP, FOG) +SETUPFUNC(rs_wgft1, COORD, COL, NOP, TEX1, NOP, TEX1_4, NOP, FOG) +SETUPFUNC(rs_wgft0t1, COORD, COL, TEX0, TEX1, TEX0_4, TEX1_4, NOP, FOG) +SETUPFUNC(rs_wgfst0, COORD, COL, TEX0, NOP, TEX0_4, NOP, SPC, FOG) +SETUPFUNC(rs_wgfst1 , COORD, COL, NOP, TEX1, NOP, TEX1_4, SPC, FOG) +SETUPFUNC(rs_wgfst0t1, COORD, COL, TEX0, TEX1, TEX0_4, TEX1_4, SPC, FOG) + +SETUPFUNC(rs_t0, NOP, NOP, TEX0, NOP, TEX0_4, NOP, NOP, NOP) +SETUPFUNC(rs_t1, NOP, NOP, NOP, TEX1, NOP, TEX1_4, NOP, NOP) +SETUPFUNC(rs_t0t1, NOP, NOP, TEX0, TEX1, TEX0_4, TEX1_4, NOP, NOP) +SETUPFUNC(rs_f, NOP, NOP, NOP, NOP, NOP, NOP, NOP, FOG) +SETUPFUNC(rs_ft0, NOP, NOP, TEX0, NOP, TEX0_4, NOP, NOP, FOG) +SETUPFUNC(rs_ft1, NOP, NOP, NOP, TEX1, NOP, TEX1_4, NOP, FOG) +SETUPFUNC(rs_ft0t1, NOP, NOP, TEX0, TEX1, TEX0_4, TEX1_4, NOP, FOG) +SETUPFUNC(rs_g, NOP, COL, NOP, NOP, NOP, NOP, NOP, NOP) +SETUPFUNC(rs_gs, NOP, COL, NOP, NOP, NOP, NOP, SPC, NOP) +SETUPFUNC(rs_gt0, NOP, COL, TEX0, NOP, TEX0_4, NOP, NOP, NOP) +SETUPFUNC(rs_gt1, NOP, COL, NOP, TEX1, NOP, TEX1_4, NOP, NOP) +SETUPFUNC(rs_gt0t1, NOP, COL, TEX0, TEX1, TEX0_4, TEX1_4, NOP, NOP) +SETUPFUNC(rs_gst0, NOP, COL, TEX0, NOP, TEX0_4, NOP, SPC, NOP) +SETUPFUNC(rs_gst1, NOP, COL, NOP, TEX1, NOP, TEX1_4, SPC, NOP) +SETUPFUNC(rs_gst0t1, NOP, COL, TEX0, TEX1, TEX0_4, TEX1_4, SPC, NOP) +SETUPFUNC(rs_gf, NOP, COL, NOP, NOP, NOP, NOP, NOP, FOG) +SETUPFUNC(rs_gfs, NOP, COL, NOP, NOP, NOP, NOP, SPC, FOG) +SETUPFUNC(rs_gft0, NOP, COL, TEX0, NOP, TEX0_4, NOP, NOP, FOG) +SETUPFUNC(rs_gft1, NOP, COL, NOP, TEX1, NOP, TEX1_4, NOP, FOG) +SETUPFUNC(rs_gft0t1, NOP, COL, TEX0, TEX1, TEX0_4, TEX1_4, NOP, FOG) +SETUPFUNC(rs_gfst0, NOP, COL, TEX0, NOP, TEX0_4, NOP, SPC, FOG) +SETUPFUNC(rs_gfst1, NOP, COL, NOP, TEX1, NOP, TEX1_4, SPC, FOG) +SETUPFUNC(rs_gfst0t1, NOP, COL, TEX0, TEX1, TEX0_4, TEX1_4, SPC, FOG) + +static void rs_invalid(struct vertex_buffer *VB, GLuint start, GLuint end) +{ + fprintf(stderr, "r128RasterSetup(): invalid setup function\n"); +} + +typedef void (*setupFunc)(struct vertex_buffer *, GLuint, GLuint); +static setupFunc setup_func[0x80]; + +/* Initialize the table of vertex buffer setup functions */ +void r128SetupInit(void) +{ + int i; + + for (i = 0; i < 0x80; i++) setup_func[i] = rs_invalid; + + /* Funcs to build vertices from scratch */ + setup_func[R128_WIN_BIT|R128_TEX0_BIT] = rs_wt0; + setup_func[R128_WIN_BIT|R128_TEX1_BIT] = rs_wt1; + setup_func[R128_WIN_BIT|R128_TEX0_BIT|R128_TEX1_BIT] = rs_wt0t1; + setup_func[R128_WIN_BIT|R128_FOG_BIT|R128_TEX0_BIT] = rs_wft0; + setup_func[R128_WIN_BIT|R128_FOG_BIT|R128_TEX1_BIT] = rs_wft1; + setup_func[R128_WIN_BIT|R128_FOG_BIT|R128_TEX0_BIT|R128_TEX1_BIT] = rs_wft0t1; + setup_func[R128_WIN_BIT|R128_RGBA_BIT] = rs_wg; + setup_func[R128_WIN_BIT|R128_RGBA_BIT|R128_SPEC_BIT] = rs_wgs; + setup_func[R128_WIN_BIT|R128_RGBA_BIT|R128_TEX0_BIT] = rs_wgt0; + setup_func[R128_WIN_BIT|R128_RGBA_BIT|R128_TEX1_BIT] = rs_wgt1; + setup_func[R128_WIN_BIT|R128_RGBA_BIT|R128_TEX0_BIT|R128_TEX1_BIT] = rs_wgt0t1; + setup_func[R128_WIN_BIT|R128_RGBA_BIT|R128_SPEC_BIT|R128_TEX0_BIT] = rs_wgst0; + setup_func[R128_WIN_BIT|R128_RGBA_BIT|R128_SPEC_BIT|R128_TEX1_BIT] = rs_wgst1; + setup_func[R128_WIN_BIT|R128_RGBA_BIT|R128_SPEC_BIT|R128_TEX0_BIT|R128_TEX1_BIT] = rs_wgst0t1; + setup_func[R128_WIN_BIT|R128_RGBA_BIT|R128_FOG_BIT] = rs_wgf; + setup_func[R128_WIN_BIT|R128_RGBA_BIT|R128_FOG_BIT|R128_SPEC_BIT] = rs_wgfs; + setup_func[R128_WIN_BIT|R128_RGBA_BIT|R128_FOG_BIT|R128_TEX0_BIT] = rs_wgft0; + setup_func[R128_WIN_BIT|R128_RGBA_BIT|R128_FOG_BIT|R128_TEX1_BIT] = rs_wgft1; + setup_func[R128_WIN_BIT|R128_RGBA_BIT|R128_FOG_BIT|R128_TEX0_BIT|R128_TEX1_BIT] = rs_wgft0t1; + setup_func[R128_WIN_BIT|R128_RGBA_BIT|R128_FOG_BIT|R128_SPEC_BIT|R128_TEX0_BIT] = rs_wgfst0; + setup_func[R128_WIN_BIT|R128_RGBA_BIT|R128_FOG_BIT|R128_SPEC_BIT|R128_TEX1_BIT] = rs_wgfst1; + setup_func[R128_WIN_BIT|R128_RGBA_BIT|R128_FOG_BIT|R128_SPEC_BIT|R128_TEX0_BIT|R128_TEX1_BIT] = rs_wgfst0t1; + + /* Funcs to repair vertices */ + setup_func[R128_TEX0_BIT] = rs_t0; + setup_func[R128_TEX1_BIT] = rs_t1; + setup_func[R128_TEX0_BIT|R128_TEX1_BIT] = rs_t0t1; + setup_func[R128_FOG_BIT] = rs_f; + setup_func[R128_FOG_BIT|R128_TEX0_BIT] = rs_ft0; + setup_func[R128_FOG_BIT|R128_TEX1_BIT] = rs_ft1; + setup_func[R128_FOG_BIT|R128_TEX0_BIT|R128_TEX1_BIT] = rs_ft0t1; + setup_func[R128_RGBA_BIT] = rs_g; + setup_func[R128_RGBA_BIT|R128_SPEC_BIT] = rs_gs; + setup_func[R128_RGBA_BIT|R128_TEX0_BIT] = rs_gt0; + setup_func[R128_RGBA_BIT|R128_TEX1_BIT] = rs_gt1; + setup_func[R128_RGBA_BIT|R128_TEX0_BIT|R128_TEX1_BIT] = rs_gt0t1; + setup_func[R128_RGBA_BIT|R128_SPEC_BIT|R128_TEX0_BIT] = rs_gst0; + setup_func[R128_RGBA_BIT|R128_SPEC_BIT|R128_TEX1_BIT] = rs_gst1; + setup_func[R128_RGBA_BIT|R128_SPEC_BIT|R128_TEX0_BIT|R128_TEX1_BIT] = rs_gst0t1; + setup_func[R128_RGBA_BIT|R128_FOG_BIT] = rs_gf; + setup_func[R128_RGBA_BIT|R128_FOG_BIT|R128_SPEC_BIT] = rs_gfs; + setup_func[R128_RGBA_BIT|R128_FOG_BIT|R128_TEX0_BIT] = rs_gft0; + setup_func[R128_RGBA_BIT|R128_FOG_BIT|R128_TEX1_BIT] = rs_gft1; + setup_func[R128_RGBA_BIT|R128_FOG_BIT|R128_TEX0_BIT|R128_TEX1_BIT] = rs_gft0t1; + setup_func[R128_RGBA_BIT|R128_FOG_BIT|R128_SPEC_BIT|R128_TEX0_BIT] = rs_gfst0; + setup_func[R128_RGBA_BIT|R128_FOG_BIT|R128_SPEC_BIT|R128_TEX1_BIT] = rs_gfst1; + setup_func[R128_RGBA_BIT|R128_FOG_BIT|R128_SPEC_BIT|R128_TEX0_BIT|R128_TEX1_BIT] = rs_gfst0t1; +} + +/* Initialize the vertex buffer setup functions based on the current + rendering state */ +void r128ChooseRasterSetupFunc(GLcontext *ctx) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + int funcIndex = R128_WIN_BIT | R128_RGBA_BIT; + + if (ctx->Texture.Enabled & 0xf) { + if (ctx->Texture.Unit[0].EnvMode == GL_REPLACE) + funcIndex &= ~R128_RGBA_BIT; + funcIndex |= R128_TEX0_BIT; + } + + if (ctx->Texture.Enabled & 0xf0) + funcIndex |= R128_TEX1_BIT; + + /* FIXME: Verify this works properly */ + if (ctx->Light.Model.ColorControl == GL_SEPARATE_SPECULAR_COLOR) + funcIndex |= R128_SPEC_BIT; + + if (ctx->FogMode == FOG_FRAGMENT) + funcIndex |= R128_FOG_BIT; + + r128ctx->SetupIndex = funcIndex; + ctx->Driver.RasterSetup = setup_func[funcIndex]; +} + +/* Check to see if any updates of the vertex buffer entries are needed */ +void r128CheckPartialRasterSetup(GLcontext *ctx, + struct gl_pipeline_stage *s) +{ + r128ContextPtr r128ctx = R128_CONTEXT(ctx); + int tmp = r128ctx->SetupDone; + + s->type = 0; + r128ctx->SetupDone = GL_FALSE; + + if ((ctx->Array.Summary & VERT_OBJ_ANY) == 0) return; + if (ctx->IndirectTriangles) return; + + r128ctx->SetupDone = tmp; +} + +/* Update the vertex buffer entries, if necessary */ +void r128PartialRasterSetup(struct vertex_buffer *VB) +{ + r128ContextPtr r128ctx = R128_CONTEXT(VB->ctx); + int new = VB->pipeline->new_outputs; + int available = VB->pipeline->outputs; + int index = 0; + + if (new & VERT_WIN) { + new = available; + index |= R128_WIN_BIT | R128_FOG_BIT; + } + + if (new & VERT_RGBA) index |= R128_RGBA_BIT | R128_SPEC_BIT; + if (new & VERT_TEX0_ANY) index |= R128_TEX0_BIT; + if (new & VERT_TEX1_ANY) index |= R128_TEX1_BIT; +#if 0 + /* FIXME */ + if (new & VERT_FOG_COORD) index |= R128_FOG_BIT; +#endif + + r128ctx->SetupDone &= ~index; + index &= r128ctx->SetupIndex; + r128ctx->SetupDone |= index; + + if (index) setup_func[index & ~R128_ALPHA_BIT](VB, VB->Start, VB->Count); +} + +/* Perform the raster setup for the fast path, if using CVA */ +void r128DoRasterSetup(struct vertex_buffer *VB) +{ + GLcontext *ctx = VB->ctx; + + if (VB->Type == VB_CVA_PRECALC) r128PartialRasterSetup(VB); + else if (ctx->Driver.RasterSetup) ctx->Driver.RasterSetup(VB, + VB->CopyStart, + VB->Count); +} + +/* Resize an existing vertex buffer */ +void r128ResizeVB(struct vertex_buffer *VB, GLuint size) +{ + r128VertexBufferPtr r128vb = R128_DRIVER_DATA(VB); + + while (r128vb->size < size) + r128vb->size *= 2; + + free(r128vb->vert_store); + r128vb->vert_store = malloc(sizeof(r128Vertex) * r128vb->size + 31); + if (!r128vb->vert_store) { + fprintf(stderr, "Cannot allocate vertex store! Exiting...\n"); + exit(1); + } + + r128vb->verts = (r128VertexPtr)(((CARD32)r128vb->vert_store + 31) & ~31); + + gl_vector1ui_free(&r128vb->clipped_elements); + gl_vector1ui_alloc(&r128vb->clipped_elements, + VEC_WRITABLE, r128vb->size, 32); + if (!r128vb->clipped_elements.start) { + fprintf(stderr, "Cannot allocate clipped elements! Exiting...\n"); + exit(1); + } + + free(VB->ClipMask); + VB->ClipMask = (GLubyte *)malloc(sizeof(GLubyte) * r128vb->size); + if (!VB->ClipMask) { + fprintf(stderr, "Cannot allocate clipmask! Exiting...\n"); + exit(1); + } +} + +/* Create a new device-dependent vertex buffer */ +void r128DDRegisterVB(struct vertex_buffer *VB) +{ + r128VertexBufferPtr r128vb; + + r128vb = (r128VertexBufferPtr)calloc(1, sizeof(*r128vb)); + + r128vb->size = VB->Size * 2; + r128vb->vert_store = malloc(sizeof(r128Vertex) * r128vb->size + 31); + if (!r128vb->vert_store) { + fprintf(stderr, "Cannot allocate vertex store! Exiting...\n"); + exit(1); + } + + r128vb->verts = (r128VertexPtr)(((CARD32)r128vb->vert_store + 31) & ~31); + + gl_vector1ui_alloc(&r128vb->clipped_elements, + VEC_WRITABLE, r128vb->size, 32); + if (!r128vb->clipped_elements.start) { + fprintf(stderr, "Cannot allocate clipped elements! Exiting...\n"); + exit(1); + } + + free(VB->ClipMask); + VB->ClipMask = (GLubyte *)malloc(sizeof(GLubyte) * r128vb->size); + if (!VB->ClipMask) { + fprintf(stderr, "Cannot allocate clipmask! Exiting...\n"); + exit(1); + } + + VB->driver_data = r128vb; +} + +/* Destroy a device-dependent vertex buffer */ +void r128DDUnregisterVB(struct vertex_buffer *VB) +{ + r128VertexBufferPtr r128vb = R128_DRIVER_DATA(VB); + + if (r128vb) { + if (r128vb->vert_store) free(r128vb->vert_store); + gl_vector1ui_free(&r128vb->clipped_elements); + free(r128vb); + VB->driver_data = 0; + } +} diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_vb.h b/xc/lib/GL/mesa/src/drv/r128/r128_vb.h new file mode 100644 index 000000000..4f7c11d7f --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_vb.h @@ -0,0 +1,150 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#ifndef _R128_VB_H_ +#define _R128_VB_H_ + +#ifdef GLX_DIRECT_RENDERING + +#define USE_RHW2 0 + +/* FIXME: This is endian-specific */ +typedef struct { + GLubyte b; + GLubyte g; + GLubyte r; + GLubyte a; +} r128Color; + +typedef struct { + GLfloat x, y, z; /* Coordinates in screen space */ + GLfloat rhw; /* Reciprocal homogeneous w */ + r128Color dif_argb; /* Diffuse color */ + r128Color spec_frgb; /* Specular color (alpha is fog) */ + GLfloat tu0, tv0; /* Texture 0 coordinates */ + GLfloat tu1, tv1; /* Texture 1 coordinates */ +#if USE_RHW2 + GLfloat rhw2; /* Reciprocal homogeneous w */ +#endif +} r128_vertex; + +#if USE_RHW2 +/* Format of vertices in r128_vertex struct */ +#define R128_FULL_VERTEX_FORMAT \ + R128_CCE_VC_FRMT_RHW | \ + R128_CCE_VC_FRMT_DIFFUSE_ARGB | \ + R128_CCE_VC_FRMT_SPEC_FRGB | \ + R128_CCE_VC_FRMT_S_T | \ + R128_CCE_VC_FRMT_S2_T2 | \ + R128_CCE_VC_FRMT_RHW2 + +/* Send a single vertex to the ring buffer */ +#define R128CCE_SEND_VERTEX(v) \ + do { \ + R128CCEF((v)->x); \ + R128CCEF((v)->y); \ + R128CCEF((v)->z); \ + R128CCEF((v)->rhw); \ + R128CCE(*(int *)&(v)->dif_argb); \ + R128CCE(*(int *)&(v)->spec_frgb); \ + R128CCEF((v)->tu0); \ + R128CCEF((v)->tv0); \ + R128CCEF((v)->tu1); \ + R128CCEF((v)->tv1); \ + R128CCEF((v)->rhw2); \ + } while (0) + +#else /* !USE_RHW2 */ + +/* Format of vertices in r128_vertex struct */ +#define R128_FULL_VERTEX_FORMAT \ + R128_CCE_VC_FRMT_RHW | \ + R128_CCE_VC_FRMT_DIFFUSE_ARGB | \ + R128_CCE_VC_FRMT_SPEC_FRGB | \ + R128_CCE_VC_FRMT_S_T | \ + R128_CCE_VC_FRMT_S2_T2 + +/* Send a single vertex to the ring buffer */ +#define R128CCE_SEND_VERTEX(v) \ + do { \ + R128CCEF((v)->x); \ + R128CCEF((v)->y); \ + R128CCEF((v)->z); \ + R128CCEF((v)->rhw); \ + R128CCE(*(int *)&(v)->dif_argb); \ + R128CCE(*(int *)&(v)->spec_frgb); \ + R128CCEF((v)->tu0); \ + R128CCEF((v)->tv0); \ + R128CCEF((v)->tu1); \ + R128CCEF((v)->tv1); \ + } while (0) +#endif + +/* FIXME: We currently only have assembly for 16-stride vertices */ +typedef union { + r128_vertex v; + float f[16]; +} r128Vertex, *r128VertexPtr; + +/* Vertex buffer for use when on the fast path */ +typedef struct { + GLuint size; /* Number of vertices in store */ + void *vert_store; /* Storage for vertex buffer */ + r128VertexPtr verts; /* Aligned start of verts in storage */ + int last_vert; /* Index of last vertex used */ + GLvector1ui clipped_elements; /* List of clipped elements */ +} *r128VertexBufferPtr; + +#define R128_DRIVER_DATA(vb) ((r128VertexBufferPtr)((vb)->driver_data)) + +#define R128_SPEC_BIT 0x01 +#define R128_FOG_BIT 0x02 +#define R128_ALPHA_BIT 0x04 /* GL_BLEND, not used */ +#define R128_TEX1_BIT 0x08 +#define R128_TEX0_BIT 0x10 +#define R128_RGBA_BIT 0x20 +#define R128_WIN_BIT 0x40 + +extern void r128SetupInit(void); +extern void r128ChooseRasterSetupFunc(GLcontext *ctx); +extern void r128CheckPartialRasterSetup(GLcontext *ctx, + struct gl_pipeline_stage *s); +extern void r128PartialRasterSetup(struct vertex_buffer *VB); +extern void r128DoRasterSetup(struct vertex_buffer *VB); +extern void r128ResizeVB(struct vertex_buffer *VB, GLuint size); +extern void r128DDRegisterVB(struct vertex_buffer *VB); +extern void r128DDUnregisterVB(struct vertex_buffer *VB); + +#endif +#endif /* _R128_VB_H_ */ diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_xmesa.c b/xc/lib/GL/mesa/src/drv/r128/r128_xmesa.c new file mode 100644 index 000000000..60d528813 --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_xmesa.c @@ -0,0 +1,257 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#ifdef GLX_DIRECT_RENDERING + +/* r128 Mesa driver includes */ +#include "r128_init.h" +#include "r128_context.h" +#include "r128_xmesa.h" +#include "r128_state.h" +#include "r128_tex.h" +#include "r128_swap.h" + +/* Mesa src includes */ +#include "context.h" +#include "simple_list.h" +#include "mmath.h" + +#ifndef R128_DEBUG_FLAGS +int R128_DEBUG_FLAGS = (0 +#if 0 + | DEBUG_ALWAYS_SYNC + | DEBUG_VERBOSE_CCE + | DEBUG_VERBOSE_OUTREG + | DEBUG_VERBOSE_MSG + | DEBUG_NO_OUTRING + | DEBUG_NO_OUTREG + | DEBUG_VERBOSE_API + | DEBUG_VERBOSE_2D + | DEBUG_VERBOSE_DRI + | DEBUG_VALIDATE_RING + | DEBUG_VERBOSE_IOCTL +#endif + ); +#endif + +#if DEBUG_LOCKING +char *prevLockFile = NULL; +int prevLockLine = 0; +#endif + +static r128ContextPtr r128Context = NULL; + + +/* Initialize the driver specific screen private data */ +GLboolean XMesaInitDriver(__DRIscreenPrivate *sPriv) +{ + sPriv->private = (void *)r128CreateScreen(sPriv); + if (!sPriv->private) { + r128DestroyScreen(sPriv); + return GL_FALSE; + } + + return GL_TRUE; +} + +/* Reset the driver specific screen private data */ +void XMesaResetDriver(__DRIscreenPrivate *sPriv) +{ + r128DestroyScreen(sPriv); +} + +/* Create and initialize the Mesa and driver specific visual data */ +GLvisual *XMesaCreateVisual(Display *dpy, + __DRIscreenPrivate *driScrnPriv, + const XVisualInfo *visinfo, + const __GLXvisualConfig *config) +{ + /* Drivers may change the args to _mesa_create_visual() in order to + * setup special visuals. + */ + return _mesa_create_visual(config->rgba, + config->doubleBuffer, + config->stereo, + _mesa_bitcount(visinfo->red_mask), + _mesa_bitcount(visinfo->green_mask), + _mesa_bitcount(visinfo->blue_mask), + config->alphaSize, + 0, /* index bits */ + config->depthSize, + config->stencilSize, + config->accumRedSize, + config->accumGreenSize, + config->accumBlueSize, + config->accumAlphaSize, + 0 /* num samples */); +} + +/* Create and initialize the Mesa and driver specific context data */ +GLboolean XMesaCreateContext(Display *dpy, GLvisual *mesaVis, + __DRIcontextPrivate *driContextPriv) +{ + return r128CreateContext(dpy, mesaVis, driContextPriv); +} + +/* Destroy the Mesa and driver specific context data */ +void XMesaDestroyContext(__DRIcontextPrivate *driContextPriv) +{ + r128ContextPtr r128ctx = (r128ContextPtr)driContextPriv->driverPrivate; + + if (r128ctx == (void *)r128Context) r128Context = NULL; + r128DestroyContext(r128ctx); +} + +/* Create and initialize the Mesa and driver specific pixmap buffer data */ +GLframebuffer *XMesaCreateWindowBuffer(Display *dpy, + __DRIscreenPrivate *driScrnPriv, + __DRIdrawablePrivate *driDrawPriv, + GLvisual *mesaVis) +{ + return gl_create_framebuffer(mesaVis, + GL_FALSE, /* software depth buffer? */ + mesaVis->StencilBits > 0, + mesaVis->AccumRedBits > 0, + mesaVis->AlphaBits > 0 + ); +} + +/* Create and initialize the Mesa and driver specific pixmap buffer data */ +GLframebuffer *XMesaCreatePixmapBuffer( Display *dpy, + __DRIscreenPrivate *driScrnPriv, + __DRIdrawablePrivate *driDrawPriv, + GLvisual *mesaVis) +{ +#if 0 + /* Different drivers may have different combinations of hardware and + * software ancillary buffers. + */ + return gl_create_framebuffer(mesaVis, + GL_FALSE, /* software depth buffer? */ + mesaVis->StencilBits > 0, + mesaVis->AccumRedBits > 0, + mesaVis->AlphaBits > 0); +#else + return NULL; /* not implemented yet */ +#endif +} + +/* Copy the back color buffer to the front color buffer */ +void XMesaSwapBuffers(__DRIdrawablePrivate *driDrawPriv) +{ + /* FIXME: This assumes buffer is currently bound to a context. This + needs to be able to swap buffers when not currently bound. Also, + this needs to swap according to buffer, and NOT according to + context! */ + if (r128Context == NULL) return; + + /* Only swap buffers when a back buffer exists */ + if (R128_MESACTX(r128Context)->Visual->DBflag) { + FLUSH_VB(R128_MESACTX(r128Context), "swap buffers"); + r128SwapBuffers(r128Context); + } +} + +/* Force the context `c' to be the current context and associate with it + buffer `b' */ +GLboolean XMesaMakeCurrent(__DRIcontextPrivate *driContextPriv, + __DRIdrawablePrivate *driDrawPriv, + __DRIdrawablePrivate *driReadPriv) +{ + if (driContextPriv) { + r128ContextPtr r128ctx = (r128ContextPtr)driContextPriv->driverPrivate; + + if (r128Context && + r128ctx == (void *)r128Context && + driDrawPriv == R128_DRIDRAWABLE(r128Context)) + return GL_TRUE; + + r128Context = r128MakeCurrent(r128Context, r128ctx, driDrawPriv); + + gl_make_current2(R128_MESACTX(r128Context), + driDrawPriv->mesaBuffer, driReadPriv->mesaBuffer); + + if (!R128_MESACTX(r128Context)->Viewport.Width) { + gl_Viewport(R128_MESACTX(r128Context), 0, 0, + driDrawPriv->w, driDrawPriv->h); + } + } else { + gl_make_current(0,0); + r128Context = NULL; + } + + return GL_TRUE; +} + +/* Force the context `c' to be unbound from its buffer */ +GLboolean XMesaUnbindContext(__DRIcontextPrivate *driContextPriv) +{ + return GL_TRUE; +} + +/* Update the hardware state. This is called if another context has + grabbed the hardware lock, which includes the X server. This + function also updates the driver's window state after the X server + moves, resizes or restacks a window -- the change will be reflected + in the drawable position and clip rects. Since the X server grabs + the hardware lock when it changes the window state, this routine will + automatically be called after such a change. */ +/* NOTE: This routine is only called while holding the hardware lock. */ +void XMesaUpdateState(__DRIcontextPrivate *driContextPriv) +{ + r128ContextPtr r128ctx = driContextPriv->driverPrivate; + __DRIscreenPrivate *sPriv = R128_DRISCREEN(r128ctx); + __DRIdrawablePrivate *dPriv = R128_DRIDRAWABLE(r128ctx); + int stamp = dPriv->lastStamp; + + /* The window might have moved, so we might need to get new clip + rects. + + NOTE: This releases and regrabs the hw lock to allow the X server + to respond to the DRI protocol request for new drawable info. + Since the hardware state depends on having the latest drawable + clip rects, all state checking must be done _after_ this call. */ + XMESA_VALIDATE_DRAWABLE_INFO(r128ctx->display, sPriv, dPriv); + + r128UpdateState(r128ctx, (stamp != dPriv->lastStamp)); +} + +/* This function is called by libGL.so as soon as libGL.so is loaded. + * This is where we'd register new extension functions with the dispatcher. + */ +void __driRegisterExtensions(void) +{ +} + +#endif diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_xmesa.h b/xc/lib/GL/mesa/src/drv/r128/r128_xmesa.h new file mode 100644 index 000000000..ca6fc127b --- /dev/null +++ b/xc/lib/GL/mesa/src/drv/r128/r128_xmesa.h @@ -0,0 +1,44 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#ifndef _R128_XMESA_H_ +#define _R128_XMESA_H_ + +#ifdef GLX_DIRECT_RENDERING + +extern void XMesaUpdateState(__DRIcontextPrivate *driContextPriv); +extern void __driRegisterExtensions(void); + +#endif +#endif /* _R128_XMESA_H_ */ diff --git a/xc/lib/GL/mesa/src/drv/tdfx/Imakefile b/xc/lib/GL/mesa/src/drv/tdfx/Imakefile index 7802f3bec..4a6a8e0ff 100644 --- a/xc/lib/GL/mesa/src/drv/tdfx/Imakefile +++ b/xc/lib/GL/mesa/src/drv/tdfx/Imakefile @@ -110,7 +110,7 @@ LinkSourceFile(fxvs_tmp.h, ../../../../../../extras/Mesa/src/FX) ../../glthread.c \ ../../hash.c \ ../../image.c \ - ../../imaging.o \ + ../../imaging.c \ ../../light.c \ ../../lines.c \ ../../logic.c \ @@ -245,8 +245,7 @@ LinkSourceFile(fxvs_tmp.h, ../../../../../../extras/Mesa/src/FX) MMX_OBJS = ../../X86/mmx_blend.o -XCOMM Disabling 3Dnow code for the time being. -#if 0 +#if MesaUse3DNow 3DNOW_SRCS = ../../X86/3dnow.c \ ../../X86/3dnow_norm_raw.S \ ../../X86/3dnow_xform_masked1.S \ @@ -281,6 +280,10 @@ XCOMM Disabling 3Dnow code for the time being. OBJS = $(DRIOBJS) $(DRMOBJS) $(TDFXOBJS) $(MESAOBJS) $(ASMOBJS) REQUIREDLIBS = -lglide3x -lm +#if !GlxBuiltInTdfx +REQUIREDLIBS += -L../../../.. -lGL +#endif + #if !GlxUseBuiltInDRIDriver #undef DoNormalLib NormalLibGlx diff --git a/xc/lib/GL/mesa/src/drv/tdfx/tdfx_init.h b/xc/lib/GL/mesa/src/drv/tdfx/tdfx_init.h index 3759512ee..251992d00 100644 --- a/xc/lib/GL/mesa/src/drv/tdfx/tdfx_init.h +++ b/xc/lib/GL/mesa/src/drv/tdfx/tdfx_init.h @@ -41,9 +41,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "dri_tmm.h" #include "dri_mesaint.h" #include "dri_mesa.h" -#include "types.h" -#include "xmesaP.h" -/* #include "fxdrv.h" */ +#include "dri_xmesaapi.h" + typedef struct { drmHandle handle; @@ -98,7 +97,8 @@ typedef struct tfxMesaContext tdfxContextPrivate; extern GLboolean tdfxMapAllRegions(__DRIscreenPrivate *driScrnPriv); extern void tdfxUnmapAllRegions(__DRIscreenPrivate *driScrnPriv); -extern GLboolean tdfxInitHW(XMesaContext c); +extern GLboolean tdfxInitHW(__DRIdrawablePrivate *driDrawPrivate, + tdfxContextPrivate *cPriv); extern void XMesaWindowMoved(void); extern void XMesaUpdateState(int windowMoved); @@ -119,8 +119,8 @@ extern void grDRIImportFifo(int fifoPtr, int fifoRead); extern void grDRIInvalidateAll(void); extern void grDRIResetSAREA(void); -extern XMesaContext gCC; -extern tdfxContextPrivate *gCCPriv; +extern __DRIcontextPrivate *gCC; +/*000extern tdfxContextPrivate *gCCPriv;*/ /* You can turn this on to find locking conflicts. #define DEBUG_LOCKING @@ -167,7 +167,7 @@ extern int prevLockLine; #define LOCK_HARDWARE() \ do { \ char __ret=0; \ - __DRIdrawablePrivate *dPriv = gCC->driContextPriv->driDrawablePriv; \ + __DRIdrawablePrivate *dPriv = gCC->driDrawablePriv; \ __DRIscreenPrivate *sPriv = dPriv->driScreenPriv; \ DEBUG_CHECK_LOCK(); \ DRM_CAS(&sPriv->pSAREA->lock, dPriv->driContextPriv->hHWContext, \ @@ -186,7 +186,7 @@ extern int prevLockLine; /* Unlock the hardware using the global current context */ #define UNLOCK_HARDWARE() \ do { \ - __DRIdrawablePrivate *dPriv = gCC->driContextPriv->driDrawablePriv; \ + __DRIdrawablePrivate *dPriv = gCC->driDrawablePriv; \ __DRIscreenPrivate *sPriv = dPriv->driScreenPriv; \ XMesaSetSAREA(); \ DRM_UNLOCK(sPriv->fd, &sPriv->pSAREA->lock, \ @@ -202,24 +202,26 @@ extern int prevLockLine; so it is not self contained and doesn't have the nice single statement semantics of most macros */ -#define BEGIN_CLIP_LOOP() \ - do { \ - __DRIdrawablePrivate *dPriv = gCC->driContextPriv->driDrawablePriv; \ - int _nc; \ - LOCK_HARDWARE(); \ - _nc = dPriv->numClipRects; \ - while (_nc--) { \ - if (gCCPriv->needClip) { \ - gCCPriv->clipMinX=dPriv->pClipRects[_nc].x1; \ - gCCPriv->clipMaxX=dPriv->pClipRects[_nc].x2; \ - gCCPriv->clipMinY=dPriv->pClipRects[_nc].y1; \ - gCCPriv->clipMaxY=dPriv->pClipRects[_nc].y2; \ - fxSetScissorValues(gCCPriv->glCtx); \ +#define BEGIN_CLIP_LOOP() \ + do { \ + __DRIdrawablePrivate *dPriv = gCC->driDrawablePriv; \ + int _nc; \ + LOCK_HARDWARE(); \ + _nc = dPriv->numClipRects; \ + while (_nc--) { \ + tdfxContextPrivate *gCCPriv = \ + (tdfxContextPrivate *) gCC->driverPrivate; \ + if (gCCPriv->needClip) { \ + gCCPriv->clipMinX=dPriv->pClipRects[_nc].x1; \ + gCCPriv->clipMaxX=dPriv->pClipRects[_nc].x2; \ + gCCPriv->clipMinY=dPriv->pClipRects[_nc].y1; \ + gCCPriv->clipMaxY=dPriv->pClipRects[_nc].y2; \ + fxSetScissorValues(gCCPriv->glCtx); \ } -#define END_CLIP_LOOP() \ - } \ - UNLOCK_HARDWARE(); \ +#define END_CLIP_LOOP() \ + } \ + UNLOCK_HARDWARE(); \ } while (0) #endif diff --git a/xc/lib/GL/mesa/src/drv/tdfx/tdfx_inithw.c b/xc/lib/GL/mesa/src/drv/tdfx/tdfx_inithw.c index a225fec89..7d74318e1 100644 --- a/xc/lib/GL/mesa/src/drv/tdfx/tdfx_inithw.c +++ b/xc/lib/GL/mesa/src/drv/tdfx/tdfx_inithw.c @@ -36,13 +36,11 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "tdfx_init.h" #include <glide.h> -GLboolean tdfxInitHW(XMesaContext c) +GLboolean tdfxInitHW(__DRIdrawablePrivate *driDrawPriv, + tdfxContextPrivate *fxMesa) { /* KW: Would be nice to make one of these a member of the other. */ - tdfxContextPrivate *cPriv = (tdfxContextPrivate*)c->private; - tdfxContextPrivate *fxMesa = cPriv; - __DRIdrawablePrivate *driDrawPriv = c->driContextPriv->driDrawablePriv; __DRIscreenPrivate *driScrnPriv = driDrawPriv->driScreenPriv; tdfxScreenPrivate *sPriv = (tdfxScreenPrivate*)driScrnPriv->private; @@ -50,10 +48,10 @@ GLboolean tdfxInitHW(XMesaContext c) fprintf(stderr, "Debug locking enabled\n"); #endif - if (cPriv->initDone) return GL_TRUE; + if (fxMesa->initDone) return GL_TRUE; - cPriv->width=driDrawPriv->w; - cPriv->height=driDrawPriv->h; + fxMesa->width=driDrawPriv->w; + fxMesa->height=driDrawPriv->h; /* We have to use a light lock here, because we can't do any glide operations yet. No use of FX_* functions in this function. */ @@ -95,7 +93,7 @@ GLboolean tdfxInitHW(XMesaContext c) fxInitPixelTables(fxMesa, GL_FALSE); /* Load tables of pixel colors */ - cPriv->initDone=GL_TRUE; + fxMesa->initDone=GL_TRUE; return GL_TRUE; } diff --git a/xc/lib/GL/mesa/src/drv/tdfx/tdfx_xmesa.c b/xc/lib/GL/mesa/src/drv/tdfx/tdfx_xmesa.c index 7fc55cb16..e99c57a07 100644 --- a/xc/lib/GL/mesa/src/drv/tdfx/tdfx_xmesa.c +++ b/xc/lib/GL/mesa/src/drv/tdfx/tdfx_xmesa.c @@ -28,7 +28,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. /* * Authors: * Daryll Strauss <daryll@precisioninsight.com> - * + * Brian E. Paul <brian@precisioninsight.com> */ #ifdef GLX_DIRECT_RENDERING @@ -37,23 +37,13 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include <glide.h> #include "tdfx_init.h" #include "context.h" -#include "vbxform.h" #include "matrix.h" +#include "mmath.h" +#include "vbxform.h" -XMesaContext nullCC = 0; -XMesaContext gCC = 0; -tdfxContextPrivate *gCCPriv = 0; -static int count_bits(unsigned int n) -{ - int bits = 0; +__DRIcontextPrivate *gCC = 0; - while (n > 0) { - if (n & 1) bits++; - n >>= 1; - } - return bits; -} GLboolean XMesaInitDriver(__DRIscreenPrivate *driScrnPriv) { @@ -81,157 +71,120 @@ void XMesaResetDriver(__DRIscreenPrivate *driScrnPriv) Xfree(driScrnPriv->private); } -XMesaVisual XMesaCreateVisual(XMesaDisplay *display, - XMesaVisualInfo visinfo, - GLboolean rgb_flag, - GLboolean alpha_flag, - GLboolean db_flag, - GLboolean stereo_flag, - GLboolean ximage_flag, - GLint depth_size, - GLint stencil_size, - GLint accum_size, - GLint level) -{ - XMesaVisual v; - - /* Only RGB visuals are supported on the TDFX boards */ - if (!rgb_flag) return 0; - - v = (XMesaVisual)Xmalloc(sizeof(struct xmesa_visual)); - if (!v) return 0; - - v->visinfo = (XVisualInfo *)Xmalloc(sizeof(*visinfo)); - if(!v->visinfo) { - Xfree(v); - return 0; - } - memcpy(v->visinfo, visinfo, sizeof(*visinfo)); - - v->display = display; - v->level = level; - - v->gl_visual = (GLvisual *)Xmalloc(sizeof(GLvisual)); - if (!v->gl_visual) { - Xfree(v->visinfo); - XFree(v); - return 0; - } - - v->gl_visual->RGBAflag = rgb_flag; - v->gl_visual->DBflag = db_flag; - v->gl_visual->StereoFlag = stereo_flag; - v->gl_visual->RedBits = count_bits(visinfo->red_mask); - v->gl_visual->GreenBits = count_bits(visinfo->green_mask); - v->gl_visual->BlueBits = count_bits(visinfo->blue_mask); - v->gl_visual->AlphaBits = 0; /* Not currently supported */ - - v->gl_visual->AccumBits = accum_size; - v->gl_visual->DepthBits = depth_size; - v->gl_visual->StencilBits = stencil_size; - - return v; -} - -void XMesaDestroyVisual(XMesaVisual v) +GLvisual *XMesaCreateVisual(Display *dpy, + __DRIscreenPrivate *driScrnPriv, + const XVisualInfo *visinfo, + const __GLXvisualConfig *config) { - Xfree(v->gl_visual); - Xfree(v->visinfo); - Xfree(v); + /* Drivers may change the args to _mesa_create_visual() in order to + * setup special visuals. + */ + return _mesa_create_visual( config->rgba, + config->doubleBuffer, + config->stereo, + _mesa_bitcount(visinfo->red_mask), + _mesa_bitcount(visinfo->green_mask), + _mesa_bitcount(visinfo->blue_mask), + config->alphaSize, + 0, /* index bits */ + config->depthSize, + config->stencilSize, + config->accumRedSize, + config->accumGreenSize, + config->accumBlueSize, + config->accumAlphaSize, + 0 /* num samples */ ); } -XMesaContext XMesaCreateContext(XMesaVisual v, XMesaContext share_list, - __DRIcontextPrivate *driContextPriv) + +GLboolean XMesaCreateContext(Display *dpy, GLvisual *mesaVis, + __DRIcontextPrivate *driContextPriv) { - XMesaContext c; tdfxContextPrivate *cPriv; __DRIscreenPrivate *driScrnPriv = driContextPriv->driScreenPriv; tdfxScreenPrivate *sPriv = (tdfxScreenPrivate *)driScrnPriv->private; TDFXSAREAPriv *saPriv; - GLcontext *shareCtx; - int **fifoPtr; - - c = (XMesaContext)Xmalloc(sizeof(struct xmesa_context)); - if (!c) return 0; - - c->driContextPriv = driContextPriv; - c->xm_visual = v; - c->xm_buffer = 0; /* Set by MakeCurrent */ - c->display = v->display; + /*int **fifoPtr;*/ cPriv = (tdfxContextPrivate *)Xmalloc(sizeof(tdfxContextPrivate)); if (!cPriv) { - Xfree(c); - return NULL; + return GL_FALSE; } cPriv->hHWContext = driContextPriv->hHWContext; cPriv->tdfxScrnPriv = sPriv; - c->private = (void *)cPriv; - - cPriv->glVis=v->gl_visual; - cPriv->glBuffer=gl_create_framebuffer(v->gl_visual, - GL_FALSE, /* software depth buffer? */ - v->gl_visual->StencilBits > 0, - v->gl_visual->AccumBits > 0, - v->gl_visual->AlphaBits > 0 - ); - cPriv->screen_width=sPriv->width; cPriv->screen_height=sPriv->height; - cPriv->new_state = ~0; - if (share_list) - shareCtx=((tdfxContextPrivate*)(share_list->private))->glCtx; - else - shareCtx=0; - cPriv->glCtx=gl_create_context(v->gl_visual, shareCtx, (void*)cPriv, GL_TRUE); + cPriv->glCtx = driContextPriv->mesaContext; cPriv->initDone=GL_FALSE; - saPriv=(TDFXSAREAPriv*)((void*)driScrnPriv->pSAREA+sizeof(XF86DRISAREARec)); + saPriv=(TDFXSAREAPriv*)((char*)driScrnPriv->pSAREA+sizeof(XF86DRISAREARec)); grDRIOpen(driScrnPriv->pFB, sPriv->regs.map, sPriv->deviceID, sPriv->width, sPriv->height, sPriv->mem, sPriv->cpp, sPriv->stride, sPriv->fifoOffset, sPriv->fifoSize, sPriv->fbOffset, sPriv->backOffset, sPriv->depthOffset, sPriv->textureOffset, sPriv->textureSize, &saPriv->fifoPtr, &saPriv->fifoRead); - return c; + driContextPriv->driverPrivate = (void *) cPriv; + + return GL_TRUE; } -void XMesaDestroyContext(XMesaContext c) +void XMesaDestroyContext(__DRIcontextPrivate *driContextPriv) { tdfxContextPrivate *cPriv; - cPriv=(tdfxContextPrivate*)c->private; + cPriv = (tdfxContextPrivate *) driContextPriv->driverPrivate; if (cPriv) { - gl_destroy_context(cPriv->glCtx); - gl_destroy_framebuffer(cPriv->glBuffer); + /* XXX XFree the tdfxContextPrivate struct? */ + driContextPriv->driverPrivate = NULL; } - if (c==gCC) { - gCC=0; - gCCPriv=0; + + if (driContextPriv == gCC) { + gCC = 0; } } -XMesaBuffer XMesaCreateWindowBuffer(XMesaVisual v, XMesaWindow w, - __DRIdrawablePrivate *driDrawPriv) -{ - return (XMesaBuffer)1; -} -XMesaBuffer XMesaCreatePixmapBuffer(XMesaVisual v, XMesaPixmap p, - XMesaColormap c, __DRIdrawablePrivate *driDrawPriv) +GLframebuffer *XMesaCreateWindowBuffer( Display *dpy, + __DRIscreenPrivate *driScrnPriv, + __DRIdrawablePrivate *driDrawPriv, + GLvisual *mesaVis) { - return (XMesaBuffer)1; + return gl_create_framebuffer(mesaVis, + GL_FALSE, /* software depth buffer? */ + mesaVis->StencilBits > 0, + mesaVis->AccumRedBits > 0, + mesaVis->AlphaBits > 0 + ); } -void XMesaDestroyBuffer(XMesaBuffer b) + +GLframebuffer *XMesaCreatePixmapBuffer( Display *dpy, + __DRIscreenPrivate *driScrnPriv, + __DRIdrawablePrivate *driDrawPriv, + GLvisual *mesaVis) { +#if 0 + /* Different drivers may have different combinations of hardware and + * software ancillary buffers. + */ + return gl_create_framebuffer(mesaVis, + GL_FALSE, /* software depth buffer? */ + mesaVis->StencilBits > 0, + mesaVis->AccumRedBits > 0, + mesaVis->AlphaBits > 0 + ); +#else + return NULL; /* not implemented yet */ +#endif } -void XMesaSwapBuffers(XMesaBuffer b) + +void XMesaSwapBuffers(__DRIdrawablePrivate *driDrawPriv) { FxI32 result; #ifdef STATS @@ -239,15 +192,20 @@ void XMesaSwapBuffers(XMesaBuffer b) extern int texSwaps; static int prevStalls=0; #endif + tdfxContextPrivate *gCCPriv; + /* ** NOT_DONE: This assumes buffer is currently bound to a context. ** This needs to be able to swap buffers when not currently bound. */ - if (gCC == NULL || gCCPriv == NULL) return; + if (gCC == NULL) + return; + + gCCPriv = (tdfxContextPrivate *) gCC->driverPrivate; FLUSH_VB( gCCPriv->glCtx, "swap buffers" ); - if (gCCPriv->haveDoubleBuffer) { + if (gCC->mesaContext->Visual->DBflag) { #ifdef STATS stalls=grFifoGetStalls(); if (stalls!=prevStalls) { @@ -264,56 +222,62 @@ void XMesaSwapBuffers(XMesaBuffer b) result=FX_grGetInteger(FX_PENDING_BUFFERSWAPS); } while (result>gCCPriv->maxPendingSwapBuffers); gCCPriv->stats.swapBuffer++; - } else { - fprintf(stderr, "No double buffer\n"); } } -GLboolean XMesaUnbindContext(XMesaContext c) +GLboolean XMesaUnbindContext(__DRIcontextPrivate *driContextPriv) { - if (c && c==gCC && gCCPriv) FX_grGlideGetState((GrState*)gCCPriv->state); - return GL_TRUE; + if (driContextPriv && driContextPriv == gCC) { + tdfxContextPrivate *gCCPriv; + gCCPriv = (tdfxContextPrivate *) gCC->driverPrivate; + FX_grGlideGetState((GrState*)gCCPriv->state); + } + return GL_TRUE; } -GLboolean XMesaMakeCurrent(XMesaContext c, XMesaBuffer b) +GLboolean XMesaMakeCurrent(__DRIcontextPrivate *driContextPriv, + __DRIdrawablePrivate *driDrawPriv, + __DRIdrawablePrivate *driReadPriv) { - __DRIdrawablePrivate *driDrawPriv; + if (driContextPriv) { + tdfxContextPrivate *gCCPriv; - if (c) { - if (c==gCC) return GL_TRUE; - gCC = c; - gCCPriv = (tdfxContextPrivate *)c->private; + gCC = driContextPriv; + gCCPriv = (tdfxContextPrivate *)driContextPriv->driverPrivate; - driDrawPriv = gCC->driContextPriv->driDrawablePriv; if (!gCCPriv->initDone) { - if (!tdfxInitHW(c)) return GL_FALSE; + if (!tdfxInitHW(driDrawPriv, gCCPriv)) + return GL_FALSE; gCCPriv->width=0; XMesaWindowMoved(); FX_grGlideGetState((GrState*)gCCPriv->state); - } else { + } + else { FX_grSstSelect(gCCPriv->board); FX_grGlideSetState((GrState*)gCCPriv->state); XMesaWindowMoved(); } - gl_make_current(gCCPriv->glCtx, gCCPriv->glBuffer); + gl_make_current2(gCCPriv->glCtx, driDrawPriv->mesaBuffer, driReadPriv->mesaBuffer); + fxSetupDDPointers(gCCPriv->glCtx); if (!gCCPriv->glCtx->Viewport.Width) gl_Viewport(gCCPriv->glCtx, 0, 0, driDrawPriv->w, driDrawPriv->h); - } else { + } + else { gl_make_current(0,0); - gCC = NULL; - gCCPriv = NULL; + gCC = NULL; } return GL_TRUE; } -void -XMesaWindowMoved() { - __DRIdrawablePrivate *dPriv = gCC->driContextPriv->driDrawablePriv; - GLcontext *ctx; - - ctx=gCCPriv->glCtx; + +void XMesaWindowMoved(void) +{ + __DRIdrawablePrivate *dPriv = gCC->driDrawablePriv; + tdfxContextPrivate *gCCPriv = (tdfxContextPrivate *) gCC->driverPrivate; + GLcontext *ctx = gCCPriv->glCtx; + grDRIPosition(dPriv->x, dPriv->y, dPriv->w, dPriv->h, dPriv->numClipRects, dPriv->pClipRects); gCCPriv->numClipRects=dPriv->numClipRects; @@ -326,6 +290,7 @@ XMesaWindowMoved() { gCCPriv->height=dPriv->h; gCCPriv->y_delta=gCCPriv->screen_height-gCCPriv->y_offset-gCCPriv->height; } + gCCPriv->needClip=1; switch (dPriv->numClipRects) { case 0: gCCPriv->clipMinX=dPriv->x; @@ -344,14 +309,15 @@ XMesaWindowMoved() { gCCPriv->needClip=0; break; default: - gCCPriv->needClip=1; } } /* This is called from within the LOCK_HARDWARE routine */ -void XMesaUpdateState(int windowMoved) { - __DRIdrawablePrivate *dPriv = gCC->driContextPriv->driDrawablePriv; +void XMesaUpdateState(int windowMoved) +{ + __DRIdrawablePrivate *dPriv = gCC->driDrawablePriv; __DRIscreenPrivate *sPriv = dPriv->driScreenPriv; + tdfxContextPrivate *gCCPriv = (tdfxContextPrivate *) gCC->driverPrivate; TDFXSAREAPriv *saPriv=(TDFXSAREAPriv*)(((char*)sPriv->pSAREA)+sizeof(XF86DRISAREARec)); /* fprintf(stderr, "In FifoPtr=%d FifoRead=%d\n", saPriv->fifoPtr, saPriv->fifoRead); */ @@ -376,8 +342,9 @@ void XMesaUpdateState(int windowMoved) { XMesaWindowMoved(); } -void XMesaSetSAREA() { - __DRIdrawablePrivate *dPriv = gCC->driContextPriv->driDrawablePriv; +void XMesaSetSAREA(void) +{ + __DRIdrawablePrivate *dPriv = gCC->driDrawablePriv; __DRIscreenPrivate *sPriv = dPriv->driScreenPriv; TDFXSAREAPriv *saPriv=(TDFXSAREAPriv*)(((char*)sPriv->pSAREA)+sizeof(XF86DRISAREARec)); diff --git a/xc/programs/Xserver/GL/dri/dri.c b/xc/programs/Xserver/GL/dri/dri.c index 68e638f27..652ecb822 100644 --- a/xc/programs/Xserver/GL/dri/dri.c +++ b/xc/programs/Xserver/GL/dri/dri.c @@ -101,7 +101,7 @@ DRIScreenInit( DRIScreenPrivPtr pDRIPriv; drmContextPtr reserved; int reserved_count; - int i; + int i, fd, drmWasAvailable; if (DRIGeneration != serverGeneration) { if ((DRIScreenPrivIndex = AllocateScreenPrivateIndex()) < 0) @@ -109,28 +109,38 @@ DRIScreenInit( DRIGeneration = serverGeneration; } - if (!drmAvailable()) { - return FALSE; + drmWasAvailable = drmAvailable(); + + /* Note that drmOpen will try to load the kernel module, if needed. */ + fd = drmOpen(pDRIInfo->drmDriverName, NULL); + if (fd < 0) { + /* failed to open DRM */ + pScreen->devPrivates[DRIScreenPrivIndex].ptr = NULL; + return FALSE; } - if (!(pDRIPriv = (DRIScreenPrivPtr)xalloc(sizeof(DRIScreenPrivRec)))) { - return FALSE; + if (!drmWasAvailable) { + /* drmOpen loaded the kernel module, print a message to say so */ + DRIDrvMsg(pScreen->myNum, X_INFO, + "[drm] loaded kernel module \"%s\"\n", + pDRIInfo->drmDriverName); + } + + pDRIPriv = (DRIScreenPrivPtr) xalloc(sizeof(DRIScreenPrivRec)); + if (!pDRIPriv) { + pScreen->devPrivates[DRIScreenPrivIndex].ptr = NULL; + return FALSE; } - pScreen->devPrivates[DRIScreenPrivIndex].ptr = (pointer)pDRIPriv; + pScreen->devPrivates[DRIScreenPrivIndex].ptr = (pointer) pDRIPriv; + pDRIPriv->drmFD = fd; pDRIPriv->directRenderingSupport = TRUE; pDRIPriv->pDriverInfo = pDRIInfo; - - /* setup device independent direct rendering memory maps */ - - if ((pDRIPriv->drmFD = drmOpen(pDRIPriv->pDriverInfo->drmDriverName, - NULL)) < 0) { - pDRIPriv->directRenderingSupport = FALSE; - return FALSE; - } + pDRIPriv->nrWindows = 0; if (drmSetBusid(pDRIPriv->drmFD, pDRIPriv->pDriverInfo->busIdString) < 0) { pDRIPriv->directRenderingSupport = FALSE; + pScreen->devPrivates[DRIScreenPrivIndex].ptr = NULL; drmClose(pDRIPriv->drmFD); return FALSE; } @@ -149,6 +159,7 @@ DRIScreenInit( &pDRIPriv->hSAREA) < 0) { pDRIPriv->directRenderingSupport = FALSE; + pScreen->devPrivates[DRIScreenPrivIndex].ptr = NULL; drmClose(pDRIPriv->drmFD); return FALSE; } @@ -162,6 +173,7 @@ DRIScreenInit( (drmAddressPtr)(&pDRIPriv->pSAREA)) < 0) { pDRIPriv->directRenderingSupport = FALSE; + pScreen->devPrivates[DRIScreenPrivIndex].ptr = NULL; drmClose(pDRIPriv->drmFD); return FALSE; } @@ -176,6 +188,7 @@ DRIScreenInit( &pDRIPriv->hFrameBuffer) < 0) { pDRIPriv->directRenderingSupport = FALSE; + pScreen->devPrivates[DRIScreenPrivIndex].ptr = NULL; drmUnmap(pDRIPriv->pSAREA, pDRIPriv->pDriverInfo->SAREASize); drmClose(pDRIPriv->drmFD); return FALSE; @@ -334,8 +347,9 @@ DRIFinishScreenInit(ScreenPtr pScreen) pDRIPriv->wrap.CopyWindow = pScreen->CopyWindow; pScreen->CopyWindow = pDRIInfo->wrap.CopyWindow; } - miClipNotify(DRIClipNotify); - + if (pDRIInfo->wrap.ClipNotify) + miClipNotify(pDRIInfo->wrap.ClipNotify); + DRIDrvMsg(pScreen->myNum, X_INFO, "[DRI] installation complete\n"); return TRUE; @@ -492,8 +506,6 @@ DRICloseConnection( ScreenPtr pScreen ) { - DRIScreenPrivPtr pDRIPriv = DRI_SCREEN_PRIV(pScreen); - return TRUE; } @@ -652,7 +664,7 @@ DRICreateContext( visual, *pHWContext, *pVisualConfigPriv, - contextStore))) { + (int)contextStore))) { DRIDestroyContextPriv(pDRIContextPriv); return FALSE; } @@ -689,12 +701,72 @@ DRIContextPrivDelete( if (pDRIPriv->pDriverInfo->DestroyContext) { contextStore=DRIGetContextStore(pDRIContextPriv); (pDRIPriv->pDriverInfo->DestroyContext)(pDRIContextPriv->pScreen, - pDRIContextPriv->hwContext, - contextStore); + pDRIContextPriv->hwContext, + (int)contextStore); } return DRIDestroyContextPriv(pDRIContextPriv); } + +/* This walks the drawable timestamp array and invalidates all of them + * in the case of transition from private to shared backbuffers. It's + * not necessary for correctness, because DRIClipNotify gets called in + * time to prevent any conflict, but the transition from + * shared->private is sometimes missed if we don't do this. + */ +static void +DRIClipNotifyAllDrawables( ScreenPtr pScreen ) +{ + int i; + DRIScreenPrivPtr pDRIPriv = DRI_SCREEN_PRIV(pScreen); + + for( i=0; i < pDRIPriv->pDriverInfo->maxDrawableTableEntry; i++) { + pDRIPriv->pSAREA->drawableTable[i].stamp = DRIDrawableValidationStamp++; + } +} + + +static void +DRITransitionToSharedBuffers( ScreenPtr pScreen ) +{ +/* ErrorF("DRITransitionToSharedBuffers\n"); */ + DRIClipNotifyAllDrawables( pScreen ); +} + + +static void +DRITransitionToPrivateBuffers( ScreenPtr pScreen ) +{ +/* ErrorF("DRITransitionToPrivateBuffers\n"); */ + DRIClipNotifyAllDrawables( pScreen ); +} + + +static void +DRITransitionTo3d( ScreenPtr pScreen ) +{ + DRIScreenPrivPtr pDRIPriv = DRI_SCREEN_PRIV(pScreen); + DRIInfoPtr pDRIInfo = pDRIPriv->pDriverInfo; + +/* ErrorF("DRITransitionTo3d\n"); */ + + if (pDRIInfo->TransitionTo3d) + pDRIInfo->TransitionTo3d( pScreen ); +} + +static void +DRITransitionTo2d( ScreenPtr pScreen ) +{ + DRIScreenPrivPtr pDRIPriv = DRI_SCREEN_PRIV(pScreen); + DRIInfoPtr pDRIInfo = pDRIPriv->pDriverInfo; + +/* ErrorF("DRITransitionTo2d\n"); */ + + if (pDRIInfo->TransitionTo2d) + pDRIInfo->TransitionTo2d( pScreen ); +} + + Bool DRICreateDrawable( ScreenPtr pScreen, @@ -734,6 +806,17 @@ DRICreateDrawable( pWin->devPrivates[DRIWindowPrivIndex].ptr = (pointer)pDRIDrawablePriv; + switch (++pDRIPriv->nrWindows) { + case 1: + DRITransitionTo3d( pScreen ); + break; + case 2: + DRITransitionToSharedBuffers( pScreen ); + break; + default: + break; + } + /* track this in case this window is destroyed */ AddResource(id, DRIDrawablePrivResType, (pointer)pWin); } @@ -756,13 +839,14 @@ DRIDestroyDrawable( DRIDrawablePrivPtr pDRIDrawablePriv; WindowPtr pWin; + if (pDrawable->type == DRAWABLE_WINDOW) { pWin = (WindowPtr)pDrawable; pDRIDrawablePriv = DRI_DRAWABLE_PRIV_FROM_WINDOW(pWin); pDRIDrawablePriv->refCount--; if (pDRIDrawablePriv->refCount <= 0) { /* This calls back DRIDrawablePrivDelete which frees private area */ - FreeResourceByType(id, DRIDrawablePrivResType, FALSE); + FreeResourceByType(id, DRIDrawablePrivResType, FALSE); } } else { /* pixmap (or for GLX 1.3, a PBuffer) */ @@ -798,6 +882,17 @@ DRIDrawablePrivDelete( } xfree(pDRIDrawablePriv); pWin->devPrivates[DRIWindowPrivIndex].ptr = NULL; + + switch (--pDRIPriv->nrWindows) { + case 0: + DRITransitionTo2d( pDrawable->pScreen ); + break; + case 1: + DRITransitionToPrivateBuffers( pDrawable->pScreen ); + break; + default: + break; + } } else { /* pixmap (or for GLX 1.3, a PBuffer) */ /* NOT_DONE */ @@ -818,7 +913,11 @@ DRIGetDrawableInfo( int* W, int* H, int* numClipRects, - XF86DRIClipRectPtr* pClipRects + XF86DRIClipRectPtr* pClipRects, + int* backX, + int* backY, + int* numBackClipRects, + XF86DRIClipRectPtr* pBackClipRects ) { DRIScreenPrivPtr pDRIPriv = DRI_SCREEN_PRIV(pScreen); @@ -907,6 +1006,35 @@ DRIGetDrawableInfo( *H = (int)(pWin->drawable.height); *numClipRects = REGION_NUM_RECTS(&pWin->clipList); *pClipRects = (XF86DRIClipRectPtr)REGION_RECTS(&pWin->clipList); + + *backX = *X; + *backY = *Y; + + if (pDRIPriv->nrWindows == 1 && *numClipRects) { + /* Use a single cliprect. */ + + int x0 = *X; + int y0 = *Y; + int x1 = x0 + *W; + int y1 = y0 + *H; + + if (x0 < 0) x0 = 0; + if (y0 < 0) y0 = 0; + if (x1 > pScreen->width-1) x1 = pScreen->width-1; + if (y1 > pScreen->height-1) y1 = pScreen->height-1; + + pDRIPriv->private_buffer_rect.x1 = x0; + pDRIPriv->private_buffer_rect.y1 = y0; + pDRIPriv->private_buffer_rect.x2 = x1; + pDRIPriv->private_buffer_rect.y2 = y1; + + *numBackClipRects = 1; + *pBackClipRects = &(pDRIPriv->private_buffer_rect); + } else { + /* Use the frontbuffer cliprects for back buffers. */ + *numBackClipRects = 0; + *pBackClipRects = 0; + } } else { /* Not a DRIDrawable */ @@ -961,6 +1089,10 @@ DRICreateInfoRec(void) inforec->wrap.CopyWindow = DRICopyWindow; inforec->wrap.ValidateTree = DRIValidateTree; inforec->wrap.PostValidateTree = DRIPostValidateTree; + inforec->wrap.ClipNotify = DRIClipNotify; + + inforec->TransitionTo2d = 0; + inforec->TransitionTo3d = 0; return inforec; } @@ -972,6 +1104,7 @@ DRIDestroyInfoRec(DRIInfoPtr DRIInfo) xfree((char*)DRIInfo); } + void DRIWakeupHandler( pointer wakeupData, @@ -1502,10 +1635,27 @@ DRIGetDrawableIndex( return index; } +unsigned int +DRIGetDrawableStamp( + ScreenPtr pScreen, + CARD32 drawable_index) +{ + DRIScreenPrivPtr pDRIPriv = DRI_SCREEN_PRIV(pScreen); + return pDRIPriv->pSAREA->drawableTable[drawable_index].stamp; +} + + +void DRIPrintDrawableLock(ScreenPtr pScreen, char *msg) +{ + DRIScreenPrivPtr pDRIPriv = DRI_SCREEN_PRIV(pScreen); + + ErrorF("%s: %d\n", msg, pDRIPriv->pSAREA->drawable_lock.lock); +} + void DRILock(ScreenPtr pScreen, int flags) { DRIScreenPrivPtr pDRIPriv = DRI_SCREEN_PRIV(pScreen); - + if (!lockRefCount) DRM_LOCK(pDRIPriv->drmFD, pDRIPriv->pSAREA, pDRIPriv->myContext, flags); lockRefCount++; @@ -1532,7 +1682,7 @@ void *DRIGetSAREAPrivate(ScreenPtr pScreen) { DRIScreenPrivPtr pDRIPriv = DRI_SCREEN_PRIV(pScreen); if (!pDRIPriv) return 0; - return ((void*)pDRIPriv->pSAREA)+sizeof(XF86DRISAREARec); + return (void *)(((char*)pDRIPriv->pSAREA)+sizeof(XF86DRISAREARec)); } drmContext DRIGetContext(ScreenPtr pScreen) @@ -1542,3 +1692,11 @@ drmContext DRIGetContext(ScreenPtr pScreen) return pDRIPriv->myContext; } +/* This lets get at the unwrapped functions so that they can correctly + * call the lowerlevel functions, and choose whether they will be + * called at every level of recursion (eg in validatetree). + */ +DRIWrappedFuncsRec *DRIGetWrappedFuncs( ScreenPtr pScreen ) +{ + return &(DRI_SCREEN_PRIV(pScreen)->wrap); +} diff --git a/xc/programs/Xserver/Imakefile b/xc/programs/Xserver/Imakefile index 45300d897..0305b16ce 100644 --- a/xc/programs/Xserver/Imakefile +++ b/xc/programs/Xserver/Imakefile @@ -619,7 +619,7 @@ XF86IDRVOBJS = $(XF86SRC)/input/drvConf.o XF86IDRVLIBS = $(XF86IDRIVERLIB) XF86SCANLIB = $(XF86SRC)/scanpci/LibraryTargetName(scanpci) XF86LIBS = $(XF86INIT) $(XF86COMLIB) $(XF86RACLIB) $(XF86PARSLIB) \ - $(XF86OSLIB) $(XF86INT10LIB) + $(XF86OSLIB) $(XF86INT10LIB) $(XF86DDCLIB) #else XF86LIBS = $(XF86INIT) $(XF86COMLIB) $(XF86PARSLIB) $(XF86OSLIB) #endif diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml index 895ce09a7..e95ff113a 100644 --- a/xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml +++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml @@ -3,17 +3,17 @@ ]> <!-- Created: Mon Feb 28 13:00:00 2000 by brian@precisioninsight.com --> -<!-- Revised: Mon Mar 6 20:10:02 2000 by kevin@precisioninsight.com --> +<!-- Revised: Fri May 19 09:41:48 2000 by martin@valinux.com --> <article> - <title>DRI Users Guide + <title>DRI User Guide <author><htmlurl url="http://www.precisioninsight.com/" name="Precision Insight, Inc."> - <date>6 March 2000 + <date>18 May 2000 <ident> - $XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml,v 1.3 2000/03/08 05:38:41 dawes Exp $ + $XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml,v 1.3 2000/04/05 05:38:41 brianp Exp $ </ident> <toc> @@ -25,7 +25,7 @@ <bf>Copyright © 2000 by Precision Insight, Inc., Cedar Park, Texas. All Rights Reserved.</bf> - <p> +<p> <bf>Permission is granted to make and distribute verbatim copies of this document provided the copyright notice and this permission notice are preserved on all copies.</bf> @@ -43,6 +43,8 @@ trademarks of 3Dlabs Inc. Ltd. 3dfx, Voodoo3, Voodoo4, and Voodoo5 are registered trademarks of 3dfx Interactive, Incorporated. + Matrox is a registered trademark of Matrox Electronic Systems Ltd. + ATI Rage is a registered trademark of ATI Technologies, Inc. All other trademarks mentioned are the property of their respective owners. @@ -60,9 +62,13 @@ software downloads. <p> This document does not cover compilation or installation of - XFree86 4.0; - it is assumed that you've already installed a Linux distribution which - includes XFree86 4.0. + XFree86 4.0. + It is assumed that you've already installed a Linux distribution which + includes XFree86 4.0 or that you're an experienced Linux developer + who has compiled the DRI for himself. + DRI download, compilation and installation instructions can be found + at <htmlurl url="http://dri.sourceforge.net/DRIcompile.html" + name="http://dri.sourceforge.net/DRIcompile.html"> <sect>Supported Hardware <p> @@ -71,8 +77,8 @@ Support for Alpha, and perhaps other CPUs, should be available in the future. <p> - XFree86 4.0 includes 3D acceleration for the following - graphics hardware: + XFree86 4.0 (or later versions) includes 3D acceleration for the + following graphics hardware: <itemize> <item>3dfx: @@ -87,6 +93,19 @@ </itemize> There are many configurations of 3dfx cards on the market. Not all have been tested. + <item>Matrox G400 + <item>ATI Rage 128 + <itemize> + <item>Rage Fury AGP + <item>Rage Magnum AGP + <item>XPERT 2000 AGP + <item>XPERT 128 AGP + <item>XPERT 99 AGP + <item>All-in-Wonder 128 AGP + </itemize> + The PCI versions of these cards also have minimal support. + Note that there are also Rage 128 Pro based boards on the + market, and these are not yet supported. <item>3Dlabs Oxygen GMX 2000 (MX/Gamma based) </itemize> @@ -94,8 +113,6 @@ Support for the following hardware is underway: <itemize> <item>Intel i810 - <item>Matrox G400 - <item>ATI Rage 128 <item>3dfx Voodoo4 and Voodoo5 series </itemize> @@ -104,8 +121,10 @@ <p> <itemize> <item>XFree86 4.0 - <item>Linux kernel 2.2.x (later kernels will be supported in + <item>For the 3dfx Voodoo3 driver, Linux kernel 2.2.x (later + kernels will be supported in the near future, and may be required for some chipsets) + <item>For the Matrox G400, Linux kernel 2.3.51, with AGP support </itemize> <p> Mesa 3.3 (beta) is included with XFree86 4.0; there is no need to @@ -119,20 +138,17 @@ <sect1>Kernel module <p> - Before starting the X server you must install the correct kernel - module for your hardware. - <p> - This can be done by executing the following as root: - <verb> - insmod XXX/drivername.o - </verb> - <p> - For example, on 3dfx hardware, the kernel module is called tdfx.o - so you you would type insmod XXX/tdfx.o - - <p> - Verify that the kernel module was installed by checking that - /proc/dri/0 exists. + XFree86 4.0.1 added automatic kernel module loading to the X server. + On Linux, the X server uses modprobe to load kernel modules. + The DRM kernel modules should be in /lib/modules/KERNEL-VERSION/misc/ + for automatic loading to work. +<p> + Optionally, DRM kernel modules can be loaded manually with insmod + prior to starting the X server. +<p> + You can verify that the kernel module was installed with lsmod, + checking the X server startup log, and checking that /proc/dri/0 + exists. <sect1>XF86Config file <p> @@ -199,6 +215,7 @@ <p> Next, the Device section of the XF86Config file must describe your particular hardware. + <p> For example, here's the Device section for a 3dfx Voodoo3 card: <verb> @@ -210,6 +227,27 @@ </verb> <p> + Here's the Device section for a Matrox G400 card: + <verb> + Section "Device" + Identifier "G400" + VendorName "Matrox" + Driver "mga" + VideoRam 32768 + EndSection + </verb> + + <p> + Here's the Device section for an ATI Rage 128 card: + <verb> + Section "Device" + Identifier "Rage128" + VendorName "ATI" + Driver "r128" + EndSection + </verb> + + <p> Finally, the Screen section of the XF86Config file may have to be specially configured as well. For example, Voodoo3 hardware acceleration is only available @@ -227,7 +265,10 @@ EndSubsection EndSection </verb> - + <p> + Replace <em>Voodoo3</em> with <em>G400</em> for Matrox G400. + <p> + Replace <em>Voodoo3</em> with <em>Rage128</em> for ATI Rage 128. <p> If there are errors in the XF86Config file, the X server will log errors to the file /var/log/XFree86.0.log @@ -301,6 +342,25 @@ if means that the libGL.so.1 file is not the right location. Proceed to the trouble shooting section. + <sect1>libOSMesa.so +<p> + OSMesa (Off-Screen Mesa) is an interface and driver for rendering + 3D images into a user-allocated block of memory rather than an + on-screen window. +<p> + libOSMesa.so implements the OSMesa interface and must be linked + with your application if you want to use the OSMesa functions. + You must also link with libGL.so. For example: + <verb> + gcc osdemo.c -L/usr/X11R6/lib -lOSMesa -lGLU -lGL -o osdemo + </verb> +<p> + In stand-alone Mesa this interface was compiled into the monolithic + libGL.so (formerly libMesaGL.so) library. + In XFree86 4.0.1 and later this interface is implemented in a + separate library. +<p> + <sect1>glxinfo <p> glxinfo is a useful program for checking which version of @@ -346,20 +406,25 @@ <enum> <item> <tt/LIBGL_DEBUG/, if defined will cause libGL.so to print error - and diagnostic messages. This can help to solve problems. + and diagnostic messages. + This can help to solve problems. + Setting <tt/LIBGL_DEBUG/ to <tt/verbose/ may provide additional + information. <item> <tt/LIBGL_ALWAYS_INDIRECT/, if defined this will force libGL.so to always use indirect rendering instead of hardware - acceleration. + acceleration. This can be useful to isolate rendering errors. <item> - <tt/LIBGL_DRIVERS_DIR/ can be used to override the default - directory which is searched for 3D drivers. + <tt/LIBGL_DRIVERS_PATH/ can be used to override the default + directories which are searched for 3D drivers. + The value is one or more paths separated by colons. In a typical XFree86 installation, the 3D drivers should be in - /usr/X11R6/lib/modules/dri/. - This environment variable can be used to specify a different - directory. + /usr/X11R6/lib/modules/dri/ and <tt/LIBGL_DRIVERS_PATH/ need + not be defined. Note that this feature is disabled for set-uid programs. + This variable replaces the <tt/LIBGL_DRIVERS_DIR/ env var used + in XFree86 4.0. </enum> <p> Mesa-based drivers (this includes most of the drivers listed @@ -531,6 +596,40 @@ <sect1>3dfx Voodoo3 <p> + <sect2>Configuration +<p> + Your XF86Config file's device section must specify the + <tt>tdfx</tt> device: + <verb> + Section "Device" + Identifier "Voodoo3" + VendorName "3dfx" + Driver "tdfx" + EndSection + </verb> + The Screen section should then reference the Voodoo3 device: + <verb> + Section "Screen" + Identifier "Screen 1" + Device "Voodoo3" + Monitor "High Res Monitor" + DefaultDepth 16 + Subsection "Display" + Depth 16 + Modes "1280x1024" "1024x768" "800x600" "640x480" + ViewPort 0 0 + EndSubsection + EndSection + </verb> + <p> + The kernel module for the Voodoo3 is named <tt>tdfx.o</tt> and + should be installed in /lib/modules/KERNEL-VERSION/misc/. + It will be automatically loaded by the Xserver if needed. + <p> + The DRI 3D driver for the Voodoo3 should be in + <tt>/usr/X11R6/lib/modules/dri/tdfx_dri.so</tt>. + This will be automatically loaded by libGL.so. + <sect2>Troubleshooting <p> <itemize> @@ -539,6 +638,9 @@ bit/pixel screen mode. Use <tt/xdpyinfo/ to verify that all your visuals are depth 16. Edit your XF86Config file if needed. + <item> + The <tt>/dev/3dfx</tt> device is not used for DRI; it's only for + Glide on older 3dfx hardware. </itemize> <sect2>Performance @@ -565,6 +667,9 @@ <p> <itemize> <item> + Glide cannot be used directly; only OpenGL-based programs are + supported on the Voodoo3. + <item> SSystem has problems because of poorly set near and far clipping planes. The office.unc Performer model also suffers from this problem. @@ -573,10 +678,120 @@ <sect1>Intel i810 <p> + Information to be added in the future. + <sect1>Matrox G400 <p> + <sect2>Configuration +<p> + Your XF86Config file's device section must specify the + <tt>mga</tt> device: + <verb> + Section "Device" + Identifier "G400" + VendorName "Matrox" + Driver "mga" + EndSection + </verb> + The Screen section should then reference the G400 mga device: + <verb> + Section "Screen" + Identifier "Screen 1" + Device "G400" + Monitor "High Res Monitor" + DefaultDepth 16 + Subsection "Display" + Depth 16 + Modes "1280x1024" "1024x768" "800x600" "640x480" + ViewPort 0 0 + EndSubsection + EndSection + </verb> + <p> + The kernel module for the G400 is named <tt>mga.o</tt> and + should be installed in /lib/modules/KERNEL-VERSION/misc/. + It will be automatically loaded by the Xserver if needed. + <p> + The DRI 3D driver for the G400 should be in + <tt>/usr/X11R6/lib/modules/dri/mga_dri.so</tt>. + This will be automatically loaded by libGL.so. + + <sect2>Troubleshooting +<p> + <itemize> + <item> + 3D acceleration for the G400 is only supported in the 16 + bit/pixel screen mode at this time. 32bpp will be supported + in the future. + Use <tt/xdpyinfo/ to verify that all your visuals are depth 16. + Edit your XF86Config file if needed. + </itemize> + + <sect2>Performance +<p> + No data at this time. + + <sect2>Known Problems +<p> + No data at this time. + + <sect1>ATI Rage 128 <p> + <sect2>Configuration +<p> + Your XF86Config file's device section must specify the + <tt>r128</tt> device: + <verb> + Section "Device" + Identifier "Rage128" + VendorName "ATI" + Driver "r128" + EndSection + </verb> + The Screen section should then reference the Rage 128 device: + <verb> + Section "Screen" + Identifier "Screen 1" + Device "Rage128" + Monitor "High Res Monitor" + DefaultDepth 16 + Subsection "Display" + Depth 16 + Modes "1280x1024" "1024x768" "800x600" "640x480" + ViewPort 0 0 + EndSubsection + Subsection "Display" + Depth 32 + Modes "1280x1024" "1024x768" "800x600" "640x480" + ViewPort 0 0 + EndSubsection + EndSection + </verb> + <p> + The kernel module for the Rage 128 is named <tt>r128.o</tt> and + should be installed in /lib/modules/KERNEL-VERSION/misc/. + It will be automatically loaded by the Xserver if needed. + <p> + The DRI 3D driver for the Rage 128 should be in + <tt>/usr/X11R6/lib/modules/dri/r128_dri.so</tt>. + This will be automatically loaded by libGL.so. + <p> + You may also set your screen depth to 32 for 32bpp mode. + <p> + + <sect2>Performance +<p> + While PCI Rage 128 based cards are supported, they do not yet + support PCI GART, so they will not perform as well as their + AGP counterparts. + + <sect2>Known Problems +<p> + DGA is not yet supported in the ATI Rage 128 X server. This + feature will be added in a future release. + + <sect1>3DLabs Oxygen GMX 2000 <p> The driver for this hardware was experimental and is no longer being @@ -621,6 +836,50 @@ which will be addressed in the future. + <sect1>libGL.so and dlopen() +<p> + A number of popular OpenGL applications on Linux (such as Quake3, + HereticII, Heavy Gear 2, etc) dynamically open the libGL.so + library at runtime with dlopen(), rather than linking with -lGL + at compile/link time. +<p> + If dynamic loading of libGL.so is not implemented carefully, there + can be a number of serious problems. + Here are the things to be careful of in your application: + <itemize> + <item>Specify the RTLD_GLOBAL flag to dlopen(). + If you don't do this then you'll likely see a runtime error message + complaining that _glapi_Context is undefined when libGL.so + tries to open a hardware-specific driver. + Without this flag, <em>nested</em> opening of dynamic libraries + does not work. + <item>Do not close the library with dlclose() until after + XCloseDisplay() has been called. + When libGL.so initializes itself it registers several callbacks + functions with Xlib. + When XCloseDisplay() is called those callback functions are + called. + If libGL.so has already been unloaded with dlclose() this will + cause a segmentation fault. + <item> + Your application should link with -lpthread. + On Linux, libGL.so uses the pthreads library in order to provide + thread safety. + There is apparently a bug in the dlopen()/dlclose() code which + causes crashes if the library uses pthreads but the parent + application doesn't. + The only known work-around is to link the application with + -lpthread. + </itemize> + + Some applications don't yet incorporate these procedures and + may fail. + For example, changing the graphics settings in some video games + will expose this problem. + The DRI developers are working with game vendors to prevent this + problem in the future. + + <sect1>Bug Database <p> The DRI bug database which includes bugs related to specific @@ -654,6 +913,9 @@ <item>Visit the <htmlurl url="http://dri.sourceforge.net" name="DRI project on SourceForge.net"> for the latest development news about the DRI and 3D drivers. + <item>The <htmlurl url="http://dri.sourceforge.net/DRIcompile.html" + name="DRI Compilation Guide"> explains how to download, compile + and install the DRI for yourself. </itemize> <sect1>Support @@ -664,54 +926,13 @@ <htmlurl url="http://sourceforge.net/mail/?group_id=387" name="SourceForge"> is a forum for people to discuss DRI problems. <item> - XXX IHV support? - <item> - XXX Linux distro support? + In the future there may be IHV and Linux vendor support resources + for the DRI. </itemize> </article> -<!-- -1. Introduction -2. Supported Hardware -3. Prerequisite Software -4. Start-Up -5. Using 3D Acceleration - 5.1 libGL.so - 5.2 glxinfo - 5.3 Environment variables -6. General Trouble Shooting -7. Hardware-Specific Information - 7.1 3dfx - 7.2 Intel i810 - 7.3 Matrox G400 - 7.4 ATI Rage 128 - 7.5 3DLabs Gamma -8. Limitation and Known Bugs - 8.1 OpenGL - 8.2 GLX - 8.3 Signal Handling - 8.4 Scheduling - 8.5 Bug Database -9. Resources - 9.1 Software Resources - GLU - GLUT - Glide3 - Utilities and demos - Sample XF86Config files - 9.2 Documentation - www.XFree86.org - www.opengl.org - www.linux.com - www.precisioninsight.com - sourceforge.net - 9.3 Support - IHVs - RedHat - --> - <!-- Local Variables: --> <!-- fill-column: 72 --> <!-- End: --> diff --git a/xc/programs/Xserver/hw/xfree86/doc/sgml/DRIcomp.sgml b/xc/programs/Xserver/hw/xfree86/doc/sgml/DRIcomp.sgml new file mode 100644 index 000000000..eeda0e057 --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/doc/sgml/DRIcomp.sgml @@ -0,0 +1,501 @@ +<!doctype linuxdoc system> +<!-- Created: Sun Mar 12 13:00:00 2000 by brian@precisioninsight.com --> +<!-- Revised: Fri May 19 09:36:02 2000 by martin@valinux.com --> +<!-- $Id: DRIcomp.sgml,v 1.6.12.1 2000/05/30 14:47:49 dfr Exp $ --> + + <article> + + <title>DRI Compilation Guide + <author> + <htmlurl url="http://www.precisioninsight.com/" + name="Precision Insight, Inc."> + <date>18 May 2000 + + <ident> + $XFree86: xc/programs/Xserver/hw/xfree86/doc/sgml/DRI.sgml,v 1.3 2000/04/05 05:38:41 brianp Exp $ + </ident> + + <toc> + + <sect>Preamble + + <sect1>Copyright + <p> + <bf>Copyright © 2000 by Precision Insight, Inc., + Cedar Park, Texas. + All Rights Reserved.</bf> + <p> + <bf>Permission is granted to make and distribute verbatim copies + of this document provided the copyright notice and this permission + notice are preserved on all copies.</bf> + + <sect1>Trademarks + <p> + OpenGL is a registered trademark and SGI is a trademark of + Silicon Graphics, Inc. + Unix is a registered trademark of The Open Group. + The `X' device and X Window System are trademarks of The Open Group. + XFree86 is a trademark of The XFree86 Project. + Linux is a registered trademark of Linus Torvalds. + Intel is a registered trademark of Intel Corporation. + 3Dlabs, GLINT, and Oxygen are either registered trademarks or + trademarks of 3Dlabs Inc. Ltd. + 3dfx, Voodoo3, Voodoo4, and Voodoo5 are registered trademarks of + 3dfx Interactive, Incorporated. + Matrox is a registered trademark of Matrox Electronic Systems Ltd. + ATI Rage is a registered trademark of ATI Technologies, Inc. + All other trademarks mentioned are the property of their + respective owners. + + + <sect>Introduction + <p> + This document describes how to download, compile and install the + DRI project. + This information is intended for experienced Linux developers. + Beginners are probably better off installing precompiled packages. + <p> + Edits, corrections and updates to this document may be mailed + to brian@precisioninsight.com. + + + <sect>Prerequisites + <p> + You'll need the following: + <itemize> + <item>At least 400MB of free disk space. More is needed if you want + to build with debugging information or keep several build trees. + <item>A fast system. Using a PIII-550 it takes about 1/2 hour to + build everthing. + <item>GCC compiler and related tools. + <item>ssh (secure shell) for registed developer downloading of the + DRI source tree + </itemize> + + <p> + For 3dfx Voodoo3 hardware, you'll also need: + <itemize> + <item>Glide3x headers and runtime library if you want to use the + 3dfx driver. + These can be obtained from + <htmlurl url="http://linux.3dfx.com/open_source/glide_kit.htm" + name="linux.3dfx.com">. + <item>Linux kernel 2.2.x. + The DRI developers have been using stock RedHat 6.1 systems + (kernel 2.2.12-20). + Later kernel versions will be supported in the future. + </itemize> + + <p> + For Matrox G400 hardware, you'll also need: + <itemize> + <item>Linux kernel 2.3.51. Other kernel versions may work but + this one is known to work. + </itemize> + + <p> + For ATI Rage hardware, you'll also need: + <itemize> + <item>Linux kernel 2.3.51. Other kernel versions may work but + this one is known to work. + </itemize> + + + <sect>Kernel preparation + <p> + You may have to upgrade your Linux kernel in order to use the DRI. + This is because you need a kernel version which supports AGP. + Building a new Linux kernel can be difficult for beginners but + there are resouces on the Internet to help. + This document assumes experience with configuring, building and + installing Linux kernels. + <p> + Linux kernels can be downloaded from + <htmlurl url="http://www.kernel.org/pub/linux/kernel/" + name="www.kernel.org"> + <p> + Download the needed kernel and put it in /usr/src. + Create a directory for the source and unpack it. + For example: + <verb> + cd /usr/src + rm -f linux + mkdir linux-2.3.51 + ln -s linux-2.3.51 linux + bzcat linux-2.3.51.tar.bz2 | tar xf - + </verb> + <p> + Now configure your kernel. + You might, for example, use <tt>make menuconfig</tt> and do the + following: + + <itemize> + <item>Go to <em>Code maturity level options</em> + <item>Enable <em>Prompt for development and/or incomplete + code/drivers</em> + <item>hit ESC + <item>Go to <em>Character devices</em> + <item>Disable <em>Direct Rendering Manager (XFree86 DRI support)</em> + since we'll use the DRI module from the XFree86/DRI tree. + <item>Go to <em>/dev/agpgart (AGP Support) (EXPERIMENTAL) (NEW)</em> + <item>Hit SPACE twice + <item>Enable all chipsets' support for AGP + </itemize> + + <p>It's recommended that you turn on MTRRs under <em>Processor type + and Features</em>, but not required. + + <p> + Configure the rest of the kernel as required for your system + (i.e. ethernet, scsi, etc) + <p> + Exit, saving your kernel configuration. + <p> + Edit your /etc/lilo.conf file. + Make sure you have an image entry as follows (or similar): + <verb> + image=/boot/vmlinuz + label=linux.2.3.51 + read-only + root=/dev/hda1 + </verb> + <p> + The important part is that you have /boot/vmlinuz without a + trailing version number. + If this is the first entry in your /etc/lilo.conf AND you + haven't set a default, then this will be your default kernel. + + <p> + Now compile the new kernel: + + <verb> + cd /usr/src/linux-2.3.51 + make dep ; make bzImage + make modules ; make modules_install + make install + </verb> + Note that the final part, make install, will automatically run + lilo for you. + <p> + Now reboot to use this new kernel. + + + <sect>Downloading the XFree86/DRI CVS Sources + <p> + The DRI project is hosted by VA Linux Systems' + <htmlurl url="http://sourceforge.net/project/?group_id=387" + name="SourceForge">. + The DRI source code, which is a subset of the XFree86 source tree, + is kept in a CVS repository there. + <p> + The DRI CVS sources may be accessed either anonymously or as a + registered SourceForge user. + It's recommended that you become a registered SourceForge user so + that you may submit non-annonymous bug reports and can participate + in the mailing lists. + + <sect1>Anonymous CVS download: + <p> + <enum> + <item>Create a directory to store the CVS files: + <p> + <verb> + cd ~ + mkdir DRI-CVS + </verb> + You could put your CVS directory in a different place but we'll + use <tt>~/DRI-CVS/</tt> here. + <p> + <item>Check out the CVS sources: + <p> + <verb> + cd ~/DRI-CVS + cvs -d:pserver:anonymous@cvs.dri.sourceforge.net:/cvsroot/dri login + (hit ENTER when prompted for a password) + cvs -z3 -d:pserver:anonymous@cvs.dri.sourceforge.net:/cvsroot/dri co xc + </verb> + <p> + The -z3 flag causes compression to be used in order to reduce + the download time. + </enum> + + + <sect1>Registered CVS download: + <p> + <enum> + <item>Create a directory to store the CVS files: + <p> + <verb> + cd ~ + mkdir DRI-CVS + </verb> + You could put your CVS directory in a different place but we'll + use <tt>~/DRI-CVS/</tt> here. + <p> + <item>Set the CVS_RSH environment variable: + <p> + <verb> + setenv CVS_RSH ssh // if using csh or tcsh + export CVS_RSH=ssh // if using sh or bash + </verb> + <item>Check out the CVS sources: + <p> + <verb> + cd ~/DRI-CVS + cvs -z3 -dYOURID@cvs.dri.sourceforge.net:/cvsroot/dri co xc + </verb> + Replace <tt>YOURID</tt> with your CVS login name. + You'll be prompted to enter your sourceforge password. + <p> + The -z3 flag causes compression to be used in order to reduce + the download time. + </enum> + + + <sect>Updating your CVS sources + <p> + In the future you'll want to occasionally update your local copy of + the DRI source code to get the latest changes. + This can be done with: + <verb> + cd ~/DRI-CVS + cvs -z3 update -dA xc + </verb> + The -d flag causes any new subdirectories to be created and -A causes + most recent trunc sources to be fetched, not branch sources. + + + <sect>Compiling the XFree86/DRI tree + <sect1>Make a build tree + <p> + Rather than placing object files and library files right in the + source tree, they're instead put into a parallel <em>build</em> tree. + The build tree is made with the <tt>lndir</tt> command: + <verb> + cd ~/DRI-CVS + ln -s xc XFree40 + mkdir build + cd build + lndir -silent -ignorelinks ../XFree40 + </verb> + <p> + The build tree will be populated with symbolic links which point + back into the CVS source tree. + <p> + Advanced users may have several build trees for compiling and + testing with different options. + + <sect1>Edit the host.def file + <p> + The <tt>~/DRI-CVS/build/xc/config/cf/host.def</tt> file is used + to configure the XFree86 build process. + You can change it to customize your build options or make adjustments + for your particular system configuration + <p> + The default <tt>host.def</tt> file will look something like this: + <verb> + #define DefaultCCOptions -Wall + #define DefaultGcc2i386Opt -O2 + #define LibraryCDebugFlags -O2 + #define BuildServersOnly YES + #define XF86CardDrivers vga tdfx mga r128 + #define LinuxDistribution LinuxRedHat + #define DefaultCCOptions -ansi GccWarningOptions -pipe + #define BuildXF86DRI YES + #define HasGlide3 YES + /* Optionally turn these on for debugging */ + /* #define GlxBuiltInTdfx YES */ + /* #define GlxBuiltInMga YES */ + /* #define GlxBuiltInR128 YES */ + /* #define DoLoadableServer NO */ + #define SharedLibFont NO + </verb> + The <tt>ProjectRoot</tt> variable specifies where the XFree86 files + will be installed. + You probably don't want to use <tt>/usr/X11R6/</tt> because that + would overwrite your default X files. + The following is recommended: + <verb> + #define ProjectRoot /usr/XF86-main + </verb> + <p> + Especially note the <em>XF86CardDrivers</em> line to be sure your + driver is listed. + <p> + If you have 3dfx hardware be sure that the Glide 3x headers are + installed in <tt>/usr/include/glide3/</tt> and that the Glide 3x + library is installed at <tt>/usr/lib/libglide3x.so</tt>. + <p> + If you do not have 3dfx hardware comment out the <tt>HasGlide3</tt> + line in <tt>host.def</tt>. + <p> + + <sect1>Compile + <p> + To compile the complete DRI tree: + <verb> + cd ~/DRI-CVS/build/xc/ + make World >& World.LOG + </verb> + Or if you want to watch the compilation progress: + <verb> + cd ~/DRI-CVS/build/xc/ + make World >& World.LOG & + tail -f World.LOG + </verb> + With the default compilation flags it's normal to get a lot of + warnings during compilation. + <p> + Building will take some time so you may want to go check your + email or visit slashdot. + + <sect1>Check for compilation errors + <p> + Using your text editor, examine <tt>World.LOG</tt> for errors + by searching for the pattern <tt>***</tt>. + <p> + Verify that the DRI kernel module(s) for your system were built: + <verb> + cd ~/DRI-CVS/build/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel + ls + </verb> + <p> + For the 3dfx Voodoo, you should see <em>tdfx.o</em>. + For the Matrox G400, you should see <em>mga.o</em>. + For the ATI Rage 128, you should see <em>r128.o</em>. + <p> + If the DRI kernel module(s) failed to build you should verify + that you're using the right version of the Linux kernel. + The most recent kernels are not always supported. + <p> + If your build machine is running a different version of the kernel + than your target machine (i.e. 2.2.12-20 vs. 2.3.99-pre6), make will + select the wrong kernel headers. This can be fixed by explicitly + setting the value of <tt>TREE</tt>. + If the path to your kernel source is + <tt>/bigdisk/linux-2.3.99-pre6</tt>, + <verb> + cd ~/DRI-CVS/build/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel + make TREE=/bigdisk/linux-2.3.99-pre6 + </verb> + or alternatively, edit Makefile to include this change. + <p> + After fixing the errors, do <tt>make World</tt> again. + Later, you might just compile parts of the source tree but it's + important that the whole tree will build first. + + + <sect>Installing + <p> + After the DRI tree has been compiled you can install the XFree86 + headers, libraries, programs, etc for testing. + + <sect1>X Installation + <p> + As mentioned above, the install directory is specified by the + <tt>ProjectRoot</tt> variable in the <tt>host.def</tt> file. + Create that directory now if it doesn't already exist: + <verb> + mkdir /usr/XF86-main + </verb> + <p> + You'll have to change to root since the install process puts + several files in <tt>/etc/X11/</tt> and sets the setuid flag on + the X server executable. + <verb> + cd ~/DRI-CVS/build/xc + su + make install + </verb> + Edit your <tt>/etc/ld.so.conf</tt> file and put + <tt>/usr/XF86-main/lib</tt> as the first line. + Continue with: + <verb> + ldconfig + exit + </verb> + <p> + Look in <tt>/usr/XF86-main</tt> to be sure the files installed + there. + <P> + Strictly speaking, installing the DRI tree isn't required. + It's possible to run and test the X server directly from the + build directory but it's a bit error prone. + + <sect1>Update Locale Information + <p> + To update your X locale information do the following: + <verb> + cd ~/DRI-CVS/build/xc/nls + xmkmf + make + make install + </verb> + This will prevent a locale error message from being printed + when you run Xlib programs. + + <sect>X Server Configuration + <p> + If your X server is currently running you'll have to stop it + and return to a virtual terminal. + <p> + First, setup your XF86Config file. + It should load the GLX and DRI modules and specify the driver to + use for your hardware. + See the <htmlurl url="http://dri.sourceforge.net/DRIuserguide.html" + name="DRI User Guide"> for detailed information. + <p> + You may want to make a backup copy of your existing + <tt>/etc/X11/XF86Config</tt> file first. + <p> + It's very important that you set the <tt>ModulePath</tt> option to + point to your installation directory: + <verb> + ModulePath "/usr/XF86-main/lib/modules" + </verb> + <p> + Double check with this: + <verb> + grep ModulePath /etc/X11/XF86Config + </verb> + <p> + Next, your <tt>~/.xinitrc</tt> file controls which clients will be + launched when your X server starts. + You might put the following in yours: + <verb> + xset b off + xsetroot -solid "#004070" + xmodmap -e "clear mod4" + xrdb -merge ~/.Xdefaults + xterm -geometry +0+0 & + xterm -geometry +512+0 & + fvwm + </verb> + <p> + + <sect>X Server Start-up + <p> + The X server can be started with: + <p> + <verb> + xinit -- /usr/XF86-main/bin/XFree86 + </verb> + <p> + Automatic loading of DRM kernel modules was added to the X server + in XFree86 4.0.1. + This feature, and manual loading of kernel modules, is documented + in the DRI user guide. + <p> + At this point your X server should be up and running with + hardware-accelerated direct rendering. + Please read the + <htmlurl url="http://dri.sourceforge.net/DRIuserguide.html" + name="DRI User Guide"> for trouble shooting information. + + + </article> + + + <!-- Local Variables: --> + <!-- fill-column: 72 --> + <!-- End: --> diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/i810/Imakefile index 331396f38..9e167d6c7 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/i810/Imakefile +++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/Imakefile @@ -6,13 +6,9 @@ XCOMM #define IHaveModules #include <Server.tmpl> -# -# Uncomment these to build with DRI support when available -# -#undef BuildXF86DRI #if BuildXF86DRI -DRISRCS = i810_dri.c i810_drm.c -DRIOBJS = i810_dri.o i810_drm.o +DRISRCS = i810_dri.c +DRIOBJS = i810_dri.o DRIINCLUDES = -I$(SERVERSRC)/GL/dri -I$(LIBSRC)/GL/dri \ -I$(XF86OSSRC)/linux/drm/kernel DRIDEFINES = $(GLX_DEFINES) @@ -63,7 +59,6 @@ InstallDriverSDKNonExecFile(i810_cursor.c,$(DRIVERSDKDIR)/drivers/i810) InstallDriverSDKNonExecFile(i810_driver.c,$(DRIVERSDKDIR)/drivers/i810) InstallDriverSDKNonExecFile(i810_dri.c,$(DRIVERSDKDIR)/drivers/i810) InstallDriverSDKNonExecFile(i810_dri.h,$(DRIVERSDKDIR)/drivers/i810) -InstallDriverSDKNonExecFile(i810_dripriv.h,$(DRIVERSDKDIR)/drivers/i810) InstallDriverSDKNonExecFile(i810_io.c,$(DRIVERSDKDIR)/drivers/i810) InstallDriverSDKNonExecFile(i810_memory.c,$(DRIVERSDKDIR)/drivers/i810) InstallDriverSDKNonExecFile(i810_wmark.c,$(DRIVERSDKDIR)/drivers/i810) diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810.h b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810.h index 6aceea540..58a17ad74 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810.h @@ -36,16 +36,13 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #ifndef _I810_H_ #define _I810_H_ - +#include "compiler.h" #include "xf86PciInfo.h" #include "xf86Pci.h" #include "i810_reg.h" #include "xaa.h" #include "xf86Cursor.h" -#undef XF86DRI - - #ifdef XF86DRI #include "xf86drm.h" #include "sarea.h" @@ -211,8 +208,8 @@ typedef struct _I810Rec { extern Bool I810DRIScreenInit(ScreenPtr pScreen); extern void I810DRICloseScreen(ScreenPtr pScreen); extern Bool I810DRIFinishScreenInit(ScreenPtr pScreen); -extern Bool I810drmInitDma(ScrnInfoPtr pScrn); -extern Bool I810drmCleanupDma(ScrnInfoPtr pScrn); +extern Bool I810InitDma(ScrnInfoPtr pScrn); +extern Bool I810CleanupDma(ScrnInfoPtr pScrn); #define I810PTR(p) ((I810Ptr)((p)->driverPrivate)) #define I810REGPTR(p) (&(I810PTR(p)->ModeReg)) @@ -312,7 +309,7 @@ extern void I810EmitInvarientState(ScrnInfoPtr pScrn); /* To remove all debugging, make sure I810_DEBUG is defined as a * preprocessor symbol, and equal to zero. */ -#define I810_DEBUG 0 +#define I810_DEBUG 0 #ifndef I810_DEBUG #warning "Debugging enabled - expect reduced performance" extern int I810_DEBUG; diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_accel.c index 0f67180d2..1a410bcd1 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_accel.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_accel.c @@ -271,6 +271,7 @@ I810WaitLpRing( ScrnInfoPtr pScrn, int n, int timeout_millis ) DRICloseScreen(screenInfo.screens[pScrn->scrnIndex]); } #endif + pI810->AccelInfoRec = NULL; /* Stops recursive behavior */ FatalError("lockup\n"); } @@ -301,13 +302,9 @@ I810Sync( ScrnInfoPtr pScrn ) #ifdef XF86DRI /* VT switching tries to do this. */ - if (!pI810->LockHeld) { + if (!pI810->LockHeld && pI810->directRenderingEnabled) { return; } - - -/* if (pI810->directRenderingEnabled) */ -/* DRIUnlockLockQueiscent( pScrn->pScreen ); */ #endif /* Send a flush instruction and then wait till the ring is empty. @@ -635,19 +632,19 @@ I810RefreshRing(ScrnInfoPtr pScrn) } - +/* Emit on gaining VT? + */ void I810EmitInvarientState(ScrnInfoPtr pScrn) { I810Ptr pI810 = I810PTR(pScrn); - BEGIN_LP_RING( 8 ); + BEGIN_LP_RING( 10 ); OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE ); OUT_RING( GFX_CMD_CONTEXT_SEL | CS_UPDATE_USE | CS_USE_CTX0 ); OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE); OUT_RING( 0 ); - OUT_RING( GFX_OP_COLOR_CHROMA_KEY ); OUT_RING( CC1_UPDATE_KILL_WRITE | CC1_DISABLE_KILL_WRITE | @@ -658,5 +655,8 @@ I810EmitInvarientState(ScrnInfoPtr pScrn) OUT_RING( 0 ); OUT_RING( 0 ); +/* OUT_RING( CMD_OP_Z_BUFFER_INFO ); */ +/* OUT_RING( pI810->DepthBuffer.Start | pI810->auxPitchBits); */ + ADVANCE_LP_RING(); } diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.c index c63f9ed20..591207b65 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.c @@ -1,4 +1,4 @@ -/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.c,v 1.2 2000/03/02 16:07:49 martin Exp $ */ +/* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.c,v 1.3 1999/09/27 06:29:57 dawes Exp $ */ #include "xf86.h" #include "xf86_OSproc.h" @@ -20,10 +20,6 @@ #include "i810.h" #include "i810_dri.h" -#include "xf86drm.h" -#include "dristruct.h" - - static char I810KernelDriverName[] = "i810"; static char I810ClientDriverName[] = "i810"; @@ -62,6 +58,43 @@ static int i810_pitch_flags[] = { 0 }; +Bool I810CleanupDma(ScrnInfoPtr pScrn) +{ + I810Ptr pI810 = I810PTR(pScrn); + Bool ret_val; + + ret_val = drmI810CleanupDma(pI810->drmSubFD); + if(ret_val == FALSE) ErrorF("I810 Dma Cleanup Failed\n"); + return ret_val; +} + +Bool I810InitDma(ScrnInfoPtr pScrn) +{ + I810Ptr pI810 = I810PTR(pScrn); + I810RingBuffer *ring = &(pI810->LpRing); + drmI810Init info; + Bool ret_val; + + info.start = ring->mem.Start; + info.end = ring->mem.End; + info.size = ring->mem.Size; + info.ring_map_idx = 6; + info.buffer_map_idx = 5; + info.sarea_off = sizeof(XF86DRISAREARec); + + info.front_offset = 0; + info.back_offset = pI810->BackBuffer.Start; + info.depth_offset = pI810->DepthBuffer.Start; + info.w = pScrn->virtualX; + info.h = pScrn->virtualY; + info.pitch = pI810->auxPitch; + info.pitch_bits = pI810->auxPitchBits; + + ret_val = drmI810InitDma(pI810->drmSubFD, &info); + if(ret_val == FALSE) ErrorF("I810 Dma Initialization Failed\n"); + return ret_val; +} + static Bool I810InitVisualConfigs(ScreenPtr pScreen) { @@ -260,8 +293,13 @@ Bool I810DRIScreenInit(ScreenPtr pScreen) int width = pScrn->displayWidth * pI810->cpp; int i; - /* ToDo : save agpHandles? */ - +#if XFree86LOADER + /* Check that the GLX, DRI, and DRM modules have been loaded by testing + * for known symbols in each module. */ + if (!LoaderSymbol("GlxSetVisualConfigs")) return FALSE; + if (!LoaderSymbol("DRIScreenInit")) return FALSE; + if (!LoaderSymbol("drmAvailable")) return FALSE; +#endif pDRIInfo = DRICreateInfoRec(); if (!pDRIInfo) { @@ -279,10 +317,12 @@ Bool I810DRIScreenInit(ScreenPtr pScreen) pDRIInfo->drmDriverName = I810KernelDriverName; pDRIInfo->clientDriverName = I810ClientDriverName; pDRIInfo->busIdString = xalloc(64); + sprintf(pDRIInfo->busIdString, "PCI:%d:%d:%d", ((pciConfigPtr)pI810->PciInfo->thisCard)->busnum, ((pciConfigPtr)pI810->PciInfo->thisCard)->devnum, ((pciConfigPtr)pI810->PciInfo->thisCard)->funcnum); + pDRIInfo->ddxDriverMajorVersion = 0; pDRIInfo->ddxDriverMinorVersion = 1; pDRIInfo->ddxDriverPatchVersion = 0; @@ -302,7 +342,7 @@ Bool I810DRIScreenInit(ScreenPtr pScreen) /* For now the mapping works by using a fixed size defined * in the SAREA header */ - if (sizeof(XF86DRISAREARec)+sizeof(drm_i810_sarea_t)>SAREA_MAX) { + if (sizeof(XF86DRISAREARec)+sizeof(I810SAREARec)>SAREA_MAX) { ErrorF("Data does not fit in SAREA\n"); return FALSE; } @@ -378,9 +418,9 @@ Bool I810DRIScreenInit(ScreenPtr pScreen) * under the DRI. */ - dcacheHandle = drmAgpAlloc(pI810->drmSubFD, 4096 * 1024, 1, NULL); + drmAgpAlloc(pI810->drmSubFD, 4096 * 1024, 1, NULL, &dcacheHandle); pI810->dcacheHandle = dcacheHandle; - + #define Elements(x) sizeof(x)/sizeof(*x) for (pitch_idx = 0 ; pitch_idx < Elements(i810_pitches) ; pitch_idx++) @@ -392,9 +432,8 @@ Bool I810DRIScreenInit(ScreenPtr pScreen) "Couldn't find depth/back buffer pitch"); DRICloseScreen(pScreen); return FALSE; - } - else { - back_size = i810_pitches[pitch_idx] * pScrn->virtualY; + } else { + back_size = i810_pitches[pitch_idx] * (pScrn->virtualY + 4); back_size = ((back_size + 4096 - 1) / 4096) * 4096; } @@ -411,14 +450,18 @@ Bool I810DRIScreenInit(ScreenPtr pScreen) } else { sysmem_size = sysmem_size - 2*back_size; } - - sysmem_size -= 4096; - if(sysmem_size > ((48*1024*1024) - 1) ) { - sysmem_size = (48*1024*1024) - (2*4096); - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "User requested more memory then fits in the agp aperture\n" + + if(sysmem_size > 48*1024*1024) { + sysmem_size = 48*1024*1024; + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, + "User requested more memory then fits in the agp aperture\n" "Truncating to %d bytes of memory\n", sysmem_size); } + + sysmem_size -= 4096; /* remove 4k for the hw cursor */ + pI810->SysMem.Start = 0; pI810->SysMem.Size = sysmem_size; pI810->SysMem.End = sysmem_size; @@ -428,7 +471,6 @@ Bool I810DRIScreenInit(ScreenPtr pScreen) if (dcacheHandle != 0) { /* The Z buffer is always aligned to the 48 mb mark in the aperture */ - if(drmAgpBind(pI810->drmSubFD, dcacheHandle, 48*1024*1024) == 0) { xf86memset (&pI810->DcacheMem, 0, sizeof(I810MemRange)); xf86DrvMsg(pScrn->scrnIndex, X_INFO, @@ -454,7 +496,7 @@ Bool I810DRIScreenInit(ScreenPtr pScreen) xf86DrvMsg(pScrn->scrnIndex, X_INFO, "GART: no dcache memory found\n"); } - agpHandle = drmAgpAlloc(pI810->drmSubFD, back_size, 0, NULL); + drmAgpAlloc(pI810->drmSubFD, back_size, 0, NULL, &agpHandle); pI810->backHandle = agpHandle; if(agpHandle != 0) { @@ -481,8 +523,8 @@ Bool I810DRIScreenInit(ScreenPtr pScreen) if(dcacheHandle == 0) { /* The Z buffer is always aligned to the 48 mb mark in the aperture */ - agpHandle = drmAgpAlloc(pI810->drmSubFD, back_size, 0, - NULL); + drmAgpAlloc(pI810->drmSubFD, back_size, 0, + NULL, &agpHandle); pI810->zHandle = agpHandle; if(agpHandle != 0) { @@ -509,8 +551,7 @@ Bool I810DRIScreenInit(ScreenPtr pScreen) /* Now allocate and bind the agp space. This memory will include the * regular framebuffer as well as texture memory. */ - - agpHandle = drmAgpAlloc(pI810->drmSubFD, sysmem_size, 0, NULL); + drmAgpAlloc(pI810->drmSubFD, sysmem_size, 0, NULL, &agpHandle); if(agpHandle == 0) { ErrorF("drmAgpAlloc failed\n"); DRICloseScreen(pScreen); @@ -524,8 +565,8 @@ Bool I810DRIScreenInit(ScreenPtr pScreen) return FALSE; } - agpHandle = drmAgpAlloc(pI810->drmSubFD, 4096, 2, - (unsigned long *)&pI810->CursorPhysical); + drmAgpAlloc(pI810->drmSubFD, 4096, 2, + (unsigned long *)&pI810->CursorPhysical, &agpHandle); pI810->cursorHandle = agpHandle; if (agpHandle != 0) { @@ -545,7 +586,6 @@ Bool I810DRIScreenInit(ScreenPtr pScreen) pI810->CursorPhysical = 0; } - I810SetTiledMemory(pScrn, 1, pI810->DepthBuffer.Start, i810_pitches[pitch_idx], @@ -558,10 +598,9 @@ Bool I810DRIScreenInit(ScreenPtr pScreen) pI810->auxPitch = i810_pitches[pitch_idx]; pI810->auxPitchBits = i810_pitch_flags[pitch_idx]; - pI810->SavedDcacheMem = pI810->DcacheMem; - pI810DRI->backbufferSize = pI810->BackBuffer.Size; + if (drmAddMap(pI810->drmSubFD, (drmHandle)pI810->BackBuffer.Start, pI810->BackBuffer.Size, DRM_AGP, 0, &pI810DRI->backbuffer) < 0) { @@ -586,6 +625,13 @@ Bool I810DRIScreenInit(ScreenPtr pScreen) I810AllocHigh( &(pI810->BufferMem), &(pI810->SysMem), I810_DMA_BUF_NR * I810_DMA_BUF_SZ); + if(pI810->BufferMem.Start == 0 || + pI810->BufferMem.End - pI810->BufferMem.Start > + I810_DMA_BUF_NR * I810_DMA_BUF_SZ) { + ErrorF("Not enough memory for dma buffers\n"); + DRICloseScreen(pScreen); + return FALSE; + } if(drmAddMap(pI810->drmSubFD, (drmHandle)pI810->BufferMem.Start, pI810->BufferMem.Size, DRM_AGP, 0, &pI810->buffer_map) < 0) { @@ -608,7 +654,6 @@ Bool I810DRIScreenInit(ScreenPtr pScreen) /* Use the rest of memory for textures. */ pI810DRI->textureSize = pI810->SysMem.Size; - i = mylog2(pI810DRI->textureSize / I810_NR_TEX_REGIONS); if (i < I810_LOG_MIN_TEX_REGION_SIZE) @@ -617,15 +662,14 @@ Bool I810DRIScreenInit(ScreenPtr pScreen) pI810DRI->logTextureGranularity = i; pI810DRI->textureSize = (pI810DRI->textureSize >> i) << i; /* truncate */ - if(pI810DRI->textureSize < 512*1024) { ErrorF("Less then 512k for textures\n"); DRICloseScreen(pScreen); + return FALSE; } I810AllocLow( &(pI810->TexMem), &(pI810->SysMem), pI810DRI->textureSize); - if (drmAddMap(pI810->drmSubFD, (drmHandle)pI810->TexMem.Start, pI810->TexMem.Size, DRM_AGP, 0, @@ -650,7 +694,7 @@ Bool I810DRIScreenInit(ScreenPtr pScreen) xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] added %d %d byte DMA buffers\n", bufs, I810_DMA_BUF_SZ); - I810drmInitDma(pScrn); + I810InitDma(pScrn); /* Okay now initialize the dma engine */ @@ -718,7 +762,7 @@ I810DRICloseScreen(ScreenPtr pScreen) ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; I810Ptr pI810 = I810PTR(pScrn); - I810drmCleanupDma(pScrn); + I810CleanupDma(pScrn); if(pI810->dcacheHandle) drmAgpFree(pI810->drmSubFD, pI810->dcacheHandle); if(pI810->backHandle) drmAgpFree(pI810->drmSubFD, pI810->backHandle); @@ -768,7 +812,7 @@ I810DestroyContext(ScreenPtr pScreen, drmContext hwContext, Bool I810DRIFinishScreenInit(ScreenPtr pScreen) { - drm_i810_sarea_t *sPriv = (drm_i810_sarea_t *)DRIGetSAREAPrivate(pScreen); + I810SAREARec *sPriv = (I810SAREARec *)DRIGetSAREAPrivate(pScreen); xf86memset( sPriv, 0, sizeof(sPriv) ); return DRIFinishScreenInit(pScreen); } diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c index e489d17c9..99369f50b 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c @@ -207,31 +207,19 @@ static const char *ramdacSymbols[] = { #ifdef XF86DRI static const char *drmSymbols[] = { + "drmAvailable", "drmAddBufs", "drmAddMap", - "drmAvailable", - "drmCtlAddCommand", "drmCtlInstHandler", "drmGetInterruptFromBusID", - "drmMapBufs", - "drmMarkBufs", - "drmUnmapBufs", "drmAgpAcquire", "drmAgpRelease", "drmAgpEnable", "drmAgpAlloc", "drmAgpFree", "drmAgpBind", - "drmAgpUnbind", - "drmAgpVersionMajor", - "drmAgpVersionMinor", - "drmAgpGetMode", - "drmAgpBase", - "drmAgpSize", - "drmAgpMemoryUsed", - "drmAgpMemoryAvail", - "drmAgpVendorId", - "drmAgpDeviceId", + "drmI810CleanupDma", + "drmI810InitDma", NULL }; @@ -1047,7 +1035,6 @@ DoRestore(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, I810RegPtr i810Reg, pI810 = I810PTR(pScrn); hwp = VGAHWPTR(pScrn); - if (I810_DEBUG&DEBUG_VERBOSE_VGA) { ErrorF("Setting mode in I810Restore:\n"); i810PrintMode( vgaReg, i810Reg ); @@ -1113,7 +1100,7 @@ DoRestore(ScrnInfoPtr pScrn, vgaRegPtr vgaReg, I810RegPtr i810Reg, temp &= ~INTERLACE_ENABLE; temp |= i810Reg->InterlaceControl; hwp->writeCrtc(hwp, INTERLACE_CNTL, temp); - + temp=pI810->readControl(pI810, GRX, ADDRESS_MAPPING); temp &= 0xE0; /* Save reserved bits 7:5 */ temp |= i810Reg->AddressMapping; @@ -1553,7 +1540,6 @@ I810AllocateFront(ScrnInfoPtr pScrn) { xf86memset( &(pI810->LpRing), 0, sizeof( I810RingBuffer ) ); if(I810AllocLow( &(pI810->LpRing.mem), &(pI810->SysMem), 16*4096 )) { - if (I810_DEBUG & DEBUG_VERBOSE_MEMORY) ErrorF( "ring buffer at local %lx\n", pI810->LpRing.mem.Start); @@ -1607,6 +1593,7 @@ I810ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) { /* Have to init the DRM earlier than in other drivers to get agp * memory. Wonder if this is going to be a problem... */ + #ifdef XF86DRI /* * Setup DRI after visuals have been established, but before cfbScreenInit @@ -1625,7 +1612,7 @@ I810ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) { return FALSE; I810AllocateFront(pScrn); #endif - + if (!I810MapMem(pScrn)) return FALSE; pScrn->memPhysBase = (int)pI810->FbBase; @@ -1729,6 +1716,7 @@ I810ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) { } } #endif + #ifdef XF86DRI if (!pI810->directRenderingEnabled) { pI810->DoneFrontAlloc = FALSE; @@ -1738,6 +1726,7 @@ I810ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) { } #endif + if (!xf86InitFBManager(pScreen, &(pI810->FbMemBox))) { xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Failed to init memory manager\n"); @@ -1762,7 +1751,7 @@ I810ScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) { } } -#if XF86DRI +#ifdef XF86DRI if (pI810->LpRing.mem.Start == 0) { pI810->directRenderingEnabled = 0; I810DRICloseScreen(pScreen); @@ -1892,9 +1881,10 @@ I810LeaveVT(int scrnIndex, int flags) { pI810->LockHeld = 1; } #endif - - I810RefreshRing( pScrn ); - I810Sync( pScrn ); + if(pI810->AccelInfoRec != NULL) { + I810RefreshRing( pScrn ); + I810Sync( pScrn ); + } I810Restore(pScrn); vgaHWLock(hwp); } diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_memory.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_memory.c index 2cedd9682..f499ffa2d 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_memory.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_memory.c @@ -46,7 +46,9 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #include "i810.h" #include "i810_reg.h" +#ifdef linux #include <linux/agpgart.h> +#endif int I810AllocLow( I810MemRange *result, I810MemRange *pool, int size ) { @@ -83,6 +85,7 @@ extern int xf86errno; int I810AllocateGARTMemory( ScrnInfoPtr pScrn ) { +#ifdef linux struct _agp_info agpinf; struct _agp_bind bind; struct _agp_allocate alloc; @@ -220,18 +223,23 @@ int I810AllocateGARTMemory( ScrnInfoPtr pScrn ) return TRUE; +#else + return FALSE; +#endif } void I810FreeGARTMemory( ScrnInfoPtr pScrn ) { +#ifdef linux I810Ptr pI810 = I810PTR(pScrn); if (pI810->gartfd != -1) { xf86close( pI810->gartfd ); pI810->gartfd = -1; } +#endif } diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c index df23db4f6..0f4ba439a 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c @@ -22,7 +22,7 @@ #include "mga.h" #include "mga_macros.h" #include "mga_dri.h" -#include "mga_dripriv.h" +#include "mga_wrap.h" static char MGAKernelDriverName[] = "mga"; static char MGAClientDriverName[] = "mga"; @@ -51,172 +51,195 @@ extern void Mga32DRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 index); extern void Mga32DRIMoveBuffers(WindowPtr pParent, DDXPointRec ptOldOrg, RegionPtr prgnSrc, CARD32 index); -static Bool -MGAInitVisualConfigs(ScreenPtr pScreen) +Bool MgaCleanupDma(ScrnInfoPtr pScrn) { - ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; - MGAPtr pMGA = MGAPTR(pScrn); - int numConfigs = 0; - __GLXvisualConfig *pConfigs = 0; - MGAConfigPrivPtr pMGAConfigs = 0; - MGAConfigPrivPtr *pMGAConfigPtrs = 0; - int i; + MGAPtr pMGA = MGAPTR(pScrn); + Bool ret_val; + + ret_val = drmMgaCleanupDma(pMGA->drmSubFD); + if(ret_val == FALSE) ErrorF("Mga Dma Cleanup Failed\n"); + + return ret_val; +} - switch (pScrn->bitsPerPixel) { - case 8: - case 24: - case 32: - break; - case 16: - numConfigs = 4; +Bool MgaLockUpdate(ScrnInfoPtr pScrn, drmLockFlags flags) +{ + MGAPtr pMGA = MGAPTR(pScrn); + Bool ret_val; + + ret_val = drmMgaLockUpdate(pMGA->drmSubFD, flags); + if(ret_val == FALSE) ErrorF("LockUpdate failed\n"); + + return ret_val; +} - if (!(pConfigs = (__GLXvisualConfig*)xnfcalloc(sizeof(__GLXvisualConfig), - numConfigs))) { +Bool MgaInitDma(ScrnInfoPtr pScrn, int prim_size) +{ + MGAPtr pMGA = MGAPTR(pScrn); + MGADRIPtr pMGADRI = (MGADRIPtr)pMGA->pDRIInfo->devPrivate; + MGADRIServerPrivatePtr pMGADRIServer = pMGA->DRIServerInfo; + drmMgaInit init; + Bool ret_val; + + memset(&init, 0, sizeof(drmMgaInit)); + init.reserved_map_agpstart = 0; + init.reserved_map_idx = 3; + init.buffer_map_idx = 4; + init.sarea_priv_offset = sizeof(XF86DRISAREARec); + init.primary_size = prim_size; + init.warp_ucode_size = pMGADRIServer->warp_ucode_size; + + switch(pMGA->Chipset) { + case PCI_CHIP_MGAG400: + init.chipset = MGA_CARD_TYPE_G400; + break; + case PCI_CHIP_MGAG200: + init.chipset = MGA_CARD_TYPE_G200; + break; + case PCI_CHIP_MGAG200_PCI: + default: + ErrorF("Direct rendering not supported on this card/chipset\n"); return FALSE; - } - if (!(pMGAConfigs = (MGAConfigPrivPtr)xnfcalloc(sizeof(MGAConfigPrivRec), + } + + init.frontOffset = pMGADRI->frontOffset; + init.backOffset = pMGADRI->backOffset; + init.depthOffset = pMGADRI->depthOffset; + init.textureOffset = pMGADRI->textureOffset; + init.textureSize = pMGADRI->textureSize; + init.agpTextureSize = pMGADRI->agpTextureSize; + init.cpp = pMGADRI->cpp; + init.stride = pMGADRI->frontPitch; + init.mAccess = pMGA->MAccess; + init.sgram = !pMGA->HasSDRAM; + + memcpy(&init.WarpIndex, &pMGADRIServer->WarpIndex, + sizeof(drmMgaWarpIndex) * MGA_MAX_WARP_PIPES); + + ErrorF("Mga Dma Initialization start\n"); + + ret_val = drmMgaInitDma(pMGA->drmSubFD, &init); + if(ret_val == FALSE) ErrorF("Mga Dma Initialization Failed\n"); + else ErrorF("Mga Dma Initialization done\n"); + return ret_val; +} + +static Bool +MGAInitVisualConfigs(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMGA = MGAPTR(pScrn); + int numConfigs = 0; + __GLXvisualConfig *pConfigs = 0; + MGAConfigPrivPtr pMGAConfigs = 0; + MGAConfigPrivPtr *pMGAConfigPtrs = 0; + int i, db, depth, stencil, accum; + + switch (pScrn->bitsPerPixel) { + case 8: + case 24: + case 32: + break; + case 16: + numConfigs = 4; + + if (!(pConfigs = (__GLXvisualConfig*)xnfcalloc(sizeof(__GLXvisualConfig), numConfigs))) { - xfree(pConfigs); - return FALSE; - } - if (!(pMGAConfigPtrs = (MGAConfigPrivPtr*)xnfcalloc(sizeof(MGAConfigPrivPtr), - numConfigs))) { - xfree(pConfigs); - xfree(pMGAConfigs); - return FALSE; - } - for (i=0; i<numConfigs; i++) - pMGAConfigPtrs[i] = &pMGAConfigs[i]; + return FALSE; + } + if (!(pMGAConfigs = (MGAConfigPrivPtr)xnfcalloc(sizeof(MGAConfigPrivRec), + numConfigs))) { + xfree(pConfigs); + return FALSE; + } + if (!(pMGAConfigPtrs = (MGAConfigPrivPtr*)xnfcalloc(sizeof(MGAConfigPrivPtr), + numConfigs))) { + xfree(pConfigs); + xfree(pMGAConfigs); + return FALSE; + } + for (i=0; i<numConfigs; i++) + pMGAConfigPtrs[i] = &pMGAConfigs[i]; + + i = 0; + depth = 1; + for (accum = 0; accum <= 1; accum++) { + for (stencil = 0; stencil <= 0; stencil++) { /* no stencil for now */ + for (db=0; db<=1; db++) { + pConfigs[i].vid = -1; + pConfigs[i].class = -1; + pConfigs[i].rgba = TRUE; + pConfigs[i].redSize = 5; + pConfigs[i].greenSize = 6; + pConfigs[i].blueSize = 5; + pConfigs[i].redMask = 0x0000F800; + pConfigs[i].greenMask = 0x000007E0; + pConfigs[i].blueMask = 0x0000001F; + pConfigs[i].alphaMask = 0; + if (accum) { + pConfigs[i].accumRedSize = 16; + pConfigs[i].accumGreenSize = 16; + pConfigs[i].accumBlueSize = 16; + pConfigs[i].accumAlphaSize = 0; + } else { + pConfigs[i].accumRedSize = 0; + pConfigs[i].accumGreenSize = 0; + pConfigs[i].accumBlueSize = 0; + pConfigs[i].accumAlphaSize = 0; + } + if (db) + pConfigs[i].doubleBuffer = TRUE; + else + pConfigs[i].doubleBuffer = FALSE; + pConfigs[i].stereo = FALSE; + pConfigs[i].bufferSize = 16; + if (depth) + pConfigs[i].depthSize = 16; + else + pConfigs[i].depthSize = 0; + if (stencil) + pConfigs[i].stencilSize = 8; + else + pConfigs[i].stencilSize = 0; + pConfigs[i].auxBuffers = 0; + pConfigs[i].level = 0; + if (stencil) + pConfigs[i].visualRating = GLX_SLOW_VISUAL_EXT; + else + pConfigs[i].visualRating = GLX_NONE_EXT; + pConfigs[i].transparentPixel = 0; + pConfigs[i].transparentRed = 0; + pConfigs[i].transparentGreen = 0; + pConfigs[i].transparentBlue = 0; + pConfigs[i].transparentAlpha = 0; + pConfigs[i].transparentIndex = 0; + i++; + } + } + } + if (i!=numConfigs) { + ErrorF("Incorrect initialization of visuals\n"); + return FALSE; + } + break; + default: + ; /* unexpected bits/pixelx */ + } + pMGA->numVisualConfigs = numConfigs; + pMGA->pVisualConfigs = pConfigs; + pMGA->pVisualConfigsPriv = pMGAConfigs; + GlxSetVisualConfigs(numConfigs, pConfigs, (void**)pMGAConfigPtrs); + return TRUE; +} - /* config 0: db=FALSE, depth=0 - config 1: db=FALSE, depth=16 - config 2: db=TRUE, depth=0; - config 3: db=TRUE, depth=16 - */ - pConfigs[0].vid = -1; - pConfigs[0].class = -1; - pConfigs[0].rgba = TRUE; - pConfigs[0].redSize = 8; - pConfigs[0].greenSize = 8; - pConfigs[0].blueSize = 8; - pConfigs[0].redMask = 0x00FF0000; - pConfigs[0].greenMask = 0x0000FF00; - pConfigs[0].blueMask = 0x000000FF; - pConfigs[0].alphaMask = 0; - pConfigs[0].accumRedSize = 0; - pConfigs[0].accumGreenSize = 0; - pConfigs[0].accumBlueSize = 0; - pConfigs[0].accumAlphaSize = 0; - pConfigs[0].doubleBuffer = FALSE; - pConfigs[0].stereo = FALSE; - pConfigs[0].bufferSize = 16; - pConfigs[0].depthSize = 0; - pConfigs[0].stencilSize = 0; - pConfigs[0].auxBuffers = 0; - pConfigs[0].level = 0; - pConfigs[0].visualRating = 0; - pConfigs[0].transparentPixel = 0; - pConfigs[0].transparentRed = 0; - pConfigs[0].transparentGreen = 0; - pConfigs[0].transparentBlue = 0; - pConfigs[0].transparentAlpha = 0; - pConfigs[0].transparentIndex = 0; - - pConfigs[1].vid = -1; - pConfigs[1].class = -1; - pConfigs[1].rgba = TRUE; - pConfigs[1].redSize = 8; - pConfigs[1].greenSize = 8; - pConfigs[1].blueSize = 8; - pConfigs[1].redMask = 0x00FF0000; - pConfigs[1].greenMask = 0x0000FF00; - pConfigs[1].blueMask = 0x000000FF; - pConfigs[1].alphaMask = 0; - pConfigs[1].accumRedSize = 0; - pConfigs[1].accumGreenSize = 0; - pConfigs[1].accumBlueSize = 0; - pConfigs[1].accumAlphaSize = 0; - pConfigs[1].doubleBuffer = FALSE; - pConfigs[1].stereo = FALSE; - pConfigs[1].bufferSize = 16; - pConfigs[1].depthSize = 16; - pConfigs[1].stencilSize = 0; - pConfigs[1].auxBuffers = 0; - pConfigs[1].level = 0; - pConfigs[1].visualRating = 0; - pConfigs[1].transparentPixel = 0; - pConfigs[1].transparentRed = 0; - pConfigs[1].transparentGreen = 0; - pConfigs[1].transparentBlue = 0; - pConfigs[1].transparentAlpha = 0; - pConfigs[1].transparentIndex = 0; - - pConfigs[2].vid = -1; - pConfigs[2].class = -1; - pConfigs[2].rgba = TRUE; - pConfigs[2].redSize = 8; - pConfigs[2].greenSize = 8; - pConfigs[2].blueSize = 8; - pConfigs[2].redMask = 0x00FF0000; - pConfigs[2].greenMask = 0x0000FF00; - pConfigs[2].blueMask = 0x000000FF; - pConfigs[2].alphaMask = 0; - pConfigs[2].accumRedSize = 0; - pConfigs[2].accumGreenSize = 0; - pConfigs[2].accumBlueSize = 0; - pConfigs[2].accumAlphaSize = 0; - pConfigs[2].doubleBuffer = TRUE; - pConfigs[2].stereo = FALSE; - pConfigs[2].bufferSize = 16; - pConfigs[2].depthSize = 0; - pConfigs[2].stencilSize = 0; - pConfigs[2].auxBuffers = 0; - pConfigs[2].level = 0; - pConfigs[2].visualRating = 0; - pConfigs[2].transparentPixel = 0; - pConfigs[2].transparentRed = 0; - pConfigs[2].transparentGreen = 0; - pConfigs[2].transparentBlue = 0; - pConfigs[2].transparentAlpha = 0; - pConfigs[2].transparentIndex = 0; - - pConfigs[3].vid = -1; - pConfigs[3].class = -1; - pConfigs[3].rgba = TRUE; - pConfigs[3].redSize = 8; - pConfigs[3].greenSize = 8; - pConfigs[3].blueSize = 8; - pConfigs[3].redMask = 0x00FF0000; - pConfigs[3].greenMask = 0x0000FF00; - pConfigs[3].blueMask = 0x000000FF; - pConfigs[3].alphaMask = 0; - pConfigs[3].accumRedSize = 0; - pConfigs[3].accumGreenSize = 0; - pConfigs[3].accumBlueSize = 0; - pConfigs[3].accumAlphaSize = 0; - pConfigs[3].doubleBuffer = TRUE; - pConfigs[3].stereo = FALSE; - pConfigs[3].bufferSize = 16; - pConfigs[3].depthSize = 16; - pConfigs[3].stencilSize = 0; - pConfigs[3].auxBuffers = 0; - pConfigs[3].level = 0; - pConfigs[3].visualRating = 0; - pConfigs[3].transparentPixel = 0; - pConfigs[3].transparentRed = 0; - pConfigs[3].transparentGreen = 0; - pConfigs[3].transparentBlue = 0; - pConfigs[3].transparentAlpha = 0; - pConfigs[3].transparentIndex = 0; - break; - } - pMGA->numVisualConfigs = numConfigs; - pMGA->pVisualConfigs = pConfigs; - pMGA->pVisualConfigsPriv = pMGAConfigs; - GlxSetVisualConfigs(numConfigs, pConfigs, (void**)pMGAConfigPtrs); - return TRUE; +static unsigned int mylog2(unsigned int n) +{ + unsigned int log2 = 1; + while (n>1) n >>= 1, log2++; + return log2; } + Bool MGADRIScreenInit(ScreenPtr pScreen) { ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; @@ -224,10 +247,24 @@ Bool MGADRIScreenInit(ScreenPtr pScreen) DRIInfoPtr pDRIInfo; MGADRIPtr pMGADRI; MGADRIServerPrivatePtr pMGADRIServer; - int bufs; - int prim_size; - int init_offset; + int bufs, size; + int prim_size; + int init_offset; + int i; +#if XFree86LOADER + /* Check that the GLX, DRI, and DRM modules have been loaded by testing + * for canonical symbols in each module. */ + if (!LoaderSymbol("GlxSetVisualConfigs")) return FALSE; + if (!LoaderSymbol("DRIScreenInit")) return FALSE; + if (!LoaderSymbol("drmAvailable")) return FALSE; +#endif + + if((pScrn->bitsPerPixel / 8) != 2) { + ErrorF("Direct Rendering only supported in 16 bpp mode\n"); + return FALSE; + } + pDRIInfo = DRICreateInfoRec(); if (!pDRIInfo) return FALSE; pMGA->pDRIInfo = pDRIInfo; @@ -247,28 +284,25 @@ Bool MGADRIScreenInit(ScreenPtr pScreen) pDRIInfo->frameBufferStride = pScrn->displayWidth*(pScrn->bitsPerPixel/8); pDRIInfo->ddxDrawableTableEntry = MGA_MAX_DRAWABLES; + MGADRIWrapFunctions( pScreen, pDRIInfo ); + if (SAREA_MAX_DRAWABLES < MGA_MAX_DRAWABLES) pDRIInfo->maxDrawableTableEntry = SAREA_MAX_DRAWABLES; else pDRIInfo->maxDrawableTableEntry = MGA_MAX_DRAWABLES; -#ifdef NOT_DONE - /* FIXME need to extend DRI protocol to pass this size back to client - * for SAREA mapping that includes a device private record - */ - pDRIInfo->SAREASize = - ((sizeof(XF86DRISAREARec) + 0xfff) & 0x1000); /* round to page */ - /* + shared memory device private rec */ -#else /* For now the mapping works by using a fixed size defined * in the SAREA header */ - if (sizeof(XF86DRISAREARec)+sizeof(drm_mga_sarea_t)>SAREA_MAX) { + if (sizeof(XF86DRISAREARec)+sizeof(MGASAREARec)>SAREA_MAX) { ErrorF("Data does not fit in SAREA\n"); return FALSE; } + + ErrorF("\n\n\nSarea %d+%d: %d\n", sizeof(XF86DRISAREARec), + sizeof(MGASAREARec), sizeof(XF86DRISAREARec) + sizeof(MGASAREARec)); + pDRIInfo->SAREASize = SAREA_MAX; -#endif if (!(pMGADRI = (MGADRIPtr)xnfcalloc(sizeof(MGADRIRec),1))) { DRIDestroyInfoRec(pMGA->pDRIInfo); @@ -277,7 +311,7 @@ Bool MGADRIScreenInit(ScreenPtr pScreen) return FALSE; } if (!(pMGADRIServer = (MGADRIServerPrivatePtr) - xnfcalloc(sizeof(MGADRIServerPrivate),1))) { + xnfcalloc(sizeof(MGADRIServerPrivateRec),1))) { xfree(pMGADRI); DRIDestroyInfoRec(pMGA->pDRIInfo); pMGA->pDRIInfo=0; @@ -334,25 +368,44 @@ Bool MGADRIScreenInit(ScreenPtr pScreen) pMGADRIServer->regs); /* Agp Support */ + pMGADRIServer->agpAcquired = FALSE; + pMGADRIServer->agpHandle = 0; + pMGADRIServer->agpSizep = 0; + pMGADRIServer->agp_map = 0; + if(drmAgpAcquire(pMGA->drmSubFD) < 0) { DRICloseScreen(pScreen); ErrorF("drmAgpAcquire failed\n"); return FALSE; } + pMGADRIServer->agpAcquired = TRUE; + pMGADRIServer->warp_ucode_size = mgaGetMicrocodeSize(pScreen); if(pMGADRIServer->warp_ucode_size == 0) { ErrorF("microcodeSize is zero\n"); DRICloseScreen(pScreen); return FALSE; } + + pMGADRIServer->agpMode = drmAgpGetMode(pMGA->drmSubFD); + /* Default to 1X agp mode */ + pMGADRIServer->agpMode &= ~0x00000002; + if (drmAgpEnable(pMGA->drmSubFD, pMGADRIServer->agpMode) < 0) { + ErrorF("drmAgpEnable failed\n"); + DRICloseScreen(pScreen); + return FALSE; + } + ErrorF("drmAgpEnabled succeeded\n"); prim_size = 65536; init_offset = ((prim_size + pMGADRIServer->warp_ucode_size + 4096 - 1) / 4096) * 4096; - pMGADRIServer->agpSizep = drmAgpSize(pMGA->drmSubFD); - pMGADRIServer->agpBase = drmAgpBase(pMGA->drmSubFD); - if (drmAddMap(pMGA->drmSubFD, (drmHandle)pMGADRIServer->agpBase, + pMGADRIServer->agpSizep = init_offset; + pMGADRI->agpSize = (drmAgpSize(pMGA->drmSubFD)) - init_offset; + + pMGADRIServer->agpBase = (drmAddress) drmAgpBase(pMGA->drmSubFD); + if (drmAddMap(pMGA->drmSubFD, 0, init_offset, DRM_AGP, 0, &pMGADRIServer->agp_private) < 0) { DRICloseScreen(pScreen); @@ -370,12 +423,15 @@ Bool MGADRIScreenInit(ScreenPtr pScreen) /* Now allocate and bind a default of 8 megs */ - pMGADRIServer->agpHandle = drmAgpAlloc(pMGA->drmSubFD, 0x00800000, 0, 0); + drmAgpAlloc(pMGA->drmSubFD, 0x00800000, 0, 0, + &pMGADRIServer->agpHandle); + if(pMGADRIServer->agpHandle == 0) { ErrorF("drmAgpAlloc failed\n"); DRICloseScreen(pScreen); return FALSE; } + if(drmAgpBind(pMGA->drmSubFD, pMGADRIServer->agpHandle, 0) < 0) { DRICloseScreen(pScreen); ErrorF("drmAgpBind failed\n"); @@ -384,72 +440,121 @@ Bool MGADRIScreenInit(ScreenPtr pScreen) mgaInstallMicrocode(pScreen, prim_size); - ErrorF("init_offset: %x\n", init_offset); - pMGADRI->agpSize = pMGADRIServer->agpSizep - init_offset; - ErrorF("pMGADRI->agpSize: %x\n", pMGADRI->agpSize); - - if(drmAddMap(pMGA->drmSubFD, (drmHandle)pMGADRIServer->agpBase + init_offset, + if(drmAddMap(pMGA->drmSubFD, (drmHandle)init_offset, pMGADRI->agpSize, DRM_AGP, 0, &pMGADRI->agp) < 0) { ErrorF("Failed to map public agp area\n"); DRICloseScreen(pScreen); return FALSE; } - ErrorF("Mapped public agp area\n"); + + + switch(pMGA->Chipset) { + case PCI_CHIP_MGAG400: + pMGADRI->chipset = MGA_CARD_TYPE_G400; + break; + case PCI_CHIP_MGAG200: + pMGADRI->chipset = MGA_CARD_TYPE_G200; + break; + case PCI_CHIP_MGAG200_PCI: + default: + ErrorF("Direct rendering not supported on this card/chipset\n"); + return FALSE; + } + + + pMGADRI->width = pScrn->virtualX; + pMGADRI->height = pScrn->virtualY; + pMGADRI->mem = pScrn->videoRam * 1024; + pMGADRI->cpp = pScrn->bitsPerPixel / 8; + pMGADRI->frontPitch = pScrn->displayWidth * (pScrn->bitsPerPixel / 8); + + + pMGADRI->frontOffset = 0; /* pMGA->YDstOrg * (pScrn->bitsPerPixel / 8) */ + pMGADRI->backOffset = ((pScrn->virtualY+129) * pScrn->displayWidth * + (pScrn->bitsPerPixel / 8) + 4095) & ~0xFFF; + + + fprintf(stderr, "calced backoffset: 0x%x\n", + pMGADRI->backOffset); + + +#if 0 + size = 2 * pScrn->virtualX * pScrn->virtualY; + pMGADRI->depthOffset = (pMGADRI->backOffset + size + 4095) & ~0xFFF; + pMGADRI->textureOffset = pMGADRI->depthOffset + size; + pMGADRI->textureSize = pMGA->FbUsableSize - pMGADRI->textureOffset; +#else + size = 2 * pScrn->virtualX * pScrn->virtualY; + size += 4095; + size &= ~4095; + pMGADRI->depthOffset = pMGA->FbUsableSize - size; + pMGADRI->depthOffset &= ~4095; + pMGADRI->textureOffset = pMGADRI->backOffset + size; + pMGADRI->textureSize = pMGADRI->depthOffset - pMGADRI->textureOffset; + + if (pMGADRI->depthOffset < pMGADRI->textureOffset + 512*1024) { + ErrorF("Insufficient memory for direct rendering\n"); + DRICloseScreen(pScreen); + return FALSE; + } +#endif + + pMGADRI->mAccess = pMGA->MAccess; + + i = mylog2(pMGADRI->textureSize / MGA_NR_TEX_REGIONS); + if (i < MGA_LOG_MIN_TEX_REGION_SIZE) + i = MGA_LOG_MIN_TEX_REGION_SIZE; + + pMGADRI->logTextureGranularity = i; + pMGADRI->textureSize = (pMGADRI->textureSize >> i) << i; /* truncate */ + + /* Here is where we need to do initialization of the dma engine */ - - pMGADRIServer->agpMode = drmAgpGetMode(pMGA->drmSubFD); - /* Default to 1X agp mode */ - pMGADRIServer->agpMode &= ~0x00000002; - if (drmAgpEnable(pMGA->drmSubFD, pMGADRIServer->agpMode) < 0) { - ErrorF("drmAgpEnable failed\n"); - DRICloseScreen(pScreen); - return FALSE; - } - ErrorF("drmAgpEnabled succeeded\n"); - if((bufs = drmAddBufs(pMGA->drmSubFD, - /*63*/ 15, - /* 65536 */ 524288, + if((bufs = drmAddBufs(pMGA->drmSubFD, + MGA_DMA_BUF_NR, + MGA_DMA_BUF_SZ, DRM_AGP_BUFFER, init_offset)) <= 0) { xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] failure adding %d %d byte DMA buffers\n", - /* 63 */ 15, - /* 65536 */ 524288); + MGA_DMA_BUF_NR, + MGA_DMA_BUF_SZ); DRICloseScreen(pScreen); return FALSE; } + + pMGADRI->agpBufferOffset = init_offset + pMGADRIServer->agp_private; + + /* Calculate texture constants for AGP texture space + */ + { + CARD32 agpTextureOffset = MGA_DMA_BUF_SZ * MGA_DMA_BUF_NR; + CARD32 agpTextureSize = pMGADRI->agpSize - agpTextureOffset; + + i = mylog2(agpTextureSize / MGA_NR_TEX_REGIONS); + if (i < MGA_LOG_MIN_TEX_REGION_SIZE) + i = MGA_LOG_MIN_TEX_REGION_SIZE; + + pMGADRI->logAgpTextureGranularity = i; + pMGADRI->agpTextureSize = (agpTextureSize >> i) << i; + pMGADRI->agpTextureOffset = agpTextureOffset; + } + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] added %d %d byte DMA buffers\n", - bufs, /* 65536 */ 524288); + bufs, MGA_DMA_BUF_SZ); - if((mgadrmInitDma(pScrn, prim_size)) != TRUE) { + if((MgaInitDma(pScrn, prim_size)) != TRUE) { ErrorF("Failed to initialize dma engine\n"); DRICloseScreen(pScreen); return FALSE; } - - ErrorF("Initialized Dma Engine\n"); + ErrorF("Initialized Dma Engine\n"); - if(drmMarkBufs(pMGA->drmSubFD, 0.133333, 0.266666) != 0) { - xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "[drm] failure marking DMA buffers\n"); - DRICloseScreen(pScreen); - return FALSE; - } - if (!(pMGADRIServer->drmBufs = drmMapBufs(pMGA->drmSubFD))) { - xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "[drm] failure mapping DMA buffers\n"); - DRICloseScreen(pScreen); - return FALSE; - } - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] buffers mapped with %p\n", - pMGADRIServer->drmBufs); - xf86DrvMsg(pScrn->scrnIndex, X_INFO, "[drm] %d DMA buffers mapped\n", - pMGADRIServer->drmBufs->count); if (!pMGADRIServer->irq) { pMGADRIServer->irq = drmGetInterruptFromBusID(pMGA->drmSubFD, ((pciConfigPtr)pMGA->PciInfo @@ -481,16 +586,26 @@ MGADRICloseScreen(ScreenPtr pScreen) ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; MGAPtr pMGA = MGAPTR(pScrn); MGADRIServerPrivatePtr pMGADRIServer = pMGA->DRIServerInfo; - - xf86DrvMsg(pScrn->scrnIndex, X_INFO, - "[drm] unmapping %d buffers\n", - pMGADRIServer->drmBufs->count); - if (drmUnmapBufs(pMGADRIServer->drmBufs)) { - xf86DrvMsg(pScreen->myNum, X_INFO, - "[drm] unable to unmap DMA buffers\n"); + + MgaCleanupDma(pScrn); + + if(pMGADRIServer->agp_map) { + ErrorF("Unmapped agp region\n"); + drmUnmap(pMGADRIServer->agp_map, pMGADRIServer->agpSizep); + pMGADRIServer->agp_map = 0; } - mgadrmCleanupDma(pScrn); - + if(pMGADRIServer->agpHandle) { + ErrorF("Freeing agp memory\n"); + drmAgpFree(pMGA->drmSubFD, pMGADRIServer->agpHandle); + pMGADRIServer->agpHandle = 0; + pMGADRIServer->agpSizep = 0; + } + if(pMGADRIServer->agpAcquired == TRUE) { + ErrorF("releasing agp module\n"); + drmAgpRelease(pMGA->drmSubFD); + pMGADRIServer->agpAcquired = FALSE; + } + DRICloseScreen(pScreen); if (pMGA->pDRIInfo) { @@ -518,9 +633,6 @@ MGACreateContext(ScreenPtr pScreen, VisualPtr visual, drmContext hwContext, void *pVisualConfigPriv, DRIContextType contextStore) { - MGADRIContextPtr ctx; - - ctx = (MGADRIContextPtr)contextStore; return TRUE; } @@ -528,106 +640,120 @@ static void MGADestroyContext(ScreenPtr pScreen, drmContext hwContext, DRIContextType contextStore) { - MGADRIContextPtr ctx; - ctx = (MGADRIContextPtr)contextStore; } Bool MGADRIFinishScreenInit(ScreenPtr pScreen) { ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGASAREAPtr sPriv; MGAPtr pMGA = MGAPTR(pScrn); - MGADRIPtr pMGADRI; - int size; + if (!pMGA->pDRIInfo) return FALSE; + + sPriv = (MGASAREAPtr)DRIGetSAREAPrivate(pScreen); pMGA->pDRIInfo->driverSwapMethod = DRI_HIDE_X_CONTEXT; - /* pMGA->pDRIInfo->driverSwapMethod = DRI_SERVER_SWAP; */ - pMGADRI = (MGADRIPtr)pMGA->pDRIInfo->devPrivate; - pMGADRI->deviceID = pMGA->PciInfo->chipType; - pMGADRI->width = pScrn->virtualX; - pMGADRI->height = pScrn->virtualY; - pMGADRI->mem = pScrn->videoRam * 1024; - pMGADRI->cpp = pScrn->bitsPerPixel / 8; - pMGADRI->stride = pScrn->displayWidth * (pScrn->bitsPerPixel / 8); - pMGADRI->backOffset = ((pScrn->virtualY+129) * pScrn->displayWidth * - (pScrn->bitsPerPixel / 8) + 4095) & ~0xFFF; - size = 2 * pScrn->virtualX * pScrn->virtualY; - pMGADRI->depthOffset = (pMGADRI->backOffset + size + 4095) & ~0xFFF; - pMGADRI->textureOffset = pMGADRI->depthOffset + size; - /* - * The rest of the framebuffer is for textures except for the - * memory for the hardware cursor. - */ - pMGADRI->textureSize = pMGA->FbUsableSize - pMGADRI->textureOffset; - pMGADRI->fbOffset = pMGA->YDstOrg * (pScrn->bitsPerPixel / 8); + xf86memset( sPriv, 0, sizeof(MGASAREARec) ); return DRIFinishScreenInit(pScreen); } -void MGASwapContext(ScreenPtr pScreen) + +void mgaGetQuiescence( ScrnInfoPtr pScrn ) { -#if 0 - ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; - MGAPtr pMga = MGAPTR(pScrn); - MGAFBLayout *pLayout = &pMga->CurrentLayout; - - usleep(500); - ErrorF("Syncing : swap\n"); - MGABUSYWAIT(); - ErrorF("Sync : swap 1\n"); - MGAStormSync(pScrn); - ErrorF("Syncing done\n"); - pMga->AccelInfoRec->NeedToSync = TRUE; - - WAITFIFO(12); - OUTREG(MGAREG_MACCESS, pMga->MAccess); - OUTREG(MGAREG_PITCH, pLayout->displayWidth); - OUTREG(MGAREG_YDSTORG, pMga->YDstOrg); - OUTREG(MGAREG_PLNWT, pMga->PlaneMask); - OUTREG(MGAREG_BCOL, pMga->BgColor); - OUTREG(MGAREG_FCOL, pMga->FgColor); - OUTREG(MGAREG_SRCORG, pMga->SrcOrg); - OUTREG(MGAREG_DSTORG, pMga->DstOrg); - OUTREG(MGAREG_OPMODE, MGAOPM_DMA_BLIT); - OUTREG(MGAREG_CXBNDRY, 0xFFFF0000); /* (maxX << 16) | minX */ - OUTREG(MGAREG_YTOP, 0x00000000); /* minPixelPointer */ - OUTREG(MGAREG_YBOT, 0x007FFFFF); /* maxPixelPointer */ - pMga->AccelFlags &= ~CLIPPER_ON; -#endif + MGAPtr pMga = MGAPTR(pScrn); + + pMga->have_quiescense = 1; + + if (pMga->directRenderingEnabled) { + MGAFBLayout *pLayout = &pMga->CurrentLayout; + + MgaLockUpdate(pScrn, (DRM_LOCK_QUIESCENT | DRM_LOCK_FLUSH)); + + WAITFIFO(12); + OUTREG(MGAREG_MACCESS, pMga->MAccess); + OUTREG(MGAREG_PITCH, pLayout->displayWidth); + OUTREG(MGAREG_YDSTORG, pMga->YDstOrg); + OUTREG(MGAREG_PLNWT, pMga->PlaneMask); + OUTREG(MGAREG_BCOL, pMga->BgColor); + OUTREG(MGAREG_FCOL, pMga->FgColor); + OUTREG(MGAREG_SRCORG, pMga->SrcOrg); + OUTREG(MGAREG_DSTORG, pMga->DstOrg); + OUTREG(MGAREG_OPMODE, MGAOPM_DMA_BLIT); + OUTREG(MGAREG_CXBNDRY, 0xFFFF0000); /* (maxX << 16) | minX */ + OUTREG(MGAREG_YTOP, 0x00000000); /* minPixelPointer */ + OUTREG(MGAREG_YBOT, 0x007FFFFF); /* maxPixelPointer */ + pMga->AccelFlags &= ~CLIPPER_ON; + } } -void MGALostContext(ScreenPtr pScreen) + + +void MGASwapContext(ScreenPtr pScreen) { -#if 0 - ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; - MGAPtr pMga = MGAPTR(pScrn); - MGAFBLayout *pLayout = &pMga->CurrentLayout; - - ErrorF("Syncing : lost\n"); - MGAStormSync(pScrn); - ErrorF("Sync : lost 1\n"); - MGABUSYWAIT(); - ErrorF("Syncing done\n"); -#endif + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + MGAPtr pMga = MGAPTR(pScrn); + + /* Arrange for dma_quiescence and xaa sync to be called as + * appropriate. + */ + pMga->have_quiescense = 0; + pMga->AccelInfoRec->NeedToSync = TRUE; } + + +/* This is really only called from validate/postvalidate as we + * override the dri lock/unlock. Want to remove validate/postvalidate + * processing, but need to remove all client-side use of drawable lock + * first (otherwise there is noone recover when a client dies holding + * the drawable lock). + * + * What does this mean? + * + * - The above code gets executed every time a + * window changes shape or the focus changes, which isn't really + * optimal. + * - The X server therefore believes it needs to do an XAA sync + * *and* a dma quiescense ioctl each time that happens. + * + * We don't wrap wakeuphandler any longer, so at least we can say that + * this doesn't happen *every time the mouse moves*... + */ static void MGADRISwapContext(ScreenPtr pScreen, DRISyncType syncType, DRIContextType oldContextType, void *oldContext, DRIContextType newContextType, void *newContext) { - if ((syncType == DRI_3D_SYNC) && (oldContextType == DRI_2D_CONTEXT) && - (newContextType == DRI_2D_CONTEXT)) { /* Entering from Wakeup */ - MGASwapContext(pScreen); - } - if ((syncType == DRI_2D_SYNC) && (oldContextType == DRI_NO_CONTEXT) && - (newContextType == DRI_2D_CONTEXT)) { /* Exiting from Block Handler */ - MGALostContext(pScreen); - } + if (syncType == DRI_3D_SYNC && + oldContextType == DRI_2D_CONTEXT && + newContextType == DRI_2D_CONTEXT) + { + MGASwapContext(pScreen); + } } -/* Needs to be written */ -void MGASelectBuffer(MGAPtr pMGA, int which) + +void +MGASelectBuffer(ScrnInfoPtr pScrn, int which) { + MGAPtr pMga = MGAPTR(pScrn); + MGADRIPtr pMGADRI = (MGADRIPtr)pMga->pDRIInfo->devPrivate; + + switch (which) { + case MGA_BACK: + OUTREG(MGAREG_DSTORG, pMGADRI->backOffset); + OUTREG(MGAREG_SRCORG, pMGADRI->backOffset); + break; + case MGA_DEPTH: + OUTREG(MGAREG_DSTORG, pMGADRI->depthOffset); + OUTREG(MGAREG_SRCORG, pMGADRI->depthOffset); + break; + default: + case MGA_FRONT: + OUTREG(MGAREG_DSTORG, pMGADRI->frontOffset); + OUTREG(MGAREG_SRCORG, pMGADRI->frontOffset); + break; + } } diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.h b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.h index 7196bc954..b8518ee89 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.h @@ -4,9 +4,11 @@ #define _MGA_DRI_ #include <xf86drm.h> -#include "mga_drm_public.h" +#include <xf86drmMga.h> -typedef struct _mga_dri_server_private { +#define MGA_MAX_DRAWABLES 256 + +typedef struct { int reserved_map_agpstart; int reserved_map_idx; int buffer_map_idx; @@ -17,6 +19,7 @@ typedef struct _mga_dri_server_private { int sgram; unsigned long agpMode; unsigned long agpHandle; + Bool agpAcquired; drmHandle agp_private; drmSize agpSizep; drmAddress agpBase; @@ -24,27 +27,115 @@ typedef struct _mga_dri_server_private { drmHandle regs; drmSize regsSize; drmAddress regsMap; - mgaWarpIndex WarpIndex[MGA_MAX_WARP_PIPES]; + drmMgaWarpIndex WarpIndex[MGA_MAX_WARP_PIPES]; drmBufMapPtr drmBufs; CARD8 *agp_map; -} MGADRIServerPrivate, *MGADRIServerPrivatePtr; +} MGADRIServerPrivateRec, *MGADRIServerPrivatePtr; typedef struct { - int deviceID; - int width; - int height; - int mem; - int cpp; - int stride; - int fbOffset; - int backOffset; - int depthOffset; - int textureOffset; - int textureSize; - drmHandle agp; - drmSize agpSize; + int chipset; + int width; + int height; + int mem; + int cpp; + unsigned int frontOffset; + unsigned int frontPitch; + + unsigned int backOffset; + unsigned int backPitch; + + unsigned int depthOffset; + unsigned int depthPitch; + + unsigned int textureOffset; + unsigned int textureSize; + int logTextureGranularity; + + /* Allow calculation of setup dma addresses. + */ + unsigned int agpBufferOffset; + + unsigned int agpTextureOffset; + unsigned int agpTextureSize; + int logAgpTextureGranularity; + + /* Redundant? + */ + unsigned int frontOrg; + unsigned int backOrg; + unsigned int depthOrg; + + unsigned int mAccess; + + drmHandle agp; + drmSize agpSize; } MGADRIRec, *MGADRIPtr; +/* WARNING: Do not change the SAREA structure without changing the kernel + * as well */ +typedef struct { + unsigned char next, prev; + unsigned char in_use; + unsigned int age; +} MGATexRegionRec, *MGATexRegionPtr; + +typedef struct { + /* The channel for communication of state information to the kernel + * on firing a vertex dma buffer. + */ + unsigned int ContextState[MGA_CTX_SETUP_SIZE]; + unsigned int ServerState[MGA_2D_SETUP_SIZE]; + unsigned int TexState[2][MGA_TEX_SETUP_SIZE]; + unsigned int WarpPipe; + unsigned int dirty; + + unsigned int nbox; + XF86DRIClipRectRec boxes[MGA_NR_SAREA_CLIPRECTS]; + + /* Information about the most recently used 3d drawable. The + * client fills in the req_* fields, the server fills in the + * exported_ fields and puts the cliprects into boxes, above. + * + * The client clears the exported_drawable field before + * clobbering the boxes data. + */ + unsigned int req_drawable; /* the X drawable id */ + unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */ + + unsigned int exported_drawable; + unsigned int exported_index; + unsigned int exported_stamp; + unsigned int exported_buffers; + unsigned int exported_nfront; + unsigned int exported_nback; + int exported_back_x, exported_front_x, exported_w; + int exported_back_y, exported_front_y, exported_h; + XF86DRIClipRectRec exported_boxes[MGA_NR_SAREA_CLIPRECTS]; + + /* Counters for aging textures and for client-side throttling. + */ + unsigned int last_enqueue; /* last time a buffer was enqueued */ + unsigned int last_dispatch; /* age of the most recently dispatched buffer */ + unsigned int last_quiescent; /* */ + + /* LRU lists for texture memory in agp space and on the card */ + + MGATexRegionRec texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1]; + unsigned int texAge[MGA_NR_TEX_HEAPS]; + /* Mechanism to validate card state. + */ + int ctxOwner; +} MGASAREARec, *MGASAREAPtr; + +typedef struct { + /* Nothing here yet */ + int dummy; +} MGAConfigPrivRec, *MGAConfigPrivPtr; + +typedef struct { + /* Nothing here yet */ + int dummy; +} MGADRIContextRec, *MGADRIContextPtr; #endif diff --git a/xc/programs/Xserver/hw/xfree86/drivers/r128/Imakefile b/xc/programs/Xserver/hw/xfree86/drivers/r128/Imakefile index e3f7178bf..8f0f33a35 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/r128/Imakefile +++ b/xc/programs/Xserver/hw/xfree86/drivers/r128/Imakefile @@ -6,9 +6,16 @@ XCOMM #define IHaveModules #include <Server.tmpl> -SRCS = r128_driver.c r128_cursor.c r128_accel.c # r128_i2c.c +#if BuildXF86DRI +DRISRCS = r128_dri.c +DRIOBJS = r128_dri.o +DRIINCLUDES = -I$(SERVERSRC)/GL/dri -I$(LIBSRC)/GL/dri +DRIDEFINES = $(GLX_DEFINES) +#endif + +SRCS = r128_driver.c r128_cursor.c r128_accel.c $(DRISRCS) # r128_i2c.c -OBJS = r128_driver.o r128_cursor.o r128_accel.o # r128_i2c.o +OBJS = r128_driver.o r128_cursor.o r128_accel.o $(DRIOBJS) # r128_i2c.o #if defined(XF86DriverSDK) INCLUDES = -I. -I../../include @@ -22,9 +29,12 @@ INCLUDES = -I. -I$(XF86COMSRC) -I$(XF86OSSRC) \ -I$(XF86SRC)/ddc -I$(XF86SRC)/i2c -I$(XF86OSSRC)/vbe \ -I$(XF86SRC)/int10 -I$(SERVERSRC)/Xext \ -I$(FONTINCSRC) -I$(SERVERSRC)/include -I$(XINCLUDESRC) \ - -I$(EXTINCSRC) -I$(XF86SRC)/xf24_32bpp + -I$(EXTINCSRC) -I$(XF86SRC)/xf24_32bpp \ + $(DRIINCLUDES) #endif +DEFINES = $(DRIDEFINES) + #if MakeHasPosixVariableSubstitutions SubdirLibraryRule($(OBJS)) #endif @@ -49,5 +59,10 @@ InstallDriverSDKNonExecFile(r128_cursor.c,$(DRIVERSDKDIR)/drivers/r128) InstallDriverSDKNonExecFile(r128_driver.c,$(DRIVERSDKDIR)/drivers/r128) InstallDriverSDKNonExecFile(r128_reg.h,$(DRIVERSDKDIR)/drivers/r128) +InstallDriverSDKNonExecFile(r128_dri.c,$(DRIVERSDKDIR)/drivers/r128) +InstallDriverSDKNonExecFile(r128_dri.h,$(DRIVERSDKDIR)/drivers/r128) +InstallDriverSDKNonExecFile(r128_dripriv.h,$(DRIVERSDKDIR)/drivers/r128) +InstallDriverSDKNonExecFile(r128_sarea.h,$(DRIVERSDKDIR)/drivers/r128) + InstallDriverSDKObjectModule(r128,$(DRIVERSDKMODULEDIR),drivers) diff --git a/xc/programs/Xserver/hw/xfree86/drivers/r128/r128.h b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128.h index d5d120153..acb04f96e 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/r128/r128.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128.h @@ -1,8 +1,8 @@ /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/r128/r128.h,v 1.8 2000/02/23 04:47:18 martin Exp $ */ /************************************************************************** -Copyright 1999 ATI Technologies Inc. and Precision Insight, Inc., - Cedar Park, Texas. +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a @@ -40,6 +40,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. #define R128_TIMEOUT 2000000 /* Fall out of wait loops after this count */ #define R128_MMIOSIZE 0x80000 + /* R128_NAME is used for the server-side + ddx driver, the client-side DRI driver, + and the kernel-level DRM driver. */ #define R128_NAME "r128" #define R128_VERSION_MAJOR 3 #define R128_VERSION_MINOR 0 @@ -157,7 +160,7 @@ typedef struct { unsigned char *FB; /* Map of frame buffer */ CARD32 MemCntl; - CARD32 BusCntl; + CARD32 BusCntl; unsigned long FbMapSize; /* Size of frame buffer, in bytes */ int Flags; /* Saved copy of mode flags */ @@ -168,6 +171,8 @@ typedef struct { R128SaveRec ModeReg; /* Current mode */ Bool (*CloseScreen)(int, ScreenPtr); + Bool PaletteSavedOnVT; /* Palette saved on last VT switch */ + I2CBusPtr i2c; XAAInfoRecPtr accel; xf86CursorInfoPtr cursor; @@ -199,8 +204,98 @@ typedef struct { int scanline_words; int scanline_direct; int scanline_bpp; /* Only used for ImageWrite */ + +#ifdef XF86DRI + Bool directRenderingEnabled; + DRIInfoPtr pDRIInfo; + int drmFD; + int numVisualConfigs; + __GLXvisualConfig *pVisualConfigs; + R128ConfigPrivPtr pVisualConfigsPriv; + + drmHandle fbHandle; + + drmSize registerSize; + drmHandle registerHandle; + + Bool IsPCI; /* Current card is a PCI card */ + + drmSize agpSize; + drmHandle agpMemHandle; /* Handle from drmAgpAlloc */ + unsigned long agpOffset; + unsigned char *AGP; /* Map */ + int agpMode; + + Bool CCEInUse; /* CCE is currently active */ + int CCEMode; /* CCE mode that server/clients use */ + int CCEFifoSize; /* Size of the CCE command FIFO */ + Bool CCESecure; /* CCE security enabled */ + int CCEusecTimeout; /* CCE timeout in usecs */ + Bool CCE2D; /* CCE is used for X server 2D prims */ + + /* CCE ring buffer data */ + unsigned long ringStart; /* Offset into AGP space */ + drmHandle ringHandle; /* Handle from drmAddMap */ + drmSize ringMapSize; /* Size of map */ + int ringSize; /* Size of ring (in MB) */ + unsigned char *ring; /* Map */ + int ringSizeLog2QW; + + unsigned long ringReadOffset; /* Offset into AGP space */ + drmHandle ringReadPtrHandle; /* Handle from drmAddMap */ + drmSize ringReadMapSize; /* Size of map */ + unsigned char *ringReadPtr; /* Map */ + + /* CCE vertex buffer data */ + unsigned long vbStart; /* Offset into AGP space */ + drmHandle vbHandle; /* Handle from drmAddMap */ + drmSize vbMapSize; /* Size of map */ + int vbSize; /* Size of vert bufs (in MB) */ + unsigned char *vb; /* Map */ + int vbBufSize; /* Size of individual vert buf */ + int vbNumBufs; /* Number of vert bufs */ + drmBufMapPtr vbBufs; /* Buffer map */ + + /* CCE indirect buffer data */ + unsigned long indStart; /* Offset into AGP space */ + drmHandle indHandle; /* Handle from drmAddMap */ + drmSize indMapSize; /* Size of map */ + int indSize; /* Size of indirect bufs (in MB) */ + unsigned char *ind; /* Map */ + + /* CCE AGP Texture data */ + unsigned long agpTexStart; /* Offset into AGP space */ + drmHandle agpTexHandle; /* Handle from drmAddMap */ + drmSize agpTexMapSize; /* Size of map */ + int agpTexSize; /* Size of AGP tex space (in MB) */ + unsigned char *agpTex; /* Map */ + int log2AGPTexGran; + + /* DRI screen private data */ + int fbX; + int fbY; + int backX; + int backY; + int depthX; + int depthY; + int textureX; + int textureY; + int textureSize; + int log2TexGran; +#endif } R128InfoRec, *R128InfoPtr; +#define R128WaitForFifo(pScrn, entries) \ +do { \ + if (info->fifo_slots < entries) R128WaitForFifoFunction(pScrn, entries); \ + info->fifo_slots -= entries; \ +} while (0) + +extern void R128WaitForFifoFunction(ScrnInfoPtr pScrn, int entries); +extern void R128WaitForIdle(ScrnInfoPtr pScrn); +extern void R128EngineReset(ScrnInfoPtr pScrn); +extern void R128EngineFlush(ScrnInfoPtr pScrn); + extern int INPLL(ScrnInfoPtr pScrn, int addr); extern void R128WaitForVerticalSync(ScrnInfoPtr pScrn); @@ -208,4 +303,16 @@ extern Bool R128AccelInit(ScreenPtr pScreen); extern void R128EngineInit(ScrnInfoPtr pScrn); extern Bool R128CursorInit(ScreenPtr pScreen); +extern int R128MinBits(int val); + +#ifdef XF86DRI +extern Bool R128DRIScreenInit(ScreenPtr pScreen); +extern void R128DRICloseScreen(ScreenPtr pScreen); +extern Bool R128DRIFinishScreenInit(ScreenPtr pScreen); +extern void R128CCEStart(ScrnInfoPtr pScrn); +extern void R128CCEStop(ScrnInfoPtr pScrn); +extern void R128CCEResetRing(ScrnInfoPtr pScrn); +extern void R128CCEWaitForIdle(ScrnInfoPtr pScrn); +#endif + #endif diff --git a/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_accel.c index 5b0223661..f42569767 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_accel.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_accel.c @@ -1,8 +1,8 @@ /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/r128/r128_accel.c,v 1.7 2000/02/23 04:47:18 martin Exp $ */ /************************************************************************** -Copyright 1999 ATI Technologies Inc. and Precision Insight, Inc., - Cedar Park, Texas. +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a @@ -95,6 +95,19 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. /* DDC support */ #include "xf86DDC.h" + /* DRI support */ +#ifdef XF86DRI +#include "GL/glxint.h" +#include "xf86drm.h" +#include "sarea.h" +#define _XF86DRI_SERVER_ +#include "xf86dri.h" +#include "dri.h" +#include "r128_dri.h" +#include "r128_dripriv.h" +#include "r128_sarea.h" +#endif + /* Driver data structures */ #include "r128.h" #include "r128_reg.h" @@ -122,7 +135,7 @@ static struct { }; /* Flush all dirty data in the Pixel Cache to memory. */ -static void R128EngineFlush(ScrnInfoPtr pScrn) +void R128EngineFlush(ScrnInfoPtr pScrn) { int i; R128MMIO_VARS(); @@ -134,11 +147,12 @@ static void R128EngineFlush(ScrnInfoPtr pScrn) } /* Reset graphics card to known state. */ -static void R128EngineReset(ScrnInfoPtr pScrn) +void R128EngineReset(ScrnInfoPtr pScrn) { - CARD32 clock_cntl_index; - CARD32 mclk_cntl; - CARD32 gen_reset_cntl; + R128InfoPtr info = R128PTR(pScrn); + CARD32 clock_cntl_index; + CARD32 mclk_cntl; + CARD32 gen_reset_cntl; R128MMIO_VARS(); R128EngineFlush(pScrn); @@ -158,17 +172,15 @@ static void R128EngineReset(ScrnInfoPtr pScrn) OUTPLL(R128_MCLK_CNTL, mclk_cntl); OUTREG(R128_CLOCK_CNTL_INDEX, clock_cntl_index); OUTREG(R128_GEN_RESET_CNTL, gen_reset_cntl); -} -#define R128WaitForFifo(pScrn, entries) \ -do { \ - if (info->fifo_slots < entries) R128WaitForFifoFunction(pScrn, entries); \ - info->fifo_slots -= entries; \ -} while (0) +#ifdef XF86DRI + if (R128CCE_USE_RING_BUFFER(info->CCEMode)) R128CCEResetRing(pScrn); +#endif +} /* The FIFO has 64 slots. This routines waits until at least `entries' of these slots are empty. */ -static void R128WaitForFifoFunction(ScrnInfoPtr pScrn, int entries) +void R128WaitForFifoFunction(ScrnInfoPtr pScrn, int entries) { R128InfoPtr info = R128PTR(pScrn); int i; @@ -186,15 +198,19 @@ static void R128WaitForFifoFunction(ScrnInfoPtr pScrn, int entries) xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "FIFO timed out, resetting engine...\n"); R128EngineReset(pScrn); +#if XF86DRI + if (info->CCE2D) R128CCEStart(pScrn); +#endif } } /* Wait for the graphics engine to be completely idle: the FIFO has drained, the Pixel Cache is flushed, and the engine is idle. This is a standard "sync" function that will make the hardware "quiescent". */ -static void R128WaitForIdle(ScrnInfoPtr pScrn) +void R128WaitForIdle(ScrnInfoPtr pScrn) { - int i; + R128InfoPtr info = R128PTR(pScrn); + int i; R128MMIO_VARS(); R128WaitForFifoFunction(pScrn, 64); @@ -213,6 +229,9 @@ static void R128WaitForIdle(ScrnInfoPtr pScrn) xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Idle timed out, resetting engine...\n"); R128EngineReset(pScrn); +#if XF86DRI + if (info->CCE2D) R128CCEStart(pScrn); +#endif } } @@ -966,19 +985,33 @@ void R128EngineInit(ScrnInfoPtr pScrn) OUTREG(R128_DP_SRC_BKGD_CLR, 0x00000000); OUTREG(R128_DP_WRITE_MASK, 0xffffffff); +#if X_BYTE_ORDER == X_BIG_ENDIAN + OUTREGP(R128_DP_DATATYPE, + R128_HOST_BIG_ENDIAN_EN, ~R128_HOST_BIG_ENDIAN_EN); +#else + OUTREGP(R128_DP_DATATYPE, 0, ~R128_HOST_BIG_ENDIAN_EN); +#endif + R128WaitForIdle(pScrn); } -/* Initialize XAA for supported acceleration and also initialize the - graphics hardware for acceleration. */ -Bool R128AccelInit(ScreenPtr pScreen) +#ifdef XF86DRI + /* FIXME: When direct rendering is enabled, we should use the CCE to + draw 2D commands */ +static void R128CCEAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a) { - ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; - R128InfoPtr info = R128PTR(pScrn); - XAAInfoRecPtr a; + a->Flags = 0; + + /* Sync */ + a->Sync = R128CCEWaitForIdle; + +} +#endif + +static void R128MMIOAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a) +{ + R128InfoPtr info = R128PTR(pScrn); - if (!(a = info->accel = XAACreateInfoRec())) return FALSE; - a->Flags = (PIXMAP_CACHE | OFFSCREEN_PIXMAPS | LINEAR_FRAMEBUFFER); @@ -1065,7 +1098,26 @@ Bool R128AccelInit(ScreenPtr pScreen) | SCANLINE_PAD_DWORD | SYNC_AFTER_IMAGE_WRITE); #endif - +} + +/* Initialize XAA for supported acceleration and also initialize the + graphics hardware for acceleration. */ +Bool R128AccelInit(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + R128InfoPtr info = R128PTR(pScrn); + XAAInfoRecPtr a; + + if (!(a = info->accel = XAACreateInfoRec())) return FALSE; + +#ifdef XF86DRI + /* FIXME: When direct rendering is enabled, we should use the CCE to + draw 2D commands */ + if (info->CCE2D) R128CCEAccelInit(pScrn, a); + else +#endif + R128MMIOAccelInit(pScrn, a); + R128EngineInit(pScrn); return XAAInit(pScreen, a); } diff --git a/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_cursor.c b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_cursor.c index a96872702..2667443d9 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_cursor.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_cursor.c @@ -1,8 +1,8 @@ /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/r128/r128_cursor.c,v 1.6 2000/03/06 22:59:26 dawes Exp $ */ /************************************************************************** -Copyright 1999 ATI Technologies Inc. and Precision Insight, Inc., - Cedar Park, Texas. +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a @@ -60,6 +60,19 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. /* DDC support */ #include "xf86DDC.h" + /* DRI support */ +#ifdef XF86DRI +#include "GL/glxint.h" +#include "xf86drm.h" +#include "sarea.h" +#define _XF86DRI_SERVER_ +#include "xf86dri.h" +#include "dri.h" +#include "r128_dri.h" +#include "r128_dripriv.h" +#include "r128_sarea.h" +#endif + /* Driver data structures */ #include "r128.h" #include "r128_reg.h" @@ -92,16 +105,19 @@ static void R128SetCursorColors(ScrnInfoPtr pScrn, int bg, int fg) (xorigin,yorigin). */ static void R128SetCursorPosition(ScrnInfoPtr pScrn, int x, int y) { - R128InfoPtr info = R128PTR(pScrn); - int xorigin = 0; - int yorigin = 0; - int total_y = pScrn->frameY1 - pScrn->frameY0; + R128InfoPtr info = R128PTR(pScrn); + xf86CursorInfoPtr cursor = info->cursor; + int xorigin = 0; + int yorigin = 0; + int total_y = pScrn->frameY1 - pScrn->frameY0; R128MMIO_VARS(); - if (x < 0) xorigin = -x; - if (y < 0) yorigin = -y; - if (y > total_y) y = total_y; - if (info->Flags & V_DBLSCAN) y *= 2; + if (x < 0) xorigin = -x; + if (y < 0) yorigin = -y; + if (y > total_y) y = total_y; + if (info->Flags & V_DBLSCAN) y *= 2; + if (xorigin >= cursor->MaxWidth) xorigin = cursor->MaxWidth - 1; + if (yorigin >= cursor->MaxHeight) yorigin = cursor->MaxHeight - 1; OUTREG(R128_CUR_HORZ_VERT_OFF, R128_CUR_LOCK | (xorigin << 16) | yorigin); OUTREG(R128_CUR_HORZ_VERT_POSN, (R128_CUR_LOCK @@ -126,47 +142,58 @@ static void R128LoadCursorImage(ScrnInfoPtr pScrn, unsigned char *image) #if X_BYTE_ORDER == X_BIG_ENDIAN switch(info->pixel_bytes) { - case 4: - case 3: - for (y = 0; y < 64; y++) { - P_SWAP32(d,s); - d++; s++; - P_SWAP32(d,s); - d++; s++; - P_SWAP32(d,s); - d++; s++; - P_SWAP32(d,s); - d++; s++; - } - break; - case 2: - for (y = 0; y < 64; y++) { - P_SWAP16(d,s); - d++; s++; - P_SWAP16(d,s); - d++; s++; - P_SWAP16(d,s); - d++; s++; - P_SWAP16(d,s); - d++; s++; - } - break; - default: - for (y = 0; y < 64; y++) { + case 4: + case 3: + for (y = 0; y < 64; y++) { + P_SWAP32(d,s); + d++; s++; + P_SWAP32(d,s); + d++; s++; + P_SWAP32(d,s); + d++; s++; + P_SWAP32(d,s); + d++; s++; + } + break; + case 2: + for (y = 0; y < 64; y++) { + P_SWAP16(d,s); + d++; s++; + P_SWAP16(d,s); + d++; s++; + P_SWAP16(d,s); + d++; s++; + P_SWAP16(d,s); + d++; s++; + } + break; + default: + for (y = 0; y < 64; y++) { *d++ = *s++; *d++ = *s++; *d++ = *s++; *d++ = *s++; - } + } } #else - for (y = 0; y < 64; y++) { + for (y = 0; y < 64; y++) { *d++ = *s++; *d++ = *s++; *d++ = *s++; *d++ = *s++; } #endif + + /* Set the area after the cursor to be all transparent so that we + won't display corrupted cursors on the screen */ + for (y = 0; y < 64; y++) { + *d++ = 0xffffffff; /* The AND bits */ + *d++ = 0xffffffff; + *d++ = 0x00000000; /* The XOR bits */ + *d++ = 0x00000000; + } + + OUTREG(R128_CRTC_GEN_CNTL, save); } @@ -204,6 +231,7 @@ Bool R128CursorInit(ScreenPtr pScreen) FBAreaPtr fbarea; int width; int height; + int size; if (!(cursor = info->cursor = xf86CreateCursorInfoRec())) return FALSE; @@ -227,8 +255,9 @@ Bool R128CursorInit(ScreenPtr pScreen) cursor->ShowCursor = R128ShowCursor; cursor->UseHWCursor = R128UseHWCursor; + size = (cursor->MaxWidth/4) * cursor->MaxHeight; width = pScrn->displayWidth; - height = (1024 + 1023) / pScrn->displayWidth; + height = (size*2 + 1023) / pScrn->displayWidth; fbarea = xf86AllocateOffscreenArea(pScreen, width, height, @@ -246,7 +275,7 @@ Bool R128CursorInit(ScreenPtr pScreen) info->cursor_start = R128_ALIGN((fbarea->box.x1 + width * fbarea->box.y1) * info->pixel_bytes, 16); - info->cursor_end = info->cursor_start + 1024; + info->cursor_end = info->cursor_start + size; } R128TRACE(("R128CursorInit (0x%08x-0x%08x)\n", diff --git a/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_dri.c new file mode 100644 index 000000000..cb647d6b6 --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_dri.c @@ -0,0 +1,1242 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * Rickard E. Faith <faith@precisioninsight.com> + * Daryll Strauss <daryll@precisioninsight.com> + * + */ + + + /* X and server generic header files */ +#include "xf86.h" +#include "xf86_ansic.h" +#include "xf86_OSproc.h" +#include "xf86Resources.h" +#include "xf86RAC.h" +#include "xf86cmap.h" +#include "xf86fbman.h" + + /* Backing store, software cursor, and + colormap initialization */ +#include "mibstore.h" +#include "mipointer.h" +#include "micmap.h" + + /* CFB support */ +#define PSZ 8 +#include "cfb.h" +#undef PSZ +#include "cfb16.h" +#include "cfb24.h" +#include "cfb32.h" +#include "cfb24_32.h" + + /* XAA and Cursor Support */ +#include "xaa.h" +#include "xf86Cursor.h" + + /* PCI support */ +#include "xf86PciInfo.h" +#include "xf86Pci.h" + + /* DDC support */ +#include "xf86DDC.h" + + /* DRI support */ +#include "GL/glxint.h" +#include "GL/glxtokens.h" +#include "xf86drm.h" +#include "xf86drmR128.h" +#include "sarea.h" +#define _XF86DRI_SERVER_ +#include "xf86dri.h" +#include "dri.h" +#include "r128_dri.h" +#include "r128_sarea.h" +#include "r128_dripriv.h" + + /* Driver data structures */ +#include "r128.h" +#include "r128_reg.h" + +#define R128_WATERMARK_L 16 +#define R128_WATERMARK_M 8 +#define R128_WATERMARK_N 8 +#define R128_WATERMARK_K 128 + +static int CCEFifoSlots = 0; + +#define R128CCEWaitForFifo(pScrn, entries) \ +do { \ + if (CCEFifoSlots < entries) R128WaitForFifoFunction(pScrn, entries); \ + CCEFifoSlots -= entries; \ +} while (0) + +/* Wait for at least `entries' slots are free. The actual number of + slots available is stored in info->CCEFifoSize. */ +static void R128CCEWaitForFifoFunction(ScrnInfoPtr pScrn, int entries) +{ + R128InfoPtr info = R128PTR(pScrn); + unsigned char *R128MMIO = info->MMIO; + int i; + + for (;;) { + for (i = 0; i < R128_TIMEOUT; i++) { + CCEFifoSlots = INREG(R128_PM4_STAT) & R128_PM4_FIFOCNT_MASK; + if (CCEFifoSlots >= entries) return; + } + R128EngineReset(pScrn); + if (info->CCE2D) R128CCEStart(pScrn); + } +} + +/* Wait until the CCE is completely idle: the FIFO has drained and the + CCE is idle. */ +void R128CCEWaitForIdle(ScrnInfoPtr pScrn) +{ + R128InfoPtr info = R128PTR(pScrn); + unsigned char *R128MMIO = info->MMIO; + int i; + + if (!info->CCEInUse || info->CCEMode == R128_PM4_NONPM4) return; + + if (R128CCE_USE_RING_BUFFER(info->CCEMode)) { + volatile CARD32 *r128RingReadPtr = + (volatile CARD32 *)(info->ringReadPtr); + R128SAREAPrivPtr pSAREAPriv; + + OUTREGP(R128_PM4_BUFFER_DL_WPTR, + R128_PM4_BUFFER_DL_DONE, ~R128_PM4_BUFFER_DL_DONE); + + pSAREAPriv = (R128SAREAPrivPtr)DRIGetSAREAPrivate(pScrn->pScreen); + + for (;;) { + for (i = 0; i < R128_TIMEOUT; i++) { + if (*r128RingReadPtr == pSAREAPriv->ringWrite) { + int pm4stat = INREG(R128_PM4_STAT); + if ((pm4stat & R128_PM4_FIFOCNT_MASK) >= info->CCEFifoSize + && !(pm4stat & (R128_PM4_BUSY | R128_PM4_GUI_ACTIVE))) + return; + } + } + R128EngineReset(pScrn); + if (info->CCE2D) R128CCEStart(pScrn); + } + } else { + R128CCEWaitForFifoFunction(pScrn, info->CCEFifoSize); + + for (;;) { + for (i = 0; i < R128_TIMEOUT; i++) { + if (!(INREG(R128_PM4_STAT) + & (R128_PM4_BUSY | R128_PM4_GUI_ACTIVE))) { + R128EngineFlush(pScrn); + return; + } + } + R128EngineReset(pScrn); + if (info->CCE2D) R128CCEStart(pScrn); + } + } +} + +/* Reset the ring buffer status, if the engine was reset */ +void R128CCEResetRing(ScrnInfoPtr pScrn) +{ + R128InfoPtr info = R128PTR(pScrn); + unsigned char *R128MMIO = info->MMIO; + R128SAREAPrivPtr pSAREAPriv; + volatile CARD32 *r128RingReadPtr; + + if (!info->CCEInUse || info->CCEMode == R128_PM4_NONPM4) return; + + r128RingReadPtr = (volatile CARD32 *)(info->ringReadPtr); + pSAREAPriv = (R128SAREAPrivPtr)DRIGetSAREAPrivate(pScrn->pScreen); + + OUTREG(R128_PM4_BUFFER_DL_WPTR, 0); + OUTREG(R128_PM4_BUFFER_DL_RPTR, 0); + pSAREAPriv->ringWrite = 0; + *r128RingReadPtr = 0; + + /* Resetting the ring turns off the CCE */ + info->CCEInUse = FALSE; +} + +/* Start the CCE, but only if it is not already in use and the requested + mode is a CCE mode. The mode is stored in info->CCEMode. */ +void R128CCEStart(ScrnInfoPtr pScrn) +{ + R128InfoPtr info = R128PTR(pScrn); + unsigned char *R128MMIO = info->MMIO; + + if (info->CCEInUse || info->CCEMode == R128_PM4_NONPM4) return; + + R128WaitForIdle(pScrn); + OUTREG(R128_PM4_BUFFER_CNTL, info->CCEMode | info->ringSizeLog2QW); + (void)INREG(R128_PM4_BUFFER_ADDR); /* as per the sample code */ + OUTREG(R128_PM4_MICRO_CNTL, R128_PM4_MICRO_FREERUN); + info->CCEInUse = TRUE; +} + +/* Stop the CCE, but only if it is in use and the requested mode is not + the non-CCE mode. This function also flushes any outstanding + requests before switching modes.*/ +void R128CCEStop(ScrnInfoPtr pScrn) +{ + R128InfoPtr info = R128PTR(pScrn); + unsigned char *R128MMIO = info->MMIO; + + if (!info->CCEInUse || info->CCEMode == R128_PM4_NONPM4) return; + + R128CCEWaitForIdle(pScrn); + OUTREG(R128_PM4_MICRO_CNTL, 0); + OUTREG(R128_PM4_BUFFER_CNTL, R128_PM4_NONPM4); + R128EngineReset(pScrn); + info->CCEInUse = FALSE; +} + +/* Initialize the visual configs that are supported by the hardware. + These are combined with the visual configs that the indirect + rendering core supports, and the intersection is exported to the + client. */ +static Bool R128InitVisualConfigs(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + R128InfoPtr pR128 = R128PTR(pScrn); + int numConfigs = 0; + __GLXvisualConfig *pConfigs = 0; + R128ConfigPrivPtr pR128Configs = 0; + R128ConfigPrivPtr *pR128ConfigPtrs = 0; + int i, accum, stencil; + + switch (pR128->pixel_code) { + case 8: /* 8bpp mode is not support */ + case 15: /* FIXME */ + case 24: /* FIXME */ + return FALSE; + +#define R128_USE_ACCUM 1 +#define R128_USE_STENCIL 0 /* Only in 24 depth mode */ + + case 16: + numConfigs = 1; + if (R128_USE_ACCUM) numConfigs *= 2; + + if (!(pConfigs + = (__GLXvisualConfig*)xnfcalloc(sizeof(__GLXvisualConfig), + numConfigs))) { + return FALSE; + } + if (!(pR128Configs + = (R128ConfigPrivPtr)xnfcalloc(sizeof(R128ConfigPrivRec), + numConfigs))) { + xfree(pConfigs); + return FALSE; + } + if (!(pR128ConfigPtrs + = (R128ConfigPrivPtr*)xnfcalloc(sizeof(R128ConfigPrivPtr), + numConfigs))) { + xfree(pConfigs); + xfree(pR128Configs); + return FALSE; + } + + i = 0; + for (accum = 0; accum <= R128_USE_ACCUM; accum++) { + pR128ConfigPtrs[i] = &pR128Configs[i]; + + pConfigs[i].vid = -1; + pConfigs[i].class = -1; + pConfigs[i].rgba = TRUE; + pConfigs[i].redSize = 5; + pConfigs[i].greenSize = 6; + pConfigs[i].blueSize = 5; + pConfigs[i].redMask = 0x0000F800; + pConfigs[i].greenMask = 0x000007E0; + pConfigs[i].blueMask = 0x0000001F; + + pConfigs[i].alphaMask = 0; + if (accum) { /* Simulated in software */ + pConfigs[i].accumRedSize = 16; + pConfigs[i].accumGreenSize = 16; + pConfigs[i].accumBlueSize = 16; + pConfigs[i].accumAlphaSize = 0; + } else { + pConfigs[i].accumRedSize = 0; + pConfigs[i].accumGreenSize = 0; + pConfigs[i].accumBlueSize = 0; + pConfigs[i].accumAlphaSize = 0; + } + pConfigs[i].doubleBuffer = TRUE; + pConfigs[i].stereo = FALSE; + pConfigs[i].bufferSize = 16; + pConfigs[i].depthSize = 16; + pConfigs[i].stencilSize = 0; + pConfigs[i].auxBuffers = 0; + pConfigs[i].level = 0; + if (accum) + pConfigs[i].visualRating = GLX_SLOW_VISUAL_EXT; + else + pConfigs[i].visualRating = GLX_NONE_EXT; + pConfigs[i].transparentPixel = 0; + pConfigs[i].transparentRed = 0; + pConfigs[i].transparentGreen = 0; + pConfigs[i].transparentBlue = 0; + pConfigs[i].transparentAlpha = 0; + pConfigs[i].transparentIndex = 0; + i++; + } + break; + case 32: + numConfigs = 1; + if (R128_USE_ACCUM) numConfigs *= 2; + if (R128_USE_STENCIL) numConfigs *= 2; + + if (!(pConfigs + = (__GLXvisualConfig*)xnfcalloc(sizeof(__GLXvisualConfig), + numConfigs))) { + return FALSE; + } + if (!(pR128Configs + = (R128ConfigPrivPtr)xnfcalloc(sizeof(R128ConfigPrivRec), + numConfigs))) { + xfree(pConfigs); + return FALSE; + } + if (!(pR128ConfigPtrs + = (R128ConfigPrivPtr*)xnfcalloc(sizeof(R128ConfigPrivPtr), + numConfigs))) { + xfree(pConfigs); + xfree(pR128Configs); + return FALSE; + } + + i = 0; + for (accum = 0; accum <= R128_USE_ACCUM; accum++) { + for (stencil = 0; stencil <= R128_USE_STENCIL; stencil++) { + pR128ConfigPtrs[i] = &pR128Configs[i]; + + pConfigs[i].vid = -1; + pConfigs[i].class = -1; + pConfigs[i].rgba = TRUE; + pConfigs[i].redSize = 8; + pConfigs[i].greenSize = 8; + pConfigs[i].blueSize = 8; + pConfigs[i].redMask = 0x00FF0000; + pConfigs[i].greenMask = 0x0000FF00; + pConfigs[i].blueMask = 0x000000FF; + + pConfigs[i].alphaMask = 0; + if (accum) { /* Simulated in software */ + pConfigs[i].accumRedSize = 16; + pConfigs[i].accumGreenSize = 16; + pConfigs[i].accumBlueSize = 16; + pConfigs[i].accumAlphaSize = 0; + } else { + pConfigs[i].accumRedSize = 0; + pConfigs[i].accumGreenSize = 0; + pConfigs[i].accumBlueSize = 0; + pConfigs[i].accumAlphaSize = 0; + } + pConfigs[i].doubleBuffer = TRUE; + pConfigs[i].stereo = FALSE; + pConfigs[i].bufferSize = 24; + if (stencil) { + pConfigs[i].depthSize = 24; + pConfigs[i].stencilSize = 8; + } else { + pConfigs[i].depthSize = 32; + pConfigs[i].stencilSize = 0; + } + pConfigs[i].auxBuffers = 0; + pConfigs[i].level = 0; + if (accum) + pConfigs[i].visualRating = GLX_SLOW_VISUAL_EXT; + else + pConfigs[i].visualRating = GLX_NONE_EXT; + pConfigs[i].transparentPixel = 0; + pConfigs[i].transparentRed = 0; + pConfigs[i].transparentGreen = 0; + pConfigs[i].transparentBlue = 0; + pConfigs[i].transparentAlpha = 0; + pConfigs[i].transparentIndex = 0; + i++; + } + } + break; + } + + pR128->numVisualConfigs = numConfigs; + pR128->pVisualConfigs = pConfigs; + pR128->pVisualConfigsPriv = pR128Configs; + GlxSetVisualConfigs(numConfigs, pConfigs, (void**)pR128ConfigPtrs); + return TRUE; +} + +/* Create the Rage 128-specific context information */ +static Bool R128CreateContext(ScreenPtr pScreen, VisualPtr visual, + drmContext hwContext, void *pVisualConfigPriv, + DRIContextType contextStore) +{ + /* Nothing yet */ + return TRUE; +} + +/* Destroy the Rage 128-specific context information */ +static void R128DestroyContext(ScreenPtr pScreen, drmContext hwContext, + DRIContextType contextStore) +{ + /* Nothing yet */ +} + +/* Called when the X server is woken up to allow the last client's + context to be saved and the X server's context to be loaded. This is + not necessary for the Rage 128 since the client detects when it's + context is not currently loaded and then load's it itself. Since the + registers to start and stop the CCE are privileged, only the X server + can start/stop the engine. */ +static void R128EnterServer(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + R128InfoPtr pR128 = R128PTR(pScrn); + + if (pR128->accel) pR128->accel->NeedToSync = TRUE; + +#if 1 + if (!pR128->CCE2D) R128CCEStop(pScrn); +#else + if (pR128->CCE2D) R128CCEWaitForIdle(pScrn); + else R128CCEStop(pScrn); +#endif +} + +/* Called when the X server goes to sleep to allow the X server's + context to be saved and the last client's context to be loaded. This + is not necessary for the Rage 128 since the client detects when it's + context is not currently loaded and then load's it itself. Since the + registers to start and stop the CCE are privileged, only the X server + can start/stop the engine. */ +static void R128LeaveServer(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + R128InfoPtr pR128 = R128PTR(pScrn); + +#if 1 + if (!pR128->CCE2D) R128CCEStart(pScrn); +#else + if (pR128->CCE2D) R128CCEWaitForIdle(pScrn); + else R128CCEStart(pScrn); +#endif +} + +/* Contexts can be swapped by the X server if necessary. This callback + is currently only used to perform any functions necessary when + entering or leaving the X server, and in the future might not be + necessary. */ +static void R128DRISwapContext(ScreenPtr pScreen, DRISyncType syncType, + DRIContextType oldContextType, void *oldContext, + DRIContextType newContextType, void *newContext) +{ + if ((syncType==DRI_3D_SYNC) && (oldContextType==DRI_2D_CONTEXT) && + (newContextType==DRI_2D_CONTEXT)) { /* Entering from Wakeup */ + R128EnterServer(pScreen); + } + if ((syncType==DRI_2D_SYNC) && (oldContextType==DRI_NO_CONTEXT) && + (newContextType==DRI_2D_CONTEXT)) { /* Exiting from Block Handler */ + R128LeaveServer(pScreen); + } +} + +/* Initialize the state of the back and depth buffers. */ +static void R128DRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 index) +{ + /* FIXME: This routine needs to have acceleration turned on */ + ScreenPtr pScreen = pWin->drawable.pScreen; + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + R128InfoPtr pR128 = R128PTR(pScrn); + BoxPtr pbox; + int nbox; + int depth; + + /* FIXME: Use accel when CCE 2D code is written */ + if (pR128->CCE2D) return; + + /* FIXME: This should be based on the __GLXvisualConfig info */ + switch (pScrn->bitsPerPixel) { + case 8: depth = 0x000000ff; break; + case 16: depth = 0x0000ffff; break; + case 24: depth = 0x00ffffff; break; + case 32: depth = 0xffffffff; break; + default: depth = 0x00000000; break; + } + + /* FIXME: Copy XAAPaintWindow() and use REGION_TRANSLATE() */ + /* FIXME: Only initialize the back and depth buffers for contexts + that request them */ + + pbox = REGION_RECTS(prgn); + nbox = REGION_NUM_RECTS(prgn); + + (*pR128->accel->SetupForSolidFill)(pScrn, 0, GXcopy, -1); + for (; nbox; nbox--, pbox++) { + (*pR128->accel->SubsequentSolidFillRect)(pScrn, + pbox->x1 + pR128->fbX, + pbox->y1 + pR128->fbY, + pbox->x2 - pbox->x1, + pbox->y2 - pbox->y1); + (*pR128->accel->SubsequentSolidFillRect)(pScrn, + pbox->x1 + pR128->backX, + pbox->y1 + pR128->backY, + pbox->x2 - pbox->x1, + pbox->y2 - pbox->y1); + } + + (*pR128->accel->SetupForSolidFill)(pScrn, depth, GXcopy, -1); + for (; nbox; nbox--, pbox++) + (*pR128->accel->SubsequentSolidFillRect)(pScrn, + pbox->x1 + pR128->depthX, + pbox->y1 + pR128->depthY, + pbox->x2 - pbox->x1, + pbox->y2 - pbox->y1); + + pR128->accel->NeedToSync = TRUE; +} + +/* Copy the back and depth buffers when the X server moves a window. */ +static void R128DRIMoveBuffers(WindowPtr pWin, DDXPointRec ptOldOrg, + RegionPtr prgnSrc, CARD32 index) +{ + ScreenPtr pScreen = pWin->drawable.pScreen; + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + R128InfoPtr pR128 = R128PTR(pScrn); + + /* FIXME: This routine needs to have acceleration turned on */ + /* FIXME: Copy XAACopyWindow() and use REGION_TRANSLATE() */ + /* FIXME: Only initialize the back and depth buffers for contexts + that request them */ + + /* FIXME: Use accel when CCE 2D code is written */ + if (pR128->CCE2D) return; +} + +/* Initialize the AGP state. Request memory for use in AGP space, and + initialize the Rage 128 registers to point to that memory. */ +static Bool R128DRIAgpInit(R128InfoPtr pR128, ScreenPtr pScreen) +{ + unsigned char *R128MMIO = pR128->MMIO; + unsigned long mode; + unsigned int vendor, device; + int ret; + unsigned long cntl; + int s, l; + int flags; + + if (drmAgpAcquire(pR128->drmFD) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] AGP not available\n"); + return FALSE; + } + + /* Modify the mode if the default mode is + not appropriate for this particular + combination of graphics card and AGP + chipset. */ + + mode = drmAgpGetMode(pR128->drmFD); /* Default mode */ + vendor = drmAgpVendorId(pR128->drmFD); + device = drmAgpDeviceId(pR128->drmFD); + + mode &= ~R128_AGP_MODE_MASK; + switch (pR128->agpMode) { + case 2: mode |= R128_AGP_2X_MODE; + case 1: default: mode |= R128_AGP_1X_MODE; + } + + xf86DrvMsg(pScreen->myNum, X_INFO, + "[agp] Mode 0x%08lx [AGP 0x%04x/0x%04x; Card 0x%04x/0x%04x]\n", + mode, vendor, device, + pR128->PciInfo->vendor, + pR128->PciInfo->chipType); + + if (drmAgpEnable(pR128->drmFD, mode) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] AGP not enabled\n"); + drmAgpRelease(pR128->drmFD); + return FALSE; + } + + pR128->agpOffset = 0; + + if ((ret = drmAgpAlloc(pR128->drmFD, pR128->agpSize*1024*1024, 0, NULL, + &pR128->agpMemHandle)) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Out of memory (%d)\n", ret); + drmAgpRelease(pR128->drmFD); + return FALSE; + } + xf86DrvMsg(pScreen->myNum, X_INFO, + "[agp] %d kB allocated with handle 0x%08x\n", + pR128->agpSize*1024, pR128->agpMemHandle); + + if (drmAgpBind(pR128->drmFD, pR128->agpMemHandle, pR128->agpOffset) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not bind\n"); + drmAgpFree(pR128->drmFD, pR128->agpMemHandle); + drmAgpRelease(pR128->drmFD); + return FALSE; + } + + /* Initialize the CCE ring buffer data */ + pR128->ringStart = pR128->agpOffset; + pR128->ringMapSize = pR128->ringSize*1024*1024 + 4096; + pR128->ringSizeLog2QW = R128MinBits(pR128->ringSize*1024*1024/8) - 1; + + pR128->ringReadOffset = pR128->ringStart + pR128->ringMapSize; + pR128->ringReadMapSize = 4096; + + /* Reserve space for the vertex buffer */ + pR128->vbStart = pR128->ringReadOffset + pR128->ringReadMapSize; + pR128->vbMapSize = pR128->vbSize*1024*1024; + + /* Reserve space for the indirect buffer */ + pR128->indStart = pR128->vbStart + pR128->vbMapSize; + pR128->indMapSize = pR128->indSize*1024*1024; + + /* Reserve the rest for AGP textures */ + pR128->agpTexStart = pR128->indStart + pR128->indMapSize; + s = (pR128->agpSize*1024*1024 - pR128->agpTexStart); + l = R128MinBits((s-1) / R128_NR_TEX_REGIONS); + if (l < R128_LOG_TEX_GRANULARITY) l = R128_LOG_TEX_GRANULARITY; + pR128->agpTexMapSize = (s >> l) << l; + pR128->log2AGPTexGran = l; + + if (pR128->CCESecure) flags = DRM_READ_ONLY; + else flags = 0; + + if (drmAddMap(pR128->drmFD, pR128->ringStart, pR128->ringMapSize, + DRM_AGP, flags, &pR128->ringHandle) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[agp] Could not add ring mapping\n"); + return FALSE; + } + xf86DrvMsg(pScreen->myNum, X_INFO, + "[agp] ring handle = 0x%08lx\n", pR128->ringHandle); + + if (drmMap(pR128->drmFD, pR128->ringHandle, pR128->ringMapSize, + (drmAddressPtr)&pR128->ring) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, "[agp] Could not map ring\n"); + return FALSE; + } + xf86DrvMsg(pScreen->myNum, X_INFO, + "[agp] Ring mapped at 0x%08lx\n", + (unsigned long)pR128->ring); + + if (drmAddMap(pR128->drmFD, pR128->ringReadOffset, pR128->ringReadMapSize, + DRM_AGP, flags, &pR128->ringReadPtrHandle) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[agp] Could not add ring read ptr mapping\n"); + return FALSE; + } + xf86DrvMsg(pScreen->myNum, X_INFO, + "[agp] ring read ptr handle = 0x%08lx\n", + pR128->ringReadPtrHandle); + + if (drmMap(pR128->drmFD, pR128->ringReadPtrHandle, pR128->ringReadMapSize, + (drmAddressPtr)&pR128->ringReadPtr) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[agp] Could not map ring read ptr\n"); + return FALSE; + } + xf86DrvMsg(pScreen->myNum, X_INFO, + "[agp] Ring read ptr mapped at 0x%08lx\n", + (unsigned long)pR128->ringReadPtr); + + if (drmAddMap(pR128->drmFD, pR128->vbStart, pR128->vbMapSize, + DRM_AGP, 0, &pR128->vbHandle) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[agp] Could not add vertex buffers mapping\n"); + return FALSE; + } + xf86DrvMsg(pScreen->myNum, X_INFO, + "[agp] vertex buffers handle = 0x%08lx\n", pR128->vbHandle); + + if (drmMap(pR128->drmFD, pR128->vbHandle, pR128->vbMapSize, + (drmAddressPtr)&pR128->vb) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[agp] Could not map vertex buffers\n"); + return FALSE; + } + xf86DrvMsg(pScreen->myNum, X_INFO, + "[agp] Vertex buffers mapped at 0x%08lx\n", + (unsigned long)pR128->vb); + + if (drmAddMap(pR128->drmFD, pR128->indStart, pR128->indMapSize, + DRM_AGP, flags, &pR128->indHandle) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[agp] Could not add indirect buffers mapping\n"); + return FALSE; + } + xf86DrvMsg(pScreen->myNum, X_INFO, + "[agp] indirect buffers handle = 0x%08lx\n", pR128->indHandle); + + if (drmMap(pR128->drmFD, pR128->indHandle, pR128->indMapSize, + (drmAddressPtr)&pR128->ind) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[agp] Could not map indirect buffers\n"); + return FALSE; + } + xf86DrvMsg(pScreen->myNum, X_INFO, + "[agp] Indirect buffers mapped at 0x%08lx\n", + (unsigned long)pR128->ind); + + if (drmAddMap(pR128->drmFD, pR128->agpTexStart, pR128->agpTexMapSize, + DRM_AGP, 0, &pR128->agpTexHandle) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[agp] Could not add AGP texture map mapping\n"); + return FALSE; + } + xf86DrvMsg(pScreen->myNum, X_INFO, + "[agp] AGP texture map handle = 0x%08lx\n", + pR128->agpTexHandle); + + if (drmMap(pR128->drmFD, pR128->agpTexHandle, pR128->agpTexMapSize, + (drmAddressPtr)&pR128->agpTex) < 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[agp] Could not map AGP texture map\n"); + return FALSE; + } + xf86DrvMsg(pScreen->myNum, X_INFO, + "[agp] AGP Texture map mapped at 0x%08lx\n", + (unsigned long)pR128->agpTex); + + /* Initialize Rage 128's AGP registers */ + cntl = INREG(R128_AGP_CNTL); + cntl &= ~R128_AGP_APER_SIZE_MASK; + switch (pR128->agpSize) { + case 256: cntl |= R128_AGP_APER_SIZE_256MB; break; + case 128: cntl |= R128_AGP_APER_SIZE_128MB; break; + case 64: cntl |= R128_AGP_APER_SIZE_64MB; break; + case 32: cntl |= R128_AGP_APER_SIZE_32MB; break; + case 16: cntl |= R128_AGP_APER_SIZE_16MB; break; + case 8: cntl |= R128_AGP_APER_SIZE_8MB; break; + case 4: cntl |= R128_AGP_APER_SIZE_4MB; break; + default: + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[agp] Illegal aperture size %d kB\n", + pR128->agpSize*1024); + return FALSE; + } + OUTREG(R128_AGP_BASE, pR128->ringHandle); /* Ring buf is at AGP offset 0 */ + OUTREG(R128_AGP_CNTL, cntl); + + return TRUE; +} + +/* Add a map for the MMIO registers that will be accessed by any + DRI-based clients. */ +static Bool R128DRIMapInit(R128InfoPtr pR128, ScreenPtr pScreen) +{ + int flags; + + if (pR128->CCESecure) flags = DRM_READ_ONLY; + else flags = 0; + + /* Map registers */ + pR128->registerSize = R128_MMIOSIZE; + if (drmAddMap(pR128->drmFD, pR128->MMIOAddr, pR128->registerSize, + DRM_REGISTERS, flags, &pR128->registerHandle) < 0) { + return FALSE; + } + xf86DrvMsg(pScreen->myNum, X_INFO, + "[drm] register handle = 0x%08lx\n", pR128->registerHandle); + + return TRUE; +} + +/* Initialize the ring buffer state for use in the X server and any + DRI-based clients. */ +static void R128DRICCEInitRingBuffer(ScrnInfoPtr pScrn) +{ + R128InfoPtr info = R128PTR(pScrn); + unsigned char *R128MMIO = info->MMIO; + unsigned long addr; + + /* FIXME: When we use the CCE for the X server, we should move this + function (and the support functions above) to r128_accel.c */ + + /* The manual (p. 2) says this address is + in "VM space". This means it's an + offset from the start of AGP space. */ + OUTREG(R128_PM4_BUFFER_OFFSET, info->ringStart | 0x02000000); + + OUTREG(R128_PM4_BUFFER_DL_WPTR, 0); + OUTREG(R128_PM4_BUFFER_DL_RPTR, 0); + + /* DL_RPTR_ADDR is a physical address. + This should be in the SAREA. */ + *(volatile long unsigned *)(info->ringReadPtr) = 0; + OUTREG(R128_PM4_BUFFER_DL_RPTR_ADDR, (info->ringReadPtrHandle)); + + /* Set watermark control */ + OUTREG(R128_PM4_BUFFER_WM_CNTL, + ((R128_WATERMARK_L/4) << R128_WMA_SHIFT) + | ((R128_WATERMARK_M/4) << R128_WMB_SHIFT) + | ((R128_WATERMARK_N/4) << R128_WMC_SHIFT) + | ((R128_WATERMARK_K/64) << R128_WB_WM_SHIFT)); + + addr = INREG(R128_PM4_BUFFER_ADDR); /* Force read. Why? Because it's + in the examples... */ + +#if 0 + R128CCEWaitForIdle(pScrn); +#endif + + /* Turn on bus mastering */ + info->BusCntl &= ~R128_BUS_MASTER_DIS; + OUTREGP(R128_BUS_CNTL, 0, ~R128_BUS_MASTER_DIS); +} + +/* Initialize the kernel data structures. */ +static int R128DRIKernelInit(R128InfoPtr pR128, ScreenPtr pScreen) +{ + drmR128Init drmInfo; + + drmInfo.sarea_priv_offset = sizeof(XF86DRISAREARec); + drmInfo.is_pci = pR128->IsPCI; + drmInfo.cce_mode = pR128->CCEMode; + drmInfo.cce_fifo_size = pR128->CCEFifoSize; + drmInfo.cce_secure = pR128->CCESecure; + drmInfo.ring_size = pR128->ringSize*1024*1024; + drmInfo.usec_timeout = pR128->CCEusecTimeout; + + drmInfo.fb_offset = pR128->LinearAddr; + drmInfo.agp_ring_offset = pR128->ringHandle; + drmInfo.agp_read_ptr_offset = pR128->ringReadPtrHandle; + drmInfo.agp_vertbufs_offset = pR128->vbHandle; + drmInfo.agp_indbufs_offset = pR128->indHandle; + drmInfo.agp_textures_offset = pR128->agpTexHandle; + drmInfo.mmio_offset = pR128->registerHandle; + + if (drmR128InitCCE(pR128->drmFD, &drmInfo) < 0) return FALSE; + + return TRUE; +} + +/* Add a map for the vertex buffers that will be accessed by any + DRI-based clients. */ +static Bool R128DRIBufInit(R128InfoPtr pR128, ScreenPtr pScreen) +{ + /* Initialize vertex buffers */ + if ((pR128->vbNumBufs = drmAddBufs(pR128->drmFD, + pR128->vbMapSize / pR128->vbBufSize, + pR128->vbBufSize, + DRM_AGP_BUFFER, + pR128->vbStart)) <= 0) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[drm] Could not create vertex buffers list\n"); + return FALSE; + } + xf86DrvMsg(pScreen->myNum, X_INFO, + "[drm] Added %d %d byte vertex buffers\n", + pR128->vbNumBufs, pR128->vbBufSize); + + if (drmMarkBufs(pR128->drmFD, 0.133333, 0.266666)) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[drm] Failed to mark vertex buffers list\n"); + return FALSE; + } + + if (!(pR128->vbBufs = drmMapBufs(pR128->drmFD))) { + xf86DrvMsg(pScreen->myNum, X_ERROR, + "[drm] Failed to map vertex buffers list\n"); + return FALSE; + } + xf86DrvMsg(pScreen->myNum, X_INFO, + "[drm] Mapped %d vertex buffers\n", + pR128->vbBufs->count); + + return TRUE; +} + +/* Load the microcode for the CCE */ +static void R128DRILoadMicrocode(ScrnInfoPtr pScrn) +{ + unsigned char *R128MMIO = R128PTR(pScrn)->MMIO; + int i; + unsigned long R128Microcode[] = { + /* CCE microcode (from ATI) */ + 0, 276838400, 0, 268449792, 2, 142, 2, 145, 0, 1076765731, 0, 1617039951, + 0, 774592877, 0, 1987540286, 0, 2307490946U, 0, 599558925, 0, 589505315, 0, + 596487092, 0, 589505315, 1, 11544576, 1, 206848, 1, 311296, 1, 198656, 2, + 912273422, 11, 262144, 0, 0, 1, 33559837, 1, 7438, 1, 14809, 1, 6615, 12, + 28, 1, 6614, 12, 28, 2, 23, 11, 18874368, 0, 16790922, 1, 409600, 9, 30, 1, + 147854772, 16, 420483072, 3, 8192, 0, 10240, 1, 198656, 1, 15630, 1, 51200, + 10, 34858, 9, 42, 1, 33559823, 2, 10276, 1, 15717, 1, 15718, 2, 43, 1, + 15936948, 1, 570480831, 1, 14715071, 12, 322123831, 1, 33953125, 12, 55, 1, + 33559908, 1, 15718, 2, 46, 4, 2099258, 1, 526336, 1, 442623, 4, 4194365, 1, + 509952, 1, 459007, 3, 0, 12, 92, 2, 46, 12, 176, 1, 15734, 1, 206848, 1, + 18432, 1, 133120, 1, 100670734, 1, 149504, 1, 165888, 1, 15975928, 1, + 1048576, 6, 3145806, 1, 15715, 16, 2150645232U, 2, 268449859, 2, 10307, 12, + 176, 1, 15734, 1, 15735, 1, 15630, 1, 15631, 1, 5253120, 6, 3145810, 16, + 2150645232U, 1, 15864, 2, 82, 1, 343310, 1, 1064207, 2, 3145813, 1, 15728, + 1, 7817, 1, 15729, 3, 15730, 12, 92, 2, 98, 1, 16168, 1, 16167, 1, 16002, + 1, 16008, 1, 15974, 1, 15975, 1, 15990, 1, 15976, 1, 15977, 1, 15980, 0, + 15981, 1, 10240, 1, 5253120, 1, 15720, 1, 198656, 6, 110, 1, 180224, 1, + 103824738, 2, 112, 2, 3145839, 0, 536885440, 1, 114880, 14, 125, 12, + 206975, 1, 33559995, 12, 198784, 0, 33570236, 1, 15803, 0, 15804, 3, + 294912, 1, 294912, 3, 442370, 1, 11544576, 0, 811612160, 1, 12593152, 1, + 11536384, 1, 14024704, 7, 310382726, 0, 10240, 1, 14796, 1, 14797, 1, + 14793, 1, 14794, 0, 14795, 1, 268679168, 1, 9437184, 1, 268449792, 1, + 198656, 1, 9452827, 1, 1075854602, 1, 1075854603, 1, 557056, 1, 114880, 14, + 159, 12, 198784, 1, 1109409213, 12, 198783, 1, 1107312059, 12, 198784, 1, + 1109409212, 2, 162, 1, 1075854781, 1, 1073757627, 1, 1075854780, 1, 540672, + 1, 10485760, 6, 3145894, 16, 274741248, 9, 168, 3, 4194304, 3, 4209949, 0, + 0, 0, 256, 14, 174, 1, 114857, 1, 33560007, 12, 176, 0, 10240, 1, 114858, + 1, 33560018, 1, 114857, 3, 33560007, 1, 16008, 1, 114874, 1, 33560360, 1, + 114875, 1, 33560154, 0, 15963, 0, 256, 0, 4096, 1, 409611, 9, 188, 0, + 10240, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0 + }; + + R128WaitForIdle(pScrn); + + OUTREG(R128_PM4_MICROCODE_ADDR, 0); + for (i = 0; i < 256; i += 1) { + OUTREG(R128_PM4_MICROCODE_DATAH, R128Microcode[i*2]); + OUTREG(R128_PM4_MICROCODE_DATAL, R128Microcode[i*2 + 1]); + } +} + +/* Initialize the CCE state, and start the CCE (if used by the X server) */ +static void R128DRICCEInit(ScrnInfoPtr pScrn) +{ + R128InfoPtr info = R128PTR(pScrn); + unsigned char *R128MMIO = info->MMIO; + + /* CCEMode is initialized in r128_driver.c */ + switch (info->CCEMode) { + case R128_PM4_NONPM4: info->CCEFifoSize = 0; break; + case R128_PM4_192PIO: info->CCEFifoSize = 192; break; + case R128_PM4_192BM: info->CCEFifoSize = 192; break; + case R128_PM4_128PIO_64INDBM: info->CCEFifoSize = 128; break; + case R128_PM4_128BM_64INDBM: info->CCEFifoSize = 128; break; + case R128_PM4_64PIO_128INDBM: info->CCEFifoSize = 64; break; + case R128_PM4_64BM_128INDBM: info->CCEFifoSize = 64; break; + case R128_PM4_64PIO_64VCBM_64INDBM: info->CCEFifoSize = 64; break; + case R128_PM4_64BM_64VCBM_64INDBM: info->CCEFifoSize = 64; break; + case R128_PM4_64PIO_64VCPIO_64INDPIO: info->CCEFifoSize = 64; break; + } + + if (info->CCE2D) { + /* Make sure the CCE is on for the X server */ + R128CCEStart(pScrn); + } else { + /* Make sure the CCE is off for the X server */ + OUTREG(R128_PM4_MICRO_CNTL, 0); + OUTREG(R128_PM4_BUFFER_CNTL, R128_PM4_NONPM4); + } +} + +/* Initialize the screen-specific data structures for the DRI and the + Rage 128. This is the main entry point to the device-specific + initialization code. It calls device-independent DRI functions to + create the DRI data structures and initialize the DRI state. */ +Bool R128DRIScreenInit(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + R128InfoPtr pR128 = R128PTR(pScrn); + DRIInfoPtr pDRIInfo; + R128DRIPtr pR128DRI; + + switch (pR128->pixel_code) { + case 8: + /* These modes are not supported (yet). */ + case 15: + case 24: + return FALSE; + + /* Only 16 and 32 color depths are supports currently. */ + case 16: + case 32: + break; + } + + /* Create the DRI data structure, and fill it in before calling the + DRIScreenInit(). */ + if (!(pDRIInfo = DRICreateInfoRec())) return FALSE; + + pR128->pDRIInfo = pDRIInfo; + pDRIInfo->drmDriverName = R128_NAME; + pDRIInfo->clientDriverName = R128_NAME; + pDRIInfo->busIdString = xalloc(64); + sprintf(pDRIInfo->busIdString, + "PCI:%d:%d:%d", + pR128->PciInfo->bus, + pR128->PciInfo->device, + pR128->PciInfo->func); + pDRIInfo->ddxDriverMajorVersion = R128_VERSION_MAJOR; + pDRIInfo->ddxDriverMinorVersion = R128_VERSION_MINOR; + pDRIInfo->ddxDriverPatchVersion = R128_VERSION_PATCH; + pDRIInfo->frameBufferPhysicalAddress = pR128->LinearAddr; + pDRIInfo->frameBufferSize = pR128->FbMapSize; + pDRIInfo->frameBufferStride = (pScrn->displayWidth + * pR128->pixel_bytes); + pDRIInfo->ddxDrawableTableEntry = R128_MAX_DRAWABLES; + pDRIInfo->maxDrawableTableEntry = (SAREA_MAX_DRAWABLES + < R128_MAX_DRAWABLES + ? SAREA_MAX_DRAWABLES + : R128_MAX_DRAWABLES); + +#ifdef NOT_DONE + /* FIXME: Need to extend DRI protocol to pass this size back to + * client for SAREA mapping that includes a device private record + */ + pDRIInfo->SAREASize = + ((sizeof(XF86DRISAREARec) + 0xfff) & 0x1000); /* round to page */ + /* + shared memory device private rec */ +#else + /* For now the mapping works by using a fixed size defined + * in the SAREA header + */ + if (sizeof(XF86DRISAREARec)+sizeof(R128SAREAPriv)>SAREA_MAX) { + ErrorF("Data does not fit in SAREA\n"); + return FALSE; + } + pDRIInfo->SAREASize = SAREA_MAX; +#endif + + if (!(pR128DRI = (R128DRIPtr)xnfcalloc(sizeof(R128DRIRec),1))) { + DRIDestroyInfoRec(pR128->pDRIInfo); + pR128->pDRIInfo = NULL; + return FALSE; + } + pDRIInfo->devPrivate = pR128DRI; + pDRIInfo->devPrivateSize = sizeof(R128DRIRec); + pDRIInfo->contextSize = sizeof(R128DRIContextRec); + + pDRIInfo->CreateContext = R128CreateContext; + pDRIInfo->DestroyContext = R128DestroyContext; + pDRIInfo->SwapContext = R128DRISwapContext; + pDRIInfo->InitBuffers = R128DRIInitBuffers; + pDRIInfo->MoveBuffers = R128DRIMoveBuffers; + pDRIInfo->bufferRequests = DRI_ALL_WINDOWS; + + if (!DRIScreenInit(pScreen, pDRIInfo, &pR128->drmFD)) { + xfree(pDRIInfo->devPrivate); + pDRIInfo->devPrivate = NULL; + DRIDestroyInfoRec(pDRIInfo); + pDRIInfo = NULL; + return FALSE; + } + + /* Initialize AGP */ + if (!pR128->IsPCI && !R128DRIAgpInit(pR128, pScreen)) { + R128DRICloseScreen(pScreen); + return FALSE; + } + + /* DRIScreenInit doesn't add all the + common mappings. Add additional + mappings here. */ + if (!R128DRIMapInit(pR128, pScreen)) { + R128DRICloseScreen(pScreen); + return FALSE; + } + + /* Initialize the ring buffer */ + if (!pR128->IsPCI) R128DRICCEInitRingBuffer(pScrn); + + /* Initialize the kernel data structures */ + if (!R128DRIKernelInit(pR128, pScreen)) { + R128DRICloseScreen(pScreen); + return FALSE; + } + + /* Initialize vertex buffers list */ + if (!pR128->IsPCI && !R128DRIBufInit(pR128, pScreen)) { + R128DRICloseScreen(pScreen); + return FALSE; + } + + /* FIXME: When are these mappings unmapped? */ + + if (!R128InitVisualConfigs(pScreen)) { + R128DRICloseScreen(pScreen); + return FALSE; + } + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Visual configs initialized\n"); + + /* Load the CCE Microcode */ + R128DRILoadMicrocode(pScrn); + + /* Reset the Graphics Engine */ + R128EngineReset(pScrn); + + return TRUE; +} + +/* Finish initializing the device-dependent DRI state, and call + DRIFinishScreenInit() to complete the device-independent DRI + initialization. */ +Bool R128DRIFinishScreenInit(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + R128InfoPtr pR128 = R128PTR(pScrn); + R128SAREAPrivPtr pSAREAPriv; + R128DRIPtr pR128DRI; + + /* Init and start the CCE */ + R128DRICCEInit(pScrn); + + pSAREAPriv = (R128SAREAPrivPtr)DRIGetSAREAPrivate(pScreen); + memset(pSAREAPriv, 0, sizeof(*pSAREAPriv)); + + pR128->pDRIInfo->driverSwapMethod = DRI_HIDE_X_CONTEXT; + /* pR128->pDRIInfo->driverSwapMethod = DRI_SERVER_SWAP; */ + + pR128DRI = (R128DRIPtr)pR128->pDRIInfo->devPrivate; + pR128DRI->registerHandle = pR128->registerHandle; + pR128DRI->registerSize = pR128->registerSize; + + pR128DRI->ringHandle = pR128->ringHandle; + pR128DRI->ringMapSize = pR128->ringMapSize; + pR128DRI->ringSize = pR128->ringSize*1024*1024; + + pR128DRI->ringReadPtrHandle = pR128->ringReadPtrHandle; + pR128DRI->ringReadMapSize = pR128->ringReadMapSize; + + pR128DRI->vbHandle = pR128->vbHandle; + pR128DRI->vbMapSize = pR128->vbMapSize; + pR128DRI->vbOffset = pR128->vbStart; + pR128DRI->vbBufSize = pR128->vbBufSize; + + pR128DRI->indHandle = pR128->indHandle; + pR128DRI->indMapSize = pR128->indMapSize; + + pR128DRI->agpTexHandle = pR128->agpTexHandle; + pR128DRI->agpTexMapSize = pR128->agpTexMapSize; + pR128DRI->log2AGPTexGran = pR128->log2AGPTexGran; + pR128DRI->agpTexOffset = pR128->agpTexStart; + + pR128DRI->deviceID = pR128->Chipset; + pR128DRI->width = pScrn->virtualX; + pR128DRI->height = pScrn->virtualY; + pR128DRI->depth = pScrn->depth; + pR128DRI->bpp = pScrn->bitsPerPixel; + + pR128DRI->fbX = pR128->fbX; + pR128DRI->fbY = pR128->fbY; + pR128DRI->backX = pR128->backX; + pR128DRI->backY = pR128->backY; + pR128DRI->depthX = pR128->depthX; + pR128DRI->depthY = pR128->depthY; + pR128DRI->textureX = pR128->textureX; + pR128DRI->textureY = pR128->textureY; + pR128DRI->textureSize = pR128->textureSize; + pR128DRI->log2TexGran = pR128->log2TexGran; + + pR128DRI->IsPCI = pR128->IsPCI; + + pR128DRI->CCEMode = pR128->CCEMode; + pR128DRI->CCEFifoSize = pR128->CCEFifoSize; + + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "0x%08lx %d\n", + pR128DRI->registerHandle, pR128DRI->registerSize); + return DRIFinishScreenInit(pScreen); +} + +/* The screen is being closed, so clean up any state and free any + resources used by the DRI. */ +void R128DRICloseScreen(ScreenPtr pScreen) +{ + ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum]; + R128InfoPtr pR128 = R128PTR(pScrn); + + /* Stop the CCE if it is still in use */ + if (pR128->CCE2D) R128CCEStop(pScrn); + + /* De-allocate vertex buffers */ + if (pR128->vbBufs) { + drmUnmapBufs(pR128->vbBufs); + pR128->vbBufs = NULL; + } + + /* De-allocate all kernel resources */ + drmR128CleanupCCE(pR128->drmFD); + + /* De-allocate all AGP resources */ + if (pR128->agpTex) { + drmUnmap(pR128->agpTex, pR128->agpTexMapSize); + pR128->agpTex = NULL; + } + if (pR128->ind) { + drmUnmap(pR128->ind, pR128->indMapSize); + pR128->ind = NULL; + } + if (pR128->vb) { + drmUnmap(pR128->vb, pR128->vbMapSize); + pR128->vb = NULL; + } + if (pR128->ringReadPtr) { + drmUnmap(pR128->ringReadPtr, pR128->ringReadMapSize); + pR128->ringReadPtr = NULL; + } + if (pR128->ring) { + drmUnmap(pR128->ring, pR128->ringMapSize); + pR128->ring = NULL; + } + if (pR128->agpMemHandle) { + drmAgpUnbind(pR128->drmFD, pR128->agpMemHandle); + drmAgpFree(pR128->drmFD, pR128->agpMemHandle); + pR128->agpMemHandle = 0; + drmAgpRelease(pR128->drmFD); + } + + /* De-allocate all DRI resources */ + DRICloseScreen(pScreen); + + /* De-allocate all DRI data structures */ + if (pR128->pDRIInfo) { + if (pR128->pDRIInfo->devPrivate) { + xfree(pR128->pDRIInfo->devPrivate); + pR128->pDRIInfo->devPrivate = NULL; + } + DRIDestroyInfoRec(pR128->pDRIInfo); + pR128->pDRIInfo = NULL; + } + if (pR128->pVisualConfigs) { + xfree(pR128->pVisualConfigs); + pR128->pVisualConfigs = NULL; + } + if (pR128->pVisualConfigsPriv) { + xfree(pR128->pVisualConfigsPriv); + pR128->pVisualConfigsPriv = NULL; + } +} diff --git a/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_dri.h b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_dri.h new file mode 100644 index 000000000..533aadb2f --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_dri.h @@ -0,0 +1,116 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * Rickard E. Faith <faith@precisioninsight.com> + * + */ + +#ifndef _R128_DRI_ +#define _R128_DRI_ + +#include <xf86drm.h> + +/* DRI Driver defaults */ +#define R128_DEFAULT_CCE_PIO_MODE R128_PM4_64PIO_64VCBM_64INDBM +#define R128_DEFAULT_CCE_BM_MODE R128_PM4_64BM_64VCBM_64INDBM +#define R128_DEFAULT_AGP_MODE 2 +#define R128_DEFAULT_AGP_SIZE 8 /* MB (must be a power of 2 and > 4MB) */ +#define R128_DEFAULT_RING_SIZE 1 /* MB (must be page aligned) */ +#define R128_DEFAULT_VB_SIZE 1 /* MB (must be page aligned) */ +#define R128_DEFAULT_IND_SIZE 1 /* MB (must be page aligned) */ +#define R128_DEFAULT_AGP_TEX_SIZE 1 /* MB (must be page aligned) */ + +#define R128_DEFAULT_VB_BUF_SIZE 16384 /* bytes */ +#define R128_DEFAULT_CCE_TIMEOUT 10000 /* usecs */ + +#define R128_AGP_MAX_MODE 2 + +#define R128CCE_USE_RING_BUFFER(m) \ +(((m) == R128_PM4_192BM) || \ + ((m) == R128_PM4_128BM_64INDBM) || \ + ((m) == R128_PM4_64BM_128INDBM) || \ + ((m) == R128_PM4_64BM_64VCBM_64INDBM)) + +typedef struct { + /* MMIO register data */ + drmHandle registerHandle; + drmSize registerSize; + + /* CCE ring buffer data */ + drmHandle ringHandle; + drmSize ringMapSize; + int ringSize; + + /* CCE ring read pointer data */ + drmHandle ringReadPtrHandle; + drmSize ringReadMapSize; + + /* CCE vertex buffer data */ + drmHandle vbHandle; + drmSize vbMapSize; + int vbOffset; + int vbBufSize; + + /* CCE indirect buffer data */ + drmHandle indHandle; + drmSize indMapSize; + + /* CCE AGP Texture data */ + drmHandle agpTexHandle; + drmSize agpTexMapSize; + int log2AGPTexGran; + int agpTexOffset; + + /* DRI screen private data */ + int deviceID; /* PCI device ID */ + int width; /* Width in pixels of display */ + int height; /* Height in scanlines of display */ + int depth; /* Depth of display (8, 15, 16, 24) */ + int bpp; /* Bit depth of display (8, 16, 24, 32) */ + + int fbX; /* Start of frame buffer */ + int fbY; + int backX; /* Start of shared back buffer */ + int backY; + int depthX; /* Start of shared depth buffer */ + int depthY; + int textureX; /* Start of texture data in frame buffer */ + int textureY; + int textureSize; + int log2TexGran; + + int IsPCI; /* Current card is a PCI card */ + + int CCEMode; /* CCE mode that server/clients use */ + int CCEFifoSize; /* Size of the CCE command FIFO */ +} R128DRIRec, *R128DRIPtr; + +#endif diff --git a/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_dripriv.h b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_dripriv.h new file mode 100644 index 000000000..acec5e269 --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_dripriv.h @@ -0,0 +1,54 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Rickard E. Faith <faith@precisioninsight.com> + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#ifndef _R128_DRIPRIV_H_ +#define _R128_DRIPRIV_H_ + +#define R128_MAX_DRAWABLES 256 + +extern void GlxSetVisualConfigs(int nconfigs, __GLXvisualConfig *configs, + void **configprivs); + +typedef struct { + /* Nothing here yet */ + int dummy; +} R128ConfigPrivRec, *R128ConfigPrivPtr; + +typedef struct { + /* Nothing here yet */ + int dummy; +} R128DRIContextRec, *R128DRIContextPtr; + +#endif diff --git a/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_driver.c index b5da4cb6e..f30d86aa8 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_driver.c +++ b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_driver.c @@ -1,8 +1,8 @@ /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/r128/r128_driver.c,v 1.26 2000/03/06 23:17:44 martin Exp $ */ /************************************************************************** -Copyright 1999 ATI Technologies Inc. and Precision Insight, Inc., - Cedar Park, Texas. +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a @@ -107,6 +107,19 @@ USE OR OTHER DEALINGS IN THE SOFTWARE. /* VESA support */ #include "vbe.h" + /* DRI support */ +#ifdef XF86DRI +#include "GL/glxint.h" +#include "xf86drm.h" +#include "sarea.h" +#define _XF86DRI_SERVER_ +#include "xf86dri.h" +#include "dri.h" +#include "r128_dri.h" +#include "r128_dripriv.h" +#include "r128_sarea.h" +#endif + /* Driver data structures */ #include "r128.h" #include "r128_reg.h" @@ -176,17 +189,41 @@ typedef enum { OPTION_HW_CURSOR, OPTION_DAC_6BIT, OPTION_DAC_8BIT, +#ifdef XF86DRI + OPTION_IS_PCI, + OPTION_CCE_PIO, + OPTION_NO_SECURITY, + OPTION_USEC_TIMEOUT, + OPTION_AGP_MODE, + OPTION_AGP_SIZE, + OPTION_RING_SIZE, + OPTION_VERT_SIZE, + OPTION_VBUF_SIZE, + OPTION_USE_CCE_2D, +#endif OPTION_FBDEV } R128Opts; static OptionInfoRec R128Options[] = { - { OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE }, - { OPTION_SW_CURSOR, "SWcursor", OPTV_BOOLEAN, {0}, FALSE }, - { OPTION_HW_CURSOR, "HWcursor", OPTV_BOOLEAN, {0}, TRUE }, - { OPTION_DAC_6BIT, "Dac6Bit", OPTV_BOOLEAN, {0}, FALSE }, - { OPTION_DAC_8BIT, "Dac8Bit", OPTV_BOOLEAN, {0}, TRUE }, - { OPTION_FBDEV, "UseFBDev", OPTV_BOOLEAN, {0}, FALSE }, - { -1, NULL, OPTV_NONE, {0}, FALSE } + { OPTION_NOACCEL, "NoAccel", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_SW_CURSOR, "SWcursor", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_HW_CURSOR, "HWcursor", OPTV_BOOLEAN, {0}, TRUE }, + { OPTION_DAC_6BIT, "Dac6Bit", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_DAC_8BIT, "Dac8Bit", OPTV_BOOLEAN, {0}, TRUE }, +#ifdef XF86DRI + { OPTION_IS_PCI, "ForcePCIMode", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_CCE_PIO, "CCEPIOMode", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_NO_SECURITY, "CCENoSecurity", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_USEC_TIMEOUT, "CCEusecTimeout", OPTV_INTEGER, {0}, FALSE }, + { OPTION_AGP_MODE, "AGPMode", OPTV_INTEGER, {0}, FALSE }, + { OPTION_AGP_SIZE, "AGPSize", OPTV_INTEGER, {0}, FALSE }, + { OPTION_RING_SIZE, "RingSize", OPTV_INTEGER, {0}, FALSE }, + { OPTION_VERT_SIZE, "VBListSize", OPTV_INTEGER, {0}, FALSE }, + { OPTION_VBUF_SIZE, "VBSize", OPTV_INTEGER, {0}, FALSE }, + { OPTION_USE_CCE_2D, "UseCCEfor2D", OPTV_BOOLEAN, {0}, FALSE }, +#endif + { OPTION_FBDEV, "UseFBDev", OPTV_BOOLEAN, {0}, FALSE }, + { -1, NULL, OPTV_NONE, {0}, FALSE } }; R128RAMRec R128RAM[] = { /* Memory Specifications @@ -299,6 +336,38 @@ static const char *ramdacSymbols[] = { NULL }; +#ifdef XF86DRI +static const char *drmSymbols[] = { + "drmAddBufs", + "drmAddMap", + "drmAvailable", + "drmCtlAddCommand", + "drmCtlInstHandler", + "drmGetInterruptFromBusID", + "drmMapBufs", + "drmMarkBufs", + "drmUnmapBufs", + NULL +}; + +static const char *driSymbols[] = { + "DRIGetDrawableIndex", + "DRIFinishScreenInit", + "DRIDestroyInfoRec", + "DRICloseScreen", + "DRIDestroyInfoRec", + "DRIScreenInit", + "DRIDestroyInfoRec", + "DRICreateInfoRec", + "DRILock", + "DRIUnlock", + "DRIGetSAREAPrivate", + "DRIGetContext", + "GlxSetVisualConfigs", + NULL +}; +#endif + static MODULESETUPPROTO(R128Setup); static XF86ModuleVersionInfo R128VersRec = @@ -347,6 +416,10 @@ static pointer R128Setup(pointer module, pointer opts, int *errmaj, xaaSymbols, xf8_32bppSymbols, ramdacSymbols, +#ifdef XF86DRI + drmSymbols, + driSymbols, +#endif fbdevHWSymbols, vbeSymbols, 0 /* ddcsymbols */, @@ -518,7 +591,7 @@ static void R128Unblank(ScrnInfoPtr pScrn) } /* Compute log base 2 of val. */ -static int R128MinBits(int val) +int R128MinBits(int val) { int bits; @@ -779,6 +852,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn) int offset = 0; /* RAM Type */ MessageType from; unsigned char *R128MMIO; + /* Chipset */ from = X_PROBED; if (dev->chipset && *dev->chipset) { @@ -876,7 +950,7 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn) switch (info->MemCntl & 0x3) { case 0: /* SDR SGRAM 1:1 */ switch (info->Chipset) { - case PCI_CHIP_RAGE128RE: + case PCI_CHIP_RAGE128RE: case PCI_CHIP_RAGE128RF: offset = 0; break; /* 128-bit SDR SGRAM 1:1 */ case PCI_CHIP_RAGE128RK: case PCI_CHIP_RAGE128RL: @@ -895,12 +969,28 @@ static Bool R128PreInitConfig(ScrnInfoPtr pScrn) pScrn->videoRam); from = X_CONFIG; pScrn->videoRam = dev->videoRam; - } + } pScrn->videoRam &= ~1023; info->FbMapSize = pScrn->videoRam * 1024; xf86DrvMsg(pScrn->scrnIndex, from, "VideoRAM: %d kByte (%s)\n", pScrn->videoRam, info->ram->name); +#ifdef XF86DRI + /* AGP/PCI */ + if (xf86ReturnOptValBool(R128Options, OPTION_IS_PCI, FALSE)) { + info->IsPCI = TRUE; + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Forced into PCI-only mode\n"); + } else { + switch (info->Chipset) { + case PCI_CHIP_RAGE128RE: + case PCI_CHIP_RAGE128RK: info->IsPCI = TRUE; break; + case PCI_CHIP_RAGE128RF: + case PCI_CHIP_RAGE128RL: + case PCI_CHIP_RAGE128PF: + default: info->IsPCI = FALSE; break; + } + } +#endif return TRUE; } @@ -1053,6 +1143,143 @@ static Bool R128PreInitInt10(ScrnInfoPtr pScrn) return TRUE; } +#ifdef XF86DRI +static Bool R128PreInitDRI(ScrnInfoPtr pScrn) +{ + R128InfoPtr info = R128PTR(pScrn); + + if (info->IsPCI) { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "CCE in PIO mode\n"); + info->CCEMode = R128_DEFAULT_CCE_PIO_MODE; + } else if (xf86ReturnOptValBool(R128Options, OPTION_CCE_PIO, FALSE)) { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "CCE in PIO mode\n"); + info->CCEMode = R128_DEFAULT_CCE_PIO_MODE; + } else { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "CCE in BM mode\n"); + info->CCEMode = R128_DEFAULT_CCE_BM_MODE; + } + + if (xf86ReturnOptValBool(R128Options, OPTION_USE_CCE_2D, FALSE)) { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, "Using CCE for 2D\n"); + info->CCE2D = TRUE; + } else { + info->CCE2D = FALSE; + } + + if (xf86ReturnOptValBool(R128Options, OPTION_NO_SECURITY, FALSE)) { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "WARNING!!! CCE Security checks disabled!!! **********\n"); + info->CCESecure = FALSE; + } else { + info->CCESecure = TRUE; + } + + info->agpMode = R128_DEFAULT_AGP_MODE; + info->agpSize = R128_DEFAULT_AGP_SIZE; + info->ringSize = R128_DEFAULT_RING_SIZE; + info->vbSize = R128_DEFAULT_VB_SIZE; + info->indSize = R128_DEFAULT_IND_SIZE; + info->agpTexSize = R128_DEFAULT_AGP_TEX_SIZE; + + info->vbBufSize = R128_DEFAULT_VB_BUF_SIZE; + + info->CCEusecTimeout = R128_DEFAULT_CCE_TIMEOUT; + + if (!info->IsPCI) { + if (xf86GetOptValInteger(R128Options, + OPTION_AGP_MODE, &(info->agpMode))) { + if (info->agpMode < 1 || info->agpMode > R128_AGP_MAX_MODE) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Illegal AGP Mode: %d\n", info->agpMode); + return FALSE; + } + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Using AGP %dx mode\n", info->agpMode); + } + + if (xf86GetOptValInteger(R128Options, + OPTION_AGP_SIZE, (int *)&(info->agpSize))) { + switch (info->agpSize) { + case 4: + case 8: + case 16: + case 32: + case 64: + case 128: + case 256: + break; + default: + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Illegal AGP size: %d MB\n", info->agpSize); + return FALSE; + } + } + + if (xf86GetOptValInteger(R128Options, + OPTION_RING_SIZE, &(info->ringSize))) { + if (info->ringSize < 1 || info->ringSize >= info->agpSize) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Illegal ring buffer size: %d MB\n", + info->ringSize); + return FALSE; + } + } + + if (xf86GetOptValInteger(R128Options, + OPTION_VERT_SIZE, &(info->vbSize))) { + if (info->vbSize < 1 || info->vbSize >= info->agpSize) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Illegal vertex buffers list size: %d MB\n", + info->vbSize); + return FALSE; + } + } + + if (xf86GetOptValInteger(R128Options, + OPTION_VBUF_SIZE, &(info->vbBufSize))) { + int numBufs = info->vbSize*1024*1024/info->vbBufSize; + if (numBufs < 2 || numBufs > 512) { /* FIXME: 512 is arbitrary */ + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Illegal individual vertex buffer size: %d bytes\n", + info->vbBufSize); + return FALSE; + } + } + + if (info->ringSize + info->vbSize + info->indSize + info->agpTexSize > + info->agpSize) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, + "Buffers are too big for requested AGP space\n"); + return FALSE; + } + + info->agpTexSize = info->agpSize - (info->ringSize + + info->vbSize + + info->indSize); + + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Using %d MB AGP aperture\n", info->agpSize); + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Using %d MB for the ring buffer\n", info->ringSize); + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Using %d MB for vertex buffers\n", info->vbSize); + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Using %d MB for indirect buffers\n", info->indSize); + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Using %d MB for AGP textures\n", info->agpTexSize); + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Using %d byte vertex buffers\n", info->vbBufSize); + } + + if (xf86GetOptValInteger(R128Options, OPTION_USEC_TIMEOUT, + &(info->CCEusecTimeout))) { + /* This option checked by the R128 DRM kernel module */ + } + + return TRUE; +} +#endif + extern xf86MonPtr ConfiguredMonitor; static void @@ -1152,6 +1379,10 @@ static Bool R128PreInit(ScrnInfoPtr pScrn, int flags) if (!R128PreInitAccel(pScrn)) goto fail; +#ifdef XF86DRI + if (!R128PreInitDRI(pScrn)) goto fail; +#endif + return TRUE; fail: @@ -1231,9 +1462,20 @@ static Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, R128TRACE(("R128ScreenInit %x %d\n", pScrn->memPhysBase, pScrn->fbOffset)); +#ifdef XF86DRI + /* Turn off the CCE for now. */ + info->CCEInUse = FALSE; +#endif + if (!R128MapMem(pScrn)) return FALSE; pScrn->fbOffset = 0; - +#ifdef XF86DRI + info->fbX = 0; + info->fbY = 0; +#endif + + info->PaletteSavedOnVT = FALSE; + R128Save(pScrn); if (info->FBDev) { if (!fbdevHWModeInit(pScrn, pScrn->currentMode)) return FALSE; @@ -1251,6 +1493,18 @@ static Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, pScrn->rgbBits, pScrn->defaultVisual)) return FALSE; +#ifdef XF86DRI + /* Setup DRI after visuals have been + established, but before cfbScreenInit is + called. cfbScreenInit will eventually + call the driver's InitGLXVisuals call + back. */ + if (!xf86ReturnOptValBool(R128Options, OPTION_NOACCEL, FALSE)) + info->directRenderingEnabled = R128DRIScreenInit(pScreen); + else + info->directRenderingEnabled = FALSE; +#endif + #ifdef USE_FB if (!fbScreenInit (pScreen, info->FB, pScrn->virtualX, pScrn->virtualY, @@ -1358,6 +1612,101 @@ static Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, } } +#ifdef XF86DRI + /* Allocate frame buffer space for the + shared back and depth buffers as well + as for local textures. */ + if (info->directRenderingEnabled) { + FBAreaPtr fbarea; + int width_bytes = pScrn->displayWidth * info->pixel_bytes; + int maxy = info->FbMapSize / width_bytes; + int l; + + /* Allocate the shared back buffer */ + if ((fbarea = xf86AllocateOffscreenArea(pScreen, + pScrn->virtualX, + pScrn->virtualY, + 32, NULL, NULL, NULL))) { + xf86DrvMsg(scrnIndex, X_INFO, + "Reserved back buffer from (%d,%d) to (%d,%d)\n", + fbarea->box.x1, fbarea->box.y1, + fbarea->box.x2, fbarea->box.y2); + + info->backX = fbarea->box.x1; + info->backY = fbarea->box.y1; + } else { + xf86DrvMsg(scrnIndex, X_ERROR, "Unable to reserve back buffer\n"); + info->backX = -1; + info->backY = -1; + } + + /* Allocate the shared depth buffer */ + if ((fbarea = xf86AllocateOffscreenArea(pScreen, + pScrn->virtualX, + pScrn->virtualY, + 32, NULL, NULL, NULL))) { + xf86DrvMsg(scrnIndex, X_INFO, + "Reserved depth buffer from (%d,%d) to (%d,%d)\n", + fbarea->box.x1, fbarea->box.y1, + fbarea->box.x2, fbarea->box.y2); + + info->depthX = fbarea->box.x1; + info->depthY = fbarea->box.y1; + } else { + xf86DrvMsg(scrnIndex, X_ERROR, "Unable to reserve depth buffer\n"); + info->depthX = -1; + info->depthY = -1; + } + + /* Allocate local texture space */ + if (((maxy - MemBox.y2 - 1) * width_bytes) > + (pScrn->virtualX * pScrn->virtualY * 2 * info->pixel_bytes)) { + info->textureX = 0; + info->textureY = MemBox.y2 + 1; + info->textureSize = (maxy - MemBox.y2 - 1) * width_bytes; + + l = R128MinBits((info->textureSize-1) / R128_NR_TEX_REGIONS); + if (l < R128_LOG_TEX_GRANULARITY) l = R128_LOG_TEX_GRANULARITY; + + info->log2TexGran = l; + info->textureSize = (info->textureSize >> l) << l; + + xf86DrvMsg(scrnIndex, X_INFO, + "Reserved %d kb for textures: (%d,%d)-(%d,%d)\n", + info->textureSize/1024, + info->textureX, info->textureY, + pScrn->displayWidth, maxy); + } else if ((fbarea = xf86AllocateOffscreenArea(pScreen, + pScrn->virtualX, + pScrn->virtualY * 2, + 32, + NULL, NULL, NULL))) { + info->textureX = fbarea->box.x1; + info->textureY = fbarea->box.y1; + info->textureSize = ((fbarea->box.y2 - fbarea->box.y1) * + (fbarea->box.x2 - fbarea->box.x1) * + info->pixel_bytes); + + l = R128MinBits((info->textureSize-1) / R128_NR_TEX_REGIONS); + if (l < R128_LOG_TEX_GRANULARITY) l = R128_LOG_TEX_GRANULARITY; + + info->log2TexGran = l; + info->textureSize = (info->textureSize >> l) << l; + + xf86DrvMsg(scrnIndex, X_INFO, + "Reserved %d kb for textures: (%d,%d)-(%d,%d)\n", + info->textureSize/1024, + fbarea->box.x1, fbarea->box.y1, + fbarea->box.x2, fbarea->box.y2); + } else { + xf86DrvMsg(scrnIndex, X_ERROR, + "Unable to reserve texture space in frame buffer\n"); + info->textureX = -1; + info->textureY = -1; + } + } +#endif + /* Backing store setup */ miInitializeBackingStore(pScreen); xf86SetBackingStore(pScreen); @@ -1453,6 +1802,21 @@ static Bool R128ScreenInit(int scrnIndex, ScreenPtr pScreen, if (serverGeneration == 1) xf86ShowUnusedOptions(pScrn->scrnIndex, pScrn->options); +#ifdef XF86DRI + /* DRI finalization */ + if (info->directRenderingEnabled) { + /* Now that mi, cfb, drm and others have + done their thing, complete the DRI + setup. */ + info->directRenderingEnabled = R128DRIFinishScreenInit(pScreen); + } + if (info->directRenderingEnabled) { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Direct rendering enabled\n"); + } else { + xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Direct rendering disabled\n"); + } +#endif + return TRUE; } @@ -1473,7 +1837,7 @@ static void R128RestoreCommonRegisters(ScrnInfoPtr pScrn, R128SavePtr restore) OUTREG(R128_GEN_INT_CNTL, restore->gen_int_cntl); OUTREG(R128_CAP0_TRIG_CNTL, restore->cap0_trig_cntl); OUTREG(R128_CAP1_TRIG_CNTL, restore->cap1_trig_cntl); - OUTREG(R128_BUS_CNTL, restore->bus_cntl); + OUTREG(R128_BUS_CNTL, restore->bus_cntl); } /* Write CRTC registers. */ @@ -1603,7 +1967,7 @@ static void R128SaveCommonRegisters(ScrnInfoPtr pScrn, R128SavePtr save) save->gen_int_cntl = INREG(R128_GEN_INT_CNTL); save->cap0_trig_cntl = INREG(R128_CAP0_TRIG_CNTL); save->cap1_trig_cntl = INREG(R128_CAP1_TRIG_CNTL); - save->bus_cntl = INREG(R128_BUS_CNTL); + save->bus_cntl = INREG(R128_BUS_CNTL); } /* Read CRTC registers. */ @@ -2025,7 +2389,7 @@ static Bool R128Init(ScrnInfoPtr pScrn, DisplayModePtr mode, R128SavePtr save) R128InitPLLRegisters(pScrn, save, mode, &info->pll, dot_clock); if (!R128InitDDARegisters(pScrn, save, mode, &info->pll, info)) return FALSE; - R128InitPalette(save, info); + if (!info->PaletteSavedOnVT) R128InitPalette(save, info); R128TRACE(("R128Init returns %p\n", save)); return TRUE; @@ -2037,6 +2401,7 @@ static Bool R128ModeInit(ScrnInfoPtr pScrn, DisplayModePtr mode) R128InfoPtr info = R128PTR(pScrn); if (!R128Init(pScrn, mode, &info->ModeReg)) return FALSE; + /* FIXME? DRILock/DRIUnlock here? */ R128Blank(pScrn); R128RestoreMode(pScrn, &info->ModeReg); R128Unblank(pScrn); @@ -2096,14 +2461,43 @@ static void R128AdjustFrame(int scrnIndex, int x, int y, int flags) mode. */ static Bool R128EnterVT(int scrnIndex, int flags) { - ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + R128InfoPtr info = R128PTR(pScrn); R128TRACE(("R128EnterVT\n")); +#ifdef XF86DRI + if (R128PTR(pScrn)->directRenderingEnabled) { + R128CCEStart(pScrn); + DRIUnlock(pScrn->pScreen); + } +#endif if (!R128ModeInit(pScrn, pScrn->currentMode)) return FALSE; + info->PaletteSavedOnVT = FALSE; R128AdjustFrame(scrnIndex, pScrn->frameX0, pScrn->frameY0, 0); + return TRUE; } +/* Called when VT switching away from the X server. Restore the original + text mode. */ +static void R128LeaveVT(int scrnIndex, int flags) +{ + ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; + R128InfoPtr info = R128PTR(pScrn); + R128SavePtr save = &info->ModeReg; + + R128TRACE(("R128LeaveVT\n")); +#ifdef XF86DRI + if (R128PTR(pScrn)->directRenderingEnabled) { + DRILock(pScrn->pScreen, 0); + R128CCEStop(pScrn); + } +#endif + R128SavePalette(pScrn, save); + info->PaletteSavedOnVT = TRUE; + R128Restore(pScrn); +} + static Bool R128EnterVTFBDev(int scrnIndex, int flags) { @@ -2116,8 +2510,6 @@ R128EnterVTFBDev(int scrnIndex, int flags) return TRUE; } -/* Called when VT switching away from the X server. Restore the original - text mode. */ static void R128LeaveVTFBDev(int scrnIndex, int flags) { ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; @@ -2127,14 +2519,6 @@ static void R128LeaveVTFBDev(int scrnIndex, int flags) fbdevHWLeaveVT(scrnIndex,flags); } -static void R128LeaveVT(int scrnIndex, int flags) -{ - ScrnInfoPtr pScrn = xf86Screens[scrnIndex]; - - R128TRACE(("R128LeaveVT\n")); - R128Restore(pScrn); -} - /* Called at the end of each server generation. Restore the original text mode, unmap video memory, and unwrap and call the saved CloseScreen function. */ @@ -2144,6 +2528,15 @@ static Bool R128CloseScreen(int scrnIndex, ScreenPtr pScreen) R128InfoPtr info = R128PTR(pScrn); R128TRACE(("R128CloseScreen\n")); + +#ifdef XF86DRI + /* Disable direct rendering */ + if (info->directRenderingEnabled) { + R128DRICloseScreen(pScreen); + info->directRenderingEnabled = FALSE; + } +#endif + if (pScrn->vtSema) { R128Restore(pScrn); R128UnmapMem(pScrn); diff --git a/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_reg.h b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_reg.h index 86652affa..144fd9efe 100644 --- a/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_reg.h +++ b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_reg.h @@ -1,8 +1,8 @@ /* $XFree86: xc/programs/Xserver/hw/xfree86/drivers/r128/r128_reg.h,v 1.6 2000/02/23 04:47:19 martin Exp $ */ /************************************************************************** -Copyright 1999 ATI Technologies Inc. and Precision Insight, Inc., - Cedar Park, Texas. +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. All Rights Reserved. Permission is hereby granted, free of charge, to any person obtaining a @@ -159,9 +159,20 @@ static inline unsigned short regr16(volatile unsigned long base_addr, unsigned l #define R128_AGP_APER_OFFSET 0x0178 #define R128_AGP_BASE 0x0170 #define R128_AGP_CNTL 0x0174 +# define R128_AGP_APER_SIZE_256MB (0x00 << 0) +# define R128_AGP_APER_SIZE_128MB (0x20 << 0) +# define R128_AGP_APER_SIZE_64MB (0x30 << 0) +# define R128_AGP_APER_SIZE_32MB (0x38 << 0) +# define R128_AGP_APER_SIZE_16MB (0x3c << 0) +# define R128_AGP_APER_SIZE_8MB (0x3e << 0) +# define R128_AGP_APER_SIZE_4MB (0x3f << 0) +# define R128_AGP_APER_SIZE_MASK (0x3f << 0) #define R128_AGP_COMMAND 0x0f58 /* PCI */ #define R128_AGP_PLL_CNTL 0x0010 /* PLL */ #define R128_AGP_STATUS 0x0f54 /* PCI */ +# define R128_AGP_1X_MODE 0x01 +# define R128_AGP_2X_MODE 0x02 +# define R128_AGP_MODE_MASK 0x03 #define R128_AMCGPIO_A_REG 0x01a0 #define R128_AMCGPIO_EN_REG 0x01a8 #define R128_AMCGPIO_MASK 0x0194 @@ -169,6 +180,15 @@ static inline unsigned short regr16(volatile unsigned long base_addr, unsigned l #define R128_ATTRDR 0x03c1 /* VGA */ #define R128_ATTRDW 0x03c0 /* VGA */ #define R128_ATTRX 0x03c0 /* VGA */ +# define R128_AUX1_SC_EN (1 << 0) +# define R128_AUX1_SC_MODE_OR (0 << 1) +# define R128_AUX1_SC_MODE_NAND (1 << 1) +# define R128_AUX2_SC_EN (1 << 2) +# define R128_AUX2_SC_MODE_OR (0 << 3) +# define R128_AUX2_SC_MODE_NAND (1 << 3) +# define R128_AUX3_SC_EN (1 << 4) +# define R128_AUX3_SC_MODE_OR (0 << 5) +# define R128_AUX3_SC_MODE_NAND (1 << 5) #define R128_AUX_SC_CNTL 0x1660 #define R128_AUX1_SC_BOTTOM 0x1670 #define R128_AUX1_SC_LEFT 0x1664 @@ -257,11 +277,12 @@ static inline unsigned short regr16(volatile unsigned long base_addr, unsigned l #define R128_BRUSH_SCALE 0x1470 #define R128_BRUSH_Y_X 0x1474 #define R128_BUS_CNTL 0x0030 -# define R128_BUS_RD_DISCARD_EN (1 << 24) -# define R128_BUS_RD_ABORT_EN (1 << 25) -# define R128_BUS_MSTR_DISCONNECT_EN (1 << 28) -# define R128_BUS_WRT_BURST (1 << 29) -# define R128_BUS_READ_BURST (1 << 30) +# define R128_BUS_MASTER_DIS (1 << 6) +# define R128_BUS_RD_DISCARD_EN (1 << 24) +# define R128_BUS_RD_ABORT_EN (1 << 25) +# define R128_BUS_MSTR_DISCONNECT_EN (1 << 28) +# define R128_BUS_WRT_BURST (1 << 29) +# define R128_BUS_READ_BURST (1 << 30) #define R128_BUS_CNTL1 0x0034 #define R128_CACHE_CNTL 0x1724 @@ -297,6 +318,9 @@ static inline unsigned short regr16(volatile unsigned long base_addr, unsigned l #define R128_CONFIG_REG_APER_SIZE 0x0110 #define R128_CONFIG_XSTRAP 0x00e4 #define R128_CONSTANT_COLOR_C 0x1d34 +# define R128_CONSTANT_COLOR_MASK 0x00ffffff +# define R128_CONSTANT_COLOR_ONE 0x00ffffff +# define R128_CONSTANT_COLOR_ZERO 0x00000000 #define R128_CRC_CMDFIFO_ADDR 0x0740 #define R128_CRC_CMDFIFO_DOUT 0x0744 #define R128_CRTC_CRNT_FRAME 0x0214 @@ -360,8 +384,13 @@ static inline unsigned short regr16(volatile unsigned long base_addr, unsigned l #define R128_DEFAULT_SC_BOTTOM_RIGHT 0x16e8 # define R128_DEFAULT_SC_RIGHT_MAX (0x1fff << 0) # define R128_DEFAULT_SC_BOTTOM_MAX (0x1fff << 16) -#define R128_DESTINATION_3D_CLR_CMP_MSK 0x1824 +#define R128_FOG_3D_TABLE_START 0x1810 +#define R128_FOG_3D_TABLE_END 0x1814 +#define R128_FOG_3D_TABLE_DENSITY 0x181c +#define R128_FOG_TABLE_INDEX 0x1a14 +#define R128_FOG_TABLE_DATA 0x1a18 #define R128_DESTINATION_3D_CLR_CMP_VAL 0x1820 +#define R128_DESTINATION_3D_CLR_CMP_MSK 0x1824 #define R128_DEVICE_ID 0x0f02 /* PCI */ #define R128_DP_BRUSH_BKGD_CLR 0x1478 #define R128_DP_BRUSH_FRGD_CLR 0x147c @@ -373,6 +402,7 @@ static inline unsigned short regr16(volatile unsigned long base_addr, unsigned l # define R128_DST_Y_DIR_TOP_TO_BOTTOM (1 << 15) # define R128_DST_X_DIR_LEFT_TO_RIGHT (1 << 31) #define R128_DP_DATATYPE 0x16c4 +# define R128_HOST_BIG_ENDIAN_EN (1 << 29) #define R128_DP_GUI_MASTER_CNTL 0x146c # define R128_GMC_SRC_PITCH_OFFSET_CNTL (1 << 0) # define R128_GMC_DST_PITCH_OFFSET_CNTL (1 << 1) @@ -388,6 +418,19 @@ static inline unsigned short regr16(volatile unsigned long base_addr, unsigned l # define R128_GMC_BRUSH_8x8_COLOR (10 << 4) # define R128_GMC_BRUSH_1X8_COLOR (12 << 4) # define R128_GMC_BRUSH_SOLID_COLOR (13 << 4) +# define R128_GMC_BRUSH_NONE (15 << 4) +# define R128_GMC_DST_8BPP_CI (2 << 8) +# define R128_GMC_DST_15BPP (3 << 8) +# define R128_GMC_DST_16BPP (4 << 8) +# define R128_GMC_DST_24BPP (5 << 8) +# define R128_GMC_DST_32BPP (6 << 8) +# define R128_GMC_DST_8BPP_RGB (7 << 8) +# define R128_GMC_DST_Y8 (8 << 8) +# define R128_GMC_DST_RGB8 (9 << 8) +# define R128_GMC_DST_VYUY (11 << 8) +# define R128_GMC_DST_YVYU (12 << 8) +# define R128_GMC_DST_AYUV444 (14 << 8) +# define R128_GMC_DST_ARGB4444 (15 << 8) # define R128_GMC_DST_DATATYPE_MASK (0x0f << 8) # define R128_GMC_DST_DATATYPE_SHIFT 8 # define R128_GMC_SRC_DATATYPE_MASK (3 << 12) @@ -395,8 +438,11 @@ static inline unsigned short regr16(volatile unsigned long base_addr, unsigned l # define R128_GMC_SRC_DATATYPE_MONO_FG_LA (1 << 12) # define R128_GMC_SRC_DATATYPE_COLOR (3 << 12) # define R128_GMC_BYTE_PIX_ORDER (1 << 14) +# define R128_GMC_BYTE_MSB_TO_LSB (0 << 14) # define R128_GMC_BYTE_LSB_TO_MSB (1 << 14) # define R128_GMC_CONVERSION_TEMP (1 << 15) +# define R128_GMC_CONVERSION_TEMP_6500 (0 << 15) +# define R128_GMC_CONVERSION_TEMP_9300 (1 << 15) # define R128_GMC_ROP3_MASK (0xff << 16) # define R128_DP_SRC_SOURCE_MASK (7 << 24) # define R128_DP_SRC_SOURCE_MEMORY (2 << 24) @@ -404,7 +450,7 @@ static inline unsigned short regr16(volatile unsigned long base_addr, unsigned l # define R128_GMC_3D_FCN_EN (1 << 27) # define R128_GMC_CLR_CMP_CNTL_DIS (1 << 28) # define R128_AUX_CLIP_DIS (1 << 29) -# define R128_GMC_WR_MSK_DS (1 << 30) +# define R128_GMC_WR_MSK_DIS (1 << 30) # define R128_GMC_LD_BRUSH_Y_X (1 << 31) # define R128_ROP3_ZERO 0x00000000 # define R128_ROP3_DSa 0x00880000 @@ -456,6 +502,7 @@ static inline unsigned short regr16(volatile unsigned long base_addr, unsigned l #define R128_DST_PITCH 0x1408 #define R128_DST_PITCH_OFFSET 0x142c #define R128_DST_PITCH_OFFSET_C 0x1c80 +# define R128_PITCH_SHIFT 21 #define R128_DST_WIDTH 0x140c #define R128_DST_WIDTH_HEIGHT 0x1598 #define R128_DST_WIDTH_X 0x1588 @@ -573,7 +620,6 @@ static inline unsigned short regr16(volatile unsigned long base_addr, unsigned l #define R128_MEM_VGA_RP_SEL 0x003c #define R128_MEM_VGA_WP_SEL 0x0038 #define R128_MIN_GRANT 0x0f3e /* PCI */ -#define R128_MISC_3D_STATE_CNTL_REG 0x1CA0 #define R128_MM_DATA 0x0004 #define R128_MM_INDEX 0x0000 #define R128_MPLL_CNTL 0x000e /* PLL */ @@ -592,7 +638,10 @@ static inline unsigned short regr16(volatile unsigned long base_addr, unsigned l #define R128_PC_DEBUG_MODE 0x1760 #define R128_PC_GUI_CTLSTAT 0x1748 #define R128_PC_GUI_MODE 0x1744 +# define R128_PC_IGNORE_UNIFY (1 << 5) #define R128_PC_NGUI_CTLSTAT 0x0184 +# define R128_PC_FLUSH_GUI (3 << 0) +# define R128_PC_RI_GUI (1 << 2) # define R128_PC_FLUSH_ALL 0x00ff # define R128_PC_BUSY (1 << 31) #define R128_PC_NGUI_MODE 0x0180 @@ -689,6 +738,538 @@ static inline unsigned short regr16(volatile unsigned long base_addr, unsigned l #define R128_XDLL_CNTL 0x000c /* PLL */ #define R128_XPLL_CNTL 0x000b /* PLL */ + /* Registers for CCE and Microcode Engine */ +#define R128_PM4_MICROCODE_ADDR 0x07d4 +#define R128_PM4_MICROCODE_RADDR 0x07d8 +#define R128_PM4_MICROCODE_DATAH 0x07dc +#define R128_PM4_MICROCODE_DATAL 0x07e0 + +#define R128_PM4_BUFFER_OFFSET 0x0700 +#define R128_PM4_BUFFER_CNTL 0x0704 +# define R128_PM4_NONPM4 (0 << 28) +# define R128_PM4_192PIO (1 << 28) +# define R128_PM4_192BM (2 << 28) +# define R128_PM4_128PIO_64INDBM (3 << 28) +# define R128_PM4_128BM_64INDBM (4 << 28) +# define R128_PM4_64PIO_128INDBM (5 << 28) +# define R128_PM4_64BM_128INDBM (6 << 28) +# define R128_PM4_64PIO_64VCBM_64INDBM (7 << 28) +# define R128_PM4_64BM_64VCBM_64INDBM (8 << 28) +# define R128_PM4_64PIO_64VCPIO_64INDPIO (15 << 28) +#define R128_PM4_BUFFER_WM_CNTL 0x0708 +# define R128_WMA_SHIFT 0 +# define R128_WMB_SHIFT 8 +# define R128_WMC_SHIFT 16 +# define R128_WB_WM_SHIFT 24 +#define R128_PM4_BUFFER_DL_RPTR_ADDR 0x070c +#define R128_PM4_BUFFER_DL_RPTR 0x0710 +#define R128_PM4_BUFFER_DL_WPTR 0x0714 +# define R128_PM4_BUFFER_DL_DONE (1 << 31) +#define R128_PM4_VC_FPU_SETUP 0x071c +# define R128_FRONT_DIR_CW (0 << 0) +# define R128_FRONT_DIR_CCW (1 << 0) +# define R128_FRONT_DIR_MASK (1 << 0) +# define R128_BACKFACE_CULL (0 << 1) +# define R128_BACKFACE_POINTS (1 << 1) +# define R128_BACKFACE_LINES (2 << 1) +# define R128_BACKFACE_SOLID (3 << 1) +# define R128_BACKFACE_MASK (3 << 1) +# define R128_FRONTFACE_CULL (0 << 3) +# define R128_FRONTFACE_POINTS (1 << 3) +# define R128_FRONTFACE_LINES (2 << 3) +# define R128_FRONTFACE_SOLID (3 << 3) +# define R128_FRONTFACE_MASK (3 << 3) +# define R128_FPU_COLOR_SOLID (0 << 5) +# define R128_FPU_COLOR_FLAT (1 << 5) +# define R128_FPU_COLOR_GOURAUD (2 << 5) +# define R128_FPU_COLOR_GOURAUD2 (3 << 5) +# define R128_FPU_SUB_PIX_2BITS (0 << 7) +# define R128_FPU_SUB_PIX_4BITS (1 << 7) +# define R128_FPU_MODE_2D (0 << 8) +# define R128_FPU_MODE_3D (1 << 8) +# define R128_TRAP_BITS_DISABLE (1 << 9) +# define R128_EDGE_ANTIALIAS (1 << 10) +# define R128_SUPERSAMPLE (1 << 11) +# define R128_XFACTOR_2 (0 << 12) +# define R128_XFACTOR_4 (1 << 12) +# define R128_YFACTOR_2 (0 << 13) +# define R128_YFACTOR_4 (1 << 13) +# define R128_FLAT_SHADE_VERTEX_D3D (0 << 14) +# define R128_FLAT_SHADE_VERTEX_OGL (1 << 14) +# define R128_FPU_ROUND_TRUNCATE (0 << 15) +# define R128_FPU_ROUND_NEAREST (1 << 15) +# define R128_WM_SEL_8DW (0 << 16) +# define R128_WM_SEL_16DW (1 << 16) +# define R128_WM_SEL_32DW (2 << 16) +#define R128_PM4_STAT 0x07b8 +# define R128_PM4_FIFOCNT_MASK 0x0fff +# define R128_PM4_BUSY (1 << 16) +# define R128_PM4_GUI_ACTIVE (1 << 31) +#define R128_PM4_BUFFER_ADDR 0x07f0 +#define R128_PM4_MICRO_CNTL 0x07fc +# define R128_PM4_MICRO_FREERUN (1 << 30) +#define R128_PM4_FIFO_DATA_EVEN 0x1000 +#define R128_PM4_FIFO_DATA_ODD 0x1004 + #define R128_SCALE_3D_CNTL 0x1a00 +# define R128_SCALE_DITHER_ERR_DIFF (0 << 1) +# define R128_SCALE_DITHER_TABLE (1 << 1) +# define R128_TEX_CACHE_SIZE_FULL (0 << 2) +# define R128_TEX_CACHE_SIZE_HALF (1 << 2) +# define R128_DITHER_INIT_CURR (0 << 3) +# define R128_DITHER_INIT_RESET (1 << 3) +# define R128_ROUND_24BIT (1 << 4) +# define R128_TEX_CACHE_DISABLE (1 << 5) +# define R128_SCALE_3D_NOOP (0 << 6) +# define R128_SCALE_3D_SCALE (1 << 6) +# define R128_SCALE_3D_TEXMAP_SHADE (2 << 6) +# define R128_SCALE_PIX_BLEND (0 << 8) +# define R128_SCALE_PIX_REPLICATE (1 << 8) +# define R128_TEX_CACHE_SPLIT (1 << 9) +# define R128_APPLE_YUV_MODE (1 << 10) +# define R128_TEX_CACHE_PALLETE_MODE (1 << 11) +# define R128_ALPHA_COMB_ADD_CLAMP (0 << 12) +# define R128_ALPHA_COMB_ADD_NCLAMP (1 << 12) +# define R128_ALPHA_COMB_SUB_DST_SRC_CLAMP (2 << 12) +# define R128_ALPHA_COMB_SUB_DST_SRC_NCLAMP (3 << 12) +# define R128_FOG_TABLE (1 << 14) +# define R128_SIGNED_DST_CLAMP (1 << 15) +# define R128_ALPHA_BLEND_SRC_ZERO (0 << 16) +# define R128_ALPHA_BLEND_SRC_ONE (1 << 16) +# define R128_ALPHA_BLEND_SRC_SRCCOLOR (2 << 16) +# define R128_ALPHA_BLEND_SRC_INVSRCCOLOR (3 << 16) +# define R128_ALPHA_BLEND_SRC_SRCALPHA (4 << 16) +# define R128_ALPHA_BLEND_SRC_INVSRCALPHA (5 << 16) +# define R128_ALPHA_BLEND_SRC_DSTALPHA (6 << 16) +# define R128_ALPHA_BLEND_SRC_INVDSTALPHA (7 << 16) +# define R128_ALPHA_BLEND_SRC_DSTCOLOR (8 << 16) +# define R128_ALPHA_BLEND_SRC_INVDSTCOLOR (9 << 16) +# define R128_ALPHA_BLEND_SRC_SAT (10 << 16) +# define R128_ALPHA_BLEND_SRC_BLEND (11 << 16) +# define R128_ALPHA_BLEND_SRC_INVBLEND (12 << 16) +# define R128_ALPHA_BLEND_DST_ZERO (0 << 20) +# define R128_ALPHA_BLEND_DST_ONE (1 << 20) +# define R128_ALPHA_BLEND_DST_SRCCOLOR (2 << 20) +# define R128_ALPHA_BLEND_DST_INVSRCCOLOR (3 << 20) +# define R128_ALPHA_BLEND_DST_SRCALPHA (4 << 20) +# define R128_ALPHA_BLEND_DST_INVSRCALPHA (5 << 20) +# define R128_ALPHA_BLEND_DST_DSTALPHA (6 << 20) +# define R128_ALPHA_BLEND_DST_INVDSTALPHA (7 << 20) +# define R128_ALPHA_BLEND_DST_DSTCOLOR (8 << 20) +# define R128_ALPHA_BLEND_DST_INVDSTCOLOR (9 << 20) +# define R128_ALPHA_TEST_NEVER (0 << 24) +# define R128_ALPHA_TEST_LESS (1 << 24) +# define R128_ALPHA_TEST_LESSEQUAL (2 << 24) +# define R128_ALPHA_TEST_EQUAL (3 << 24) +# define R128_ALPHA_TEST_GREATEREQUAL (4 << 24) +# define R128_ALPHA_TEST_GREATER (5 << 24) +# define R128_ALPHA_TEST_NEQUAL (6 << 24) +# define R128_ALPHA_TEST_ALWAYS (7 << 24) +# define R128_COMPOSITE_SHADOW_CMP_EQUAL (0 << 28) +# define R128_COMPOSITE_SHADOW_CMP_NEQUAL (1 << 28) +# define R128_COMPOSITE_SHADOW (1 << 29) +# define R128_TEX_MAP_ALPHA_IN_TEXTURE (1 << 30) +# define R128_TEX_CACHE_LINE_SIZE_8QW (0 << 31) +# define R128_TEX_CACHE_LINE_SIZE_4QW (1 << 31) + +#define R128_SETUP_CNTL 0x1bc4 +# define R128_DONT_START_TRIANGLE (1 << 0) +# define R128_Z_BIAS (0 << 1) +# define R128_DONT_START_ANY_ON (1 << 2) +# define R128_COLOR_SOLID_COLOR (0 << 3) +# define R128_COLOR_FLAT_VERT_1 (1 << 3) +# define R128_COLOR_FLAT_VERT_2 (2 << 3) +# define R128_COLOR_FLAT_VERT_3 (3 << 3) +# define R128_COLOR_GOURAUD (4 << 3) +# define R128_PRIM_TYPE_TRI (0 << 7) +# define R128_PRIM_TYPE_LINE (1 << 7) +# define R128_PRIM_TYPE_POINT (2 << 7) +# define R128_PRIM_TYPE_POLY_EDGE (3 << 7) +# define R128_TEXTURE_ST_MULT_W (0 << 9) +# define R128_TEXTURE_ST_DIRECT (1 << 9) +# define R128_STARTING_VERTEX_1 (1 << 14) +# define R128_STARTING_VERTEX_2 (2 << 14) +# define R128_STARTING_VERTEX_3 (3 << 14) +# define R128_ENDING_VERTEX_1 (1 << 16) +# define R128_ENDING_VERTEX_2 (2 << 16) +# define R128_ENDING_VERTEX_3 (3 << 16) +# define R128_SU_POLY_LINE_LAST (0 << 18) +# define R128_SU_POLY_LINE_NOT_LAST (1 << 18) +# define R128_SUB_PIX_2BITS (0 << 19) +# define R128_SUB_PIX_4BITS (1 << 19) +# define R128_SET_UP_CONTINUE (1 << 31) + +#define R128_WINDOW_XY_OFFSET 0x1bcc +# define R128_WINDOW_Y_SHIFT 4 +# define R128_WINDOW_X_SHIFT 20 + +#define R128_Z_OFFSET_C 0x1c90 +#define R128_Z_PITCH_C 0x1c94 +#define R128_Z_STEN_CNTL_C 0x1c98 +# define R128_Z_PIX_WIDTH_16 (0 << 1) +# define R128_Z_PIX_WIDTH_24 (1 << 1) +# define R128_Z_PIX_WIDTH_32 (2 << 1) +# define R128_Z_PIX_WIDTH_MASK (3 << 1) +# define R128_Z_TEST_NEVER (0 << 4) +# define R128_Z_TEST_LESS (1 << 4) +# define R128_Z_TEST_LESSEQUAL (2 << 4) +# define R128_Z_TEST_EQUAL (3 << 4) +# define R128_Z_TEST_GREATEREQUAL (4 << 4) +# define R128_Z_TEST_GREATER (5 << 4) +# define R128_Z_TEST_NEQUAL (6 << 4) +# define R128_Z_TEST_ALWAYS (7 << 4) +# define R128_Z_TEST_MASK (7 << 4) +# define R128_STENCIL_TEST_NEVER (0 << 12) +# define R128_STENCIL_TEST_LESS (1 << 12) +# define R128_STENCIL_TEST_LESSEQUAL (2 << 12) +# define R128_STENCIL_TEST_EQUAL (3 << 12) +# define R128_STENCIL_TEST_GREATEREQUAL (4 << 12) +# define R128_STENCIL_TEST_GREATER (5 << 12) +# define R128_STENCIL_TEST_NEQUAL (6 << 12) +# define R128_STENCIL_TEST_ALWAYS (7 << 12) +# define R128_STENCIL_S_FAIL_KEEP (0 << 16) +# define R128_STENCIL_S_FAIL_ZERO (1 << 16) +# define R128_STENCIL_S_FAIL_REPLACE (2 << 16) +# define R128_STENCIL_S_FAIL_INC (3 << 16) +# define R128_STENCIL_S_FAIL_DEC (4 << 16) +# define R128_STENCIL_S_FAIL_INV (5 << 16) +# define R128_STENCIL_ZPASS_KEEP (0 << 20) +# define R128_STENCIL_ZPASS_ZERO (1 << 20) +# define R128_STENCIL_ZPASS_REPLACE (2 << 20) +# define R128_STENCIL_ZPASS_INC (3 << 20) +# define R128_STENCIL_ZPASS_DEC (4 << 20) +# define R128_STENCIL_ZPASS_INV (5 << 20) +# define R128_STENCIL_ZFAIL_KEEP (0 << 24) +# define R128_STENCIL_ZFAIL_ZERO (1 << 24) +# define R128_STENCIL_ZFAIL_REPLACE (2 << 24) +# define R128_STENCIL_ZFAIL_INC (3 << 24) +# define R128_STENCIL_ZFAIL_DEC (4 << 24) +# define R128_STENCIL_ZFAIL_INV (5 << 24) +#define R128_TEX_CNTL_C 0x1c9c +# define R128_Z_ENABLE (1 << 0) +# define R128_Z_WRITE_ENABLE (1 << 1) +# define R128_STENCIL_ENABLE (1 << 3) +# define R128_SHADE_ENABLE (0 << 4) +# define R128_TEXMAP_ENABLE (1 << 4) +# define R128_SEC_TEXMAP_ENABLE (1 << 5) +# define R128_FOG_ENABLE (1 << 7) +# define R128_DITHER_ENABLE (1 << 8) +# define R128_ALPHA_ENABLE (1 << 9) +# define R128_ALPHA_TEST_ENABLE (1 << 10) +# define R128_SPEC_LIGHT_ENABLE (1 << 11) +# define R128_TEX_CHROMA_KEY_ENABLE (1 << 12) +# define R128_ALPHA_IN_TEX_COMPLETE_A (0 << 13) +# define R128_ALPHA_IN_TEX_LSB_A (1 << 13) +# define R128_LIGHT_DIS (0 << 14) +# define R128_LIGHT_COPY (1 << 14) +# define R128_LIGHT_MODULATE (2 << 14) +# define R128_LIGHT_ADD (3 << 14) +# define R128_LIGHT_BLEND_CONSTANT (4 << 14) +# define R128_LIGHT_BLEND_TEXTURE (5 << 14) +# define R128_LIGHT_BLEND_VERTEX (6 << 14) +# define R128_LIGHT_BLEND_CONST_COLOR (7 << 14) +# define R128_ALPHA_LIGHT_DIS (0 << 18) +# define R128_ALPHA_LIGHT_COPY (1 << 18) +# define R128_ALPHA_LIGHT_MODULATE (2 << 18) +# define R128_ALPHA_LIGHT_ADD (3 << 18) +# define R128_ANTI_ALIAS (1 << 21) +# define R128_TEX_CACHE_FLUSH (1 << 23) +# define R128_LOD_BIAS_SHIFT 24 +#define R128_MISC_3D_STATE_CNTL_REG 0x1ca0 +# define R128_REF_ALPHA_MASK 0xff +# define R128_MISC_SCALE_3D_NOOP (0 << 8) +# define R128_MISC_SCALE_3D_SCALE (1 << 8) +# define R128_MISC_SCALE_3D_TEXMAP_SHADE (2 << 8) +# define R128_MISC_SCALE_PIX_BLEND (0 << 10) +# define R128_MISC_SCALE_PIX_REPLICATE (1 << 10) +# define R128_ALPHA_COMB_ADD_CLAMP (0 << 12) +# define R128_ALPHA_COMB_ADD_NO_CLAMP (1 << 12) +# define R128_ALPHA_COMB_SUB_SRC_DST_CLAMP (2 << 12) +# define R128_ALPHA_COMB_SUB_SRC_DST_NO_CLAMP (3 << 12) +# define R128_FOG_VERTEX (0 << 14) +# define R128_FOG_TABLE (1 << 14) +# define R128_ALPHA_BLEND_SRC_ZERO (0 << 16) +# define R128_ALPHA_BLEND_SRC_ONE (1 << 16) +# define R128_ALPHA_BLEND_SRC_SRCCOLOR (2 << 16) +# define R128_ALPHA_BLEND_SRC_INVSRCCOLOR (3 << 16) +# define R128_ALPHA_BLEND_SRC_SRCALPHA (4 << 16) +# define R128_ALPHA_BLEND_SRC_INVSRCALPHA (5 << 16) +# define R128_ALPHA_BLEND_SRC_DESTALPHA (6 << 16) +# define R128_ALPHA_BLEND_SRC_INVDESTALPHA (7 << 16) +# define R128_ALPHA_BLEND_SRC_DESTCOLOR (8 << 16) +# define R128_ALPHA_BLEND_SRC_INVDESTCOLOR (9 << 16) +# define R128_ALPHA_BLEND_SRC_SRCALPHASAT (10 << 16) +# define R128_ALPHA_BLEND_SRC_BOTHSRCALPHA (11 << 16) +# define R128_ALPHA_BLEND_SRC_BOTHINVSRCALPHA (12 << 16) +# define R128_ALPHA_BLEND_SRC_MASK (15 << 16) +# define R128_ALPHA_BLEND_DST_ZERO (0 << 20) +# define R128_ALPHA_BLEND_DST_ONE (1 << 20) +# define R128_ALPHA_BLEND_DST_SRCCOLOR (2 << 20) +# define R128_ALPHA_BLEND_DST_INVSRCCOLOR (3 << 20) +# define R128_ALPHA_BLEND_DST_SRCALPHA (4 << 20) +# define R128_ALPHA_BLEND_DST_INVSRCALPHA (5 << 20) +# define R128_ALPHA_BLEND_DST_DESTALPHA (6 << 20) +# define R128_ALPHA_BLEND_DST_INVDESTALPHA (7 << 20) +# define R128_ALPHA_BLEND_DST_DESTCOLOR (8 << 20) +# define R128_ALPHA_BLEND_DST_INVDESTCOLOR (9 << 20) +# define R128_ALPHA_BLEND_DST_SRCALPHASAT (10 << 20) +# define R128_ALPHA_BLEND_DST_MASK (15 << 20) +# define R128_ALPHA_TEST_NEVER (0 << 24) +# define R128_ALPHA_TEST_LESS (1 << 24) +# define R128_ALPHA_TEST_LESSEQUAL (2 << 24) +# define R128_ALPHA_TEST_EQUAL (3 << 24) +# define R128_ALPHA_TEST_GREATEREQUAL (4 << 24) +# define R128_ALPHA_TEST_GREATER (5 << 24) +# define R128_ALPHA_TEST_NEQUAL (6 << 24) +# define R128_ALPHA_TEST_ALWAYS (7 << 24) +# define R128_ALPHA_TEST_MASK (7 << 24) +#define R128_TEXTURE_CLR_CMP_CLR_C 0x1ca4 +#define R128_TEXTURE_CLR_CMP_MSK_C 0x1ca8 +#define R128_FOG_COLOR_C 0x1cac +# define R128_FOG_BLUE_SHIFT 0 +# define R128_FOG_GREEN_SHIFT 8 +# define R128_FOG_RED_SHIFT 16 +#define R128_PRIM_TEX_CNTL_C 0x1cb0 +# define R128_MIN_BLEND_NEAREST (0 << 1) +# define R128_MIN_BLEND_LINEAR (1 << 1) +# define R128_MIN_BLEND_MIPNEAREST (2 << 1) +# define R128_MIN_BLEND_MIPLINEAR (3 << 1) +# define R128_MIN_BLEND_LINEARMIPNEAREST (4 << 1) +# define R128_MIN_BLEND_LINEARMIPLINEAR (5 << 1) +# define R128_MIN_BLEND_MASK (7 << 1) +# define R128_MAG_BLEND_NEAREST (0 << 4) +# define R128_MAG_BLEND_LINEAR (1 << 4) +# define R128_MAG_BLEND_MASK (7 << 4) +# define R128_MIP_MAP_DISABLE (1 << 7) +# define R128_TEX_CLAMP_S_WRAP (0 << 8) +# define R128_TEX_CLAMP_S_MIRROR (1 << 8) +# define R128_TEX_CLAMP_S_CLAMP (2 << 8) +# define R128_TEX_CLAMP_S_BORDER_COLOR (3 << 8) +# define R128_TEX_CLAMP_S_MASK (3 << 8) +# define R128_TEX_WRAP_S (1 << 10) +# define R128_TEX_CLAMP_T_WRAP (0 << 11) +# define R128_TEX_CLAMP_T_MIRROR (1 << 11) +# define R128_TEX_CLAMP_T_CLAMP (2 << 11) +# define R128_TEX_CLAMP_T_BORDER_COLOR (3 << 11) +# define R128_TEX_CLAMP_T_MASK (3 << 11) +# define R128_TEX_WRAP_T (1 << 13) +# define R128_TEX_PERSPECTIVE_DISABLE (1 << 14) +# define R128_DATATYPE_VQ (0 << 16) +# define R128_DATATYPE_CI4 (1 << 16) +# define R128_DATATYPE_CI8 (2 << 16) +# define R128_DATATYPE_ARGB1555 (3 << 16) +# define R128_DATATYPE_RGB565 (4 << 16) +# define R128_DATATYPE_RGB888 (5 << 16) +# define R128_DATATYPE_ARGB8888 (6 << 16) +# define R128_DATATYPE_RGB332 (7 << 16) +# define R128_DATATYPE_Y8 (8 << 16) +# define R128_DATATYPE_RGB8 (9 << 16) +# define R128_DATATYPE_CI16 (10 << 16) +# define R128_DATATYPE_YUV422 (11 << 16) +# define R128_DATATYPE_YUV422_2 (12 << 16) +# define R128_DATATYPE_AYUV444 (14 << 16) +# define R128_DATATYPE_ARGB4444 (15 << 16) +# define R128_PALLETE_EITHER (0 << 20) +# define R128_PALLETE_1 (1 << 20) +# define R128_PALLETE_2 (2 << 20) +# define R128_PSEUDOCOLOR_DT_RGB565 (0 << 24) +# define R128_PSEUDOCOLOR_DT_ARGB1555 (1 << 24) +# define R128_PSEUDOCOLOR_DT_ARGB4444 (2 << 24) +#define R128_PRIM_TEXTURE_COMBINE_CNTL_C 0x1cb4 +# define R128_COMB_DIS (0 << 0) +# define R128_COMB_COPY (1 << 0) +# define R128_COMB_COPY_INP (2 << 0) +# define R128_COMB_MODULATE (3 << 0) +# define R128_COMB_MODULATE2X (4 << 0) +# define R128_COMB_MODULATE4X (5 << 0) +# define R128_COMB_ADD (6 << 0) +# define R128_COMB_ADD_SIGNED (7 << 0) +# define R128_COMB_BLEND_VERTEX (8 << 0) +# define R128_COMB_BLEND_TEXTURE (9 << 0) +# define R128_COMB_BLEND_CONST (10 << 0) +# define R128_COMB_BLEND_PREMULT (11 << 0) +# define R128_COMB_BLEND_PREV (12 << 0) +# define R128_COMB_BLEND_PREMULT_INV (13 << 0) +# define R128_COMB_ADD_SIGNED2X (14 << 0) +# define R128_COMB_BLEND_CONST_COLOR (15 << 0) +# define R128_COMB_MASK (15 << 0) +# define R128_COLOR_FACTOR_TEX (4 << 4) +# define R128_COLOR_FACTOR_NTEX (5 << 4) +# define R128_COLOR_FACTOR_ALPHA (6 << 4) +# define R128_COLOR_FACTOR_NALPHA (7 << 4) +# define R128_COLOR_FACTOR_MASK (15 << 4) +# define R128_INPUT_FACTOR_CONST_COLOR (2 << 10) +# define R128_INPUT_FACTOR_CONST_ALPHA (3 << 10) +# define R128_INPUT_FACTOR_INT_COLOR (4 << 10) +# define R128_INPUT_FACTOR_INT_ALPHA (5 << 10) +# define R128_INPUT_FACTOR_MASK (15 << 10) +# define R128_COMB_ALPHA_DIS (0 << 14) +# define R128_COMB_ALPHA_COPY (1 << 14) +# define R128_COMB_ALPHA_COPY_INP (2 << 14) +# define R128_COMB_ALPHA_MODULATE (3 << 14) +# define R128_COMB_ALPHA_MODULATE2X (4 << 14) +# define R128_COMB_ALPHA_MODULATE4X (5 << 14) +# define R128_COMB_ALPHA_ADD (6 << 14) +# define R128_COMB_ALPHA_ADD_SIGNED (7 << 14) +# define R128_COMB_ALPHA_ADD_SIGNED2X (14 << 14) +# define R128_COMB_ALPHA_MASK (15 << 14) +# define R128_ALPHA_FACTOR_TEX_ALPHA (6 << 18) +# define R128_ALPHA_FACTOR_NTEX_ALPHA (7 << 18) +# define R128_ALPHA_FACTOR_MASK (15 << 18) +# define R128_INP_FACTOR_A_CONST_ALPHA (1 << 25) +# define R128_INP_FACTOR_A_INT_ALPHA (2 << 25) +# define R128_INP_FACTOR_A_MASK (7 << 25) +#define R128_TEX_SIZE_PITCH_C 0x1cb8 +# define R128_TEX_PITCH_SHIFT 0 +# define R128_TEX_SIZE_SHIFT 4 +# define R128_TEX_HEIGHT_SHIFT 8 +# define R128_TEX_MIN_SIZE_SHIFT 12 +# define R128_SEC_TEX_PITCH_SHIFT 16 +# define R128_SEC_TEX_SIZE_SHIFT 20 +# define R128_SEC_TEX_HEIGHT_SHIFT 24 +# define R128_SEC_TEX_MIN_SIZE_SHIFT 28 +# define R128_TEX_PITCH_MASK (0x0f << 0) +# define R128_TEX_SIZE_MASK (0x0f << 4) +# define R128_TEX_HEIGHT_MASK (0x0f << 8) +# define R128_TEX_MIN_SIZE_MASK (0x0f << 12) +# define R128_SEC_TEX_PITCH_MASK (0x0f << 16) +# define R128_SEC_TEX_SIZE_MASK (0x0f << 20) +# define R128_SEC_TEX_HEIGHT_MASK (0x0f << 24) +# define R128_SEC_TEX_MIN_SIZE_MASK (0x0f << 28) +# define R128_TEX_SIZE_PITCH_SHIFT 0 +# define R128_SEC_TEX_SIZE_PITCH_SHIFT 16 +# define R128_TEX_SIZE_PITCH_MASK (0xffff << 0) +# define R128_SEC_TEX_SIZE_PITCH_MASK (0xffff << 16) +#define R128_PRIM_TEX_0_OFFSET_C 0x1cbc +#define R128_PRIM_TEX_1_OFFSET_C 0x1cc0 +#define R128_PRIM_TEX_2_OFFSET_C 0x1cc4 +#define R128_PRIM_TEX_3_OFFSET_C 0x1cc8 +#define R128_PRIM_TEX_4_OFFSET_C 0x1ccc +#define R128_PRIM_TEX_5_OFFSET_C 0x1cd0 +#define R128_PRIM_TEX_6_OFFSET_C 0x1cd4 +#define R128_PRIM_TEX_7_OFFSET_C 0x1cd8 +#define R128_PRIM_TEX_8_OFFSET_C 0x1cdc +#define R128_PRIM_TEX_9_OFFSET_C 0x1ce0 +#define R128_PRIM_TEX_10_OFFSET_C 0x1ce4 +# define R128_TEX_NO_TILE (0 << 30) +# define R128_TEX_TILED_BY_HOST (1 << 30) +# define R128_TEX_TILED_BY_STORAGE (2 << 30) +# define R128_TEX_TILED_BY_STORAGE2 (3 << 30) + +#define R128_SEC_TEX_CNTL_C 0x1d00 +# define R128_SEC_SELECT_PRIM_ST (0 << 0) +# define R128_SEC_SELECT_SEC_ST (1 << 0) +#define R128_SEC_TEX_COMBINE_CNTL_C 0x1d04 +# define R128_INPUT_FACTOR_PREV_COLOR (8 << 10) +# define R128_INPUT_FACTOR_PREV_ALPHA (9 << 10) +# define R128_INP_FACTOR_A_PREV_ALPHA (4 << 25) +#define R128_SEC_TEX_0_OFFSET_C 0x1d08 +#define R128_SEC_TEX_1_OFFSET_C 0x1d0c +#define R128_SEC_TEX_2_OFFSET_C 0x1d10 +#define R128_SEC_TEX_3_OFFSET_C 0x1d14 +#define R128_SEC_TEX_4_OFFSET_C 0x1d18 +#define R128_SEC_TEX_5_OFFSET_C 0x1d1c +#define R128_SEC_TEX_6_OFFSET_C 0x1d20 +#define R128_SEC_TEX_7_OFFSET_C 0x1d24 +#define R128_SEC_TEX_8_OFFSET_C 0x1d28 +#define R128_SEC_TEX_9_OFFSET_C 0x1d2c +#define R128_SEC_TEX_10_OFFSET_C 0x1d30 +#define R128_CONSTANT_COLOR_C 0x1d34 +# define R128_CONSTANT_BLUE_SHIFT 0 +# define R128_CONSTANT_GREEN_SHIFT 8 +# define R128_CONSTANT_RED_SHIFT 16 +# define R128_CONSTANT_ALPHA_SHIFT 24 +#define R128_PRIM_TEXTURE_BORDER_COLOR_C 0x1d38 +# define R128_PRIM_TEX_BORDER_BLUE_SHIFT 0 +# define R128_PRIM_TEX_BORDER_GREEN_SHIFT 8 +# define R128_PRIM_TEX_BORDER_RED_SHIFT 16 +# define R128_PRIM_TEX_BORDER_ALPHA_SHIFT 24 +#define R128_SEC_TEXTURE_BORDER_COLOR_C 0x1d3c +# define R128_SEC_TEX_BORDER_BLUE_SHIFT 0 +# define R128_SEC_TEX_BORDER_GREEN_SHIFT 8 +# define R128_SEC_TEX_BORDER_RED_SHIFT 16 +# define R128_SEC_TEX_BORDER_ALPHA_SHIFT 24 +#define R128_STEN_REF_MASK_C 0x1d40 +# define R128_STEN_REFERENCE_SHIFT 0 +# define R128_STEN_MASK_SHIFT 16 +# define R128_STEN_WRITE_MASK_SHIFT 24 +#define R128_PLANE_3D_MASK_C 0x1d44 + + + /* Constants */ +#define R128_AGP_TEX_OFFSET 0x02000000 + +#define R128_VB_AGE_REG R128_GUI_SCRATCH_REG0 +#define R128_SWAP_AGE_REG R128_GUI_SCRATCH_REG1 + + /* CCE packet types */ +#define R128_CCE_PACKET0 0x00000000 +#define R128_CCE_PACKET0_ONE_REG_WR 0x00008000 +#define R128_CCE_PACKET1 0x40000000 +#define R128_CCE_PACKET2 0x80000000 +#define R128_CCE_PACKET3_NOP 0xC0001000 +#define R128_CCE_PACKET3_PAINT 0xC0001100 +#define R128_CCE_PACKET3_BITBLT 0xC0001200 +#define R128_CCE_PACKET3_SMALLTEXT 0xC0001300 +#define R128_CCE_PACKET3_HOSTDATA_BLT 0xC0001400 +#define R128_CCE_PACKET3_POLYLINE 0xC0001500 +#define R128_CCE_PACKET3_SCALING 0xC0001600 +#define R128_CCE_PACKET3_TRANS_SCALING 0xC0001700 +#define R128_CCE_PACKET3_POLYSCANLINES 0xC0001800 +#define R128_CCE_PACKET3_NEXT_CHAR 0xC0001900 +#define R128_CCE_PACKET3_PAINT_MULTI 0xC0001A00 +#define R128_CCE_PACKET3_BITBLT_MULTI 0xC0001B00 +#define R128_CCE_PACKET3_PLY_NEXTSCAN 0xC0001D00 +#define R128_CCE_PACKET3_SET_SCISSORS 0xC0001E00 +#define R128_CCE_PACKET3_SET_MODE24BPP 0xC0001F00 +#define R128_CCE_PACKET3_CNTL_PAINT 0xC0009100 +#define R128_CCE_PACKET3_CNTL_BITBLT 0xC0009200 +#define R128_CCE_PACKET3_CNTL_SMALLTEXT 0xC0009300 +#define R128_CCE_PACKET3_CNTL_HOSTDATA_BLT 0xC0009400 +#define R128_CCE_PACKET3_CNTL_POLYLINE 0xC0009500 +#define R128_CCE_PACKET3_CNTL_SCALING 0xC0009600 +#define R128_CCE_PACKET3_CNTL_TRANS_SCALING 0xC0009700 +#define R128_CCE_PACKET3_CNTL_POLYSCANLINES 0xC0009800 +#define R128_CCE_PACKET3_CNTL_NEXT_CHAR 0xC0009900 +#define R128_CCE_PACKET3_CNTL_PAINT_MULTI 0xC0009A00 +#define R128_CCE_PACKET3_CNTL_BITBLT_MULTI 0xC0009B00 +#define R128_CCE_PACKET3_CNTL_TRANS_BITBLT 0xC0009C00 +#define R128_CCE_PACKET3_3D_SAVE_CONTEXT 0xC0002000 +#define R128_CCE_PACKET3_3D_PLAY_CONTEXT 0xC0002100 +#define R128_CCE_PACKET3_3D_RNDR_GEN_INDX_PRIM 0xC0002300 +#define R128_CCE_PACKET3_3D_RNDR_GEN_PRIM 0xC0002500 +#define R128_CCE_PACKET3_LOAD_PALETTE 0xC0002C00 +#define R128_CCE_PACKET3_PURGE 0xC0002D00 +#define R128_CCE_PACKET3_NEXT_VERTEX_BUNDLE 0xC0002E00 +# define R128_CCE_PACKET_MASK 0xC0000000 +# define R128_CCE_PACKET_COUNT_MASK 0x3fff0000 +# define R128_CCE_PACKET_MAX_DWORDS (1 << 14) +# define R128_CCE_PACKET0_REG_MASK 0x000007ff +# define R128_CCE_PACKET1_REG0_MASK 0x000007ff +# define R128_CCE_PACKET1_REG1_MASK 0x003ff800 + +#define R128_CCE_VC_FRMT_RHW 0x00000001 +#define R128_CCE_VC_FRMT_DIFFUSE_BGR 0x00000002 +#define R128_CCE_VC_FRMT_DIFFUSE_A 0x00000004 +#define R128_CCE_VC_FRMT_DIFFUSE_ARGB 0x00000008 +#define R128_CCE_VC_FRMT_SPEC_BGR 0x00000010 +#define R128_CCE_VC_FRMT_SPEC_F 0x00000020 +#define R128_CCE_VC_FRMT_SPEC_FRGB 0x00000040 +#define R128_CCE_VC_FRMT_S_T 0x00000080 +#define R128_CCE_VC_FRMT_S2_T2 0x00000100 +#define R128_CCE_VC_FRMT_RHW2 0x00000200 + +#define R128_CCE_VC_CNTL_PRIM_TYPE_NONE 0x00000000 +#define R128_CCE_VC_CNTL_PRIM_TYPE_POINT 0x00000001 +#define R128_CCE_VC_CNTL_PRIM_TYPE_LINE 0x00000002 +#define R128_CCE_VC_CNTL_PRIM_TYPE_POLY_LINE 0x00000003 +#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_LIST 0x00000004 +#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_FAN 0x00000005 +#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_STRIP 0x00000006 +#define R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 0x00000007 +#define R128_CCE_VC_CNTL_PRIM_WALK_IND 0x00000010 +#define R128_CCE_VC_CNTL_PRIM_WALK_LIST 0x00000020 +#define R128_CCE_VC_CNTL_PRIM_WALK_RING 0x00000030 +#define R128_CCE_VC_CNTL_NUM_SHIFT 16 #endif diff --git a/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_sarea.h b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_sarea.h new file mode 100644 index 000000000..c5d99df34 --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/drivers/r128/r128_sarea.h @@ -0,0 +1,77 @@ +/* $XFree86$ */ +/************************************************************************** + +Copyright 1999, 2000 ATI Technologies Inc. and Precision Insight, Inc., + Cedar Park, Texas. +All Rights Reserved. + +Permission is hereby granted, free of charge, to any person obtaining a +copy of this software and associated documentation files (the "Software"), +to deal in the Software without restriction, including without limitation +on the rights to use, copy, modify, merge, publish, distribute, sub +license, and/or sell copies of the Software, and to permit persons to whom +the Software is furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice (including the next +paragraph) shall be included in all copies or substantial portions of the +Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL +ATI, PRECISION INSIGHT AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, +DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR +OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE +USE OR OTHER DEALINGS IN THE SOFTWARE. + +**************************************************************************/ + +/* + * Authors: + * Kevin E. Martin <kevin@precisioninsight.com> + * + */ + +#ifndef _R128_SAREA_H_ +#define _R128_SAREA_H_ + +/* There are 2 heaps (local/AGP). Each region within a heap is a + minimum of 64k, and there are at most 64 of them per heap. */ +#define R128_LOCAL_TEX_HEAP 0 +#define R128_AGP_TEX_HEAP 1 +#define R128_NR_TEX_HEAPS 2 +#define R128_NR_TEX_REGIONS 64 +#define R128_LOG_TEX_GRANULARITY 16 + +typedef struct { + unsigned char next, prev; /* indices to form a circular LRU */ + unsigned char in_use; /* owned by a client, or free? */ + int age; /* tracked by clients to update local LRU's */ +} R128TexRegion; + +typedef struct { + /* Maintain an LRU of contiguous regions of texture space. If you + * think you own a region of texture memory, and it has an age + * different to the one you set, then you are mistaken and it has + * been stolen by another client. If global texAge hasn't changed, + * there is no need to walk the list. + * + * These regions can be used as a proxy for the fine-grained texture + * information of other clients - by maintaining them in the same + * lru which is used to age their own textures, clients have an + * approximate lru for the whole of global texture space, and can + * make informed decisions as to which areas to kick out. There is + * no need to choose whether to kick out your own texture or someone + * else's - simply eject them all in LRU order. + */ + /* Last elt is sentinal */ + R128TexRegion texList[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS+1]; + /* last time texture was uploaded */ + int texAge[R128_NR_TEX_HEAPS]; + + int ctxOwner; /* last context to upload state */ + + int ringWrite; /* current ring buffer write index */ +} R128SAREAPriv, *R128SAREAPrivPtr; + +#endif diff --git a/xc/programs/Xserver/hw/xfree86/os-support/Imakefile b/xc/programs/Xserver/hw/xfree86/os-support/Imakefile index 7041d435a..c42f5b2b7 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/Imakefile +++ b/xc/programs/Xserver/hw/xfree86/os-support/Imakefile @@ -100,6 +100,7 @@ OS_SUBDIR = sco #if BuildXF86DRI && !DoLoadableServer DRM_SRC = $(OS_SUBDIR)/drm/?*.c DRM_OBJ = $(OS_SUBDIR)/drm/?*.o +DRM_DONES = $(OS_SUBDIR)/drm/DONE #endif SUBDIRS = $(OS_SUBDIR) $(BUS_SUBDIR) misc vbe @@ -107,7 +108,7 @@ SUBDIRS = $(OS_SUBDIR) $(BUS_SUBDIR) misc vbe SRCS = $(OS_SUBDIR)/?*.c $(BUS_SUBDIR)/?*.c misc/?*.c vbe/?*.c $(DRM_SRC) OBJS = $(OS_SUBDIR)/?*.o $(BUS_SUBDIR)/?*.o misc/?*.o vbe/?*.o $(DRM_OBJ) -DONES = $(OS_SUBDIR)/DONE $(BUS_SUBDIR)/DONE misc/DONE vbe/DONE +DONES = $(OS_SUBDIR)/DONE $(BUS_SUBDIR)/DONE misc/DONE vbe/DONE $(DRM_DONES) #if HasParallelMake MakeMutex($(SUBDIRS) $(OBJS) $(DONES)) diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/Imakefile b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/Imakefile index 0d413c5c8..4639b530d 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/Imakefile +++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/Imakefile @@ -14,8 +14,8 @@ MOBJ = drmmodule.o MTRR_DEFINES = -DHAS_MTRR_SUPPORT #endif -SRCS = xf86drm.c xf86drmHash.c xf86drmRandom.c xf86drmSL.c xf86drmI810.c xf86drmMga.c $(MSRC) -OBJS = xf86drm.o xf86drmHash.o xf86drmRandom.o xf86drmSL.o xf86drmI810.o xf86drmMga.o $(MOBJ) +SRCS = xf86drm.c xf86drmHash.c xf86drmRandom.c xf86drmSL.c xf86drmI810.c xf86drmMga.c xf86drmR128.c $(MSRC) +OBJS = xf86drm.o xf86drmHash.o xf86drmRandom.o xf86drmSL.o xf86drmI810.o xf86drmMga.o xf86drmR128.o $(MOBJ) INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \ diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm.h index f61a70eb7..9e0ade357 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm.h +++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm.h @@ -69,6 +69,7 @@ typedef struct drm_clip_rect { /* Seperate include files for the i810/mga specific structures */ #include "mga_drm.h" #include "i810_drm.h" +#include "r128_drm.h" typedef struct drm_version { int version_major; /* Major version */ @@ -341,8 +342,18 @@ typedef struct drm_agp_info { /* I810 specific ioctls */ #define DRM_IOCTL_I810_INIT DRM_IOW( 0x40, drm_i810_init_t) #define DRM_IOCTL_I810_VERTEX DRM_IOW( 0x41, drm_i810_vertex_t) -#define DRM_IOCTL_I810_DMA DRM_IOW( 0x42, drm_i810_general_t) +#define DRM_IOCTL_I810_CLEAR DRM_IOW( 0x42, drm_i810_clear_t) #define DRM_IOCTL_I810_FLUSH DRM_IO ( 0x43) #define DRM_IOCTL_I810_GETAGE DRM_IO ( 0x44) +#define DRM_IOCTL_I810_GETBUF DRM_IOWR(0x45, drm_i810_dma_t) +#define DRM_IOCTL_I810_SWAP DRM_IO ( 0x46) + +/* Rage 128 specific ioctls */ +#define DRM_IOCTL_R128_INIT DRM_IOW( 0x40, drm_r128_init_t) +#define DRM_IOCTL_R128_RESET DRM_IO( 0x41) +#define DRM_IOCTL_R128_FLUSH DRM_IO( 0x42) +#define DRM_IOCTL_R128_CCEIDL DRM_IO( 0x43) +#define DRM_IOCTL_R128_PACKET DRM_IOW( 0x44, drm_r128_packet_t) +#define DRM_IOCTL_R128_VERTEX DRM_IOW( 0x45, drm_r128_vertex_t) #endif diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i810_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i810_drm.h index 0754874c6..4c8e09f6a 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i810_drm.h +++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i810_drm.h @@ -5,35 +5,112 @@ * if you change them, you must change the defines in the Xserver. */ -/* Might one day want to support the client-side ringbuffer code again. - */ #ifndef _I810_DEFINES_ #define _I810_DEFINES_ -#define I810_USE_BATCH 1 #define I810_DMA_BUF_ORDER 12 #define I810_DMA_BUF_SZ (1<<I810_DMA_BUF_ORDER) #define I810_DMA_BUF_NR 256 -#define I810_NR_SAREA_CLIPRECTS 2 +#define I810_NR_SAREA_CLIPRECTS 8 /* Each region is a minimum of 64k, and there are at most 64 of them. */ - #define I810_NR_TEX_REGIONS 64 #define I810_LOG_MIN_TEX_REGION_SIZE 16 #endif +#define I810_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */ +#define I810_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */ +#define I810_UPLOAD_CTX 0x4 +#define I810_UPLOAD_BUFFERS 0x8 +#define I810_UPLOAD_TEX0 0x10 +#define I810_UPLOAD_TEX1 0x20 +#define I810_UPLOAD_CLIPRECTS 0x40 + + +/* Indices into buf.Setup where various bits of state are mirrored per + * context and per buffer. These can be fired at the card as a unit, + * or in a piecewise fashion as required. + */ + +/* Destbuffer state + * - backbuffer linear offset and pitch -- invarient in the current dri + * - zbuffer linear offset and pitch -- also invarient + * - drawing origin in back and depth buffers. + * + * Keep the depth/back buffer state here to acommodate private buffers + * in the future. + */ +#define I810_DESTREG_DI0 0 /* CMD_OP_DESTBUFFER_INFO (2 dwords) */ +#define I810_DESTREG_DI1 1 +#define I810_DESTREG_DV0 2 /* GFX_OP_DESTBUFFER_VARS (2 dwords) */ +#define I810_DESTREG_DV1 3 +#define I810_DESTREG_DR0 4 /* GFX_OP_DRAWRECT_INFO (4 dwords) */ +#define I810_DESTREG_DR1 5 +#define I810_DESTREG_DR2 6 +#define I810_DESTREG_DR3 7 +#define I810_DESTREG_DR4 8 +#define I810_DEST_SETUP_SIZE 10 + +/* Context state + */ +#define I810_CTXREG_CF0 0 /* GFX_OP_COLOR_FACTOR */ +#define I810_CTXREG_CF1 1 +#define I810_CTXREG_ST0 2 /* GFX_OP_STIPPLE */ +#define I810_CTXREG_ST1 3 +#define I810_CTXREG_VF 4 /* GFX_OP_VERTEX_FMT */ +#define I810_CTXREG_MT 5 /* GFX_OP_MAP_TEXELS */ +#define I810_CTXREG_MC0 6 /* GFX_OP_MAP_COLOR_STAGES - stage 0 */ +#define I810_CTXREG_MC1 7 /* GFX_OP_MAP_COLOR_STAGES - stage 1 */ +#define I810_CTXREG_MC2 8 /* GFX_OP_MAP_COLOR_STAGES - stage 2 */ +#define I810_CTXREG_MA0 9 /* GFX_OP_MAP_ALPHA_STAGES - stage 0 */ +#define I810_CTXREG_MA1 10 /* GFX_OP_MAP_ALPHA_STAGES - stage 1 */ +#define I810_CTXREG_MA2 11 /* GFX_OP_MAP_ALPHA_STAGES - stage 2 */ +#define I810_CTXREG_SDM 12 /* GFX_OP_SRC_DEST_MONO */ +#define I810_CTXREG_FOG 13 /* GFX_OP_FOG_COLOR */ +#define I810_CTXREG_B1 14 /* GFX_OP_BOOL_1 */ +#define I810_CTXREG_B2 15 /* GFX_OP_BOOL_2 */ +#define I810_CTXREG_LCS 16 /* GFX_OP_LINEWIDTH_CULL_SHADE_MODE */ +#define I810_CTXREG_PV 17 /* GFX_OP_PV_RULE -- Invarient! */ +#define I810_CTXREG_ZA 18 /* GFX_OP_ZBIAS_ALPHAFUNC */ +#define I810_CTXREG_AA 19 /* GFX_OP_ANTIALIAS */ +#define I810_CTX_SETUP_SIZE 20 + +/* Texture state (per tex unit) + */ +#define I810_TEXREG_MI0 0 /* GFX_OP_MAP_INFO (4 dwords) */ +#define I810_TEXREG_MI1 1 +#define I810_TEXREG_MI2 2 +#define I810_TEXREG_MI3 3 +#define I810_TEXREG_MF 4 /* GFX_OP_MAP_FILTER */ +#define I810_TEXREG_MLC 5 /* GFX_OP_MAP_LOD_CTL */ +#define I810_TEXREG_MLL 6 /* GFX_OP_MAP_LOD_LIMITS */ +#define I810_TEXREG_MCS 7 /* GFX_OP_MAP_COORD_SETS ??? */ +#define I810_TEX_SETUP_SIZE 8 + +#define I810_FRONT 0x1 +#define I810_BACK 0x2 +#define I810_DEPTH 0x4 + + typedef struct _drm_i810_init { - enum { - I810_INIT_DMA = 0x01, - I810_CLEANUP_DMA = 0x02 + enum { + I810_INIT_DMA = 0x01, + I810_CLEANUP_DMA = 0x02 } func; - int ring_map_idx; - int buffer_map_idx; + int ring_map_idx; + int buffer_map_idx; int sarea_priv_offset; - unsigned long ring_start; - unsigned long ring_end; - unsigned long ring_size; + unsigned int ring_start; + unsigned int ring_end; + unsigned int ring_size; + unsigned int front_offset; + unsigned int back_offset; + unsigned int depth_offset; + unsigned int w; + unsigned int h; + unsigned int pitch; + unsigned int pitch_bits; } drm_i810_init_t; /* Warning: If you change the SAREA structure you must change the Xserver @@ -46,6 +123,11 @@ typedef struct _drm_i810_tex_region { } drm_i810_tex_region_t; typedef struct _drm_i810_sarea { + unsigned int ContextState[I810_CTX_SETUP_SIZE]; + unsigned int BufferState[I810_DEST_SETUP_SIZE]; + unsigned int TexState[2][I810_TEX_SETUP_SIZE]; + unsigned int dirty; + unsigned int nbox; drm_clip_rect_t boxes[I810_NR_SAREA_CLIPRECTS]; @@ -72,12 +154,18 @@ typedef struct _drm_i810_sarea { int last_dispatch; /* age of the most recently dispatched buffer */ int last_quiescent; /* */ int ctxOwner; /* last context to upload state */ + + int vertex_prim; + } drm_i810_sarea_t; -typedef struct _drm_i810_general { - int idx; - int used; -} drm_i810_general_t; +typedef struct _drm_i810_clear { + int clear_color; + int clear_depth; + int flags; +} drm_i810_clear_t; + + /* These may be placeholders if we have more cliprects than * I810_NR_SAREA_CLIPRECTS. In that case, the client sets discard to @@ -90,4 +178,11 @@ typedef struct _drm_i810_vertex { int discard; /* client is finished with the buffer? */ } drm_i810_vertex_t; +typedef struct drm_i810_dma { + void *virtual; + int request_idx; + int request_size; + int granted; +} drm_i810_dma_t; + #endif /* _I810_DRM_H_ */ diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128_drm.h new file mode 100644 index 000000000..0379a5fae --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128_drm.h @@ -0,0 +1,111 @@ +/* r128_drm.h -- Public header for the r128 driver + * Created: Wed Apr 5 19:24:19 2000 by kevin@precisioninsight.com + * + * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: Kevin E. Martin <kevin@precisioninsight.com> + * + * $XFree86$ + */ + +#ifndef _R128_DRM_H_ +#define _R128_DRM_H_ + +/* WARNING: If you change any of these defines, make sure to change the + * defines in the Xserver file (xf86drmR128.h) + */ +typedef struct drm_r128_init { + enum { + R128_INIT_CCE = 0x01, + R128_CLEANUP_CCE = 0x02 + } func; + int sarea_priv_offset; + int is_pci; + int cce_mode; + int cce_fifo_size; + int cce_secure; + int ring_size; + int usec_timeout; + + int fb_offset; + int agp_ring_offset; + int agp_read_ptr_offset; + int agp_vertbufs_offset; + int agp_indbufs_offset; + int agp_textures_offset; + int mmio_offset; +} drm_r128_init_t; + +typedef struct drm_r128_packet { + unsigned long *buffer; + int count; + int flags; +} drm_r128_packet_t; + +typedef enum drm_r128_prim { + _DRM_R128_PRIM_NONE = 0x0001, + _DRM_R128_PRIM_POINT = 0x0002, + _DRM_R128_PRIM_LINE = 0x0004, + _DRM_R128_PRIM_POLY_LINE = 0x0008, + _DRM_R128_PRIM_TRI_LIST = 0x0010, + _DRM_R128_PRIM_TRI_FAN = 0x0020, + _DRM_R128_PRIM_TRI_STRIP = 0x0040, + _DRM_R128_PRIM_TRI_TYPE2 = 0x0080 +} drm_r128_prim_t; + +typedef struct drm_r128_vertex { + /* Indices here refer to the offset into + buflist in drm_buf_get_t. */ + int send_count; /* Number of buffers to send */ + int *send_indices; /* List of handles to buffers */ + int *send_sizes; /* Lengths of data to send */ + drm_r128_prim_t prim; /* Primitive type */ + int request_count; /* Number of buffers requested */ + int *request_indices; /* Buffer information */ + int *request_sizes; + int granted_count; /* Number of buffers granted */ +} drm_r128_vertex_t; + +/* WARNING: If you change any of these defines, make sure to change the + * defines in the Xserver file (r128_sarea.h) + */ +#define R128_LOCAL_TEX_HEAP 0 +#define R128_AGP_TEX_HEAP 1 +#define R128_NR_TEX_HEAPS 2 +#define R128_NR_TEX_REGIONS 64 +#define R128_LOG_TEX_GRANULARITY 16 + +typedef struct drm_tex_region { + unsigned char next, prev; + unsigned char in_use; + int age; +} drm_tex_region_t; + +typedef struct drm_r128_sarea { + drm_tex_region_t tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS+1]; + int tex_age[R128_NR_TEX_HEAPS]; + int ctx_owner; + int ring_write; +} drm_r128_sarea_t; + +#endif diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/xf86drmI810.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/xf86drmI810.c index 1248c70a9..067c6376e 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/xf86drmI810.c +++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/xf86drmI810.c @@ -58,23 +58,29 @@ Bool drmI810CleanupDma(int driSubFD) return TRUE; } -Bool drmI810InitDma(int driSubFD, unsigned long start, unsigned long end, - unsigned long size, int ring_map_idx, int buffer_map_idx, - int sarea_off) +Bool drmI810InitDma(int driSubFD, drmI810Init *info) { drm_i810_init_t init; memset(&init, 0, sizeof(drm_i810_init_t)); + init.func = I810_INIT_DMA; - init.ring_map_idx = ring_map_idx; - init.buffer_map_idx = buffer_map_idx; - init.ring_start = start; - init.ring_end = end; - init.ring_size = size; - init.sarea_priv_offset = sarea_off; + init.ring_map_idx = info->ring_map_idx; + init.buffer_map_idx = info->buffer_map_idx; + init.ring_start = info->start; + init.ring_end = info->end; + init.ring_size = info->size; + init.sarea_priv_offset = info->sarea_off; + init.front_offset = info->front_offset; + init.back_offset = info->back_offset; + init.depth_offset = info->depth_offset; + init.w = info->w; + init.h = info->h; + init.pitch = info->pitch; + init.pitch_bits = info->pitch_bits; if(ioctl(driSubFD, DRM_IOCTL_I810_INIT, &init)) { - return FALSE; - } + return FALSE; + } return TRUE; } diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/xf86drmR128.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/xf86drmR128.c new file mode 100644 index 000000000..4195c90ba --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/xf86drmR128.c @@ -0,0 +1,198 @@ +/* xf86drmR128.c -- User-level interface to Rage 128 DRM device + * Created: Sun Apr 9 18:13:54 2000 by kevin@precisioninsight.com + * + * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Author: Kevin E. Martin <kevin@precisioninsight.com> + * + * $XFree86$ + * + */ + +#ifdef XFree86Server +# include "xf86.h" +# include "xf86_OSproc.h" +# include "xf86_ansic.h" +# include "xf86Priv.h" +# define _DRM_MALLOC xalloc +# define _DRM_FREE xfree +# ifndef XFree86LOADER +# include <sys/stat.h> +# include <sys/mman.h> +# endif +#else +# include <stdio.h> +# include <stdlib.h> +# include <unistd.h> +# include <string.h> +# include <ctype.h> +# include <fcntl.h> +# include <errno.h> +# include <signal.h> +# include <sys/types.h> +# include <sys/stat.h> +# include <sys/ioctl.h> +# include <sys/mman.h> +# include <sys/time.h> +# ifdef DRM_USE_MALLOC +# define _DRM_MALLOC malloc +# define _DRM_FREE free +extern int xf86InstallSIGIOHandler(int fd, void (*f)(int, void *), void *); +extern int xf86RemoveSIGIOHandler(int fd); +# else +# include <Xlibint.h> +# define _DRM_MALLOC Xmalloc +# define _DRM_FREE Xfree +# endif +#endif + +/* Not all systems have MAP_FAILED defined */ +#ifndef MAP_FAILED +#define MAP_FAILED ((void *)-1) +#endif + +#include "xf86drm.h" +#include "xf86drmR128.h" +#include "drm.h" + +int drmR128InitCCE(int fd, drmR128Init *info) +{ + drm_r128_init_t init; + + memset(&init, 0, sizeof(drm_r128_init_t)); + + init.func = R128_INIT_CCE; + init.sarea_priv_offset = info->sarea_priv_offset; + init.is_pci = info->is_pci; + init.cce_mode = info->cce_mode; + init.cce_fifo_size = info->cce_fifo_size; + init.cce_secure = info->cce_secure; + init.ring_size = info->ring_size; + init.usec_timeout = info->usec_timeout; + + init.fb_offset = info->fb_offset; + init.agp_ring_offset = info->agp_ring_offset; + init.agp_read_ptr_offset = info->agp_read_ptr_offset; + init.agp_vertbufs_offset = info->agp_vertbufs_offset; + init.agp_indbufs_offset = info->agp_indbufs_offset; + init.agp_textures_offset = info->agp_textures_offset; + init.mmio_offset = info->mmio_offset; + + if (ioctl(fd, DRM_IOCTL_R128_INIT, &init)) return -errno; + + return 0; +} + +int drmR128CleanupCCE(int fd) +{ + drm_r128_init_t init; + + memset(&init, 0, sizeof(drm_r128_init_t)); + + init.func = R128_CLEANUP_CCE; + + if (ioctl(fd, DRM_IOCTL_R128_INIT, &init)) return -errno; + + return 0; +} + +int drmR128EngineReset(int fd) +{ + if (ioctl(fd, DRM_IOCTL_R128_RESET, NULL)) return -errno; + + return 0; +} + +int drmR128EngineFlush(int fd) +{ + if (ioctl(fd, DRM_IOCTL_R128_FLUSH, NULL)) return -errno; + + return 0; +} + +int drmR128CCEWaitForIdle(int fd) +{ + if (ioctl(fd, DRM_IOCTL_R128_CCEIDL, NULL)) return -errno; + + return 0; +} + +int drmR128SubmitPackets(int fd, CARD32 *buffer, int *count, int flags) +{ + drm_r128_packet_t packet; + int ret; + + memset(&packet, 0, sizeof(drm_r128_packet_t)); + + packet.count = *count; + packet.flags = flags; + + while (packet.count > 0) { + packet.buffer = buffer + (*count - packet.count); + ret = ioctl(fd, DRM_IOCTL_R128_PACKET, &packet); + if (ret < 0 && ret != -EAGAIN) { + *count = packet.count; + return -errno; + } + } + + *count = 0; + return 0; +} + +int drmR128GetVertexBuffers(int fd, int count, int *indices, int *sizes) +{ + drm_r128_vertex_t v; + + v.send_count = 0; + v.send_indices = NULL; + v.send_sizes = NULL; + v.prim = DRM_R128_PRIM_NONE; + v.request_count = count; + v.request_indices = indices; + v.request_sizes = sizes; + v.granted_count = 0; + + if (ioctl(fd, DRM_IOCTL_R128_VERTEX, &v)) return -errno; + + return v.granted_count; +} + +int drmR128FlushVertexBuffers(int fd, int count, int *indices, + int *sizes, drmR128PrimType prim) +{ + drm_r128_vertex_t v; + + v.send_count = count; + v.send_indices = indices; + v.send_sizes = sizes; + v.prim = prim; + v.request_count = 0; + v.request_indices = NULL; + v.request_sizes = NULL; + v.granted_count = 0; + + if (ioctl(fd, DRM_IOCTL_R128_VERTEX, &v) < 0) return -errno; + + return 0; +} diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/Imakefile b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/Imakefile index 96388450b..fdaecb972 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/Imakefile +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/Imakefile @@ -13,15 +13,16 @@ MOBJ = drmmodule.o MTRR_DEFINES = -DHAS_MTRR_SUPPORT #endif -SRCS = xf86drm.c xf86drmHash.c xf86drmRandom.c xf86drmSL.c $(MSRC) -OBJS = xf86drm.o xf86drmHash.o xf86drmRandom.o xf86drmSL.o $(MOBJ) - +SRCS = xf86drm.c xf86drmHash.c xf86drmRandom.c xf86drmSL.c xf86drmI810.c xf86drmMga.c xf86drmR128.c $(MSRC) +OBJS = xf86drm.o xf86drmHash.o xf86drmRandom.o xf86drmSL.o xf86drmI810.o xf86drmMga.o xf86drmR128.o $(MOBJ) INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \ -I$(XINCLUDESRC) -I$(EXTINCSRC) -I../.. -Ikernel DEFINES = $(MTRR_DEFINES) $(GLX_DEFINES) +#if DoLoadableServer + ModuleObjectRule() LibraryModuleTarget(drm,$(OBJS)) NormalLintTarget($(SRCS)) @@ -30,6 +31,14 @@ NormalLintTarget($(SRCS)) InstallLibraryModule(drm,$(MODULEDIR),linux) #endif +#else + +SubdirLibraryRule($(OBJS)) +NormalLibraryObjectRule() + +#endif + + #define IHaveSubdirs SUBDIRS = kernel diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel index 44d75c487..a169473af 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.kernel @@ -14,7 +14,8 @@ L_TARGET := libdrm.a L_OBJS := init.o memory.o proc.o auth.o context.o drawable.o bufs.o \ - lists.o lock.o ioctl.o fops.o vm.o dma.o + lists.o lock.o ioctl.o fops.o vm.o dma.o ctxbitmap.o \ + agpsupport.o M_OBJS := @@ -26,6 +27,14 @@ ifdef CONFIG_DRM_TDFX M_OBJS += tdfx.o endif +ifdef CONFIG_DRM_MGA +M_OBJS += mga.o +endif + +ifdef CONFIG_DRM_R128 +M_OBJS += r128.o +endif + include $(TOPDIR)/Rules.make gamma.o: gamma_drv.o gamma_dma.o $(L_TARGET) @@ -33,3 +42,12 @@ gamma.o: gamma_drv.o gamma_dma.o $(L_TARGET) tdfx.o: tdfx_drv.o tdfx_context.o $(L_TARGET) $(LD) $(LD_RFLAG) -r -o $@ tdfx_drv.o tdfx_context.o -L. -ldrm + +i810.o: i810_drv.o i810_context.o $(L_TARGET) + $(LD) $(LD_RFLAG) -r -o $@ i810_drv.o i810_bufs.o i810_dma.o i810_context.o -L. -ldrm + +mga.o: mga_drv.o mga_context.o mga_dma.o mga_bufs.o $(L_TARGET) + $(LD) $(LD_RFLAG) -r -o $@ mga_drv.o mga_bufs.o mga_dma.o mga_context.o mga_state.o -L. -ldrm + +r128.o: r128_drv.o r128_context.o $(L_TARGET) + $(LD) $(LD_RFLAG) -r -o $@ r128_drv.o r128_context.o -L. -ldrm diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux index 8a41f880b..368c3c850 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/Makefile.linux @@ -1,8 +1,7 @@ # Makefile -- For the Direct Rendering Manager module (drm) # Created: Mon Jan 4 09:26:53 1999 by faith@precisioninsight.com -# Revised: Sun Feb 13 23:15:59 2000 by kevin@precisioninsight.com # -# Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. +# Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. # All rights reserved. # # Permission is hereby granted, free of charge, to any person obtaining a @@ -31,12 +30,14 @@ # *** Setup -MODS= gamma.o tdfx.o +# **** End of SMP/MODVERSIONS detection + +MODS= gamma.o tdfx.o r128.o LIBS= libdrm.a PROGS= drmstat DRMOBJS= init.o memory.o proc.o auth.o context.o drawable.o bufs.o \ - lists.o lock.o ioctl.o fops.o vm.o dma.o + lists.o lock.o ioctl.o fops.o vm.o dma.o ctxbitmap.o DRMHEADERS= drm.h drmP.h GAMMAOBJS= gamma_drv.o gamma_dma.o @@ -45,9 +46,14 @@ GAMMAHEADERS= gamma_drv.h $(DRMHEADERS) TDFXOBJS= tdfx_drv.o tdfx_context.o TDFXHEADERS= tdfx_drv.h $(DRMHEADERS) +R128OBJS= r128_drv.o r128_dma.o r128_bufs.o r128_context.o +R128HEADERS= r128_drv.h r128_drm.h $(DRMHEADERS) + PROGOBJS= drmstat.po xf86drm.po xf86drmHash.po xf86drmRandom.po sigio.po PROGHEADERS= xf86drm.h $(DRMHEADERS) +INC= /usr/include + CFLAGS= -O2 $(WARNINGS) WARNINGS= -Wall -Wwrite-strings -Wpointer-arith -Wcast-align \ -Wstrict-prototypes -Wshadow -Wnested-externs \ @@ -102,7 +108,27 @@ SMP := $(shell gcc -E -nostdinc -I$(TREE) picker.c 2>/dev/null \ | grep -s 'SMP = ' | cut -d' ' -f3) MODVERSIONS := $(shell gcc -E -I $(TREE) picker.c 2>/dev/null \ | grep -s 'MODVERSIONS = ' | cut -d' ' -f3) -all::;@echo KERNEL HEADERS IN $(TREE): SMP=${SMP} MODVERSIONS=${MODVERSIONS} +AGP := $(shell gcc -E -nostdinc -I$(TREE) picker.c 2>/dev/null \ + | grep -s 'AGP = ' | cut -d' ' -f3) +ifeq ($(AGP),0) +AGP := $(shell gcc -E -nostdinc -I$(TREE) picker.c 2>/dev/null \ + | grep -s 'AGP_MODULE = ' | cut -d' ' -f3) +endif + +ifeq ($(AGP),1) +MODCFLAGS += -DDRM_AGP +DRMOBJS += agpsupport.o +MODS += mga.o i810.o + +MGAOBJS= mga_drv.o mga_dma.o mga_bufs.o mga_state.o mga_context.o +MGAHEADERS= mga_drv.h $(DRMHEADERS) + +I810OBJS= i810_drv.o i810_dma.o i810_bufs.o i810_context.o +I810HEADERS= i810_drv.h $(DRMHEADERS) +endif + +all::;@echo KERNEL HEADERS IN $(TREE): SMP=${SMP} MODVERSIONS=${MODVERSIONS} \ + AGP=${AGP} all:: $(LIBS) $(MODS) $(PROGS) endif @@ -116,6 +142,7 @@ ifeq ($(MODVERSIONS),1) MODCFLAGS += -DMODVERSIONS -include $(TREE)/linux/modversions.h endif + # **** End of configuration libdrm.a: $(DRMOBJS) @@ -128,6 +155,17 @@ gamma.o: $(GAMMAOBJS) $(LIBS) tdfx.o: $(TDFXOBJS) $(LIBS) $(LD) -r $^ -o $@ +r128.o: $(R128OBJS) $(LIBS) + $(LD) -r $^ -o $@ + +ifeq ($(AGP),1) +mga.o: $(MGAOBJS) $(LIBS) + $(LD) -r $^ -o $@ + +i810.o: $(I810OBJS) $(LIBS) + $(LD) -r $^ -o $@ +endif + drmstat: $(PROGOBJS) $(CC) $(PRGCFLAGS) $^ $(PRGLIBS) -o $@ @@ -149,8 +187,12 @@ ChangeLog: $(DRMOBJS): $(DRMHEADERS) $(GAMMAOBJS): $(GAMMAHEADERS) $(TDFXOBJS): $(TDFXHEADERS) +$(R128OBJS): $(R128HEADERS) +ifeq ($(AGP),1) +$(MGAOBJS): $(MGAHEADERS) +$(I810OBJS): $(I810HEADERS) +endif $(PROGOBJS): $(PROGHEADERS) clean: - rm -f *.o *.po *~ core $(PROGS) - + rm -f *.o *.a *.po *~ core $(PROGS) diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/agpsupport.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/agpsupport.c index fb58154d6..14fb8b53f 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/agpsupport.c +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/agpsupport.c @@ -159,6 +159,8 @@ int drm_agp_alloc(struct inode *inode, struct file *filp, unsigned int cmd, -EFAULT); if (!(entry = drm_alloc(sizeof(*entry), DRM_MEM_AGPLISTS))) return -ENOMEM; + + memset(entry, 0, sizeof(*entry)); pages = (request.size + PAGE_SIZE - 1) / PAGE_SIZE; type = (u32) request.type; @@ -237,6 +239,8 @@ int drm_agp_bind(struct inode *inode, struct file *filp, unsigned int cmd, page = (request.offset + PAGE_SIZE - 1) / PAGE_SIZE; if ((retcode = drm_bind_agp(entry->memory, page))) return retcode; entry->bound = dev->agp->base + (page << PAGE_SHIFT); + DRM_DEBUG("base = 0x%lx entry->bound = 0x%lx\n", + dev->agp->base, entry->bound); return 0; } @@ -254,8 +258,10 @@ int drm_agp_free(struct inode *inode, struct file *filp, unsigned int cmd, if (!(entry = drm_agp_lookup_entry(dev, request.handle))) return -EINVAL; if (entry->bound) drm_unbind_agp(entry->memory); - entry->prev->next = entry->next; - entry->next->prev = entry->prev; + + if (entry->prev) entry->prev->next = entry->next; + else dev->agp->memory = entry->next; + if (entry->next) entry->next->prev = entry->prev; drm_free_agp(entry->memory, entry->pages); drm_free(entry, sizeof(*entry), DRM_MEM_AGPLISTS); return 0; @@ -269,15 +275,12 @@ drm_agp_head_t *drm_agp_init(void) for (fill = &drm_agp_fill[0]; fill->name; fill++) { char *n = (char *)fill->name; -#if 0 - *fill->f = (drm_agp_func_u)get_module_symbol(NULL, n); -#endif *fill->f = (drm_agp_func_u)get_module_symbol(NULL, n); - printk("%s resolves to 0x%08lx\n", n, (*fill->f).address); + DRM_DEBUG("%s resolves to 0x%08lx\n", n, (*fill->f).address); if (!(*fill->f).address) agp_available = 0; } - printk("agp_available = %d\n", agp_available); + DRM_DEBUG("agp_available = %d\n", agp_available); if (agp_available) { if (!(head = drm_alloc(sizeof(*head), DRM_MEM_AGPLISTS))) diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h index 3af5d5b1e..c63d0f637 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h @@ -1,8 +1,7 @@ /* drm.h -- Header for Direct Rendering Manager -*- linux-c -*- * Created: Mon Jan 4 10:05:05 1999 by faith@precisioninsight.com - * Revised: Mon Feb 14 00:15:23 2000 by kevin@precisioninsight.com * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. + * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. * All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a @@ -71,9 +70,10 @@ typedef struct drm_clip_rect { unsigned short y2; } drm_clip_rect_t; -/* Seperate include files for the i810/mga specific structures */ +/* Seperate include files for the i810/mga/r128 specific structures */ #include "mga_drm.h" #include "i810_drm.h" +#include "r128_drm.h" typedef struct drm_version { int version_major; /* Major version */ @@ -341,12 +341,23 @@ typedef struct drm_agp_info { #define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x43, drm_mga_iload_t) #define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x44, drm_mga_vertex_t) #define DRM_IOCTL_MGA_FLUSH DRM_IOW( 0x45, drm_lock_t ) +#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t) /* I810 specific ioctls */ #define DRM_IOCTL_I810_INIT DRM_IOW( 0x40, drm_i810_init_t) #define DRM_IOCTL_I810_VERTEX DRM_IOW( 0x41, drm_i810_vertex_t) -#define DRM_IOCTL_I810_DMA DRM_IOW( 0x42, drm_i810_general_t) +#define DRM_IOCTL_I810_CLEAR DRM_IOW( 0x42, drm_i810_clear_t) #define DRM_IOCTL_I810_FLUSH DRM_IO ( 0x43) #define DRM_IOCTL_I810_GETAGE DRM_IO ( 0x44) +#define DRM_IOCTL_I810_GETBUF DRM_IOW( 0x45, drm_i810_dma_t) +#define DRM_IOCTL_I810_SWAP DRM_IO ( 0x46) + +/* Rage 128 specific ioctls */ +#define DRM_IOCTL_R128_INIT DRM_IOW( 0x40, drm_r128_init_t) +#define DRM_IOCTL_R128_RESET DRM_IO( 0x41) +#define DRM_IOCTL_R128_FLUSH DRM_IO( 0x42) +#define DRM_IOCTL_R128_CCEIDL DRM_IO( 0x43) +#define DRM_IOCTL_R128_PACKET DRM_IOW( 0x44, drm_r128_packet_t) +#define DRM_IOCTL_R128_VERTEX DRM_IOW( 0x45, drm_r128_vertex_t) #endif diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drmP.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drmP.h index 312fba36f..43670e28a 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drmP.h +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drmP.h @@ -1,8 +1,7 @@ /* drmP.h -- Private header for Direct Rendering Manager -*- linux-c -*- * Created: Mon Jan 4 10:05:05 1999 by faith@precisioninsight.com - * Revised: Sun Feb 13 23:34:30 2000 by kevin@precisioninsight.com * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. + * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. * All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a @@ -48,8 +47,12 @@ #ifdef CONFIG_MTRR #include <asm/mtrr.h> #endif +#ifdef DRM_AGP +#include <linux/types.h> +#include <linux/agp_backend.h> +#endif #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,1,0) -#include <asm/spinlock.h> +#include <linux/tqueue.h> #include <linux/poll.h> #endif #include "drm.h" @@ -69,21 +72,27 @@ #define DRM_FLAG_DEBUG 0x01 #define DRM_FLAG_NOCTX 0x02 -#define DRM_MEM_DMA 0 -#define DRM_MEM_SAREA 1 -#define DRM_MEM_DRIVER 2 -#define DRM_MEM_MAGIC 3 -#define DRM_MEM_IOCTLS 4 -#define DRM_MEM_MAPS 5 -#define DRM_MEM_VMAS 6 -#define DRM_MEM_BUFS 7 -#define DRM_MEM_SEGS 8 -#define DRM_MEM_PAGES 9 -#define DRM_MEM_FILES 10 -#define DRM_MEM_QUEUES 11 -#define DRM_MEM_CMDS 12 -#define DRM_MEM_MAPPINGS 13 -#define DRM_MEM_BUFLISTS 14 +#define DRM_MEM_DMA 0 +#define DRM_MEM_SAREA 1 +#define DRM_MEM_DRIVER 2 +#define DRM_MEM_MAGIC 3 +#define DRM_MEM_IOCTLS 4 +#define DRM_MEM_MAPS 5 +#define DRM_MEM_VMAS 6 +#define DRM_MEM_BUFS 7 +#define DRM_MEM_SEGS 8 +#define DRM_MEM_PAGES 9 +#define DRM_MEM_FILES 10 +#define DRM_MEM_QUEUES 11 +#define DRM_MEM_CMDS 12 +#define DRM_MEM_MAPPINGS 13 +#define DRM_MEM_BUFLISTS 14 +#define DRM_MEM_AGPLISTS 15 +#define DRM_MEM_TOTALAGP 16 +#define DRM_MEM_BOUNDAGP 17 +#define DRM_MEM_CTXBITMAP 18 + +#define DRM_MAX_CTXBITMAP (PAGE_SIZE * 8) /* Backward compatibility section */ /* _PAGE_WT changed to _PAGE_PWT in 2.2.6 */ @@ -218,8 +227,8 @@ typedef struct drm_magic_entry { } drm_magic_entry_t; typedef struct drm_magic_head { - struct drm_magic_entry *head; - struct drm_magic_entry *tail; + struct drm_magic_entry *head; + struct drm_magic_entry *tail; } drm_magic_head_t; typedef struct drm_vma_entry { @@ -235,6 +244,7 @@ typedef struct drm_buf { int used; /* Amount of buffer in use (for DMA) */ unsigned long offset; /* Byte offset (used internally) */ void *address; /* Address of buffer */ + unsigned long bus_address; /* Bus address of buffer */ struct drm_buf *next; /* Kernel-only: used for free list */ __volatile__ int waiting; /* On kernel DMA queue */ __volatile__ int pending; /* On hardware DMA queue */ @@ -250,12 +260,16 @@ typedef struct drm_buf { DRM_LIST_PRIO = 4, DRM_LIST_RECLAIM = 5 } list; /* Which list we're on */ + #if DRM_DMA_HISTOGRAM cycles_t time_queued; /* Queued to kernel DMA queue */ cycles_t time_dispatched; /* Dispatched to hardware */ cycles_t time_completed; /* Completed by hardware */ cycles_t time_freed; /* Back on freelist */ #endif + + int dev_priv_size; /* Size of buffer private stoarge */ + void *dev_private; /* Per-buffer private storage */ } drm_buf_t; #if DRM_DMA_HISTOGRAM @@ -376,6 +390,9 @@ typedef struct drm_device_dma { int page_count; unsigned long *pagelist; unsigned long byte_count; + enum { + _DRM_DMA_USE_AGP = 0x01 + } flags; /* DMA support */ drm_buf_t *this_buffer; /* Buffer being sent */ @@ -384,6 +401,41 @@ typedef struct drm_device_dma { wait_queue_head_t waiting; /* Processes waiting on free bufs */ } drm_device_dma_t; +#ifdef DRM_AGP +typedef struct drm_agp_mem { + unsigned long handle; + agp_memory *memory; + unsigned long bound; /* address */ + int pages; + struct drm_agp_mem *prev; + struct drm_agp_mem *next; +} drm_agp_mem_t; + +typedef struct drm_agp_head { + agp_kern_info agp_info; + const char *chipset; + drm_agp_mem_t *memory; + unsigned long mode; + int enabled; + int acquired; + unsigned long base; + int agp_mtrr; +} drm_agp_head_t; + +typedef struct { + void (*free_memory)(agp_memory *); + agp_memory *(*allocate_memory)(size_t, u32); + int (*bind_memory)(agp_memory *, off_t); + int (*unbind_memory)(agp_memory *); + void (*enable)(u32); + int (*acquire)(void); + void (*release)(void); + void (*copy_info)(agp_kern_info *); +} drm_agp_func_t; + +extern drm_agp_func_t drm_agp; +#endif + typedef struct drm_device { const char *name; /* Simple driver name */ char *unique; /* Unique identifier: e.g., busid */ @@ -462,6 +514,12 @@ typedef struct drm_device { struct fasync_struct *buf_async;/* Processes waiting for SIGIO */ wait_queue_head_t buf_readers; /* Processes waiting to read */ wait_queue_head_t buf_writers; /* Processes waiting to ctx switch */ + +#ifdef DRM_AGP + drm_agp_head_t *agp; +#endif + unsigned long *ctx_bitmap; + void *dev_private; } drm_device_t; @@ -533,6 +591,14 @@ extern void drm_free_pages(unsigned long address, int order, extern void *drm_ioremap(unsigned long offset, unsigned long size); extern void drm_ioremapfree(void *pt, unsigned long size); +#ifdef DRM_AGP +extern agp_memory *drm_alloc_agp(int pages, u32 type); +extern int drm_free_agp(agp_memory *handle, int pages); +extern int drm_bind_agp(agp_memory *handle, unsigned int start); +extern int drm_unbind_agp(agp_memory *handle); +#endif + + /* Buffer management support (bufs.c) */ extern int drm_order(unsigned long size); extern int drm_addmap(struct inode *inode, struct file *filp, @@ -642,5 +708,32 @@ extern int drm_flush_unblock(drm_device_t *dev, int context, drm_lock_flags_t flags); extern int drm_flush_block_and_flush(drm_device_t *dev, int context, drm_lock_flags_t flags); + + /* Context Bitmap support (ctxbitmap.c) */ +extern int drm_ctxbitmap_init(drm_device_t *dev); +extern void drm_ctxbitmap_cleanup(drm_device_t *dev); +extern int drm_ctxbitmap_next(drm_device_t *dev); +extern void drm_ctxbitmap_free(drm_device_t *dev, int ctx_handle); + +#ifdef DRM_AGP + /* AGP/GART support (agpsupport.c) */ +extern drm_agp_head_t *drm_agp_init(void); +extern int drm_agp_acquire(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int drm_agp_release(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int drm_agp_enable(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int drm_agp_info(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int drm_agp_alloc(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int drm_agp_free(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int drm_agp_unbind(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int drm_agp_bind(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +#endif #endif #endif diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_bufs.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_bufs.c index 49455b434..9737ae92d 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_bufs.c +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_bufs.c @@ -32,152 +32,28 @@ #define __NO_VERSION__ #include "drmP.h" +#include "i810_drv.h" #include "linux/un.h" int i810_addbufs_agp(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg) { - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_device_dma_t *dma = dev->dma; - drm_buf_desc_t request; - drm_buf_entry_t *entry; - drm_buf_t *buf; - unsigned long offset; - unsigned long agp_offset; - int count; - int order; - int size; - int alignment; - int page_order; - int total; - int byte_count; - int i; - - if (!dma) return -EINVAL; - - copy_from_user_ret(&request, - (drm_buf_desc_t *)arg, - sizeof(request), - -EFAULT); - - count = request.count; - order = drm_order(request.size); - size = 1 << order; - agp_offset = request.agp_start; - alignment = (request.flags & _DRM_PAGE_ALIGN) ? PAGE_ALIGN(size) :size; - page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0; - total = PAGE_SIZE << page_order; - byte_count = 0; - - if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER) return -EINVAL; - if (dev->queue_count) return -EBUSY; /* Not while in use */ - spin_lock(&dev->count_lock); - if (dev->buf_use) { - spin_unlock(&dev->count_lock); - return -EBUSY; - } - atomic_inc(&dev->buf_alloc); - spin_unlock(&dev->count_lock); - - down(&dev->struct_sem); - entry = &dma->bufs[order]; - if (entry->buf_count) { - up(&dev->struct_sem); - atomic_dec(&dev->buf_alloc); - return -ENOMEM; /* May only call once for each order */ - } - - entry->buflist = drm_alloc(count * sizeof(*entry->buflist), - DRM_MEM_BUFS); - if (!entry->buflist) { - up(&dev->struct_sem); - atomic_dec(&dev->buf_alloc); - return -ENOMEM; - } - memset(entry->buflist, 0, count * sizeof(*entry->buflist)); - - entry->buf_size = size; - entry->page_order = page_order; - - while(entry->buf_count < count) { - for(offset = 0; offset + size <= total && entry->buf_count < count; - offset += alignment, ++entry->buf_count) { - buf = &entry->buflist[entry->buf_count]; - buf->idx = dma->buf_count + entry->buf_count; - buf->total = alignment; - buf->order = order; - buf->used = 0; - buf->offset = agp_offset - dev->agp->base + offset;/* ?? */ - buf->bus_address = agp_offset + offset; - buf->address = agp_offset + offset + dev->agp->base; - buf->next = NULL; - buf->waiting = 0; - buf->pending = 0; - init_waitqueue_head(&buf->dma_wait); - buf->pid = 0; -#if DRM_DMA_HISTOGRAM - buf->time_queued = 0; - buf->time_dispatched = 0; - buf->time_completed = 0; - buf->time_freed = 0; -#endif - DRM_DEBUG("buffer %d @ %p\n", - entry->buf_count, buf->address); - } - byte_count += PAGE_SIZE << page_order; - } - - dma->buflist = drm_realloc(dma->buflist, - dma->buf_count * sizeof(*dma->buflist), - (dma->buf_count + entry->buf_count) - * sizeof(*dma->buflist), - DRM_MEM_BUFS); - for (i = dma->buf_count; i < dma->buf_count + entry->buf_count; i++) - dma->buflist[i] = &entry->buflist[i - dma->buf_count]; - - dma->buf_count += entry->buf_count; - dma->byte_count += PAGE_SIZE * (entry->seg_count << page_order); - - drm_freelist_create(&entry->freelist, entry->buf_count); - for (i = 0; i < entry->buf_count; i++) { - drm_freelist_put(dev, &entry->freelist, &entry->buflist[i]); - } - - up(&dev->struct_sem); - - request.count = entry->buf_count; - request.size = size; - - copy_to_user_ret((drm_buf_desc_t *)arg, - &request, - sizeof(request), - -EFAULT); - - atomic_dec(&dev->buf_alloc); - return 0; -} - -int i810_addbufs_pci(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_device_dma_t *dma = dev->dma; - drm_buf_desc_t request; - int count; - int order; - int size; - int total; - int page_order; - drm_buf_entry_t *entry; - unsigned long page; - drm_buf_t *buf; - int alignment; - unsigned long offset; - int i; - int byte_count; - int page_count; + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_device_dma_t *dma = dev->dma; + drm_buf_desc_t request; + drm_buf_entry_t *entry; + drm_buf_t *buf; + unsigned long offset; + unsigned long agp_offset; + int count; + int order; + int size; + int alignment; + int page_order; + int total; + int byte_count; + int i; if (!dma) return -EINVAL; @@ -186,20 +62,17 @@ int i810_addbufs_pci(struct inode *inode, struct file *filp, unsigned int cmd, sizeof(request), -EFAULT); - count = request.count; - order = drm_order(request.size); - size = 1 << order; - - DRM_DEBUG("count = %d, size = %d (%d), order = %d, queue_count = %d\n", - request.count, request.size, size, order, dev->queue_count); - - if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER) return -EINVAL; - if (dev->queue_count) return -EBUSY; /* Not while in use */ - + count = request.count; + order = drm_order(request.size); + size = 1 << order; + agp_offset = request.agp_start; alignment = (request.flags & _DRM_PAGE_ALIGN) ? PAGE_ALIGN(size) :size; page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0; - total = PAGE_SIZE << page_order; - + total = PAGE_SIZE << page_order; + byte_count = 0; + + if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER) return -EINVAL; + if (dev->queue_count) return -EBUSY; /* Not while in use */ spin_lock(&dev->count_lock); if (dev->buf_use) { spin_unlock(&dev->count_lock); @@ -207,15 +80,15 @@ int i810_addbufs_pci(struct inode *inode, struct file *filp, unsigned int cmd, } atomic_inc(&dev->buf_alloc); spin_unlock(&dev->count_lock); - + down(&dev->struct_sem); entry = &dma->bufs[order]; if (entry->buf_count) { up(&dev->struct_sem); atomic_dec(&dev->buf_alloc); - return -ENOMEM; /* May only call once for each order */ + return -ENOMEM; /* May only call once for each order */ } - + entry->buflist = drm_alloc(count * sizeof(*entry->buflist), DRM_MEM_BUFS); if (!entry->buflist) { @@ -224,69 +97,45 @@ int i810_addbufs_pci(struct inode *inode, struct file *filp, unsigned int cmd, return -ENOMEM; } memset(entry->buflist, 0, count * sizeof(*entry->buflist)); - - entry->seglist = drm_alloc(count * sizeof(*entry->seglist), - DRM_MEM_SEGS); - if (!entry->seglist) { - drm_free(entry->buflist, - count * sizeof(*entry->buflist), - DRM_MEM_BUFS); - up(&dev->struct_sem); - atomic_dec(&dev->buf_alloc); - return -ENOMEM; - } - memset(entry->seglist, 0, count * sizeof(*entry->seglist)); - - dma->pagelist = drm_realloc(dma->pagelist, - dma->page_count * sizeof(*dma->pagelist), - (dma->page_count + (count << page_order)) - * sizeof(*dma->pagelist), - DRM_MEM_PAGES); - DRM_DEBUG("pagelist: %d entries\n", - dma->page_count + (count << page_order)); - - - entry->buf_size = size; + + entry->buf_size = size; entry->page_order = page_order; - byte_count = 0; - page_count = 0; - while (entry->buf_count < count) { - if (!(page = drm_alloc_pages(page_order, DRM_MEM_DMA))) break; - entry->seglist[entry->seg_count++] = page; - for (i = 0; i < (1 << page_order); i++) { - DRM_DEBUG("page %d @ 0x%08lx\n", - dma->page_count + page_count, - page + PAGE_SIZE * i); - dma->pagelist[dma->page_count + page_count++] - = page + PAGE_SIZE * i; - } - for (offset = 0; - offset + size <= total && entry->buf_count < count; - offset += alignment, ++entry->buf_count) { - buf = &entry->buflist[entry->buf_count]; - buf->idx = dma->buf_count + entry->buf_count; - buf->total = alignment; - buf->order = order; - buf->used = 0; - buf->offset = (dma->byte_count + byte_count + offset); - buf->address = (void *)(page + offset); - buf->next = NULL; - buf->waiting = 0; - buf->pending = 0; - init_waitqueue_head(&buf->dma_wait); - buf->pid = 0; + offset = 0; + + while(entry->buf_count < count) { + buf = &entry->buflist[entry->buf_count]; + buf->idx = dma->buf_count + entry->buf_count; + buf->total = alignment; + buf->order = order; + buf->used = 0; + buf->offset = offset; + buf->bus_address = dev->agp->base + agp_offset + offset; + buf->address = (void *)(agp_offset + offset + dev->agp->base); + buf->next = NULL; + buf->waiting = 0; + buf->pending = 0; + init_waitqueue_head(&buf->dma_wait); + buf->pid = 0; + + buf->dev_private = drm_alloc(sizeof(drm_i810_buf_priv_t), + DRM_MEM_BUFS); + buf->dev_priv_size = sizeof(drm_i810_buf_priv_t); + memset(buf->dev_private, 0, sizeof(drm_i810_buf_priv_t)); + #if DRM_DMA_HISTOGRAM - buf->time_queued = 0; - buf->time_dispatched = 0; - buf->time_completed = 0; - buf->time_freed = 0; + buf->time_queued = 0; + buf->time_dispatched = 0; + buf->time_completed = 0; + buf->time_freed = 0; #endif - DRM_DEBUG("buffer %d @ %p\n", - entry->buf_count, buf->address); - } + offset = offset + alignment; + entry->buf_count++; byte_count += PAGE_SIZE << page_order; + + DRM_DEBUG("buffer %d @ %p\n", + entry->buf_count, buf->address); } - + dma->buflist = drm_realloc(dma->buflist, dma->buf_count * sizeof(*dma->buflist), (dma->buf_count + entry->buf_count) @@ -294,45 +143,43 @@ int i810_addbufs_pci(struct inode *inode, struct file *filp, unsigned int cmd, DRM_MEM_BUFS); for (i = dma->buf_count; i < dma->buf_count + entry->buf_count; i++) dma->buflist[i] = &entry->buflist[i - dma->buf_count]; - - dma->buf_count += entry->buf_count; - dma->seg_count += entry->seg_count; - dma->page_count += entry->seg_count << page_order; - dma->byte_count += PAGE_SIZE * (entry->seg_count << page_order); - + + dma->buf_count += entry->buf_count; + dma->byte_count += byte_count; drm_freelist_create(&entry->freelist, entry->buf_count); for (i = 0; i < entry->buf_count; i++) { drm_freelist_put(dev, &entry->freelist, &entry->buflist[i]); } - + up(&dev->struct_sem); - + request.count = entry->buf_count; request.size = size; - + copy_to_user_ret((drm_buf_desc_t *)arg, &request, sizeof(request), -EFAULT); - + atomic_dec(&dev->buf_alloc); + dma->flags = _DRM_DMA_USE_AGP; return 0; } int i810_addbufs(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg) { - drm_buf_desc_t request; + drm_buf_desc_t request; - copy_from_user_ret(&request, - (drm_buf_desc_t *)arg, - sizeof(request), - -EFAULT); + copy_from_user_ret(&request, + (drm_buf_desc_t *)arg, + sizeof(request), + -EFAULT); - if(request.flags & _DRM_AGP_BUFFER) - return i810_addbufs_agp(inode, filp, cmd, arg); - else - return i810_addbufs_pci(inode, filp, cmd, arg); + if(request.flags & _DRM_AGP_BUFFER) + return i810_addbufs_agp(inode, filp, cmd, arg); + else + return -EINVAL; } int i810_infobufs(struct inode *inode, struct file *filp, unsigned int cmd, @@ -486,99 +333,3 @@ int i810_freebufs(struct inode *inode, struct file *filp, unsigned int cmd, return 0; } -int i810_mapbufs(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) -{ - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_device_dma_t *dma = dev->dma; - int retcode = 0; - const int zero = 0; - unsigned long virtual; - unsigned long address; - drm_buf_map_t request; - int i; - - if (!dma) return -EINVAL; - - DRM_DEBUG("\n"); - - spin_lock(&dev->count_lock); - if (atomic_read(&dev->buf_alloc)) { - spin_unlock(&dev->count_lock); - return -EBUSY; - } - ++dev->buf_use; /* Can't allocate more after this call */ - spin_unlock(&dev->count_lock); - - copy_from_user_ret(&request, - (drm_buf_map_t *)arg, - sizeof(request), - -EFAULT); - - if (request.count >= dma->buf_count) { - if(dma->flags & _DRM_DMA_USE_AGP) { - /* This is an ugly vicious hack */ - drm_map_t *map = NULL; - for(i = 0; i < dev->map_count; i++) { - map = dev->maplist[i]; - if(map->type == _DRM_AGP) break; - } - if (i >= dev->map_count || !map) { - retcode = -EINVAL; - goto done; - } - - virtual = do_mmap(filp, 0, map->size, PROT_READ|PROT_WRITE, - MAP_SHARED, (unsigned long)map->handle); - } - else { - virtual = do_mmap(filp, 0, dma->byte_count, - PROT_READ|PROT_WRITE, MAP_SHARED, 0); - } - if (virtual > -1024UL) { - /* Real error */ - retcode = (signed long)virtual; - goto done; - } - request.virtual = (void *)virtual; - - for (i = 0; i < dma->buf_count; i++) { - if (copy_to_user(&request.list[i].idx, - &dma->buflist[i]->idx, - sizeof(request.list[0].idx))) { - retcode = -EFAULT; - goto done; - } - if (copy_to_user(&request.list[i].total, - &dma->buflist[i]->total, - sizeof(request.list[0].total))) { - retcode = -EFAULT; - goto done; - } - if (copy_to_user(&request.list[i].used, - &zero, - sizeof(zero))) { - retcode = -EFAULT; - goto done; - } - address = virtual + dma->buflist[i]->offset; - if (copy_to_user(&request.list[i].address, - &address, - sizeof(address))) { - retcode = -EFAULT; - goto done; - } - } - } -done: - request.count = dma->buf_count; - DRM_DEBUG("%d buffers, retcode = %d\n", request.count, retcode); - - copy_to_user_ret((drm_buf_map_t *)arg, - &request, - sizeof(request), - -EFAULT); - - return retcode; -} diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c index 09959b657..f041f2098 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c @@ -25,8 +25,9 @@ * * Authors: Rickard E. (Rik) Faith <faith@precisioninsight.com> * Jeff Hartmann <jhartmann@precisioninsight.com> + * Keith Whitwell <keithw@precisioninsight.com> * - * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c,v 1.1 2000/02/11 17:26:04 dawes Exp $ + * $XFree86$ * */ @@ -36,6 +37,13 @@ #include <linux/interrupt.h> /* For task queue support */ +#define I810_BUF_FREE 2 +#define I810_BUF_CLIENT 1 +#define I810_BUF_HARDWARE 0 + +#define I810_BUF_UNMAPPED 0 +#define I810_BUF_MAPPED 1 + #define I810_REG(reg) 2 #define I810_BASE(reg) ((unsigned long) \ dev->maplist[I810_REG(reg)]->handle) @@ -43,544 +51,835 @@ #define I810_DEREF(reg) *(__volatile__ int *)I810_ADDR(reg) #define I810_READ(reg) I810_DEREF(reg) #define I810_WRITE(reg,val) do { I810_DEREF(reg) = val; } while (0) - -void i810_dma_init(drm_device_t *dev) +#define I810_DEREF16(reg) *(__volatile__ u16 *)I810_ADDR(reg) +#define I810_READ16(reg) I810_DEREF16(reg) +#define I810_WRITE16(reg,val) do { I810_DEREF16(reg) = val; } while (0) + +#define RING_LOCALS unsigned int outring, ringmask; volatile char *virt; + +#define BEGIN_LP_RING(n) do { \ + if (I810_VERBOSE) \ + DRM_DEBUG("BEGIN_LP_RING(%d) in %s\n", \ + n, __FUNCTION__); \ + if (dev_priv->ring.space < n*4) \ + i810_wait_ring(dev, n*4); \ + dev_priv->ring.space -= n*4; \ + outring = dev_priv->ring.tail; \ + ringmask = dev_priv->ring.tail_mask; \ + virt = dev_priv->ring.virtual_start; \ +} while (0) + +#define ADVANCE_LP_RING() do { \ + if (I810_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING\n"); \ + dev_priv->ring.tail = outring; \ + I810_WRITE(LP_RING + RING_TAIL, outring); \ +} while(0) + +#define OUT_RING(n) do { \ + if (I810_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \ + *(volatile unsigned int *)(virt + outring) = n; \ + outring += 4; \ + outring &= ringmask; \ +} while (0); + +static inline void i810_print_status_page(drm_device_t *dev) { - printk(KERN_INFO "i810_dma_init\n"); + drm_device_dma_t *dma = dev->dma; + drm_i810_private_t *dev_priv = dev->dev_private; + u32 *temp = (u32 *)dev_priv->hw_status_page; + int i; + + DRM_DEBUG( "hw_status: Interrupt Status : %x\n", temp[0]); + DRM_DEBUG( "hw_status: LpRing Head ptr : %x\n", temp[1]); + DRM_DEBUG( "hw_status: IRing Head ptr : %x\n", temp[2]); + DRM_DEBUG( "hw_status: Reserved : %x\n", temp[3]); + DRM_DEBUG( "hw_status: Driver Counter : %d\n", temp[5]); + for(i = 6; i < dma->buf_count + 6; i++) { + DRM_DEBUG( "buffer status idx : %d used: %d\n", i - 6, temp[i]); + } } -void i810_dma_cleanup(drm_device_t *dev) +static drm_buf_t *i810_freelist_get(drm_device_t *dev) { - printk(KERN_INFO "i810_dma_cleanup\n"); + drm_device_dma_t *dma = dev->dma; + int i; + int used; + + /* Linear search might not be the best solution */ + + for (i = 0; i < dma->buf_count; i++) { + drm_buf_t *buf = dma->buflist[ i ]; + drm_i810_buf_priv_t *buf_priv = buf->dev_private; + /* In use is already a pointer */ + used = cmpxchg(buf_priv->in_use, I810_BUF_FREE, + I810_BUF_CLIENT); + if(used == I810_BUF_FREE) { + return buf; + } + } + return NULL; } -static inline void i810_dma_dispatch(drm_device_t *dev, unsigned long address, - unsigned long length) +/* This should only be called if the buffer is not sent to the hardware + * yet, the hardware updates in use for us once its on the ring buffer. + */ + +static int i810_freelist_put(drm_device_t *dev, drm_buf_t *buf) { - printk(KERN_INFO "i810_dma_dispatch\n"); + drm_i810_buf_priv_t *buf_priv = buf->dev_private; + int used; + + /* In use is already a pointer */ + used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE); + if(used != I810_BUF_CLIENT) { + DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx); + return -EINVAL; + } + + return 0; } -static inline void i810_dma_quiescent(drm_device_t *dev) +static struct file_operations i810_buffer_fops = { + open: i810_open, + flush: drm_flush, + release: i810_release, + ioctl: i810_ioctl, + mmap: i810_mmap_buffers, + read: drm_read, + fasync: drm_fasync, + poll: drm_poll, +}; + +int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma) { + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_i810_private_t *dev_priv = dev->dev_private; + drm_buf_t *buf = dev_priv->mmap_buffer; + drm_i810_buf_priv_t *buf_priv = buf->dev_private; + + vma->vm_flags |= (VM_IO | VM_DONTCOPY); + vma->vm_file = filp; + + buf_priv->currently_mapped = I810_BUF_MAPPED; + + if (remap_page_range(vma->vm_start, + VM_OFFSET(vma), + vma->vm_end - vma->vm_start, + vma->vm_page_prot)) return -EAGAIN; + return 0; } -static inline void i810_dma_ready(drm_device_t *dev) +static int i810_map_buffer(drm_buf_t *buf, struct file *filp) { - i810_dma_quiescent(dev); - printk(KERN_INFO "i810_dma_ready\n"); + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_i810_buf_priv_t *buf_priv = buf->dev_private; + drm_i810_private_t *dev_priv = dev->dev_private; + struct file_operations *old_fops; + int retcode = 0; + + if(buf_priv->currently_mapped == I810_BUF_MAPPED) return -EINVAL; + down(¤t->mm->mmap_sem); + old_fops = filp->f_op; + filp->f_op = &i810_buffer_fops; + dev_priv->mmap_buffer = buf; + buf_priv->virtual = (void *)do_mmap(filp, 0, buf->total, + PROT_READ|PROT_WRITE, + MAP_SHARED, + buf->bus_address); + dev_priv->mmap_buffer = NULL; + filp->f_op = old_fops; + if ((unsigned long)buf_priv->virtual > -1024UL) { + /* Real error */ + DRM_DEBUG("mmap error\n"); + retcode = (signed int)buf_priv->virtual; + buf_priv->virtual = 0; + } + up(¤t->mm->mmap_sem); + return retcode; } -static inline int i810_dma_is_ready(drm_device_t *dev) +static int i810_unmap_buffer(drm_buf_t *buf) { + drm_i810_buf_priv_t *buf_priv = buf->dev_private; + int retcode = 0; - i810_dma_quiescent(dev); + if(buf_priv->currently_mapped != I810_BUF_MAPPED) return -EINVAL; + down(¤t->mm->mmap_sem); + retcode = do_munmap((unsigned long)buf_priv->virtual, + (size_t) buf->total); + buf_priv->currently_mapped = I810_BUF_UNMAPPED; + buf_priv->virtual = 0; + up(¤t->mm->mmap_sem); - printk(KERN_INFO "i810_dma_is_ready\n"); - return 1; + return retcode; } - -static void i810_dma_service(int irq, void *device, struct pt_regs *regs) +static int i810_dma_get_buffer(drm_device_t *dev, drm_i810_dma_t *d, + struct file *filp) { - drm_device_t *dev = (drm_device_t *)device; - drm_device_dma_t *dma = dev->dma; - - atomic_inc(&dev->total_irq); - if (i810_dma_is_ready(dev)) { - /* Free previous buffer */ - if (test_and_set_bit(0, &dev->dma_flag)) { - atomic_inc(&dma->total_missed_free); - return; - } - if (dma->this_buffer) { - drm_free_buffer(dev, dma->this_buffer); - dma->this_buffer = NULL; - } - clear_bit(0, &dev->dma_flag); - - /* Dispatch new buffer */ - queue_task(&dev->tq, &tq_immediate); - mark_bh(IMMEDIATE_BH); + drm_file_t *priv = filp->private_data; + drm_buf_t *buf; + drm_i810_buf_priv_t *buf_priv; + int retcode = 0; + + buf = i810_freelist_get(dev); + if (!buf) { + retcode = -ENOMEM; + DRM_DEBUG("%s retcode %d\n", __FUNCTION__, retcode); + goto out_get_buf; + } + + retcode = i810_map_buffer(buf, filp); + if(retcode) { + i810_freelist_put(dev, buf); + DRM_DEBUG("mapbuf failed in %s retcode %d\n", + __FUNCTION__, retcode); + goto out_get_buf; } + buf->pid = priv->pid; + buf_priv = buf->dev_private; + d->granted = 1; + d->request_idx = buf->idx; + d->request_size = buf->total; + d->virtual = buf_priv->virtual; + +out_get_buf: + return retcode; } -/* Only called by i810_dma_schedule. */ -static int i810_do_dma(drm_device_t *dev, int locked) +static unsigned long i810_alloc_page(drm_device_t *dev) { - unsigned long address; - unsigned long length; - drm_buf_t *buf; - int retcode = 0; - drm_device_dma_t *dma = dev->dma; -#if DRM_DMA_HISTOGRAM - cycles_t dma_start, dma_stop; -#endif - - if (test_and_set_bit(0, &dev->dma_flag)) { - atomic_inc(&dma->total_missed_dma); - return -EBUSY; - } + unsigned long address; + + address = __get_free_page(GFP_KERNEL); + if(address == 0UL) + return 0; -#if DRM_DMA_HISTOGRAM - dma_start = get_cycles(); -#endif - - if (!dma->next_buffer) { - DRM_ERROR("No next_buffer\n"); - clear_bit(0, &dev->dma_flag); - return -EINVAL; - } + atomic_inc(&mem_map[MAP_NR((void *) address)].count); + set_bit(PG_locked, &mem_map[MAP_NR((void *) address)].flags); + + return address; +} - buf = dma->next_buffer; - address = (unsigned long)buf->bus_address; - length = buf->used; +static void i810_free_page(drm_device_t *dev, unsigned long page) +{ + if(page == 0UL) + return; + atomic_dec(&mem_map[MAP_NR((void *) page)].count); + clear_bit(PG_locked, &mem_map[MAP_NR((void *) page)].flags); + wake_up(&mem_map[MAP_NR((void *) page)].wait); + free_page(page); + return; +} - DRM_DEBUG("context %d, buffer %d (%ld bytes)\n", - buf->context, buf->idx, length); - - if (buf->list == DRM_LIST_RECLAIM) { - drm_clear_next_buffer(dev); - drm_free_buffer(dev, buf); - clear_bit(0, &dev->dma_flag); - return -EINVAL; - } - - if (!length) { - DRM_ERROR("0 length buffer\n"); - drm_clear_next_buffer(dev); - drm_free_buffer(dev, buf); - clear_bit(0, &dev->dma_flag); - return 0; - } - - if (!i810_dma_is_ready(dev)) { - clear_bit(0, &dev->dma_flag); - return -EBUSY; - } +static int i810_dma_cleanup(drm_device_t *dev) +{ + drm_device_dma_t *dma = dev->dma; - if (buf->while_locked) { - if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { - DRM_ERROR("Dispatching buffer %d from pid %d" - " \"while locked\", but no lock held\n", - buf->idx, buf->pid); + if(dev->dev_private) { + int i; + drm_i810_private_t *dev_priv = + (drm_i810_private_t *) dev->dev_private; + + if(dev_priv->ring.virtual_start) { + drm_ioremapfree((void *) dev_priv->ring.virtual_start, + dev_priv->ring.Size); + } + if(dev_priv->hw_status_page != 0UL) { + i810_free_page(dev, dev_priv->hw_status_page); + /* Need to rewrite hardware status page */ + I810_WRITE(0x02080, 0x1ffff000); } - } else { - if (!locked && !drm_lock_take(&dev->lock.hw_lock->lock, - DRM_KERNEL_CONTEXT)) { - atomic_inc(&dma->total_missed_lock); - clear_bit(0, &dev->dma_flag); - return -EBUSY; + drm_free(dev->dev_private, sizeof(drm_i810_private_t), + DRM_MEM_DRIVER); + dev->dev_private = NULL; + + for (i = 0; i < dma->buf_count; i++) { + drm_buf_t *buf = dma->buflist[ i ]; + drm_i810_buf_priv_t *buf_priv = buf->dev_private; + drm_ioremapfree(buf_priv->kernel_virtual, buf->total); } } + return 0; +} - if (dev->last_context != buf->context - && !(dev->queuelist[buf->context]->flags - & _DRM_CONTEXT_PRESERVED)) { - /* PRE: dev->last_context != buf->context */ - if (drm_context_switch(dev, dev->last_context, buf->context)) { - drm_clear_next_buffer(dev); - drm_free_buffer(dev, buf); +static int i810_wait_ring(drm_device_t *dev, int n) +{ + drm_i810_private_t *dev_priv = dev->dev_private; + drm_i810_ring_buffer_t *ring = &(dev_priv->ring); + int iters = 0; + unsigned long end; + unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR; + + end = jiffies + (HZ*3); + while (ring->space < n) { + int i; + + ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR; + ring->space = ring->head - (ring->tail+8); + if (ring->space < 0) ring->space += ring->Size; + + if (ring->head != last_head) + end = jiffies + (HZ*3); + + iters++; + if((signed)(end - jiffies) <= 0) { + DRM_ERROR("space: %d wanted %d\n", ring->space, n); + DRM_ERROR("lockup\n"); + goto out_wait_ring; } - retcode = -EBUSY; - goto cleanup; - - /* POST: we will wait for the context - switch and will dispatch on a later call - when dev->last_context == buf->context. - NOTE WE HOLD THE LOCK THROUGHOUT THIS - TIME! */ - } - - drm_clear_next_buffer(dev); - buf->pending = 1; - buf->waiting = 0; - buf->list = DRM_LIST_PEND; -#if DRM_DMA_HISTOGRAM - buf->time_dispatched = get_cycles(); -#endif - - i810_dma_dispatch(dev, address, length); - drm_free_buffer(dev, dma->this_buffer); - dma->this_buffer = buf; - - atomic_add(length, &dma->total_bytes); - atomic_inc(&dma->total_dmas); - if (!buf->while_locked && !dev->context_flag && !locked) { - if (drm_lock_free(dev, &dev->lock.hw_lock->lock, - DRM_KERNEL_CONTEXT)) { - DRM_ERROR("\n"); - } + for (i = 0 ; i < 2000 ; i++) ; } -cleanup: - - clear_bit(0, &dev->dma_flag); - -#if DRM_DMA_HISTOGRAM - dma_stop = get_cycles(); - atomic_inc(&dev->histo.dma[drm_histogram_slot(dma_stop - dma_start)]); -#endif - return retcode; +out_wait_ring: + return iters; } -static void i810_dma_schedule_timer_wrapper(unsigned long dev) +static void i810_kernel_lost_context(drm_device_t *dev) { - i810_dma_schedule((drm_device_t *)dev, 0); + drm_i810_private_t *dev_priv = dev->dev_private; + drm_i810_ring_buffer_t *ring = &(dev_priv->ring); + + ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR; + ring->tail = I810_READ(LP_RING + RING_TAIL); + ring->space = ring->head - (ring->tail+8); + if (ring->space < 0) ring->space += ring->Size; } -static void i810_dma_schedule_tq_wrapper(void *dev) +static int i810_freelist_init(drm_device_t *dev) { - i810_dma_schedule(dev, 0); + drm_device_dma_t *dma = dev->dma; + drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; + int my_idx = 24; + u32 *hw_status = (u32 *)(dev_priv->hw_status_page + my_idx); + int i; + + if(dma->buf_count > 1019) { + /* Not enough space in the status page for the freelist */ + return -EINVAL; + } + + for (i = 0; i < dma->buf_count; i++) { + drm_buf_t *buf = dma->buflist[ i ]; + drm_i810_buf_priv_t *buf_priv = buf->dev_private; + + buf_priv->in_use = hw_status++; + buf_priv->my_use_idx = my_idx; + my_idx += 4; + + *buf_priv->in_use = I810_BUF_FREE; + + buf_priv->kernel_virtual = drm_ioremap(buf->bus_address, + buf->total); + } + return 0; } -int i810_dma_schedule(drm_device_t *dev, int locked) +static int i810_dma_initialize(drm_device_t *dev, + drm_i810_private_t *dev_priv, + drm_i810_init_t *init) { - int next; - drm_queue_t *q; - drm_buf_t *buf; - int retcode = 0; - int processed = 0; - int missed; - int expire = 20; - drm_device_dma_t *dma = dev->dma; -#if DRM_DMA_HISTOGRAM - cycles_t schedule_start; -#endif + drm_map_t *sarea_map; - if (test_and_set_bit(0, &dev->interrupt_flag)) { - /* Not reentrant */ - atomic_inc(&dma->total_missed_sched); - return -EBUSY; + dev->dev_private = (void *) dev_priv; + memset(dev_priv, 0, sizeof(drm_i810_private_t)); + + if (init->ring_map_idx >= dev->map_count || + init->buffer_map_idx >= dev->map_count) { + i810_dma_cleanup(dev); + DRM_ERROR("ring_map or buffer_map are invalid\n"); + return -EINVAL; + } + + dev_priv->ring_map_idx = init->ring_map_idx; + dev_priv->buffer_map_idx = init->buffer_map_idx; + sarea_map = dev->maplist[0]; + dev_priv->sarea_priv = (drm_i810_sarea_t *) + ((u8 *)sarea_map->handle + + init->sarea_priv_offset); + + atomic_set(&dev_priv->flush_done, 0); + init_waitqueue_head(&dev_priv->flush_queue); + + dev_priv->ring.Start = init->ring_start; + dev_priv->ring.End = init->ring_end; + dev_priv->ring.Size = init->ring_size; + + dev_priv->ring.virtual_start = drm_ioremap(dev->agp->base + + init->ring_start, + init->ring_size); + + dev_priv->ring.tail_mask = dev_priv->ring.Size - 1; + + if (dev_priv->ring.virtual_start == NULL) { + i810_dma_cleanup(dev); + DRM_ERROR("can not ioremap virtual address for" + " ring buffer\n"); + return -ENOMEM; } - missed = atomic_read(&dma->total_missed_sched); -#if DRM_DMA_HISTOGRAM - schedule_start = get_cycles(); -#endif + dev_priv->w = init->w; + dev_priv->h = init->h; + dev_priv->pitch = init->pitch; + dev_priv->back_offset = init->back_offset; + dev_priv->depth_offset = init->depth_offset; -again: - if (dev->context_flag) { - clear_bit(0, &dev->interrupt_flag); - return -EBUSY; + dev_priv->front_di1 = init->front_offset | init->pitch_bits; + dev_priv->back_di1 = init->back_offset | init->pitch_bits; + dev_priv->zi1 = init->depth_offset | init->pitch_bits; + + + /* Program Hardware Status Page */ + dev_priv->hw_status_page = i810_alloc_page(dev); + memset((void *) dev_priv->hw_status_page, 0, PAGE_SIZE); + if(dev_priv->hw_status_page == 0UL) { + i810_dma_cleanup(dev); + DRM_ERROR("Can not allocate hardware status page\n"); + return -ENOMEM; } - if (dma->next_buffer) { - /* Unsent buffer that was previously - selected, but that couldn't be sent - because the lock could not be obtained - or the DMA engine wasn't ready. Try - again. */ - atomic_inc(&dma->total_tried); - if (!(retcode = i810_do_dma(dev, locked))) { - atomic_inc(&dma->total_hit); - ++processed; - } - } else { - do { - next = drm_select_queue(dev, - i810_dma_schedule_timer_wrapper); - if (next >= 0) { - q = dev->queuelist[next]; - buf = drm_waitlist_get(&q->waitlist); - dma->next_buffer = buf; - dma->next_queue = q; - if (buf && buf->list == DRM_LIST_RECLAIM) { - drm_clear_next_buffer(dev); - drm_free_buffer(dev, buf); - } - } - } while (next >= 0 && !dma->next_buffer); - if (dma->next_buffer) { - if (!(retcode = i810_do_dma(dev, locked))) { - ++processed; - } - } + DRM_DEBUG("hw status page @ %lx\n", dev_priv->hw_status_page); + + I810_WRITE(0x02080, virt_to_bus((void *)dev_priv->hw_status_page)); + DRM_DEBUG("Enabled hardware status page\n"); + + /* Now we need to init our freelist */ + if(i810_freelist_init(dev) != 0) { + i810_dma_cleanup(dev); + DRM_ERROR("Not enough space in the status page for" + " the freelist\n"); + return -ENOMEM; } + return 0; +} - if (--expire) { - if (missed != atomic_read(&dma->total_missed_sched)) { - atomic_inc(&dma->total_lost); - if (i810_dma_is_ready(dev)) goto again; - } - if (processed && i810_dma_is_ready(dev)) { - atomic_inc(&dma->total_lost); - processed = 0; - goto again; - } - } +int i810_dma_init(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_i810_private_t *dev_priv; + drm_i810_init_t init; + int retcode = 0; - clear_bit(0, &dev->interrupt_flag); + copy_from_user_ret(&init, (drm_i810_init_t *)arg, + sizeof(init), -EFAULT); -#if DRM_DMA_HISTOGRAM - atomic_inc(&dev->histo.schedule[drm_histogram_slot(get_cycles() - - schedule_start)]); -#endif - return retcode; + switch(init.func) { + case I810_INIT_DMA: + dev_priv = drm_alloc(sizeof(drm_i810_private_t), + DRM_MEM_DRIVER); + if(dev_priv == NULL) return -ENOMEM; + retcode = i810_dma_initialize(dev, dev_priv, &init); + break; + case I810_CLEANUP_DMA: + retcode = i810_dma_cleanup(dev); + break; + default: + retcode = -EINVAL; + break; + } + + return retcode; } -static int i810_dma_priority(drm_device_t *dev, drm_dma_t *d) -{ - unsigned long address; - unsigned long length; - int must_free = 0; - int retcode = 0; - int i; - int idx; - drm_buf_t *buf; - drm_buf_t *last_buf = NULL; - drm_device_dma_t *dma = dev->dma; - DECLARE_WAITQUEUE(entry, current); - /* Turn off interrupt handling */ - while (test_and_set_bit(0, &dev->interrupt_flag)) { - schedule(); - if (signal_pending(current)) return -EINTR; - } - if (!(d->flags & _DRM_DMA_WHILE_LOCKED)) { - while (!drm_lock_take(&dev->lock.hw_lock->lock, - DRM_KERNEL_CONTEXT)) { - schedule(); - if (signal_pending(current)) { - clear_bit(0, &dev->interrupt_flag); - return -EINTR; - } - } - ++must_free; + +/* Most efficient way to verify state for the i810 is as it is + * emitted. Non-conformant state is silently dropped. + * + * Use 'volatile' & local var tmp to force the emitted values to be + * identical to the verified ones. + */ +static void i810EmitContextVerified( drm_device_t *dev, + volatile unsigned int *code ) +{ + drm_i810_private_t *dev_priv = dev->dev_private; + int i, j = 0; + unsigned int tmp; + RING_LOCALS; + + BEGIN_LP_RING( I810_CTX_SETUP_SIZE ); + + OUT_RING( GFX_OP_COLOR_FACTOR ); + OUT_RING( code[I810_CTXREG_CF1] ); + + OUT_RING( GFX_OP_STIPPLE ); + OUT_RING( code[I810_CTXREG_ST1] ); + + for ( i = 4 ; i < I810_CTX_SETUP_SIZE ; i++ ) { + tmp = code[i]; + + if ((tmp & (7<<29)) == (3<<29) && + (tmp & (0x1f<<24)) < (0x1d<<24)) + { + OUT_RING( tmp ); + j++; + } } - atomic_inc(&dma->total_prio); - for (i = 0; i < d->send_count; i++) { - idx = d->send_indices[i]; - if (idx < 0 || idx >= dma->buf_count) { - DRM_ERROR("Index %d (of %d max)\n", - d->send_indices[i], dma->buf_count - 1); - continue; - } - buf = dma->buflist[ idx ]; - if (buf->pid != current->pid) { - DRM_ERROR("Process %d using buffer owned by %d\n", - current->pid, buf->pid); - retcode = -EINVAL; - goto cleanup; - } - if (buf->list != DRM_LIST_NONE) { - DRM_ERROR("Process %d using %d's buffer on list %d\n", - current->pid, buf->pid, buf->list); - retcode = -EINVAL; - goto cleanup; - } - /* This isn't a race condition on - buf->list, since our concern is the - buffer reclaim during the time the - process closes the /dev/drm? handle, so - it can't also be doing DMA. */ - buf->list = DRM_LIST_PRIO; - buf->used = d->send_sizes[i]; - buf->context = d->context; - buf->while_locked = d->flags & _DRM_DMA_WHILE_LOCKED; - address = (unsigned long)buf->address; - length = buf->used; - if (!length) { - DRM_ERROR("0 length buffer\n"); - } - if (buf->pending) { - DRM_ERROR("Sending pending buffer:" - " buffer %d, offset %d\n", - d->send_indices[i], i); - retcode = -EINVAL; - goto cleanup; - } - if (buf->waiting) { - DRM_ERROR("Sending waiting buffer:" - " buffer %d, offset %d\n", - d->send_indices[i], i); - retcode = -EINVAL; - goto cleanup; + if (j & 1) + OUT_RING( 0 ); + + ADVANCE_LP_RING(); +} + +static void i810EmitTexVerified( drm_device_t *dev, + volatile unsigned int *code ) +{ + drm_i810_private_t *dev_priv = dev->dev_private; + int i, j = 0; + unsigned int tmp; + RING_LOCALS; + + BEGIN_LP_RING( I810_TEX_SETUP_SIZE ); + + OUT_RING( GFX_OP_MAP_INFO ); + OUT_RING( code[I810_TEXREG_MI1] ); + OUT_RING( code[I810_TEXREG_MI2] ); + OUT_RING( code[I810_TEXREG_MI3] ); + + for ( i = 4 ; i < I810_TEX_SETUP_SIZE ; i++ ) { + tmp = code[i]; + + if ((tmp & (7<<29)) == (3<<29) && + (tmp & (0x1f<<24)) < (0x1d<<24)) + { + OUT_RING( tmp ); + j++; } - buf->pending = 1; + } - if (dev->last_context != buf->context - && !(dev->queuelist[buf->context]->flags - & _DRM_CONTEXT_PRESERVED)) { - add_wait_queue(&dev->context_wait, &entry); - current->state = TASK_INTERRUPTIBLE; - /* PRE: dev->last_context != buf->context */ - drm_context_switch(dev, dev->last_context, - buf->context); - /* POST: we will wait for the context - switch and will dispatch on a later call - when dev->last_context == buf->context. - NOTE WE HOLD THE LOCK THROUGHOUT THIS - TIME! */ - schedule(); - current->state = TASK_RUNNING; - remove_wait_queue(&dev->context_wait, &entry); - if (signal_pending(current)) { - retcode = -EINTR; - goto cleanup; - } - if (dev->last_context != buf->context) { - DRM_ERROR("Context mismatch: %d %d\n", - dev->last_context, - buf->context); - } - } + if (j & 1) + OUT_RING( 0 ); -#if DRM_DMA_HISTOGRAM - buf->time_queued = get_cycles(); - buf->time_dispatched = buf->time_queued; -#endif - i810_dma_dispatch(dev, address, length); - if (drm_lock_free(dev, &dev->lock.hw_lock->lock, - DRM_KERNEL_CONTEXT)) { - DRM_ERROR("\n"); - } + ADVANCE_LP_RING(); +} - atomic_add(length, &dma->total_bytes); - atomic_inc(&dma->total_dmas); - - if (last_buf) { - drm_free_buffer(dev, last_buf); - } - last_buf = buf; + +/* Need to do some additional checking when setting the dest buffer. + */ +static void i810EmitDestVerified( drm_device_t *dev, + volatile unsigned int *code ) +{ + drm_i810_private_t *dev_priv = dev->dev_private; + unsigned int tmp; + RING_LOCALS; + + BEGIN_LP_RING( I810_DEST_SETUP_SIZE + 2 ); + + tmp = code[I810_DESTREG_DI1]; + if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) { + OUT_RING( CMD_OP_DESTBUFFER_INFO ); + OUT_RING( tmp ); + } else + DRM_DEBUG("bad di1 %x (allow %x or %x)\n", + tmp, dev_priv->front_di1, dev_priv->back_di1); + + /* invarient: + */ + OUT_RING( CMD_OP_Z_BUFFER_INFO ); + OUT_RING( dev_priv->zi1 ); + + OUT_RING( GFX_OP_DESTBUFFER_VARS ); + OUT_RING( code[I810_DESTREG_DV1] ); + + OUT_RING( GFX_OP_DRAWRECT_INFO ); + OUT_RING( code[I810_DESTREG_DR1] ); + OUT_RING( code[I810_DESTREG_DR2] ); + OUT_RING( code[I810_DESTREG_DR3] ); + OUT_RING( code[I810_DESTREG_DR4] ); + OUT_RING( 0 ); + + ADVANCE_LP_RING(); +} + + + +static void i810EmitState( drm_device_t *dev ) +{ + drm_i810_private_t *dev_priv = dev->dev_private; + drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; + unsigned int dirty = sarea_priv->dirty; + + if (dirty & I810_UPLOAD_BUFFERS) { + i810EmitDestVerified( dev, sarea_priv->BufferState ); + sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS; } + if (dirty & I810_UPLOAD_CTX) { + i810EmitContextVerified( dev, sarea_priv->ContextState ); + sarea_priv->dirty &= ~I810_UPLOAD_CTX; + } -cleanup: - if (last_buf) { - i810_dma_ready(dev); - drm_free_buffer(dev, last_buf); + if (dirty & I810_UPLOAD_TEX0) { + i810EmitTexVerified( dev, sarea_priv->TexState[0] ); + sarea_priv->dirty &= ~I810_UPLOAD_TEX0; } - - if (must_free && !dev->context_flag) { - if (drm_lock_free(dev, &dev->lock.hw_lock->lock, - DRM_KERNEL_CONTEXT)) { - DRM_ERROR("\n"); - } + + if (dirty & I810_UPLOAD_TEX1) { + i810EmitTexVerified( dev, sarea_priv->TexState[1] ); + sarea_priv->dirty &= ~I810_UPLOAD_TEX1; } - clear_bit(0, &dev->interrupt_flag); - return retcode; } -static int i810_dma_send_buffers(drm_device_t *dev, drm_dma_t *d) + + +/* need to verify + */ +static void i810_dma_dispatch_clear( drm_device_t *dev, int flags, + unsigned int clear_color, + unsigned int clear_zval ) { - DECLARE_WAITQUEUE(entry, current); - drm_buf_t *last_buf = NULL; - int retcode = 0; - drm_device_dma_t *dma = dev->dma; + drm_i810_private_t *dev_priv = dev->dev_private; + drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; + int nbox = sarea_priv->nbox; + drm_clip_rect_t *pbox = sarea_priv->boxes; + int pitch = dev_priv->pitch; + int cpp = 2; + int i; + RING_LOCALS; + + i810_kernel_lost_context(dev); + + if (nbox > I810_NR_SAREA_CLIPRECTS) + nbox = I810_NR_SAREA_CLIPRECTS; + + for (i = 0 ; i < nbox ; i++, pbox++) { + unsigned int x = pbox->x1; + unsigned int y = pbox->y1; + unsigned int width = (pbox->x2 - x) * cpp; + unsigned int height = pbox->y2 - y; + unsigned int start = y * pitch + x * cpp; + + if (pbox->x1 > pbox->x2 || + pbox->y1 > pbox->y2 || + pbox->x2 > dev_priv->w || + pbox->y2 > dev_priv->h) + continue; - if (d->flags & _DRM_DMA_BLOCK) { - last_buf = dma->buflist[d->send_indices[d->send_count-1]]; - add_wait_queue(&last_buf->dma_wait, &entry); - } - - if ((retcode = drm_dma_enqueue(dev, d))) { - if (d->flags & _DRM_DMA_BLOCK) - remove_wait_queue(&last_buf->dma_wait, &entry); - return retcode; - } - - i810_dma_schedule(dev, 0); - - if (d->flags & _DRM_DMA_BLOCK) { - DRM_DEBUG("%d waiting\n", current->pid); - current->state = TASK_INTERRUPTIBLE; - for (;;) { - if (!last_buf->waiting - && !last_buf->pending) - break; /* finished */ - schedule(); - if (signal_pending(current)) { - retcode = -EINTR; /* Can't restart */ - break; - } + if ( flags & I810_FRONT ) { + DRM_DEBUG("clear front\n"); + BEGIN_LP_RING( 6 ); + OUT_RING( BR00_BITBLT_CLIENT | + BR00_OP_COLOR_BLT | 0x3 ); + OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch ); + OUT_RING( (height << 16) | width ); + OUT_RING( start ); + OUT_RING( clear_color ); + OUT_RING( 0 ); + ADVANCE_LP_RING(); } - current->state = TASK_RUNNING; - DRM_DEBUG("%d running\n", current->pid); - remove_wait_queue(&last_buf->dma_wait, &entry); - if (!retcode - || (last_buf->list==DRM_LIST_PEND && !last_buf->pending)) { - if (!waitqueue_active(&last_buf->dma_wait)) { - drm_free_buffer(dev, last_buf); - } + + if ( flags & I810_BACK ) { + DRM_DEBUG("clear back\n"); + BEGIN_LP_RING( 6 ); + OUT_RING( BR00_BITBLT_CLIENT | + BR00_OP_COLOR_BLT | 0x3 ); + OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch ); + OUT_RING( (height << 16) | width ); + OUT_RING( dev_priv->back_offset + start ); + OUT_RING( clear_color ); + OUT_RING( 0 ); + ADVANCE_LP_RING(); } - if (retcode) { - DRM_ERROR("ctx%d w%d p%d c%d i%d l%d %d/%d\n", - d->context, - last_buf->waiting, - last_buf->pending, - DRM_WAITCOUNT(dev, d->context), - last_buf->idx, - last_buf->list, - last_buf->pid, - current->pid); + + if ( flags & I810_DEPTH ) { + DRM_DEBUG("clear depth\n"); + BEGIN_LP_RING( 6 ); + OUT_RING( BR00_BITBLT_CLIENT | + BR00_OP_COLOR_BLT | 0x3 ); + OUT_RING( BR13_SOLID_PATTERN | (0xF0 << 16) | pitch ); + OUT_RING( (height << 16) | width ); + OUT_RING( dev_priv->depth_offset + start ); + OUT_RING( clear_zval ); + OUT_RING( 0 ); + ADVANCE_LP_RING(); } } - return retcode; } -int i810_dma(struct inode *inode, struct file *filp, unsigned int cmd, - unsigned long arg) +static void i810_dma_dispatch_swap( drm_device_t *dev ) { - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_device_dma_t *dma = dev->dma; - int retcode = 0; - drm_dma_t d; + drm_i810_private_t *dev_priv = dev->dev_private; + drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; + int nbox = sarea_priv->nbox; + drm_clip_rect_t *pbox = sarea_priv->boxes; + int pitch = dev_priv->pitch; + int cpp = 2; + int ofs = dev_priv->back_offset; + int i; + RING_LOCALS; + + DRM_DEBUG("swapbuffers\n"); + + i810_kernel_lost_context(dev); + + if (nbox > I810_NR_SAREA_CLIPRECTS) + nbox = I810_NR_SAREA_CLIPRECTS; + + for (i = 0 ; i < nbox; i++, pbox++) + { + unsigned int w = pbox->x2 - pbox->x1; + unsigned int h = pbox->y2 - pbox->y1; + unsigned int dst = pbox->x1*cpp + pbox->y1*pitch; + unsigned int start = ofs + dst; + + if (pbox->x1 > pbox->x2 || + pbox->y1 > pbox->y2 || + pbox->x2 > dev_priv->w || + pbox->y2 > dev_priv->h) + continue; + + DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n", + pbox[i].x1, pbox[i].y1, + pbox[i].x2, pbox[i].y2); + + BEGIN_LP_RING( 6 ); + OUT_RING( BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4 ); + OUT_RING( pitch | (0xCC << 16)); + OUT_RING( (h << 16) | (w * cpp)); + OUT_RING( dst ); + OUT_RING( pitch ); + OUT_RING( start ); + ADVANCE_LP_RING(); + } +} - printk("i810_dma start\n"); - copy_from_user_ret(&d, (drm_dma_t *)arg, sizeof(d), -EFAULT); - DRM_DEBUG("%d %d: %d send, %d req\n", - current->pid, d.context, d.send_count, d.request_count); - if (d.context == DRM_KERNEL_CONTEXT || d.context >= dev->queue_slots) { - DRM_ERROR("Process %d using context %d\n", - current->pid, d.context); - return -EINVAL; +static void i810_dma_dispatch_vertex(drm_device_t *dev, + drm_buf_t *buf, + int discard, + int used) +{ + drm_i810_private_t *dev_priv = dev->dev_private; + drm_i810_buf_priv_t *buf_priv = buf->dev_private; + drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; + drm_clip_rect_t *box = sarea_priv->boxes; + int nbox = sarea_priv->nbox; + unsigned long address = (unsigned long)buf->bus_address; + unsigned long start = address - dev->agp->base; + int i = 0, u; + RING_LOCALS; + + i810_kernel_lost_context(dev); + + if (nbox > I810_NR_SAREA_CLIPRECTS) + nbox = I810_NR_SAREA_CLIPRECTS; + + if (discard) { + u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, + I810_BUF_HARDWARE); + if(u != I810_BUF_CLIENT) { + DRM_DEBUG("xxxx 2\n"); + } } - if (d.send_count < 0 || d.send_count > dma->buf_count) { - DRM_ERROR("Process %d trying to send %d buffers (of %d max)\n", - current->pid, d.send_count, dma->buf_count); - return -EINVAL; + if (used > 4*1024) + used = 0; + + if (sarea_priv->dirty) + i810EmitState( dev ); + + DRM_DEBUG("dispatch vertex addr 0x%lx, used 0x%x nbox %d\n", + address, used, nbox); + + dev_priv->counter++; + DRM_DEBUG( "dispatch counter : %ld\n", dev_priv->counter); + DRM_DEBUG( "i810_dma_dispatch\n"); + DRM_DEBUG( "start : %lx\n", start); + DRM_DEBUG( "used : %d\n", used); + DRM_DEBUG( "start + used - 4 : %ld\n", start + used - 4); + + if (buf_priv->currently_mapped == I810_BUF_MAPPED) { + *(u32 *)buf_priv->virtual = (GFX_OP_PRIMITIVE | + sarea_priv->vertex_prim | + ((used/4)-2)); + + if (used & 4) { + *(u32 *)((u32)buf_priv->virtual + used) = 0; + used += 4; + } + + i810_unmap_buffer(buf); } - if (d.request_count < 0 || d.request_count > dma->buf_count) { - DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n", - current->pid, d.request_count, dma->buf_count); - return -EINVAL; + + if (used) { + do { + if (i < nbox) { + BEGIN_LP_RING(4); + OUT_RING( GFX_OP_SCISSOR | SC_UPDATE_SCISSOR | + SC_ENABLE ); + OUT_RING( GFX_OP_SCISSOR_INFO ); + OUT_RING( box[i].x1 | (box[i].y1<<16) ); + OUT_RING( (box[i].x2-1) | ((box[i].y2-1)<<16) ); + ADVANCE_LP_RING(); + } + + BEGIN_LP_RING(4); + OUT_RING( CMD_OP_BATCH_BUFFER ); + OUT_RING( start | BB1_PROTECTED ); + OUT_RING( start + used - 4 ); + OUT_RING( 0 ); + ADVANCE_LP_RING(); + + } while (++i < nbox); } - if (d.send_count) { -#if 0 - if (d.flags & _DRM_DMA_PRIORITY) - retcode = i810_dma_priority(dev, &d); - else - retcode = i810_dma_send_buffers(dev, &d); -#endif - printk("i810_dma priority\n"); - - retcode = i810_dma_priority(dev, &d); + BEGIN_LP_RING(10); + OUT_RING( CMD_STORE_DWORD_IDX ); + OUT_RING( 20 ); + OUT_RING( dev_priv->counter ); + OUT_RING( 0 ); + + if (discard) { + OUT_RING( CMD_STORE_DWORD_IDX ); + OUT_RING( buf_priv->my_use_idx ); + OUT_RING( I810_BUF_FREE ); + OUT_RING( 0 ); } - d.granted_count = 0; + OUT_RING( CMD_REPORT_HEAD ); + OUT_RING( 0 ); + ADVANCE_LP_RING(); +} - if (!retcode && d.request_count) { - retcode = drm_dma_get_buffers(dev, &d); - } - DRM_DEBUG("%d returning, granted = %d\n", - current->pid, d.granted_count); - copy_to_user_ret((drm_dma_t *)arg, &d, sizeof(d), -EFAULT); +/* Interrupts are only for flushing */ +static void i810_dma_service(int irq, void *device, struct pt_regs *regs) +{ + drm_device_t *dev = (drm_device_t *)device; + u16 temp; + + atomic_inc(&dev->total_irq); + temp = I810_READ16(I810REG_INT_IDENTITY_R); + temp = temp & ~(0x6000); + if(temp != 0) I810_WRITE16(I810REG_INT_IDENTITY_R, + temp); /* Clear all interrupts */ + else + return; + + queue_task(&dev->tq, &tq_immediate); + mark_bh(IMMEDIATE_BH); +} + +static void i810_dma_task_queue(void *device) +{ + drm_device_t *dev = (drm_device_t *) device; + drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; - printk("i810_dma end (granted)\n"); - return retcode; + atomic_set(&dev_priv->flush_done, 1); + wake_up_interruptible(&dev_priv->flush_queue); } int i810_irq_install(drm_device_t *dev, int irq) { int retcode; - + u16 temp; + if (!irq) return -EINVAL; down(&dev->struct_sem); @@ -591,6 +890,7 @@ int i810_irq_install(drm_device_t *dev, int irq) dev->irq = irq; up(&dev->struct_sem); + DRM_DEBUG( "Interrupt Install : %d\n", irq); DRM_DEBUG("%d\n", irq); dev->context_flag = 0; @@ -603,16 +903,25 @@ int i810_irq_install(drm_device_t *dev, int irq) dev->tq.next = NULL; dev->tq.sync = 0; - dev->tq.routine = i810_dma_schedule_tq_wrapper; + dev->tq.routine = i810_dma_task_queue; dev->tq.data = dev; - /* Before installing handler */ - /* TODO */ + temp = I810_READ16(I810REG_HWSTAM); + temp = temp & 0x6000; + I810_WRITE16(I810REG_HWSTAM, temp); + + temp = I810_READ16(I810REG_INT_MASK_R); + temp = temp & 0x6000; + I810_WRITE16(I810REG_INT_MASK_R, temp); /* Unmask interrupts */ + temp = I810_READ16(I810REG_INT_ENABLE_R); + temp = temp & 0x6000; + I810_WRITE16(I810REG_INT_ENABLE_R, temp); /* Disable all interrupts */ + /* Install handler */ if ((retcode = request_irq(dev->irq, i810_dma_service, - 0, + SA_SHIRQ, dev->devname, dev))) { down(&dev->struct_sem); @@ -620,15 +929,21 @@ int i810_irq_install(drm_device_t *dev, int irq) up(&dev->struct_sem); return retcode; } - - /* After installing handler */ - /* TODO */ + temp = I810_READ16(I810REG_INT_ENABLE_R); + temp = temp & 0x6000; + temp = temp | 0x0003; + I810_WRITE16(I810REG_INT_ENABLE_R, + temp); /* Enable bp & user interrupts */ return 0; } int i810_irq_uninstall(drm_device_t *dev) { int irq; + u16 temp; + + +/* return 0; */ down(&dev->struct_sem); irq = dev->irq; @@ -636,16 +951,25 @@ int i810_irq_uninstall(drm_device_t *dev) up(&dev->struct_sem); if (!irq) return -EINVAL; - + + DRM_DEBUG( "Interrupt UnInstall: %d\n", irq); DRM_DEBUG("%d\n", irq); - - /* TODO : Disable interrupts */ + + temp = I810_READ16(I810REG_INT_IDENTITY_R); + temp = temp & ~(0x6000); + if(temp != 0) I810_WRITE16(I810REG_INT_IDENTITY_R, + temp); /* Clear all interrupts */ + + temp = I810_READ16(I810REG_INT_ENABLE_R); + temp = temp & 0x6000; + I810_WRITE16(I810REG_INT_ENABLE_R, + temp); /* Disable all interrupts */ + free_irq(irq, dev); return 0; } - int i810_control(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg) { @@ -654,8 +978,7 @@ int i810_control(struct inode *inode, struct file *filp, unsigned int cmd, drm_control_t ctl; int retcode; - printk(KERN_INFO "i810_control\n"); - i810_dma_init(dev); + DRM_DEBUG( "i810_control\n"); copy_from_user_ret(&ctl, (drm_control_t *)arg, sizeof(ctl), -EFAULT); @@ -674,20 +997,161 @@ int i810_control(struct inode *inode, struct file *filp, unsigned int cmd, return 0; } +static inline void i810_dma_emit_flush(drm_device_t *dev) +{ + drm_i810_private_t *dev_priv = dev->dev_private; + RING_LOCALS; + + i810_kernel_lost_context(dev); + + BEGIN_LP_RING(2); + OUT_RING( CMD_REPORT_HEAD ); + OUT_RING( GFX_OP_USER_INTERRUPT ); + ADVANCE_LP_RING(); + +/* i810_wait_ring( dev, dev_priv->ring.Size - 8 ); */ +/* atomic_set(&dev_priv->flush_done, 1); */ +/* wake_up_interruptible(&dev_priv->flush_queue); */ +} + +static inline void i810_dma_quiescent_emit(drm_device_t *dev) +{ + drm_i810_private_t *dev_priv = dev->dev_private; + RING_LOCALS; + + i810_kernel_lost_context(dev); + + BEGIN_LP_RING(4); + OUT_RING( INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE ); + OUT_RING( CMD_REPORT_HEAD ); + OUT_RING( 0 ); + OUT_RING( GFX_OP_USER_INTERRUPT ); + ADVANCE_LP_RING(); + +/* i810_wait_ring( dev, dev_priv->ring.Size - 8 ); */ +/* atomic_set(&dev_priv->flush_done, 1); */ +/* wake_up_interruptible(&dev_priv->flush_queue); */ +} + +static void i810_dma_quiescent(drm_device_t *dev) +{ + DECLARE_WAITQUEUE(entry, current); + drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; + unsigned long end; + + if(dev_priv == NULL) { + return; + } + atomic_set(&dev_priv->flush_done, 0); + current->state = TASK_INTERRUPTIBLE; + add_wait_queue(&dev_priv->flush_queue, &entry); + end = jiffies + (HZ*3); + + for (;;) { + i810_dma_quiescent_emit(dev); + if (atomic_read(&dev_priv->flush_done) == 1) break; + if((signed)(end - jiffies) <= 0) { + DRM_ERROR("lockup\n"); + break; + } + schedule_timeout(HZ*3); + if (signal_pending(current)) { + break; + } + } + + current->state = TASK_RUNNING; + remove_wait_queue(&dev_priv->flush_queue, &entry); + + return; +} + +static int i810_flush_queue(drm_device_t *dev) +{ + DECLARE_WAITQUEUE(entry, current); + drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; + drm_device_dma_t *dma = dev->dma; + unsigned long end; + int i, ret = 0; + + if(dev_priv == NULL) { + return 0; + } + atomic_set(&dev_priv->flush_done, 0); + current->state = TASK_INTERRUPTIBLE; + add_wait_queue(&dev_priv->flush_queue, &entry); + end = jiffies + (HZ*3); + for (;;) { + i810_dma_emit_flush(dev); + if (atomic_read(&dev_priv->flush_done) == 1) break; + if((signed)(end - jiffies) <= 0) { + DRM_ERROR("lockup\n"); + break; + } + schedule_timeout(HZ*3); + if (signal_pending(current)) { + ret = -EINTR; /* Can't restart */ + break; + } + } + + current->state = TASK_RUNNING; + remove_wait_queue(&dev_priv->flush_queue, &entry); + + + for (i = 0; i < dma->buf_count; i++) { + drm_buf_t *buf = dma->buflist[ i ]; + drm_i810_buf_priv_t *buf_priv = buf->dev_private; + + int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE, + I810_BUF_FREE); + + if (used == I810_BUF_HARDWARE) + DRM_DEBUG("reclaimed from HARDWARE\n"); + if (used == I810_BUF_CLIENT) + DRM_DEBUG("still on client HARDWARE\n"); + } + + return ret; +} + +/* Must be called with the lock held */ +void i810_reclaim_buffers(drm_device_t *dev, pid_t pid) +{ + drm_device_dma_t *dma = dev->dma; + int i; + + if (!dma) return; + if (!dev->dev_private) return; + if (!dma->buflist) return; + + i810_flush_queue(dev); + + for (i = 0; i < dma->buf_count; i++) { + drm_buf_t *buf = dma->buflist[ i ]; + drm_i810_buf_priv_t *buf_priv = buf->dev_private; + + if (buf->pid == pid && buf_priv) { + int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, + I810_BUF_FREE); + + if (used == I810_BUF_CLIENT) + DRM_DEBUG("reclaimed from client\n"); + if(buf_priv->currently_mapped == I810_BUF_MAPPED) + buf_priv->currently_mapped = I810_BUF_UNMAPPED; + } + } +} + int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg) { drm_file_t *priv = filp->private_data; drm_device_t *dev = priv->dev; + DECLARE_WAITQUEUE(entry, current); int ret = 0; drm_lock_t lock; - drm_queue_t *q; -#if DRM_DMA_HISTOGRAM - cycles_t start; - - dev->lck_start = start = get_cycles(); -#endif copy_from_user_ret(&lock, (drm_lock_t *)arg, sizeof(lock), -EFAULT); @@ -696,26 +1160,18 @@ int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd, current->pid, lock.context); return -EINVAL; } + + DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n", + lock.context, current->pid, dev->lock.hw_lock->lock, + lock.flags); - if (lock.context < 0 || lock.context >= dev->queue_count) { + if (lock.context < 0) { return -EINVAL; } - q = dev->queuelist[lock.context]; - - ret = drm_flush_block_and_flush(dev, lock.context, lock.flags); + /* Only one queue: + */ if (!ret) { - if (_DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock) - != lock.context) { - long j = jiffies - dev->lock.lock_time; - - if (j > 0 && j <= DRM_LOCK_SLICE) { - /* Can't take lock if we just had it and - there is contention. */ - current->state = TASK_INTERRUPTIBLE; - schedule_timeout(j); - } - } add_wait_queue(&dev->lock.lock_queue, &entry); for (;;) { if (!dev->lock.hw_lock) { @@ -728,13 +1184,13 @@ int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd, dev->lock.pid = current->pid; dev->lock.lock_time = jiffies; atomic_inc(&dev->total_locks); - atomic_inc(&q->total_locks); break; /* Got lock */ } /* Contention */ atomic_inc(&dev->total_sleeps); current->state = TASK_INTERRUPTIBLE; + DRM_DEBUG("Calling lock schedule\n"); schedule(); if (signal_pending(current)) { ret = -ERESTARTSYS; @@ -744,19 +1200,153 @@ int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd, current->state = TASK_RUNNING; remove_wait_queue(&dev->lock.lock_queue, &entry); } - - drm_flush_unblock(dev, lock.context, lock.flags); /* cleanup phase */ if (!ret) { - if (lock.flags & _DRM_LOCK_READY) - i810_dma_ready(dev); - if (lock.flags & _DRM_LOCK_QUIESCENT) - i810_dma_quiescent(dev); + if (lock.flags & _DRM_LOCK_QUIESCENT) { + DRM_DEBUG("_DRM_LOCK_QUIESCENT\n"); + DRM_DEBUG("fred\n"); + i810_dma_quiescent(dev); + } } + DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock"); + return ret; +} + +int i810_flush_ioctl(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + + DRM_DEBUG("i810_flush_ioctl\n"); + if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { + DRM_ERROR("i810_flush_ioctl called without lock held\n"); + return -EINVAL; + } + + i810_flush_queue(dev); + return 0; +} + + +int i810_dma_vertex(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_device_dma_t *dma = dev->dma; + drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; + u32 *hw_status = (u32 *)dev_priv->hw_status_page; + drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) + dev_priv->sarea_priv; + drm_i810_vertex_t vertex; + + copy_from_user_ret(&vertex, (drm_i810_vertex_t *)arg, sizeof(vertex), + -EFAULT); + + if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { + DRM_ERROR("i810_dma_vertex called without lock held\n"); + return -EINVAL; + } + + DRM_DEBUG("i810 dma vertex, idx %d used %d discard %d\n", + vertex.idx, vertex.used, vertex.discard); + + i810_dma_dispatch_vertex( dev, + dma->buflist[ vertex.idx ], + vertex.discard, vertex.used ); -#if DRM_DMA_HISTOGRAM - atomic_inc(&dev->histo.lacq[drm_histogram_slot(get_cycles() - start)]); -#endif + atomic_add(vertex.used, &dma->total_bytes); + atomic_inc(&dma->total_dmas); + sarea_priv->last_enqueue = dev_priv->counter-1; + sarea_priv->last_dispatch = (int) hw_status[5]; + + return 0; +} + + + +int i810_clear_bufs(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_i810_clear_t clear; + + copy_from_user_ret(&clear, (drm_i810_clear_t *)arg, sizeof(clear), + -EFAULT); + + if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { + DRM_ERROR("i810_clear_bufs called without lock held\n"); + return -EINVAL; + } + + i810_dma_dispatch_clear( dev, clear.flags, + clear.clear_color, + clear.clear_depth ); + return 0; +} + +int i810_swap_bufs(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + + DRM_DEBUG("i810_swap_bufs\n"); + + if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { + DRM_ERROR("i810_swap_buf called without lock held\n"); + return -EINVAL; + } + + i810_dma_dispatch_swap( dev ); + return 0; +} + +int i810_getage(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; + u32 *hw_status = (u32 *)dev_priv->hw_status_page; + drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) + dev_priv->sarea_priv; + + sarea_priv->last_dispatch = (int) hw_status[5]; + return 0; +} + +int i810_getbuf(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + int retcode = 0; + drm_i810_dma_t d; + drm_i810_private_t *dev_priv = (drm_i810_private_t *)dev->dev_private; + u32 *hw_status = (u32 *)dev_priv->hw_status_page; + drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *) + dev_priv->sarea_priv; + + DRM_DEBUG("getbuf\n"); + copy_from_user_ret(&d, (drm_i810_dma_t *)arg, sizeof(d), -EFAULT); + + if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { + DRM_ERROR("i810_dma called without lock held\n"); + return -EINVAL; + } - return ret; + d.granted = 0; + + retcode = i810_dma_get_buffer(dev, &d, filp); + + DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n", + current->pid, retcode, d.granted); + + copy_to_user_ret((drm_dma_t *)arg, &d, sizeof(d), -EFAULT); + sarea_priv->last_dispatch = (int) hw_status[5]; + + return retcode; } diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drm.h new file mode 100644 index 000000000..4c8e09f6a --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drm.h @@ -0,0 +1,188 @@ +#ifndef _I810_DRM_H_ +#define _I810_DRM_H_ + +/* WARNING: These defines must be the same as what the Xserver uses. + * if you change them, you must change the defines in the Xserver. + */ + +#ifndef _I810_DEFINES_ +#define _I810_DEFINES_ + +#define I810_DMA_BUF_ORDER 12 +#define I810_DMA_BUF_SZ (1<<I810_DMA_BUF_ORDER) +#define I810_DMA_BUF_NR 256 +#define I810_NR_SAREA_CLIPRECTS 8 + +/* Each region is a minimum of 64k, and there are at most 64 of them. + */ +#define I810_NR_TEX_REGIONS 64 +#define I810_LOG_MIN_TEX_REGION_SIZE 16 +#endif + +#define I810_UPLOAD_TEX0IMAGE 0x1 /* handled clientside */ +#define I810_UPLOAD_TEX1IMAGE 0x2 /* handled clientside */ +#define I810_UPLOAD_CTX 0x4 +#define I810_UPLOAD_BUFFERS 0x8 +#define I810_UPLOAD_TEX0 0x10 +#define I810_UPLOAD_TEX1 0x20 +#define I810_UPLOAD_CLIPRECTS 0x40 + + +/* Indices into buf.Setup where various bits of state are mirrored per + * context and per buffer. These can be fired at the card as a unit, + * or in a piecewise fashion as required. + */ + +/* Destbuffer state + * - backbuffer linear offset and pitch -- invarient in the current dri + * - zbuffer linear offset and pitch -- also invarient + * - drawing origin in back and depth buffers. + * + * Keep the depth/back buffer state here to acommodate private buffers + * in the future. + */ +#define I810_DESTREG_DI0 0 /* CMD_OP_DESTBUFFER_INFO (2 dwords) */ +#define I810_DESTREG_DI1 1 +#define I810_DESTREG_DV0 2 /* GFX_OP_DESTBUFFER_VARS (2 dwords) */ +#define I810_DESTREG_DV1 3 +#define I810_DESTREG_DR0 4 /* GFX_OP_DRAWRECT_INFO (4 dwords) */ +#define I810_DESTREG_DR1 5 +#define I810_DESTREG_DR2 6 +#define I810_DESTREG_DR3 7 +#define I810_DESTREG_DR4 8 +#define I810_DEST_SETUP_SIZE 10 + +/* Context state + */ +#define I810_CTXREG_CF0 0 /* GFX_OP_COLOR_FACTOR */ +#define I810_CTXREG_CF1 1 +#define I810_CTXREG_ST0 2 /* GFX_OP_STIPPLE */ +#define I810_CTXREG_ST1 3 +#define I810_CTXREG_VF 4 /* GFX_OP_VERTEX_FMT */ +#define I810_CTXREG_MT 5 /* GFX_OP_MAP_TEXELS */ +#define I810_CTXREG_MC0 6 /* GFX_OP_MAP_COLOR_STAGES - stage 0 */ +#define I810_CTXREG_MC1 7 /* GFX_OP_MAP_COLOR_STAGES - stage 1 */ +#define I810_CTXREG_MC2 8 /* GFX_OP_MAP_COLOR_STAGES - stage 2 */ +#define I810_CTXREG_MA0 9 /* GFX_OP_MAP_ALPHA_STAGES - stage 0 */ +#define I810_CTXREG_MA1 10 /* GFX_OP_MAP_ALPHA_STAGES - stage 1 */ +#define I810_CTXREG_MA2 11 /* GFX_OP_MAP_ALPHA_STAGES - stage 2 */ +#define I810_CTXREG_SDM 12 /* GFX_OP_SRC_DEST_MONO */ +#define I810_CTXREG_FOG 13 /* GFX_OP_FOG_COLOR */ +#define I810_CTXREG_B1 14 /* GFX_OP_BOOL_1 */ +#define I810_CTXREG_B2 15 /* GFX_OP_BOOL_2 */ +#define I810_CTXREG_LCS 16 /* GFX_OP_LINEWIDTH_CULL_SHADE_MODE */ +#define I810_CTXREG_PV 17 /* GFX_OP_PV_RULE -- Invarient! */ +#define I810_CTXREG_ZA 18 /* GFX_OP_ZBIAS_ALPHAFUNC */ +#define I810_CTXREG_AA 19 /* GFX_OP_ANTIALIAS */ +#define I810_CTX_SETUP_SIZE 20 + +/* Texture state (per tex unit) + */ +#define I810_TEXREG_MI0 0 /* GFX_OP_MAP_INFO (4 dwords) */ +#define I810_TEXREG_MI1 1 +#define I810_TEXREG_MI2 2 +#define I810_TEXREG_MI3 3 +#define I810_TEXREG_MF 4 /* GFX_OP_MAP_FILTER */ +#define I810_TEXREG_MLC 5 /* GFX_OP_MAP_LOD_CTL */ +#define I810_TEXREG_MLL 6 /* GFX_OP_MAP_LOD_LIMITS */ +#define I810_TEXREG_MCS 7 /* GFX_OP_MAP_COORD_SETS ??? */ +#define I810_TEX_SETUP_SIZE 8 + +#define I810_FRONT 0x1 +#define I810_BACK 0x2 +#define I810_DEPTH 0x4 + + +typedef struct _drm_i810_init { + enum { + I810_INIT_DMA = 0x01, + I810_CLEANUP_DMA = 0x02 + } func; + int ring_map_idx; + int buffer_map_idx; + int sarea_priv_offset; + unsigned int ring_start; + unsigned int ring_end; + unsigned int ring_size; + unsigned int front_offset; + unsigned int back_offset; + unsigned int depth_offset; + unsigned int w; + unsigned int h; + unsigned int pitch; + unsigned int pitch_bits; +} drm_i810_init_t; + +/* Warning: If you change the SAREA structure you must change the Xserver + * structure as well */ + +typedef struct _drm_i810_tex_region { + unsigned char next, prev; /* indices to form a circular LRU */ + unsigned char in_use; /* owned by a client, or free? */ + int age; /* tracked by clients to update local LRU's */ +} drm_i810_tex_region_t; + +typedef struct _drm_i810_sarea { + unsigned int ContextState[I810_CTX_SETUP_SIZE]; + unsigned int BufferState[I810_DEST_SETUP_SIZE]; + unsigned int TexState[2][I810_TEX_SETUP_SIZE]; + unsigned int dirty; + + unsigned int nbox; + drm_clip_rect_t boxes[I810_NR_SAREA_CLIPRECTS]; + + /* Maintain an LRU of contiguous regions of texture space. If + * you think you own a region of texture memory, and it has an + * age different to the one you set, then you are mistaken and + * it has been stolen by another client. If global texAge + * hasn't changed, there is no need to walk the list. + * + * These regions can be used as a proxy for the fine-grained + * texture information of other clients - by maintaining them + * in the same lru which is used to age their own textures, + * clients have an approximate lru for the whole of global + * texture space, and can make informed decisions as to which + * areas to kick out. There is no need to choose whether to + * kick out your own texture or someone else's - simply eject + * them all in LRU order. + */ + + drm_i810_tex_region_t texList[I810_NR_TEX_REGIONS+1]; + /* Last elt is sentinal */ + int texAge; /* last time texture was uploaded */ + int last_enqueue; /* last time a buffer was enqueued */ + int last_dispatch; /* age of the most recently dispatched buffer */ + int last_quiescent; /* */ + int ctxOwner; /* last context to upload state */ + + int vertex_prim; + +} drm_i810_sarea_t; + +typedef struct _drm_i810_clear { + int clear_color; + int clear_depth; + int flags; +} drm_i810_clear_t; + + + +/* These may be placeholders if we have more cliprects than + * I810_NR_SAREA_CLIPRECTS. In that case, the client sets discard to + * false, indicating that the buffer will be dispatched again with a + * new set of cliprects. + */ +typedef struct _drm_i810_vertex { + int idx; /* buffer index */ + int used; /* nr bytes in use */ + int discard; /* client is finished with the buffer? */ +} drm_i810_vertex_t; + +typedef struct drm_i810_dma { + void *virtual; + int request_idx; + int request_size; + int granted; +} drm_i810_dma_t; + +#endif /* _I810_DRM_H_ */ diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.c index f33153a36..75b402daa 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.c +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.c @@ -33,11 +33,13 @@ #define EXPORT_SYMTAB #include "drmP.h" #include "i810_drv.h" + + EXPORT_SYMBOL(i810_init); EXPORT_SYMBOL(i810_cleanup); #define I810_NAME "i810" -#define I810_DESC "Matrox g200/g400" +#define I810_DESC "Intel I810" #define I810_DATE "19991213" #define I810_MAJOR 0 #define I810_MINOR 0 @@ -54,6 +56,7 @@ static struct file_operations i810_fops = { mmap: drm_mmap, read: drm_read, fasync: drm_fasync, + poll: drm_poll, }; static struct miscdevice i810_misc = { @@ -77,21 +80,18 @@ static drm_ioctl_desc_t i810_ioctls[] = { [DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { i810_addbufs, 1, 1 }, [DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { i810_markbufs, 1, 1 }, [DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { i810_infobufs, 1, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { i810_mapbufs, 1, 0 }, [DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { i810_freebufs, 1, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { drm_addctx, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { drm_rmctx, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { drm_modctx, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { drm_getctx, 1, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { drm_switchctx, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { drm_newctx, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { drm_resctx, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { i810_addctx, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { i810_rmctx, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { i810_modctx, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { i810_getctx, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { i810_switchctx, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { i810_newctx, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { i810_resctx, 1, 0 }, [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1 }, [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_DMA)] = { i810_dma, 1, 0 }, - [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { i810_lock, 1, 0 }, [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { i810_unlock, 1, 0 }, [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_finish, 1, 0 }, @@ -104,6 +104,14 @@ static drm_ioctl_desc_t i810_ioctls[] = { [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { drm_agp_free, 1, 1 }, [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { drm_agp_bind, 1, 1 }, [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { drm_agp_unbind, 1, 1 }, + + [DRM_IOCTL_NR(DRM_IOCTL_I810_INIT)] = { i810_dma_init, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_I810_VERTEX)] = { i810_dma_vertex, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_I810_CLEAR)] = { i810_clear_bufs, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_I810_FLUSH)] = { i810_flush_ioctl,1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_I810_GETAGE)] = { i810_getage, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_I810_GETBUF)] = { i810_getbuf, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_I810_SWAP)] = { i810_swap_bufs, 1, 0 }, }; #define I810_IOCTL_COUNT DRM_ARRAY_SIZE(i810_ioctls) @@ -121,7 +129,7 @@ MODULE_PARM(i810, "s"); int init_module(void) { - printk("doing i810_init()\n"); + DRM_DEBUG("doing i810_init()\n"); return i810_init(); } @@ -364,7 +372,7 @@ int i810_init(void) #ifdef MODULE drm_parse_options(i810); #endif - printk("doing misc_register\n"); + DRM_DEBUG("doing misc_register\n"); if ((retcode = misc_register(&i810_misc))) { DRM_ERROR("Cannot register \"%s\"\n", I810_NAME); return retcode; @@ -372,13 +380,22 @@ int i810_init(void) dev->device = MKDEV(MISC_MAJOR, i810_misc.minor); dev->name = I810_NAME; - printk("doing mem init\n"); + DRM_DEBUG("doing mem init\n"); drm_mem_init(); - printk("doing proc init\n"); + DRM_DEBUG("doing proc init\n"); drm_proc_init(dev); - printk("doing agp init\n"); + DRM_DEBUG("doing agp init\n"); dev->agp = drm_agp_init(); - printk("doing ctxbitmap init\n"); + if(dev->agp == NULL) { + DRM_INFO("The i810 drm module requires the agpgart module" + " to function correctly\nPlease load the agpgart" + " module before you load the i810 module\n"); + drm_proc_cleanup(); + misc_deregister(&i810_misc); + i810_takedown(dev); + return -ENOMEM; + } + DRM_DEBUG("doing ctxbitmap init\n"); if((retcode = drm_ctxbitmap_init(dev))) { DRM_ERROR("Cannot allocate memory for context bitmap.\n"); drm_proc_cleanup(); @@ -386,10 +403,6 @@ int i810_init(void) i810_takedown(dev); return retcode; } -#if 0 - printk("doing i810_dma_init\n"); - i810_dma_init(dev); -#endif DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", I810_NAME, @@ -417,7 +430,6 @@ void i810_cleanup(void) DRM_INFO("Module unloaded\n"); } drm_ctxbitmap_cleanup(dev); - i810_dma_cleanup(dev); i810_takedown(dev); if (dev->agp) { drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS); @@ -484,24 +496,82 @@ int i810_release(struct inode *inode, struct file *filp) drm_device_t *dev = priv->dev; int retcode = 0; - DRM_DEBUG("open_count = %d\n", dev->open_count); - if (!(retcode = drm_release(inode, filp))) { - MOD_DEC_USE_COUNT; - atomic_inc(&dev->total_close); - spin_lock(&dev->count_lock); - if (!--dev->open_count) { - if (atomic_read(&dev->ioctl_count) || dev->blocked) { - DRM_ERROR("Device busy: %d %d\n", - atomic_read(&dev->ioctl_count), - dev->blocked); - spin_unlock(&dev->count_lock); - return -EBUSY; + DRM_DEBUG("pid = %d, device = 0x%x, open_count = %d\n", + current->pid, dev->device, dev->open_count); + + if (dev->lock.hw_lock && _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) + && dev->lock.pid == current->pid) { + i810_reclaim_buffers(dev, priv->pid); + DRM_ERROR("Process %d dead, freeing lock for context %d\n", + current->pid, + _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock)); + drm_lock_free(dev, + &dev->lock.hw_lock->lock, + _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock)); + + /* FIXME: may require heavy-handed reset of + hardware at this point, possibly + processed via a callback to the X + server. */ + } else if (dev->lock.hw_lock) { + /* The lock is required to reclaim buffers */ + DECLARE_WAITQUEUE(entry, current); + add_wait_queue(&dev->lock.lock_queue, &entry); + for (;;) { + if (!dev->lock.hw_lock) { + /* Device has been unregistered */ + retcode = -EINTR; + break; + } + if (drm_lock_take(&dev->lock.hw_lock->lock, + DRM_KERNEL_CONTEXT)) { + dev->lock.pid = priv->pid; + dev->lock.lock_time = jiffies; + atomic_inc(&dev->total_locks); + break; /* Got lock */ + } + /* Contention */ + atomic_inc(&dev->total_sleeps); + current->state = TASK_INTERRUPTIBLE; + schedule(); + if (signal_pending(current)) { + retcode = -ERESTARTSYS; + break; } - spin_unlock(&dev->count_lock); - return i810_takedown(dev); } - spin_unlock(&dev->count_lock); + current->state = TASK_RUNNING; + remove_wait_queue(&dev->lock.lock_queue, &entry); + if(!retcode) { + i810_reclaim_buffers(dev, priv->pid); + drm_lock_free(dev, &dev->lock.hw_lock->lock, + DRM_KERNEL_CONTEXT); + } + } + drm_fasync(-1, filp, 0); + + down(&dev->struct_sem); + if (priv->prev) priv->prev->next = priv->next; + else dev->file_first = priv->next; + if (priv->next) priv->next->prev = priv->prev; + else dev->file_last = priv->prev; + up(&dev->struct_sem); + + drm_free(priv, sizeof(*priv), DRM_MEM_FILES); + MOD_DEC_USE_COUNT; + atomic_inc(&dev->total_close); + spin_lock(&dev->count_lock); + if (!--dev->open_count) { + if (atomic_read(&dev->ioctl_count) || dev->blocked) { + DRM_ERROR("Device busy: %d %d\n", + atomic_read(&dev->ioctl_count), + dev->blocked); + spin_unlock(&dev->count_lock); + return -EBUSY; + } + spin_unlock(&dev->count_lock); + return i810_takedown(dev); } + spin_unlock(&dev->count_lock); return retcode; } @@ -566,8 +636,7 @@ int i810_unlock(struct inode *inode, struct file *filp, unsigned int cmd, atomic_inc(&dev->total_unlocks); if (_DRM_LOCK_IS_CONT(dev->lock.hw_lock->lock)) atomic_inc(&dev->total_contends); - drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT); - i810_dma_schedule(dev, 1); + drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT); if (!dev->context_flag) { if (drm_lock_free(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT)) { diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.h index 0f5f42bb6..334cacb2a 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.h +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.h @@ -32,6 +32,50 @@ #ifndef _I810_DRV_H_ #define _I810_DRV_H_ +typedef struct drm_i810_buf_priv { + u32 *in_use; + int my_use_idx; + int currently_mapped; + void *virtual; + void *kernel_virtual; + int map_count; + struct vm_area_struct *vma; +} drm_i810_buf_priv_t; + +typedef struct _drm_i810_ring_buffer{ + int tail_mask; + unsigned long Start; + unsigned long End; + unsigned long Size; + u8 *virtual_start; + int head; + int tail; + int space; +} drm_i810_ring_buffer_t; + +typedef struct drm_i810_private { + int ring_map_idx; + int buffer_map_idx; + + drm_i810_ring_buffer_t ring; + drm_i810_sarea_t *sarea_priv; + + unsigned long hw_status_page; + unsigned long counter; + + atomic_t flush_done; + wait_queue_head_t flush_queue; /* Processes waiting until flush */ + drm_buf_t *mmap_buffer; + + + u32 front_di1, back_di1, zi1; + + int back_offset; + int depth_offset; + int w, h; + int pitch; +} drm_i810_private_t; + /* i810_drv.c */ extern int i810_init(void); extern void i810_cleanup(void); @@ -46,16 +90,22 @@ extern int i810_unlock(struct inode *inode, struct file *filp, /* i810_dma.c */ extern int i810_dma_schedule(drm_device_t *dev, int locked); -extern int i810_dma(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); +extern int i810_getbuf(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); extern int i810_irq_install(drm_device_t *dev, int irq); extern int i810_irq_uninstall(drm_device_t *dev); extern int i810_control(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); extern int i810_lock(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); -extern void i810_dma_init(drm_device_t *dev); -extern void i810_dma_cleanup(drm_device_t *dev); +extern int i810_dma_init(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int i810_flush_ioctl(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern void i810_reclaim_buffers(drm_device_t *dev, pid_t pid); +extern int i810_getage(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg); +extern int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma); /* i810_bufs.c */ @@ -67,10 +117,108 @@ extern int i810_markbufs(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); extern int i810_freebufs(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); -extern int i810_mapbufs(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg); extern int i810_addmap(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); + /* i810_context.c */ +extern int i810_resctx(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int i810_addctx(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int i810_modctx(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int i810_getctx(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int i810_switchctx(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int i810_newctx(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int i810_rmctx(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); + +extern int i810_context_switch(drm_device_t *dev, int old, int new); +extern int i810_context_switch_complete(drm_device_t *dev, int new); + +#define I810_VERBOSE 0 + + +int i810_dma_vertex(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); + +int i810_swap_bufs(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); + +int i810_clear_bufs(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); + +#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23)) +#define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23)) +#define CMD_REPORT_HEAD (7<<23) +#define CMD_STORE_DWORD_IDX ((0x21<<23) | 0x1) +#define CMD_OP_BATCH_BUFFER ((0x0<<29)|(0x30<<23)|0x1) + +#define INST_PARSER_CLIENT 0x00000000 +#define INST_OP_FLUSH 0x02000000 +#define INST_FLUSH_MAP_CACHE 0x00000001 + + +#define BB1_START_ADDR_MASK (~0x7) +#define BB1_PROTECTED (1<<0) +#define BB1_UNPROTECTED (0<<0) +#define BB2_END_ADDR_MASK (~0x7) + +#define I810REG_HWSTAM 0x02098 +#define I810REG_INT_IDENTITY_R 0x020a4 +#define I810REG_INT_MASK_R 0x020a8 +#define I810REG_INT_ENABLE_R 0x020a0 + +#define LP_RING 0x2030 +#define HP_RING 0x2040 +#define RING_TAIL 0x00 +#define TAIL_ADDR 0x000FFFF8 +#define RING_HEAD 0x04 +#define HEAD_WRAP_COUNT 0xFFE00000 +#define HEAD_WRAP_ONE 0x00200000 +#define HEAD_ADDR 0x001FFFFC +#define RING_START 0x08 +#define START_ADDR 0x00FFFFF8 +#define RING_LEN 0x0C +#define RING_NR_PAGES 0x000FF000 +#define RING_REPORT_MASK 0x00000006 +#define RING_REPORT_64K 0x00000002 +#define RING_REPORT_128K 0x00000004 +#define RING_NO_REPORT 0x00000000 +#define RING_VALID_MASK 0x00000001 +#define RING_VALID 0x00000001 +#define RING_INVALID 0x00000000 + +#define GFX_OP_SCISSOR ((0x3<<29)|(0x1c<<24)|(0x10<<19)) +#define SC_UPDATE_SCISSOR (0x1<<1) +#define SC_ENABLE_MASK (0x1<<0) +#define SC_ENABLE (0x1<<0) + +#define GFX_OP_SCISSOR_INFO ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1)) +#define SCI_YMIN_MASK (0xffff<<16) +#define SCI_XMIN_MASK (0xffff<<0) +#define SCI_YMAX_MASK (0xffff<<16) +#define SCI_XMAX_MASK (0xffff<<0) + +#define GFX_OP_COLOR_FACTOR ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0) +#define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16)) +#define GFX_OP_MAP_INFO ((0x3<<29)|(0x1d<<24)|0x2) +#define GFX_OP_DESTBUFFER_VARS ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0) +#define GFX_OP_DRAWRECT_INFO ((0x3<<29)|(0x1d<<24)|(0x80<<16)|(0x3)) +#define GFX_OP_PRIMITIVE ((0x3<<29)|(0x1f<<24)) + +#define CMD_OP_Z_BUFFER_INFO ((0x0<<29)|(0x16<<23)) +#define CMD_OP_DESTBUFFER_INFO ((0x0<<29)|(0x15<<23)) + +#define BR00_BITBLT_CLIENT 0x40000000 +#define BR00_OP_COLOR_BLT 0x10000000 +#define BR00_OP_SRC_COPY_BLT 0x10C00000 +#define BR13_SOLID_PATTERN 0x80000000 + + #endif + diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_dma.c index 2e24e5b48..fe6a7b525 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_dma.c +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_dma.c @@ -25,17 +25,15 @@ * * Authors: Rickard E. (Rik) Faith <faith@precisioninsight.com> * Jeff Hartmann <jhartmann@precisioninsight.com> + * Keith Whitwell <keithw@precisioninsight.com> * - * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_dma.c,v 1.1 2000/02/11 17:26:07 dawes Exp $ + * $XFree86$ * */ #define __NO_VERSION__ #include "drmP.h" #include "mga_drv.h" -#include "mgareg_flags.h" -#include "mga_dma.h" -#include "mga_state.h" #include <linux/interrupt.h> /* For task queue support */ @@ -48,643 +46,575 @@ #define MGA_WRITE(reg,val) do { MGA_DEREF(reg) = val; } while (0) #define PDEA_pagpxfer_enable 0x2 -#define MGA_SYNC_TAG 0x423f4200 -typedef enum { - TT_GENERAL, - TT_BLIT, - TT_VECTOR, - TT_VERTEX -} transferType_t; +static int mga_flush_queue(drm_device_t *dev); - -static void mga_delay(void) +static unsigned long mga_alloc_page(drm_device_t *dev) { - return; + unsigned long address; + + DRM_DEBUG("%s\n", __FUNCTION__); + address = __get_free_page(GFP_KERNEL); + if(address == 0UL) { + return 0; + } + atomic_inc(&mem_map[MAP_NR((void *) address)].count); + set_bit(PG_locked, &mem_map[MAP_NR((void *) address)].flags); + + return address; } -int mga_dma_cleanup(drm_device_t *dev) +static void mga_free_page(drm_device_t *dev, unsigned long page) { - if(dev->dev_private) { - drm_mga_private_t *dev_priv = - (drm_mga_private_t *) dev->dev_private; - - if(dev_priv->ioremap) { - int temp = (dev_priv->warp_ucode_size + - dev_priv->primary_size + - PAGE_SIZE - 1) / PAGE_SIZE * PAGE_SIZE; + DRM_DEBUG("%s\n", __FUNCTION__); - drm_ioremapfree((void *) dev_priv->ioremap, temp); - } - - drm_free(dev->dev_private, sizeof(drm_mga_private_t), - DRM_MEM_DRIVER); - dev->dev_private = NULL; + if(page == 0UL) { + return; } - - return 0; + atomic_dec(&mem_map[MAP_NR((void *) page)].count); + clear_bit(PG_locked, &mem_map[MAP_NR((void *) page)].flags); + wake_up(&mem_map[MAP_NR((void *) page)].wait); + free_page(page); + return; } -static int mga_alloc_kernel_queue(drm_device_t *dev) +static void mga_delay(void) { - drm_queue_t *queue = NULL; - /* Allocate a new queue */ - down(&dev->struct_sem); - - if(dev->queue_count != 0) { - /* Reseting the kernel context here is not - * a race, since it can only happen when that - * queue is empty. - */ - queue = dev->queuelist[DRM_KERNEL_CONTEXT]; - printk("Kernel queue already allocated\n"); - } else { - queue = drm_alloc(sizeof(*queue), DRM_MEM_QUEUES); - if(!queue) { - up(&dev->struct_sem); - printk("out of memory\n"); - return -ENOMEM; - } - ++dev->queue_count; - dev->queuelist = drm_alloc(sizeof(*dev->queuelist), - DRM_MEM_QUEUES); - if(!dev->queuelist) { - up(&dev->struct_sem); - drm_free(queue, sizeof(*queue), DRM_MEM_QUEUES); - printk("out of memory\n"); - return -ENOMEM; - } - } - - memset(queue, 0, sizeof(*queue)); - atomic_set(&queue->use_count, 1); - atomic_set(&queue->finalization, 0); - atomic_set(&queue->block_count, 0); - atomic_set(&queue->block_read, 0); - atomic_set(&queue->block_write, 0); - atomic_set(&queue->total_queued, 0); - atomic_set(&queue->total_flushed, 0); - atomic_set(&queue->total_locks, 0); - - init_waitqueue_head(&queue->write_queue); - init_waitqueue_head(&queue->read_queue); - init_waitqueue_head(&queue->flush_queue); - - queue->flags = 0; - - drm_waitlist_create(&queue->waitlist, dev->dma->buf_count); - - dev->queue_slots = 1; - dev->queuelist[DRM_KERNEL_CONTEXT] = queue; - dev->queue_count--; - - up(&dev->struct_sem); - printk("%d (new)\n", dev->queue_count - 1); - return DRM_KERNEL_CONTEXT; + return; } -static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) { - drm_mga_private_t *dev_priv; - drm_map_t *prim_map = NULL; - drm_map_t *sarea_map = NULL; - int temp; +void mga_flush_write_combine(void) +{ + int xchangeDummy; + DRM_DEBUG("%s\n", __FUNCTION__); + __asm__ volatile(" push %%eax ; xchg %%eax, %0 ; pop %%eax" : : "m" (xchangeDummy)); + __asm__ volatile(" push %%eax ; push %%ebx ; push %%ecx ; push %%edx ;" + " movl $0,%%eax ; cpuid ; pop %%edx ; pop %%ecx ; pop %%ebx ;" + " pop %%eax" : /* no outputs */ : /* no inputs */ ); +} - dev_priv = drm_alloc(sizeof(drm_mga_private_t), DRM_MEM_DRIVER); - if(dev_priv == NULL) return -ENOMEM; - dev->dev_private = (void *) dev_priv; +/* These are two age tags that will never be sent to + * the hardware */ +#define MGA_BUF_USED 0xffffffff +#define MGA_BUF_FREE 0 - printk("dev_private\n"); +static int mga_freelist_init(drm_device_t *dev) +{ + drm_device_dma_t *dma = dev->dma; + drm_buf_t *buf; + drm_mga_buf_priv_t *buf_priv; + drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; + drm_mga_freelist_t *item; + int i; - memset(dev_priv, 0, sizeof(drm_mga_private_t)); - atomic_set(&dev_priv->pending_bufs, 0); + DRM_DEBUG("%s\n", __FUNCTION__); - if((init->reserved_map_idx >= dev->map_count) || - (init->buffer_map_idx >= dev->map_count)) { - mga_dma_cleanup(dev); - printk("reserved_map or buffer_map are invalid\n"); - return -EINVAL; - } + dev_priv->head = drm_alloc(sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER); + if(dev_priv->head == NULL) return -ENOMEM; + memset(dev_priv->head, 0, sizeof(drm_mga_freelist_t)); + dev_priv->head->age = MGA_BUF_USED; - if(mga_alloc_kernel_queue(dev) != DRM_KERNEL_CONTEXT) { - mga_dma_cleanup(dev); - DRM_ERROR("Kernel context queue not present\n"); + for (i = 0; i < dma->buf_count; i++) { + buf = dma->buflist[ i ]; + buf_priv = buf->dev_private; + item = drm_alloc(sizeof(drm_mga_freelist_t), + DRM_MEM_DRIVER); + if(item == NULL) return -ENOMEM; + memset(item, 0, sizeof(drm_mga_freelist_t)); + item->age = MGA_BUF_FREE; + item->prev = dev_priv->head; + item->next = dev_priv->head->next; + if(dev_priv->head->next != NULL) + dev_priv->head->next->prev = item; + if(item->next == NULL) dev_priv->tail = item; + item->buf = buf; + buf_priv->my_freelist = item; + buf_priv->discard = 0; + buf_priv->dispatched = 0; + dev_priv->head->next = item; } - - dev_priv->reserved_map_idx = init->reserved_map_idx; - dev_priv->buffer_map_idx = init->buffer_map_idx; - sarea_map = dev->maplist[0]; - dev_priv->sarea_priv = (drm_mga_sarea_t *) - ((u8 *)sarea_map->handle + - init->sarea_priv_offset); - printk("sarea_priv\n"); - - /* Scale primary size to the next page */ - dev_priv->primary_size = ((init->primary_size + PAGE_SIZE - 1) / - PAGE_SIZE) * PAGE_SIZE; - dev_priv->warp_ucode_size = init->warp_ucode_size; - dev_priv->chipset = init->chipset; - dev_priv->fbOffset = init->fbOffset; - dev_priv->backOffset = init->backOffset; - dev_priv->depthOffset = init->depthOffset; - dev_priv->textureOffset = init->textureOffset; - dev_priv->textureSize = init->textureSize; - dev_priv->cpp = init->cpp; - dev_priv->sgram = init->sgram; - dev_priv->stride = init->stride; - - dev_priv->frontOrg = init->frontOrg; - dev_priv->backOrg = init->backOrg; - dev_priv->depthOrg = init->depthOrg; - dev_priv->mAccess = init->mAccess; - - printk("memcpy\n"); - memcpy(&dev_priv->WarpIndex, &init->WarpIndex, - sizeof(mgaWarpIndex) * MGA_MAX_WARP_PIPES); - printk("memcpy done\n"); - prim_map = dev->maplist[init->reserved_map_idx]; - dev_priv->prim_phys_head = dev->agp->base + init->reserved_map_agpstart; - temp = init->warp_ucode_size + dev_priv->primary_size; - temp = ((temp + PAGE_SIZE - 1) / - PAGE_SIZE) * PAGE_SIZE; - printk("temp : %x\n", temp); - printk("dev->agp->base: %lx\n", dev->agp->base); - printk("init->reserved_map_agpstart: %x\n", init->reserved_map_agpstart); - - - dev_priv->ioremap = drm_ioremap(dev->agp->base + init->reserved_map_agpstart, - temp); - if(dev_priv->ioremap == NULL) { - printk("Ioremap failed\n"); - mga_dma_cleanup(dev); - return -ENOMEM; - } - - + return 0; +} - dev_priv->prim_head = (u32 *)dev_priv->ioremap; - printk("dev_priv->prim_head : %p\n", dev_priv->prim_head); - dev_priv->current_dma_ptr = dev_priv->prim_head; - dev_priv->prim_num_dwords = 0; - dev_priv->prim_max_dwords = dev_priv->primary_size / 4; - - printk("dma initialization\n"); +static void mga_freelist_cleanup(drm_device_t *dev) +{ + drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; + drm_mga_freelist_t *item; + drm_mga_freelist_t *prev; - /* Private is now filled in, initialize the hardware */ - { - PRIMLOCALS; - PRIMRESET( dev_priv ); - PRIMGETPTR( dev_priv ); - PRIMOUTREG(MGAREG_DMAPAD, 0); - PRIMOUTREG(MGAREG_DMAPAD, 0); - PRIMOUTREG(MGAREG_DWGSYNC, 0); - PRIMOUTREG(MGAREG_SOFTRAP, 0); - PRIMADVANCE( dev_priv ); + DRM_DEBUG("%s\n", __FUNCTION__); - /* Poll for the first buffer to insure that - * the status register will be correct - */ - printk("phys_head : %lx\n", phys_head); + item = dev_priv->head; + while(item) { + prev = item; + item = item->next; + drm_free(prev, sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER); + } - MGA_WRITE(MGAREG_DWGSYNC, MGA_SYNC_TAG); + dev_priv->head = dev_priv->tail = NULL; +} - while(MGA_READ(MGAREG_DWGSYNC) != MGA_SYNC_TAG) { - int i; - for(i = 0 ; i < 4096; i++) mga_delay(); +/* Frees dispatch lock */ +static inline void mga_dma_quiescent(drm_device_t *dev) +{ + drm_device_dma_t *dma = dev->dma; + drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; + drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; + unsigned long end; + int i; + + DRM_DEBUG("%s\n", __FUNCTION__); + end = jiffies + (HZ*3); + while(1) { + if(!test_and_set_bit(MGA_IN_DISPATCH, + &dev_priv->dispatch_status)) { + break; } - - MGA_WRITE(MGAREG_PRIMADDRESS, phys_head | TT_GENERAL); - - MGA_WRITE(MGAREG_PRIMEND, ((phys_head + num_dwords * 4) | - PDEA_pagpxfer_enable)); - - while(MGA_READ(MGAREG_DWGSYNC) == MGA_SYNC_TAG) { - int i; - for(i = 0; i < 4096; i++) mga_delay(); + if((signed)(end - jiffies) <= 0) { + DRM_ERROR("irqs: %d wanted %d\n", + atomic_read(&dev->total_irq), + atomic_read(&dma->total_lost)); + DRM_ERROR("lockup\n"); + goto out_nolock; } + for (i = 0 ; i < 2000 ; i++) mga_delay(); + } + end = jiffies + (HZ*3); + DRM_DEBUG("quiescent status : %x\n", MGA_READ(MGAREG_STATUS)); + while((MGA_READ(MGAREG_STATUS) & 0x00030001) != 0x00020000) { + if((signed)(end - jiffies) <= 0) { + DRM_ERROR("irqs: %d wanted %d\n", + atomic_read(&dev->total_irq), + atomic_read(&dma->total_lost)); + DRM_ERROR("lockup\n"); + goto out_status; + } + for (i = 0 ; i < 2000 ; i++) mga_delay(); + } + sarea_priv->dirty |= MGA_DMA_FLUSH; +out_status: + clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status); +out_nolock: +} + +static void mga_reset_freelist(drm_device_t *dev) +{ + drm_device_dma_t *dma = dev->dma; + drm_buf_t *buf; + drm_mga_buf_priv_t *buf_priv; + int i; + + for (i = 0; i < dma->buf_count; i++) { + buf = dma->buflist[ i ]; + buf_priv = buf->dev_private; + buf_priv->my_freelist->age = MGA_BUF_FREE; } - - printk("dma init was successful\n"); - return 0; } -int mga_dma_init(struct inode *inode, struct file *filp, - unsigned int cmd, unsigned long arg) +/* Least recently used : + * These operations are not atomic b/c they are protected by the + * hardware lock */ + +drm_buf_t *mga_freelist_get(drm_device_t *dev) { - drm_file_t *priv = filp->private_data; - drm_device_t *dev = priv->dev; - drm_mga_init_t init; + DECLARE_WAITQUEUE(entry, current); + drm_mga_private_t *dev_priv = + (drm_mga_private_t *) dev->dev_private; + drm_mga_freelist_t *prev; + drm_mga_freelist_t *next; + static int failed = 0; + + DRM_DEBUG("%s : tail->age : %d last_prim_age : %d\n", __FUNCTION__, + dev_priv->tail->age, dev_priv->last_prim_age); - copy_from_user_ret(&init, (drm_mga_init_t *)arg, sizeof(init), -EFAULT); + if(failed >= 1000 && dev_priv->tail->age >= dev_priv->last_prim_age) { + DRM_DEBUG("I'm waiting on the freelist!!! %d\n", + dev_priv->last_prim_age); + set_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status); + current->state = TASK_INTERRUPTIBLE; + add_wait_queue(&dev_priv->buf_queue, &entry); + for (;;) { + mga_dma_schedule(dev, 0); + if(!test_bit(MGA_IN_GETBUF, + &dev_priv->dispatch_status)) + break; + atomic_inc(&dev->total_sleeps); + schedule(); + if (signal_pending(current)) { + clear_bit(MGA_IN_GETBUF, + &dev_priv->dispatch_status); + goto failed_getbuf; + } + } + current->state = TASK_RUNNING; + remove_wait_queue(&dev_priv->buf_queue, &entry); + } - switch(init.func) { - case MGA_INIT_DMA: - return mga_dma_initialize(dev, &init); - case MGA_CLEANUP_DMA: - return mga_dma_cleanup(dev); + if(dev_priv->tail->age < dev_priv->last_prim_age) { + prev = dev_priv->tail->prev; + next = dev_priv->tail; + prev->next = NULL; + next->prev = next->next = NULL; + dev_priv->tail = prev; + next->age = MGA_BUF_USED; + failed = 0; + return next->buf; } - return -EINVAL; +failed_getbuf: + failed++; + return NULL; } -#define MGA_ILOAD_CMD (DC_opcod_iload | DC_atype_rpl | \ - DC_linear_linear | DC_bltmod_bfcol | \ - (0xC << DC_bop_SHIFT) | DC_sgnzero_enable | \ - DC_shftzero_enable | DC_clipdis_enable) - -static void __mga_iload_small(drm_device_t *dev, - drm_buf_t *buf, - int use_agp) +int mga_freelist_put(drm_device_t *dev, drm_buf_t *buf) { - drm_mga_private_t *dev_priv = dev->dev_private; + drm_mga_private_t *dev_priv = + (drm_mga_private_t *) dev->dev_private; drm_mga_buf_priv_t *buf_priv = buf->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned long address = (unsigned long)buf->bus_address; - int length = buf->used; - int y1 = buf_priv->boxes[0].y1; - int x1 = buf_priv->boxes[0].x1; - int y2 = buf_priv->boxes[0].y2; - int x2 = buf_priv->boxes[0].x2; - int dstorg = buf_priv->ContextState[MGA_CTXREG_DSTORG]; - int maccess = buf_priv->ContextState[MGA_CTXREG_MACCESS]; - PRIMLOCALS; - - PRIMRESET(dev_priv); - PRIMGETPTR(dev_priv); + drm_mga_freelist_t *prev; + drm_mga_freelist_t *head; + drm_mga_freelist_t *next; + + DRM_DEBUG("%s\n", __FUNCTION__); + + if(buf_priv->my_freelist->age == MGA_BUF_USED) { + /* Discarded buffer, put it on the tail */ + next = buf_priv->my_freelist; + next->age = MGA_BUF_FREE; + prev = dev_priv->tail; + prev->next = next; + next->prev = prev; + next->next = NULL; + dev_priv->tail = next; + DRM_DEBUG("Discarded\n"); + } else { + /* Normally aged buffer, put it on the head + 1, + * as the real head is a sentinal element + */ + next = buf_priv->my_freelist; + head = dev_priv->head; + prev = head->next; + head->next = next; + prev->prev = next; + next->prev = head; + next->next = prev; + } - PRIMOUTREG(MGAREG_DSTORG, dstorg | use_agp); - PRIMOUTREG(MGAREG_MACCESS, maccess); - PRIMOUTREG(MGAREG_PITCH, (1 << 15)); - PRIMOUTREG(MGAREG_YDST, y1 * (x2 - x1)); - PRIMOUTREG(MGAREG_LEN, 1); - PRIMOUTREG(MGAREG_FXBNDRY, ((x2 - x1) * (y2 - y1) - 1) << 16); - PRIMOUTREG(MGAREG_AR0, (x2 - x1) * (y2 - y1) - 1); - PRIMOUTREG(MGAREG_AR3, 0); - PRIMOUTREG(MGAREG_DMAPAD, 0); - PRIMOUTREG(MGAREG_DMAPAD, 0); - PRIMOUTREG(MGAREG_DMAPAD, 0); - PRIMOUTREG(MGAREG_DWGCTL+MGAREG_MGA_EXEC, MGA_ILOAD_CMD); - PRIMOUTREG(MGAREG_DMAPAD, 0); - PRIMOUTREG(MGAREG_DMAPAD, 0); - PRIMOUTREG(MGAREG_SECADDRESS, address | TT_BLIT); - PRIMOUTREG(MGAREG_SECEND, (address + length) | use_agp); - PRIMOUTREG(MGAREG_DMAPAD, 0); - PRIMOUTREG(MGAREG_DMAPAD, 0); - PRIMOUTREG(MGAREG_DWGSYNC, 0); - PRIMOUTREG(MGAREG_SOFTRAP, 0); - PRIMADVANCE(dev_priv); -#if 0 - /* For now we need to set this in the ioctl */ - sarea_priv->dirty |= MGASAREA_NEW_CONTEXT; -#endif - MGA_WRITE(MGAREG_DWGSYNC, MGA_SYNC_TAG); - while(MGA_READ(MGAREG_DWGSYNC) != MGA_SYNC_TAG) ; - - MGA_WRITE(MGAREG_PRIMADDRESS, dev_priv->prim_phys_head | TT_GENERAL); - MGA_WRITE(MGAREG_PRIMEND, (phys_head + num_dwords * 4) | use_agp); + return 0; } -static void __mga_iload_xy(drm_device_t *dev, - drm_buf_t *buf, - int use_agp) +static int mga_init_primary_bufs(drm_device_t *dev, drm_mga_init_t *init) { - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_buf_priv_t *buf_priv = buf->dev_private; - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned long address = (unsigned long)buf->bus_address; - int length = buf->used; - int y1 = buf_priv->boxes[0].y1; - int x1 = buf_priv->boxes[0].x1; - int y2 = buf_priv->boxes[0].y2; - int x2 = buf_priv->boxes[0].x2; - int dstorg = buf_priv->ContextState[MGA_CTXREG_DSTORG]; - int maccess = buf_priv->ContextState[MGA_CTXREG_MACCESS]; - int pitch = buf_priv->ServerState[MGA_2DREG_PITCH]; - int width, height; - int texperdword = 0; - PRIMLOCALS; - - width = (x2 - x1); - height = (y2 - y1); - switch((maccess & 0x00000003)) { - case 0: - texperdword = 4; - break; - case 1: - texperdword = 2; - break; - case 2: - texperdword = 1; - break; - default: - DRM_ERROR("Invalid maccess value passed to __mga_iload_xy\n"); - return; + drm_mga_private_t *dev_priv = dev->dev_private; + drm_mga_prim_buf_t *prim_buffer; + int i, temp, size_of_buf; + int offset = init->reserved_map_agpstart; + + DRM_DEBUG("%s\n", __FUNCTION__); + dev_priv->primary_size = ((init->primary_size + PAGE_SIZE - 1) / + PAGE_SIZE) * PAGE_SIZE; + size_of_buf = dev_priv->primary_size / MGA_NUM_PRIM_BUFS; + dev_priv->warp_ucode_size = init->warp_ucode_size; + dev_priv->prim_bufs = drm_alloc(sizeof(drm_mga_prim_buf_t *) * + (MGA_NUM_PRIM_BUFS + 1), + DRM_MEM_DRIVER); + if(dev_priv->prim_bufs == NULL) { + DRM_ERROR("Unable to allocate memory for prim_buf\n"); + return -ENOMEM; } + memset(dev_priv->prim_bufs, + 0, sizeof(drm_mga_prim_buf_t *) * (MGA_NUM_PRIM_BUFS + 1)); - x2 = x1 + width; - x2 = (x2 + (texperdword - 1)) & ~(texperdword - 1); - x1 = (x1 + (texperdword - 1)) & ~(texperdword - 1); - width = x2 - x1; - - PRIMRESET(dev_priv); - PRIMGETPTR(dev_priv); - PRIMOUTREG(MGAREG_DSTORG, dstorg | use_agp); - PRIMOUTREG(MGAREG_MACCESS, maccess); - PRIMOUTREG(MGAREG_PITCH, pitch); - PRIMOUTREG(MGAREG_YDSTLEN, (y1 << 16) | height); - - PRIMOUTREG(MGAREG_FXBNDRY, ((x1+width-1) << 16) | x1); - PRIMOUTREG(MGAREG_AR0, width * height - 1); - PRIMOUTREG(MGAREG_AR3, 0 ); - PRIMOUTREG(MGAREG_DWGCTL+MGAREG_MGA_EXEC, MGA_ILOAD_CMD); - - PRIMOUTREG(MGAREG_DMAPAD, 0); - PRIMOUTREG(MGAREG_DMAPAD, 0); - PRIMOUTREG(MGAREG_SECADDRESS, address | TT_BLIT); - PRIMOUTREG(MGAREG_SECEND, (address + length) | use_agp); + temp = init->warp_ucode_size + dev_priv->primary_size; + temp = ((temp + PAGE_SIZE - 1) / PAGE_SIZE) * PAGE_SIZE; - PRIMOUTREG(MGAREG_DMAPAD, 0); - PRIMOUTREG(MGAREG_DMAPAD, 0); - PRIMOUTREG(MGAREG_DWGSYNC, 0); - PRIMOUTREG(MGAREG_SOFTRAP, 0); - PRIMADVANCE(dev_priv); -#if 0 - /* For now we need to set this in the ioctl */ - sarea_priv->dirty |= MGASAREA_NEW_CONTEXT; -#endif - MGA_WRITE(MGAREG_DWGSYNC, MGA_SYNC_TAG); - while(MGA_READ(MGAREG_DWGSYNC) != MGA_SYNC_TAG) ; - - MGA_WRITE(MGAREG_PRIMADDRESS, dev_priv->prim_phys_head | TT_GENERAL); - MGA_WRITE(MGAREG_PRIMEND, (phys_head + num_dwords * 4) | use_agp); + dev_priv->ioremap = drm_ioremap(dev->agp->base + offset, + temp); + if(dev_priv->ioremap == NULL) { + DRM_DEBUG("Ioremap failed\n"); + return -ENOMEM; + } + init_waitqueue_head(&dev_priv->wait_queue); + + for(i = 0; i < MGA_NUM_PRIM_BUFS; i++) { + prim_buffer = drm_alloc(sizeof(drm_mga_prim_buf_t), + DRM_MEM_DRIVER); + if(prim_buffer == NULL) return -ENOMEM; + memset(prim_buffer, 0, sizeof(drm_mga_prim_buf_t)); + prim_buffer->phys_head = offset + dev->agp->base; + prim_buffer->current_dma_ptr = + prim_buffer->head = + (u32 *) (dev_priv->ioremap + + offset - + init->reserved_map_agpstart); + prim_buffer->num_dwords = 0; + prim_buffer->max_dwords = size_of_buf / sizeof(u32); + prim_buffer->max_dwords -= 5; /* Leave room for the softrap */ + prim_buffer->sec_used = 0; + prim_buffer->idx = i; + prim_buffer->prim_age = i + 1; + offset = offset + size_of_buf; + dev_priv->prim_bufs[i] = prim_buffer; + } + dev_priv->current_prim_idx = 0; + dev_priv->next_prim = + dev_priv->last_prim = + dev_priv->current_prim = + dev_priv->prim_bufs[0]; + dev_priv->next_prim_age = 2; + dev_priv->last_prim_age = 1; + set_bit(MGA_BUF_IN_USE, &dev_priv->current_prim->buffer_status); + return 0; } -static void mga_dma_dispatch_iload(drm_device_t *dev, drm_buf_t *buf) +void mga_fire_primary(drm_device_t *dev, drm_mga_prim_buf_t *prim) { - drm_mga_buf_priv_t *buf_priv = buf->dev_private; - - int use_agp = PDEA_pagpxfer_enable; - int x1 = buf_priv->boxes[0].x1; - int x2 = buf_priv->boxes[0].x2; + drm_mga_private_t *dev_priv = dev->dev_private; + drm_device_dma_t *dma = dev->dma; + drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; + int use_agp = PDEA_pagpxfer_enable; + unsigned long end; + int i; + int next_idx; + PRIMLOCALS; + + DRM_DEBUG("%s\n", __FUNCTION__); + dev_priv->last_prim = prim; - if((x2 - x1) < 32) { - printk("using iload small\n"); - __mga_iload_small(dev, buf, use_agp); + /* We never check for overflow, b/c there is always room */ + PRIMPTR(prim); + if(num_dwords <= 0) { + DRM_DEBUG("num_dwords == 0 when dispatched\n"); + goto out_prim_wait; + } + PRIMOUTREG( MGAREG_DMAPAD, 0); + PRIMOUTREG( MGAREG_DMAPAD, 0); + PRIMOUTREG( MGAREG_DMAPAD, 0); + PRIMOUTREG( MGAREG_SOFTRAP, 0); + PRIMFINISH(prim); + + end = jiffies + (HZ*3); + if(sarea_priv->dirty & MGA_DMA_FLUSH) { + DRM_DEBUG("Dma top flush\n"); + while((MGA_READ(MGAREG_STATUS) & 0x00030001) != 0x00020000) { + if((signed)(end - jiffies) <= 0) { + DRM_ERROR("irqs: %d wanted %d\n", + atomic_read(&dev->total_irq), + atomic_read(&dma->total_lost)); + DRM_ERROR("lockup in fire primary " + "(Dma Top Flush)\n"); + goto out_prim_wait; + } + + for (i = 0 ; i < 4096 ; i++) mga_delay(); + } + sarea_priv->dirty &= ~(MGA_DMA_FLUSH); } else { - printk("using iload xy\n"); - __mga_iload_xy(dev, buf, use_agp); - } -} - -static void mga_dma_dispatch_vertex(drm_device_t *dev, drm_buf_t *buf) -{ - drm_mga_private_t *dev_priv = dev->dev_private; - drm_mga_buf_priv_t *buf_priv = buf->dev_private; - unsigned long address = (unsigned long)buf->bus_address; - int length = buf->used; - int use_agp = PDEA_pagpxfer_enable; - int i, count; - PRIMLOCALS; - - PRIMRESET(dev_priv); - - count = buf_priv->nbox; - if (count == 0) - count = 1; - - mgaEmitState( dev_priv, buf_priv ); - - for (i = 0 ; i < count ; i++) { - if (i < buf_priv->nbox) - mgaEmitClipRect( dev_priv, &buf_priv->boxes[i] ); - - PRIMGETPTR(dev_priv); - PRIMOUTREG( MGAREG_DMAPAD, 0); - PRIMOUTREG( MGAREG_DMAPAD, 0); - PRIMOUTREG( MGAREG_SECADDRESS, address | TT_VERTEX); - PRIMOUTREG( MGAREG_SECEND, (address + length) | use_agp); - - PRIMOUTREG( MGAREG_DMAPAD, 0); - PRIMOUTREG( MGAREG_DMAPAD, 0); - PRIMOUTREG( MGAREG_DWGSYNC, 0); - PRIMOUTREG( MGAREG_SOFTRAP, 0); - PRIMADVANCE(dev_priv); + DRM_DEBUG("Status wait\n"); + while((MGA_READ(MGAREG_STATUS) & 0x00020001) != 0x00020000) { + if((signed)(end - jiffies) <= 0) { + DRM_ERROR("irqs: %d wanted %d\n", + atomic_read(&dev->total_irq), + atomic_read(&dma->total_lost)); + DRM_ERROR("lockup in fire primary " + "(Status Wait)\n"); + goto out_prim_wait; + } + + for (i = 0 ; i < 4096 ; i++) mga_delay(); + } } - PRIMGETPTR( dev_priv ); - - MGA_WRITE(MGAREG_DWGSYNC, MGA_SYNC_TAG); - while(MGA_READ(MGAREG_DWGSYNC) != MGA_SYNC_TAG) ; - - MGA_WRITE(MGAREG_PRIMADDRESS, dev_priv->prim_phys_head | TT_GENERAL); - MGA_WRITE(MGAREG_PRIMEND, (phys_head + num_dwords * 4) | use_agp); + mga_flush_write_combine(); + atomic_inc(&dev_priv->pending_bufs); + MGA_WRITE(MGAREG_PRIMADDRESS, phys_head | TT_GENERAL); + MGA_WRITE(MGAREG_PRIMEND, (phys_head + num_dwords * 4) | use_agp); + prim->num_dwords = 0; + sarea_priv->last_enqueue = prim->prim_age; + + next_idx = prim->idx + 1; + if(next_idx >= MGA_NUM_PRIM_BUFS) + next_idx = 0; + + dev_priv->next_prim = dev_priv->prim_bufs[next_idx]; + return; + + out_prim_wait: + prim->num_dwords = 0; + prim->sec_used = 0; + clear_bit(MGA_BUF_IN_USE, &prim->buffer_status); + wake_up_interruptible(&dev_priv->wait_queue); + clear_bit(MGA_BUF_SWAP_PENDING, &prim->buffer_status); + clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status); } - -/* Used internally for the small buffers generated from client state - * information. - */ -static void mga_dma_dispatch_general(drm_device_t *dev, drm_buf_t *buf) +int mga_advance_primary(drm_device_t *dev) { + DECLARE_WAITQUEUE(entry, current); drm_mga_private_t *dev_priv = dev->dev_private; - unsigned long address = (unsigned long)buf->bus_address; - int length = buf->used; - int use_agp = PDEA_pagpxfer_enable; - PRIMLOCALS; - - PRIMRESET(dev_priv); - PRIMGETPTR(dev_priv); - - PRIMOUTREG( MGAREG_DMAPAD, 0); - PRIMOUTREG( MGAREG_DMAPAD, 0); - PRIMOUTREG( MGAREG_SECADDRESS, address | TT_GENERAL); - PRIMOUTREG( MGAREG_SECEND, (address + length) | use_agp); - - PRIMOUTREG( MGAREG_DMAPAD, 0); - PRIMOUTREG( MGAREG_DMAPAD, 0); - PRIMOUTREG( MGAREG_DWGSYNC, 0); - PRIMOUTREG( MGAREG_SOFTRAP, 0); - PRIMADVANCE(dev_priv); + drm_mga_prim_buf_t *prim_buffer; + drm_device_dma_t *dma = dev->dma; + int next_prim_idx; + int ret = 0; + + /* This needs to reset the primary buffer if available, + * we should collect stats on how many times it bites + * it's tail */ + DRM_DEBUG("%s\n", __FUNCTION__); + + next_prim_idx = dev_priv->current_prim_idx + 1; + if(next_prim_idx >= MGA_NUM_PRIM_BUFS) + next_prim_idx = 0; + prim_buffer = dev_priv->prim_bufs[next_prim_idx]; + set_bit(MGA_IN_WAIT, &dev_priv->dispatch_status); + + /* In use is cleared in interrupt handler */ + + if(test_and_set_bit(MGA_BUF_IN_USE, &prim_buffer->buffer_status)) { + add_wait_queue(&dev_priv->wait_queue, &entry); + current->state = TASK_INTERRUPTIBLE; + + for (;;) { + mga_dma_schedule(dev, 0); + if(!test_and_set_bit(MGA_BUF_IN_USE, + &prim_buffer->buffer_status)) + break; + atomic_inc(&dev->total_sleeps); + atomic_inc(&dma->total_missed_sched); + schedule(); + if (signal_pending(current)) { + ret = -ERESTARTSYS; + break; + } + } + current->state = TASK_RUNNING; + remove_wait_queue(&dev_priv->wait_queue, &entry); + if(ret) return ret; + } + clear_bit(MGA_IN_WAIT, &dev_priv->dispatch_status); + + /* This primary buffer is now free to use */ + prim_buffer->current_dma_ptr = prim_buffer->head; + prim_buffer->num_dwords = 0; + prim_buffer->sec_used = 0; + prim_buffer->prim_age = dev_priv->next_prim_age++; + if(prim_buffer->prim_age == 0 || prim_buffer->prim_age == 0xffffffff) { + mga_flush_queue(dev); + mga_dma_quiescent(dev); + mga_reset_freelist(dev); + prim_buffer->prim_age = (dev_priv->next_prim_age += 2); + } - MGA_WRITE(MGAREG_DWGSYNC, MGA_SYNC_TAG); - while(MGA_READ(MGAREG_DWGSYNC) != MGA_SYNC_TAG) ; + /* Reset all buffer status stuff */ + clear_bit(MGA_BUF_NEEDS_OVERFLOW, &prim_buffer->buffer_status); + clear_bit(MGA_BUF_FORCE_FIRE, &prim_buffer->buffer_status); + clear_bit(MGA_BUF_SWAP_PENDING, &prim_buffer->buffer_status); - MGA_WRITE(MGAREG_PRIMADDRESS, dev_priv->prim_phys_head | TT_GENERAL); - MGA_WRITE(MGAREG_PRIMEND, (phys_head + num_dwords * 4) | use_agp); + dev_priv->current_prim = prim_buffer; + dev_priv->current_prim_idx = next_prim_idx; + return 0; } -/* Frees dispatch lock */ -static inline void mga_dma_quiescent(drm_device_t *dev) +/* More dynamic performance decisions */ +static inline int mga_decide_to_fire(drm_device_t *dev) { drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; + drm_device_dma_t *dma = dev->dma; - while(1) { - atomic_inc(&dev_priv->dispatch_lock); - if(atomic_read(&dev_priv->dispatch_lock) == 1) { - break; - } else { - atomic_dec(&dev_priv->dispatch_lock); - } - } - while((MGA_READ(MGAREG_STATUS) & 0x00020001) != 0x00020000) ; -#if 0 - MGA_WRITE(MGAREG_DWGSYNC, MGA_SYNC_TAG); -#endif - while(MGA_READ(MGAREG_DWGSYNC) == MGA_SYNC_TAG) ; - MGA_WRITE(MGAREG_DWGSYNC, MGA_SYNC_TAG); - while(MGA_READ(MGAREG_DWGSYNC) != MGA_SYNC_TAG) ; - atomic_dec(&dev_priv->dispatch_lock); -} + DRM_DEBUG("%s\n", __FUNCTION__); -/* Keeps dispatch lock held */ + if(test_bit(MGA_BUF_FORCE_FIRE, &dev_priv->next_prim->buffer_status)) { + atomic_inc(&dma->total_prio); + return 1; + } -static inline int mga_dma_is_ready(drm_device_t *dev) -{ - drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; - - atomic_inc(&dev_priv->dispatch_lock); - if(atomic_read(&dev_priv->dispatch_lock) == 1) { - /* We got the lock */ - return 1; - } else { - atomic_dec(&dev_priv->dispatch_lock); - return 0; + if (test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status) && + dev_priv->next_prim->num_dwords) { + atomic_inc(&dma->total_prio); + return 1; } -} -static inline int mga_dma_is_ready_no_hold(drm_device_t *dev) -{ - drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; + if (test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status) && + dev_priv->next_prim->num_dwords) { + atomic_inc(&dma->total_prio); + return 1; + } - atomic_inc(&dev_priv->dispatch_lock); - if(atomic_read(&dev_priv->dispatch_lock) == 1) { - /* We got the lock, but free it */ - atomic_dec(&dev_priv->dispatch_lock); - return 1; - } else { - atomic_dec(&dev_priv->dispatch_lock); - return 0; + if(atomic_read(&dev_priv->pending_bufs) <= MGA_NUM_PRIM_BUFS - 1) { + if(test_bit(MGA_BUF_SWAP_PENDING, + &dev_priv->next_prim->buffer_status)) { + atomic_inc(&dma->total_dmas); + return 1; + } } -} -static void mga_dma_service(int irq, void *device, struct pt_regs *regs) -{ - drm_device_t *dev = (drm_device_t *)device; - drm_device_dma_t *dma = dev->dma; - drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; - - atomic_dec(&dev_priv->dispatch_lock); - atomic_inc(&dev->total_irq); - MGA_WRITE(MGAREG_ICLEAR, 0xfa7); - - /* Free previous buffer */ - if (test_and_set_bit(0, &dev->dma_flag)) { - atomic_inc(&dma->total_missed_free); - return; - } - if (dma->this_buffer) { - drm_free_buffer(dev, dma->this_buffer); - dma->this_buffer = NULL; + if(atomic_read(&dev_priv->pending_bufs) <= MGA_NUM_PRIM_BUFS / 2) { + if(dev_priv->next_prim->sec_used >= MGA_DMA_BUF_NR / 8) { + atomic_inc(&dma->total_hit); + return 1; + } } - clear_bit(0, &dev->dma_flag); - /* Dispatch new buffer */ - queue_task(&dev->tq, &tq_immediate); - mark_bh(IMMEDIATE_BH); + if(atomic_read(&dev_priv->pending_bufs) >= MGA_NUM_PRIM_BUFS / 2) { + if(dev_priv->next_prim->sec_used >= MGA_DMA_BUF_NR / 4) { + atomic_inc(&dma->total_missed_free); + return 1; + } + } + atomic_inc(&dma->total_tried); + return 0; } -/* Only called by mga_dma_schedule. */ -static int mga_do_dma(drm_device_t *dev, int locked) +int mga_dma_schedule(drm_device_t *dev, int locked) { - drm_buf_t *buf; - int retcode = 0; - drm_device_dma_t *dma = dev->dma; drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; - drm_mga_buf_priv_t *buf_priv; + drm_device_dma_t *dma = dev->dma; - printk("mga_do_dma\n"); - if (test_and_set_bit(0, &dev->dma_flag)) { + if (test_and_set_bit(0, &dev->dma_flag)) { atomic_inc(&dma->total_missed_dma); return -EBUSY; } - - if (!dma->next_buffer) { - DRM_ERROR("No next_buffer\n"); - clear_bit(0, &dev->dma_flag); - return -EINVAL; - } - - buf = dma->next_buffer; - - printk("context %d, buffer %d\n", buf->context, buf->idx); - - if (buf->list == DRM_LIST_RECLAIM) { - drm_clear_next_buffer(dev); - drm_free_buffer(dev, buf); - clear_bit(0, &dev->dma_flag); - return -EINVAL; - } + + DRM_DEBUG("%s\n", __FUNCTION__); - if (!buf->used) { - DRM_ERROR("0 length buffer\n"); - drm_clear_next_buffer(dev); - drm_free_buffer(dev, buf); - clear_bit(0, &dev->dma_flag); - return 0; - } - - if (mga_dma_is_ready(dev) == 0) { - clear_bit(0, &dev->dma_flag); - return -EBUSY; + if(test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status) || + test_bit(MGA_IN_WAIT, &dev_priv->dispatch_status) || + test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status)) { + locked = 1; } - /* Always hold the hardware lock while dispatching. - */ - if (!locked && !drm_lock_take(&dev->lock.hw_lock->lock, - DRM_KERNEL_CONTEXT)) { - atomic_inc(&dma->total_missed_lock); - clear_bit(0, &dev->dma_flag); - atomic_dec(&dev_priv->dispatch_lock); - return -EBUSY; + if (!locked && + !drm_lock_take(&dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT)) { + atomic_inc(&dma->total_missed_lock); + clear_bit(0, &dev->dma_flag); + DRM_DEBUG("Not locked\n"); + return -EBUSY; } - - dma->next_queue = dev->queuelist[DRM_KERNEL_CONTEXT]; - drm_clear_next_buffer(dev); - buf->pending = 1; - buf->waiting = 0; - buf->list = DRM_LIST_PEND; - - buf_priv = buf->dev_private; - - printk("dispatch!\n"); - switch (buf_priv->dma_type) { - case MGA_DMA_GENERAL: - mga_dma_dispatch_general(dev, buf); - break; - case MGA_DMA_VERTEX: - mga_dma_dispatch_vertex(dev, buf); - break; -/* case MGA_DMA_SETUP: */ -/* mga_dma_dispatch_setup(dev, address, length); */ -/* break; */ - case MGA_DMA_ILOAD: - mga_dma_dispatch_iload(dev, buf); - break; - default: - printk("bad buffer type %x in dispatch\n", buf_priv->dma_type); - break; + DRM_DEBUG("I'm locked\n"); + + if(!test_and_set_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status)) { + /* Fire dma buffer */ + if(mga_decide_to_fire(dev)) { + DRM_DEBUG("idx :%d\n", dev_priv->next_prim->idx); + clear_bit(MGA_BUF_FORCE_FIRE, + &dev_priv->next_prim->buffer_status); + if(dev_priv->current_prim == dev_priv->next_prim) { + /* Schedule overflow for a later time */ + set_bit(MGA_BUF_NEEDS_OVERFLOW, + &dev_priv->next_prim->buffer_status); + } + mga_fire_primary(dev, dev_priv->next_prim); + } else { + clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status); + } + } else { + DRM_DEBUG("I can't get the dispatch lock\n"); } - atomic_dec(&dev_priv->pending_bufs); - - drm_free_buffer(dev, dma->this_buffer); - dma->this_buffer = buf; - - atomic_add(buf->used, &dma->total_bytes); - atomic_inc(&dma->total_dmas); - + if (!locked) { if (drm_lock_free(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT)) { @@ -692,90 +622,242 @@ static int mga_do_dma(drm_device_t *dev, int locked) } } - clear_bit(0, &dev->dma_flag); - - if(!atomic_read(&dev_priv->pending_bufs)) { - wake_up_interruptible(&dev->queuelist[DRM_KERNEL_CONTEXT]->flush_queue); - } - -#if 0 - wake_up_interruptible(&dev->lock.lock_queue); -#endif - - /* We hold the dispatch lock until the interrupt handler - * frees it - */ - return retcode; + if(test_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status) && + dev_priv->next_prim->num_dwords == 0 && + atomic_read(&dev_priv->pending_bufs) == 0) { + /* Everything has been processed by the hardware */ + clear_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status); + wake_up_interruptible(&dev_priv->flush_queue); + } + + if(test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status) && + dev_priv->tail->age < dev_priv->last_prim_age) { + clear_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status); + DRM_DEBUG("Waking up buf queue\n"); + wake_up_interruptible(&dev_priv->buf_queue); + } else if (test_bit(MGA_IN_GETBUF, &dev_priv->dispatch_status)) { + DRM_DEBUG("Not waking buf_queue on %d %d\n", + atomic_read(&dev->total_irq), + dev_priv->last_prim_age); + } + + clear_bit(0, &dev->dma_flag); + return 0; } -static void mga_dma_schedule_timer_wrapper(unsigned long dev) +static void mga_dma_service(int irq, void *device, struct pt_regs *regs) { - mga_dma_schedule((drm_device_t *)dev, 0); + drm_device_t *dev = (drm_device_t *)device; + drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; + drm_mga_prim_buf_t *last_prim_buffer; + + DRM_DEBUG("%s\n", __FUNCTION__); + atomic_inc(&dev->total_irq); + if((MGA_READ(MGAREG_STATUS) & 0x00000001) != 0x00000001) return; + MGA_WRITE(MGAREG_ICLEAR, 0x00000001); + last_prim_buffer = dev_priv->last_prim; + last_prim_buffer->num_dwords = 0; + last_prim_buffer->sec_used = 0; + dev_priv->sarea_priv->last_dispatch = + dev_priv->last_prim_age = last_prim_buffer->prim_age; + clear_bit(MGA_BUF_IN_USE, &last_prim_buffer->buffer_status); + wake_up_interruptible(&dev_priv->wait_queue); + clear_bit(MGA_BUF_SWAP_PENDING, &last_prim_buffer->buffer_status); + clear_bit(MGA_IN_DISPATCH, &dev_priv->dispatch_status); + atomic_dec(&dev_priv->pending_bufs); + queue_task(&dev->tq, &tq_immediate); + mark_bh(IMMEDIATE_BH); } -static void mga_dma_schedule_tq_wrapper(void *dev) +static void mga_dma_task_queue(void *device) { - mga_dma_schedule(dev, 0); + DRM_DEBUG("%s\n", __FUNCTION__); + mga_dma_schedule((drm_device_t *)device, 0); } -int mga_dma_schedule(drm_device_t *dev, int locked) +int mga_dma_cleanup(drm_device_t *dev) { - drm_queue_t *q; - drm_buf_t *buf; - int retcode = 0; - int processed = 0; - int missed; - int expire = 20; - drm_device_dma_t *dma = dev->dma; - - printk("mga_dma_schedule\n"); - - if (test_and_set_bit(0, &dev->interrupt_flag)) { - /* Not reentrant */ - atomic_inc(&dma->total_missed_sched); - return -EBUSY; - } - missed = atomic_read(&dma->total_missed_sched); + DRM_DEBUG("%s\n", __FUNCTION__); -again: - /* There is only one queue: - */ - if (!dma->next_buffer && DRM_WAITCOUNT(dev, DRM_KERNEL_CONTEXT)) { - q = dev->queuelist[DRM_KERNEL_CONTEXT]; - buf = drm_waitlist_get(&q->waitlist); - dma->next_buffer = buf; - dma->next_queue = q; - if (buf && buf->list == DRM_LIST_RECLAIM) { - drm_clear_next_buffer(dev); - drm_free_buffer(dev, buf); + if(dev->dev_private) { + drm_mga_private_t *dev_priv = + (drm_mga_private_t *) dev->dev_private; + + if(dev_priv->ioremap) { + int temp = (dev_priv->warp_ucode_size + + dev_priv->primary_size + + PAGE_SIZE - 1) / PAGE_SIZE * PAGE_SIZE; + + drm_ioremapfree((void *) dev_priv->ioremap, temp); + } + if(dev_priv->status_page != NULL) { + iounmap(dev_priv->status_page); + } + if(dev_priv->real_status_page != 0UL) { + mga_free_page(dev, dev_priv->real_status_page); + } + if(dev_priv->prim_bufs != NULL) { + int i; + for(i = 0; i < MGA_NUM_PRIM_BUFS; i++) { + if(dev_priv->prim_bufs[i] != NULL) { + drm_free(dev_priv->prim_bufs[i], + sizeof(drm_mga_prim_buf_t), + DRM_MEM_DRIVER); + } + } + drm_free(dev_priv->prim_bufs, sizeof(void *) * + (MGA_NUM_PRIM_BUFS + 1), + DRM_MEM_DRIVER); + } + if(dev_priv->head != NULL) { + mga_freelist_cleanup(dev); } + + + drm_free(dev->dev_private, sizeof(drm_mga_private_t), + DRM_MEM_DRIVER); + dev->dev_private = NULL; } - if (dma->next_buffer) { - if (!(retcode = mga_do_dma(dev, locked))) - ++processed; + return 0; +} + +static int mga_dma_initialize(drm_device_t *dev, drm_mga_init_t *init) { + drm_mga_private_t *dev_priv; + drm_map_t *sarea_map = NULL; + int i; + + DRM_DEBUG("%s\n", __FUNCTION__); + + dev_priv = drm_alloc(sizeof(drm_mga_private_t), DRM_MEM_DRIVER); + if(dev_priv == NULL) return -ENOMEM; + dev->dev_private = (void *) dev_priv; + + memset(dev_priv, 0, sizeof(drm_mga_private_t)); + + if((init->reserved_map_idx >= dev->map_count) || + (init->buffer_map_idx >= dev->map_count)) { + mga_dma_cleanup(dev); + DRM_DEBUG("reserved_map or buffer_map are invalid\n"); + return -EINVAL; } + + dev_priv->reserved_map_idx = init->reserved_map_idx; + dev_priv->buffer_map_idx = init->buffer_map_idx; + sarea_map = dev->maplist[0]; + dev_priv->sarea_priv = (drm_mga_sarea_t *) + ((u8 *)sarea_map->handle + + init->sarea_priv_offset); - /* Try again if we succesfully dispatched a buffer, or if someone - * tried to schedule while we were working. - */ - if (--expire) { - if (missed != atomic_read(&dma->total_missed_sched)) { - atomic_inc(&dma->total_lost); - if (mga_dma_is_ready_no_hold(dev)) - goto again; - } + /* Scale primary size to the next page */ + dev_priv->chipset = init->chipset; + dev_priv->frontOffset = init->frontOffset; + dev_priv->backOffset = init->backOffset; + dev_priv->depthOffset = init->depthOffset; + dev_priv->textureOffset = init->textureOffset; + dev_priv->textureSize = init->textureSize; + dev_priv->cpp = init->cpp; + dev_priv->sgram = init->sgram; + dev_priv->stride = init->stride; - if (processed && mga_dma_is_ready_no_hold(dev)) { - atomic_inc(&dma->total_lost); - processed = 0; - goto again; - } + dev_priv->mAccess = init->mAccess; + init_waitqueue_head(&dev_priv->flush_queue); + init_waitqueue_head(&dev_priv->buf_queue); + dev_priv->WarpPipe = -1; + + DRM_DEBUG("chipset: %d ucode_size: %d backOffset: %x depthOffset: %x\n", + dev_priv->chipset, dev_priv->warp_ucode_size, + dev_priv->backOffset, dev_priv->depthOffset); + DRM_DEBUG("cpp: %d sgram: %d stride: %d maccess: %x\n", + dev_priv->cpp, dev_priv->sgram, dev_priv->stride, + dev_priv->mAccess); + + memcpy(&dev_priv->WarpIndex, &init->WarpIndex, + sizeof(drm_mga_warp_index_t) * MGA_MAX_WARP_PIPES); + + for (i = 0 ; i < MGA_MAX_WARP_PIPES ; i++) + DRM_DEBUG("warp pipe %d: installed: %d phys: %lx size: %x\n", + i, + dev_priv->WarpIndex[i].installed, + dev_priv->WarpIndex[i].phys_addr, + dev_priv->WarpIndex[i].size); + + if(mga_init_primary_bufs(dev, init) != 0) { + DRM_ERROR("Can not initialize primary buffers\n"); + mga_dma_cleanup(dev); + return -ENOMEM; } - - clear_bit(0, &dev->interrupt_flag); - - return retcode; + dev_priv->real_status_page = mga_alloc_page(dev); + if(dev_priv->real_status_page == 0UL) { + mga_dma_cleanup(dev); + DRM_ERROR("Can not allocate status page\n"); + return -ENOMEM; + } + + dev_priv->status_page = + ioremap_nocache(virt_to_bus((void *)dev_priv->real_status_page), + PAGE_SIZE); + + if(dev_priv->status_page == NULL) { + mga_dma_cleanup(dev); + DRM_ERROR("Can not remap status page\n"); + return -ENOMEM; + } + + /* Write status page when secend or softrap occurs */ + MGA_WRITE(MGAREG_PRIMPTR, + virt_to_bus((void *)dev_priv->real_status_page) | 0x00000003); + + + /* Private is now filled in, initialize the hardware */ + { + PRIMLOCALS; + PRIMGETPTR( dev_priv ); + + PRIMOUTREG(MGAREG_DMAPAD, 0); + PRIMOUTREG(MGAREG_DMAPAD, 0); + PRIMOUTREG(MGAREG_DWGSYNC, 0x0100); + PRIMOUTREG(MGAREG_SOFTRAP, 0); + /* Poll for the first buffer to insure that + * the status register will be correct + */ + + mga_flush_write_combine(); + MGA_WRITE(MGAREG_PRIMADDRESS, phys_head | TT_GENERAL); + + MGA_WRITE(MGAREG_PRIMEND, ((phys_head + num_dwords * 4) | + PDEA_pagpxfer_enable)); + + while(MGA_READ(MGAREG_DWGSYNC) != 0x0100) ; + } + + if(mga_freelist_init(dev) != 0) { + DRM_ERROR("Could not initialize freelist\n"); + mga_dma_cleanup(dev); + return -ENOMEM; + } + return 0; +} + +int mga_dma_init(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_mga_init_t init; + + DRM_DEBUG("%s\n", __FUNCTION__); + + copy_from_user_ret(&init, (drm_mga_init_t *)arg, sizeof(init), -EFAULT); + + switch(init.func) { + case MGA_INIT_DMA: + return mga_dma_initialize(dev, &init); + case MGA_CLEANUP_DMA: + return mga_dma_cleanup(dev); + } + + return -EINVAL; } int mga_irq_install(drm_device_t *dev, int irq) @@ -792,7 +874,7 @@ int mga_irq_install(drm_device_t *dev, int irq) dev->irq = irq; up(&dev->struct_sem); - printk("install irq handler %d\n", irq); + DRM_DEBUG("install irq handler %d\n", irq); dev->context_flag = 0; dev->interrupt_flag = 0; @@ -802,17 +884,15 @@ int mga_irq_install(drm_device_t *dev, int irq) dev->dma->this_buffer = NULL; dev->tq.next = NULL; dev->tq.sync = 0; - dev->tq.routine = mga_dma_schedule_tq_wrapper; + dev->tq.routine = mga_dma_task_queue; dev->tq.data = dev; /* Before installing handler */ - MGA_WRITE(MGAREG_ICLEAR, 0xfa7); MGA_WRITE(MGAREG_IEN, 0); - /* Install handler */ if ((retcode = request_irq(dev->irq, mga_dma_service, - 0, + SA_SHIRQ, dev->devname, dev))) { down(&dev->struct_sem); @@ -820,11 +900,9 @@ int mga_irq_install(drm_device_t *dev, int irq) up(&dev->struct_sem); return retcode; } - /* After installing handler */ - MGA_WRITE(MGAREG_ICLEAR, 0xfa7); + MGA_WRITE(MGAREG_ICLEAR, 0x00000001); MGA_WRITE(MGAREG_IEN, 0x00000001); - return 0; } @@ -838,19 +916,13 @@ int mga_irq_uninstall(drm_device_t *dev) up(&dev->struct_sem); if (!irq) return -EINVAL; - - printk("remove irq handler %d\n", irq); - - MGA_WRITE(MGAREG_ICLEAR, 0xfa7); + DRM_DEBUG("remove irq handler %d\n", irq); + MGA_WRITE(MGAREG_ICLEAR, 0x00000001); MGA_WRITE(MGAREG_IEN, 0); - MGA_WRITE(MGAREG_ICLEAR, 0xfa7); - free_irq(irq, dev); - return 0; } - int mga_control(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg) { @@ -859,7 +931,9 @@ int mga_control(struct inode *inode, struct file *filp, unsigned int cmd, drm_control_t ctl; copy_from_user_ret(&ctl, (drm_control_t *)arg, sizeof(ctl), -EFAULT); - + + DRM_DEBUG("%s\n", __FUNCTION__); + switch (ctl.func) { case DRM_INST_HANDLER: return mga_irq_install(dev, ctl.irq); @@ -870,36 +944,69 @@ int mga_control(struct inode *inode, struct file *filp, unsigned int cmd, } } -int mga_flush_queue(drm_device_t *dev) +static int mga_flush_queue(drm_device_t *dev) { DECLARE_WAITQUEUE(entry, current); - drm_queue_t *q = dev->queuelist[DRM_KERNEL_CONTEXT]; - drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; + drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; int ret = 0; - - printk("mga_flush_queue\n"); - if(atomic_read(&dev_priv->pending_bufs) != 0) { - current->state = TASK_INTERRUPTIBLE; - add_wait_queue(&q->flush_queue, &entry); - for (;;) { - if (!atomic_read(&dev_priv->pending_bufs)) break; - printk("Calling schedule from flush_queue : %d\n", - atomic_read(&dev_priv->pending_bufs)); - mga_dma_schedule(dev, 1); - schedule(); - if (signal_pending(current)) { - ret = -EINTR; /* Can't restart */ - break; - } - } - printk("Exited out of schedule from flush_queue\n"); - current->state = TASK_RUNNING; - remove_wait_queue(&q->flush_queue, &entry); + + DRM_DEBUG("%s\n", __FUNCTION__); + + if(dev_priv == NULL) { + return 0; } + if(dev_priv->next_prim->num_dwords != 0) { + set_bit(MGA_IN_FLUSH, &dev_priv->dispatch_status); + current->state = TASK_INTERRUPTIBLE; + add_wait_queue(&dev_priv->flush_queue, &entry); + for (;;) { + mga_dma_schedule(dev, 0); + if (!test_bit(MGA_IN_FLUSH, + &dev_priv->dispatch_status)) + break; + atomic_inc(&dev->total_sleeps); + schedule(); + if (signal_pending(current)) { + ret = -EINTR; /* Can't restart */ + clear_bit(MGA_IN_FLUSH, + &dev_priv->dispatch_status); + break; + } + } + current->state = TASK_RUNNING; + remove_wait_queue(&dev_priv->flush_queue, &entry); + } return ret; } +/* Must be called with the lock held */ +void mga_reclaim_buffers(drm_device_t *dev, pid_t pid) +{ + drm_device_dma_t *dma = dev->dma; + int i; + + if (!dma) return; + if(dev->dev_private == NULL) return; + if(dma->buflist == NULL) return; + + DRM_DEBUG("%s\n", __FUNCTION__); + mga_flush_queue(dev); + + for (i = 0; i < dma->buf_count; i++) { + drm_buf_t *buf = dma->buflist[ i ]; + drm_mga_buf_priv_t *buf_priv = buf->dev_private; + + /* Only buffers that need to get reclaimed ever + * get set to free + */ + if (buf->pid == pid && buf_priv) { + if(buf_priv->my_freelist->age == MGA_BUF_USED) + buf_priv->my_freelist->age = MGA_BUF_FREE; + } + } +} + int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg) { @@ -909,6 +1016,7 @@ int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd, int ret = 0; drm_lock_t lock; + DRM_DEBUG("%s\n", __FUNCTION__); copy_from_user_ret(&lock, (drm_lock_t *)arg, sizeof(lock), -EFAULT); if (lock.context == DRM_KERNEL_CONTEXT) { @@ -916,16 +1024,15 @@ int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd, current->pid, lock.context); return -EINVAL; } - - printk("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n", - lock.context, current->pid, dev->lock.hw_lock->lock, - lock.flags); - + + DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n", + lock.context, current->pid, dev->lock.hw_lock->lock, + lock.flags); if (lock.context < 0) { return -EINVAL; } - + /* Only one queue: */ @@ -948,8 +1055,6 @@ int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd, /* Contention */ atomic_inc(&dev->total_sleeps); current->state = TASK_INTERRUPTIBLE; - current->policy |= SCHED_YIELD; - printk("Calling lock schedule\n"); schedule(); if (signal_pending(current)) { ret = -ERESTARTSYS; @@ -962,17 +1067,46 @@ int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd, if (!ret) { if (lock.flags & _DRM_LOCK_QUIESCENT) { - printk("_DRM_LOCK_QUIESCENT\n"); - ret = mga_flush_queue(dev); - if(ret != 0) { - drm_lock_free(dev, &dev->lock.hw_lock->lock, - lock.context); - } else { - mga_dma_quiescent(dev); - } + DRM_DEBUG("_DRM_LOCK_QUIESCENT\n"); + mga_flush_queue(dev); + mga_dma_quiescent(dev); } } - printk("%d %s\n", lock.context, ret ? "interrupted" : "has lock"); + + DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock"); return ret; } +int mga_flush_ioctl(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_lock_t lock; + drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; + + DRM_DEBUG("%s\n", __FUNCTION__); + copy_from_user_ret(&lock, (drm_lock_t *)arg, sizeof(lock), -EFAULT); + + if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { + DRM_ERROR("mga_flush_ioctl called without lock held\n"); + return -EINVAL; + } + + if(lock.flags & _DRM_LOCK_FLUSH || lock.flags & _DRM_LOCK_FLUSH_ALL) { + drm_mga_prim_buf_t *temp_buf = + dev_priv->prim_bufs[dev_priv->current_prim_idx]; + + if(temp_buf && temp_buf->num_dwords) { + set_bit(MGA_BUF_FORCE_FIRE, &temp_buf->buffer_status); + mga_advance_primary(dev); + mga_dma_schedule(dev, 1); + } + } + if(lock.flags & _DRM_LOCK_QUIESCENT) { + mga_flush_queue(dev); + mga_dma_quiescent(dev); + } + + return 0; +} diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drm.h new file mode 100644 index 000000000..7228b9051 --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drm.h @@ -0,0 +1,269 @@ +/* mga_drm.h -- Public header for the Matrox g200/g400 driver -*- linux-c -*- + * Created: Tue Jan 25 01:50:01 1999 by jhartmann@precisioninsight.com + * + * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: Jeff Hartmann <jhartmann@precisioninsight.com> + * Keith Whitwell <keithw@precisioninsight.com> + * + * $XFree86$ + */ + +#ifndef _MGA_DRM_H_ +#define _MGA_DRM_H_ + +/* WARNING: If you change any of these defines, make sure to change the + * defines in the Xserver file (xf86drmMga.h) + */ +#ifndef _MGA_DEFINES_ +#define _MGA_DEFINES_ + +#define MGA_F 0x1 /* fog */ +#define MGA_A 0x2 /* alpha */ +#define MGA_S 0x4 /* specular */ +#define MGA_T2 0x8 /* multitexture */ + +#define MGA_WARP_TGZ 0 +#define MGA_WARP_TGZF (MGA_F) +#define MGA_WARP_TGZA (MGA_A) +#define MGA_WARP_TGZAF (MGA_F|MGA_A) +#define MGA_WARP_TGZS (MGA_S) +#define MGA_WARP_TGZSF (MGA_S|MGA_F) +#define MGA_WARP_TGZSA (MGA_S|MGA_A) +#define MGA_WARP_TGZSAF (MGA_S|MGA_F|MGA_A) +#define MGA_WARP_T2GZ (MGA_T2) +#define MGA_WARP_T2GZF (MGA_T2|MGA_F) +#define MGA_WARP_T2GZA (MGA_T2|MGA_A) +#define MGA_WARP_T2GZAF (MGA_T2|MGA_A|MGA_F) +#define MGA_WARP_T2GZS (MGA_T2|MGA_S) +#define MGA_WARP_T2GZSF (MGA_T2|MGA_S|MGA_F) +#define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A) +#define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A) + +#define MGA_MAX_G400_PIPES 16 +#define MGA_MAX_G200_PIPES 8 /* no multitex */ +#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES + +#define MGA_CARD_TYPE_G200 1 +#define MGA_CARD_TYPE_G400 2 + +#define MGA_FRONT 0x1 +#define MGA_BACK 0x2 +#define MGA_DEPTH 0x4 + +/* 3d state excluding texture units: + */ +#define MGA_CTXREG_DSTORG 0 /* validated */ +#define MGA_CTXREG_MACCESS 1 +#define MGA_CTXREG_PLNWT 2 +#define MGA_CTXREG_DWGCTL 3 +#define MGA_CTXREG_ALPHACTRL 4 +#define MGA_CTXREG_FOGCOLOR 5 +#define MGA_CTXREG_WFLAG 6 +#define MGA_CTXREG_TDUAL0 7 +#define MGA_CTXREG_TDUAL1 8 +#define MGA_CTXREG_FCOL 9 +#define MGA_CTX_SETUP_SIZE 10 + +/* 2d state + */ +#define MGA_2DREG_PITCH 0 +#define MGA_2D_SETUP_SIZE 1 + +/* Each texture unit has a state: + */ +#define MGA_TEXREG_CTL 0 +#define MGA_TEXREG_CTL2 1 +#define MGA_TEXREG_FILTER 2 +#define MGA_TEXREG_BORDERCOL 3 +#define MGA_TEXREG_ORG 4 /* validated */ +#define MGA_TEXREG_ORG1 5 +#define MGA_TEXREG_ORG2 6 +#define MGA_TEXREG_ORG3 7 +#define MGA_TEXREG_ORG4 8 +#define MGA_TEXREG_WIDTH 9 +#define MGA_TEXREG_HEIGHT 10 +#define MGA_TEX_SETUP_SIZE 11 + +/* What needs to be changed for the current vertex dma buffer? + */ +#define MGA_UPLOAD_CTX 0x1 +#define MGA_UPLOAD_TEX0 0x2 +#define MGA_UPLOAD_TEX1 0x4 +#define MGA_UPLOAD_PIPE 0x8 +#define MGA_UPLOAD_TEX0IMAGE 0x10 /* handled client-side */ +#define MGA_UPLOAD_TEX1IMAGE 0x20 /* handled client-side */ +#define MGA_UPLOAD_2D 0x40 +#define MGA_WAIT_AGE 0x80 /* handled client-side */ +#define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */ +#define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock + quiescent */ + +/* 32 buffers of 64k each, total 2 meg. + */ +#define MGA_DMA_BUF_ORDER 16 +#define MGA_DMA_BUF_SZ (1<<MGA_DMA_BUF_ORDER) +#define MGA_DMA_BUF_NR 31 + +/* Keep these small for testing. + */ +#define MGA_NR_SAREA_CLIPRECTS 8 + +/* 2 heaps (1 for card, 1 for agp), each divided into upto 128 + * regions, subject to a minimum region size of (1<<16) == 64k. + * + * Clients may subdivide regions internally, but when sharing between + * clients, the region size is the minimum granularity. + */ + +#define MGA_CARD_HEAP 0 +#define MGA_AGP_HEAP 1 +#define MGA_NR_TEX_HEAPS 2 +#define MGA_NR_TEX_REGIONS 16 +#define MGA_LOG_MIN_TEX_REGION_SIZE 16 +#endif + +typedef struct _drm_mga_warp_index { + int installed; + unsigned long phys_addr; + int size; +} drm_mga_warp_index_t; + +typedef struct drm_mga_init { + enum { + MGA_INIT_DMA = 0x01, + MGA_CLEANUP_DMA = 0x02 + } func; + int reserved_map_agpstart; + int reserved_map_idx; + int buffer_map_idx; + int sarea_priv_offset; + int primary_size; + int warp_ucode_size; + unsigned int frontOffset; + unsigned int backOffset; + unsigned int depthOffset; + unsigned int textureOffset; + unsigned int textureSize; + unsigned int agpTextureOffset; + unsigned int agpTextureSize; + unsigned int cpp; + unsigned int stride; + int sgram; + int chipset; + drm_mga_warp_index_t WarpIndex[MGA_MAX_WARP_PIPES]; + unsigned int mAccess; +} drm_mga_init_t; + +/* Warning: if you change the sarea structure, you must change the Xserver + * structures as well */ + +typedef struct _drm_mga_tex_region { + unsigned char next, prev; + unsigned char in_use; + unsigned int age; +} drm_mga_tex_region_t; + +typedef struct _drm_mga_sarea { + /* The channel for communication of state information to the kernel + * on firing a vertex dma buffer. + */ + unsigned int ContextState[MGA_CTX_SETUP_SIZE]; + unsigned int ServerState[MGA_2D_SETUP_SIZE]; + unsigned int TexState[2][MGA_TEX_SETUP_SIZE]; + unsigned int WarpPipe; + unsigned int dirty; + + unsigned int nbox; + drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS]; + + + /* Information about the most recently used 3d drawable. The + * client fills in the req_* fields, the server fills in the + * exported_ fields and puts the cliprects into boxes, above. + * + * The client clears the exported_drawable field before + * clobbering the boxes data. + */ + unsigned int req_drawable; /* the X drawable id */ + unsigned int req_draw_buffer; /* MGA_FRONT or MGA_BACK */ + + unsigned int exported_drawable; + unsigned int exported_index; + unsigned int exported_stamp; + unsigned int exported_buffers; + unsigned int exported_nfront; + unsigned int exported_nback; + int exported_back_x, exported_front_x, exported_w; + int exported_back_y, exported_front_y, exported_h; + drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS]; + + /* Counters for aging textures and for client-side throttling. + */ + unsigned int last_enqueue; /* last time a buffer was enqueued */ + unsigned int last_dispatch; /* age of the most recently dispatched buffer */ + unsigned int last_quiescent; /* */ + + + /* LRU lists for texture memory in agp space and on the card + */ + drm_mga_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1]; + unsigned int texAge[MGA_NR_TEX_HEAPS]; + + /* Mechanism to validate card state. + */ + int ctxOwner; +} drm_mga_sarea_t; + +/* Device specific ioctls: + */ +typedef struct _drm_mga_clear { + unsigned int clear_color; + unsigned int clear_depth; + unsigned int flags; +} drm_mga_clear_t; + +typedef struct _drm_mga_swap { + int dummy; +} drm_mga_swap_t; + +typedef struct _drm_mga_iload { + int idx; + int length; + unsigned int destOrg; +} drm_mga_iload_t; + +typedef struct _drm_mga_vertex { + int idx; /* buffer to queue */ + int used; /* bytes in use */ + int discard; /* client finished with buffer? */ +} drm_mga_vertex_t; + +typedef struct _drm_mga_indices { + int idx; /* buffer to queue */ + unsigned int start; + unsigned int end; + int discard; /* client finished with buffer? */ +} drm_mga_indices_t; + +#endif diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.c index 8bc25617e..5fabe1f25 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.c +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.c @@ -54,6 +54,7 @@ static struct file_operations mga_fops = { mmap: drm_mmap, read: drm_read, fasync: drm_fasync, + poll: drm_poll, }; static struct miscdevice mga_misc = { @@ -105,9 +106,12 @@ static drm_ioctl_desc_t mga_ioctls[] = { [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { drm_agp_bind, 1, 1 }, [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { drm_agp_unbind, 1, 1 }, [DRM_IOCTL_NR(DRM_IOCTL_MGA_INIT)] = { mga_dma_init, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)] = { mga_clear_bufs, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)] = { mga_swap_bufs, 1, 1 }, - [DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_iload, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)] = { mga_swap_bufs, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)] = { mga_clear_bufs, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)] = { mga_iload, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)] = { mga_vertex, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)] = { mga_flush_ioctl, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_indices, 1, 0 }, }; #define MGA_IOCTL_COUNT DRM_ARRAY_SIZE(mga_ioctls) @@ -380,6 +384,21 @@ int mga_init(void) drm_proc_init(dev); DRM_DEBUG("doing agp init\n"); dev->agp = drm_agp_init(); + if(dev->agp == NULL) { + DRM_DEBUG("The mga drm module requires the agpgart module" + " to function correctly\nPlease load the agpgart" + " module before you load the mga module\n"); + drm_proc_cleanup(); + misc_deregister(&mga_misc); + mga_takedown(dev); + return -ENOMEM; + } +#ifdef CONFIG_MTRR + dev->agp->agp_mtrr = mtrr_add(dev->agp->agp_info.aper_base, + dev->agp->agp_info.aper_size * 1024 * 1024, + MTRR_TYPE_WRCOMB, + 1); +#endif DRM_DEBUG("doing ctxbitmap init\n"); if((retcode = drm_ctxbitmap_init(dev))) { DRM_ERROR("Cannot allocate memory for context bitmap.\n"); @@ -416,6 +435,16 @@ void mga_cleanup(void) } drm_ctxbitmap_cleanup(dev); mga_dma_cleanup(dev); +#ifdef CONFIG_MTRR + if(dev->agp && dev->agp->agp_mtrr) { + int retval; + retval = mtrr_del(dev->agp->agp_mtrr, + dev->agp->agp_info.aper_base, + dev->agp->agp_info.aper_size * 1024*1024); + DRM_DEBUG("mtrr_del = %d\n", retval); + } +#endif + mga_takedown(dev); if (dev->agp) { drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS); @@ -482,27 +511,86 @@ int mga_release(struct inode *inode, struct file *filp) drm_device_t *dev = priv->dev; int retcode = 0; - DRM_DEBUG("open_count = %d\n", dev->open_count); - if (!(retcode = drm_release(inode, filp))) { - MOD_DEC_USE_COUNT; - atomic_inc(&dev->total_close); - spin_lock(&dev->count_lock); - if (!--dev->open_count) { - if (atomic_read(&dev->ioctl_count) || dev->blocked) { - DRM_ERROR("Device busy: %d %d\n", - atomic_read(&dev->ioctl_count), - dev->blocked); - spin_unlock(&dev->count_lock); - return -EBUSY; + DRM_DEBUG("pid = %d, device = 0x%x, open_count = %d\n", + current->pid, dev->device, dev->open_count); + + if (dev->lock.hw_lock && _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) + && dev->lock.pid == current->pid) { + mga_reclaim_buffers(dev, priv->pid); + DRM_ERROR("Process %d dead, freeing lock for context %d\n", + current->pid, + _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock)); + drm_lock_free(dev, + &dev->lock.hw_lock->lock, + _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock)); + + /* FIXME: may require heavy-handed reset of + hardware at this point, possibly + processed via a callback to the X + server. */ + } else if (dev->lock.hw_lock) { + /* The lock is required to reclaim buffers */ + DECLARE_WAITQUEUE(entry, current); + add_wait_queue(&dev->lock.lock_queue, &entry); + for (;;) { + if (!dev->lock.hw_lock) { + /* Device has been unregistered */ + retcode = -EINTR; + break; + } + if (drm_lock_take(&dev->lock.hw_lock->lock, + DRM_KERNEL_CONTEXT)) { + dev->lock.pid = priv->pid; + dev->lock.lock_time = jiffies; + atomic_inc(&dev->total_locks); + break; /* Got lock */ + } + /* Contention */ + atomic_inc(&dev->total_sleeps); + current->state = TASK_INTERRUPTIBLE; + schedule(); + if (signal_pending(current)) { + retcode = -ERESTARTSYS; + break; } - spin_unlock(&dev->count_lock); - return mga_takedown(dev); } - spin_unlock(&dev->count_lock); + current->state = TASK_RUNNING; + remove_wait_queue(&dev->lock.lock_queue, &entry); + if(!retcode) { + mga_reclaim_buffers(dev, priv->pid); + drm_lock_free(dev, &dev->lock.hw_lock->lock, + DRM_KERNEL_CONTEXT); + } } + drm_fasync(-1, filp, 0); + + down(&dev->struct_sem); + if (priv->prev) priv->prev->next = priv->next; + else dev->file_first = priv->next; + if (priv->next) priv->next->prev = priv->prev; + else dev->file_last = priv->prev; + up(&dev->struct_sem); + + drm_free(priv, sizeof(*priv), DRM_MEM_FILES); + MOD_DEC_USE_COUNT; + atomic_inc(&dev->total_close); + spin_lock(&dev->count_lock); + if (!--dev->open_count) { + if (atomic_read(&dev->ioctl_count) || dev->blocked) { + DRM_ERROR("Device busy: %d %d\n", + atomic_read(&dev->ioctl_count), + dev->blocked); + spin_unlock(&dev->count_lock); + return -EBUSY; + } + spin_unlock(&dev->count_lock); + return mga_takedown(dev); + } + spin_unlock(&dev->count_lock); return retcode; } + /* drm_ioctl is called whenever a process performs an ioctl on /dev/drm. */ int mga_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.h index bc7808b0a..ee75a03e2 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.h +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.h @@ -26,48 +26,79 @@ * Authors: Rickard E. (Rik) Faith <faith@precisioninsight.com> * Jeff Hartmann <jhartmann@precisioninsight.com> * - * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.h,v 1.1 2000/02/11 17:26:08 dawes Exp $ + * $XFree86$ */ #ifndef _MGA_DRV_H_ #define _MGA_DRV_H_ -#include "mga_drm_public.h" + +#define MGA_BUF_IN_USE 0 +#define MGA_BUF_SWAP_PENDING 1 +#define MGA_BUF_FORCE_FIRE 2 +#define MGA_BUF_NEEDS_OVERFLOW 3 + +typedef struct { + u32 buffer_status; + unsigned int num_dwords; + unsigned int max_dwords; + u32 *current_dma_ptr; + u32 *head; + u32 phys_head; + unsigned int prim_age; + int sec_used; + int idx; +} drm_mga_prim_buf_t; + +typedef struct _drm_mga_freelist { + unsigned int age; + drm_buf_t *buf; + struct _drm_mga_freelist *next; + struct _drm_mga_freelist *prev; +} drm_mga_freelist_t; + +#define MGA_IN_DISPATCH 0 +#define MGA_IN_FLUSH 1 +#define MGA_IN_WAIT 2 +#define MGA_IN_GETBUF 3 typedef struct _drm_mga_private { + u32 dispatch_status; + unsigned int next_prim_age; + __volatile__ unsigned int last_prim_age; int reserved_map_idx; int buffer_map_idx; drm_mga_sarea_t *sarea_priv; int primary_size; int warp_ucode_size; int chipset; - int fbOffset; - int backOffset; - int depthOffset; - int textureOffset; - int textureSize; + unsigned int frontOffset; + unsigned int backOffset; + unsigned int depthOffset; + unsigned int textureOffset; + unsigned int textureSize; int cpp; - int stride; + unsigned int stride; int sgram; int use_agp; - mgaWarpIndex WarpIndex[MGA_MAX_G400_PIPES]; - __volatile__ unsigned long softrap_age; - atomic_t dispatch_lock; + drm_mga_warp_index_t WarpIndex[MGA_MAX_G400_PIPES]; + unsigned int WarpPipe; atomic_t pending_bufs; - void *ioremap; - u32 *prim_head; - u32 *current_dma_ptr; - u32 prim_phys_head; - int prim_num_dwords; - int prim_max_dwords; - - + void *status_page; + unsigned long real_status_page; + u8 *ioremap; + drm_mga_prim_buf_t **prim_bufs; + drm_mga_prim_buf_t *next_prim; + drm_mga_prim_buf_t *last_prim; + drm_mga_prim_buf_t *current_prim; + int current_prim_idx; + drm_mga_freelist_t *head; + drm_mga_freelist_t *tail; + wait_queue_head_t flush_queue; /* Processes waiting until flush */ + wait_queue_head_t wait_queue; /* Processes waiting until interrupt */ + wait_queue_head_t buf_queue; /* Processes waiting for a free buf */ /* Some validated register values: */ - u32 frontOrg; - u32 backOrg; - u32 depthOrg; u32 mAccess; - } drm_mga_private_t; /* mga_drv.c */ @@ -92,16 +123,19 @@ extern int mga_control(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); extern int mga_lock(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); -#if 0 -extern void mga_dma_init(drm_device_t *dev); -extern void mga_dma_cleanup(drm_device_t *dev); -#endif +/* mga_dma_init does init and release */ extern int mga_dma_init(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); extern int mga_dma_cleanup(drm_device_t *dev); - -/* mga_dma_init does init and release */ +extern int mga_flush_ioctl(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern void mga_flush_write_combine(void); +extern unsigned int mga_create_sync_tag(drm_device_t *dev); +extern drm_buf_t *mga_freelist_get(drm_device_t *dev); +extern int mga_freelist_put(drm_device_t *dev, drm_buf_t *buf); +extern int mga_advance_primary(drm_device_t *dev); +extern void mga_reclaim_buffers(drm_device_t *dev, pid_t pid); /* mga_bufs.c */ @@ -124,6 +158,10 @@ extern int mga_swap_bufs(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); extern int mga_iload(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); +extern int mga_vertex(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int mga_indices(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); /* mga_context.c */ extern int mga_resctx(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg); @@ -144,13 +182,124 @@ extern int mga_context_switch(drm_device_t *dev, int old, int new); extern int mga_context_switch_complete(drm_device_t *dev, int new); +typedef enum { + TT_GENERAL, + TT_BLIT, + TT_VECTOR, + TT_VERTEX +} transferType_t; + +typedef struct { + drm_mga_freelist_t *my_freelist; + int discard; + int dispatched; +} drm_mga_buf_priv_t; + +#define DWGREG0 0x1c00 +#define DWGREG0_END 0x1dff +#define DWGREG1 0x2c00 +#define DWGREG1_END 0x2dff + +#define ISREG0(r) (r >= DWGREG0 && r <= DWGREG0_END) +#define ADRINDEX0(r) (u8)((r - DWGREG0) >> 2) +#define ADRINDEX1(r) (u8)(((r - DWGREG1) >> 2) | 0x80) +#define ADRINDEX(r) (ISREG0(r) ? ADRINDEX0(r) : ADRINDEX1(r)) + +#define MGA_VERBOSE 0 +#define MGA_NUM_PRIM_BUFS 8 + +#define PRIMLOCALS u8 tempIndex[4]; u32 *dma_ptr; u32 phys_head; \ + int outcount, num_dwords + +#define PRIM_OVERFLOW(dev, dev_priv, length) do { \ + drm_mga_prim_buf_t *tmp_buf = \ + dev_priv->prim_bufs[dev_priv->current_prim_idx]; \ + if( test_bit(MGA_BUF_NEEDS_OVERFLOW, \ + &tmp_buf->buffer_status)) { \ + mga_advance_primary(dev); \ + mga_dma_schedule(dev, 1); \ + } else if( tmp_buf->max_dwords - tmp_buf->num_dwords < length ||\ + tmp_buf->sec_used > MGA_DMA_BUF_NR/2) { \ + set_bit(MGA_BUF_FORCE_FIRE, &tmp_buf->buffer_status); \ + mga_advance_primary(dev); \ + mga_dma_schedule(dev, 1); \ + } \ +} while(0) + +#define PRIMGETPTR(dev_priv) do { \ + drm_mga_prim_buf_t *tmp_buf = \ + dev_priv->prim_bufs[dev_priv->current_prim_idx]; \ + if(MGA_VERBOSE) \ + DRM_DEBUG("PRIMGETPTR in %s\n", __FUNCTION__); \ + dma_ptr = tmp_buf->current_dma_ptr; \ + num_dwords = tmp_buf->num_dwords; \ + phys_head = tmp_buf->phys_head; \ + outcount = 0; \ +} while(0) + +#define PRIMPTR(prim_buf) do { \ + if(MGA_VERBOSE) \ + DRM_DEBUG("PRIMPTR in %s\n", __FUNCTION__); \ + dma_ptr = prim_buf->current_dma_ptr; \ + num_dwords = prim_buf->num_dwords; \ + phys_head = prim_buf->phys_head; \ + outcount = 0; \ +} while(0) + +#define PRIMFINISH(prim_buf) do { \ + if (MGA_VERBOSE) { \ + DRM_DEBUG( "PRIMFINISH in %s\n", __FUNCTION__); \ + if (outcount & 3) \ + DRM_DEBUG(" --- truncation\n"); \ + } \ + prim_buf->num_dwords = num_dwords; \ + prim_buf->current_dma_ptr = dma_ptr; \ +} while(0) + +#define PRIMADVANCE(dev_priv) do { \ +drm_mga_prim_buf_t *tmp_buf = \ + dev_priv->prim_bufs[dev_priv->current_prim_idx]; \ + if (MGA_VERBOSE) { \ + DRM_DEBUG("PRIMADVANCE in %s\n", __FUNCTION__); \ + if (outcount & 3) \ + DRM_DEBUG(" --- truncation\n"); \ + } \ + tmp_buf->num_dwords = num_dwords; \ + tmp_buf->current_dma_ptr = dma_ptr; \ +} while (0) + +#define PRIMUPDATE(dev_priv) do { \ + drm_mga_prim_buf_t *tmp_buf = \ + dev_priv->prim_bufs[dev_priv->current_prim_idx]; \ + tmp_buf->sec_used++; \ +} while (0) + +#define AGEBUF(dev_priv, buf_priv) do { \ + drm_mga_prim_buf_t *tmp_buf = \ + dev_priv->prim_bufs[dev_priv->current_prim_idx]; \ + buf_priv->my_freelist->age = tmp_buf->prim_age; \ +} while (0) + + +#define PRIMOUTREG(reg, val) do { \ + tempIndex[outcount]=ADRINDEX(reg); \ + dma_ptr[1+outcount] = val; \ + if (MGA_VERBOSE) \ + DRM_DEBUG(" PRIMOUT %d: 0x%x -- 0x%x\n", \ + num_dwords + 1 + outcount, ADRINDEX(reg), val); \ + if( ++outcount == 4) { \ + outcount = 0; \ + dma_ptr[0] = *(u32 *)tempIndex; \ + dma_ptr+=5; \ + num_dwords += 5; \ + } \ +}while (0) + +/* A reduced set of the mga registers. + */ #define MGAREG_MGA_EXEC 0x0100 -#define MGAREG_AGP_PLL 0x1e4c #define MGAREG_ALPHACTRL 0x2c7c -#define MGAREG_ALPHASTART 0x2c70 -#define MGAREG_ALPHAXINC 0x2c74 -#define MGAREG_ALPHAYINC 0x2c78 #define MGAREG_AR0 0x1c60 #define MGAREG_AR1 0x1c64 #define MGAREG_AR2 0x1c68 @@ -158,39 +307,16 @@ extern int mga_context_switch_complete(drm_device_t *dev, int new); #define MGAREG_AR4 0x1c70 #define MGAREG_AR5 0x1c74 #define MGAREG_AR6 0x1c78 -#define MGAREG_BCOL 0x1c20 #define MGAREG_CXBNDRY 0x1c80 #define MGAREG_CXLEFT 0x1ca0 #define MGAREG_CXRIGHT 0x1ca4 #define MGAREG_DMAPAD 0x1c54 -#define MGAREG_DR0_Z32LSB 0x2c50 -#define MGAREG_DR0_Z32MSB 0x2c54 -#define MGAREG_DR2_Z32LSB 0x2c60 -#define MGAREG_DR2_Z32MSB 0x2c64 -#define MGAREG_DR3_Z32LSB 0x2c68 -#define MGAREG_DR3_Z32MSB 0x2c6c -#define MGAREG_DR0 0x1cc0 -#define MGAREG_DR2 0x1cc8 -#define MGAREG_DR3 0x1ccc -#define MGAREG_DR4 0x1cd0 -#define MGAREG_DR6 0x1cd8 -#define MGAREG_DR7 0x1cdc -#define MGAREG_DR8 0x1ce0 -#define MGAREG_DR10 0x1ce8 -#define MGAREG_DR11 0x1cec -#define MGAREG_DR12 0x1cf0 -#define MGAREG_DR14 0x1cf8 -#define MGAREG_DR15 0x1cfc #define MGAREG_DSTORG 0x2cb8 -#define MGAREG_DWG_INDIR_WT 0x1e80 #define MGAREG_DWGCTL 0x1c00 #define MGAREG_DWGSYNC 0x2c4c #define MGAREG_FCOL 0x1c24 #define MGAREG_FIFOSTATUS 0x1e10 #define MGAREG_FOGCOL 0x1cf4 -#define MGAREG_FOGSTART 0x1cc4 -#define MGAREG_FOGXINC 0x1cd4 -#define MGAREG_FOGYINC 0x1ce4 #define MGAREG_FXBNDRY 0x1c84 #define MGAREG_FXLEFT 0x1ca8 #define MGAREG_FXRIGHT 0x1cac @@ -198,44 +324,22 @@ extern int mga_context_switch_complete(drm_device_t *dev, int new); #define MGAREG_IEN 0x1e1c #define MGAREG_LEN 0x1c5c #define MGAREG_MACCESS 0x1c04 -#define MGAREG_MCTLWTST 0x1c08 -#define MGAREG_MEMRDBK 0x1e44 -#define MGAREG_OPMODE 0x1e54 -#define MGAREG_PAT0 0x1c10 -#define MGAREG_PAT1 0x1c14 #define MGAREG_PITCH 0x1c8c #define MGAREG_PLNWT 0x1c1c #define MGAREG_PRIMADDRESS 0x1e58 #define MGAREG_PRIMEND 0x1e5c #define MGAREG_PRIMPTR 0x1e50 -#define MGAREG_RST 0x1e40 #define MGAREG_SECADDRESS 0x2c40 #define MGAREG_SECEND 0x2c44 #define MGAREG_SETUPADDRESS 0x2cd0 #define MGAREG_SETUPEND 0x2cd4 -#define MGAREG_SGN 0x1c58 -#define MGAREG_SHIFT 0x1c50 #define MGAREG_SOFTRAP 0x2c48 -#define MGAREG_SPECBSTART 0x2c98 -#define MGAREG_SPECBXINC 0x2c9c -#define MGAREG_SPECBYINC 0x2ca0 -#define MGAREG_SPECGSTART 0x2c8c -#define MGAREG_SPECGXINC 0x2c90 -#define MGAREG_SPECGYINC 0x2c94 -#define MGAREG_SPECRSTART 0x2c80 -#define MGAREG_SPECRXINC 0x2c84 -#define MGAREG_SPECRYINC 0x2c88 -#define MGAREG_SRC0 0x1c30 -#define MGAREG_SRC1 0x1c34 -#define MGAREG_SRC2 0x1c38 -#define MGAREG_SRC3 0x1c3c #define MGAREG_SRCORG 0x2cb4 #define MGAREG_STATUS 0x1e14 #define MGAREG_STENCIL 0x2cc8 #define MGAREG_STENCILCTL 0x2ccc #define MGAREG_TDUALSTAGE0 0x2cf8 #define MGAREG_TDUALSTAGE1 0x2cfc -#define MGAREG_TEST0 0x1e48 #define MGAREG_TEXBORDERCOL 0x2c5c #define MGAREG_TEXCTL 0x2c30 #define MGAREG_TEXCTL2 0x2c3c @@ -249,18 +353,6 @@ extern int mga_context_switch_complete(drm_device_t *dev, int new); #define MGAREG_TEXTRANS 0x2c34 #define MGAREG_TEXTRANSHIGH 0x2c38 #define MGAREG_TEXWIDTH 0x2c28 -#define MGAREG_TMR0 0x2c00 -#define MGAREG_TMR1 0x2c04 -#define MGAREG_TMR2 0x2c08 -#define MGAREG_TMR3 0x2c0c -#define MGAREG_TMR4 0x2c10 -#define MGAREG_TMR5 0x2c14 -#define MGAREG_TMR6 0x2c18 -#define MGAREG_TMR7 0x2c1c -#define MGAREG_TMR8 0x2c20 -#define MGAREG_VBIADDR0 0x3e08 -#define MGAREG_VBIADDR1 0x3e0c -#define MGAREG_VCOUNT 0x1e20 #define MGAREG_WACCEPTSEQ 0x1dd4 #define MGAREG_WCODEADDR 0x1e6c #define MGAREG_WFLAG 0x1dc4 @@ -270,18 +362,8 @@ extern int mga_context_switch_complete(drm_device_t *dev, int new); #define MGAREG_WGETMSB 0x1dc8 #define MGAREG_WIADDR 0x1dc0 #define MGAREG_WIADDR2 0x1dd8 -#define MGAREG_WIADDRNB 0x1e60 -#define MGAREG_WIADDRNB1 0x1e04 -#define MGAREG_WIADDRNB2 0x1e00 -#define MGAREG_WIMEMADDR 0x1e68 -#define MGAREG_WIMEMDATA 0x2000 -#define MGAREG_WIMEMDATA1 0x2100 #define MGAREG_WMISC 0x1e70 -#define MGAREG_WR 0x2d00 #define MGAREG_WVRTXSZ 0x1dcc -#define MGAREG_XDST 0x1cb0 -#define MGAREG_XYEND 0x1c44 -#define MGAREG_XYSTRT 0x1c40 #define MGAREG_YBOT 0x1c9c #define MGAREG_YDST 0x1c90 #define MGAREG_YDSTLEN 0x1c88 @@ -289,4 +371,77 @@ extern int mga_context_switch_complete(drm_device_t *dev, int new); #define MGAREG_YTOP 0x1c98 #define MGAREG_ZORG 0x1c0c +#define PDEA_pagpxfer_enable 0x2 + +#define WIA_wmode_suspend 0x0 +#define WIA_wmode_start 0x3 +#define WIA_wagp_agp 0x4 + +#define DC_opcod_line_open 0x0 +#define DC_opcod_autoline_open 0x1 +#define DC_opcod_line_close 0x2 +#define DC_opcod_autoline_close 0x3 +#define DC_opcod_trap 0x4 +#define DC_opcod_texture_trap 0x6 +#define DC_opcod_bitblt 0x8 +#define DC_opcod_iload 0x9 +#define DC_atype_rpl 0x0 +#define DC_atype_rstr 0x10 +#define DC_atype_zi 0x30 +#define DC_atype_blk 0x40 +#define DC_atype_i 0x70 +#define DC_linear_xy 0x0 +#define DC_linear_linear 0x80 +#define DC_zmode_nozcmp 0x0 +#define DC_zmode_ze 0x200 +#define DC_zmode_zne 0x300 +#define DC_zmode_zlt 0x400 +#define DC_zmode_zlte 0x500 +#define DC_zmode_zgt 0x600 +#define DC_zmode_zgte 0x700 +#define DC_solid_disable 0x0 +#define DC_solid_enable 0x800 +#define DC_arzero_disable 0x0 +#define DC_arzero_enable 0x1000 +#define DC_sgnzero_disable 0x0 +#define DC_sgnzero_enable 0x2000 +#define DC_shftzero_disable 0x0 +#define DC_shftzero_enable 0x4000 +#define DC_bop_SHIFT 16 +#define DC_trans_SHIFT 20 +#define DC_bltmod_bmonolef 0x0 +#define DC_bltmod_bmonowf 0x8000000 +#define DC_bltmod_bplan 0x2000000 +#define DC_bltmod_bfcol 0x4000000 +#define DC_bltmod_bu32bgr 0x6000000 +#define DC_bltmod_bu32rgb 0xe000000 +#define DC_bltmod_bu24bgr 0x16000000 +#define DC_bltmod_bu24rgb 0x1e000000 +#define DC_pattern_disable 0x0 +#define DC_pattern_enable 0x20000000 +#define DC_transc_disable 0x0 +#define DC_transc_enable 0x40000000 +#define DC_clipdis_disable 0x0 +#define DC_clipdis_enable 0x80000000 + +#define SETADD_mode_vertlist 0x0 + + +#define MGA_CLEAR_CMD (DC_opcod_trap | DC_arzero_enable | \ + DC_sgnzero_enable | DC_shftzero_enable | \ + (0xC << DC_bop_SHIFT) | DC_clipdis_enable | \ + DC_solid_enable | DC_transc_enable) + + +#define MGA_COPY_CMD (DC_opcod_bitblt | DC_atype_rpl | DC_linear_xy | \ + DC_solid_disable | DC_arzero_disable | \ + DC_sgnzero_enable | DC_shftzero_enable | \ + (0xC << DC_bop_SHIFT) | DC_bltmod_bfcol | \ + DC_pattern_disable | DC_transc_disable | \ + DC_clipdis_enable) \ + +#define MGA_FLUSH_CMD (DC_opcod_texture_trap | (0xF << DC_trans_SHIFT) |\ + DC_arzero_enable | DC_sgnzero_enable | \ + DC_atype_i) + #endif diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_state.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_state.c index d09881bad..32f6bcf4b 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_state.c +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_state.c @@ -26,337 +26,1047 @@ * Authors: Jeff Hartmann <jhartmann@precisioninsight.com> * Keith Whitwell <keithw@precisioninsight.com> * - * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_state.c,v 1.1 2000/02/11 17:26:08 dawes Exp $ + * $XFree86$ * */ #define __NO_VERSION__ #include "drmP.h" #include "mga_drv.h" -#include "mgareg_flags.h" -#include "mga_dma.h" -#include "mga_state.h" #include "drm.h" -void mgaEmitClipRect( drm_mga_private_t *dev_priv, xf86drmClipRectRec *box ) +static void mgaEmitClipRect( drm_mga_private_t *dev_priv, + drm_clip_rect_t *box ) { + drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; + unsigned int *regs = sarea_priv->ContextState; PRIMLOCALS; + DRM_DEBUG("%s\n", __FUNCTION__); + /* This takes 10 dwords */ PRIMGETPTR( dev_priv ); + + /* Force reset of dwgctl (eliminates clip disable) */ +#if 1 + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DWGSYNC, 0 ); + PRIMOUTREG( MGAREG_DWGSYNC, 0 ); + PRIMOUTREG( MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL] ); +#else + PRIMOUTREG( MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL] ); + PRIMOUTREG( MGAREG_LEN + MGAREG_MGA_EXEC, 0x80000000 ); + PRIMOUTREG( MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL] ); + PRIMOUTREG( MGAREG_LEN + MGAREG_MGA_EXEC, 0x80000000 ); +#endif - /* The G400 seems to have an issue with the second WARP not - * stalling clipper register writes. This bothers me, but the only - * way I could get it to never clip the last triangle under any - * circumstances is by inserting TWO dwgsync commands. - */ - if (dev_priv->chipset == MGA_CARD_TYPE_G400) { - PRIMOUTREG( MGAREG_DWGSYNC, 0 ); - PRIMOUTREG( MGAREG_DWGSYNC, 0 ); - } - + PRIMOUTREG( MGAREG_DMAPAD, 0 ); PRIMOUTREG( MGAREG_CXBNDRY, ((box->x2)<<16)|(box->x1) ); - PRIMOUTREG( MGAREG_YTOP, box->y1 * dev_priv->stride ); - PRIMOUTREG( MGAREG_YBOT, box->y2 * dev_priv->stride ); + PRIMOUTREG( MGAREG_YTOP, box->y1 * dev_priv->stride/2 ); + PRIMOUTREG( MGAREG_YBOT, box->y2 * dev_priv->stride/2 ); + PRIMADVANCE( dev_priv ); } - -static void mgaEmitContext(drm_mga_private_t *dev_priv, - drm_mga_buf_priv_t *buf_priv) +static void mgaEmitContext(drm_mga_private_t *dev_priv ) { - unsigned int *regs = buf_priv->ContextState; + drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; + unsigned int *regs = sarea_priv->ContextState; PRIMLOCALS; + DRM_DEBUG("%s\n", __FUNCTION__); + /* This takes a max of 15 dwords */ PRIMGETPTR( dev_priv ); + PRIMOUTREG( MGAREG_DSTORG, regs[MGA_CTXREG_DSTORG] ); PRIMOUTREG( MGAREG_MACCESS, regs[MGA_CTXREG_MACCESS] ); PRIMOUTREG( MGAREG_PLNWT, regs[MGA_CTXREG_PLNWT] ); PRIMOUTREG( MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL] ); + PRIMOUTREG( MGAREG_ALPHACTRL, regs[MGA_CTXREG_ALPHACTRL] ); PRIMOUTREG( MGAREG_FOGCOL, regs[MGA_CTXREG_FOGCOLOR] ); PRIMOUTREG( MGAREG_WFLAG, regs[MGA_CTXREG_WFLAG] ); + PRIMOUTREG( MGAREG_ZORG, dev_priv->depthOffset ); /* invarient */ if (dev_priv->chipset == MGA_CARD_TYPE_G400) { PRIMOUTREG( MGAREG_WFLAG1, regs[MGA_CTXREG_WFLAG] ); PRIMOUTREG( MGAREG_TDUALSTAGE0, regs[MGA_CTXREG_TDUAL0] ); - PRIMOUTREG( MGAREG_TDUALSTAGE1, regs[MGA_CTXREG_TDUAL1] ); - } + PRIMOUTREG( MGAREG_TDUALSTAGE1, regs[MGA_CTXREG_TDUAL1] ); + PRIMOUTREG( MGAREG_FCOL, regs[MGA_CTXREG_FCOL] ); + } else { + PRIMOUTREG( MGAREG_FCOL, regs[MGA_CTXREG_FCOL] ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + } PRIMADVANCE( dev_priv ); } -static void mgaG200EmitTex( drm_mga_private_t *dev_priv, - drm_mga_buf_priv_t *buf_priv ) +static void mgaG200EmitTex( drm_mga_private_t *dev_priv ) { - unsigned int *regs = buf_priv->TexState[0]; + drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; + unsigned int *regs = sarea_priv->TexState[0]; PRIMLOCALS; + DRM_DEBUG("%s\n", __FUNCTION__); PRIMGETPTR( dev_priv ); - PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] ); - PRIMOUTREG(MGAREG_TEXCTL, regs[MGA_TEXREG_CTL] ); - PRIMOUTREG(MGAREG_TEXFILTER, regs[MGA_TEXREG_FILTER] ); - PRIMOUTREG(MGAREG_TEXBORDERCOL, regs[MGA_TEXREG_BORDERCOL] ); - PRIMOUTREG(MGAREG_TEXORG, regs[MGA_TEXREG_ORG] ); - PRIMOUTREG(MGAREG_TEXORG1, regs[MGA_TEXREG_ORG1] ); - PRIMOUTREG(MGAREG_TEXORG2, regs[MGA_TEXREG_ORG2] ); - PRIMOUTREG(MGAREG_TEXORG3, regs[MGA_TEXREG_ORG3] ); - PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4] ); - PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH] ); - PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT] ); - PRIMOUTREG(0x2d00 + 24*4, regs[MGA_TEXREG_WIDTH] ); - PRIMOUTREG(0x2d00 + 34*4, regs[MGA_TEXREG_HEIGHT] ); + /* This takes 20 dwords */ + + PRIMOUTREG( MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] ); + PRIMOUTREG( MGAREG_TEXCTL, regs[MGA_TEXREG_CTL] ); + PRIMOUTREG( MGAREG_TEXFILTER, regs[MGA_TEXREG_FILTER] ); + PRIMOUTREG( MGAREG_TEXBORDERCOL, regs[MGA_TEXREG_BORDERCOL] ); + + PRIMOUTREG( MGAREG_TEXORG, regs[MGA_TEXREG_ORG] ); + PRIMOUTREG( MGAREG_TEXORG1, regs[MGA_TEXREG_ORG1] ); + PRIMOUTREG( MGAREG_TEXORG2, regs[MGA_TEXREG_ORG2] ); + PRIMOUTREG( MGAREG_TEXORG3, regs[MGA_TEXREG_ORG3] ); + + PRIMOUTREG( MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4] ); + PRIMOUTREG( MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH] ); + PRIMOUTREG( MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT] ); + PRIMOUTREG( 0x2d00 + 24*4, regs[MGA_TEXREG_WIDTH] ); + + PRIMOUTREG( 0x2d00 + 34*4, regs[MGA_TEXREG_HEIGHT] ); + PRIMOUTREG( MGAREG_TEXTRANS, 0xffff ); + PRIMOUTREG( MGAREG_TEXTRANSHIGH, 0xffff ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); PRIMADVANCE( dev_priv ); } -static void mgaG400EmitTex0( drm_mga_private_t *dev_priv, - drm_mga_buf_priv_t *buf_priv ) +static void mgaG400EmitTex0( drm_mga_private_t *dev_priv ) { - unsigned int *regs = buf_priv->TexState[0]; - int multitex = buf_priv->WarpPipe & MGA_T2; - + drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; + unsigned int *regs = sarea_priv->TexState[0]; + int multitex = sarea_priv->WarpPipe & MGA_T2; PRIMLOCALS; + DRM_DEBUG("%s\n", __FUNCTION__); + PRIMGETPTR( dev_priv ); - - PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] ); - PRIMOUTREG(MGAREG_TEXCTL, regs[MGA_TEXREG_CTL] ); - PRIMOUTREG(MGAREG_TEXFILTER, regs[MGA_TEXREG_FILTER] ); - PRIMOUTREG(MGAREG_TEXBORDERCOL, regs[MGA_TEXREG_BORDERCOL] ); - PRIMOUTREG(MGAREG_TEXORG, regs[MGA_TEXREG_ORG] ); - PRIMOUTREG(MGAREG_TEXORG1, regs[MGA_TEXREG_ORG1] ); - PRIMOUTREG(MGAREG_TEXORG2, regs[MGA_TEXREG_ORG2] ); - PRIMOUTREG(MGAREG_TEXORG3, regs[MGA_TEXREG_ORG3] ); - PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4] ); - PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH] ); - PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT] ); - PRIMOUTREG(0x2d00 + 49*4, 0); - PRIMOUTREG(0x2d00 + 57*4, 0); - PRIMOUTREG(0x2d00 + 53*4, 0); - PRIMOUTREG(0x2d00 + 61*4, 0); + /* This takes a max of 30 dwords */ + + PRIMOUTREG( MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] ); + PRIMOUTREG( MGAREG_TEXCTL, regs[MGA_TEXREG_CTL] ); + PRIMOUTREG( MGAREG_TEXFILTER, regs[MGA_TEXREG_FILTER] ); + PRIMOUTREG( MGAREG_TEXBORDERCOL, regs[MGA_TEXREG_BORDERCOL] ); + + PRIMOUTREG( MGAREG_TEXORG, regs[MGA_TEXREG_ORG] ); + PRIMOUTREG( MGAREG_TEXORG1, regs[MGA_TEXREG_ORG1] ); + PRIMOUTREG( MGAREG_TEXORG2, regs[MGA_TEXREG_ORG2] ); + PRIMOUTREG( MGAREG_TEXORG3, regs[MGA_TEXREG_ORG3] ); + + PRIMOUTREG( MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4] ); + PRIMOUTREG( MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH] ); + PRIMOUTREG( MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT] ); + PRIMOUTREG( 0x2d00 + 49*4, 0 ); + + PRIMOUTREG( 0x2d00 + 57*4, 0 ); + PRIMOUTREG( 0x2d00 + 53*4, 0 ); + PRIMOUTREG( 0x2d00 + 61*4, 0 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); if (!multitex) { - PRIMOUTREG(0x2d00 + 52*4, 0x40 ); - PRIMOUTREG(0x2d00 + 60*4, 0x40 ); + PRIMOUTREG( 0x2d00 + 52*4, 0x40 ); + PRIMOUTREG( 0x2d00 + 60*4, 0x40 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); } - PRIMOUTREG(0x2d00 + 54*4, regs[MGA_TEXREG_WIDTH] | 0x40 ); - PRIMOUTREG(0x2d00 + 62*4, regs[MGA_TEXREG_HEIGHT] | 0x40 ); + PRIMOUTREG( 0x2d00 + 54*4, regs[MGA_TEXREG_WIDTH] | 0x40 ); + PRIMOUTREG( 0x2d00 + 62*4, regs[MGA_TEXREG_HEIGHT] | 0x40 ); + PRIMOUTREG( MGAREG_TEXTRANS, 0xffff ); + PRIMOUTREG( MGAREG_TEXTRANSHIGH, 0xffff ); PRIMADVANCE( dev_priv ); } #define TMC_map1_enable 0x80000000 - -static void mgaG400EmitTex1( drm_mga_private_t *dev_priv, - drm_mga_buf_priv_t *buf_priv ) +static void mgaG400EmitTex1( drm_mga_private_t *dev_priv ) { - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; + drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; unsigned int *regs = sarea_priv->TexState[1]; - PRIMLOCALS; - PRIMGETPTR(dev_priv); - - PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] | TMC_map1_enable); - PRIMOUTREG(MGAREG_TEXCTL, regs[MGA_TEXREG_CTL] ); - PRIMOUTREG(MGAREG_TEXFILTER, regs[MGA_TEXREG_FILTER] ); - PRIMOUTREG(MGAREG_TEXBORDERCOL, regs[MGA_TEXREG_BORDERCOL] ); - PRIMOUTREG(MGAREG_TEXORG, regs[MGA_TEXREG_ORG] ); - PRIMOUTREG(MGAREG_TEXORG1, regs[MGA_TEXREG_ORG1] ); - PRIMOUTREG(MGAREG_TEXORG2, regs[MGA_TEXREG_ORG2] ); - PRIMOUTREG(MGAREG_TEXORG3, regs[MGA_TEXREG_ORG3] ); - PRIMOUTREG(MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4] ); - PRIMOUTREG(MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH] ); - PRIMOUTREG(MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT] ); + DRM_DEBUG("%s\n", __FUNCTION__); - PRIMOUTREG(0x2d00 + 49*4, 0); - PRIMOUTREG(0x2d00 + 57*4, 0); - PRIMOUTREG(0x2d00 + 53*4, 0); - PRIMOUTREG(0x2d00 + 61*4, 0); + PRIMGETPTR( dev_priv ); - PRIMOUTREG(0x2d00 + 52*4, regs[MGA_TEXREG_WIDTH] | 0x40 ); - PRIMOUTREG(0x2d00 + 60*4, regs[MGA_TEXREG_HEIGHT] | 0x40 ); + /* This takes 25 dwords */ - PRIMOUTREG(MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] ); + PRIMOUTREG( MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] | TMC_map1_enable ); + PRIMOUTREG( MGAREG_TEXCTL, regs[MGA_TEXREG_CTL] ); + PRIMOUTREG( MGAREG_TEXFILTER, regs[MGA_TEXREG_FILTER] ); + PRIMOUTREG( MGAREG_TEXBORDERCOL, regs[MGA_TEXREG_BORDERCOL] ); - PRIMADVANCE( dev_priv ); + PRIMOUTREG( MGAREG_TEXORG, regs[MGA_TEXREG_ORG] ); + PRIMOUTREG( MGAREG_TEXORG1, regs[MGA_TEXREG_ORG1] ); + PRIMOUTREG( MGAREG_TEXORG2, regs[MGA_TEXREG_ORG2] ); + PRIMOUTREG( MGAREG_TEXORG3, regs[MGA_TEXREG_ORG3] ); + + PRIMOUTREG( MGAREG_TEXORG4, regs[MGA_TEXREG_ORG4] ); + PRIMOUTREG( MGAREG_TEXWIDTH, regs[MGA_TEXREG_WIDTH] ); + PRIMOUTREG( MGAREG_TEXHEIGHT, regs[MGA_TEXREG_HEIGHT] ); + PRIMOUTREG( 0x2d00 + 49*4, 0 ); + + PRIMOUTREG( 0x2d00 + 57*4, 0 ); + PRIMOUTREG( 0x2d00 + 53*4, 0 ); + PRIMOUTREG( 0x2d00 + 61*4, 0 ); + PRIMOUTREG( 0x2d00 + 52*4, regs[MGA_TEXREG_WIDTH] | 0x40 ); + + PRIMOUTREG( 0x2d00 + 60*4, regs[MGA_TEXREG_HEIGHT] | 0x40 ); + PRIMOUTREG( MGAREG_TEXTRANS, 0xffff ); + PRIMOUTREG( MGAREG_TEXTRANSHIGH, 0xffff ); + PRIMOUTREG( MGAREG_TEXCTL2, regs[MGA_TEXREG_CTL2] ); + + PRIMADVANCE( dev_priv ); } +/* Required when switching from multitexturing to single texturing. + */ +static void mgaG400EmitTexFlush( drm_mga_private_t *dev_priv ) +{ + PRIMLOCALS; + DRM_DEBUG("%s\n", __FUNCTION__); + + PRIMGETPTR( dev_priv ); + + /* This takes 15 dwords */ + + PRIMOUTREG( MGAREG_YDST, 0 ); + PRIMOUTREG( MGAREG_FXLEFT, 0 ); + PRIMOUTREG( MGAREG_FXRIGHT, 1 ); + PRIMOUTREG( MGAREG_DWGCTL, MGA_FLUSH_CMD ); + + PRIMOUTREG( MGAREG_LEN + MGAREG_MGA_EXEC, 1 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DWGSYNC, 0x7000 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + + PRIMOUTREG( MGAREG_TEXCTL2, 0 ); + PRIMOUTREG( MGAREG_LEN + MGAREG_MGA_EXEC, 0 ); + PRIMOUTREG( MGAREG_TEXCTL2, 0x80 ); + PRIMOUTREG( MGAREG_LEN + MGAREG_MGA_EXEC, 0 ); -static void mgaG400EmitPipe(drm_mga_private_t *dev_priv, - drm_mga_buf_priv_t *buf_priv) + PRIMADVANCE( dev_priv ); +} + +static void mgaG400EmitPipe( drm_mga_private_t *dev_priv ) { - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; + drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; unsigned int pipe = sarea_priv->WarpPipe; float fParam = 12800.0f; PRIMLOCALS; + DRM_DEBUG("%s\n", __FUNCTION__); - PRIMGETPTR(dev_priv); - PRIMOUTREG(MGAREG_WIADDR2, WIA_wmode_suspend); - + PRIMGETPTR( dev_priv ); + + /* This takes 30 dwords */ + /* Establish vertex size. */ if (pipe & MGA_T2) { - PRIMOUTREG(MGAREG_WVRTXSZ, 0x00001e09); - PRIMOUTREG(MGAREG_WACCEPTSEQ, 0x1e000000); + PRIMOUTREG( MGAREG_WIADDR2, WIA_wmode_suspend ); + PRIMOUTREG( MGAREG_WVRTXSZ, 0x00001e09 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + + PRIMOUTREG( MGAREG_WACCEPTSEQ, 0 ); + PRIMOUTREG( MGAREG_WACCEPTSEQ, 0 ); + PRIMOUTREG( MGAREG_WACCEPTSEQ, 0 ); + PRIMOUTREG( MGAREG_WACCEPTSEQ, 0x1e000000 ); } else { - PRIMOUTREG(MGAREG_WVRTXSZ, 0x00001807); - PRIMOUTREG(MGAREG_WACCEPTSEQ, 0x18000000); - } - - PRIMOUTREG(MGAREG_WFLAG, 0); - PRIMOUTREG(MGAREG_WFLAG1, 0); - - PRIMOUTREG(0x2d00 + 56*4, *((u32 *)(&fParam))); - PRIMOUTREG(MGAREG_DMAPAD, 0); - PRIMOUTREG(MGAREG_DMAPAD, 0); + PRIMOUTREG( MGAREG_WIADDR2, WIA_wmode_suspend ); + PRIMOUTREG( MGAREG_WVRTXSZ, 0x00001807 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + + PRIMOUTREG( MGAREG_WACCEPTSEQ, 0 ); + PRIMOUTREG( MGAREG_WACCEPTSEQ, 0 ); + PRIMOUTREG( MGAREG_WACCEPTSEQ, 0 ); + PRIMOUTREG( MGAREG_WACCEPTSEQ, 0x18000000 ); + } + + PRIMOUTREG( MGAREG_WFLAG, 0 ); + PRIMOUTREG( MGAREG_WFLAG1, 0 ); + PRIMOUTREG( 0x2d00 + 56*4, *((u32 *)(&fParam)) ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); - PRIMOUTREG(0x2d00 + 49*4, 0); /* Tex stage 0 */ - PRIMOUTREG(0x2d00 + 57*4, 0); /* Tex stage 0 */ - PRIMOUTREG(0x2d00 + 53*4, 0); /* Tex stage 1 */ - PRIMOUTREG(0x2d00 + 61*4, 0); /* Tex stage 1 */ + PRIMOUTREG( 0x2d00 + 49*4, 0 ); /* Tex stage 0 */ + PRIMOUTREG( 0x2d00 + 57*4, 0 ); /* Tex stage 0 */ + PRIMOUTREG( 0x2d00 + 53*4, 0 ); /* Tex stage 1 */ + PRIMOUTREG( 0x2d00 + 61*4, 0 ); /* Tex stage 1 */ - PRIMOUTREG(0x2d00 + 54*4, 0x40); /* Tex stage 0 : w */ - PRIMOUTREG(0x2d00 + 62*4, 0x40); /* Tex stage 0 : h */ - PRIMOUTREG(0x2d00 + 52*4, 0x40); /* Tex stage 1 : w */ - PRIMOUTREG(0x2d00 + 60*4, 0x40); /* Tex stage 1 : h */ + PRIMOUTREG( 0x2d00 + 54*4, 0x40 ); /* Tex stage 0 : w */ + PRIMOUTREG( 0x2d00 + 62*4, 0x40 ); /* Tex stage 0 : h */ + PRIMOUTREG( 0x2d00 + 52*4, 0x40 ); /* Tex stage 1 : w */ + PRIMOUTREG( 0x2d00 + 60*4, 0x40 ); /* Tex stage 1 : h */ /* Dma pading required due to hw bug */ - PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff); - PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff); - PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff); - PRIMOUTREG(MGAREG_WIADDR2, (dev_priv->WarpIndex[pipe].phys_addr | - WIA_wmode_start | WIA_wagp_agp)); - PRIMADVANCE(dev_priv); + PRIMOUTREG( MGAREG_DMAPAD, 0xffffffff ); + PRIMOUTREG( MGAREG_DMAPAD, 0xffffffff ); + PRIMOUTREG( MGAREG_DMAPAD, 0xffffffff ); + PRIMOUTREG( MGAREG_WIADDR2, (u32)(dev_priv->WarpIndex[pipe].phys_addr | + WIA_wmode_start | WIA_wagp_agp) ); + PRIMADVANCE( dev_priv ); } -static void mgaG200EmitPipe( drm_mga_private_t *dev_priv, - drm_mga_buf_priv_t *buf_priv ) +static void mgaG200EmitPipe( drm_mga_private_t *dev_priv ) { - drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; + drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; unsigned int pipe = sarea_priv->WarpPipe; PRIMLOCALS; + DRM_DEBUG("%s\n", __FUNCTION__); - PRIMGETPTR(dev_priv); - PRIMOUTREG(MGAREG_WIADDR, WIA_wmode_suspend); - PRIMOUTREG(MGAREG_WVRTXSZ, 7); - PRIMOUTREG(MGAREG_WFLAG, 0); - PRIMOUTREG(0x2d00 + 24*4, 0); /* tex w/h */ + PRIMGETPTR( dev_priv ); - PRIMOUTREG(0x2d00 + 25*4, 0x100); - PRIMOUTREG(0x2d00 + 34*4, 0); /* tex w/h */ - PRIMOUTREG(0x2d00 + 42*4, 0xFFFF); - PRIMOUTREG(0x2d00 + 60*4, 0xFFFF); + /* This takes 15 dwords */ + + PRIMOUTREG( MGAREG_WIADDR, WIA_wmode_suspend ); + PRIMOUTREG( MGAREG_WVRTXSZ, 7 ); + PRIMOUTREG( MGAREG_WFLAG, 0 ); + PRIMOUTREG( 0x2d00 + 24*4, 0 ); /* tex w/h */ + + PRIMOUTREG( 0x2d00 + 25*4, 0x100 ); + PRIMOUTREG( 0x2d00 + 34*4, 0 ); /* tex w/h */ + PRIMOUTREG( 0x2d00 + 42*4, 0xFFFF ); + PRIMOUTREG( 0x2d00 + 60*4, 0xFFFF ); /* Dma pading required due to hw bug */ - PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff); - PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff); - PRIMOUTREG(MGAREG_DMAPAD, 0xffffffff); - PRIMOUTREG(MGAREG_WIADDR, (dev_priv->WarpIndex[pipe].phys_addr | - WIA_wmode_start | WIA_wagp_agp)); + PRIMOUTREG( MGAREG_DMAPAD, 0xffffffff ); + PRIMOUTREG( MGAREG_DMAPAD, 0xffffffff ); + PRIMOUTREG( MGAREG_DMAPAD, 0xffffffff ); + PRIMOUTREG( MGAREG_WIADDR, (u32)(dev_priv->WarpIndex[pipe].phys_addr | + WIA_wmode_start | WIA_wagp_agp) ); - PRIMADVANCE(dev_priv); + PRIMADVANCE( dev_priv ); } -void mgaEmitState( drm_mga_private_t *dev_priv, drm_mga_buf_priv_t *buf_priv ) +static void mgaEmitState( drm_mga_private_t *dev_priv ) { - unsigned int dirty = buf_priv->dirty; + drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; + unsigned int dirty = sarea_priv->dirty; + DRM_DEBUG("%s\n", __FUNCTION__); if (dev_priv->chipset == MGA_CARD_TYPE_G400) { - if (dirty & MGASAREA_NEW_CONTEXT) - mgaEmitContext( dev_priv, buf_priv ); + int multitex = sarea_priv->WarpPipe & MGA_T2; - if (dirty & MGASAREA_NEW_TEX1) - mgaG400EmitTex1( dev_priv, buf_priv ); - - if (dirty & MGASAREA_NEW_TEX0) - mgaG400EmitTex0( dev_priv, buf_priv ); + if (sarea_priv->WarpPipe != dev_priv->WarpPipe) { + if ((dev_priv->WarpPipe & MGA_T2) && !multitex) { + mgaG400EmitTexFlush( dev_priv ); + } + mgaG400EmitPipe( dev_priv ); + dev_priv->WarpPipe = sarea_priv->WarpPipe; + } + + if (dirty & MGA_UPLOAD_CTX) { + mgaEmitContext( dev_priv ); + sarea_priv->dirty &= ~MGA_UPLOAD_CTX; + } - if (dirty & MGASAREA_NEW_PIPE) - mgaG400EmitPipe( dev_priv, buf_priv ); + if (dirty & MGA_UPLOAD_TEX0) { + mgaG400EmitTex0( dev_priv ); + sarea_priv->dirty &= ~MGA_UPLOAD_TEX0; + } + + if ((dirty & MGA_UPLOAD_TEX1) && multitex) { + mgaG400EmitTex1( dev_priv ); + sarea_priv->dirty &= ~MGA_UPLOAD_TEX1; + } } else { - if (dirty & MGASAREA_NEW_CONTEXT) - mgaEmitContext( dev_priv, buf_priv ); + if (sarea_priv->WarpPipe != dev_priv->WarpPipe) { + mgaG200EmitPipe( dev_priv ); + dev_priv->WarpPipe = sarea_priv->WarpPipe; + } - if (dirty & MGASAREA_NEW_TEX0) - mgaG200EmitTex( dev_priv, buf_priv ); + if (dirty & MGA_UPLOAD_CTX) { + mgaEmitContext( dev_priv ); + sarea_priv->dirty &= ~MGA_UPLOAD_CTX; + } - if (dirty & MGASAREA_NEW_PIPE) - mgaG200EmitPipe( dev_priv, buf_priv ); - } + if (dirty & MGA_UPLOAD_TEX0) { + mgaG200EmitTex( dev_priv ); + sarea_priv->dirty &= ~MGA_UPLOAD_TEX0; + } + } } - /* Disallow all write destinations except the front and backbuffer. */ -static int mgaCopyContext(drm_mga_private_t *dev_priv, - drm_mga_buf_priv_t *buf_priv) +static int mgaVerifyContext(drm_mga_private_t *dev_priv ) { drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; unsigned int *regs = sarea_priv->ContextState; - - if (regs[MGA_CTXREG_DSTORG] != dev_priv->frontOrg && - regs[MGA_CTXREG_DSTORG] != dev_priv->backOrg) + + DRM_DEBUG("%s\n", __FUNCTION__); + + if (regs[MGA_CTXREG_DSTORG] != dev_priv->frontOffset && + regs[MGA_CTXREG_DSTORG] != dev_priv->backOffset) { + DRM_DEBUG("BAD DSTORG: %x (front %x, back %x)\n\n", + regs[MGA_CTXREG_DSTORG], dev_priv->frontOffset, + dev_priv->backOffset); + regs[MGA_CTXREG_DSTORG] = 0; return -1; + } - memcpy(buf_priv->ContextState, sarea_priv->ContextState, - sizeof(buf_priv->ContextState)); return 0; } - /* Disallow texture reads from PCI space. */ -static int mgaCopyTex(drm_mga_private_t *dev_priv, - drm_mga_buf_priv_t *buf_priv, +static int mgaVerifyTex(drm_mga_private_t *dev_priv, int unit) { drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - if ((sarea_priv->TexState[unit][MGA_TEXREG_ORG] & 0x3) == 0x1) - return -1; + DRM_DEBUG("%s\n", __FUNCTION__); - memcpy(buf_priv->TexState[unit], sarea_priv->TexState[unit], - sizeof(buf_priv->TexState[0])); + if ((sarea_priv->TexState[unit][MGA_TEXREG_ORG] & 0x3) == 0x1) { + DRM_DEBUG("BAD TEXREG_ORG: %x, unit %d\n", + sarea_priv->TexState[unit][MGA_TEXREG_ORG], + unit); + sarea_priv->TexState[unit][MGA_TEXREG_ORG] = 0; + return -1; + } return 0; } - -int mgaCopyAndVerifyState( drm_mga_private_t *dev_priv, - drm_mga_buf_priv_t *buf_priv ) +static int mgaVerifyState( drm_mga_private_t *dev_priv ) { drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; - unsigned int dirty = sarea_priv->dirty ; + unsigned int dirty = sarea_priv->dirty; int rv = 0; - buf_priv->dirty = sarea_priv->dirty; - buf_priv->WarpPipe = sarea_priv->WarpPipe; + DRM_DEBUG("%s\n", __FUNCTION__); + + if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS) + sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS; - if (dirty & MGASAREA_NEW_CONTEXT) - rv |= mgaCopyContext( dev_priv, buf_priv ); + if (dirty & MGA_UPLOAD_CTX) + rv |= mgaVerifyContext( dev_priv ); - if (dirty & MGASAREA_NEW_TEX0) - rv |= mgaCopyTex( dev_priv, buf_priv, 0 ); + if (dirty & MGA_UPLOAD_TEX0) + rv |= mgaVerifyTex( dev_priv, 0 ); if (dev_priv->chipset == MGA_CARD_TYPE_G400) { - if (dirty & MGASAREA_NEW_TEX1) - rv |= mgaCopyTex( dev_priv, buf_priv, 1 ); + if (dirty & MGA_UPLOAD_TEX1) + rv |= mgaVerifyTex( dev_priv, 1 ); - if (dirty & MGASAREA_NEW_PIPE) - rv |= (buf_priv->WarpPipe > MGA_MAX_G400_PIPES); + if (dirty & MGA_UPLOAD_PIPE) + rv |= (sarea_priv->WarpPipe > MGA_MAX_G400_PIPES); } else { - if (dirty & MGASAREA_NEW_PIPE) - rv |= (buf_priv->WarpPipe > MGA_MAX_G200_PIPES); + if (dirty & MGA_UPLOAD_PIPE) + rv |= (sarea_priv->WarpPipe > MGA_MAX_G200_PIPES); } return rv == 0; } +static int mgaVerifyIload( drm_mga_private_t *dev_priv, + unsigned long bus_address, + unsigned int dstOrg, int length ) +{ + DRM_DEBUG("%s\n", __FUNCTION__); + + if(dstOrg < dev_priv->textureOffset || + dstOrg + length > + (dev_priv->textureOffset + dev_priv->textureSize)) { + return -EINVAL; + } + if(length % 64) { + return -EINVAL; + } + return 0; +} + +/* This copies a 64 byte aligned agp region to the frambuffer + * with a standard blit, the ioctl needs to do checking */ + +static void mga_dma_dispatch_tex_blit( drm_device_t *dev, + unsigned long bus_address, + int length, + unsigned int destOrg ) +{ + drm_mga_private_t *dev_priv = dev->dev_private; + int use_agp = PDEA_pagpxfer_enable | 0x00000001; + u16 y2; + PRIMLOCALS; + DRM_DEBUG("%s\n", __FUNCTION__); + + y2 = length / 64; + + PRIM_OVERFLOW( dev, dev_priv, 30 ); + PRIMGETPTR( dev_priv ); + + PRIMOUTREG( MGAREG_DSTORG, destOrg ); + PRIMOUTREG( MGAREG_MACCESS, 0x00000000 ); + DRM_DEBUG("srcorg : %lx\n", bus_address | use_agp); + PRIMOUTREG( MGAREG_SRCORG, (u32) bus_address | use_agp ); + PRIMOUTREG( MGAREG_AR5, 64 ); + + PRIMOUTREG( MGAREG_PITCH, 64 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DWGCTL, MGA_COPY_CMD ); + + PRIMOUTREG( MGAREG_AR0, 63 ); + PRIMOUTREG( MGAREG_AR3, 0 ); + PRIMOUTREG( MGAREG_FXBNDRY, (63 << 16) ); + PRIMOUTREG( MGAREG_YDSTLEN+MGAREG_MGA_EXEC, y2 ); + + PRIMOUTREG( MGAREG_SRCORG, 0 ); + PRIMOUTREG( MGAREG_PITCH, dev_priv->stride / dev_priv->cpp ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMADVANCE( dev_priv ); +} + +static void mga_dma_dispatch_vertex(drm_device_t *dev, + drm_buf_t *buf) +{ + drm_mga_private_t *dev_priv = dev->dev_private; + drm_mga_buf_priv_t *buf_priv = buf->dev_private; + drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; + unsigned long address = (unsigned long)buf->bus_address; + int length = buf->used; + int use_agp = PDEA_pagpxfer_enable; + int i = 0; + int primary_needed; + PRIMLOCALS; + DRM_DEBUG("%s\n", __FUNCTION__); + + DRM_DEBUG("dispatch vertex %d addr 0x%lx, " + "length 0x%x nbox %d dirty %x\n", + buf->idx, address, length, + sarea_priv->nbox, sarea_priv->dirty); + + DRM_DEBUG("used : %d, total : %d\n", buf->used, buf->total); + if(sarea_priv->WarpPipe & MGA_T2) { + if ((buf->used/4) % 10) + DRM_DEBUG("Multitex Buf is not aligned properly!!!\n"); + } else { + if ((buf->used/4) % 8) + DRM_DEBUG("Buf is not aligned properly!!!\n"); + } + + if (buf->used) { + /* WARNING: if you change any of the state functions verify + * these numbers (Overestimating this doesn't hurt). + */ + buf_priv->dispatched = 1; + primary_needed = (30+15+15+30+25+ + 10 + + 15 * MGA_NR_SAREA_CLIPRECTS); + PRIM_OVERFLOW(dev, dev_priv, primary_needed); + mgaEmitState( dev_priv ); + + do { + if (i < sarea_priv->nbox) { + DRM_DEBUG("idx %d Emit box %d/%d:" + "%d,%d - %d,%d\n", + buf->idx, + i, sarea_priv->nbox, + sarea_priv->boxes[i].x1, + sarea_priv->boxes[i].y1, + sarea_priv->boxes[i].x2, + sarea_priv->boxes[i].y2); + + mgaEmitClipRect( dev_priv, + &sarea_priv->boxes[i] ); + } + + PRIMGETPTR( dev_priv ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_SECADDRESS, + ((u32)address) | TT_VERTEX ); + PRIMOUTREG( MGAREG_SECEND, + (((u32)(address + length)) | use_agp) ); + PRIMADVANCE( dev_priv ); + } while (++i < sarea_priv->nbox); + } + + if (buf_priv->discard) { + if (buf_priv->dispatched == 1) AGEBUF(dev_priv, buf_priv); + buf_priv->dispatched = 0; + mga_freelist_put(dev, buf); + } + + +} + + +static void mga_dma_dispatch_indices(drm_device_t *dev, + drm_buf_t *buf, + unsigned int start, + unsigned int end) +{ + drm_mga_private_t *dev_priv = dev->dev_private; + drm_mga_buf_priv_t *buf_priv = buf->dev_private; + drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; + unsigned int address = (unsigned int)buf->bus_address; + int use_agp = PDEA_pagpxfer_enable; + int i = 0; + int primary_needed; + PRIMLOCALS; + DRM_DEBUG("%s\n", __FUNCTION__); + + DRM_DEBUG("dispatch indices %d addr 0x%x, " + "start 0x%x end 0x%x nbox %d dirty %x\n", + buf->idx, address, start, end, + sarea_priv->nbox, sarea_priv->dirty); + + if (start != end) { + /* WARNING: if you change any of the state functions verify + * these numbers (Overestimating this doesn't hurt). + */ + buf_priv->dispatched = 1; + primary_needed = (25+15+30+25+ + 10 + + 15 * MGA_NR_SAREA_CLIPRECTS); + PRIM_OVERFLOW( dev, dev_priv, primary_needed ); + mgaEmitState( dev_priv ); + + do { + if (i < sarea_priv->nbox) { + DRM_DEBUG("idx %d Emit box %d/%d:" + "%d,%d - %d,%d\n", + buf->idx, + i, sarea_priv->nbox, + sarea_priv->boxes[i].x1, + sarea_priv->boxes[i].y1, + sarea_priv->boxes[i].x2, + sarea_priv->boxes[i].y2); + + mgaEmitClipRect( dev_priv, + &sarea_priv->boxes[i] ); + } + PRIMGETPTR( dev_priv ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_SETUPADDRESS, + ((address + start) | + SETADD_mode_vertlist) ); + PRIMOUTREG( MGAREG_SETUPEND, + ((address + end) | use_agp) ); + PRIMADVANCE( dev_priv ); + } while (++i < sarea_priv->nbox); + } + if (buf_priv->discard) { + if (buf_priv->dispatched == 1) AGEBUF(dev_priv, buf_priv); + buf_priv->dispatched = 0; + mga_freelist_put(dev, buf); + } +} + + +static void mga_dma_dispatch_clear( drm_device_t *dev, int flags, + unsigned int clear_color, + unsigned int clear_zval ) +{ + drm_mga_private_t *dev_priv = dev->dev_private; + drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; + unsigned int *regs = sarea_priv->ContextState; + int nbox = sarea_priv->nbox; + drm_clip_rect_t *pbox = sarea_priv->boxes; + unsigned int cmd; + int i; + int primary_needed; + PRIMLOCALS; + DRM_DEBUG("%s\n", __FUNCTION__); + + if ( dev_priv->sgram ) + cmd = MGA_CLEAR_CMD | DC_atype_blk; + else + cmd = MGA_CLEAR_CMD | DC_atype_rstr; + + primary_needed = nbox * 70; + if (primary_needed == 0) primary_needed = 70; + PRIM_OVERFLOW( dev, dev_priv, primary_needed ); + PRIMGETPTR( dev_priv ); + + for (i = 0 ; i < nbox ; i++) { + unsigned int height = pbox[i].y2 - pbox[i].y1; + + DRM_DEBUG("dispatch clear %d,%d-%d,%d flags %x!\n", + pbox[i].x1, pbox[i].y1, pbox[i].x2, + pbox[i].y2, flags); + + if ( flags & MGA_FRONT ) { + DRM_DEBUG("clear front\n"); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_YDSTLEN, (pbox[i].y1<<16)|height); + PRIMOUTREG( MGAREG_FXBNDRY, (pbox[i].x2<<16)|pbox[i].x1); + + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_FCOL, clear_color ); + PRIMOUTREG( MGAREG_DSTORG, dev_priv->frontOffset ); + PRIMOUTREG( MGAREG_DWGCTL+MGAREG_MGA_EXEC, cmd ); + } + + if ( flags & MGA_BACK ) { + DRM_DEBUG("clear back\n"); + PRIMOUTREG( MGAREG_DMAPAD, 0); + PRIMOUTREG( MGAREG_DMAPAD, 0); + PRIMOUTREG( MGAREG_YDSTLEN, (pbox[i].y1<<16)|height ); + PRIMOUTREG( MGAREG_FXBNDRY, (pbox[i].x2<<16)|pbox[i].x1 ); + + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_FCOL, clear_color ); + PRIMOUTREG( MGAREG_DSTORG, dev_priv->backOffset ); + PRIMOUTREG( MGAREG_DWGCTL+MGAREG_MGA_EXEC, cmd ); + } + + if ( flags & MGA_DEPTH ) { + DRM_DEBUG("clear depth\n"); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_YDSTLEN, (pbox[i].y1<<16)|height ); + PRIMOUTREG( MGAREG_FXBNDRY, (pbox[i].x2<<16)|pbox[i].x1 ); + + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_FCOL, clear_zval ); + PRIMOUTREG( MGAREG_DSTORG, dev_priv->depthOffset ); + PRIMOUTREG( MGAREG_DWGCTL+MGAREG_MGA_EXEC, cmd ); + } + } + + /* Force reset of DWGCTL */ + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL] ); + PRIMADVANCE( dev_priv ); +} + +static void mga_dma_dispatch_swap( drm_device_t *dev ) +{ + drm_mga_private_t *dev_priv = dev->dev_private; + drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; + unsigned int *regs = sarea_priv->ContextState; + int nbox = sarea_priv->nbox; + drm_clip_rect_t *pbox = sarea_priv->boxes; + int i; + int primary_needed; + PRIMLOCALS; + DRM_DEBUG("%s\n", __FUNCTION__); + + primary_needed = nbox * 5; + primary_needed += 60; + PRIM_OVERFLOW(dev, dev_priv, primary_needed); + PRIMGETPTR( dev_priv ); + + PRIMOUTREG( MGAREG_DSTORG, dev_priv->frontOffset ); + PRIMOUTREG( MGAREG_MACCESS, dev_priv->mAccess ); + PRIMOUTREG( MGAREG_SRCORG, dev_priv->backOffset ); + PRIMOUTREG( MGAREG_AR5, dev_priv->stride/2 ); + + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DWGCTL, MGA_COPY_CMD ); + + for (i = 0 ; i < nbox; i++) { + unsigned int h = pbox[i].y2 - pbox[i].y1; + unsigned int start = pbox[i].y1 * dev_priv->stride/2; + + DRM_DEBUG("dispatch swap %d,%d-%d,%d!\n", + pbox[i].x1, pbox[i].y1, + pbox[i].x2, pbox[i].y2); + + PRIMOUTREG( MGAREG_AR0, start + pbox[i].x2 - 1 ); + PRIMOUTREG( MGAREG_AR3, start + pbox[i].x1 ); + PRIMOUTREG( MGAREG_FXBNDRY, pbox[i].x1|((pbox[i].x2 - 1)<<16) ); + PRIMOUTREG( MGAREG_YDSTLEN+MGAREG_MGA_EXEC, (pbox[i].y1<<16)|h ); + } + + /* Force reset of DWGCTL */ + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_DMAPAD, 0 ); + PRIMOUTREG( MGAREG_SRCORG, 0 ); + PRIMOUTREG( MGAREG_DWGCTL, regs[MGA_CTXREG_DWGCTL] ); + + PRIMADVANCE( dev_priv ); +} + +int mga_clear_bufs(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; + drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; + drm_mga_clear_t clear; + + copy_from_user_ret(&clear, (drm_mga_clear_t *)arg, sizeof(clear), + -EFAULT); + DRM_DEBUG("%s\n", __FUNCTION__); + + if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { + DRM_ERROR("mga_clear_bufs called without lock held\n"); + return -EINVAL; + } + + if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS) + sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS; + + /* Make sure we restore the 3D state next time. + */ + dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CTX; + mga_dma_dispatch_clear( dev, clear.flags, + clear.clear_color, + clear.clear_depth ); + PRIMUPDATE(dev_priv); + mga_flush_write_combine(); + mga_dma_schedule(dev, 1); + return 0; +} + +int mga_swap_bufs(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; + drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; + DRM_DEBUG("%s\n", __FUNCTION__); + + if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { + DRM_ERROR("mga_swap_bufs called without lock held\n"); + return -EINVAL; + } + + if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS) + sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS; + + /* Make sure we restore the 3D state next time. + */ + dev_priv->sarea_priv->dirty |= MGA_UPLOAD_CTX; + mga_dma_dispatch_swap( dev ); + PRIMUPDATE(dev_priv); + set_bit(MGA_BUF_SWAP_PENDING, &dev_priv->current_prim->buffer_status); + mga_flush_write_combine(); + mga_dma_schedule(dev, 1); + return 0; +} + +int mga_iload(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_device_dma_t *dma = dev->dma; + drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; + drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; + drm_buf_t *buf; + drm_mga_buf_priv_t *buf_priv; + drm_mga_iload_t iload; + unsigned long bus_address; + DRM_DEBUG("%s\n", __FUNCTION__); + + DRM_DEBUG("Starting Iload\n"); + copy_from_user_ret(&iload, (drm_mga_iload_t *)arg, sizeof(iload), + -EFAULT); + + if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { + DRM_ERROR("mga_iload called without lock held\n"); + return -EINVAL; + } + + buf = dma->buflist[ iload.idx ]; + buf_priv = buf->dev_private; + bus_address = buf->bus_address; + DRM_DEBUG("bus_address %lx, length %d, destorg : %x\n", + bus_address, iload.length, iload.destOrg); + + if(mgaVerifyIload(dev_priv, + bus_address, + iload.destOrg, + iload.length)) { + mga_freelist_put(dev, buf); + return -EINVAL; + } + + sarea_priv->dirty |= MGA_UPLOAD_CTX; + + mga_dma_dispatch_tex_blit(dev, bus_address, iload.length, + iload.destOrg); + AGEBUF(dev_priv, buf_priv); + buf_priv->discard = 1; + mga_freelist_put(dev, buf); + mga_flush_write_combine(); + mga_dma_schedule(dev, 1); + return 0; +} + +int mga_vertex(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; + drm_device_dma_t *dma = dev->dma; + drm_buf_t *buf; + drm_mga_buf_priv_t *buf_priv; + drm_mga_vertex_t vertex; + DRM_DEBUG("%s\n", __FUNCTION__); + + copy_from_user_ret(&vertex, (drm_mga_vertex_t *)arg, sizeof(vertex), + -EFAULT); + + if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { + DRM_ERROR("mga_vertex called without lock held\n"); + return -EINVAL; + } + + DRM_DEBUG("mga_vertex\n"); + + buf = dma->buflist[ vertex.idx ]; + buf_priv = buf->dev_private; + + buf->used = vertex.used; + buf_priv->discard = vertex.discard; + + if (!mgaVerifyState(dev_priv)) { + if (vertex.discard) { + if(buf_priv->dispatched == 1) AGEBUF(dev_priv, buf_priv); + buf_priv->dispatched = 0; + mga_freelist_put(dev, buf); + } + DRM_DEBUG("bad state\n"); + return -EINVAL; + } + + mga_dma_dispatch_vertex(dev, buf); + + PRIMUPDATE(dev_priv); + mga_flush_write_combine(); + mga_dma_schedule(dev, 1); + return 0; +} + + +int mga_indices(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private; + drm_device_dma_t *dma = dev->dma; + drm_buf_t *buf; + drm_mga_buf_priv_t *buf_priv; + drm_mga_indices_t indices; + DRM_DEBUG("%s\n", __FUNCTION__); + + copy_from_user_ret(&indices, (drm_mga_indices_t *)arg, sizeof(indices), + -EFAULT); + + if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { + DRM_ERROR("mga_indices called without lock held\n"); + return -EINVAL; + } + + DRM_DEBUG("mga_indices\n"); + + buf = dma->buflist[ indices.idx ]; + buf_priv = buf->dev_private; + + buf_priv->discard = indices.discard; + + if (!mgaVerifyState(dev_priv)) { + if (indices.discard) { + if(buf_priv->dispatched == 1) AGEBUF(dev_priv, buf_priv); + buf_priv->dispatched = 0; + mga_freelist_put(dev, buf); + } + return -EINVAL; + } + + mga_dma_dispatch_indices(dev, buf, indices.start, indices.end); + + PRIMUPDATE(dev_priv); + mga_flush_write_combine(); + mga_dma_schedule(dev, 1); + return 0; +} + + + +static int mga_dma_get_buffers(drm_device_t *dev, drm_dma_t *d) +{ + int i; + drm_buf_t *buf; + DRM_DEBUG("%s\n", __FUNCTION__); + + for (i = d->granted_count; i < d->request_count; i++) { + buf = mga_freelist_get(dev); + if (!buf) break; + buf->pid = current->pid; + copy_to_user_ret(&d->request_indices[i], + &buf->idx, + sizeof(buf->idx), + -EFAULT); + copy_to_user_ret(&d->request_sizes[i], + &buf->total, + sizeof(buf->total), + -EFAULT); + ++d->granted_count; + } + return 0; +} + +int mga_dma(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_device_dma_t *dma = dev->dma; + int retcode = 0; + drm_dma_t d; + DRM_DEBUG("%s\n", __FUNCTION__); + + copy_from_user_ret(&d, (drm_dma_t *)arg, sizeof(d), -EFAULT); + DRM_DEBUG("%d %d: %d send, %d req\n", + current->pid, d.context, d.send_count, d.request_count); + + if(!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { + DRM_ERROR("mga_dma called without lock held\n"); + return -EINVAL; + } + + /* Please don't send us buffers. + */ + if (d.send_count != 0) { + DRM_ERROR("Process %d trying to send %d buffers via drmDMA\n", + current->pid, d.send_count); + return -EINVAL; + } + + /* We'll send you buffers. + */ + if (d.request_count < 0 || d.request_count > dma->buf_count) { + DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n", + current->pid, d.request_count, dma->buf_count); + return -EINVAL; + } + + d.granted_count = 0; + + if (d.request_count) { + retcode = mga_dma_get_buffers(dev, &d); + } + + DRM_DEBUG("%d returning, granted = %d\n", + current->pid, d.granted_count); + copy_to_user_ret((drm_dma_t *)arg, &d, sizeof(d), -EFAULT); + return retcode; +} diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/proc.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/proc.c index 54aba58c4..392abceb9 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/proc.c +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/proc.c @@ -1,8 +1,7 @@ /* proc.c -- /proc support for DRM -*- linux-c -*- * Created: Mon Jan 11 09:48:47 1999 by faith@precisioninsight.com - * Revised: Sun Feb 13 23:41:04 2000 by kevin@precisioninsight.com * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. + * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a @@ -164,7 +163,10 @@ static int _drm_vm_info(char *buf, char **start, off_t offset, int len, { drm_device_t *dev = (drm_device_t *)data; drm_map_t *map; - const char *types[] = { "FB", "REG", "SHM" }; + /* Hardcoded from _DRM_FRAME_BUFFER, + _DRM_REGISTERS, _DRM_SHM, and + _DRM_AGP. */ + const char *types[] = { "FB", "REG", "SHM", "AGP" }; const char *type; int i; @@ -175,7 +177,7 @@ static int _drm_vm_info(char *buf, char **start, off_t offset, int len, "address mtrr\n\n"); for (i = 0; i < dev->map_count; i++) { map = dev->maplist[i]; - if (map->type < 0 || map->type > 2) type = "??"; + if (map->type < 0 || map->type > 3) type = "??"; else type = types[map->type]; DRM_PROC_PRINT("%4d 0x%08lx 0x%08lx %4.4s 0x%02x 0x%08lx ", i, @@ -397,6 +399,7 @@ static int _drm_vma_info(char *buf, char **start, off_t offset, int len, pgprot & _PAGE_GLOBAL ? 'g' : 'l' ); #endif DRM_PROC_PRINT("\n"); +#if 0 for (i = vma->vm_start; i < vma->vm_end; i += PAGE_SIZE) { pgd = pgd_offset(vma->vm_mm, i); pmd = pmd_offset(pgd, i); @@ -417,6 +420,7 @@ static int _drm_vma_info(char *buf, char **start, off_t offset, int len, DRM_PROC_PRINT(" 0x%08lx\n", i); } } +#endif } return len; diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_bufs.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_bufs.c new file mode 100644 index 000000000..bad6c5714 --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_bufs.c @@ -0,0 +1,309 @@ +/* r128_bufs.c -- IOCTLs to manage buffers -*- linux-c -*- + * Created: Wed Apr 12 16:19:08 2000 by kevin@precisioninsight.com + * + * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: Kevin E. Martin <kevin@precisioninsight.com> + * Rickard E. (Rik) Faith <faith@precisioninsight.com> + * Jeff Hartmann <jhartmann@precisioninsight.com> + * + * $XFree86$ + * + */ + +#define __NO_VERSION__ +#include "drmP.h" +#include "r128_drv.h" +#include "linux/un.h" + + +#ifdef DRM_AGP +int r128_addbufs_agp(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_device_dma_t *dma = dev->dma; + drm_buf_desc_t request; + drm_buf_entry_t *entry; + drm_buf_t *buf; + unsigned long offset; + unsigned long agp_offset; + int count; + int order; + int size; + int alignment; + int page_order; + int total; + int byte_count; + int i; + + if (!dma) return -EINVAL; + + copy_from_user_ret(&request, + (drm_buf_desc_t *)arg, + sizeof(request), + -EFAULT); + + count = request.count; + order = drm_order(request.size); + size = 1 << order; + + alignment = (request.flags & _DRM_PAGE_ALIGN) ? PAGE_ALIGN(size):size; + page_order = order - PAGE_SHIFT > 0 ? order - PAGE_SHIFT : 0; + total = PAGE_SIZE << page_order; + + byte_count = 0; + agp_offset = dev->agp->base + request.agp_start; + + DRM_DEBUG("count: %d\n", count); + DRM_DEBUG("order: %d\n", order); + DRM_DEBUG("size: %d\n", size); + DRM_DEBUG("agp_offset: %ld\n", agp_offset); + DRM_DEBUG("alignment: %d\n", alignment); + DRM_DEBUG("page_order: %d\n", page_order); + DRM_DEBUG("total: %d\n", total); + + if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER) return -EINVAL; + if (dev->queue_count) return -EBUSY; /* Not while in use */ + + spin_lock(&dev->count_lock); + if (dev->buf_use) { + spin_unlock(&dev->count_lock); + return -EBUSY; + } + atomic_inc(&dev->buf_alloc); + spin_unlock(&dev->count_lock); + + down(&dev->struct_sem); + entry = &dma->bufs[order]; + if (entry->buf_count) { + up(&dev->struct_sem); + atomic_dec(&dev->buf_alloc); + return -ENOMEM; /* May only call once for each order */ + } + + entry->buflist = drm_alloc(count * sizeof(*entry->buflist), + DRM_MEM_BUFS); + if (!entry->buflist) { + up(&dev->struct_sem); + atomic_dec(&dev->buf_alloc); + return -ENOMEM; + } + memset(entry->buflist, 0, count * sizeof(*entry->buflist)); + + entry->buf_size = size; + entry->page_order = page_order; + offset = 0; + + for (offset = 0; + entry->buf_count < count; + offset += alignment, ++entry->buf_count) { + buf = &entry->buflist[entry->buf_count]; + buf->idx = dma->buf_count + entry->buf_count; + buf->total = alignment; + buf->order = order; + buf->used = 0; + buf->offset = (dma->byte_count + offset); + buf->address = (void *)(agp_offset + offset); + buf->next = NULL; + buf->waiting = 0; + buf->pending = 0; + init_waitqueue_head(&buf->dma_wait); + buf->pid = 0; + + buf->dev_priv_size = sizeof(drm_r128_buf_priv_t); + buf->dev_private = drm_alloc(sizeof(drm_r128_buf_priv_t), + DRM_MEM_BUFS); + memset(buf->dev_private, 0, buf->dev_priv_size); + +#if DRM_DMA_HISTOGRAM + buf->time_queued = 0; + buf->time_dispatched = 0; + buf->time_completed = 0; + buf->time_freed = 0; +#endif + + byte_count += PAGE_SIZE << page_order; + + DRM_DEBUG("buffer %d @ %p\n", + entry->buf_count, buf->address); + } + + DRM_DEBUG("byte_count: %d\n", byte_count); + + dma->buflist = drm_realloc(dma->buflist, + dma->buf_count * sizeof(*dma->buflist), + (dma->buf_count + entry->buf_count) + * sizeof(*dma->buflist), + DRM_MEM_BUFS); + for (i = dma->buf_count; i < dma->buf_count + entry->buf_count; i++) + dma->buflist[i] = &entry->buflist[i - dma->buf_count]; + + dma->buf_count += entry->buf_count; + dma->byte_count += byte_count; + + drm_freelist_create(&entry->freelist, entry->buf_count); + for (i = 0; i < entry->buf_count; i++) { + drm_freelist_put(dev, &entry->freelist, &entry->buflist[i]); + } + + up(&dev->struct_sem); + + request.count = entry->buf_count; + request.size = size; + + copy_to_user_ret((drm_buf_desc_t *)arg, + &request, + sizeof(request), + -EFAULT); + + dma->flags = _DRM_DMA_USE_AGP; + + atomic_dec(&dev->buf_alloc); + return 0; +} +#endif + +int r128_addbufs(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_r128_private_t *dev_priv = dev->dev_private; + drm_buf_desc_t request; + + if (!dev_priv || dev_priv->is_pci) return -EINVAL; + + copy_from_user_ret(&request, + (drm_buf_desc_t *)arg, + sizeof(request), + -EFAULT); + +#ifdef DRM_AGP + if (request.flags & _DRM_AGP_BUFFER) + return r128_addbufs_agp(inode, filp, cmd, arg); + else +#endif + return -EINVAL; +} + +int r128_mapbufs(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_r128_private_t *dev_priv = dev->dev_private; + drm_device_dma_t *dma = dev->dma; + int retcode = 0; + const int zero = 0; + unsigned long virtual; + unsigned long address; + drm_buf_map_t request; + int i; + + if (!dma || !dev_priv || dev_priv->is_pci) return -EINVAL; + + DRM_DEBUG("\n"); + + spin_lock(&dev->count_lock); + if (atomic_read(&dev->buf_alloc)) { + spin_unlock(&dev->count_lock); + return -EBUSY; + } + ++dev->buf_use; /* Can't allocate more after this call */ + spin_unlock(&dev->count_lock); + + copy_from_user_ret(&request, + (drm_buf_map_t *)arg, + sizeof(request), + -EFAULT); + + if (request.count >= dma->buf_count) { + if (dma->flags & _DRM_DMA_USE_AGP) { + drm_map_t *map; + + map = dev_priv->agp_vertbufs; + if (!map) { + retcode = -EINVAL; + goto done; + } + + down(¤t->mm->mmap_sem); + virtual = do_mmap(filp, 0, map->size, + PROT_READ|PROT_WRITE, + MAP_SHARED, + (unsigned long)map->offset); + up(¤t->mm->mmap_sem); + } else { + down(¤t->mm->mmap_sem); + virtual = do_mmap(filp, 0, dma->byte_count, + PROT_READ|PROT_WRITE, MAP_SHARED, 0); + up(¤t->mm->mmap_sem); + } + if (virtual > -1024UL) { + /* Real error */ + retcode = (signed long)virtual; + goto done; + } + request.virtual = (void *)virtual; + + for (i = 0; i < dma->buf_count; i++) { + if (copy_to_user(&request.list[i].idx, + &dma->buflist[i]->idx, + sizeof(request.list[0].idx))) { + retcode = -EFAULT; + goto done; + } + if (copy_to_user(&request.list[i].total, + &dma->buflist[i]->total, + sizeof(request.list[0].total))) { + retcode = -EFAULT; + goto done; + } + if (copy_to_user(&request.list[i].used, + &zero, + sizeof(zero))) { + retcode = -EFAULT; + goto done; + } + address = virtual + dma->buflist[i]->offset; + if (copy_to_user(&request.list[i].address, + &address, + sizeof(address))) { + retcode = -EFAULT; + goto done; + } + } + } + done: + request.count = dma->buf_count; + DRM_DEBUG("%d buffers, retcode = %d\n", request.count, retcode); + + copy_to_user_ret((drm_buf_map_t *)arg, + &request, + sizeof(request), + -EFAULT); + + return retcode; +} diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_context.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_context.c new file mode 100644 index 000000000..d288fd284 --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_context.c @@ -0,0 +1,214 @@ +/* r128_context.c -- IOCTLs for r128 contexts -*- linux-c -*- + * Created: Mon Dec 13 09:51:35 1999 by faith@precisioninsight.com + * + * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Author: Rickard E. (Rik) Faith <faith@precisioninsight.com> + * + * $XFree86$ + * + */ + +#include <linux/sched.h> + +#define __NO_VERSION__ +#include "drmP.h" +#include "r128_drv.h" + +extern drm_ctx_t r128_res_ctx; + +static int r128_alloc_queue(drm_device_t *dev) +{ +#if 0 + static int context = 0; +#endif + + return drm_ctxbitmap_next(dev); +} + +int r128_context_switch(drm_device_t *dev, int old, int new) +{ + char buf[64]; + + atomic_inc(&dev->total_ctx); + + if (test_and_set_bit(0, &dev->context_flag)) { + DRM_ERROR("Reentering -- FIXME\n"); + return -EBUSY; + } + +#if DRM_DMA_HISTOGRAM + dev->ctx_start = get_cycles(); +#endif + + DRM_DEBUG("Context switch from %d to %d\n", old, new); + + if (new == dev->last_context) { + clear_bit(0, &dev->context_flag); + return 0; + } + + if (drm_flags & DRM_FLAG_NOCTX) { + r128_context_switch_complete(dev, new); + } else { + sprintf(buf, "C %d %d\n", old, new); + drm_write_string(dev, buf); + } + + return 0; +} + +int r128_context_switch_complete(drm_device_t *dev, int new) +{ + dev->last_context = new; /* PRE/POST: This is the _only_ writer. */ + dev->last_switch = jiffies; + + if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)) { + DRM_ERROR("Lock isn't held after context switch\n"); + } + + /* If a context switch is ever initiated + when the kernel holds the lock, release + that lock here. */ +#if DRM_DMA_HISTOGRAM + atomic_inc(&dev->histo.ctx[drm_histogram_slot(get_cycles() + - dev->ctx_start)]); + +#endif + clear_bit(0, &dev->context_flag); + wake_up(&dev->context_wait); + + return 0; +} + + +int r128_resctx(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_ctx_res_t res; + drm_ctx_t ctx; + int i; + + DRM_DEBUG("%d\n", DRM_RESERVED_CONTEXTS); + copy_from_user_ret(&res, (drm_ctx_res_t *)arg, sizeof(res), -EFAULT); + if (res.count >= DRM_RESERVED_CONTEXTS) { + memset(&ctx, 0, sizeof(ctx)); + for (i = 0; i < DRM_RESERVED_CONTEXTS; i++) { + ctx.handle = i; + copy_to_user_ret(&res.contexts[i], + &i, + sizeof(i), + -EFAULT); + } + } + res.count = DRM_RESERVED_CONTEXTS; + copy_to_user_ret((drm_ctx_res_t *)arg, &res, sizeof(res), -EFAULT); + return 0; +} + + +int r128_addctx(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_ctx_t ctx; + + copy_from_user_ret(&ctx, (drm_ctx_t *)arg, sizeof(ctx), -EFAULT); + if ((ctx.handle = r128_alloc_queue(dev)) == DRM_KERNEL_CONTEXT) { + /* Skip kernel's context and get a new one. */ + ctx.handle = r128_alloc_queue(dev); + } + DRM_DEBUG("%d\n", ctx.handle); + if (ctx.handle == -1) { + DRM_DEBUG("Not enough free contexts.\n"); + /* Should this return -EBUSY instead? */ + return -ENOMEM; + } + + copy_to_user_ret((drm_ctx_t *)arg, &ctx, sizeof(ctx), -EFAULT); + return 0; +} + +int r128_modctx(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_ctx_t ctx; + + copy_from_user_ret(&ctx, (drm_ctx_t*)arg, sizeof(ctx), -EFAULT); + if (ctx.flags==_DRM_CONTEXT_PRESERVED) + r128_res_ctx.handle=ctx.handle; + return 0; +} + +int r128_getctx(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_ctx_t ctx; + + copy_from_user_ret(&ctx, (drm_ctx_t*)arg, sizeof(ctx), -EFAULT); + /* This is 0, because we don't hanlde any context flags */ + ctx.flags = 0; + copy_to_user_ret((drm_ctx_t*)arg, &ctx, sizeof(ctx), -EFAULT); + return 0; +} + +int r128_switchctx(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_ctx_t ctx; + + copy_from_user_ret(&ctx, (drm_ctx_t *)arg, sizeof(ctx), -EFAULT); + DRM_DEBUG("%d\n", ctx.handle); + return r128_context_switch(dev, dev->last_context, ctx.handle); +} + +int r128_newctx(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_ctx_t ctx; + + copy_from_user_ret(&ctx, (drm_ctx_t *)arg, sizeof(ctx), -EFAULT); + DRM_DEBUG("%d\n", ctx.handle); + r128_context_switch_complete(dev, ctx.handle); + + return 0; +} + +int r128_rmctx(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_ctx_t ctx; + + copy_from_user_ret(&ctx, (drm_ctx_t *)arg, sizeof(ctx), -EFAULT); + DRM_DEBUG("%d\n", ctx.handle); + drm_ctxbitmap_free(dev, ctx.handle); + + return 0; +} diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_dma.c new file mode 100644 index 000000000..860c41885 --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_dma.c @@ -0,0 +1,908 @@ +/* r128_drv.c -- ATI Rage 128 driver -*- linux-c -*- + * Created: Wed Apr 5 19:24:19 2000 by kevin@precisioninsight.com + * + * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: Kevin E. Martin <kevin@precisioninsight.com> + * + * $XFree86$ + * + */ + +#define __NO_VERSION__ +#include "drmP.h" +#include "r128_drv.h" + +#include <linux/interrupt.h> /* For task queue support */ +#include <linux/delay.h> + + + +#define DO_REMAP(_m) (_m)->handle = drm_ioremap((_m)->offset, (_m)->size) + +#define DO_REMAPFREE(_m) \ + do { \ + if ((_m)->handle && (_m)->size) \ + drm_ioremapfree((_m)->handle, (_m)->size); \ + } while (0) + +#define DO_FIND_MAP(_m, _o) \ + do { \ + int _i; \ + for (_i = 0; _i < dev->map_count; _i++) { \ + if (dev->maplist[_i]->offset == _o) { \ + _m = dev->maplist[_i]; \ + break; \ + } \ + } \ + } while (0) + + +#define R128_MAX_VBUF_AGE 0x10000000 +#define R128_VB_AGE_REG R128_GUI_SCRATCH_REG0 + +int R128_READ_PLL(drm_device_t *dev, int addr) +{ + drm_r128_private_t *dev_priv = dev->dev_private; + + R128_WRITE8(R128_CLOCK_CNTL_INDEX, addr & 0x1f); + return R128_READ(R128_CLOCK_CNTL_DATA); +} + +static void r128_flush_write_combine(void) +{ + int xchangeDummy; + + __asm__ volatile("push %%eax ;" + "xchg %%eax, %0 ;" + "pop %%eax" : : "m" (xchangeDummy)); + __asm__ volatile("push %%eax ;" + "push %%ebx ;" + "push %%ecx ;" + "push %%edx ;" + "movl $0,%%eax ;" + "cpuid ;" + "pop %%edx ;" + "pop %%ecx ;" + "pop %%ebx ;" + "pop %%eax" : /* no outputs */ : /* no inputs */ ); +} + +static int r128_do_cleanup_cce(drm_device_t *dev) +{ + if (dev->dev_private) { + drm_r128_private_t *dev_priv = dev->dev_private; + + if (!dev_priv->is_pci) { + DO_REMAPFREE(dev_priv->agp_ring); + DO_REMAPFREE(dev_priv->agp_read_ptr); + DO_REMAPFREE(dev_priv->agp_vertbufs); + DO_REMAPFREE(dev_priv->agp_indbufs); + DO_REMAPFREE(dev_priv->agp_textures); + } + + drm_free(dev->dev_private, sizeof(drm_r128_private_t), + DRM_MEM_DRIVER); + dev->dev_private = NULL; + } + + return 0; +} + +static int r128_do_init_cce(drm_device_t *dev, drm_r128_init_t *init) +{ + drm_r128_private_t *dev_priv; + int i; + + dev_priv = drm_alloc(sizeof(drm_r128_private_t), DRM_MEM_DRIVER); + if (dev_priv == NULL) return -ENOMEM; + dev->dev_private = (void *)dev_priv; + + memset(dev_priv, 0, sizeof(drm_r128_private_t)); + + dev_priv->is_pci = init->is_pci; + + dev_priv->usec_timeout = init->usec_timeout; + if (dev_priv->usec_timeout < 1 || + dev_priv->usec_timeout > R128_MAX_USEC_TIMEOUT) { + drm_free(dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER); + dev->dev_private = NULL; + return -EINVAL; + } + + dev_priv->cce_mode = init->cce_mode; + dev_priv->cce_fifo_size = init->cce_fifo_size; + dev_priv->cce_is_bm_mode = + ((init->cce_mode == R128_PM4_192BM) || + (init->cce_mode == R128_PM4_128BM_64INDBM) || + (init->cce_mode == R128_PM4_64BM_128INDBM) || + (init->cce_mode == R128_PM4_64BM_64VCBM_64INDBM)); + dev_priv->cce_secure = init->cce_secure; + + if (dev_priv->cce_is_bm_mode && dev_priv->is_pci) { + drm_free(dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER); + dev->dev_private = NULL; + return -EINVAL; + } + + for (i = 0; i < dev->map_count; i++) { + if (dev->maplist[i]->type == _DRM_SHM) { + dev_priv->sarea = dev->maplist[i]; + break; + } + } + + DO_FIND_MAP(dev_priv->fb, init->fb_offset); + if (!dev_priv->is_pci) { + DO_FIND_MAP(dev_priv->agp_ring, init->agp_ring_offset); + DO_FIND_MAP(dev_priv->agp_read_ptr, init->agp_read_ptr_offset); + DO_FIND_MAP(dev_priv->agp_vertbufs, init->agp_vertbufs_offset); + DO_FIND_MAP(dev_priv->agp_indbufs, init->agp_indbufs_offset); + DO_FIND_MAP(dev_priv->agp_textures, init->agp_textures_offset); + } + DO_FIND_MAP(dev_priv->mmio, init->mmio_offset); + + dev_priv->sarea_priv = + (drm_r128_sarea_t *)((u8 *)dev_priv->sarea->handle + + init->sarea_priv_offset); + + if (!dev_priv->is_pci) { + DO_REMAP(dev_priv->agp_ring); + DO_REMAP(dev_priv->agp_read_ptr); + DO_REMAP(dev_priv->agp_vertbufs); +#if 0 + DO_REMAP(dev_priv->agp_indirectbufs); + DO_REMAP(dev_priv->agp_textures); +#endif + + dev_priv->ring_size = init->ring_size; + dev_priv->ring_sizel2qw = drm_order(init->ring_size/8); + dev_priv->ring_entries = init->ring_size/sizeof(u32); + dev_priv->ring_read_ptr = ((__volatile__ u32 *) + dev_priv->agp_read_ptr->handle); + dev_priv->ring_start = (u32 *)dev_priv->agp_ring->handle; + dev_priv->ring_end = ((u32 *)dev_priv->agp_ring->handle + + dev_priv->ring_entries); + } + + dev_priv->submit_age = 0; + R128_WRITE(R128_VB_AGE_REG, dev_priv->submit_age); + + return 0; +} + +int r128_init_cce(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_r128_init_t init; + + copy_from_user_ret(&init, (drm_r128_init_t *)arg, sizeof(init), + -EFAULT); + + switch (init.func) { + case R128_INIT_CCE: + return r128_do_init_cce(dev, &init); + case R128_CLEANUP_CCE: + return r128_do_cleanup_cce(dev); + } + + return -EINVAL; +} + +static void r128_mark_vertbufs_done(drm_device_t *dev) +{ + drm_device_dma_t *dma = dev->dma; + int i; + + for (i = 0; i < dma->buf_count; i++) { + drm_buf_t *buf = dma->buflist[i]; + drm_r128_buf_priv_t *buf_priv = buf->dev_private; + buf_priv->age = 0; + } +} + +static int r128_do_pixcache_flush(drm_device_t *dev) +{ + drm_r128_private_t *dev_priv = dev->dev_private; + u32 tmp; + int i; + + tmp = R128_READ(R128_PC_NGUI_CTLSTAT) | R128_PC_FLUSH_ALL; + R128_WRITE(R128_PC_NGUI_CTLSTAT, tmp); + + for (i = 0; i < dev_priv->usec_timeout; i++) { + if (!(R128_READ(R128_PC_NGUI_CTLSTAT) & R128_PC_BUSY)) + return 0; + udelay(1); + } + + return -EBUSY; +} + +static int r128_do_wait_for_fifo(drm_device_t *dev, int entries) +{ + drm_r128_private_t *dev_priv = dev->dev_private; + int i; + + for (i = 0; i < dev_priv->usec_timeout; i++) { + int slots = R128_READ(R128_GUI_STAT) & R128_GUI_FIFOCNT_MASK; + if (slots >= entries) return 0; + udelay(1); + } + return -EBUSY; +} + +static int r128_do_wait_for_idle(drm_device_t *dev) +{ + drm_r128_private_t *dev_priv = dev->dev_private; + int i, ret; + + if (!(ret = r128_do_wait_for_fifo(dev, 64))) return ret; + + for (i = 0; i < dev_priv->usec_timeout; i++) { + if (!(R128_READ(R128_GUI_STAT) & R128_GUI_ACTIVE)) { + (void)r128_do_pixcache_flush(dev); + return 0; + } + udelay(1); + } + return -EBUSY; +} + +int r128_do_engine_reset(drm_device_t *dev) +{ + drm_r128_private_t *dev_priv = dev->dev_private; + u32 clock_cntl_index, mclk_cntl, gen_reset_cntl; + + (void)r128_do_pixcache_flush(dev); + + clock_cntl_index = R128_READ(R128_CLOCK_CNTL_INDEX); + mclk_cntl = R128_READ_PLL(dev, R128_MCLK_CNTL); + + R128_WRITE_PLL(R128_MCLK_CNTL, + mclk_cntl | R128_FORCE_GCP | R128_FORCE_PIPE3D_CPP); + + gen_reset_cntl = R128_READ(R128_GEN_RESET_CNTL); + + R128_WRITE(R128_GEN_RESET_CNTL, gen_reset_cntl | R128_SOFT_RESET_GUI); + (void)R128_READ(R128_GEN_RESET_CNTL); + R128_WRITE(R128_GEN_RESET_CNTL, gen_reset_cntl & ~R128_SOFT_RESET_GUI); + (void)R128_READ(R128_GEN_RESET_CNTL); + + R128_WRITE_PLL(R128_MCLK_CNTL, mclk_cntl); + R128_WRITE(R128_CLOCK_CNTL_INDEX, clock_cntl_index); + R128_WRITE(R128_GEN_RESET_CNTL, gen_reset_cntl); + + /* For CCE ring buffer only */ + if (dev_priv->cce_is_bm_mode) { + R128_WRITE(R128_PM4_BUFFER_DL_WPTR, 0); + R128_WRITE(R128_PM4_BUFFER_DL_RPTR, 0); + *dev_priv->ring_read_ptr = 0; + dev_priv->sarea_priv->ring_write = 0; + } + + /* Reset the CCE mode */ + (void)r128_do_wait_for_idle(dev); + R128_WRITE(R128_PM4_BUFFER_CNTL, + dev_priv->cce_mode | dev_priv->ring_sizel2qw); + (void)R128_READ(R128_PM4_BUFFER_ADDR); /* as per the sample code */ + R128_WRITE(R128_PM4_MICRO_CNTL, R128_PM4_MICRO_FREERUN); + + r128_mark_vertbufs_done(dev); + return 0; +} + +int r128_eng_reset(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + + if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) || + dev->lock.pid != current->pid) { + DRM_ERROR("r128_eng_reset called without holding the lock\n"); + return -EINVAL; + } + + return r128_do_engine_reset(dev); +} + +static int r128_do_engine_flush(drm_device_t *dev) +{ + drm_r128_private_t *dev_priv = dev->dev_private; + u32 tmp; + + tmp = R128_READ(R128_PM4_BUFFER_DL_WPTR); + R128_WRITE(R128_PM4_BUFFER_DL_WPTR, tmp | R128_PM4_BUFFER_DL_DONE); + + return 0; +} + +int r128_eng_flush(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + + if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) || + dev->lock.pid != current->pid) { + DRM_ERROR("r128_eng_flush called without holding the lock\n"); + return -EINVAL; + } + + return r128_do_engine_flush(dev); +} + +static int r128_do_cce_wait_for_fifo(drm_device_t *dev, int entries) +{ + drm_r128_private_t *dev_priv = dev->dev_private; + int i; + + for (i = 0; i < dev_priv->usec_timeout; i++) { + int slots = R128_READ(R128_PM4_STAT) & R128_PM4_FIFOCNT_MASK; + if (slots >= entries) return 0; + udelay(1); + } + return -EBUSY; +} + +int r128_do_cce_wait_for_idle(drm_device_t *dev) +{ + drm_r128_private_t *dev_priv = dev->dev_private; + int i; + + if (dev_priv->cce_is_bm_mode) { + for (i = 0; i < dev_priv->usec_timeout; i++) { + if (*dev_priv->ring_read_ptr == dev_priv->sarea_priv->ring_write) { + int pm4stat = R128_READ(R128_PM4_STAT); + if ((pm4stat & R128_PM4_FIFOCNT_MASK) >= dev_priv->cce_fifo_size && + !(pm4stat & (R128_PM4_BUSY | R128_PM4_GUI_ACTIVE))) { + return r128_do_pixcache_flush(dev); + } + } + udelay(1); + } + return -EBUSY; + } else { + int ret = r128_do_cce_wait_for_fifo(dev, dev_priv->cce_fifo_size); + if (ret < 0) return ret; + + for (i = 0; i < dev_priv->usec_timeout; i++) { + int pm4stat = R128_READ(R128_PM4_STAT); + if (!(pm4stat & (R128_PM4_BUSY | R128_PM4_GUI_ACTIVE))) { + return r128_do_pixcache_flush(dev); + } + udelay(1); + } + return -EBUSY; + } +} + +int r128_cce_idle(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + + if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) || + dev->lock.pid != current->pid) { + DRM_ERROR("r128_wait_idle called without holding the lock\n"); + return -EINVAL; + } + + return r128_do_cce_wait_for_idle(dev); +} + +static int r128_submit_packets_ring_secure(drm_device_t *dev, + u32 *commands, int *count) +{ + drm_r128_private_t *dev_priv = dev->dev_private; + int write = dev_priv->sarea_priv->ring_write; + int *write_ptr = dev_priv->ring_start + write; + int c = *count; + u32 tmp = 0; + int psize = 0; + int writing = 1; + int timeout; + + while (c > 0) { + tmp = *commands++; + if (!psize) { + writing = 1; + + if ((tmp & R128_CCE_PACKET_MASK) == R128_CCE_PACKET0) { + if ((tmp & R128_CCE_PACKET0_REG_MASK) <= (0x1004 >> 2)) { + if ((tmp & R128_CCE_PACKET0_REG_MASK) != + (R128_PM4_VC_FPU_SETUP >> 2)) { + writing = 0; + } + } + psize = ((tmp & R128_CCE_PACKET_COUNT_MASK) >> 16) + 2; + } else if ((tmp & R128_CCE_PACKET_MASK) == R128_CCE_PACKET1) { + if ((tmp & R128_CCE_PACKET1_REG0_MASK) <= (0x1004 >> 2)) { + if ((tmp & R128_CCE_PACKET1_REG0_MASK) != + (R128_PM4_VC_FPU_SETUP >> 2)) { + writing = 0; + } + } else if ((tmp & R128_CCE_PACKET1_REG1_MASK) <= + (0x1004 << 9)) { + if ((tmp & R128_CCE_PACKET1_REG1_MASK) != + (R128_PM4_VC_FPU_SETUP << 9)) { + writing = 0; + } + } + psize = 3; + } else { + psize = ((tmp & R128_CCE_PACKET_COUNT_MASK) >> 16) + 2; + } + } + psize--; + + if (writing) { + write++; + *write_ptr++ = tmp; + } + if (write >= dev_priv->ring_entries) { + write = 0; + write_ptr = dev_priv->ring_start; + } + timeout = 0; + while (write == *dev_priv->ring_read_ptr) { + (void)R128_READ(R128_PM4_BUFFER_DL_RPTR); + if (timeout++ >= dev_priv->usec_timeout) + return -EBUSY; + udelay(1); + } + c--; + } + + if (write < 32) + memcpy(dev_priv->ring_end, + dev_priv->ring_start, + write * sizeof(u32)); + + /* Make sure WC cache has been flushed */ + r128_flush_write_combine(); + + dev_priv->sarea_priv->ring_write = write; + R128_WRITE(R128_PM4_BUFFER_DL_WPTR, write); + + *count = 0; + + return 0; +} + +static int r128_submit_packets_pio_secure(drm_device_t *dev, + u32 *commands, int *count) +{ + drm_r128_private_t *dev_priv = dev->dev_private; + u32 tmp = 0; + int psize = 0; + int writing = 1; + int addr = R128_PM4_FIFO_DATA_EVEN; + int ret; + + while (*count > 0) { + tmp = *commands++; + if (!psize) { + writing = 1; + + if ((tmp & R128_CCE_PACKET_MASK) == R128_CCE_PACKET0) { + if ((tmp & R128_CCE_PACKET0_REG_MASK) <= (0x1004 >> 2)) { + if ((tmp & R128_CCE_PACKET0_REG_MASK) != + (R128_PM4_VC_FPU_SETUP >> 2)) { + writing = 0; + } + } + psize = ((tmp & R128_CCE_PACKET_COUNT_MASK) >> 16) + 2; + } else if ((tmp & R128_CCE_PACKET_MASK) == R128_CCE_PACKET1) { + if ((tmp & R128_CCE_PACKET1_REG0_MASK) <= (0x1004 >> 2)) { + if ((tmp & R128_CCE_PACKET1_REG0_MASK) != + (R128_PM4_VC_FPU_SETUP >> 2)) { + writing = 0; + } + } else if ((tmp & R128_CCE_PACKET1_REG1_MASK) <= + (0x1004 << 9)) { + if ((tmp & R128_CCE_PACKET1_REG1_MASK) != + (R128_PM4_VC_FPU_SETUP << 9)) { + writing = 0; + } + } + psize = 3; + } else { + psize = ((tmp & R128_CCE_PACKET_COUNT_MASK) >> 16) + 2; + } + } + psize--; + + if (writing) { + if ((ret = r128_do_cce_wait_for_fifo(dev, 1)) < 0) + return ret; + R128_WRITE(addr, tmp); + addr ^= 0x0004; + } + + *count -= 1; + } + + if (addr == R128_PM4_FIFO_DATA_ODD) { + if ((ret = r128_do_cce_wait_for_fifo(dev, 1)) < 0) return ret; + R128_WRITE(addr, R128_CCE_PACKET2); + } + + return 0; +} + +static int r128_submit_packets_ring(drm_device_t *dev, + u32 *commands, int *count) +{ + drm_r128_private_t *dev_priv = dev->dev_private; + int write = dev_priv->sarea_priv->ring_write; + int *write_ptr = dev_priv->ring_start + write; + int c = *count; + int timeout; + + while (c > 0) { + write++; + *write_ptr++ = *commands++; + if (write >= dev_priv->ring_entries) { + write = 0; + write_ptr = dev_priv->ring_start; + } + timeout = 0; + while (write == *dev_priv->ring_read_ptr) { + (void)R128_READ(R128_PM4_BUFFER_DL_RPTR); + if (timeout++ >= dev_priv->usec_timeout) + return -EBUSY; + udelay(1); + } + c--; + } + + if (write < 32) + memcpy(dev_priv->ring_end, + dev_priv->ring_start, + write * sizeof(u32)); + + /* Make sure WC cache has been flushed */ + r128_flush_write_combine(); + + dev_priv->sarea_priv->ring_write = write; + R128_WRITE(R128_PM4_BUFFER_DL_WPTR, write); + + *count = 0; + + return 0; +} + +static int r128_submit_packets_pio(drm_device_t *dev, + u32 *commands, int *count) +{ + drm_r128_private_t *dev_priv = dev->dev_private; + int ret; + + while (*count > 1) { + if ((ret = r128_do_cce_wait_for_fifo(dev, 2)) < 0) return ret; + R128_WRITE(R128_PM4_FIFO_DATA_EVEN, *commands++); + R128_WRITE(R128_PM4_FIFO_DATA_ODD, *commands++); + *count -= 2; + } + + if (*count) { + if ((ret = r128_do_cce_wait_for_fifo(dev, 2)) < 0) return ret; + R128_WRITE(R128_PM4_FIFO_DATA_EVEN, *commands++); + R128_WRITE(R128_PM4_FIFO_DATA_ODD, R128_CCE_PACKET2); + *count = 0; + } + + return 0; +} + +static int r128_do_submit_packets(drm_device_t *dev, u32 *buffer, int count) +{ + drm_r128_private_t *dev_priv = dev->dev_private; + int c = count; + int ret; + + if (dev_priv->cce_is_bm_mode) { + int left = 0; + + if (c >= dev_priv->ring_entries) { + c = dev_priv->ring_entries-1; + left = count - c; + } + + /* Since this is only used by the kernel we can use the + insecure ring buffer submit packet routine */ + ret = r128_submit_packets_ring(dev, buffer, &c); + + c += left; + } else { + /* Since this is only used by the kernel we can use the + insecure PIO submit packet routine */ + ret = r128_submit_packets_pio(dev, buffer, &c); + } + + if (ret < 0) return ret; + else return c; +} + +int r128_submit_pkt(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_r128_private_t *dev_priv = dev->dev_private; + drm_r128_packet_t packet; + u32 *buffer; + int c; + int size; + int ret = 0; + + if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) || + dev->lock.pid != current->pid) { + DRM_ERROR("r128_submit_pkt called without holding the lock\n"); + return -EINVAL; + } + + copy_from_user_ret(&packet, (drm_r128_packet_t *)arg, sizeof(packet), + -EFAULT); + + c = packet.count; + size = c * sizeof(*buffer); + + if (dev_priv->cce_is_bm_mode) { + int left = 0; + + if (c >= dev_priv->ring_entries) { + c = dev_priv->ring_entries-1; + size = c * sizeof(*buffer); + left = packet.count - c; + } + + if ((buffer = kmalloc(size, 0)) == NULL) return -ENOMEM; + copy_from_user_ret(buffer, packet.buffer, size, -EFAULT); + + if (dev_priv->cce_secure) + ret = r128_submit_packets_ring_secure(dev, buffer, &c); + else + ret = r128_submit_packets_ring(dev, buffer, &c); + + c += left; + } else { + if ((buffer = kmalloc(size, 0)) == NULL) return -ENOMEM; + copy_from_user_ret(buffer, packet.buffer, size, -EFAULT); + + if (dev_priv->cce_secure) + ret = r128_submit_packets_pio_secure(dev, buffer, &c); + else + ret = r128_submit_packets_pio(dev, buffer, &c); + } + + kfree(buffer); + + packet.count = c; + copy_to_user_ret((drm_r128_packet_t *)arg, &packet, sizeof(packet), + -EFAULT); + + if (ret) return ret; + else if (c > 0) return -EAGAIN; + + return 0; +} + +static int r128_send_vertbufs(drm_device_t *dev, drm_r128_vertex_t *v) +{ + drm_device_dma_t *dma = dev->dma; + drm_r128_private_t *dev_priv = dev->dev_private; + drm_r128_buf_priv_t *buf_priv; + drm_buf_t *buf; + int i, ret; + u32 cce[2]; + + /* Make sure we have valid data */ + for (i = 0; i < v->send_count; i++) { + int idx = v->send_indices[i]; + + if (idx < 0 || idx >= dma->buf_count) { + DRM_ERROR("Index %d (of %d max)\n", + idx, dma->buf_count - 1); + return -EINVAL; + } + buf = dma->buflist[idx]; + if (buf->pid != current->pid) { + DRM_ERROR("Process %d using buffer owned by %d\n", + current->pid, buf->pid); + return -EINVAL; + } + if (buf->pending) { + DRM_ERROR("Sending pending buffer:" + " buffer %d, offset %d\n", + v->send_indices[i], i); + return -EINVAL; + } + } + + /* Wait for idle, if we've wrapped to make sure that all pending + buffers have been processed */ + if (dev_priv->submit_age == R128_MAX_VBUF_AGE) { + if ((ret = r128_do_cce_wait_for_idle(dev)) < 0) return ret; + dev_priv->submit_age = 0; + r128_mark_vertbufs_done(dev); + } + + /* Make sure WC cache has been flushed (if in PIO mode) */ + if (!dev_priv->cce_is_bm_mode) r128_flush_write_combine(); + + /* FIXME: Add support for sending vertex buffer to the CCE here + instead of in client code. The v->prim holds the primitive + type that should be drawn. Loop over the list buffers in + send_indices[] and submit a packet for each VB. + + This will require us to loop over the clip rects here as + well, which implies that we extend the kernel driver to allow + cliprects to be stored here. Note that the cliprects could + possibly come from the X server instead of the client, but + this will require additional changes to the DRI to allow for + this optimization. */ + + /* Submit a CCE packet that writes submit_age to R128_VB_AGE_REG */ + cce[0] = R128CCE0(R128_CCE_PACKET0, R128_VB_AGE_REG, 0); + cce[1] = dev_priv->submit_age; + if ((ret = r128_do_submit_packets(dev, cce, 2)) < 0) { + /* Until we add support for sending VBs to the CCE in + this routine, we can recover from this error. After + we add that support, we won't be able to easily + recover, so we will probably have to implement + another mechanism for handling timeouts from packets + submitted directly by the kernel. */ + return ret; + } + + /* Now that the submit packet request has succeeded, we can mark + the buffers as pending */ + for (i = 0; i < v->send_count; i++) { + buf = dma->buflist[v->send_indices[i]]; + buf->pending = 1; + + buf_priv = buf->dev_private; + buf_priv->age = dev_priv->submit_age; + } + + dev_priv->submit_age++; + + return 0; +} + +static drm_buf_t *r128_freelist_get(drm_device_t *dev) +{ + drm_device_dma_t *dma = dev->dma; + drm_r128_private_t *dev_priv = dev->dev_private; + drm_r128_buf_priv_t *buf_priv; + drm_buf_t *buf; + int i, t; + + /* FIXME: Optimize -- use freelist code */ + + for (i = 0; i < dma->buf_count; i++) { + buf = dma->buflist[i]; + buf_priv = buf->dev_private; + if (buf->pid == 0) return buf; + } + + for (t = 0; t < dev_priv->usec_timeout; t++) { + u32 done_age = R128_READ(R128_VB_AGE_REG); + + for (i = 0; i < dma->buf_count; i++) { + buf = dma->buflist[i]; + buf_priv = buf->dev_private; + if (buf->pending && buf_priv->age <= done_age) { + /* The buffer has been processed, so it + can now be used */ + buf->pending = 0; + return buf; + } + } + udelay(1); + } + + return NULL; +} + + +static int r128_get_vertbufs(drm_device_t *dev, drm_r128_vertex_t *v) +{ + drm_buf_t *buf; + int i; + + for (i = v->granted_count; i < v->request_count; i++) { + buf = r128_freelist_get(dev); + if (!buf) break; + buf->pid = current->pid; + copy_to_user_ret(&v->request_indices[i], + &buf->idx, + sizeof(buf->idx), + -EFAULT); + copy_to_user_ret(&v->request_sizes[i], + &buf->total, + sizeof(buf->total), + -EFAULT); + ++v->granted_count; + } + return 0; +} + +int r128_vertex_buf(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_r128_private_t *dev_priv = dev->dev_private; + drm_device_dma_t *dma = dev->dma; + int retcode = 0; + drm_r128_vertex_t v; + + if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) || + dev->lock.pid != current->pid) { + DRM_ERROR("r128_vertex_buf called without holding the lock\n"); + return -EINVAL; + } + + if (!dev_priv || dev_priv->is_pci) { + DRM_ERROR("r128_vertex_buf called with a PCI card\n"); + return -EINVAL; + } + + copy_from_user_ret(&v, (drm_r128_vertex_t *)arg, sizeof(v), -EFAULT); + DRM_DEBUG("%d: %d send, %d req\n", + current->pid, v.send_count, v.request_count); + + if (v.send_count < 0 || v.send_count > dma->buf_count) { + DRM_ERROR("Process %d trying to send %d buffers (of %d max)\n", + current->pid, v.send_count, dma->buf_count); + return -EINVAL; + } + if (v.request_count < 0 || v.request_count > dma->buf_count) { + DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n", + current->pid, v.request_count, dma->buf_count); + return -EINVAL; + } + + if (v.send_count) { + retcode = r128_send_vertbufs(dev, &v); + } + + v.granted_count = 0; + + if (!retcode && v.request_count) { + retcode = r128_get_vertbufs(dev, &v); + } + + DRM_DEBUG("%d returning, granted = %d\n", + current->pid, v.granted_count); + copy_to_user_ret((drm_r128_vertex_t *)arg, &v, sizeof(v), -EFAULT); + + return retcode; +} diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drm.h new file mode 100644 index 000000000..fa90d72db --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drm.h @@ -0,0 +1,111 @@ +/* r128_drm.h -- Public header for the r128 driver -*- linux-c -*- + * Created: Wed Apr 5 19:24:19 2000 by kevin@precisioninsight.com + * + * Copyright 2000 Precision Insight, Inc., Cedar Park, Texas. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: Kevin E. Martin <kevin@precisioninsight.com> + * + * $XFree86$ + */ + +#ifndef _R128_DRM_H_ +#define _R128_DRM_H_ + +/* WARNING: If you change any of these defines, make sure to change the + * defines in the Xserver file (xf86drmR128.h) + */ +typedef struct drm_r128_init { + enum { + R128_INIT_CCE = 0x01, + R128_CLEANUP_CCE = 0x02 + } func; + int sarea_priv_offset; + int is_pci; + int cce_mode; + int cce_fifo_size; + int cce_secure; + int ring_size; + int usec_timeout; + + int fb_offset; + int agp_ring_offset; + int agp_read_ptr_offset; + int agp_vertbufs_offset; + int agp_indbufs_offset; + int agp_textures_offset; + int mmio_offset; +} drm_r128_init_t; + +typedef struct drm_r128_packet { + unsigned long *buffer; + int count; + int flags; +} drm_r128_packet_t; + +typedef enum drm_r128_prim { + _DRM_R128_PRIM_NONE = 0x0001, + _DRM_R128_PRIM_POINT = 0x0002, + _DRM_R128_PRIM_LINE = 0x0004, + _DRM_R128_PRIM_POLY_LINE = 0x0008, + _DRM_R128_PRIM_TRI_LIST = 0x0010, + _DRM_R128_PRIM_TRI_FAN = 0x0020, + _DRM_R128_PRIM_TRI_STRIP = 0x0040, + _DRM_R128_PRIM_TRI_TYPE2 = 0x0080 +} drm_r128_prim_t; + +typedef struct drm_r128_vertex { + /* Indices here refer to the offset into + buflist in drm_buf_get_t. */ + int send_count; /* Number of buffers to send */ + int *send_indices; /* List of handles to buffers */ + int *send_sizes; /* Lengths of data to send */ + drm_r128_prim_t prim; /* Primitive type */ + int request_count; /* Number of buffers requested */ + int *request_indices; /* Buffer information */ + int *request_sizes; + int granted_count; /* Number of buffers granted */ +} drm_r128_vertex_t; + +/* WARNING: If you change any of these defines, make sure to change the + * defines in the Xserver file (r128_sarea.h) + */ +#define R128_LOCAL_TEX_HEAP 0 +#define R128_AGP_TEX_HEAP 1 +#define R128_NR_TEX_HEAPS 2 +#define R128_NR_TEX_REGIONS 64 +#define R128_LOG_TEX_GRANULARITY 16 + +typedef struct drm_tex_region { + unsigned char next, prev; + unsigned char in_use; + int age; +} drm_tex_region_t; + +typedef struct drm_r128_sarea { + drm_tex_region_t tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS+1]; + int tex_age[R128_NR_TEX_HEAPS]; + int ctx_owner; + int ring_write; +} drm_r128_sarea_t; + +#endif diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drv.c new file mode 100644 index 000000000..45ade1def --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drv.c @@ -0,0 +1,737 @@ +/* r128_drv.c -- ATI Rage 128 driver -*- linux-c -*- + * Created: Mon Dec 13 09:47:27 1999 by faith@precisioninsight.com + * + * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: Rickard E. (Rik) Faith <faith@precisioninsight.com> + * Kevin E. Martin <kevin@precisioninsight.com> + * + * $XFree86$ + * + */ + +#define EXPORT_SYMTAB +#include "drmP.h" +#include "r128_drv.h" +EXPORT_SYMBOL(r128_init); +EXPORT_SYMBOL(r128_cleanup); + +#define R128_NAME "r128" +#define R128_DESC "r128" +#define R128_DATE "20000422" +#define R128_MAJOR 0 +#define R128_MINOR 0 +#define R128_PATCHLEVEL 5 + +static drm_device_t r128_device; +drm_ctx_t r128_res_ctx; + +static struct file_operations r128_fops = { + open: r128_open, + flush: drm_flush, + release: r128_release, + ioctl: r128_ioctl, + mmap: drm_mmap, + read: drm_read, + fasync: drm_fasync, + poll: drm_poll, +}; + +static struct miscdevice r128_misc = { + minor: MISC_DYNAMIC_MINOR, + name: R128_NAME, + fops: &r128_fops, +}; + +static drm_ioctl_desc_t r128_ioctls[] = { + [DRM_IOCTL_NR(DRM_IOCTL_VERSION)] = { r128_version, 0, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)] = { drm_getunique, 0, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)] = { drm_getmagic, 0, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)] = { drm_irq_busid, 0, 1 }, + + [DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)] = { drm_setunique, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_BLOCK)] = { drm_block, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)] = { drm_unblock, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)] = { drm_authmagic, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)] = { drm_addmap, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)] = { r128_addbufs, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)] = { drm_markbufs, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)] = { drm_infobufs, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)] = { r128_mapbufs, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)] = { drm_freebufs, 1, 0 }, + + [DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)] = { r128_addctx, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)] = { r128_rmctx, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)] = { r128_modctx, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)] = { r128_getctx, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)] = { r128_switchctx, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)] = { r128_newctx, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)] = { r128_resctx, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)] = { drm_adddraw, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)] = { drm_rmdraw, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_LOCK)] = { r128_lock, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)] = { r128_unlock, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_FINISH)] = { drm_finish, 1, 0 }, + +#ifdef DRM_AGP + [DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)] = { drm_agp_acquire, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)] = { drm_agp_release, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)] = { drm_agp_enable, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)] = { drm_agp_info, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)] = { drm_agp_alloc, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)] = { drm_agp_free, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)] = { drm_agp_bind, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)] = { drm_agp_unbind, 1, 1 }, +#endif + + [DRM_IOCTL_NR(DRM_IOCTL_R128_INIT)] = { r128_init_cce, 1, 1 }, + [DRM_IOCTL_NR(DRM_IOCTL_R128_RESET)] = { r128_eng_reset, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_R128_FLUSH)] = { r128_eng_flush, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_R128_PACKET)] = { r128_submit_pkt, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_R128_CCEIDL)] = { r128_cce_idle, 1, 0 }, + [DRM_IOCTL_NR(DRM_IOCTL_R128_VERTEX)] = { r128_vertex_buf, 1, 0 }, +}; +#define R128_IOCTL_COUNT DRM_ARRAY_SIZE(r128_ioctls) + +#ifdef MODULE +int init_module(void); +void cleanup_module(void); +static char *r128 = NULL; + +MODULE_AUTHOR("Precision Insight, Inc., Cedar Park, Texas."); +MODULE_DESCRIPTION("r128"); +MODULE_PARM(r128, "s"); + +/* init_module is called when insmod is used to load the module */ + +int init_module(void) +{ + return r128_init(); +} + +/* cleanup_module is called when rmmod is used to unload the module */ + +void cleanup_module(void) +{ + r128_cleanup(); +} +#endif + +#ifndef MODULE +/* r128_setup is called by the kernel to parse command-line options passed + * via the boot-loader (e.g., LILO). It calls the insmod option routine, + * drm_parse_drm. + * + * This is not currently supported, since it requires changes to + * linux/init/main.c. */ + + +void __init r128_setup(char *str, int *ints) +{ + if (ints[0] != 0) { + DRM_ERROR("Illegal command line format, ignored\n"); + return; + } + drm_parse_options(str); +} +#endif + +static int r128_setup(drm_device_t *dev) +{ + int i; + + atomic_set(&dev->ioctl_count, 0); + atomic_set(&dev->vma_count, 0); + dev->buf_use = 0; + atomic_set(&dev->buf_alloc, 0); + + drm_dma_setup(dev); + + atomic_set(&dev->total_open, 0); + atomic_set(&dev->total_close, 0); + atomic_set(&dev->total_ioctl, 0); + atomic_set(&dev->total_irq, 0); + atomic_set(&dev->total_ctx, 0); + atomic_set(&dev->total_locks, 0); + atomic_set(&dev->total_unlocks, 0); + atomic_set(&dev->total_contends, 0); + atomic_set(&dev->total_sleeps, 0); + + for (i = 0; i < DRM_HASH_SIZE; i++) { + dev->magiclist[i].head = NULL; + dev->magiclist[i].tail = NULL; + } + dev->maplist = NULL; + dev->map_count = 0; + dev->vmalist = NULL; + dev->lock.hw_lock = NULL; + init_waitqueue_head(&dev->lock.lock_queue); + dev->queue_count = 0; + dev->queue_reserved = 0; + dev->queue_slots = 0; + dev->queuelist = NULL; + dev->irq = 0; + dev->context_flag = 0; + dev->interrupt_flag = 0; + dev->dma_flag = 0; + dev->last_context = 0; + dev->last_switch = 0; + dev->last_checked = 0; + init_timer(&dev->timer); + init_waitqueue_head(&dev->context_wait); + + dev->ctx_start = 0; + dev->lck_start = 0; + + dev->buf_rp = dev->buf; + dev->buf_wp = dev->buf; + dev->buf_end = dev->buf + DRM_BSZ; + dev->buf_async = NULL; + init_waitqueue_head(&dev->buf_readers); + init_waitqueue_head(&dev->buf_writers); + + r128_res_ctx.handle=-1; + + DRM_DEBUG("\n"); + + /* The kernel's context could be created here, but is now created + in drm_dma_enqueue. This is more resource-efficient for + hardware that does not do DMA, but may mean that + drm_select_queue fails between the time the interrupt is + initialized and the time the queues are initialized. */ + + return 0; +} + + +static int r128_takedown(drm_device_t *dev) +{ + int i; + drm_magic_entry_t *pt, *next; + drm_map_t *map; + drm_vma_entry_t *vma, *vma_next; + + DRM_DEBUG("\n"); + + down(&dev->struct_sem); + del_timer(&dev->timer); + + if (dev->devname) { + drm_free(dev->devname, strlen(dev->devname)+1, DRM_MEM_DRIVER); + dev->devname = NULL; + } + + if (dev->unique) { + drm_free(dev->unique, strlen(dev->unique)+1, DRM_MEM_DRIVER); + dev->unique = NULL; + dev->unique_len = 0; + } + /* Clear pid list */ + for (i = 0; i < DRM_HASH_SIZE; i++) { + for (pt = dev->magiclist[i].head; pt; pt = next) { + next = pt->next; + drm_free(pt, sizeof(*pt), DRM_MEM_MAGIC); + } + dev->magiclist[i].head = dev->magiclist[i].tail = NULL; + } + +#ifdef DRM_AGP + /* Clear AGP information */ + if (dev->agp) { + drm_agp_mem_t *entry; + drm_agp_mem_t *nexte; + + /* Remove AGP resources, but leave dev->agp + intact until r128_cleanup is called. */ + for (entry = dev->agp->memory; entry; entry = nexte) { + nexte = entry->next; + if (entry->bound) drm_unbind_agp(entry->memory); + drm_free_agp(entry->memory, entry->pages); + drm_free(entry, sizeof(*entry), DRM_MEM_AGPLISTS); + } + dev->agp->memory = NULL; + + if (dev->agp->acquired && drm_agp.release) + (*drm_agp.release)(); + + dev->agp->acquired = 0; + dev->agp->enabled = 0; + } +#endif + + /* Clear vma list (only built for debugging) */ + if (dev->vmalist) { + for (vma = dev->vmalist; vma; vma = vma_next) { + vma_next = vma->next; + drm_free(vma, sizeof(*vma), DRM_MEM_VMAS); + } + dev->vmalist = NULL; + } + + /* Clear map area and mtrr information */ + if (dev->maplist) { + for (i = 0; i < dev->map_count; i++) { + map = dev->maplist[i]; + switch (map->type) { + case _DRM_REGISTERS: + case _DRM_FRAME_BUFFER: +#ifdef CONFIG_MTRR + if (map->mtrr >= 0) { + int retcode; + retcode = mtrr_del(map->mtrr, + map->offset, + map->size); + DRM_DEBUG("mtrr_del = %d\n", retcode); + } +#endif + drm_ioremapfree(map->handle, map->size); + break; + case _DRM_SHM: + drm_free_pages((unsigned long)map->handle, + drm_order(map->size) + - PAGE_SHIFT, + DRM_MEM_SAREA); + break; + case _DRM_AGP: + /* Do nothing here, because this is all + handled in the AGP/GART driver. */ + break; + } + drm_free(map, sizeof(*map), DRM_MEM_MAPS); + } + drm_free(dev->maplist, + dev->map_count * sizeof(*dev->maplist), + DRM_MEM_MAPS); + dev->maplist = NULL; + dev->map_count = 0; + } + + drm_dma_takedown(dev); + + dev->queue_count = 0; + if (dev->lock.hw_lock) { + dev->lock.hw_lock = NULL; /* SHM removed */ + dev->lock.pid = 0; + wake_up_interruptible(&dev->lock.lock_queue); + } + up(&dev->struct_sem); + + return 0; +} + +/* r128_init is called via init_module at module load time, or via + * linux/init/main.c (this is not currently supported). */ + +int r128_init(void) +{ + int retcode; + drm_device_t *dev = &r128_device; + + DRM_DEBUG("\n"); + + memset((void *)dev, 0, sizeof(*dev)); + dev->count_lock = SPIN_LOCK_UNLOCKED; + sema_init(&dev->struct_sem, 1); + +#ifdef MODULE + drm_parse_options(r128); +#endif + + if ((retcode = misc_register(&r128_misc))) { + DRM_ERROR("Cannot register \"%s\"\n", R128_NAME); + return retcode; + } + dev->device = MKDEV(MISC_MAJOR, r128_misc.minor); + dev->name = R128_NAME; + + drm_mem_init(); + drm_proc_init(dev); + +#ifdef DRM_AGP + dev->agp = drm_agp_init(); + +#ifdef CONFIG_MTRR + dev->agp->agp_mtrr = mtrr_add(dev->agp->agp_info.aper_base, + dev->agp->agp_info.aper_size*1024*1024, + MTRR_TYPE_WRCOMB, + 1); +#endif +#endif + + if((retcode = drm_ctxbitmap_init(dev))) { + DRM_ERROR("Cannot allocate memory for context bitmap.\n"); + drm_proc_cleanup(); + misc_deregister(&r128_misc); + r128_takedown(dev); + return retcode; + } + + DRM_INFO("Initialized %s %d.%d.%d %s on minor %d\n", + R128_NAME, + R128_MAJOR, + R128_MINOR, + R128_PATCHLEVEL, + R128_DATE, + r128_misc.minor); + + return 0; +} + +/* r128_cleanup is called via cleanup_module at module unload time. */ + +void r128_cleanup(void) +{ + drm_device_t *dev = &r128_device; + + DRM_DEBUG("\n"); + + drm_proc_cleanup(); + if (misc_deregister(&r128_misc)) { + DRM_ERROR("Cannot unload module\n"); + } else { + DRM_INFO("Module unloaded\n"); + } + drm_ctxbitmap_cleanup(dev); + r128_takedown(dev); +#ifdef DRM_AGP + if (dev->agp) { + /* FIXME -- free other information, too */ + drm_free(dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS); + dev->agp = NULL; + } +#endif +} + +int r128_version(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_version_t version; + int len; + + copy_from_user_ret(&version, + (drm_version_t *)arg, + sizeof(version), + -EFAULT); + +#define DRM_COPY(name,value) \ + len = strlen(value); \ + if (len > name##_len) len = name##_len; \ + name##_len = strlen(value); \ + if (len && name) { \ + copy_to_user_ret(name, value, len, -EFAULT); \ + } + + version.version_major = R128_MAJOR; + version.version_minor = R128_MINOR; + version.version_patchlevel = R128_PATCHLEVEL; + + DRM_COPY(version.name, R128_NAME); + DRM_COPY(version.date, R128_DATE); + DRM_COPY(version.desc, R128_DESC); + + copy_to_user_ret((drm_version_t *)arg, + &version, + sizeof(version), + -EFAULT); + return 0; +} + +int r128_open(struct inode *inode, struct file *filp) +{ + drm_device_t *dev = &r128_device; + int retcode = 0; + + DRM_DEBUG("open_count = %d\n", dev->open_count); + if (!(retcode = drm_open_helper(inode, filp, dev))) { + MOD_INC_USE_COUNT; + atomic_inc(&dev->total_open); + spin_lock(&dev->count_lock); + if (!dev->open_count++) { + spin_unlock(&dev->count_lock); + return r128_setup(dev); + } + spin_unlock(&dev->count_lock); + } + return retcode; +} + +int r128_release(struct inode *inode, struct file *filp) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + int retcode = 0; + + DRM_DEBUG("open_count = %d\n", dev->open_count); + if (!(retcode = drm_release(inode, filp))) { + MOD_DEC_USE_COUNT; + atomic_inc(&dev->total_close); + spin_lock(&dev->count_lock); + if (!--dev->open_count) { + if (atomic_read(&dev->ioctl_count) || dev->blocked) { + DRM_ERROR("Device busy: %d %d\n", + atomic_read(&dev->ioctl_count), + dev->blocked); + spin_unlock(&dev->count_lock); + return -EBUSY; + } + spin_unlock(&dev->count_lock); + return r128_takedown(dev); + } + spin_unlock(&dev->count_lock); + } + return retcode; +} + +/* r128_ioctl is called whenever a process performs an ioctl on /dev/drm. */ + +int r128_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + int nr = DRM_IOCTL_NR(cmd); + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + int retcode = 0; + drm_ioctl_desc_t *ioctl; + drm_ioctl_t *func; + + atomic_inc(&dev->ioctl_count); + atomic_inc(&dev->total_ioctl); + ++priv->ioctl_count; + + DRM_DEBUG("pid = %d, cmd = 0x%02x, nr = 0x%02x, dev 0x%x, auth = %d\n", + current->pid, cmd, nr, dev->device, priv->authenticated); + + if (nr >= R128_IOCTL_COUNT) { + retcode = -EINVAL; + } else { + ioctl = &r128_ioctls[nr]; + func = ioctl->func; + + if (!func) { + DRM_DEBUG("no function\n"); + retcode = -EINVAL; + } else if ((ioctl->root_only && !capable(CAP_SYS_ADMIN)) + || (ioctl->auth_needed && !priv->authenticated)) { + retcode = -EACCES; + } else { + retcode = (func)(inode, filp, cmd, arg); + } + } + + atomic_dec(&dev->ioctl_count); + return retcode; +} + +int r128_lock(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + DECLARE_WAITQUEUE(entry, current); + int ret = 0; + drm_lock_t lock; +#if DRM_DMA_HISTOGRAM + cycles_t start; + + dev->lck_start = start = get_cycles(); +#endif + + copy_from_user_ret(&lock, (drm_lock_t *)arg, sizeof(lock), -EFAULT); + + if (lock.context == DRM_KERNEL_CONTEXT) { + DRM_ERROR("Process %d using kernel context %d\n", + current->pid, lock.context); + return -EINVAL; + } + + DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n", + lock.context, current->pid, dev->lock.hw_lock->lock, + lock.flags); + +#if 0 + /* dev->queue_count == 0 right now for + r128. FIXME? */ + if (lock.context < 0 || lock.context >= dev->queue_count) + return -EINVAL; +#endif + + if (!ret) { +#if 0 + if (_DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock) + != lock.context) { + long j = jiffies - dev->lock.lock_time; + + if (lock.context == r128_res_ctx.handle && + j >= 0 && j < DRM_LOCK_SLICE) { + /* Can't take lock if we just had it and + there is contention. */ + DRM_DEBUG("%d (pid %d) delayed j=%d dev=%d jiffies=%d\n", + lock.context, current->pid, j, + dev->lock.lock_time, jiffies); + current->state = TASK_INTERRUPTIBLE; + current->policy |= SCHED_YIELD; + schedule_timeout(DRM_LOCK_SLICE-j); + DRM_DEBUG("jiffies=%d\n", jiffies); + } + } +#endif + add_wait_queue(&dev->lock.lock_queue, &entry); + for (;;) { + if (!dev->lock.hw_lock) { + /* Device has been unregistered */ + ret = -EINTR; + break; + } + if (drm_lock_take(&dev->lock.hw_lock->lock, + lock.context)) { + dev->lock.pid = current->pid; + dev->lock.lock_time = jiffies; + atomic_inc(&dev->total_locks); + break; /* Got lock */ + } + + /* Contention */ + atomic_inc(&dev->total_sleeps); + current->state = TASK_INTERRUPTIBLE; +#if 1 + current->policy |= SCHED_YIELD; +#endif + schedule(); + if (signal_pending(current)) { + ret = -ERESTARTSYS; + break; + } + } + current->state = TASK_RUNNING; + remove_wait_queue(&dev->lock.lock_queue, &entry); + } + +#if 0 + if (!ret && dev->last_context != lock.context && + lock.context != r128_res_ctx.handle && + dev->last_context != r128_res_ctx.handle) { + add_wait_queue(&dev->context_wait, &entry); + current->state = TASK_INTERRUPTIBLE; + /* PRE: dev->last_context != lock.context */ + r128_context_switch(dev, dev->last_context, lock.context); + /* POST: we will wait for the context + switch and will dispatch on a later call + when dev->last_context == lock.context + NOTE WE HOLD THE LOCK THROUGHOUT THIS + TIME! */ + current->policy |= SCHED_YIELD; + schedule(); + current->state = TASK_RUNNING; + remove_wait_queue(&dev->context_wait, &entry); + if (signal_pending(current)) { + ret = -EINTR; + } else if (dev->last_context != lock.context) { + DRM_ERROR("Context mismatch: %d %d\n", + dev->last_context, lock.context); + } + } +#endif + + if (!ret) { + if (lock.flags & _DRM_LOCK_READY) { + /* Wait for space in DMA/FIFO */ + } + if (lock.flags & _DRM_LOCK_QUIESCENT) { + /* Make hardware quiescent */ +#if 0 + r128_quiescent(dev); +#endif + } + } + +#if 0 + DRM_ERROR("pid = %5d, old counter = %5ld\n", + current->pid, current->counter); +#endif + if (lock.context != r128_res_ctx.handle) { + current->counter = 5; + current->priority = DEF_PRIORITY/4; + } +#if 0 + while (current->counter > 25) + current->counter >>= 1; /* decrease time slice */ + DRM_ERROR("pid = %5d, new counter = %5ld\n", + current->pid, current->counter); +#endif + DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock"); + +#if DRM_DMA_HISTOGRAM + atomic_inc(&dev->histo.lacq[drm_histogram_slot(get_cycles() - start)]); +#endif + + return ret; +} + + +int r128_unlock(struct inode *inode, struct file *filp, unsigned int cmd, + unsigned long arg) +{ + drm_file_t *priv = filp->private_data; + drm_device_t *dev = priv->dev; + drm_lock_t lock; + + copy_from_user_ret(&lock, (drm_lock_t *)arg, sizeof(lock), -EFAULT); + + if (lock.context == DRM_KERNEL_CONTEXT) { + DRM_ERROR("Process %d using kernel context %d\n", + current->pid, lock.context); + return -EINVAL; + } + + DRM_DEBUG("%d frees lock (%d holds)\n", + lock.context, + _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock)); + atomic_inc(&dev->total_unlocks); + if (_DRM_LOCK_IS_CONT(dev->lock.hw_lock->lock)) + atomic_inc(&dev->total_contends); + drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT); + /* FIXME: Try to send data to card here */ + if (!dev->context_flag) { + if (drm_lock_free(dev, &dev->lock.hw_lock->lock, + DRM_KERNEL_CONTEXT)) { + DRM_ERROR("\n"); + } + } + +#if 0 + current->policy |= SCHED_YIELD; + current->state = TASK_INTERRUPTIBLE; + schedule_timeout(1000); +#endif + + if (lock.context != r128_res_ctx.handle) { + current->counter = 5; + current->priority = DEF_PRIORITY; + } +#if 0 + current->state = TASK_INTERRUPTIBLE; + schedule_timeout(10); +#endif + + return 0; +} diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drv.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drv.h new file mode 100644 index 000000000..3b888c493 --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drv.h @@ -0,0 +1,226 @@ +/* r128_drv.h -- Private header for r128 driver -*- linux-c -*- + * Created: Mon Dec 13 09:51:11 1999 by faith@precisioninsight.com + * + * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. + * All rights reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Authors: Rickard E. (Rik) Faith <faith@precisioninsight.com> + * Kevin E. Martin <kevin@precisioninsight.com> + * + * $XFree86$ + * + */ + +#ifndef _R128_DRV_H_ +#define _R128_DRV_H_ + +typedef struct drm_r128_private { + int is_pci; + + int cce_mode; + int cce_fifo_size; + int cce_is_bm_mode; + int cce_secure; + + drm_r128_sarea_t *sarea_priv; + + __volatile__ u32 *ring_read_ptr; + + u32 *ring_start; + u32 *ring_end; + int ring_size; + int ring_sizel2qw; + int ring_entries; + + int submit_age; + + int usec_timeout; + + drm_map_t *sarea; + drm_map_t *fb; + drm_map_t *agp_ring; + drm_map_t *agp_read_ptr; + drm_map_t *agp_vertbufs; + drm_map_t *agp_indbufs; + drm_map_t *agp_textures; + drm_map_t *mmio; +} drm_r128_private_t; + +typedef struct drm_r128_buf_priv { + u32 age; +} drm_r128_buf_priv_t; + + /* r128_drv.c */ +extern int r128_init(void); +extern void r128_cleanup(void); +extern int r128_version(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int r128_open(struct inode *inode, struct file *filp); +extern int r128_release(struct inode *inode, struct file *filp); +extern int r128_ioctl(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int r128_lock(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int r128_unlock(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); + + /* r128_dma.c */ +extern int r128_init_cce(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int r128_eng_reset(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int r128_eng_flush(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int r128_submit_pkt(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int r128_cce_idle(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int r128_vertex_buf(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); + + /* r128_bufs.c */ +extern int r128_addbufs(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int r128_mapbufs(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); + + /* r128_context.c */ +extern int r128_resctx(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int r128_addctx(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int r128_modctx(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int r128_getctx(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int r128_switchctx(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int r128_newctx(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); +extern int r128_rmctx(struct inode *inode, struct file *filp, + unsigned int cmd, unsigned long arg); + +extern int r128_context_switch(drm_device_t *dev, int old, int new); +extern int r128_context_switch_complete(drm_device_t *dev, int new); + + +/* Register definitions, register access macros and drmAddMap constants + * for Rage 128 kernel driver. + */ + +#define R128_PC_NGUI_CTLSTAT 0x0184 +# define R128_PC_FLUSH_ALL 0x00ff +# define R128_PC_BUSY (1 << 31) + +#define R128_CLOCK_CNTL_INDEX 0x0008 +#define R128_CLOCK_CNTL_DATA 0x000c +# define R128_PLL_WR_EN (1 << 7) + +#define R128_MCLK_CNTL 0x000f +# define R128_FORCE_GCP (1 << 16) +# define R128_FORCE_PIPE3D_CPP (1 << 17) + +#define R128_GEN_RESET_CNTL 0x00f0 +# define R128_SOFT_RESET_GUI (1 << 0) + +#define R128_PM4_BUFFER_CNTL 0x0704 +# define R128_PM4_NONPM4 (0 << 28) +# define R128_PM4_192PIO (1 << 28) +# define R128_PM4_192BM (2 << 28) +# define R128_PM4_128PIO_64INDBM (3 << 28) +# define R128_PM4_128BM_64INDBM (4 << 28) +# define R128_PM4_64PIO_128INDBM (5 << 28) +# define R128_PM4_64BM_128INDBM (6 << 28) +# define R128_PM4_64PIO_64VCBM_64INDBM (7 << 28) +# define R128_PM4_64BM_64VCBM_64INDBM (8 << 28) +# define R128_PM4_64PIO_64VCPIO_64INDPIO (15 << 28) + + +#define R128_PM4_BUFFER_DL_RPTR 0x0710 +#define R128_PM4_BUFFER_DL_WPTR 0x0714 +# define R128_PM4_BUFFER_DL_DONE (1 << 31) + +#define R128_PM4_VC_FPU_SETUP 0x071c + +#define R128_PM4_STAT 0x07b8 +# define R128_PM4_FIFOCNT_MASK 0x0fff +# define R128_PM4_BUSY (1 << 16) +# define R128_PM4_GUI_ACTIVE (1 << 31) + +#define R128_PM4_BUFFER_ADDR 0x07f0 +#define R128_PM4_MICRO_CNTL 0x07fc +# define R128_PM4_MICRO_FREERUN (1 << 30) + +#define R128_PM4_FIFO_DATA_EVEN 0x1000 +#define R128_PM4_FIFO_DATA_ODD 0x1004 + +#define R128_GUI_SCRATCH_REG0 0x15e0 +#define R128_GUI_SCRATCH_REG1 0x15e4 +#define R128_GUI_SCRATCH_REG2 0x15e8 +#define R128_GUI_SCRATCH_REG3 0x15ec +#define R128_GUI_SCRATCH_REG4 0x15f0 +#define R128_GUI_SCRATCH_REG5 0x15f4 + +#define R128_GUI_STAT 0x1740 +# define R128_GUI_FIFOCNT_MASK 0x0fff +# define R128_GUI_ACTIVE (1 << 31) + + +/* CCE command packets */ +#define R128_CCE_PACKET0 0x00000000 +#define R128_CCE_PACKET1 0x40000000 +#define R128_CCE_PACKET2 0x80000000 +# define R128_CCE_PACKET_MASK 0xC0000000 +# define R128_CCE_PACKET_COUNT_MASK 0x3fff0000 +# define R128_CCE_PACKET0_REG_MASK 0x000007ff +# define R128_CCE_PACKET1_REG0_MASK 0x000007ff +# define R128_CCE_PACKET1_REG1_MASK 0x003ff800 + + +#define R128_MAX_USEC_TIMEOUT 100000 /* 100 ms */ + + +#define R128_BASE(reg) ((u32)(dev_priv->mmio->handle)) +#define R128_ADDR(reg) (R128_BASE(reg) + reg) + +#define R128_DEREF(reg) *(__volatile__ int *)R128_ADDR(reg) +#define R128_READ(reg) R128_DEREF(reg) +#define R128_WRITE(reg,val) do { R128_DEREF(reg) = val; } while (0) + +#define R128_DEREF8(reg) *(__volatile__ char *)R128_ADDR(reg) +#define R128_READ8(reg) R128_DEREF8(reg) +#define R128_WRITE8(reg,val) do { R128_DEREF8(reg) = val; } while (0) + +#define R128_WRITE_PLL(addr,val) \ +do { \ + R128_WRITE8(R128_CLOCK_CNTL_INDEX, ((addr) & 0x1f) | R128_PLL_WR_EN); \ + R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \ +} while (0) + +extern int R128_READ_PLL(drm_device_t *dev, int addr); + +#define R128CCE0(p,r,n) ((p) | ((n) << 16) | ((r) >> 2)) +#define R128CCE1(p,r1,r2) ((p) | (((r2) >> 2) << 11) | ((r1) >> 2)) +#define R128CCE2(p) ((p)) +#define R128CCE3(p,n) ((p) | ((n) << 16)) + +#endif diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/vm.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/vm.c index 85470ac52..9c2cea56a 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/vm.c +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/vm.c @@ -1,8 +1,7 @@ /* vm.c -- Memory mapping for DRM -*- linux-c -*- * Created: Mon Jan 4 08:58:31 1999 by faith@precisioninsight.com - * Revised: Mon Feb 14 00:16:45 2000 by kevin@precisioninsight.com * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. + * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a @@ -246,13 +245,26 @@ int drm_mmap(struct file *filp, struct vm_area_struct *vma) /* Check for valid size. */ if (map->size != vma->vm_end - vma->vm_start) return -EINVAL; + if (!capable(CAP_SYS_ADMIN) && (map->flags & _DRM_READ_ONLY)) { + vma->vm_flags &= VM_MAYWRITE; +#if defined(__i386__) + pgprot_val(vma->vm_page_prot) &= ~_PAGE_RW; +#else + /* Ye gads this is ugly. With more thought + we could move this up higher and use + `protection_map' instead. */ + vma->vm_page_prot = __pgprot(pte_val(pte_wrprotect( + __pte(pgprot_val(vma->vm_page_prot))))); +#endif + } switch (map->type) { case _DRM_FRAME_BUFFER: case _DRM_REGISTERS: + case _DRM_AGP: if (VM_OFFSET(vma) >= __pa(high_memory)) { #if defined(__i386__) - if (boot_cpu_data.x86 > 3) { + if (boot_cpu_data.x86 > 3 && map->type != _DRM_AGP) { pgprot_val(vma->vm_page_prot) |= _PAGE_PCD; pgprot_val(vma->vm_page_prot) &= ~_PAGE_PWT; } @@ -264,6 +276,10 @@ int drm_mmap(struct file *filp, struct vm_area_struct *vma) vma->vm_end - vma->vm_start, vma->vm_page_prot)) return -EAGAIN; + DRM_DEBUG(" Type = %d; start = 0x%lx, end = 0x%lx," + " offset = 0x%lx\n", + map->type, + vma->vm_start, vma->vm_end, VM_OFFSET(vma)); vma->vm_ops = &drm_vm_ops; break; case _DRM_SHM: @@ -276,19 +292,7 @@ int drm_mmap(struct file *filp, struct vm_area_struct *vma) return -EINVAL; /* This should never happen. */ } vma->vm_flags |= VM_LOCKED | VM_SHM; /* Don't swap */ - if (map->flags & _DRM_READ_ONLY) { -#if defined(__i386__) - pgprot_val(vma->vm_page_prot) &= ~_PAGE_RW; -#else - /* Ye gads this is ugly. With more thought - we could move this up higher and use - `protection_map' instead. */ - vma->vm_page_prot = __pgprot(pte_val(pte_wrprotect( - __pte(pgprot_val(vma->vm_page_prot))))); -#endif - } - #if LINUX_VERSION_CODE < 0x020203 /* KERNEL_VERSION(2,2,3) */ /* In Linux 2.2.3 and above, this is handled in do_mmap() in mm/mmap.c. */ diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c index 3b0f98acd..2e3c9b431 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c @@ -1,8 +1,7 @@ /* xf86drm.c -- User-level interface to DRM device * Created: Tue Jan 5 08:16:21 1999 by faith@precisioninsight.com - * Revised: Sun Feb 13 23:43:32 2000 by kevin@precisioninsight.com * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. + * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a @@ -24,6 +23,8 @@ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * + * Author: Rickard E. (Rik) Faith <faith@precisioninsight.com> + * * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c,v 1.10 2000/02/23 04:47:23 martin Exp $ * */ @@ -143,7 +144,7 @@ static int drm_open(const char *file) return -errno; } -/* drmAvailable looks for /proc/drm, and returns 1 if it is present. */ +/* drmAvailable looks for /proc/dri, and returns 1 if it is present. */ int drmAvailable(void) { @@ -217,6 +218,20 @@ static int drmOpenByName(const char *name) group = xf86ConfigDRI.group ? xf86ConfigDRI.group : DRM_DEV_GID; #endif +#if defined(XFree86Server) + if (!drmAvailable()) { + /* try to load the kernel module now */ + if (!xf86LoadKernelModule(name)) { + ErrorF("[drm] failed to load kernel module \"%s\"\n", + name); + return -1; + } + } +#else + if (!drmAvailable()) + return -1; +#endif + if (!geteuid()) { dirmode = mode; if (dirmode & S_IRUSR) dirmode |= S_IXUSR; @@ -418,7 +433,8 @@ int drmAddMap(int fd, return 0; } -int drmAddBufs(int fd, int count, int size, int flags) +int drmAddBufs(int fd, int count, int size, drmBufDescFlags flags, + int agp_offset) { drm_buf_desc_t request; @@ -427,6 +443,8 @@ int drmAddBufs(int fd, int count, int size, int flags) request.low_mark = 0; request.high_mark = 0; request.flags = flags; + request.agp_start = agp_offset; + if (ioctl(fd, DRM_IOCTL_ADD_BUFS, &request)) return -errno; return request.count; } @@ -744,6 +762,143 @@ int drmDestroyDrawable(int fd, drmDrawable handle) return 0; } +int drmAgpAcquire(int fd) +{ + if (ioctl(fd, DRM_IOCTL_AGP_ACQUIRE, NULL)) return -errno; + return 0; +} + +int drmAgpRelease(int fd) +{ + if (ioctl(fd, DRM_IOCTL_AGP_RELEASE, NULL)) return -errno; + return 0; +} + +int drmAgpEnable(int fd, unsigned long mode) +{ + drm_agp_mode_t m; + + m.mode = mode; + if (ioctl(fd, DRM_IOCTL_AGP_ENABLE, &m)) return -errno; + return 0; +} + +int drmAgpAlloc(int fd, unsigned long size, unsigned long type, + unsigned long *address, unsigned long *handle) +{ + drm_agp_buffer_t b; + *handle = 0; + b.size = size; + b.handle = 0; + b.type = type; + if (ioctl(fd, DRM_IOCTL_AGP_ALLOC, &b)) return -errno; + if (address != 0UL) *address = b.physical; + *handle = b.handle; + return 0; +} + +int drmAgpFree(int fd, unsigned long handle) +{ + drm_agp_buffer_t b; + + b.size = 0; + b.handle = handle; + if (ioctl(fd, DRM_IOCTL_AGP_FREE, &b)) return -errno; + return 0; +} + +int drmAgpBind(int fd, unsigned long handle, unsigned long offset) +{ + drm_agp_binding_t b; + + b.handle = handle; + b.offset = offset; + if (ioctl(fd, DRM_IOCTL_AGP_BIND, &b)) return -errno; + return 0; +} + +int drmAgpUnbind(int fd, unsigned long handle) +{ + drm_agp_binding_t b; + + b.handle = handle; + b.offset = 0; + if (ioctl(fd, DRM_IOCTL_AGP_UNBIND, &b)) return -errno; + return 0; +} + +int drmAgpVersionMajor(int fd) +{ + drm_agp_info_t i; + + if (ioctl(fd, DRM_IOCTL_AGP_INFO, &i)) return -errno; + return i.agp_version_major; +} + +int drmAgpVersionMinor(int fd) +{ + drm_agp_info_t i; + + if (ioctl(fd, DRM_IOCTL_AGP_INFO, &i)) return -errno; + return i.agp_version_minor; +} + +unsigned long drmAgpGetMode(int fd) +{ + drm_agp_info_t i; + + if (ioctl(fd, DRM_IOCTL_AGP_INFO, &i)) return 0; + return i.mode; +} + +unsigned long drmAgpBase(int fd) +{ + drm_agp_info_t i; + + if (ioctl(fd, DRM_IOCTL_AGP_INFO, &i)) return 0; + return i.aperture_base; +} + +unsigned long drmAgpSize(int fd) +{ + drm_agp_info_t i; + + if (ioctl(fd, DRM_IOCTL_AGP_INFO, &i)) return 0; + return i.aperture_size; +} + +unsigned long drmAgpMemoryUsed(int fd) +{ + drm_agp_info_t i; + + if (ioctl(fd, DRM_IOCTL_AGP_INFO, &i)) return 0; + return i.memory_used; +} + +unsigned long drmAgpMemoryAvail(int fd) +{ + drm_agp_info_t i; + + if (ioctl(fd, DRM_IOCTL_AGP_INFO, &i)) return 0; + return i.memory_allowed; +} + +unsigned int drmAgpVendorId(int fd) +{ + drm_agp_info_t i; + + if (ioctl(fd, DRM_IOCTL_AGP_INFO, &i)) return 0; + return i.id_vendor; +} + +unsigned int drmAgpDeviceId(int fd) +{ + drm_agp_info_t i; + + if (ioctl(fd, DRM_IOCTL_AGP_INFO, &i)) return 0; + return i.id_device; +} + int drmError(int err, const char *label) { switch (err) { diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmI810.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmI810.c new file mode 100644 index 000000000..b2489eeed --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmI810.c @@ -0,0 +1,87 @@ +#ifdef XFree86Server +# include "xf86.h" +# include "xf86_OSproc.h" +# include "xf86_ansic.h" +# include "xf86Priv.h" +# define _DRM_MALLOC xalloc +# define _DRM_FREE xfree +# ifndef XFree86LOADER +# include <sys/stat.h> +# include <sys/mman.h> +# endif +#else +# include <stdio.h> +# include <stdlib.h> +# include <unistd.h> +# include <string.h> +# include <ctype.h> +# include <fcntl.h> +# include <errno.h> +# include <signal.h> +# include <sys/types.h> +# include <sys/stat.h> +# include <sys/ioctl.h> +# include <sys/mman.h> +# include <sys/time.h> +# ifdef DRM_USE_MALLOC +# define _DRM_MALLOC malloc +# define _DRM_FREE free +extern int xf86InstallSIGIOHandler(int fd, void (*f)(int, void *), void *); +extern int xf86RemoveSIGIOHandler(int fd); +# else +# include <Xlibint.h> +# define _DRM_MALLOC Xmalloc +# define _DRM_FREE Xfree +# endif +#endif + +/* Not all systems have MAP_FAILED defined */ +#ifndef MAP_FAILED +#define MAP_FAILED ((void *)-1) +#endif + +#include <sys/sysmacros.h> /* for makedev() */ +#include "xf86drm.h" +#include "xf86drmI810.h" +#include "drm.h" + +Bool drmI810CleanupDma(int driSubFD) +{ + drm_i810_init_t init; + + memset(&init, 0, sizeof(drm_i810_init_t)); + init.func = I810_CLEANUP_DMA; + + if(ioctl(driSubFD, DRM_IOCTL_I810_INIT, &init)) { + return FALSE; + } + + return TRUE; +} + +Bool drmI810InitDma(int driSubFD, drmI810Init *info) +{ + drm_i810_init_t init; + + memset(&init, 0, sizeof(drm_i810_init_t)); + + init.func = I810_INIT_DMA; + init.ring_map_idx = info->ring_map_idx; + init.buffer_map_idx = info->buffer_map_idx; + init.ring_start = info->start; + init.ring_end = info->end; + init.ring_size = info->size; + init.sarea_priv_offset = info->sarea_off; + init.front_offset = info->front_offset; + init.back_offset = info->back_offset; + init.depth_offset = info->depth_offset; + init.w = info->w; + init.h = info->h; + init.pitch = info->pitch; + init.pitch_bits = info->pitch_bits; + + if(ioctl(driSubFD, DRM_IOCTL_I810_INIT, &init)) { + return FALSE; + } + return TRUE; +} diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmR128.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmR128.c new file mode 100644 index 000000000..99f267f3d --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmR128.c @@ -0,0 +1,199 @@ +/* xf86drmR128.c -- User-level interface to Rage 128 DRM device + * Created: Sun Apr 9 18:13:54 2000 by kevin@precisioninsight.com + * + * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Author: Kevin E. Martin <kevin@precisioninsight.com> + * + * $XFree86$ + * + */ + +#ifdef XFree86Server +# include "xf86.h" +# include "xf86_OSproc.h" +# include "xf86_ansic.h" +# include "xf86Priv.h" +# define _DRM_MALLOC xalloc +# define _DRM_FREE xfree +# ifndef XFree86LOADER +# include <sys/stat.h> +# include <sys/mman.h> +# endif +#else +# include <stdio.h> +# include <stdlib.h> +# include <unistd.h> +# include <string.h> +# include <ctype.h> +# include <fcntl.h> +# include <errno.h> +# include <signal.h> +# include <sys/types.h> +# include <sys/stat.h> +# include <sys/ioctl.h> +# include <sys/mman.h> +# include <sys/time.h> +# ifdef DRM_USE_MALLOC +# define _DRM_MALLOC malloc +# define _DRM_FREE free +extern int xf86InstallSIGIOHandler(int fd, void (*f)(int, void *), void *); +extern int xf86RemoveSIGIOHandler(int fd); +# else +# include <Xlibint.h> +# define _DRM_MALLOC Xmalloc +# define _DRM_FREE Xfree +# endif +#endif + +/* Not all systems have MAP_FAILED defined */ +#ifndef MAP_FAILED +#define MAP_FAILED ((void *)-1) +#endif + +#include <sys/sysmacros.h> /* for makedev() */ +#include "xf86drm.h" +#include "xf86drmR128.h" +#include "drm.h" + +int drmR128InitCCE(int fd, drmR128Init *info) +{ + drm_r128_init_t init; + + memset(&init, 0, sizeof(drm_r128_init_t)); + + init.func = R128_INIT_CCE; + init.sarea_priv_offset = info->sarea_priv_offset; + init.is_pci = info->is_pci; + init.cce_mode = info->cce_mode; + init.cce_fifo_size = info->cce_fifo_size; + init.cce_secure = info->cce_secure; + init.ring_size = info->ring_size; + init.usec_timeout = info->usec_timeout; + + init.fb_offset = info->fb_offset; + init.agp_ring_offset = info->agp_ring_offset; + init.agp_read_ptr_offset = info->agp_read_ptr_offset; + init.agp_vertbufs_offset = info->agp_vertbufs_offset; + init.agp_indbufs_offset = info->agp_indbufs_offset; + init.agp_textures_offset = info->agp_textures_offset; + init.mmio_offset = info->mmio_offset; + + if (ioctl(fd, DRM_IOCTL_R128_INIT, &init)) return -errno; + + return 0; +} + +int drmR128CleanupCCE(int fd) +{ + drm_r128_init_t init; + + memset(&init, 0, sizeof(drm_r128_init_t)); + + init.func = R128_CLEANUP_CCE; + + if (ioctl(fd, DRM_IOCTL_R128_INIT, &init)) return -errno; + + return 0; +} + +int drmR128EngineReset(int fd) +{ + if (ioctl(fd, DRM_IOCTL_R128_RESET, NULL)) return -errno; + + return 0; +} + +int drmR128EngineFlush(int fd) +{ + if (ioctl(fd, DRM_IOCTL_R128_FLUSH, NULL)) return -errno; + + return 0; +} + +int drmR128CCEWaitForIdle(int fd) +{ + if (ioctl(fd, DRM_IOCTL_R128_CCEIDL, NULL)) return -errno; + + return 0; +} + +int drmR128SubmitPackets(int fd, CARD32 *buffer, int *count, int flags) +{ + drm_r128_packet_t packet; + int ret; + + memset(&packet, 0, sizeof(drm_r128_packet_t)); + + packet.count = *count; + packet.flags = flags; + + while (packet.count > 0) { + packet.buffer = buffer + (*count - packet.count); + ret = ioctl(fd, DRM_IOCTL_R128_PACKET, &packet); + if (ret < 0 && ret != -EAGAIN) { + *count = packet.count; + return -errno; + } + } + + *count = 0; + return 0; +} + +int drmR128GetVertexBuffers(int fd, int count, int *indices, int *sizes) +{ + drm_r128_vertex_t v; + + v.send_count = 0; + v.send_indices = NULL; + v.send_sizes = NULL; + v.prim = DRM_R128_PRIM_NONE; + v.request_count = count; + v.request_indices = indices; + v.request_sizes = sizes; + v.granted_count = 0; + + if (ioctl(fd, DRM_IOCTL_R128_VERTEX, &v)) return -errno; + + return v.granted_count; +} + +int drmR128FlushVertexBuffers(int fd, int count, int *indices, + int *sizes, drmR128PrimType prim) +{ + drm_r128_vertex_t v; + + v.send_count = count; + v.send_indices = indices; + v.send_sizes = sizes; + v.prim = prim; + v.request_count = 0; + v.request_indices = NULL; + v.request_sizes = NULL; + v.granted_count = 0; + + if (ioctl(fd, DRM_IOCTL_R128_VERTEX, &v) < 0) return -errno; + + return 0; +} diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h index 3af5d5b1e..c63d0f637 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h +++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h @@ -1,8 +1,7 @@ /* drm.h -- Header for Direct Rendering Manager -*- linux-c -*- * Created: Mon Jan 4 10:05:05 1999 by faith@precisioninsight.com - * Revised: Mon Feb 14 00:15:23 2000 by kevin@precisioninsight.com * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. + * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. * All rights reserved. * * Permission is hereby granted, free of charge, to any person obtaining a @@ -71,9 +70,10 @@ typedef struct drm_clip_rect { unsigned short y2; } drm_clip_rect_t; -/* Seperate include files for the i810/mga specific structures */ +/* Seperate include files for the i810/mga/r128 specific structures */ #include "mga_drm.h" #include "i810_drm.h" +#include "r128_drm.h" typedef struct drm_version { int version_major; /* Major version */ @@ -341,12 +341,23 @@ typedef struct drm_agp_info { #define DRM_IOCTL_MGA_ILOAD DRM_IOW( 0x43, drm_mga_iload_t) #define DRM_IOCTL_MGA_VERTEX DRM_IOW( 0x44, drm_mga_vertex_t) #define DRM_IOCTL_MGA_FLUSH DRM_IOW( 0x45, drm_lock_t ) +#define DRM_IOCTL_MGA_INDICES DRM_IOW( 0x46, drm_mga_indices_t) /* I810 specific ioctls */ #define DRM_IOCTL_I810_INIT DRM_IOW( 0x40, drm_i810_init_t) #define DRM_IOCTL_I810_VERTEX DRM_IOW( 0x41, drm_i810_vertex_t) -#define DRM_IOCTL_I810_DMA DRM_IOW( 0x42, drm_i810_general_t) +#define DRM_IOCTL_I810_CLEAR DRM_IOW( 0x42, drm_i810_clear_t) #define DRM_IOCTL_I810_FLUSH DRM_IO ( 0x43) #define DRM_IOCTL_I810_GETAGE DRM_IO ( 0x44) +#define DRM_IOCTL_I810_GETBUF DRM_IOW( 0x45, drm_i810_dma_t) +#define DRM_IOCTL_I810_SWAP DRM_IO ( 0x46) + +/* Rage 128 specific ioctls */ +#define DRM_IOCTL_R128_INIT DRM_IOW( 0x40, drm_r128_init_t) +#define DRM_IOCTL_R128_RESET DRM_IO( 0x41) +#define DRM_IOCTL_R128_FLUSH DRM_IO( 0x42) +#define DRM_IOCTL_R128_CCEIDL DRM_IO( 0x43) +#define DRM_IOCTL_R128_PACKET DRM_IOW( 0x44, drm_r128_packet_t) +#define DRM_IOCTL_R128_VERTEX DRM_IOW( 0x45, drm_r128_vertex_t) #endif diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h index 61287e3e2..372ba595e 100644 --- a/xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h +++ b/xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h @@ -1,8 +1,7 @@ /* xf86drm.h -- OS-independent header for DRM user-level library interface * Created: Tue Jan 5 08:17:23 1999 by faith@precisioninsight.com - * Revised: Sun Feb 13 23:46:21 2000 by kevin@precisioninsight.com * - * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. + * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a @@ -24,6 +23,8 @@ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. * + * Author: Rickard E. (Rik) Faith <faith@precisioninsight.com> + * * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h,v 1.7 2000/02/23 04:47:21 martin Exp $ * */ @@ -65,7 +66,8 @@ typedef struct _drmVersion { typedef enum { DRM_FRAME_BUFFER = 0, /* WC, no caching, no core dump */ DRM_REGISTERS = 1, /* no caching, no core dump */ - DRM_SHM = 2 /* shared, cached */ + DRM_SHM = 2, /* shared, cached */ + DRM_AGP = 3 /* AGP/GART */ } drmMapType; typedef enum { @@ -95,6 +97,11 @@ typedef enum { /* These values *MUST* match drm.h */ } drmDMAFlags; typedef enum { + DRM_PAGE_ALIGN = 0x01, + DRM_AGP_BUFFER = 0x02 +} drmBufDescFlags; + +typedef enum { DRM_LOCK_READY = 0x01, /* Wait until hardware is ready for DMA */ DRM_LOCK_QUIESCENT = 0x02, /* Wait until hardware quiescent */ DRM_LOCK_FLUSH = 0x04, /* Flush this context's DMA queue first */ @@ -196,7 +203,7 @@ typedef struct { unsigned int a[100]; } __drm_dummy_lock_t; #endif #ifndef DRM_CAS -#define DRM_CAS(lock,old,new,ret) /* FAST LOCK FAILS */ +#define DRM_CAS(lock,old,new,ret) do { ret=1; } while (0) /* FAST LOCK FAILS */ #endif #define DRM_LIGHT_LOCK(fd,lock,context) \ @@ -291,7 +298,9 @@ extern int drmAddMap(int fd, drmMapType type, drmMapFlags flags, drmHandlePtr handle); -extern int drmAddBufs(int fd, int count, int size, int flags); +extern int drmAddBufs(int fd, int count, int size, + drmBufDescFlags flags, + int agp_offset); extern int drmMarkBufs(int fd, double low, double high); extern int drmCreateContext(int fd, drmContextPtr handle); extern int drmSetContextFlags(int fd, drmContext context, @@ -332,6 +341,29 @@ extern int drmGetLock(int fd, extern int drmUnlock(int fd, drmContext context); extern int drmFinish(int fd, int context, drmLockFlags flags); +/* AGP/GART support: X server (root) only */ +extern int drmAgpAcquire(int fd); +extern int drmAgpRelease(int fd); +extern int drmAgpEnable(int fd, unsigned long mode); +extern int drmAgpAlloc(int fd, unsigned long size, + unsigned long type, unsigned long *address, + unsigned long *handle); +extern int drmAgpFree(int fd, unsigned long handle); +extern int drmAgpBind(int fd, unsigned long handle, + unsigned long offset); +extern int drmAgpUnbind(int fd, unsigned long handle); + +/* AGP/GART info: authenticated client and/or X */ +extern int drmAgpVersionMajor(int fd); +extern int drmAgpVersionMinor(int fd); +extern unsigned long drmAgpGetMode(int fd); +extern unsigned long drmAgpBase(int fd); /* Physical location */ +extern unsigned long drmAgpSize(int fd); /* Bytes */ +extern unsigned long drmAgpMemoryUsed(int fd); +extern unsigned long drmAgpMemoryAvail(int fd); +extern unsigned int drmAgpVendorId(int fd); +extern unsigned int drmAgpDeviceId(int fd); + /* Support routines */ extern int drmError(int err, const char *label); extern void *drmMalloc(int size); diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmI810.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86drmI810.h new file mode 100644 index 000000000..6c11b7a10 --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/os-support/xf86drmI810.h @@ -0,0 +1,46 @@ + +/* WARNING: If you change any of these defines, make sure to change + * the kernel include file as well (i810_drm.h) + */ + +#ifndef _XF86DRI_I810_H_ +#define _XF86DRI_I810_H_ + +#ifndef _I810_DEFINES_ +#define _I810_DEFINES_ +#define I810_USE_BATCH 1 + +#define I810_DMA_BUF_ORDER 12 +#define I810_DMA_BUF_SZ (1<<I810_DMA_BUF_ORDER) +#define I810_DMA_BUF_NR 256 + +#define I810_NR_SAREA_CLIPRECTS 8 + +/* Each region is a minimum of 64k, and there are at most 64 of them. + */ +#define I810_NR_TEX_REGIONS 64 +#define I810_LOG_MIN_TEX_REGION_SIZE 16 +#endif + +typedef struct _drmI810Init { + unsigned int start; + unsigned int end; + unsigned int size; + int ring_map_idx; + int buffer_map_idx; + int sarea_off; + + unsigned int front_offset; + unsigned int back_offset; + unsigned int depth_offset; + unsigned int w; + unsigned int h; + unsigned int pitch; + unsigned int pitch_bits; +} drmI810Init; + + +Bool drmI810CleanupDma(int driSubFD); +Bool drmI810InitDma(int driSubFD, drmI810Init *info ); + +#endif diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmMga.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86drmMga.h new file mode 100644 index 000000000..3b0e4a6fc --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/os-support/xf86drmMga.h @@ -0,0 +1,147 @@ + +/* WARNING: If you change any of these defines, make sure to change + * the kernel include file as well (mga_drm.h) + */ + +#ifndef _XF86DRI_MGA_H_ +#define _XF86DRI_MGA_H_ +#ifndef _MGA_DEFINES_ +#define _MGA_DEFINES_ +#define MGA_F 0x1 /* fog */ +#define MGA_A 0x2 /* alpha */ +#define MGA_S 0x4 /* specular */ +#define MGA_T2 0x8 /* multitexture */ + +#define MGA_WARP_TGZ 0 +#define MGA_WARP_TGZF (MGA_F) +#define MGA_WARP_TGZA (MGA_A) +#define MGA_WARP_TGZAF (MGA_F|MGA_A) +#define MGA_WARP_TGZS (MGA_S) +#define MGA_WARP_TGZSF (MGA_S|MGA_F) +#define MGA_WARP_TGZSA (MGA_S|MGA_A) +#define MGA_WARP_TGZSAF (MGA_S|MGA_F|MGA_A) +#define MGA_WARP_T2GZ (MGA_T2) +#define MGA_WARP_T2GZF (MGA_T2|MGA_F) +#define MGA_WARP_T2GZA (MGA_T2|MGA_A) +#define MGA_WARP_T2GZAF (MGA_T2|MGA_A|MGA_F) +#define MGA_WARP_T2GZS (MGA_T2|MGA_S) +#define MGA_WARP_T2GZSF (MGA_T2|MGA_S|MGA_F) +#define MGA_WARP_T2GZSA (MGA_T2|MGA_S|MGA_A) +#define MGA_WARP_T2GZSAF (MGA_T2|MGA_S|MGA_F|MGA_A) + +#define MGA_MAX_G400_PIPES 16 +#define MGA_MAX_G200_PIPES 8 /* no multitex */ + +#define MGA_MAX_WARP_PIPES MGA_MAX_G400_PIPES + +#define MGA_CARD_TYPE_G200 1 +#define MGA_CARD_TYPE_G400 2 +#define MGA_FRONT 0x1 +#define MGA_BACK 0x2 +#define MGA_DEPTH 0x4 + +/* 3d state excluding texture units: + */ +#define MGA_CTXREG_DSTORG 0 /* validated */ +#define MGA_CTXREG_MACCESS 1 +#define MGA_CTXREG_PLNWT 2 +#define MGA_CTXREG_DWGCTL 3 +#define MGA_CTXREG_ALPHACTRL 4 +#define MGA_CTXREG_FOGCOLOR 5 +#define MGA_CTXREG_WFLAG 6 +#define MGA_CTXREG_TDUAL0 7 +#define MGA_CTXREG_TDUAL1 8 +#define MGA_CTXREG_FCOL 9 +#define MGA_CTX_SETUP_SIZE 10 + +/* 2d state + */ +#define MGA_2DREG_PITCH 0 +#define MGA_2D_SETUP_SIZE 1 + +/* Each texture unit has a state: + */ +#define MGA_TEXREG_CTL 0 +#define MGA_TEXREG_CTL2 1 +#define MGA_TEXREG_FILTER 2 +#define MGA_TEXREG_BORDERCOL 3 +#define MGA_TEXREG_ORG 4 /* validated */ +#define MGA_TEXREG_ORG1 5 +#define MGA_TEXREG_ORG2 6 +#define MGA_TEXREG_ORG3 7 +#define MGA_TEXREG_ORG4 8 +#define MGA_TEXREG_WIDTH 9 +#define MGA_TEXREG_HEIGHT 10 +#define MGA_TEX_SETUP_SIZE 11 + +/* What needs to be changed for the current vertex dma buffer? + */ +#define MGA_UPLOAD_CTX 0x1 +#define MGA_UPLOAD_TEX0 0x2 +#define MGA_UPLOAD_TEX1 0x4 +#define MGA_UPLOAD_PIPE 0x8 +#define MGA_UPLOAD_TEX0IMAGE 0x10 +#define MGA_UPLOAD_TEX1IMAGE 0x20 +#define MGA_UPLOAD_2D 0x40 +#define MGA_WAIT_AGE 0x80 /* handled client-side */ +#define MGA_UPLOAD_CLIPRECTS 0x100 /* handled client-side */ +#define MGA_DMA_FLUSH 0x200 /* set when someone gets the lock + quiescent */ + +/* 32 buffers of 64k each, total 1 meg. + */ +#define MGA_DMA_BUF_ORDER 16 +#define MGA_DMA_BUF_SZ (1<<MGA_DMA_BUF_ORDER) +#define MGA_DMA_BUF_NR 31 + +/* Keep these small for testing. + */ +#define MGA_NR_SAREA_CLIPRECTS 8 + +/* 2 heaps (1 for card, 1 for agp), each divided into upto 128 + * regions, subject to a minimum region size of (1<<16) == 64k. + * + * Clients may subdivide regions internally, but when sharing between + * clients, the region size is the minimum granularity. + */ + +#define MGA_CARD_HEAP 0 +#define MGA_AGP_HEAP 1 +#define MGA_NR_TEX_HEAPS 2 +#define MGA_NR_TEX_REGIONS 16 +#define MGA_LOG_MIN_TEX_REGION_SIZE 16 +#endif + +typedef struct _drmMgaWarpIndex { + int installed; + unsigned long phys_addr; + int size; +} drmMgaWarpIndex; + +typedef struct _drmMgaInit { + int reserved_map_agpstart; + int reserved_map_idx; + int buffer_map_idx; + int sarea_priv_offset; + int primary_size; + int warp_ucode_size; + unsigned int frontOffset; + unsigned int backOffset; + unsigned int depthOffset; + unsigned int textureOffset; + unsigned int textureSize; + unsigned int agpTextureSize; + unsigned int agpTextureOffset; + unsigned int cpp; + unsigned int stride; + int sgram; + int chipset; + drmMgaWarpIndex WarpIndex[MGA_MAX_WARP_PIPES]; + unsigned int mAccess; +} drmMgaInit; + + +Bool drmMgaCleanupDma(int driSubFD); +Bool drmMgaLockUpdate(int driSubFD, drmLockFlags flags); +Bool drmMgaInitDma(int driSubFD, drmMgaInit *info); +#endif diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmR128.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86drmR128.h new file mode 100644 index 000000000..46898a53c --- /dev/null +++ b/xc/programs/Xserver/hw/xfree86/os-support/xf86drmR128.h @@ -0,0 +1,80 @@ +/* xf86drm.h -- OS-independent header for DRM user-level library interface + * Created: Sun Apr 9 18:16:28 2000 by kevin@precisioninsight.com + * + * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas. + * All Rights Reserved. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the + * Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR + * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER + * DEALINGS IN THE SOFTWARE. + * + * Author: Kevin E. Martin <kevin@precisioninsight.com> + * + * $XFree86$ + * + */ + +#ifndef _XF86DRI_R128_H_ +#define _XF86DRI_R128_H_ + +/* WARNING: If you change any of these defines, make sure to change + * the kernel include file as well (r128_drm.h) + */ + +typedef struct _drmR128Init { + int sarea_priv_offset; + int is_pci; + int cce_mode; + int cce_fifo_size; + int cce_secure; + int ring_size; + int usec_timeout; + + int fb_offset; + int agp_ring_offset; + int agp_read_ptr_offset; + int agp_vertbufs_offset; + int agp_indbufs_offset; + int agp_textures_offset; + int mmio_offset; +} drmR128Init; + +typedef enum { + DRM_R128_PRIM_NONE = 0x0001, + DRM_R128_PRIM_POINT = 0x0002, + DRM_R128_PRIM_LINE = 0x0004, + DRM_R128_PRIM_POLY_LINE = 0x0008, + DRM_R128_PRIM_TRI_LIST = 0x0010, + DRM_R128_PRIM_TRI_FAN = 0x0020, + DRM_R128_PRIM_TRI_STRIP = 0x0040, + DRM_R128_PRIM_TRI_TYPE2 = 0x0080 +} drmR128PrimType; + + +extern int drmR128InitCCE(int fd, drmR128Init *info); +extern int drmR128CleanupCCE(int fd); +extern int drmR128EngineReset(int fd); +extern int drmR128EngineFlush(int fd); +extern int drmR128CCEWaitForIdle(int fd); +extern int drmR128SubmitPackets(int fd, CARD32 *buffer, int *count, int flags); +extern int drmR128GetVertexBuffers(int fd, int count, int *indices, + int *sizes); +extern int drmR128FlushVertexBuffers(int fd, int count, int *indices, + int *sizes, drmR128PrimType prim); + +#endif |