Age | Commit message (Expand) | Author | Files | Lines |
2016-05-19 | [mips][mips16] Fix ZERO is not a CPU16Regs register error from the machine ve... | Daniel Sanders | 1 | -1/+2 |
2016-05-18 | [mips] Restrict the creation of compact branches | Simon Dardis | 1 | -0/+52 |
2016-05-18 | [mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions and add CodeGe... | Zlatko Buljan | 1 | -0/+32 |
2016-05-17 | [mips] Compact branch policy control for MIPSR6 | Simon Dardis | 1 | -0/+28 |
2016-05-14 | [mips] Enable IAS by default for 32-bit MIPS targets (O32). | Daniel Sanders | 5 | -31/+91 |
2016-05-12 | Revert "[mips][microMIPS] Implement CFC*, CTC* and LDC* instructions" | Hrvoje Varga | 1 | -4/+0 |
2016-05-11 | [mips][microMIPS] Implement CFC*, CTC* and LDC* instructions | Hrvoje Varga | 1 | -0/+4 |
2016-05-09 | [mips][micromips] Make getPointerRegClass() result depend on the instruction. | Daniel Sanders | 1 | -1/+1 |
2016-05-06 | [mips][mips16] Use isUnconditionalBranch() in AnalyzeBranch() and constant is... | Daniel Sanders | 1 | -2/+8 |
2016-05-06 | [mips][fastisel] Conditional moves do not have implicit operands. | Daniel Sanders | 1 | -2/+2 |
2016-05-06 | [mips][microMIPS] Add CodeGen support for MUL* and DMUL* instructions | Zlatko Buljan | 1 | -0/+38 |
2016-05-04 | [mips][microMIPS] Add CodeGen support for microMIPSr6 ROTR and ROTRV and add ... | Zlatko Buljan | 1 | -0/+10 |
2016-05-04 | [mips] Remove -mattr=+n64 and fix indentation in tailcall.ll RUN lines. NFC. | Daniel Sanders | 1 | -5/+5 |
2016-05-03 | [mips][fastisel] ADJCALLSTACKUP has a second immediate operand. | Daniel Sanders | 2 | -6/+6 |
2016-04-29 | [mips][FastISel] A store is not a load. | Simon Dardis | 1 | -1/+1 |
2016-04-28 | [mips][atomics] Fix partword atomic binary operation implementation | Simon Dardis | 1 | -67/+90 |
2016-04-27 | [Mips] Add support for llvm.thread.pointer intrinsic. | Marcin Koscielnicki | 1 | -0/+12 |
2016-04-27 | [mips][microMIPS] Add CodeGen support for SUBU16, SUB, SUBU, DSUB and DSUBU i... | Zlatko Buljan | 1 | -37/+77 |
2016-04-27 | [mips][microMIPS] Add CodeGen support for SLL16, SRL16, SLL, SLLV, SRA, SRAV,... | Zlatko Buljan | 4 | -4/+112 |
2016-04-25 | [mips][microMIPS] Revert commit r267137 | Hrvoje Varga | 4 | -10/+2 |
2016-04-22 | [mips] Fix select patterns for MIPS64 | Simon Dardis | 1 | -0/+50 |
2016-04-22 | [mips][microMIPS] Implement SLT, SLTI, SLTIU, SLTU microMIPS32r6 instructions | Hrvoje Varga | 4 | -2/+10 |
2016-04-19 | [LLVM] Remove unwanted --check-prefix=CHECK from unit tests. NFC. | Mandeep Singh Grang | 1 | -1/+1 |
2016-04-14 | Summary: | Simon Dardis | 5 | -48/+54 |
2016-04-14 | [mips] Remove duplicate tests and add missing prefixes for *-LABEL checks. NFC. | Vasileios Kalintiris | 4 | -419/+119 |
2016-04-13 | [mips] Fix emitAtomicCmpSwapPartword to handle 64 bit pointers correctly | Zoran Jovanovic | 1 | -0/+17 |
2016-04-13 | [mips] Sign-extend i32 values truncated from previously zero-extended i32 val... | Vasileios Kalintiris | 3 | -4/+66 |
2016-04-13 | [mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, D... | Zlatko Buljan | 4 | -9/+558 |
2016-04-13 | [mips][microMIPS] Fix for "Cannot copy registers" assertion | Hrvoje Varga | 2 | -0/+50 |
2016-04-12 | Revert "[mips] MIPSR6 Compact branch aliases" | Simon Dardis | 5 | -54/+48 |
2016-04-12 | [mips] MIPSR6 Compact branch aliases | Simon Dardis | 5 | -48/+54 |
2016-04-11 | [mips] Make Static a default relocation model for MIPS codegen | Petar Jovanovic | 73 | -328/+333 |
2016-04-08 | Revert r265817 | Colin LeMahieu | 1 | -1/+1 |
2016-04-08 | [llvm-objdump] Printing hex instead of dec by default | Colin LeMahieu | 1 | -1/+1 |
2016-04-08 | [mips][microMIPS] Add CodeGen support for ADD, ADDIU*, ADDU* and DADD* instru... | Zlatko Buljan | 1 | -8/+317 |
2016-04-05 | Don't delete empty preheaders in CodeGenPrepare if it would create a critical... | Chuang-Yu Cheng | 2 | -10/+10 |
2016-04-05 | [mips] MIPSR6 Compact jump support | Simon Dardis | 5 | -75/+152 |
2016-04-02 | [mips][microMIPS] Revert commits r264245 and r264248. | Zoran Jovanovic | 7 | -567/+9 |
2016-03-28 | fix CHECK_DAG -> CHECK-DAG | Sanjay Patel | 2 | -4/+4 |
2016-03-24 | CodeGen: extend RHS when splitting ATOMIC_CMP_SWAP_WITH_SUCCESS. | Tim Northover | 1 | -2/+52 |
2016-03-24 | [mips][microMIPS] Add CodeGen support for DIV, MOD, DIVU, MODU, DDIV, DMOD, D... | Zlatko Buljan | 4 | -9/+558 |
2016-03-24 | [mips][microMIPS] Fix for "Cannot copy registers" assertion | Hrvoje Varga | 3 | -0/+9 |
2016-03-23 | [mips][microMIPS] Delay slot filler modifications | Hrvoje Varga | 1 | -0/+4 |
2016-03-14 | [mips] MIPS32R6 compact branch support | Daniel Sanders | 5 | -17/+197 |
2016-03-14 | [mips] Fix an issue with long double when function roundl is defined | Zlatko Buljan | 1 | -0/+44 |
2016-03-11 | [mips] MIPSR6 Instruction itineraries | Vasileios Kalintiris | 2 | -30/+30 |
2016-03-04 | [mips][microMIPS] Prevent usage of OR16_MMR6 instruction when code for microM... | Zoran Jovanovic | 1 | -12/+17 |
2016-03-01 | Revert "[mips] Promote the result of SETCC nodes to GPR width." | Vasileios Kalintiris | 9 | -243/+177 |
2016-03-01 | [mips] Promote the result of SETCC nodes to GPR width. | Vasileios Kalintiris | 9 | -177/+243 |
2016-02-29 | [mips] Do not use SLL for ANY_EXTEND nodes as the high bits are undefined. | Vasileios Kalintiris | 2 | -19/+20 |