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This is currently required to work around the lack of proper SMMU
support on Tegra. Ideally buffer objects could always be pinned to GART
and the SMMU will take care of mapping them to a linear I/O virtual
address range for importers.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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This patch courtesy of Alexandre Courbot (via IRC). An improved version
of this has been submitted upstream for review.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The number of pages can never be negative, so an unsigned type is
enough. This also matches the type of the n_pages argument of the
sg_alloc_table_from_pages() function.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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As of commit 064d5cd110f9 (regulator: core: Fix the init of DT defined
fixed regulators) the regulator core tries to query the current voltage
of a regulator when applying constraints. This exposes a bug in the
AS3722 regulator driver which fails to read the voltage of disabled
regulators. The reason is that the hardware is programmed to a selector
of 0, but none of the voltage tables include 0 as a valid selector. The
datasheets indicate that 0 is a valid selector when the regulators are
powered off.
To fix this, add a range including selector 0 to the voltage tables.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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This matches what other drivers do for equivalent IOCTLs.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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These IOCTLs can be used to set the tiling mode of a buffer object after
it has been allocated or imported.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Tegra124 supports a block-linear mode in addition to the regular pitch
linear and tiled modes. Add support for these by moving the internal
representation into a structure rather than a simple flag.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Commit febdbfe8a91c (arch: Prepare for smp_mb__{before,after}_atomic())
deprecated the smp_mb__{before,after}_{atomic,clear}_{dec,inc,bit}*()
functions in favour of the unified smp_mb__{before,after}_atomic().
While at it, convert the smb_mb__before_atomic()/clear_bit() pattern to
the more idiomatic clear_bit_unlock().
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Signed-off-by: Thierry Reding <treding@nvidia.com>
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Commit febdbfe8a91c (arch: Prepare for smp_mb__{before,after}_atomic())
deprecated the smp_mb__{before,after}_{atomic,clear}_{dec,inc,bit}*()
functions in favour of the unified smp_mb__{before,after}_atomic().
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The bridge fixup is not needed since the PCI core will enable I/O and
memory accesses as well as bus mastering on bridge devices by default.
Also disable the root port class fixup for device IDs 0x0e1c and 0xe1d
since those devices apparently don't exist.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Signed-off-by: Thierry Reding <treding@nvidia.com>
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Signed-off-by: Thierry Reding <treding@nvidia.com>
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The HDA controller can be used to play back audio via HDMI.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Turn on the HDA controller in Venice2, it is used for HDMI audio.
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add a device node for the HDA controller found on Tegra124.
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add the clocks used for HDMI audio played through the HDA controller.
Initialize the codec clock to 48Mhz and the HDA clock to 102MHz per
the TRM.
Signed-off-by: Dylan Reid <dgreid@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
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This commit introduces a generic device tree binding for IOMMU devices.
Only a very minimal subset is described here, but it is enough to cover
the requirements of both the Exynos System MMU and Tegra SMMU as
discussed here:
https://lkml.org/lkml/2014/4/27/346
Signed-off-by: Thierry Reding <treding@nvidia.com>
---
Changes in v2:
- add notes about "dma-ranges" property (drop note from commit message)
- document priorities of "iommus" property vs. "dma-ranges" property
- drop #iommu-cells in favour of #address-cells and #size-cells
- remove multiple-master device example
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Signed-off-by: Thierry Reding <treding@nvidia.com>
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Code should be indented using tabs rather than spaces (see CodingStyle)
and the canonical form to declare a constant static variable is using
"static const" rather than "const static". Fixes the following warnings
from checkpatch:
$ scripts/checkpatch.pl -f drivers/gpu/drm/drm_plane_helper.c
WARNING: storage class should be at the beginning of the declaration
#40: FILE: drivers/gpu/drm/drm_plane_helper.c:40:
+const static uint32_t safe_modeset_formats[] = {
WARNING: please, no spaces at the start of a line
#41: FILE: drivers/gpu/drm/drm_plane_helper.c:41:
+ DRM_FORMAT_XRGB8888,$
WARNING: please, no spaces at the start of a line
#42: FILE: drivers/gpu/drm/drm_plane_helper.c:42:
+ DRM_FORMAT_ARGB8888,$
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Rather than the sized uint32_t, use an unsized unsigned int to specify
the format count.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Include the drm_plane_helper.h header file to fix the following sparse
warnings:
CHECK drivers/gpu/drm/drm_plane_helper.c
drivers/gpu/drm/drm_plane_helper.c:102:5: warning: symbol 'drm_primary_helper_update' was not declared. Should it be static?
drivers/gpu/drm/drm_plane_helper.c:219:5: warning: symbol 'drm_primary_helper_disable' was not declared. Should it be static?
drivers/gpu/drm/drm_plane_helper.c:233:6: warning: symbol 'drm_primary_helper_destroy' was not declared. Should it be static?
drivers/gpu/drm/drm_plane_helper.c:241:30: warning: symbol 'drm_primary_helper_funcs' was not declared. Should it be static?
drivers/gpu/drm/drm_plane_helper.c:259:18: warning: symbol 'drm_primary_helper_create_plane' was not declared. Should it be static?
Doing that makes gcc complain as follows:
CC drivers/gpu/drm/drm_plane_helper.o
drivers/gpu/drm/drm_plane_helper.c:260:19: error: conflicting types for 'drm_primary_helper_create_plane'
struct drm_plane *drm_primary_helper_create_plane(struct drm_device *dev,
^
In file included from drivers/gpu/drm/drm_plane_helper.c:29:0:
include/drm/drm_plane_helper.h:42:19: note: previous declaration of 'drm_primary_helper_create_plane' was here
struct drm_plane *drm_primary_helper_create_plane(struct drm_device *dev,
^
drivers/gpu/drm/drm_plane_helper.c: In function 'drm_primary_helper_create_plane':
drivers/gpu/drm/drm_plane_helper.c:274:11: warning: assignment discards 'const' qualifier from pointer target type
formats = safe_modeset_formats;
^
In file included from include/linux/linkage.h:6:0,
from include/linux/kernel.h:6,
from include/drm/drmP.h:45,
from drivers/gpu/drm/drm_plane_helper.c:27:
drivers/gpu/drm/drm_plane_helper.c: At top level:
drivers/gpu/drm/drm_plane_helper.c:289:15: error: conflicting types for 'drm_primary_helper_create_plane'
EXPORT_SYMBOL(drm_primary_helper_create_plane);
^
include/linux/export.h:57:21: note: in definition of macro '__EXPORT_SYMBOL'
extern typeof(sym) sym; \
^
drivers/gpu/drm/drm_plane_helper.c:289:1: note: in expansion of macro 'EXPORT_SYMBOL'
EXPORT_SYMBOL(drm_primary_helper_create_plane);
^
In file included from drivers/gpu/drm/drm_plane_helper.c:29:0:
include/drm/drm_plane_helper.h:42:19: note: previous declaration of 'drm_primary_helper_create_plane' was here
struct drm_plane *drm_primary_helper_create_plane(struct drm_device *dev,
^
Which can easily be fixed by making the signatures of the implementation
and the prototype match.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Creating a blob property will always copy the input data so the data
that is passed in can be const.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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size_t is the standard type when dealing with sizes of all kinds. Use it
consistently when instantiating DRM blob properties.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Conflicts:
arch/arm/boot/dts/tegra124.dtsi
arch/arm/configs/tegra_defconfig
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Enable both PCIe ports, one of which is connected to an onboard ethernet
chip, whereas the other goes to a miniPCIe slot.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Assign lanes to the XUSB pads as used on the Jetson TK1.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Add the PCIe controller device tree node and hook up the PCIe PHY from
the XUSB pad controller.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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The device tree node in the SoC file contains only the resources (such
as registers, resets, ...) but none of the lane assignment information
since that's board specific and belongs in the board file.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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Signed-off-by: Thierry Reding <treding@nvidia.com>
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Signed-off-by: Thierry Reding <treding@nvidia.com>
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Signed-off-by: Thierry Reding <treding@nvidia.com>
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Signed-off-by: Thierry Reding <treding@nvidia.com>
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