diff options
author | Thierry Reding <treding@nvidia.com> | 2014-06-04 12:11:27 +0200 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2014-06-04 12:11:27 +0200 |
commit | 7afeeec07ea99fd3bac8d450b90a5b4c0de91ea2 (patch) | |
tree | b6b8caf5590c8707dc5fd142c71fc97e595f3365 | |
parent | 61fdd9a3b603f7cd4bd0dc19f229405139d345e3 (diff) | |
parent | 77a5b264a3b2b16cbe4cfacc96eda5764f154dca (diff) |
Merge branch 'staging/tegra' into staging/master
Conflicts:
arch/arm/boot/dts/tegra124.dtsi
arch/arm/configs/tegra_defconfig
-rw-r--r-- | arch/arm/boot/dts/tegra114-dalmore.dts | 21 | ||||
-rw-r--r-- | arch/arm/boot/dts/tegra114.dtsi | 24 | ||||
-rw-r--r-- | arch/arm/boot/dts/tegra124-jetson-tk1.dts | 50 | ||||
-rw-r--r-- | arch/arm/boot/dts/tegra124-venice2.dts | 2 | ||||
-rw-r--r-- | arch/arm/boot/dts/tegra124.dtsi | 125 | ||||
-rw-r--r-- | arch/arm/boot/dts/tegra20-harmony.dts | 3 | ||||
-rw-r--r-- | arch/arm/boot/dts/tegra20.dtsi | 35 | ||||
-rw-r--r-- | arch/arm/boot/dts/tegra30-cardhu-a02.dts | 10 | ||||
-rw-r--r-- | arch/arm/boot/dts/tegra30-cardhu-a04.dts | 10 | ||||
-rw-r--r-- | arch/arm/boot/dts/tegra30-cardhu.dtsi | 16 | ||||
-rw-r--r-- | arch/arm/boot/dts/tegra30.dtsi | 37 | ||||
-rw-r--r-- | arch/arm/configs/tegra_defconfig | 29 | ||||
-rw-r--r-- | drivers/clk/tegra/clk-pll.c | 6 | ||||
-rw-r--r-- | drivers/clk/tegra/clk-tegra124.c | 2 | ||||
-rw-r--r-- | include/dt-bindings/interrupt-controller/arm-gic.h | 2 |
15 files changed, 336 insertions, 36 deletions
diff --git a/arch/arm/boot/dts/tegra114-dalmore.dts b/arch/arm/boot/dts/tegra114-dalmore.dts index 5c21d216515..d31ebee407b 100644 --- a/arch/arm/boot/dts/tegra114-dalmore.dts +++ b/arch/arm/boot/dts/tegra114-dalmore.dts @@ -27,7 +27,7 @@ hdmi-supply = <&vdd_5v0_hdmi>; vdd-supply = <&vdd_hdmi_reg>; - pll-supply = <&palmas_smps3_reg>; + pll-supply = <&pll_hdmi_reg>; nvidia,ddc-i2c-bus = <&hdmi_ddc>; nvidia,hpd-gpio = @@ -892,7 +892,7 @@ palmas: tps65913@58 { compatible = "ti,palmas"; reg = <0x58>; - interrupts = <0 86 IRQ_TYPE_LEVEL_LOW>; + interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <2>; interrupt-controller; @@ -1026,7 +1026,7 @@ regulator-boot-on; }; - ldoln { + avdd_hdmi_reg: ldoln { regulator-name = "hvdd-usb"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; @@ -1135,6 +1135,8 @@ brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; + + backlight-boot-off; }; clocks { @@ -1233,7 +1235,7 @@ regulator-name = "vdd_hdmi_5v0"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; - vin-supply = <&tps65090_dcdc1_reg>; + vin-supply = <&avdd_hdmi_reg>; }; vdd_cam_1v8_reg: regulator@6 { @@ -1256,6 +1258,17 @@ enable-active-high; vin-supply = <&tps65090_dcdc1_reg>; }; + + pll_hdmi_reg: regulator@8 { + compatible = "regulator-fixed"; + reg = <8>; + regulator-name = "vdd_hdmi_pll"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + enable-active-high; + gpio = <&gpio TEGRA_GPIO(O, 1) GPIO_ACTIVE_HIGH>; + vin-supply = <&avdd_1v2_reg>; + }; }; sound { diff --git a/arch/arm/boot/dts/tegra114.dtsi b/arch/arm/boot/dts/tegra114.dtsi index fdc559ab2db..90982679c16 100644 --- a/arch/arm/boot/dts/tegra114.dtsi +++ b/arch/arm/boot/dts/tegra114.dtsi @@ -22,6 +22,7 @@ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */ clocks = <&tegra_car TEGRA114_CLK_HOST1X>; + clock-names = "host1x"; resets = <&tegra_car 28>; reset-names = "host1x"; @@ -35,6 +36,7 @@ reg = <0x54140000 0x00040000>; interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_GR2D>; + clock-names = "2d"; resets = <&tegra_car 21>; reset-names = "2d"; }; @@ -43,6 +45,7 @@ compatible = "nvidia,tegra114-gr3d", "nvidia,tegra20-gr3d"; reg = <0x54180000 0x00040000>; clocks = <&tegra_car TEGRA114_CLK_GR3D>; + clock-names = "3d"; resets = <&tegra_car 24>; reset-names = "3d"; }; @@ -148,6 +151,7 @@ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_TIMER>; + clock-names = "timer"; }; tegra_car: clock@60006000 { @@ -193,6 +197,7 @@ <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_APBDMA>; + clock-names = "dma"; resets = <&tegra_car 34>; reset-names = "dma"; #dma-cells = <1>; @@ -240,6 +245,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_UARTA>; + clock-names = "serial"; resets = <&tegra_car 6>; reset-names = "serial"; dmas = <&apbdma 8>, <&apbdma 8>; @@ -253,6 +259,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_UARTB>; + clock-names = "serial"; resets = <&tegra_car 7>; reset-names = "serial"; dmas = <&apbdma 9>, <&apbdma 9>; @@ -266,6 +273,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_UARTC>; + clock-names = "serial"; resets = <&tegra_car 55>; reset-names = "serial"; dmas = <&apbdma 10>, <&apbdma 10>; @@ -279,6 +287,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_UARTD>; + clock-names = "serial"; resets = <&tegra_car 65>; reset-names = "serial"; dmas = <&apbdma 19>, <&apbdma 19>; @@ -291,6 +300,7 @@ reg = <0x7000a000 0x100>; #pwm-cells = <2>; clocks = <&tegra_car TEGRA114_CLK_PWM>; + clock-names = "pwm"; resets = <&tegra_car 17>; reset-names = "pwm"; status = "disabled"; @@ -466,6 +476,7 @@ reg = <0x7000e000 0x100>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_RTC>; + clock-names = "rtc"; }; kbc@7000e200 { @@ -473,6 +484,7 @@ reg = <0x7000e200 0x100>; interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_KBC>; + clock-names = "kbc"; resets = <&tegra_car 36>; reset-names = "kbc"; status = "disabled"; @@ -544,6 +556,7 @@ reg = <0x70080300 0x100>; nvidia,ahub-cif-ids = <4 4>; clocks = <&tegra_car TEGRA114_CLK_I2S0>; + clock-names = "i2s"; resets = <&tegra_car 30>; reset-names = "i2s"; status = "disabled"; @@ -554,6 +567,7 @@ reg = <0x70080400 0x100>; nvidia,ahub-cif-ids = <5 5>; clocks = <&tegra_car TEGRA114_CLK_I2S1>; + clock-names = "i2s"; resets = <&tegra_car 11>; reset-names = "i2s"; status = "disabled"; @@ -564,6 +578,7 @@ reg = <0x70080500 0x100>; nvidia,ahub-cif-ids = <6 6>; clocks = <&tegra_car TEGRA114_CLK_I2S2>; + clock-names = "i2s"; resets = <&tegra_car 18>; reset-names = "i2s"; status = "disabled"; @@ -574,6 +589,7 @@ reg = <0x70080600 0x100>; nvidia,ahub-cif-ids = <7 7>; clocks = <&tegra_car TEGRA114_CLK_I2S3>; + clock-names = "i2s"; resets = <&tegra_car 101>; reset-names = "i2s"; status = "disabled"; @@ -584,6 +600,7 @@ reg = <0x70080700 0x100>; nvidia,ahub-cif-ids = <8 8>; clocks = <&tegra_car TEGRA114_CLK_I2S4>; + clock-names = "i2s"; resets = <&tegra_car 102>; reset-names = "i2s"; status = "disabled"; @@ -594,6 +611,7 @@ compatible = "nvidia,tegra114-mipi"; reg = <0x700e3000 0x100>; clocks = <&tegra_car TEGRA114_CLK_MIPI_CAL>; + clock-names = "mipi-cal"; #nvidia,mipi-calibrate-cells = <1>; }; @@ -602,6 +620,7 @@ reg = <0x78000000 0x200>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_SDMMC1>; + clock-names = "sdhci"; resets = <&tegra_car 14>; reset-names = "sdhci"; status = "disabled"; @@ -612,6 +631,7 @@ reg = <0x78000200 0x200>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_SDMMC2>; + clock-names = "sdhci"; resets = <&tegra_car 9>; reset-names = "sdhci"; status = "disabled"; @@ -622,6 +642,7 @@ reg = <0x78000400 0x200>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_SDMMC3>; + clock-names = "sdhci"; resets = <&tegra_car 69>; reset-names = "sdhci"; status = "disabled"; @@ -632,6 +653,7 @@ reg = <0x78000600 0x200>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA114_CLK_SDMMC4>; + clock-names = "sdhci"; resets = <&tegra_car 15>; reset-names = "sdhci"; status = "disabled"; @@ -643,6 +665,7 @@ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; phy_type = "utmi"; clocks = <&tegra_car TEGRA114_CLK_USBD>; + clock-names = "usb"; resets = <&tegra_car 22>; reset-names = "usb"; nvidia,phy = <&phy1>; @@ -676,6 +699,7 @@ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; phy_type = "utmi"; clocks = <&tegra_car TEGRA114_CLK_USB3>; + clock-names = "usb"; resets = <&tegra_car 59>; reset-names = "usb"; nvidia,phy = <&phy3>; diff --git a/arch/arm/boot/dts/tegra124-jetson-tk1.dts b/arch/arm/boot/dts/tegra124-jetson-tk1.dts index 15a194d1277..26ad192cd3e 100644 --- a/arch/arm/boot/dts/tegra124-jetson-tk1.dts +++ b/arch/arm/boot/dts/tegra124-jetson-tk1.dts @@ -16,6 +16,26 @@ reg = <0x0 0x80000000 0x0 0x80000000>; }; + pcie-controller@0,01003000 { + status = "okay"; + + avddio-pex-supply = <&vdd_1v05_run>; + vddio-pex-supply = <&vdd_1v05_run>; + avdd-pex-pll-supply = <&vdd_1v05_run>; + hvdd-pex-supply = <&vdd_3v3_lp0>; + hvdd-pex-plle-supply = <&vdd_3v3_lp0>; + vddio-pex-ctl-supply = <&vdd_3v3_lp0>; + avdd-plle-supply = <&avdd_1v05_run>; + + pci@1,0 { + status = "okay"; + }; + + pci@2,0 { + status = "okay"; + }; + }; + host1x@0,50000000 { hdmi@0,54280000 { status = "okay"; @@ -1521,7 +1541,7 @@ regulator-always-on; }; - ldo0 { + avdd_1v05_run: ldo0 { regulator-name = "+1.05V_RUN_AVDD"; regulator-min-microvolt = <1050000>; regulator-max-microvolt = <1050000>; @@ -1625,6 +1645,32 @@ nvidia,sys-clock-req-active-high; }; + padctl@0,7009f000 { + pinctrl-0 = <&padctl_default>; + pinctrl-names = "default"; + + padctl_default: pinmux { + usb3 { + nvidia,lanes = "pcie-0", "pcie-1"; + nvidia,function = "usb3"; + nvidia,iddq = <0>; + }; + + pcie { + nvidia,lanes = "pcie-2", "pcie-3", + "pcie-4"; + nvidia,function = "pcie"; + nvidia,iddq = <0>; + }; + + sata { + nvidia,lanes = "sata-0"; + nvidia,function = "sata"; + nvidia,iddq = <0>; + }; + }; + }; + /* SD card */ sdhci@0,700b0400 { status = "okay"; @@ -1637,7 +1683,7 @@ /* eMMC */ sdhci@0,700b0600 { - status = "okay"; + status = "disabled"; bus-width = <8>; }; diff --git a/arch/arm/boot/dts/tegra124-venice2.dts b/arch/arm/boot/dts/tegra124-venice2.dts index 86970ee4870..6f34ab39448 100644 --- a/arch/arm/boot/dts/tegra124-venice2.dts +++ b/arch/arm/boot/dts/tegra124-venice2.dts @@ -1002,6 +1002,8 @@ brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; + + backlight-boot-off; }; clocks { diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 4a40cc54304..e65b76a3aad 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -2,6 +2,7 @@ #include <dt-bindings/gpio/tegra-gpio.h> #include <dt-bindings/memory/tegra-swgroup.h> #include <dt-bindings/pinctrl/pinctrl-tegra.h> +#include <dt-bindings/pinctrl/pinctrl-tegra-xusb.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include "skeleton.dtsi" @@ -12,12 +13,79 @@ #address-cells = <2>; #size-cells = <2>; + pcie-controller@0,01003000 { + compatible = "nvidia,tegra124-pcie"; + device_type = "pci"; + reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */ + 0x0 0x01003800 0x0 0x00000800 /* AFI registers */ + 0x0 0x02000000 0x0 0x10000000>; /* configuration space */ + reg-names = "pads", "afi", "cs"; + interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */ + <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */ + interrupt-names = "intr", "msi"; + + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 0>; + interrupt-map = <0 0 0 0 &gic GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; + + bus-range = <0x00 0xff>; + #address-cells = <3>; + #size-cells = <2>; + + ranges = <0x82000000 0 0x01000000 0x0 0x01000000 0 0x00001000 /* port 0 configuration space */ + 0x82000000 0 0x01001000 0x0 0x01001000 0 0x00001000 /* port 1 configuration space */ + 0x81000000 0 0x0 0x0 0x12000000 0 0x00010000 /* downstream I/O (64 KiB) */ + 0x82000000 0 0x13000000 0x0 0x13000000 0 0x0d000000 /* non-prefetchable memory (208 MiB) */ + 0xc2000000 0 0x20000000 0x0 0x20000000 0 0x20000000>; /* prefetchable memory (512 MiB) */ + + clocks = <&tegra_car TEGRA124_CLK_PCIE>, + <&tegra_car TEGRA124_CLK_AFI>, + <&tegra_car TEGRA124_CLK_PLL_E>, + <&tegra_car TEGRA124_CLK_CML0>; + clock-names = "pex", "afi", "pll_e", "cml"; + resets = <&tegra_car 70>, + <&tegra_car 72>, + <&tegra_car 74>; + reset-names = "pex", "afi", "pcie_x"; + status = "disabled"; + + phys = <&padctl TEGRA_XUSB_PADCTL_PCIE>; + phy-names = "pcie"; + + pci@1,0 { + device_type = "pci"; + assigned-addresses = <0x82000800 0 0x01000000 0 0x1000>; + reg = <0x000800 0 0 0 0>; + status = "disabled"; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + + nvidia,num-lanes = <2>; + }; + + pci@2,0 { + device_type = "pci"; + assigned-addresses = <0x82001000 0 0x01001000 0 0x1000>; + reg = <0x001000 0 0 0 0>; + status = "disabled"; + + #address-cells = <3>; + #size-cells = <2>; + ranges; + + nvidia,num-lanes = <1>; + }; + }; + host1x@0,50000000 { compatible = "nvidia,tegra124-host1x", "simple-bus"; reg = <0x0 0x50000000 0x0 0x00034000>; interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */ clocks = <&tegra_car TEGRA124_CLK_HOST1X>; + clock-names = "host1x"; resets = <&tegra_car 28>; reset-names = "host1x"; @@ -128,6 +196,7 @@ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_TIMER>; + clock-names = "timer"; }; tegra_car: clock@0,60006000 { @@ -190,6 +259,7 @@ <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_APBDMA>; + clock-names = "dma"; resets = <&tegra_car 34>; reset-names = "dma"; #dma-cells = <1>; @@ -215,6 +285,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_UARTA>; + clock-names = "serial"; resets = <&tegra_car 6>; reset-names = "serial"; dmas = <&apbdma 8>, <&apbdma 8>; @@ -228,6 +299,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_UARTB>; + clock-names = "serial"; resets = <&tegra_car 7>; reset-names = "serial"; dmas = <&apbdma 9>, <&apbdma 9>; @@ -241,6 +313,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_UARTC>; + clock-names = "serial"; resets = <&tegra_car 55>; reset-names = "serial"; dmas = <&apbdma 10>, <&apbdma 10>; @@ -254,6 +327,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_UARTD>; + clock-names = "serial"; resets = <&tegra_car 65>; reset-names = "serial"; dmas = <&apbdma 19>, <&apbdma 19>; @@ -266,6 +340,7 @@ reg = <0x0 0x7000a000 0x0 0x100>; #pwm-cells = <2>; clocks = <&tegra_car TEGRA124_CLK_PWM>; + clock-names = "pwm"; resets = <&tegra_car 17>; reset-names = "pwm"; status = "disabled"; @@ -456,6 +531,7 @@ reg = <0x0 0x7000e000 0x0 0x100>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_RTC>; + clock-names = "rtc"; }; pmc@0,7000e400 { @@ -465,25 +541,37 @@ clock-names = "pclk", "clk32k_in"; }; - smmu: iommu { - compatible = "nvidia,tegra124-smmu"; - reg = <0x0 0x70019010 0x0 0x34 - 0x0 0x700191f0 0x0 0x10 - 0x0 0x70019228 0x0 0x58 - 0x0 0x70019600 0x0 0x4 - 0x0 0x700199b8 0x0 0x4 - 0x0 0x700199e0 0x0 0x18 - 0x0 0x70019a88 0x0 0x24>; - nvidia,#asids = <128>; - dma-window = <0x0 0x0 0x0 0x40000000>; - iommu-cells = <2>; - }; + smmu: iommu@0,70019010 { + compatible = "nvidia,tegra124-smmu"; + reg = <0x0 0x70019010 0x0 0x34 + 0x0 0x700191f0 0x0 0x10 + 0x0 0x70019228 0x0 0x58 + 0x0 0x70019600 0x0 0x4 + 0x0 0x700199b8 0x0 0x4 + 0x0 0x700199e0 0x0 0x18 + 0x0 0x70019a88 0x0 0x24>; + nvidia,#asids = <128>; + dma-window = <0x0 0x0 0x0 0x40000000>; + iommu-cells = <2>; + }; + + padctl: padctl@0,7009f000 { + compatible = "nvidia,tegra124-xusb-padctl"; + reg = <0x0 0x7009f000 0x0 0x1000>; + resets = <&tegra_car 142>; + reset-names = "padctl"; + + #address-cells = <0>; + #size-cells = <0>; + #phy-cells = <1>; + }; sdhci@0,700b0000 { compatible = "nvidia,tegra124-sdhci"; reg = <0x0 0x700b0000 0x0 0x200>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_SDMMC1>; + clock-names = "sdhci"; resets = <&tegra_car 14>; reset-names = "sdhci"; status = "disabled"; @@ -495,6 +583,7 @@ reg = <0x0 0x700b0200 0x0 0x200>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_SDMMC2>; + clock-names = "sdhci"; resets = <&tegra_car 9>; reset-names = "sdhci"; status = "disabled"; @@ -506,6 +595,7 @@ reg = <0x0 0x700b0400 0x0 0x200>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_SDMMC3>; + clock-names = "sdhci"; resets = <&tegra_car 69>; reset-names = "sdhci"; status = "disabled"; @@ -517,6 +607,7 @@ reg = <0x0 0x700b0600 0x0 0x200>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA124_CLK_SDMMC4>; + clock-names = "sdhci"; resets = <&tegra_car 15>; reset-names = "sdhci"; status = "disabled"; @@ -580,6 +671,7 @@ reg = <0x0 0x70301000 0x0 0x100>; nvidia,ahub-cif-ids = <4 4>; clocks = <&tegra_car TEGRA124_CLK_I2S0>; + clock-names = "i2s"; resets = <&tegra_car 30>; reset-names = "i2s"; status = "disabled"; @@ -590,6 +682,7 @@ reg = <0x0 0x70301100 0x0 0x100>; nvidia,ahub-cif-ids = <5 5>; clocks = <&tegra_car TEGRA124_CLK_I2S1>; + clock-names = "i2s"; resets = <&tegra_car 11>; reset-names = "i2s"; status = "disabled"; @@ -600,6 +693,7 @@ reg = <0x0 0x70301200 0x0 0x100>; nvidia,ahub-cif-ids = <6 6>; clocks = <&tegra_car TEGRA124_CLK_I2S2>; + clock-names = "i2s"; resets = <&tegra_car 18>; reset-names = "i2s"; status = "disabled"; @@ -610,6 +704,7 @@ reg = <0x0 0x70301300 0x0 0x100>; nvidia,ahub-cif-ids = <7 7>; clocks = <&tegra_car TEGRA124_CLK_I2S3>; + clock-names = "i2s"; resets = <&tegra_car 101>; reset-names = "i2s"; status = "disabled"; @@ -620,6 +715,7 @@ reg = <0x0 0x70301400 0x0 0x100>; nvidia,ahub-cif-ids = <8 8>; clocks = <&tegra_car TEGRA124_CLK_I2S4>; + clock-names = "i2s"; resets = <&tegra_car 102>; reset-names = "i2s"; status = "disabled"; @@ -632,6 +728,7 @@ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; phy_type = "utmi"; clocks = <&tegra_car TEGRA124_CLK_USBD>; + clock-names = "usb"; resets = <&tegra_car 22>; reset-names = "usb"; nvidia,phy = <&phy1>; @@ -666,6 +763,7 @@ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; phy_type = "utmi"; clocks = <&tegra_car TEGRA124_CLK_USB2>; + clock-names = "usb"; resets = <&tegra_car 58>; reset-names = "usb"; nvidia,phy = <&phy2>; @@ -700,6 +798,7 @@ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; phy_type = "utmi"; clocks = <&tegra_car TEGRA124_CLK_USB3>; + clock-names = "usb"; resets = <&tegra_car 59>; reset-names = "usb"; nvidia,phy = <&phy3>; diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts index a37279af687..31c0135ed3d 100644 --- a/arch/arm/boot/dts/tegra20-harmony.dts +++ b/arch/arm/boot/dts/tegra20-harmony.dts @@ -632,6 +632,8 @@ brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; + + backlight-boot-off; }; clocks { @@ -708,6 +710,7 @@ regulator-max-microvolt = <1050000>; gpio = <&pmic 2 GPIO_ACTIVE_HIGH>; enable-active-high; + vin-supply = <&vdd_5v0_reg>; }; vdd_pnl_reg: regulator@4 { diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index a7ddf70df50..81815416e6d 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi @@ -23,6 +23,7 @@ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */ clocks = <&tegra_car TEGRA20_CLK_HOST1X>; + clock-names = "host1x"; resets = <&tegra_car 28>; reset-names = "host1x"; @@ -36,6 +37,7 @@ reg = <0x54040000 0x00040000>; interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_MPE>; + clock-names = "mpe"; resets = <&tegra_car 60>; reset-names = "mpe"; }; @@ -45,6 +47,7 @@ reg = <0x54080000 0x00040000>; interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_VI>; + clock-names = "vi"; resets = <&tegra_car 20>; reset-names = "vi"; }; @@ -54,6 +57,7 @@ reg = <0x540c0000 0x00040000>; interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_EPP>; + clock-names = "epp"; resets = <&tegra_car 19>; reset-names = "epp"; }; @@ -63,6 +67,7 @@ reg = <0x54100000 0x00040000>; interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_ISP>; + clock-names = "isp"; resets = <&tegra_car 23>; reset-names = "isp"; }; @@ -72,6 +77,7 @@ reg = <0x54140000 0x00040000>; interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_GR2D>; + clock-names = "2d"; resets = <&tegra_car 21>; reset-names = "2d"; }; @@ -80,6 +86,7 @@ compatible = "nvidia,tegra20-gr3d"; reg = <0x54140000 0x00040000>; clocks = <&tegra_car TEGRA20_CLK_GR3D>; + clock-names = "3d"; resets = <&tegra_car 24>; reset-names = "3d"; }; @@ -135,6 +142,7 @@ reg = <0x542c0000 0x00040000>; interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_TVO>; + clock-names = "tvo"; status = "disabled"; }; @@ -142,6 +150,7 @@ compatible = "nvidia,tegra20-dsi"; reg = <0x542c0000 0x00040000>; clocks = <&tegra_car TEGRA20_CLK_DSI>; + clock-names = "dsi"; resets = <&tegra_car 48>; reset-names = "dsi"; status = "disabled"; @@ -154,6 +163,7 @@ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; clocks = <&tegra_car TEGRA20_CLK_TWD>; + clock-names = "twd"; }; intc: interrupt-controller@50041000 { @@ -181,6 +191,7 @@ <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_TIMER>; + clock-names = "timer"; }; tegra_car: clock@60006000 { @@ -210,6 +221,7 @@ <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_APBDMA>; + clock-names = "dma"; resets = <&tegra_car 34>; reset-names = "dma"; #dma-cells = <1>; @@ -254,6 +266,7 @@ reg = <0x70002000 0x200>; interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_AC97>; + clock-names = "ac97"; resets = <&tegra_car 3>; reset-names = "ac97"; dmas = <&apbdma 12>, <&apbdma 12>; @@ -266,6 +279,7 @@ reg = <0x70002800 0x200>; interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_I2S1>; + clock-names = "i2s"; resets = <&tegra_car 11>; reset-names = "i2s"; dmas = <&apbdma 2>, <&apbdma 2>; @@ -278,6 +292,7 @@ reg = <0x70002a00 0x200>; interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_I2S2>; + clock-names = "i2s"; resets = <&tegra_car 18>; reset-names = "i2s"; dmas = <&apbdma 1>, <&apbdma 1>; @@ -298,6 +313,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_UARTA>; + clock-names = "serial"; resets = <&tegra_car 6>; reset-names = "serial"; dmas = <&apbdma 8>, <&apbdma 8>; @@ -311,6 +327,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_UARTB>; + clock-names = "serial"; resets = <&tegra_car 7>; reset-names = "serial"; dmas = <&apbdma 9>, <&apbdma 9>; @@ -324,6 +341,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_UARTC>; + clock-names = "serial"; resets = <&tegra_car 55>; reset-names = "serial"; dmas = <&apbdma 10>, <&apbdma 10>; @@ -337,6 +355,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_UARTD>; + clock-names = "serial"; resets = <&tegra_car 65>; reset-names = "serial"; dmas = <&apbdma 19>, <&apbdma 19>; @@ -350,6 +369,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_UARTE>; + clock-names = "serial"; resets = <&tegra_car 66>; reset-names = "serial"; dmas = <&apbdma 20>, <&apbdma 20>; @@ -362,6 +382,7 @@ reg = <0x7000a000 0x100>; #pwm-cells = <2>; clocks = <&tegra_car TEGRA20_CLK_PWM>; + clock-names = "pwm"; resets = <&tegra_car 17>; reset-names = "pwm"; status = "disabled"; @@ -372,6 +393,7 @@ reg = <0x7000e000 0x100>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_RTC>; + clock-names = "rtc"; }; i2c@7000c000 { @@ -397,6 +419,7 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car TEGRA20_CLK_SPI>; + clock-names = "spi"; resets = <&tegra_car 43>; reset-names = "spi"; dmas = <&apbdma 11>, <&apbdma 11>; @@ -459,6 +482,7 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car TEGRA20_CLK_SBC1>; + clock-names = "spi"; resets = <&tegra_car 41>; reset-names = "spi"; dmas = <&apbdma 15>, <&apbdma 15>; @@ -473,6 +497,7 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car TEGRA20_CLK_SBC2>; + clock-names = "spi"; resets = <&tegra_car 44>; reset-names = "spi"; dmas = <&apbdma 16>, <&apbdma 16>; @@ -487,6 +512,7 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car TEGRA20_CLK_SBC3>; + clock-names = "spi"; resets = <&tegra_car 46>; reset-names = "spi"; dmas = <&apbdma 17>, <&apbdma 17>; @@ -501,6 +527,7 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car TEGRA20_CLK_SBC4>; + clock-names = "spi"; resets = <&tegra_car 68>; reset-names = "spi"; dmas = <&apbdma 18>, <&apbdma 18>; @@ -513,6 +540,7 @@ reg = <0x7000e200 0x100>; interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_KBC>; + clock-names = "kbc"; resets = <&tegra_car 36>; reset-names = "kbc"; status = "disabled"; @@ -614,6 +642,7 @@ phy_type = "utmi"; nvidia,has-legacy-mode; clocks = <&tegra_car TEGRA20_CLK_USBD>; + clock-names = "usb"; resets = <&tegra_car 22>; reset-names = "usb"; nvidia,needs-double-reset; @@ -647,6 +676,7 @@ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; phy_type = "ulpi"; clocks = <&tegra_car TEGRA20_CLK_USB2>; + clock-names = "usb"; resets = <&tegra_car 58>; reset-names = "usb"; nvidia,phy = <&phy2>; @@ -670,6 +700,7 @@ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; phy_type = "utmi"; clocks = <&tegra_car TEGRA20_CLK_USB3>; + clock-names = "usb"; resets = <&tegra_car 59>; reset-names = "usb"; nvidia,phy = <&phy3>; @@ -700,6 +731,7 @@ reg = <0xc8000000 0x200>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_SDMMC1>; + clock-names = "sdhci"; resets = <&tegra_car 14>; reset-names = "sdhci"; status = "disabled"; @@ -710,6 +742,7 @@ reg = <0xc8000200 0x200>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_SDMMC2>; + clock-names = "sdhci"; resets = <&tegra_car 9>; reset-names = "sdhci"; status = "disabled"; @@ -720,6 +753,7 @@ reg = <0xc8000400 0x200>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_SDMMC3>; + clock-names = "sdhci"; resets = <&tegra_car 69>; reset-names = "sdhci"; status = "disabled"; @@ -730,6 +764,7 @@ reg = <0xc8000600 0x200>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA20_CLK_SDMMC4>; + clock-names = "sdhci"; resets = <&tegra_car 15>; reset-names = "sdhci"; status = "disabled"; diff --git a/arch/arm/boot/dts/tegra30-cardhu-a02.dts b/arch/arm/boot/dts/tegra30-cardhu-a02.dts index c9bfedcca6e..f9201486485 100644 --- a/arch/arm/boot/dts/tegra30-cardhu-a02.dts +++ b/arch/arm/boot/dts/tegra30-cardhu-a02.dts @@ -89,6 +89,16 @@ enable-active-high; gpio = <&gpio TEGRA_GPIO(K, 3) GPIO_ACTIVE_HIGH>; }; + + vdd_5v0_hdmi: regulator@107 { + compatible = "regulator-fixed"; + reg = <107>; + regulator-name = "VDD_5V0_HDMI"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; }; diff --git a/arch/arm/boot/dts/tegra30-cardhu-a04.dts b/arch/arm/boot/dts/tegra30-cardhu-a04.dts index fadf55e46b2..7ec17234fbe 100644 --- a/arch/arm/boot/dts/tegra30-cardhu-a04.dts +++ b/arch/arm/boot/dts/tegra30-cardhu-a04.dts @@ -101,5 +101,15 @@ enable-active-high; gpio = <&gpio TEGRA_GPIO(DD, 0) GPIO_ACTIVE_HIGH>; }; + + vdd_5v0_hdmi: regulator@107 { + compatible = "regulator-fixed"; + reg = <107>; + regulator-name = "VDD_5V0_HDMI"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio TEGRA_GPIO(T, 0) GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; }; diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index 20637954624..2974e45671f 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi @@ -69,6 +69,18 @@ nvidia,panel = <&panel>; }; }; + + hdmi@54280000 { + status = "okay"; + + hdmi-supply = <&vdd_5v0_hdmi>; + vdd-supply = <&sys_3v3_reg>; + pll-supply = <&vio_reg>; + + nvidia,hpd-gpios = + <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; + nvidia,ddc-i2c-bus = <&hdmiddc>; + }; }; pinmux@70000868 { @@ -201,7 +213,7 @@ }; }; - i2c@7000c700 { + hdmiddc: i2c@7000c700 { status = "okay"; clock-frequency = <100000>; }; @@ -407,6 +419,8 @@ brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <6>; + + backlight-boot-off; }; clocks { diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi index dec4fc82390..e88e477bfb2 100644 --- a/arch/arm/boot/dts/tegra30.dtsi +++ b/arch/arm/boot/dts/tegra30.dtsi @@ -100,6 +100,7 @@ interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>, /* syncpt */ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>; /* general */ clocks = <&tegra_car TEGRA30_CLK_HOST1X>; + clock-names = "host1x"; resets = <&tegra_car 28>; reset-names = "host1x"; @@ -113,6 +114,7 @@ reg = <0x54040000 0x00040000>; interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_MPE>; + clock-names = "mpe"; resets = <&tegra_car 60>; reset-names = "mpe"; }; @@ -122,6 +124,7 @@ reg = <0x54080000 0x00040000>; interrupts = <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_VI>; + clock-names = "vi"; resets = <&tegra_car 20>; reset-names = "vi"; }; @@ -131,6 +134,7 @@ reg = <0x540c0000 0x00040000>; interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_EPP>; + clock-names = "epp"; resets = <&tegra_car 19>; reset-names = "epp"; }; @@ -140,6 +144,7 @@ reg = <0x54100000 0x00040000>; interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_ISP>; + clock-names = "isp"; resets = <&tegra_car 23>; reset-names = "isp"; }; @@ -149,6 +154,7 @@ reg = <0x54140000 0x00040000>; interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_GR2D>; + clock-names = "2d"; resets = <&tegra_car 21>; reset-names = "2d"; }; @@ -215,6 +221,7 @@ reg = <0x542c0000 0x00040000>; interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_TVO>; + clock-names = "tvo"; status = "disabled"; }; @@ -222,6 +229,7 @@ compatible = "nvidia,tegra30-dsi"; reg = <0x54300000 0x00040000>; clocks = <&tegra_car TEGRA30_CLK_DSIA>; + clock-names = "dsi"; resets = <&tegra_car 48>; reset-names = "dsi"; status = "disabled"; @@ -234,6 +242,7 @@ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; clocks = <&tegra_car TEGRA30_CLK_TWD>; + clock-names = "twd"; }; intc: interrupt-controller@50041000 { @@ -263,6 +272,7 @@ <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_TIMER>; + clock-names = "timer"; }; tegra_car: clock@60006000 { @@ -308,6 +318,7 @@ <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_APBDMA>; + clock-names = "dma"; resets = <&tegra_car 34>; reset-names = "dma"; #dma-cells = <1>; @@ -355,6 +366,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_UARTA>; + clock-names = "serial"; resets = <&tegra_car 6>; reset-names = "serial"; dmas = <&apbdma 8>, <&apbdma 8>; @@ -368,6 +380,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_UARTB>; + clock-names = "serial"; resets = <&tegra_car 7>; reset-names = "serial"; dmas = <&apbdma 9>, <&apbdma 9>; @@ -381,6 +394,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_UARTC>; + clock-names = "serial"; resets = <&tegra_car 55>; reset-names = "serial"; dmas = <&apbdma 10>, <&apbdma 10>; @@ -394,6 +408,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_UARTD>; + clock-names = "serial"; resets = <&tegra_car 65>; reset-names = "serial"; dmas = <&apbdma 19>, <&apbdma 19>; @@ -407,6 +422,7 @@ reg-shift = <2>; interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_UARTE>; + clock-names = "serial"; resets = <&tegra_car 66>; reset-names = "serial"; dmas = <&apbdma 20>, <&apbdma 20>; @@ -419,6 +435,7 @@ reg = <0x7000a000 0x100>; #pwm-cells = <2>; clocks = <&tegra_car TEGRA30_CLK_PWM>; + clock-names = "pwm"; resets = <&tegra_car 17>; reset-names = "pwm"; status = "disabled"; @@ -429,6 +446,7 @@ reg = <0x7000e000 0x100>; interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_RTC>; + clock-names = "rtc"; }; i2c@7000c000 { @@ -518,6 +536,7 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car TEGRA30_CLK_SBC1>; + clock-names = "spi"; resets = <&tegra_car 41>; reset-names = "spi"; dmas = <&apbdma 15>, <&apbdma 15>; @@ -532,6 +551,7 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car TEGRA30_CLK_SBC2>; + clock-names = "spi"; resets = <&tegra_car 44>; reset-names = "spi"; dmas = <&apbdma 16>, <&apbdma 16>; @@ -546,6 +566,7 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car TEGRA30_CLK_SBC3>; + clock-names = "spi"; resets = <&tegra_car 46>; reset-names = "spi"; dmas = <&apbdma 17>, <&apbdma 17>; @@ -560,6 +581,7 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car TEGRA30_CLK_SBC4>; + clock-names = "spi"; resets = <&tegra_car 68>; reset-names = "spi"; dmas = <&apbdma 18>, <&apbdma 18>; @@ -574,6 +596,7 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car TEGRA30_CLK_SBC5>; + clock-names = "spi"; resets = <&tegra_car 104>; reset-names = "spi"; dmas = <&apbdma 27>, <&apbdma 27>; @@ -588,6 +611,7 @@ #address-cells = <1>; #size-cells = <0>; clocks = <&tegra_car TEGRA30_CLK_SBC6>; + clock-names = "spi"; resets = <&tegra_car 106>; reset-names = "spi"; dmas = <&apbdma 28>, <&apbdma 28>; @@ -600,6 +624,7 @@ reg = <0x7000e200 0x100>; interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_KBC>; + clock-names = "kbc"; resets = <&tegra_car 36>; reset-names = "kbc"; status = "disabled"; @@ -668,6 +693,7 @@ reg = <0x70080300 0x100>; nvidia,ahub-cif-ids = <4 4>; clocks = <&tegra_car TEGRA30_CLK_I2S0>; + clock-names = "i2s"; resets = <&tegra_car 30>; reset-names = "i2s"; status = "disabled"; @@ -678,6 +704,7 @@ reg = <0x70080400 0x100>; nvidia,ahub-cif-ids = <5 5>; clocks = <&tegra_car TEGRA30_CLK_I2S1>; + clock-names = "i2s"; resets = <&tegra_car 11>; reset-names = "i2s"; status = "disabled"; @@ -688,6 +715,7 @@ reg = <0x70080500 0x100>; nvidia,ahub-cif-ids = <6 6>; clocks = <&tegra_car TEGRA30_CLK_I2S2>; + clock-names = "i2s"; resets = <&tegra_car 18>; reset-names = "i2s"; status = "disabled"; @@ -698,6 +726,7 @@ reg = <0x70080600 0x100>; nvidia,ahub-cif-ids = <7 7>; clocks = <&tegra_car TEGRA30_CLK_I2S3>; + clock-names = "i2s"; resets = <&tegra_car 101>; reset-names = "i2s"; status = "disabled"; @@ -708,6 +737,7 @@ reg = <0x70080700 0x100>; nvidia,ahub-cif-ids = <8 8>; clocks = <&tegra_car TEGRA30_CLK_I2S4>; + clock-names = "i2s"; resets = <&tegra_car 102>; reset-names = "i2s"; status = "disabled"; @@ -719,6 +749,7 @@ reg = <0x78000000 0x200>; interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_SDMMC1>; + clock-names = "sdhci"; resets = <&tegra_car 14>; reset-names = "sdhci"; status = "disabled"; @@ -729,6 +760,7 @@ reg = <0x78000200 0x200>; interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_SDMMC2>; + clock-names = "sdhci"; resets = <&tegra_car 9>; reset-names = "sdhci"; status = "disabled"; @@ -739,6 +771,7 @@ reg = <0x78000400 0x200>; interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_SDMMC3>; + clock-names = "sdhci"; resets = <&tegra_car 69>; reset-names = "sdhci"; status = "disabled"; @@ -749,6 +782,7 @@ reg = <0x78000600 0x200>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; clocks = <&tegra_car TEGRA30_CLK_SDMMC4>; + clock-names = "sdhci"; resets = <&tegra_car 15>; reset-names = "sdhci"; status = "disabled"; @@ -760,6 +794,7 @@ interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; phy_type = "utmi"; clocks = <&tegra_car TEGRA30_CLK_USBD>; + clock-names = "usb"; resets = <&tegra_car 22>; reset-names = "usb"; nvidia,needs-double-reset; @@ -795,6 +830,7 @@ interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; phy_type = "utmi"; clocks = <&tegra_car TEGRA30_CLK_USB2>; + clock-names = "usb"; resets = <&tegra_car 58>; reset-names = "usb"; nvidia,phy = <&phy2>; @@ -829,6 +865,7 @@ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; phy_type = "utmi"; clocks = <&tegra_car TEGRA30_CLK_USB3>; + clock-names = "usb"; resets = <&tegra_car 59>; reset-names = "usb"; nvidia,phy = <&phy3>; diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig index 860165422dd..dc45c99644d 100644 --- a/arch/arm/configs/tegra_defconfig +++ b/arch/arm/configs/tegra_defconfig @@ -12,6 +12,7 @@ CONFIG_RESOURCE_COUNTERS=y CONFIG_CGROUP_SCHED=y CONFIG_RT_GROUP_SCHED=y CONFIG_BLK_DEV_INITRD=y +CONFIG_KALLSYMS_ALL=y # CONFIG_ELF_CORE is not set CONFIG_EMBEDDED=y CONFIG_PERF_EVENTS=y @@ -30,7 +31,6 @@ CONFIG_ARCH_TEGRA_3x_SOC=y CONFIG_ARCH_TEGRA_114_SOC=y CONFIG_ARCH_TEGRA_124_SOC=y CONFIG_TEGRA_EMC_SCALING_ENABLE=y -CONFIG_TRUSTED_FOUNDATIONS=y CONFIG_PCI=y CONFIG_PCI_MSI=y CONFIG_PCI_TEGRA=y @@ -90,6 +90,9 @@ CONFIG_RFKILL_INPUT=y CONFIG_RFKILL_GPIO=y CONFIG_DEVTMPFS=y CONFIG_DEVTMPFS_MOUNT=y +# CONFIG_FIRMWARE_IN_KERNEL is not set +CONFIG_EXTRA_FIRMWARE="nouveau/nvea_fuc409c nouveau/nvea_fuc409d nouveau/nvea_fuc41ac nouveau/nvea_fuc41ad" +CONFIG_DMA_BUF_TEST=y CONFIG_DMA_CMA=y CONFIG_CMA_SIZE_MBYTES=64 CONFIG_MTD=y @@ -119,11 +122,15 @@ CONFIG_BRCMFMAC=m CONFIG_RT2X00=y CONFIG_RT2800USB=m CONFIG_INPUT_JOYDEV=y +CONFIG_MWIFIEX=y +CONFIG_MWIFIEX_SDIO=y CONFIG_INPUT_EVDEV=y CONFIG_KEYBOARD_GPIO=y CONFIG_KEYBOARD_TEGRA=y CONFIG_KEYBOARD_CROS_EC=y CONFIG_MOUSE_PS2_ELANTECH=y +CONFIG_INPUT_TOUCHSCREEN=y +CONFIG_TOUCHSCREEN_ATMEL_MXT=y CONFIG_INPUT_MISC=y CONFIG_INPUT_MPU3050=y # CONFIG_LEGACY_PTYS is not set @@ -134,7 +141,6 @@ CONFIG_SERIAL_TEGRA=y CONFIG_SERIAL_OF_PLATFORM=y # CONFIG_HW_RANDOM is not set # CONFIG_I2C_COMPAT is not set -CONFIG_I2C_MUX_PCA954x=y CONFIG_I2C_MUX_PINCTRL=y CONFIG_I2C_TEGRA=y CONFIG_SPI=y @@ -147,11 +153,9 @@ CONFIG_GPIO_PCA953X_IRQ=y CONFIG_GPIO_PALMAS=y CONFIG_GPIO_TPS6586X=y CONFIG_GPIO_TPS65910=y -CONFIG_POWER_SUPPLY=y CONFIG_BATTERY_SBS=y CONFIG_CHARGER_TPS65090=y CONFIG_POWER_RESET=y -CONFIG_POWER_RESET_AS3722=y CONFIG_POWER_RESET_GPIO=y CONFIG_SENSORS_LM90=y CONFIG_MFD_AS3722=y @@ -180,11 +184,13 @@ CONFIG_MEDIA_USB_SUPPORT=y CONFIG_USB_VIDEO_CLASS=y CONFIG_USB_GSPCA=y CONFIG_DRM=y +# CONFIG_DRM_I2C_CH7006 is not set +# CONFIG_DRM_I2C_SIL164 is not set +CONFIG_DRM_NOUVEAU=y CONFIG_DRM_TEGRA=y +CONFIG_DRM_TEGRA_STAGING=y CONFIG_DRM_PANEL_SIMPLE=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y # CONFIG_LCD_CLASS_DEVICE is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y # CONFIG_BACKLIGHT_GENERIC is not set CONFIG_BACKLIGHT_PWM=y CONFIG_FRAMEBUFFER_CONSOLE=y @@ -284,19 +290,12 @@ CONFIG_DETECT_HUNG_TASK=y CONFIG_SCHEDSTATS=y CONFIG_TIMER_STATS=y # CONFIG_DEBUG_PREEMPT is not set +CONFIG_DEBUG_SPINLOCK=y CONFIG_DEBUG_MUTEXES=y CONFIG_DEBUG_SG=y +CONFIG_SAMPLES=y CONFIG_DEBUG_LL=y CONFIG_EARLY_PRINTK=y CONFIG_CRYPTO_TWOFISH=y # CONFIG_CRYPTO_ANSI_CPRNG is not set -CONFIG_CRYPTO_DEV_TEGRA_AES=y CONFIG_CRC_CCITT=y -CONFIG_DRM_NOUVEAU=y -CONFIG_NOUVEAU_DEBUG=5 -CONFIG_NOUVEAU_DEBUG_DEFAULT=3 -CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="nouveau/nvea_fuc409c nouveau/nvea_fuc409d nouveau/nvea_fuc41ac nouveau/nvea_fuc41ad" -CONFIG_EXTRA_FIRMWARE_DIR="firmware" -CONFIG_FW_LOADER_USER_HELPER=y diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c index 637b62ccc91..0f999508a8b 100644 --- a/drivers/clk/tegra/clk-pll.c +++ b/drivers/clk/tegra/clk-pll.c @@ -773,6 +773,12 @@ static int clk_plle_enable(struct clk_hw *hw) clk_pll_wait_for_lock(pll); + /* enable spread-spectrum */ + val = readl(pll->clk_base + PLLE_SS_CTRL); + val &= ~PLLE_SS_DISABLE; + val |= (0x18 << 24) | (0x01 << 16) | (0x24 << 0); + writel(val, pll->clk_base + PLLE_SS_CTRL); + return 0; } diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c index 80efe51fdcd..2f74b413557 100644 --- a/drivers/clk/tegra/clk-tegra124.c +++ b/drivers/clk/tegra/clk-tegra124.c @@ -618,6 +618,8 @@ static struct tegra_clk_pll_params pll_d_params = { }; static struct tegra_clk_pll_freq_table tegra124_pll_d2_freq_table[] = { + { 12000000, 297000000, 99, 1, 4}, + { 12000000, 148500000, 99, 1, 8}, { 12000000, 594000000, 99, 1, 2}, { 13000000, 594000000, 91, 1, 2}, /* actual: 591.5 MHz */ { 16800000, 594000000, 71, 1, 2}, /* actual: 596.4 MHz */ diff --git a/include/dt-bindings/interrupt-controller/arm-gic.h b/include/dt-bindings/interrupt-controller/arm-gic.h index 1ea1b702fec..ff21d6fac25 100644 --- a/include/dt-bindings/interrupt-controller/arm-gic.h +++ b/include/dt-bindings/interrupt-controller/arm-gic.h @@ -14,7 +14,7 @@ /* * Interrupt specifier cell 2. - * The flaggs in irq.h are valid, plus those below. + * The flags in irq.h are valid, plus those below. */ #define GIC_CPU_MASK_RAW(x) ((x) << 8) #define GIC_CPU_MASK_SIMPLE(num) GIC_CPU_MASK_RAW((1 << (num)) - 1) |