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2014-01-10HACK: Modify display A and B latency allowanceHEADmasterThierry Reding1-0/+30
This allows the HDMI output on Cardhu to work properly. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10PENDING: Fix Kconfig warningThierry Reding1-1/+1
2014-01-10HACK: ARM: tegra: Keep 3.3V regulator always onThierry Reding1-0/+2
This makes eDP work again.
2014-01-10ARM: tegra: Fixup Cardhu HDMI outputThierry Reding1-1/+1
2014-01-10drm/tegra: Obtain head number from DTThierry Reding2-5/+21
The head number of a given display controller is fixed in hardware and required to program outputs appropriately. Relying on the driver probe order to determine this number will not work, since that could yield a situation where the second head was probed first and would be assigned head number 0 instead of 1. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10ARM: tegra: Add head numbers to display controllersThierry Reding4-0/+16
The number of the head specifies the index of the display controller unit and is required to properly configure outputs so that they receive video data from the correct source. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10drm/tegra: Fix possible CRTC mask for RGB outputsThierry Reding1-1/+4
The mask of possible CRTCs that an output (DRM encoder) can be attached to is relative to the position within the DRM device's list of CRTCs. Deferred probing can cause this to not match the pipe number associated with a CRTC. Use the newly introduced drm_helper_crtc_possible_mask() to compute the mask by looking up the proper index of the given CRTC in the list. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10drm: provide a helper for the encoder possible_crtcs maskRussell King2-13/+27
The encoder possible_crtcs mask identifies which CRTCs can be bound to a particular encoder. Each bit from bit 0 defines an index in the list of CRTCs held in the DRM mode_config crtc_list. Rather than having drivers trying to track the position of their CRTCs in the list, expose the code which already exists for calculating the appropriate mask bit for a CRTC. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10Merge branch 'next/tegra'Thierry Reding10-23/+507
2014-01-10Merge branch 'next/drm'Thierry Reding25-29/+3667
2014-01-10Merge branch 'next/input'Thierry Reding1-3/+92
2014-01-10Merge branch 'next/pwm'Thierry Reding3-0/+11
2014-01-10Merge branch 'next/clk'Thierry Reding1-1/+1
2014-01-10Merge branch 'next/fixes'Thierry Reding1-0/+1
2014-01-10Revert "ARM: tegra: Remove 3.3V supply and modem regulators"Thierry Reding1-0/+22
This reverts commit 3ed0486316ec76bb36dd30255db624683e85f456.
2014-01-10HACK: ARM: tegra: Update DTS for Dalmore A05Thierry Reding1-4/+15
This updates the HDMI related regulators for the Dalmore A05 fab. Note that this should never be merged upstream since it was agreed to only support the Dalmore A04. Signed-off-by: Thierry Reding <treding@nvidia.com> --- Changes in v2: - adjust unit-address of PLL regulator
2014-01-10WIP: ARM: tegra: Enable HDMI on CardhuThierry Reding1-1/+12
Enable the HDMI output and hotplug detection. Note that HDMI doesn't work on Cardhu for some reason. I remember someone reporting that it worked at some point in time, but that no longer seems to be true. A potential issue might be that EMC clocks are too slow, due to them being set to some safe default, which causes underflow for high HDMI resolutions. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10ARM: tegra: Add missing clock-names propertiesThierry Reding4-0/+118
clock-names properties are only listed when necessary to differentiate between multiple clocks. The same rule doesn't apply to the reset-names property, though, so add the clock-names property where it's missing for consistency. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10Revert "venice2: remove backlight-boot-off property"Thierry Reding1-0/+2
This reverts commit 44533a1692908ebfb98dc3c462c9535edc42fba1.
2014-01-10Revert "undo cardhu boot off"Thierry Reding1-0/+2
This reverts commit 0af442f0c06b66151a088a481c4dd5d8222471ec.
2014-01-10Revert "undo harmony boot-off"Thierry Reding1-0/+2
This reverts commit ed096432ba42ff8f0e8bd4781a901cf60100ea2d.
2014-01-10Revert "undo dalmore boot-off"Thierry Reding1-0/+2
This reverts commit 286e1ec26da181239ca5eb22f1ef5072160b3ecc.
2014-01-10HACK: ARM: tegra: Enable gk20a on Venice2Thierry Reding1-1/+6
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10HACK: ARM: tegra: Add gk20a node on Tegra124Thierry Reding1-1/+18
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10WIP: ARM: tegra: Enable HDMI on Venice2Thierry Reding1-1/+21
Add HDMI VDD and PLL regulators and enable the DDC I2C controller. Enable the HDMI device, provide the power supplies as well as the DDC adapter and use the standard pin (PN7) for hotplug detection. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10WIP: ARM: tegra: Add Tegra124 HDMI supportThierry Reding1-0/+12
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10WIP: ARM: tegra: Add trackpad for Venice2Thierry Reding1-0/+8
Signed-off-by: Thierry Reding <treding@nvidia.com> --- Note: The trackpad doesn't seem to work with this, but at least it has the effect of adding a /dev/event/inputX device, which works around a bug in Weston.
2014-01-10ARM: tegra: Update default configurationThierry Reding1-3/+4
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10ARM: tegra: Properly sort clocks propertyThierry Reding1-1/+1
Other files and nodes list the resets property after the clocks property so do the same here for consistency. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10ARM: tegra: Enable USB on Venice2Thierry Reding1-1/+28
USB1 and USB3 are routed to two external connectors, while USB2 is used for the integrated webcam. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10ARM: tegra: Add Tegra124 USB supportThierry Reding1-0/+99
The USB controllers on Tegra124 are backwards-compatible with those found on Tegra30. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10ARM: tegra: Enable eDP for Venice2Thierry Reding1-1/+34
Venice2 has a 12.9" (2560x1700) panel connected to the eDP output of the Tegra124. The panel has an EDID to describe the video timings but needs a few extra nodes to get the backlight to come up. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10ARM: tegra: Add Tegra124 eDP supportThierry Reding1-0/+26
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10ARM: tegra: Add Tegra124 host1x supportThierry Reding1-0/+37
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10ARM: tegra: Hook up SDMMC3 power-supply on Venice2Thierry Reding1-3/+2
The SDMMC3 interface is supplied with 1.8V by the PMICs LDO6. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10ARM: tegra: Remove 3.3V supply and modem regulatorsThierry Reding1-22/+0
GPIO 1 and 2 of the PMIC are not used for the described purpose, so remove them. Signed-off-by: Thierry Reding <treding@nvidia.com> --- Note: Removing these makes the work-in-progress eDP support work again.
2014-01-10PENDING: dma: tegra: add support for Tegra148/124Laxman Dewangan1-7/+59
Tegra148 introduces a few changes to the APB DMA HW registers. Update the driver to cope with them. Tegra124 inherits these changes. * The register address stride between DMA channels increases. * A new per-channel WCOUNT register is introduced. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Kunal Agrawal <kunala@nvidia.com> [swarren, remove .dts file change, rewrote commit description, removed some duplicate code and register IO] Signed-off-by: Stephen Warren <swarren@nvidia.com>
2014-01-10drm/tegra: Statically assign pipe numberThierry Reding1-2/+5
The driver previously relied on the probe order to assign a pipe number to each head. With the introduction of panel support it is now possible for the display controller driver to defer probing and therefore it can happen that the heads are assigned the wrong pipe number, which causes breakage later on because the wrong values end up being programmed into registers of the various outputs. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10WIP: drm/tegra: Add hardware cursor supportThierry Reding2-3/+81
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10WIP: drm/tegra: Add Tegra124 LVDS supportThierry Reding2-0/+6
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10HACK: drm/tegra: Add gk20a supportThierry Reding2-0/+249
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10WIP: drm/tegra: Add Tegra124 HDMI supportThierry Reding2-0/+89
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10WIP: drm/tegra: Implement DSI transfersThierry Reding1-0/+147
Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10WIP: gpu: host1x: Replace a variable length arrayThierry Reding1-4/+10
Explicitly allocate the array with the correct length instead of using a variable length array. The variable length array is probably safe in this case, but sparse complains about it. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10drm/tegra: Implement brightness propertyThierry Reding2-2/+59
When attached to a panel that supports the brightness operations, create a connector property that allows the brightness to be manipulated using the KMS API. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10drm/panel: simple: Implement brightness interfaceThierry Reding1-0/+44
Provide implementations to control the associated backlight device. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10drm/panel: Add interface to manipulate brightnessThierry Reding1-0/+32
Add callbacks so that panel drivers can expose brightness controls. This allows users to manipulate the brightness of a specific panel, without resorting to heuristics to look up the corresponding backlight device. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10drm/tegra: Add eDP supportThierry Reding10-2/+2129
Add support for eDP functionality found on Tegra124 and later SoCs. Only fast link training is currently supported. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10drm/dp: Allow registering AUX channels as I2C bussesThierry Reding2-0/+188
Implements an I2C-over-AUX I2C adapter on top of the generic drm_dp_aux infrastructure. It extracts the retry logic from existing drivers, which should help in porting those drivers to this new helper. Signed-off-by: Thierry Reding <treding@nvidia.com>
2014-01-10drm/dp: Add DisplayPort link helpersThierry Reding2-0/+92
Add a helper to probe a DP link (reading out the maximum rate, link count and capabilities) as well as configuring it accordingly. Signed-off-by: Thierry Reding <treding@nvidia.com> --- Changes in v3: - remove duplicate kerneldoc
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