diff options
| author | Thierry Reding <treding@nvidia.com> | 2014-01-10 17:06:51 +0100 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2014-01-10 17:06:51 +0100 |
| commit | 3dcf75f4b82c52eb3274663e553b0bf42164db37 (patch) | |
| tree | 8ac14869023c76e8a43b0489949b44298cccbb74 | |
| parent | 20ffb86b5cd8e7786778af10df55b3a14fbe68e9 (diff) | |
drm/tegra: Obtain head number from DT
The head number of a given display controller is fixed in hardware and
required to program outputs appropriately. Relying on the driver probe
order to determine this number will not work, since that could yield a
situation where the second head was probed first and would be assigned
head number 0 instead of 1.
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/tegra/dc.c | 23 |
2 files changed, 21 insertions, 5 deletions
diff --git a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt index 866ce4ce37d9..efa8b8451f93 100644 --- a/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt +++ b/Documentation/devicetree/bindings/gpu/nvidia,tegra20-host1x.txt @@ -118,6 +118,9 @@ of the following host1x client modules: See ../reset/reset.txt for details. - reset-names: Must include the following entries: - dc + - nvidia,head: The number of the display controller head. This is used to + setup the various types of output to receive video data from the given + head. Each display controller node has a child node, named "rgb", that represents the RGB output associated with the controller. It can take the following diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c index 9684109de6cc..da1d55acc41d 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -1233,6 +1233,20 @@ static const struct host1x_client_ops dc_client_ops = { .exit = tegra_dc_exit, }; +static int tegra_dc_parse_dt(struct tegra_dc *dc) +{ + u32 value; + int err; + + err = of_property_read_u32(dc->dev->of_node, "nvidia,head", &value); + if (err < 0) + return err; + + dc->pipe = value; + + return 0; +} + static const struct tegra_dc_soc_info tegra20_dc_soc_info = { .supports_interlacing = false, }; @@ -1280,6 +1294,10 @@ static int tegra_dc_probe(struct platform_device *pdev) dc->dev = &pdev->dev; dc->soc = id->data; + err = tegra_dc_parse_dt(dc); + if (err < 0) + return err; + dc->clk = devm_clk_get(&pdev->dev, NULL); if (IS_ERR(dc->clk)) { dev_err(&pdev->dev, "failed to get clock\n"); @@ -1301,11 +1319,6 @@ static int tegra_dc_probe(struct platform_device *pdev) if (IS_ERR(dc->regs)) return PTR_ERR(dc->regs); - if (regs->start == 0x54200000) - dc->pipe = 0; - else - dc->pipe = 1; - dc->irq = platform_get_irq(pdev, 0); if (dc->irq < 0) { dev_err(&pdev->dev, "failed to get IRQ\n"); |