diff options
| author | Thierry Reding <treding@nvidia.com> | 2013-12-13 14:26:38 +0100 |
|---|---|---|
| committer | Thierry Reding <treding@nvidia.com> | 2014-01-10 10:15:37 +0100 |
| commit | 6956fcf81199c8ff188d52df85bfe0d45414389e (patch) | |
| tree | a34dd2cb5b26862b767d39533cbc390e2bec7b18 | |
| parent | 67a2ccf5ff284b477dade5fbff70f1cfd03c8da7 (diff) | |
ARM: tegra: Add Tegra124 eDP support
Signed-off-by: Thierry Reding <treding@nvidia.com>
| -rw-r--r-- | arch/arm/boot/dts/tegra124.dtsi | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra124.dtsi b/arch/arm/boot/dts/tegra124.dtsi index 0a4e5271b5f9..39d77aa936f9 100644 --- a/arch/arm/boot/dts/tegra124.dtsi +++ b/arch/arm/boot/dts/tegra124.dtsi @@ -44,6 +44,32 @@ resets = <&tegra_car 26>; reset-names = "dc"; }; + + sor@54540000 { + compatible = "nvidia,tegra124-sor"; + reg = <0x54540000 0x00040000>; + interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&tegra_car TEGRA124_CLK_SOR0>, + <&tegra_car TEGRA124_CLK_PLL_D_OUT0>, + <&tegra_car TEGRA124_CLK_PLL_DP>, + <&tegra_car TEGRA124_CLK_CLK_M>; + clock-names = "sor", "parent", "dp", "safe"; + resets = <&tegra_car 182>; + reset-names = "sor"; + status = "disabled"; + }; + + dpaux@545c0000 { + compatible = "nvidia,tegra124-dpaux"; + reg = <0x545c0000 0x00040000>; + interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&tegra_car TEGRA124_CLK_DPAUX>, + <&tegra_car TEGRA124_CLK_PLL_DP>; + clock-names = "dpaux", "parent"; + resets = <&tegra_car 181>; + reset-names = "dpaux"; + status = "disabled"; + }; }; gic: interrupt-controller@50041000 { |