diff options
| author | Dave Airlie <airlied@redhat.com> | 2015-12-21 16:32:52 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2016-01-18 15:35:56 +1000 |
| commit | f3deb583be6313fe4085eae8e58cb31e6fb9408a (patch) | |
| tree | dd621fb1f0560a5e6c8b246ae087b58cec2a2761 | |
| parent | 4beb4c8a644aff514efdc8450c72bac0d63a82ac (diff) | |
hack interp sample first args is intarb_gpu_shader5-devel
| -rw-r--r-- | src/vrend_shader.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/vrend_shader.c b/src/vrend_shader.c index 2dc5732..09b2645 100644 --- a/src/vrend_shader.c +++ b/src/vrend_shader.c @@ -1527,9 +1527,13 @@ iter_instruction(struct tgsi_iterate_context *iter, idx = ctx->inputs[j].sid * 4; idx += src->Register.SwizzleX; snprintf(srcs[i], 255, "%s(vec4(%s%s%s[%d]))", stypeprefix, prefix, arrayname, ctx->inputs[j].glsl_name, idx); - } else - snprintf(srcs[i], 255, "%s(%s%s%s%s)", stypeprefix, prefix, ctx->inputs[j].glsl_name, arrayname, swizzle); + } else { + if (inst->Instruction.Opcode == TGSI_OPCODE_INTERP_SAMPLE && i == 1) { + snprintf(srcs[i], 255, "floatBitsToInt(%s%s%s%s)", prefix, ctx->inputs[j].glsl_name, arrayname, swizzle); + } else + snprintf(srcs[i], 255, "%s(%s%s%s%s)", stypeprefix, prefix, ctx->inputs[j].glsl_name, arrayname, swizzle); + } if ((inst->Instruction.Opcode == TGSI_OPCODE_INTERP_SAMPLE || inst->Instruction.Opcode == TGSI_OPCODE_INTERP_OFFSET || inst->Instruction.Opcode == TGSI_OPCODE_INTERP_CENTROID) && |