~vlj/llvm - AMDGPU backend development for LLVM

Age	Commit message (Expand)	Author	Files	Lines
2013-02-26	bundling dot4scheduling2	Vincent Lejeune	4	-1/+60
2013-02-26	some work to get bottom up scheduling working	Vincent Lejeune	4	-42/+76
2013-02-26	R600: Recompute schedule graph non order dependencies.	Vincent Lejeune	2	-2/+111
2013-02-26	R600: initial scheduler code	Vadim Girlin	3	-1/+620
2013-02-26	R600: Remove LowerConstCopyPass and lower CONST_COPY right after ISel.	Vincent Lejeune	5	-228/+11
2013-02-26	R600: Turn BUILD_VECTOR into Reg_Sequence	Vincent Lejeune	1	-0/+29
2013-02-26	R600: CONST_ADDRESS node is not marked as mayLoad anymore	Vincent Lejeune	1	-1/+1
2013-02-26	R600: Use MUL_IEEE for trig/fdiv intrinsic	Vincent Lejeune	1	-4/+4
2013-02-26	R600: Do not predicate vector op	Vincent Lejeune	1	-0/+2
2013-02-26	R600: Add support for indirect addressing of non default const buffer	Vincent Lejeune	2	-7/+8
2013-02-26	[mips] Use class RegDefsUses to track register defs and uses.	Akira Hatanaka	1	-89/+82
2013-02-26	[fast-isel] Make sure the FastLowerArguments function checks to make sure the	Chad Rosier	2	-0/+2
2013-02-25	Refine fix to PR10499, no functionality change	Michael Liao	1	-1/+1
2013-02-25	Fix PR10499	Michael Liao	1	-1/+1
2013-02-25	[fast-isel] Add X86FastIsel::FastLowerArguments to handle functions with 6 or	Chad Rosier	1	-0/+73
2013-02-25	[ms-inline asm] Add support for the pushad/popad mnemonics.	Chad Rosier	1	-4/+2
2013-02-25	Fix missing relocation for TLS addressing peephole optimization.	Bill Schmidt	1	-0/+3
2013-02-25	Make pseudos FEXT_CCRX16_ins and FEXT_CCRXI16_ins into custom emitters.	Reed Kotler	5	-69/+70
2013-02-24	Make psuedo FEXT_T8I816_ins into a custom emitter.	Reed Kotler	5	-61/+39
2013-02-24	Fix PR14364.	Bill Schmidt	4	-20/+27
2013-02-24	Typo	Francois Pichet	1	-1/+1
2013-02-24	Revert r169638 because it broke Mesa llvmpipe tests.	Nadav Rotem	1	-6/+1
2013-02-24	Make psuedo FEXT_T8I816_ins a custom inserter. It should be expanded	Reed Kotler	4	-22/+34
2013-02-23	Add new base instruction def for cmpi, cmp, slt and sltu so that def/uses	Reed Kotler	1	-5/+10
2013-02-23	X86: Disable cmov-memory patterns on subtargets without cmov.	Benjamin Kramer	1	-6/+8
2013-02-23	Expand pseudos/macros for Selt. This is the last of the complex	Reed Kotler	3	-0/+82
2013-02-23	ARM: Convenience aliases for 'srs*' instructions.	Jim Grosbach	3	-0/+28
2013-02-22	[mips] Emit call16 operator instead of got_disp. The former allows lazy binding.	Akira Hatanaka	1	-3/+1
2013-02-22	x86_64: designate most general purpose and SSE registers as callee save under...	Peter Collingbourne	2	-21/+28
2013-02-22	R600/SI: Add pattern for sign extension of i1 to i32.	Michel Danzer	1	-0/+5
2013-02-22	R600/SI: Add pattern for logical or of i1 values.	Michel Danzer	1	-0/+4
2013-02-22	R600/SI: Add pattern for fceil.	Michel Danzer	1	-1/+3
2013-02-22	Make ARMAsmPrinter generate the correct alignment specifier syntax in instruc...	Kristof Beyls	1	-2/+1
2013-02-22	Fix a nomenclature mistake. Slt->Slti in the functions. The "i" refers	Reed Kotler	2	-8/+8
2013-02-22	Expand mips16 SelT form pseudso/macros.	Reed Kotler	3	-0/+81
2013-02-22	Remove code copied from GenRegisterInfo.inc.	Andrew Trick	2	-57/+0
2013-02-21	Move the eliminateCallFramePseudoInstr method from TargetRegisterInfo	Eli Bendersky	53	-569/+541
2013-02-21	Hexagon: Expand cttz, ctlz, and ctpop for now.	Anshuman Dasgupta	1	-0/+5
2013-02-21	Radar numbers don't belong in source code.	Evan Cheng	3	-4/+1
2013-02-21	Trivial cleanup	Bill Schmidt	1	-2/+2
2013-02-21	Large code model support for PowerPC.	Bill Schmidt	5	-15/+20
2013-02-21	getX86SubSuperRegister has a special mode with High=true for i64 which	Eli Bendersky	1	-17/+9
2013-02-21	R600/SI: inline V_ADD\|SUB_F32 patterns	Christian Konig	1	-9/+5
2013-02-21	R600/SI: replace IMPLICIT_DEF with SIOperand.ZERO	Christian Konig	1	-1/+1
2013-02-21	R600/SI: replace SI_V_CNDLT with a pattern	Christian Konig	3	-31/+5
2013-02-21	R600/SI: use patterns for clamp, fabs, fneg	Christian Konig	2	-40/+22
2013-02-21	R600/SI: add all the other missing asm operands v2	Christian Konig	2	-22/+29
2013-02-21	R600/SI: add the missing M*BUF\|IMG asm operands	Christian Konig	1	-4/+8
2013-02-21	R600/SI: add the missing S_* asm operands	Christian Konig	1	-18/+34
2013-02-21	R600/SI: rework VOP3 classes	Christian Konig	1	-14/+14