~vlj/llvm - AMDGPU backend development for LLVM

Branch	Commit message	Author	Age
cfg	Not so stupid attempt to fix splitedge	Vincent Lejeune	11 years
codesize6	R600: Relax some vector constraints on Dot4.	Vincent Lejeune	12 years
native	R600: Improve texture handling	Vincent Lejeune	12 years
radeonsi	R600: Generalize dot4 optimizations to cube instructions	Vincent Lejeune	11 years
radeonsi-backup	R600/SI: Start working on a Scheduler for SI.	Vincent Lejeune	11 years
radeonsi-backup2	R600/SI: Add support for new vector intrinsic related callbacks	Vincent Lejeune	11 years
radeonsi-scheduling	fixe for scheduler	Vincent Lejeune	10 years
scheduling-backup	R600: Recompute schedule graph non order dependencies.	Vincent Lejeune	11 years
textures	fix the trans bs too	Vincent Lejeune	12 years
vliw5	Revert "R600: Recompute schedule graph non order dependencies."	Vincent Lejeune	11 years
[...]


Age	Commit message	Author	Files	Lines
2013-02-26	bundling dot4scheduling2	Vincent Lejeune	4	-1/+60
2013-02-26	some work to get bottom up scheduling working	Vincent Lejeune	5	-49/+77
2013-02-26	R600: Recompute schedule graph non order dependencies.	Vincent Lejeune	5	-5/+339
2013-02-26	Add a case to LiveIntervalAnalysis::HandleMove	Vincent Lejeune	1	-4/+65
2013-02-26	R600: initial scheduler code	Vadim Girlin	4	-4/+623
2013-02-26	R600: Remove LowerConstCopyPass and lower CONST_COPY right after ISel.	Vincent Lejeune	5	-228/+11
2013-02-26	R600: Turn BUILD_VECTOR into Reg_Sequence	Vincent Lejeune	1	-0/+29
2013-02-26	R600: CONST_ADDRESS node is not marked as mayLoad anymore	Vincent Lejeune	1	-1/+1
2013-02-26	R600: Use MUL_IEEE for trig/fdiv intrinsic	Vincent Lejeune	2	-8/+8
2013-02-26	R600: Do not predicate vector op	Vincent Lejeune	1	-0/+2
[...]

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