~vlj/llvm - AMDGPU backend development for LLVM

Branch	Commit message	Author	Age
cfg	Not so stupid attempt to fix splitedge	Vincent Lejeune	11 years
codesize6	R600: Relax some vector constraints on Dot4.	Vincent Lejeune	12 years
native	R600: Improve texture handling	Vincent Lejeune	12 years
radeonsi	R600: Generalize dot4 optimizations to cube instructions	Vincent Lejeune	11 years
radeonsi-backup	R600/SI: Start working on a Scheduler for SI.	Vincent Lejeune	11 years
radeonsi-backup2	R600/SI: Add support for new vector intrinsic related callbacks	Vincent Lejeune	11 years
radeonsi-scheduling	fixe for scheduler	Vincent Lejeune	10 years
scheduling-backup	R600: Recompute schedule graph non order dependencies.	Vincent Lejeune	11 years
textures	fix the trans bs too	Vincent Lejeune	11 years
vliw5	Revert "R600: Recompute schedule graph non order dependencies."	Vincent Lejeune	11 years
[...]


Age	Commit message	Author	Files	Lines
2013-01-20	cover bitcast when explodingcodesize	Vincent Lejeune	2	-0/+10
2013-01-20	radeon/llvm: switch instructions matching fmul and int_AMDGPU_mul	Vincent Lejeune	3	-7/+8
2013-01-20	Initial work to fold	Vincent Lejeune	2	-3/+40
2013-01-19	R600: improve inputs/interpolation handling	Vadim Girlin	10	-251/+124
2013-01-18	R600: add a llvm.R600.store.swizzle intrinsics	Vincent Lejeune	3	-2/+31
2013-01-18	R600: simplify stream outputs intrinsic	Vincent Lejeune	5	-47/+13
2013-01-18	R600: rework handling of the constants	Vadim Girlin	16	-104/+483
2013-01-18	R600: Add a CONST_ADDRESS node to model constant buf read	Vincent Lejeune	3	-1/+12
2013-01-18	R600: Factorise VTX_WORD0 and VTX_WORD1 in tblgen def	Vincent Lejeune	1	-45/+65
2013-01-16	R600/SI: Use unnormalized coordinates for sampling with the RECT target.	Michel Dänzer	2	-0/+13
[...]

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