~sima/drm - danvet's drm/ playground

Age	Commit message (Expand)	Author	Files	Lines
2023-12-06	RISC-V: hwprobe: Always use u64 for extension bits	Andrew Jones	1	-1/+1
2023-11-08	Merge tag 'riscv-for-linus-6.7-rc1' of git://git.kernel.org/pub/scm/linux/ker...	Linus Torvalds	1	-14/+32
2023-10-10	docs: move riscv under arch	Costa Shulyupin	1	-1/+1
2023-09-21	RISC-V: hwprobe: Expose Zicboz extension and its block size	Andrew Jones	1	-14/+32
2023-08-23	riscv: Implement syscall wrappers	Sami Tolvanen	1	-0/+6
2023-06-19	Merge patch series "RISC-V: Export Zba, Zbb to usermode via hwprobe"	Palmer Dabbelt	1	-10/+44
2023-06-19	RISC-V: hwprobe: Expose Zba, Zbb, and Zbs	Evan Green	1	-7/+41
2023-06-08	riscv: hwprobe: Add support for probing V in RISCV_HWPROBE_KEY_IMA_EXT_0	Andy Chiu	1	-0/+4
2023-04-26	RISC-V: hwprobe: Explicity check for -1 in vdso init	Andrew Jones	1	-1/+1
2023-04-26	RISC-V: hwprobe: There can only be one first	Andrew Jones	1	-1/+3
2023-04-18	RISC-V: Add hwprobe vDSO function and data	Evan Green	1	-0/+45
2023-04-18	RISC-V: hwprobe: Support probing of misaligned access performance	Evan Green	1	-0/+28
2023-04-18	RISC-V: hwprobe: Add support for RISCV_HWPROBE_BASE_BEHAVIOR_IMA	Evan Green	1	-0/+20
2023-04-18	RISC-V: Add a syscall for HW probing	Evan Green	1	-1/+134
2022-09-22	riscv: Allow PROT_WRITE-only mmap()	Andrew Bresticker	1	-3/+0
2022-07-21	riscv: mmap with PROT_WRITE but no PROT_READ is invalid	Celeste Liu	1	-3/+2
2022-04-26	riscv: compat: syscall: Add compat_sys_call_table implementation	Guo Ren	1	-2/+4
2020-06-18	RISC-V: Don't allow write+exec only page mapping request in mmap	Yash Shah	1	-0/+6
2019-06-05	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	Thomas Gleixner	1	-9/+1
2018-08-28	RISC-V: Use a less ugly workaround for unused variable warnings	Palmer Dabbelt	1	-14/+1
2018-08-20	RISC-V: Define sys_riscv_flush_icache when SMP=n	Palmer Dabbelt	1	-2/+10
2018-04-02	mm: add ksys_mmap_pgoff() helper; remove in-kernel calls to sys_mmap_pgoff()	Dominik Brodowski	1	-2/+2
2017-12-11	RISC-V: Logical vs Bitwise typo	Dan Carpenter	1	-1/+1
2017-11-30	RISC-V: Clean up an unused include	Palmer Dabbelt	1	-1/+0
2017-11-30	RISC-V: Allow userspace to flush the instruction cache	Andrew Waterman	1	-0/+32
2017-09-26	RISC-V: User-facing API	Palmer Dabbelt	1	-0/+49