diff options
author | Dave Jones <davej@redhat.com> | 2011-02-18 13:48:05 -0500 |
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committer | Dave Jones <davej@redhat.com> | 2011-02-18 13:48:05 -0500 |
commit | c4f5df2a22fced48450af08c0623ac38bea4f307 (patch) | |
tree | ec72729c5850f5fe9d89c2d4e800e4a252ebb22f /Intel | |
parent | baac19e85f3265c68d264724b79f5bcd3c95e91d (diff) |
IA32_PERF_STATUS is model specific.
We shouldn't try to parse it using the encoding of one ancient CPU,
as the results are likely to be incorrect.
Just dump it raw for now. I don't particularly feel like looking
up the encoding for every CPU, so this is probably how this is going
to stay. For people who care, they can download the spec for their
CPU and decode it by hand.
Diffstat (limited to 'Intel')
-rw-r--r-- | Intel/MSR-PM.c | 26 |
1 files changed, 4 insertions, 22 deletions
diff --git a/Intel/MSR-PM.c b/Intel/MSR-PM.c index dea76ab..f00034d 100644 --- a/Intel/MSR-PM.c +++ b/Intel/MSR-PM.c @@ -13,7 +13,7 @@ #include "../x86info.h" #include "Intel.h" -void dump_centrino_MSRs (struct cpudata *cpu) +void dump_centrino_MSRs(struct cpudata *cpu) { unsigned long long val = 0; int tcc = 0; @@ -21,28 +21,10 @@ void dump_centrino_MSRs (struct cpudata *cpu) if (!user_is_root) return; - printf("Pentium M MSRs:\n"); + if (read_msr(cpu->number, MSR_IA32_PERF_STATUS, &val) == 1) + printf("MSR_IA32_PERF_STATUS: %llx\n", val); - if (read_msr (cpu->number, MSR_IA32_PERF_STATUS, &val) == 1) { - /* - Voltage and frequency values derived from 1300MHz - Pentium M in an IBM ThinkPad X31. Constants for - voltage function derived from voltage points documented - in Pentium M datasheet (Intel document 25261201.pdf, - table 5), and ACPI power management tables. - - This register is specifically documented as - implementation-defined, so it may not apply to - other Enhanced SpeedStep enabled CPUs, or even other - Pentium Ms. - */ - unsigned uv = (unsigned)val & 0xffff; - int volt = (uv & 0xff) * 16 + 700; - int mhz = 100 * (uv & 0xff00) >> 8UL; - printf(" Current performance mode is 0x%04x: %dMHz, %d.%dV\n", - uv, mhz, volt/1000, volt%1000); - } - if (read_msr (cpu->number, MSR_IA32_MISC_ENABLE, &val) == 1) { + if (read_msr(cpu->number, MSR_IA32_MISC_ENABLE, &val) == 1) { printf(" Enabled: "); if (val & (1<<3)) { printf("TCC "); |