summaryrefslogtreecommitdiff
path: root/Intel/MSR-PM.c
blob: f00034da956a571fb8de63770979f3ef307867fa (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
/*
 *  (C) 2002 Dave Jones.
 *
 *  Licensed under the terms of the GNU GPL License version 2.
 *
 *  Intel Pentium M specific MSR information
 *  See 24547203.pdf for more details.
 */

#include <stdio.h>
#include <unistd.h>
#include <sys/types.h>
#include "../x86info.h"
#include "Intel.h"

void dump_centrino_MSRs(struct cpudata *cpu)
{
	unsigned long long val = 0;
	int tcc = 0;

	if (!user_is_root)
		return;

	if (read_msr(cpu->number, MSR_IA32_PERF_STATUS, &val) == 1)
		printf("MSR_IA32_PERF_STATUS: %llx\n", val);

	if (read_msr(cpu->number, MSR_IA32_MISC_ENABLE, &val) == 1) {
		printf("  Enabled: ");
		if (val & (1<<3)) {
			printf("TCC ");
			tcc = 1;
		}
		if (val & (1<<7))
			printf("PerfMon ");
		if (val & (1<<10))
			printf("FERR# ");
		if (val & (1<<11))
			printf("noBTS ");
		if (val & (1<<12))
			printf("noPEBS ");
		if (val & (1<<16))
			printf("EnhancedSpeedStep ");

		printf("\n");
	}
	if (tcc && read_msr (cpu->number, MSR_PM_THERM2_CTL, &val) == 1) { /* THERM2_CTL */
		printf("  Thermal monitor %d\n", (val & (1<<16)) ? 2 : 1);
	}
	if (read_msr (cpu->number, MSR_IA32_THERM_CONTROL, &val) == 1) {
		if (val & (1<<4)) {
			printf("  Software-controlled clock: %f%% duty cycle\n",
			       ((val >> 1) & 7) / 8.);
		} else
			printf("  Software-controlled clock disabled (full speed)\n");
	}
	if (read_msr (cpu->number, MSR_IA32_THERM_STATUS, &val) == 1) { /* THERM_STATUS */
		printf("  Thermal status: ");
		if (val & (1<<0))
			printf("TooHot ");
		if (val & (1<<1))
			printf("WasTooHot ");
		printf("\n");
	}
	printf("\n");
}