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2015-01-29SKL: Add function intel_gpgpu_bind_image_gen9.Yang Rong4-6/+90
2015-01-29SKL: add skl select_pipeline and cache_control functions.Yang Rong2-2/+25
2015-01-29SKL: Add the function gen9' intel_build_idrt.Yang Rong2-3/+48
2015-01-29SKL: correct the pipe control struct.Yang Rong2-2/+77
2015-01-29SKL: Use TILE_Y as default TILING mode in skl.Yang Rong1-1/+2
2015-01-29SKL: enable skl device.Yang Rong3-3/+73
2015-01-29SKL: Add skl pci ids and device.Yang Rong2-3/+164
2015-01-23loose the alignment limitation for host_ptr of CL_MEM_USE_HOST_PTRGuo Yejun3-4/+22
2015-01-23correct the cache line size to be 64Guo Yejun2-2/+2
2015-01-13Fix the printf buffer size bug.Junyan He4-5/+9
2015-01-12add CMake option USE_STANDALONE_GBE_COMPILER and STANDALONE_GBE_COMPILER_DIRGuo Yejun1-2/+3
2015-01-09CL/Driver/HSW: Convert L3 cycle for texture to uncachable.Zhigang Gong1-1/+1
2015-01-07CL/Driver: quick fix regression caused by remove MI_FLUSH.Zhigang Gong1-0/+2
2015-01-07CL/Driver: enable atomics in L3 for HSW.Zhigang Gong2-1/+14
2015-01-06Remove obsolete MI_FLUSHZhenyu Wang4-11/+3
2015-01-04runtime: fix max work group size for IVBGT1.Zhigang Gong1-2/+2
2015-01-04runtime: tweak max memory allocation size.Zhigang Gong2-2/+12
2014-12-29Separate flush and invalidate in function intel_gpgpu_pipe_control.Yang, Rong2-2/+36
2014-12-29Use libdrm interface to get device idZhenyu Wang2-22/+2
2014-12-29Add aub dump supportZhenyu Wang1-1/+16
2014-12-25Remove deprecated fulsim codeZhenyu Wang3-237/+1
2014-12-25fix min_max_read_image_args and min_max_parameter_size issue.Luo Xionghu6-6/+7
2014-12-23fix max_parameter_size not correct on x86 platforms.Luo Xionghu2-2/+2
2014-12-18GBE/CL: use 2D image to implement large image1D_buffer.Zhigang Gong4-12/+50
2014-12-18GBE: switch to CLANG native sampler_t.Zhigang Gong1-7/+5
2014-12-03Change CL_DEVICE_PREFERRED_VECTOR_WIDTH_CHAR from 8 to 16.Chuanbo Weng1-1/+1
2014-12-02enable CL_MEM_ALLOC_HOST_PTR with user_ptr to avoid copy between GPU/CPUGuo Yejun3-16/+33
2014-12-02clean code, the logic is already at the beginning of functionGuo Yejun1-16/+0
2014-12-02Fix based on piglit OpenCL falied case (cl-api-compile-program).Yan Wang1-4/+2
2014-11-28fix issue to pass utest of runtime_climage_from_boname for BDWGuo Yejun1-2/+2
2014-11-27fix issue to create cl image from libva with non-zero offsetGuo Yejun4-7/+5
2014-11-24Change the IVB/HSW's max_work_group_size to 512, and BYT to 256.Yang Rong1-15/+15
2014-11-21Fix the opencv_test_core/OCL_Arithm random segment fault.Yang Rong1-37/+36
2014-11-21BDW: Change the default tiling mode to TILING_Y on BDW.Yang Rong1-3/+7
2014-11-19Fix NO_TILING alignment bug.Yang Rong1-1/+1
2014-11-19re-enable userptr with fix: CPU access after GPU finishes the renderingGuo Yejun2-8/+35
2014-11-18Change the IVB/HSW L3 SQC credit setting.Yang Rong1-2/+2
2014-11-18Remove patch version on master branch.Zhigang Gong1-1/+0
2014-11-13Fix the bug of multi-thread crashJunyan He1-13/+0
2014-11-13runtime: fix bug in cl_enqueue_read_buffer.Zhigang Gong1-3/+8
2014-11-13runtime: refine version handling.Zhigang Gong2-0/+5
2014-11-12runtime: fix one bug in BDW image.Zhigang Gong1-2/+4
2014-11-12Revert "BDW: Change the default tiling mode to TILING_Y on BDW."Zhigang Gong1-8/+4
2014-11-11License: adjust all license version to LGPL v2.1+.Zhigang Gong57-57/+57
2014-11-11Revert "fix issue to create cl image from libva with non-zero offset"Zhigang Gong4-7/+9
2014-11-10use posix_memalign instead of aligned_alloc to be more compatibleGuo Yejun1-7/+11
2014-11-10BDW: Change the default tiling mode to TILING_Y on BDW.Yang Rong1-4/+8
2014-11-10fix issue to create cl image from libva with non-zero offsetGuo Yejun4-9/+7
2014-11-10fix a bug in clCompileProgram().Luo Xionghu1-0/+4
2014-11-10fix piglit clCreateProgramWithBinary fail.Luo Xionghu1-0/+8
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