diff options
| author | Yang Rong <rong.r.yang@intel.com> | 2014-11-10 16:00:25 +0800 |
|---|---|---|
| committer | Zhigang Gong <zhigang.gong@intel.com> | 2014-11-10 15:23:18 +0800 |
| commit | f2c57a46de4f51fa5d4c8e02cc751fce7ff417c8 (patch) | |
| tree | 54d63421d3c20d996a06feabac5ac423d50d5bbf /src | |
| parent | 9e236b18542f2564e399bf13d4d1fbcc48a5ec9f (diff) | |
BDW: Change the default tiling mode to TILING_Y on BDW.
TILING_Y's performance is better than TILING_X'S on BDW, but almost same
on IVB/HSW. Using the TILING_Y as default tiling mode temporary, still need
to find out the root cause why different behavior between BDW and IVB/HSW.
Signed-off-by: Yang Rong <rong.r.yang@intel.com>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Diffstat (limited to 'src')
| -rw-r--r-- | src/cl_mem.c | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/src/cl_mem.c b/src/cl_mem.c index cbe7c5b6..93918f7d 100644 --- a/src/cl_mem.c +++ b/src/cl_mem.c @@ -637,10 +637,14 @@ cl_mem_copy_image(struct _cl_mem_image *image, cl_mem_unmap_auto((cl_mem)image); } -cl_image_tiling_t cl_get_default_tiling(void) +cl_image_tiling_t cl_get_default_tiling(cl_driver drv) { static int initialized = 0; - static cl_image_tiling_t tiling = CL_TILE_X; + cl_image_tiling_t tiling = CL_TILE_X; + + // FIXME, need to find out the performance diff's root cause on BDW. + if(cl_driver_get_ver(drv) == 8) + tiling = CL_TILE_Y; if (!initialized) { char *tilingStr = getenv("OCL_TILING"); if (tilingStr != NULL) { @@ -733,7 +737,7 @@ _cl_mem_new_image(cl_context ctx, /* Pick up tiling mode (we do only linear on SNB) */ if (cl_driver_get_ver(ctx->drv) != 6) - tiling = cl_get_default_tiling(); + tiling = cl_get_default_tiling(ctx->drv); depth = 1; } else if (image_type == CL_MEM_OBJECT_IMAGE3D || @@ -743,7 +747,7 @@ _cl_mem_new_image(cl_context ctx, h = 1; tiling = CL_NO_TILE; } else if (cl_driver_get_ver(ctx->drv) != 6) - tiling = cl_get_default_tiling(); + tiling = cl_get_default_tiling(ctx->drv); size_t min_pitch = bpp * w; if (data && pitch == 0) |