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authorMatt Arsenault <Matthew.Arsenault@amd.com>2014-09-11 17:34:19 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2014-09-11 17:34:19 +0000
commit31b1bdbd959dcae3384f1306107510dc018b403d (patch)
treeb0e205107f3f5c1bb5465d846c230914acb24d2f /test/CodeGen/R600/trunc.ll
parent761ca139910edabca9320120b1df841001dcd504 (diff)
Add DAG combine for shl + add of constants.
Do (shl (add x, c1), c2) -> (add (shl x, c2), c1 << c2) This is already done for multiplies, but since multiplies by powers of two are turned into shifts, we also need to handle it here. This might want checks for isLegalAddImmediate to avoid transforming an add of a legal immediate with one that isn't. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217610 91177308-0d34-0410-b5e6-96231b3b80d8
Diffstat (limited to 'test/CodeGen/R600/trunc.ll')
-rw-r--r--test/CodeGen/R600/trunc.ll6
1 files changed, 3 insertions, 3 deletions
diff --git a/test/CodeGen/R600/trunc.ll b/test/CodeGen/R600/trunc.ll
index cee0f4e2b62..2f4b48236d4 100644
--- a/test/CodeGen/R600/trunc.ll
+++ b/test/CodeGen/R600/trunc.ll
@@ -31,10 +31,10 @@ define void @trunc_load_shl_i64(i32 addrspace(1)* %out, i64 %a) {
; SI-LABEL: @trunc_shl_i64:
; SI: S_LOAD_DWORDX2 s{{\[}}[[LO_SREG:[0-9]+]]:{{[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0xd
-; SI: S_ADD_U32 s[[LO_SREG2:[0-9]+]], s[[LO_SREG]],
+; SI: S_LSHL_B64 s{{\[}}[[LO_SHL:[0-9]+]]:{{[0-9]+\]}}, s{{\[}}[[LO_SREG]]:{{[0-9]+\]}}, 2
+; SI: S_ADD_U32 s[[LO_SREG2:[0-9]+]], s[[LO_SHL]],
; SI: S_ADDC_U32
-; SI: S_LSHL_B64 s{{\[}}[[LO_SHL:[0-9]+]]:{{[0-9]+\]}}, s{{\[}}[[LO_SREG2]]:{{[0-9]+\]}}, 2
-; SI: V_MOV_B32_e32 v[[LO_VREG:[0-9]+]], s[[LO_SHL]]
+; SI: V_MOV_B32_e32 v[[LO_VREG:[0-9]+]], s[[LO_SREG2]]
; SI: BUFFER_STORE_DWORD v[[LO_VREG]],
define void @trunc_shl_i64(i64 addrspace(1)* %out2, i32 addrspace(1)* %out, i64 %a) {
%aa = add i64 %a, 234 ; Prevent shrinking store.