[RegBankSelect] Specify different optimization mode for the pass.

The mode should be choose by the target when instantiating the pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270235 91177308-0d34-0410-b5e6-96231b3b80d8

1 files changed, 15 insertions, 2 deletions

diff --git a/include/llvm/CodeGen/GlobalISel/RegBankSelect.h b/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
index d329d529246..c08c69adb6b 100644
--- a/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
+++ b/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
@@ -80,6 +80,16 @@ class RegBankSelect : public MachineFunctionPass {
 public:
   static char ID;
 
+  /// List of the modes supported by the RegBankSelect pass.
+  enum Mode {
+    /// Assign the register banks as fast as possible (default).
+    Fast,
+    /// Greedily minimize the cost of assigning register banks.
+    /// This should produce code of greater quality, but will
+    /// require more compile time.
+    Greedy
+  };
+
   /// Abstract class used to represent an insertion point in a CFG.
   /// This class records an insertion point and materializes it on
   /// demand.
@@ -453,6 +463,9 @@ private:
   /// Helper class used for every code morphing.
   MachineIRBuilder MIRBuilder;
 
+  /// Optimization mode of the pass.
+  Mode OptMode;
+
   /// Assign the register bank of each operand of \p MI.
   void assignInstr(MachineInstr &MI);
 
@@ -535,8 +548,8 @@ private:
                     SmallVectorImpl<RepairingPlacement> &RepairPts);
 
 public:
-  // Ctor, nothing fancy.
-  RegBankSelect();
+  /// Create a RegBankSelect pass with the specified \p RunningMode.
+  RegBankSelect(Mode RunningMode = Fast);
 
   const char *getPassName() const override {
     return "RegBankSelect";