[RegBankSelect] Specify different optimization mode for the pass.

The mode should be choose by the target when instantiating the pass.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@270235 91177308-0d34-0410-b5e6-96231b3b80d8

2 files changed, 19 insertions, 4 deletions

diff --git a/include/llvm/CodeGen/GlobalISel/RegBankSelect.h b/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
index d329d529246..c08c69adb6b 100644
--- a/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
+++ b/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
@@ -80,6 +80,16 @@ class RegBankSelect : public MachineFunctionPass {
 public:
   static char ID;
 
+  /// List of the modes supported by the RegBankSelect pass.
+  enum Mode {
+    /// Assign the register banks as fast as possible (default).
+    Fast,
+    /// Greedily minimize the cost of assigning register banks.
+    /// This should produce code of greater quality, but will
+    /// require more compile time.
+    Greedy
+  };
+
   /// Abstract class used to represent an insertion point in a CFG.
   /// This class records an insertion point and materializes it on
   /// demand.
@@ -453,6 +463,9 @@ private:
   /// Helper class used for every code morphing.
   MachineIRBuilder MIRBuilder;
 
+  /// Optimization mode of the pass.
+  Mode OptMode;
+
   /// Assign the register bank of each operand of \p MI.
   void assignInstr(MachineInstr &MI);
 
@@ -535,8 +548,8 @@ private:
                     SmallVectorImpl<RepairingPlacement> &RepairPts);
 
 public:
-  // Ctor, nothing fancy.
-  RegBankSelect();
+  /// Create a RegBankSelect pass with the specified \p RunningMode.
+  RegBankSelect(Mode RunningMode = Fast);
 
   const char *getPassName() const override {
     return "RegBankSelect";
diff --git a/lib/CodeGen/GlobalISel/RegBankSelect.cpp b/lib/CodeGen/GlobalISel/RegBankSelect.cpp
index 6a2fd335b3b..9586223ac13 100644
--- a/lib/CodeGen/GlobalISel/RegBankSelect.cpp
+++ b/lib/CodeGen/GlobalISel/RegBankSelect.cpp
@@ -29,8 +29,9 @@ INITIALIZE_PASS(RegBankSelect, "regbankselect",
                 "Assign register bank of generic virtual registers",
                 false, false);
 
-RegBankSelect::RegBankSelect()
-    : MachineFunctionPass(ID), RBI(nullptr), MRI(nullptr) {
+RegBankSelect::RegBankSelect(Mode RunningMode)
+    : MachineFunctionPass(ID), RBI(nullptr), MRI(nullptr),
+      OptMode(RunningMode) {
   initializeRegBankSelectPass(*PassRegistry::getPassRegistry());
 }
 
@@ -39,6 +40,7 @@ void RegBankSelect::init(MachineFunction &MF) {
   assert(RBI && "Cannot work without RegisterBankInfo");
   MRI = &MF.getRegInfo();
   TRI = MF.getSubtarget().getRegisterInfo();
+  assert(OptMode == Mode::Fast && "Non-fast mode not implemented");
   MIRBuilder.setMF(MF);
 }