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2024-07-10tests/intel-ci/xe-fast-feedback: Add SR-IOV testsHEADmasterJakub Kolakowski1-0/+2
Add SR-IOV tests to xe-fast-feedback testlist so that they will be executed in BAT runs. Added tests will exercise: - enabling maximum number of VFs without autoprobe - enabling one VF with autoprobe Signed-off-by: Jakub Kolakowski <jakub1.kolakowski@intel.com> Cc: Adam Miszczak <adam.miszczak@intel.com> Cc: Marcin Bernatowicz <marcin.bernatowicz@intel.com> Cc: Lukasz Laguna <lukasz.laguna@intel.com> Cc: Michal Wajdeczko <Michal.Wajdeczko@intel.com> Reviewed-by: Marcin Bernatowicz <marcin.bernatowicz@linux.intel.com>
2024-07-08lib/i915/perf: Add ARL support in IGT perf libraryUmesh Nerlige Ramappa2-0/+50
Add ARL PCI ids for ARL in IGT perf library. Resolves: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/11356 Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2024-07-08lib/igt_device_scan: Skip attributes in subdirectoriesMarcin Bernatowicz1-0/+4
Skip reading attributes in subdirectories as they are not used for filtering. This change improves speed and reduces the impact of non-DRM related component bugs on testing, such as the ASPM exposed link/l1_aspm attribute issue. After removing a Virtual Function (VF), accessing the link/l1_aspm attribute on the Physical Function (PF) leads to NPD. v2: removed unrelated changes, improved description (Michal) Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com> Cc: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@linux.intel.com> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
2024-07-05tests/intel/xe_oa: Drop "xe-ref-count" subtestAshutosh Dixit1-107/+0
Sometime other modules (such as those for child devices) take or drop references on the xe module. This results in "xe-ref-count" subtest unable to accurately predict what the module refcount should be, resulting in frequent false positives in the test. Drop the test till we are able to devise a robust method to predict xe module refcount. Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-07-05tests/intel/xe_oa: Register whitelisting and MMIO trigger testsAshutosh Dixit1-0/+327
Add the following tests: * "oa-regs-whitelisted" * "mmio-triggered-reports" v2: Rename xe perf layer as xe observation layer Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-07-05tests/intel/xe_oa: OA buffer mmap testsAshutosh Dixit1-0/+251
Add the following tests: * "map-oa-buffer" * "invalid-map-oa-buffer" * "non-privileged-map-oa-buffer" * "non-privileged-access-vaddr" * "privileged-forked-access-vaddr" * "closed-fd-and-unmapped-access" Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-07-05tests/intel/xe_oa: add remove OA config testsAshutosh Dixit1-0/+333
Add the following tests: * "invalid-create-userspace-config" * "invalid-remove-userspace-config" * "create-destroy-userspace-config" * "whitelisted-registers-userspace-config" v2: Rename xe perf layer as xe observation layer Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-07-05tests/intel/xe_oa: Exclusive/concurrent access, rc6 and stress open closeAshutosh Dixit1-0/+264
Add the following tests: * "oa-unit-exclusive-stream-sample-oa" * "oa-unit-exclusive-stream-exec-q" * "oa-unit-concurrent-oa-buffer-read" * "rc6-disable" * "stress-open-close" v2: Rename xe perf layer as xe observation layer Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-07-05tests/intel/xe_oa: OAR/OAC testsAshutosh Dixit1-0/+701
"mi-rpc", "oa-tlb-invalidate" and "unprivileged-single-ctx-counters" tests. v2: Run "oa-tlb-invalidate" only for specific product versions (Umesh) v3: Rename xe perf layer as xe observation layer Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-07-05tests/intel/xe_oa: blocking and polling testsAshutosh Dixit1-0/+463
"blocking", "polling" and "polling-small-buf". v2: Rename xe perf layer as xe observation layer Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-07-05tests/intel/xe_oa: buffer-fill, non-zero-reason, enable-disableAshutosh Dixit1-0/+606
Add the following tests: "buffer-fill" "non-zero-reason" "disabled-read-error" "enable-disable" "short-reads" v2: Rename xe perf layer as xe observation layer Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-07-05tests/intel/xe_oa: Add oa exponent testsAshutosh Dixit1-0/+407
Add "invalid-oa-exponent" and "oa-exponents". v2: Remove ICL specific functionality (Umesh) v3: Rename xe perf layer as xe observation layer Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-07-05tests/intel/xe_oa: Add "oa-formats" subtestAshutosh Dixit1-0/+465
Add "oa-formats" subtest. v2: Remove undefined_a_counters (Umesh) Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-07-05tests/intel/xe_oa: Add some negative testsAshutosh Dixit1-0/+195
Add: "non-system-wide-paranoid" "invalid-oa-metric-set-id" "invalid-oa-format-id" "missing-sample-flags" v2: Rename xe perf layer as xe observation layer v3: Run on Xe2+ only Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-07-05tests/intel/xe_oa: Add first testsAshutosh Dixit3-1/+808
Add "xe-ref-count" and "sysctl-defaults" subtests. v2: Set INTEL_XE_DEVICE_MAX_SUBSLICES to 64 (value on PVC) v3: Rename xe perf layer as xe observation layer Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-07-05lib/xe/oa: Add PVC supportAshutosh Dixit3-3/+1024
Add oa-pvc.xml and enable support for PVC. Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-07-05drm-uapi/xe: Sync with Perf/Observation layer uapi updatesAshutosh Dixit5-64/+66
Align with kernel commit 8169b2097d88 ("drm/xe/uapi: Rename xe perf layer as xe observation layer") which changes uapi to rename perf streams to observation streams. Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com> Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com>
2024-07-05tests/intel/xe_pat: account for Wa_16023588340Matthew Auld1-2/+19
We can't use the CLOS3 entries on BMG g21. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
2024-07-05lib/intel_pat: account for Wa_16023588340Matthew Auld1-0/+4
We can't use the CLOS3 entries on BMG g21. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
2024-07-03test/xe_gt_freq: Add helper to read RPe freqVinay Belgaumkar1-22/+18
We are seeing a possible switch in RPe right after RC6 wakeup. Ensure we obtain the latest RPe by reading it every time. If pcode does change the RPe after RC6 exit, the cur frequency should get updated to match it. v2: Rebase and add another comment to commit message (Badal) Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1414 Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/1829 Fixes: adcc68266b8e ("tests/intel/xe_gt_freq: Check for RPe freq updates") Reviewed-by: Badal Nilawar <badal.nilawar@intel.com> Signed-off-by: Vinay Belgaumkar <vinay.belgaumkar@intel.com>
2024-07-03tests/amdgpu: add amd dispatch subtestJesse Zhang5-26/+93
Add more cases to trigger gpu reset. 1. Using invalid user data to trigger a gpu reset. 2. Use invalid shadow program address to trigger gpu reset. 3. Use invalid shader settings to trigger a gpu reset. V2: Rename cases and map them for easier maintenance.(Vitaly) Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com> Signed-off-by: Jiadong Zhu <Jiadong.Zhu@amd.com> Reviewed-by: Vitaly Prosyak <vitaly.prosyak@amd.com>
2024-07-03Revert "lib/igt_kmod: unload mei_gsc_proxy for Intel drivers"Kamil Konieczny1-2/+0
This reverts commit c7650224f5d2af27c3500732a98ead3c3fab61f3. Unloading this module breaks runs for i915 on integrated GPU starting from MeteorLake, it should be applied only on discrete. Cc: Alexander Usyskin <alexander.usyskin@intel.com> Cc: Jakub Kolakowski <jakub1.kolakowski@intel.com> Cc: Peter Senna Tschudin <peter.senna.tschudin@intel.com> Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com> Acked-by: Jakub Kolakowski <jakub1.kolakowski@intel.com>
2024-07-03docs/chamelium: update broken linksVignesh Raman1-3/+4
The previous links to the chamelium documentation and setup instructions were no longer working. Update with new valid links. Cc: Rob Clark <robdclark@gmail.com> Cc: Rob Clark <robdclark@chromium.org> Cc: Helen Koike <helen.koike@collabora.com> Cc: Daniel Stone <daniels@collabora.com> Acked-by: Kamil Konieczny <kamil.konieczny@linux.intel.com> Signed-off-by: Vignesh Raman <vignesh.raman@collabora.com>
2024-07-03tests/intel/xe_intel_bb: Reduce render subtest execution timeZbigniew Kempczyński1-5/+6
Test xe_intel_bb verifies intel-bb so it doesn't make sense to perform large render operations as those are covered in xe_render_copy test. Use 256px surface for render instead of 512 and 1024 px. Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com> Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com> Acked-by: Katarzyna Piecielska <katarzyna.piecielska@intel.com> Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
2024-07-03tools/lsgpu: Add switch to display gpu pci devicesZbigniew Kempczyński1-2/+92
Device scanning in IGT is based on iterating over udev drm devices. This limits to display only to devices which have driver loaded. To remove this limitation add dedicated udev pci scanning in lsgpu which displays all gpu devices (pci class 0x30000 or 0x38000). Cc: Jani Nikula <jani.nikula@intel.com> Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com> Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com> Link: https://lore.kernel.org/r/20240702082203.165672-1-zbigniew.kempczynski@intel.com Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
2024-07-03tests/kms_vrr: Cleanup in creating the virtual modeBhanuprakash Modem1-9/+9
Cleanup the function to create the virtual mode, so that it could be re-used. V2: - Fix argument type (Bhanu) Cc: Manasi Navare <navaremanasi@chromium.org> Cc: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com> Signed-off-by: Bhanuprakash Modem <bhanuprakash.modem@intel.com> Reviewed-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
2024-07-02lib/igt_sriov_device: Replace libpciaccess with direct sysfs interactionMarcin Bernatowicz1-7/+39
Previously, libpciaccess was used to fetch PCI device information for VFs in SR-IOV, which does not refresh the PCI bus state after the initial scan. This can lead to outdated PCI information in dynamic SR-IOV environments where VFs are dynamically managed. The new implementation directly interacts with sysfs to resolve the PCI slot address of a VF, ensuring access to the most current state of the PCI bus. This change removes the dependency on libpciaccess and uses __igt_sriov_get_vf_pci_slot_alloc to fetch the PCI slot addresses directly from sysfs based on VF numbers. Reported-by: Michal Wajdeczko <michal.wajdeczko@intel.com> Closes: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-135423v1/shard-adlp-9/igt@sriov_basic@bind-unbind-vf@vf-2.html Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: Lukasz Laguna <lukasz.laguna@intel.com> Cc: Kamil Konieczny <kamil.konieczny@linux.intel.com> Signed-off-by: Marcin Bernatowicz <marcin.bernatowicz@linux.intel.com> Reviewed-by: Lukasz Laguna <lukasz.laguna@intel.com>
2024-07-02intel/xe_exec_sip: add shader sanity testAndrzej Hajda4-1/+342
xe_exec_sip will contain tests for shader and system routine (SIP) interaction. Shaders (also called kernels) are programs running on execution units(EUs). They can generate exceptions, which should be handled by SIP. For starters let's implement test checking if shader runs correctly. v2: - use introduced helper to access sysfs attributes, - remove redundant xe_device_get, - use drm_close_driver v3: - switched to old style multiline string literals to satisfy clang v6: - updated test description and commit subject v7: - fix comment tags Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> Reviewed-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
2024-07-02lib/igt_sysfs: add helpers to access engine sysfs directoryAndrzej Hajda2-0/+74
Helpers follow convention of xe_sysfs_gt_(path|open). v7: - staticize local const array v8: - added xe_ prefix to local helper Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> Reviewed-by: Kamil Konieczny <kamil.konieczny@linux.intel.com>
2024-07-02lib/gpgpu_shader: add inline support for iga64 assemblyAndrzej Hajda8-4/+239
With this patch adding iga64 assembly should be similar to adding x86 assembly inline. Simple example: emit_iga64_code(shdr, set_exception, R"ASM( or (1|M0) cr0.1<1>:ud cr0.1<0;1,0>:ud ARG(0):ud )ASM", value); Note presence of 'ARG(0)', it will be replaced by 'value' argument, multiple arguments are possible. More sophisticated examples in following patches. How does it works: 1. Raw string literals (C++ feature available in gcc as extension): R"ASM(...)ASM" allows to use multiline/unescaped string literals. If for some reason they cannot be used we could always fallback to old ugly way of handling multiline strings with escape characters: emit_iga64_code(shdr, set_exception, "\n\ or (1|M0) cr0.1<1>:ud cr0.1<0;1,0>:ud ARG(0):ud\n\ ", value); 2. emit_iga64_code puts the assembly string into special linker section, and calls __emit_iga64_code with pointer to external variable which will contain code templates generated from the assembly for all supported platforms, remaining arguments are put to temporal array to eventually patch the code with positional arguments. 3. During build phase the linker section is scanned for assemblies. Every assembly is preprocessed with cpp, to replace ARG(x) macros with magic numbers, and to provide different code for different platforms if needed. Then output file is compiled with iga64, and then .c file is generated with global variables pointing to hexified iga64 codes. v2: - fixed meson paths to script, - added check if compiler supports all platforms, - include assembly names in MD5 calculations, - use more specific name for MD5 sum v3: - bump minimal meson version to kill "ERROR: Expecting eol got id." bug v4: - set minimal meson to 0.49.2 - builder uses it v5: - revert back minimal ver of meson, instead use old syntax a.contains(b) v6: - generate_iga64_codes moved to scripts dir, - added include guards to iga64_macros.h v7: - use C++ style comments in generated file, - style fixes v8: - added sanity check for assembly Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> Reviewed-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
2024-07-02lib/gpgpu_shader: tooling for preparing and running gpgpu shadersAndrzej Hajda3-0/+251
Implement tooling for building shaders for specific generations. The library allows you to build and run shader from precompiled blocks and provides an abstraction layer over gpgpu pipeline. v8: added asserts after memory allocations. Signed-off-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com> Signed-off-by: Christoph Manszewski <christoph.manszewski@intel.com> Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> Acked-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
2024-07-02lib/gpu_cmds: add Xe_LP version of emit_vfe_stateAndrzej Hajda2-6/+52
In Xe_LP version there is added argument to control EU thread dispatching mode. For shaders lagacy mode is used. v2: added commit description v6: added public function descriptions v8: removed spare return from void function Signed-off-by: Andrzej Hajda <andrzej.hajda@intel.com> Reviewed-by: Dominik Grzegorzek <dominik.grzegorzek@intel.com>
2024-07-02lib/igt_kmod: unload mei_gsc_proxy for Intel driversKamil Konieczny1-0/+2
For Intel i915 or Xe drivers we should unload mei_gsc_proxy before mei_gsc, otherwise unloading mei_gsc could fail. Cc: Alexander Usyskin <alexander.usyskin@intel.com> Signed-off-by: Kamil Konieczny <kamil.konieczny@linux.intel.com> Reviewed-by: Peter Senna Tschudin <peter.senna.tschudin@intel.com>
2024-06-29xe/oa/oa-metricset-codegen: Fix XE_OA_FORMAT_PEC64u64 offsetsJosé Roberto de Souza1-5/+1
XE_OA_FORMAT_PEC64u64 only has pec_offset. Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-06-29xe/oa: Regenerate oa-lnl.xml now parsing all countersJosé Roberto de Souza1-989/+5174
Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-06-29xe/oa/mdapi-xml-convert: Add support for 576B_PEC64LL formatJosé Roberto de Souza3-15/+67
Xe2 don't use the 256bytes long format, instead it uses a 576bytes long with 64 PEC fields that are 64 bits long. This patch fixes the xe2 definition and add the parser for this format. Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-06-29xe/oa: Fix invalid escape warningsJosé Roberto de Souza2-7/+7
Fix this warnings: SyntaxWarning: invalid escape sequence '\ Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-06-29tools/xe-perf: xe_perf_reader, xe_perf_control and xe_perf_configsAshutosh Dixit4-0/+706
Add xe_perf_reader, xe_perf_control and xe_perf_configs tools, similar to their i915 counterparts. Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-06-29tools/xe-perf: Add xe_perf_recorderAshutosh Dixit4-0/+1264
Add xe_perf_recorder. The recorder exercises the Xe OA uapi to capture OAG data in a specific format, similar to i915_perf_recorder. Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-06-29lib/xe/oa: Add xe_oa_data_reader to IGT libAshutosh Dixit4-0/+560
xe_oa_data_reader is used to interpret data recorded by xe_perf_recorder and contains common functionality used by xe_perf_reader and applications like gpuvis. Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-06-29tests/intel/xe_query: Add OA units query testAshutosh Dixit1-0/+53
Add test to exercise OA units query. Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-06-29lib/xe: Complete xe_oa lib functionalityAshutosh Dixit7-0/+1622
Add various functionality in lib/xe for OA. This includes: * Support for OA metrics generation * intel_xe_perf_for_devinfo and intel_xe_perf_for_fd support * intel_xe_perf_load_perf_configs * intel_xe_perf_ioctl * drm_xe_query_oa_units Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-06-29drm-uapi/xe: Sync with Perf/OA changesAshutosh Dixit1-0/+308
Align with kernel commit edc9abaf17ad ("drm/xe/oa/uapi: Allow preemption to be disabled on the stream exec queue") to bring in Perf/OA changes from the kernel. Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-06-29lib/xe/oa: Switch generated files to Xe namespaceAshutosh Dixit4-39/+39
The Xe IGT library occupies a different namespace ('intel_xe') from the i915 IGT library ('intel' or 'i915'). The generated files are also part of the Xe IGT library. Therefore make sure the functions and data structs in the generated files conform to Xe namespace. Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-06-29lib/xe/oa: Generate LNL metrics/registers filesAshutosh Dixit1-3/+16
Generate metrics/registers .c and .h files with the XE_OA_FORMAT_PEC64u64 format (called 576B_PEC64LL) used in MetricsXML_P31.xml. Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-06-29lib/xe/oa: Add truncated legacy Xe1 metrics XML'sAshutosh Dixit10-0/+8054
Legacy metrics XML's allow testing with Xe KMD on legacy Xe1 platforms. However because these XML's are huge and increase compile time, only RenderBasic and TestOa metrics sets are included in these XML's. If other metrics sets are needed they can be added by copying from lib/i915/perf-configs. Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-06-29lib/xe/oa: Add OA LNL metrics (oa_lnl.xml)Ashutosh Dixit2-0/+2824
$ mdapi-xml-convert.py --guids=guids.xml MetricsXML_P31.xml > oa-lnl.xml Note: The metrics XML's consist of (a) the registers (in this case NOA or mux registers) to be programmed (b) the metrics themselves which specify how the counters in the reports should be combined to construct the metrics. The changes in mdapi-xml-convert.py in this patch completely ignore (b) since they are not relevant for IGT. (a) is needed for IGT LNL OAG uses "576B_PEC64LL" format which is not available on previous platforms so we cannot use metrics for a previous platform such as MTL to generate LNL OAG data. Note: LNL media guids had issues after running mdapi-convert-xml.py so have not been added, revisit this. Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-06-29lib/xe/oa: Add LNL metric guidsAshutosh Dixit3-1/+18
$ update-guids.py --guids=guids.xml MetricsXML_P31.xml > guids.xml2 And copying the new guids to guids.xml (as per the README). Note: as mentioned in update-guids.py and README.md, in order to generate config_hash in guids.xml, mdapi-convert-xml.py must first be run (as outline in the next commit) and then update-guids.py command above should be repeated. Note: LNL media guids had issues after running mdapi-convert-xml.py so have not been added, revisit this. Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-06-29lib/xe/oa: Import OA metric generation files from i915Ashutosh Dixit9-0/+5479
Import OA metric generation files from i915 to provide a starting point for Xe OA XML processing code. Signed-off-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
2024-06-27lib/rendercopy_gen9: Use AUX_NONE for platforms with unified compressionZbigniew Kempczyński1-1/+4
For non-MSAA surfaces when unified compression is configured in PAT auxiliary surfaces must be set to AUX_NONE. I haven't noticed this on Xe2+ before as it setting was silently ignored by hardware but setting to AUX_CCS_E is incorrect and may fail on newer platforms. Cc: Stuart Summers <stuart.summers@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://lore.kernel.org/r/20240625091651.131301-1-zbigniew.kempczynski@intel.com Signed-off-by: Zbigniew Kempczyński <zbigniew.kempczynski@intel.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-10-16 08:46:56 +0000