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AgeCommit message (Expand)AuthorFilesLines
2011-12-04intel: limit aperture space to mappable area on gen3Daniel Vetter1-0/+8
2011-10-29intel: Share the implementation of BO unmap between CPU and GTT mappings.Eric Anholt1-15/+5
2011-10-29intel: Don't call the SW_FINISH ioctl unless a CPU-mapped write was done.Eric Anholt1-9/+21
2011-10-29intel: Remove stale comment.Eric Anholt1-3/+0
2011-10-28intel: Add an interface for removing relocs after they're added.Eric Anholt2-0/+44
2011-10-28intel: Use stdbool.h for dealing with boolean values.Eric Anholt1-32/+33
2011-09-22drm/i915: y tiling on i915G/i915GM is differentDaniel Vetter1-2/+4
2011-09-22drm/intel: don't clobber bufmgr->pci_deviceDaniel Vetter1-1/+3
2011-08-01intel: shared header for shader debuggingBen Widawsky2-1/+46
2011-07-20intel: fix the wrong method check for bo_get_subdataYuanhan Liu1-1/+1
2011-06-04intel: Add interface to query aperture sizes.Chris Wilson3-1/+54
2011-04-04intel: Also handle mrb_exec fallback with ring == I915_EXEC_RENDERChris Wilson1-3/+6
2011-03-26Cleanup gen2 tiling confusionDaniel Vetter1-4/+3
2011-02-22intel: Fixup for the fix for relaxed tiling on gen2Daniel Vetter1-1/+1
2011-02-22intel: fix relaxed tiling on gen2Daniel Vetter1-6/+10
2011-02-14intel: Remember named boChris Wilson1-0/+28
2011-02-14intel: Set the public handle after opening by nameChris Wilson1-0/+1
2011-01-12intel: compile fix for previous commit after rebasingChris Wilson1-1/+1
2011-01-12intel: Fallback to old exec if no mrb_exec is availableChris Wilson1-0/+4
2010-12-19intel: Export CONSTANT_BUFFER addressing modeChris Wilson4-8/+8
2010-12-07intel: Reorder need_fence vs fenced_command to avoid fences on gen4Chris Wilson1-4/+5
2010-12-03intel: If the command is fenced inform the kernelChris Wilson1-1/+2
2010-11-25intel: Add a forward declaration of struct drm_clip_rectChris Wilson1-2/+4
2010-11-22intel: Compute in-aperture size for relaxed fenced objectsChris Wilson1-2/+17
2010-11-09intel: Fix drm_intel_gem_bo_wait_rendering to wait for read-only usage too.Eric Anholt1-2/+2
2010-11-07intel: initialize bufmgr.bo_mrb_exec unconditionallyAlbert Damen1-2/+1
2010-11-02intel: Drop silly asserts on mappings present at unmap time.Eric Anholt1-5/+0
2010-11-02intel: Remove gratuitous assert on bo_reference.Eric Anholt1-1/+0
2010-11-01intel: Shove the fake bufmgr subdata implementation into the fake bufmgr.Eric Anholt2-13/+19
2010-11-01intel: Remove stale comment.Eric Anholt1-2/+0
2010-10-29intel: enable relaxed fence allocation for i915Chris Wilson1-3/+12
2010-10-26intel: Prepare for BLT ring split.Chris Wilson1-5/+23
2010-10-01intel: Downgrade error warnings to debugChris Wilson1-56/+47
2010-09-25intel: Replace open-coded drmIoctl with calls to drmIoctl()Chris Wilson1-83/+62
2010-08-26Avoid use of c++ reserved keyword "virtual" when using a C++ compiler.Eric Anholt1-1/+5
2010-06-29intel: Suppress the error return from setting domains after mapping.Chris Wilson1-6/+1
2010-06-24intel: Limit tiled pitches to 8192 on pre-i965.Chris Wilson1-4/+12
2010-06-22intel: Only adjust the local stride used for SET_TILING in tiled allocChris Wilson1-9/+4
2010-06-22intel: Restore SET_TILING for non-flinked bo.Chris Wilson1-5/+3
2010-06-22intel: '===' != '=='Chris Wilson1-1/+1
2010-06-22intel: Sanitise strides for linear buffers and SET_TILINGChris Wilson1-0/+6
2010-06-21intel: Print out debugging message following ENOSPCChris Wilson1-1/+1
2010-06-21intel: Scan the cache for old bo once every second.Chris Wilson1-2/+7
2010-06-21intel: Force stride to be 0 for I915_TILING_NONE.Chris Wilson1-0/+3
2010-06-21intel: Defer tiling change to allocation.Chris Wilson1-35/+58
2010-06-21intel: Track tiling strideChris Wilson1-1/+9
2010-06-10intel: Fix several other paths for buffers pointing at themselves.Eric Anholt1-4/+9
2010-06-10intel: Add more intermediate sizes of cache buckets between powers of 2.Eric Anholt1-15/+48
2010-06-09intel: Convert to untiled pitches if surface is too large for tiling.Chris Wilson1-23/+31
2010-06-07Allow a buffer to point at itself and still get relocs.Eric Anholt1-2/+10
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