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authorDaniel Vetter <daniel.vetter@ffwll.ch>2011-02-22 19:11:07 +0100
committerDaniel Vetter <daniel.vetter@ffwll.ch>2011-02-22 19:11:33 +0100
commite6018c25ca63fa6066d8fa6e57373030d07b0392 (patch)
treeee4676156a8fdba13400a3b8271fb8a64525cd35 /intel
parent9a71ed93f48f4b319148913a6b56751f6341f078 (diff)
intel: Fixup for the fix for relaxed tiling on gen2
This is Fail. First patch to libdrm, and I've borked it up. Noticed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'intel')
-rw-r--r--intel/intel_bufmgr_gem.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/intel/intel_bufmgr_gem.c b/intel/intel_bufmgr_gem.c
index 9b324d95..f5ab0a6f 100644
--- a/intel/intel_bufmgr_gem.c
+++ b/intel/intel_bufmgr_gem.c
@@ -767,7 +767,7 @@ drm_intel_gem_bo_alloc_tiled(drm_intel_bufmgr *bufmgr, const char *name,
else if (tiling == I915_TILING_Y)
height_alignment = 32;
/* i8xx has a interleaved 2-row tile layout */
- if (IS_GEN2(bufmgr_gem))
+ if (IS_GEN2(bufmgr_gem) && tiling != I915_TILING_NONE)
height_alignment *= 2;
aligned_y = ALIGN(y, height_alignment);