Merged drmcommand-0-0-1drmcommand-0-0-1-20020409-merge

134 files changed, 3327 insertions, 2314 deletions

diff --git a/xc/config/cf/host.def b/xc/config/cf/host.def
index 87551042e..d39b624e7 100644
--- a/xc/config/cf/host.def
+++ b/xc/config/cf/host.def
@@ -19,7 +19,7 @@
 
 #define XF86CardDrivers tdfx i810 mga ati glint vga
 
-#define DriDrivers ffb tdfx mga i810 r128 radeon gamma /* i830 sis */
+#define DriDrivers tdfx mga i810 r128 radeon gamma /* i830 sis ffb */
 
 #define GccWarningOptions -Wall -Wpointer-arith -Wstrict-prototypes \
                           -Wmissing-prototypes -Wmissing-declarations \
diff --git a/xc/lib/GL/dri/drm/Imakefile b/xc/lib/GL/dri/drm/Imakefile
index f33d53300..d235baf38 100644
--- a/xc/lib/GL/dri/drm/Imakefile
+++ b/xc/lib/GL/dri/drm/Imakefile
@@ -24,10 +24,8 @@ ALLOC_DEFINES = -DMALLOC_0_RETURNS_NULL
 		-I$(XF86OSSRC)/$(OS_SUBDIR)/drm/kernel \
 		-I$(XF86OSSRC)/$(OS_SUBDIR2)/drm/kernel \
 		-I$(XF86OSSRC)
-         SRCS = xf86drm.c xf86drmHash.c xf86drmRandom.c xf86drmSL.c \
-		xf86drmMga.c xf86drmR128.c xf86drmRadeon.c xf86drmGamma.c
-         OBJS = xf86drm.o xf86drmHash.o xf86drmRandom.o xf86drmSL.o \
-		xf86drmMga.o xf86drmR128.o xf86drmRadeon.o xf86drmGamma.o
+         SRCS = xf86drm.c xf86drmHash.c xf86drmRandom.c xf86drmSL.c
+         OBJS = xf86drm.o xf86drmHash.o xf86drmRandom.o xf86drmSL.o
 
 #if defined(LinuxArchitecture)
 OS_SUBDIR = linux
@@ -43,19 +41,8 @@ LinkSourceFile(xf86drm.c,$(XF86OSSRC)/$(OS_SUBDIR2)/drm)
 LinkSourceFile(xf86drmHash.c,$(XF86OSSRC)/$(OS_SUBDIR2)/drm)
 LinkSourceFile(xf86drmRandom.c,$(XF86OSSRC)/$(OS_SUBDIR2)/drm)
 LinkSourceFile(xf86drmSL.c,$(XF86OSSRC)/$(OS_SUBDIR2)/drm)
-LinkSourceFile(xf86drmMga.c,$(XF86OSSRC)/$(OS_SUBDIR2)/drm)
-LinkSourceFile(xf86drmR128.c,$(XF86OSSRC)/$(OS_SUBDIR2)/drm)
-LinkSourceFile(xf86drmRadeon.c,$(XF86OSSRC)/$(OS_SUBDIR2)/drm)
-LinkSourceFile(xf86drmGamma.c,$(XF86OSSRC)/$(OS_SUBDIR2)/drm)
 
 LinkSourceFile(drm.h,$(XF86OSSRC)/$(OS_SUBDIR2)/drm/kernel)
-LinkSourceFile(gamma_drm.h,$(XF86OSSRC)/$(OS_SUBDIR2)/drm/kernel)
-LinkSourceFile(i810_drm.h,$(XF86OSSRC)/$(OS_SUBDIR2)/drm/kernel)
-LinkSourceFile(i830_drm.h,$(XF86OSSRC)/$(OS_SUBDIR2)/drm/kernel)
-LinkSourceFile(mga_drm.h,$(XF86OSSRC)/$(OS_SUBDIR2)/drm/kernel)
-LinkSourceFile(r128_drm.h,$(XF86OSSRC)/$(OS_SUBDIR2)/drm/kernel)
-LinkSourceFile(radeon_drm.h,$(XF86OSSRC)/$(OS_SUBDIR2)/drm/kernel)
-LinkSourceFile(sis_drm.h,$(XF86OSSRC)/$(OS_SUBDIR2)/drm/kernel)
 
 #include <Library.tmpl>
 
diff --git a/xc/lib/GL/mesa/src/drv/gamma/gamma_context.c b/xc/lib/GL/mesa/src/drv/gamma/gamma_context.c
index 4365505b1..23027388e 100644
--- a/xc/lib/GL/mesa/src/drv/gamma/gamma_context.c
+++ b/xc/lib/GL/mesa/src/drv/gamma/gamma_context.c
@@ -74,7 +74,7 @@ GLboolean gammaCreateContext( Display *dpy, const __GLcontextModes *glVisual,
    __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
    gammaContextPtr gmesa;
    gammaScreenPtr gammascrn;
-   drm_gamma_sarea_t *saPriv=(drm_gamma_sarea_t *)(((char*)sPriv->pSAREA)+
+   GLINTSAREADRIPtr saPriv=(GLINTSAREADRIPtr)(((char*)sPriv->pSAREA)+
 						 sizeof(XF86DRISAREARec));
 
    gmesa = (gammaContextPtr) CALLOC( sizeof(*gmesa) );
diff --git a/xc/lib/GL/mesa/src/drv/gamma/gamma_context.h b/xc/lib/GL/mesa/src/drv/gamma/gamma_context.h
index 63a694742..f8ae16b25 100644
--- a/xc/lib/GL/mesa/src/drv/gamma/gamma_context.h
+++ b/xc/lib/GL/mesa/src/drv/gamma/gamma_context.h
@@ -33,7 +33,7 @@
 #include "gamma_screen.h"
 #include "macros.h"
 #include "mtypes.h"
-#include "drm.h"
+#include "glint_dri.h"
 #include "mm.h"
 
 typedef union {
@@ -235,7 +235,7 @@ struct gamma_context {
 	GLuint 			new_state;
 	GLuint 			dirty;
 
-  	drm_gamma_sarea_t	*sarea; 
+  	GLINTSAREADRIPtr        sarea; 
 
         /* Temporaries for translating away float colors:
 	 */
diff --git a/xc/lib/GL/mesa/src/drv/gamma/gamma_texmem.c b/xc/lib/GL/mesa/src/drv/gamma/gamma_texmem.c
index c6e1496e2..26b33469e 100644
--- a/xc/lib/GL/mesa/src/drv/gamma/gamma_texmem.c
+++ b/xc/lib/GL/mesa/src/drv/gamma/gamma_texmem.c
@@ -8,6 +8,7 @@
 #include "enums.h"
 
 #include "mm.h"
+#include "glint_dri.h"
 #include "gamma_context.h"
 #include "gamma_lock.h"
 
@@ -316,7 +317,7 @@ void gammaPrintLocalLRU( gammaContextPtr gmesa )
 void gammaPrintGlobalLRU( gammaContextPtr gmesa )
 {
    int i, j;
-   drm_gamma_tex_region_t *list = gmesa->sarea->texList;
+   GAMMATextureRegionPtr list = gmesa->sarea->texList;
 
    for (i = 0, j = GAMMA_NR_TEX_REGIONS ; i < GAMMA_NR_TEX_REGIONS ; i++) {
       fprintf(stderr, "list[%d] age %d next %d prev %d\n",
@@ -332,7 +333,7 @@ void gammaPrintGlobalLRU( gammaContextPtr gmesa )
 
 void gammaResetGlobalLRU( gammaContextPtr gmesa )
 {
-   drm_gamma_tex_region_t *list = gmesa->sarea->texList;
+   GAMMATextureRegionPtr list = gmesa->sarea->texList;
    int sz = 1 << gmesa->gammaScreen->logTextureGranularity;
    int i;
 
@@ -364,7 +365,7 @@ void gammaUpdateTexLRU( gammaContextPtr gmesa, gammaTextureObjectPtr t )
    int logsz = gmesa->gammaScreen->logTextureGranularity;
    int start = t->MemBlock->ofs >> logsz;
    int end = (t->MemBlock->ofs + t->MemBlock->size - 1) >> logsz;
-   drm_gamma_tex_region_t *list = gmesa->sarea->texList;
+   GAMMATextureRegionPtr list = gmesa->sarea->texList;
 
    gmesa->texAge = ++gmesa->sarea->texAge;
 
diff --git a/xc/lib/GL/mesa/src/drv/i810/i810context.c b/xc/lib/GL/mesa/src/drv/i810/i810context.c
index 7f61f7571..890e0fda1 100644
--- a/xc/lib/GL/mesa/src/drv/i810/i810context.c
+++ b/xc/lib/GL/mesa/src/drv/i810/i810context.c
@@ -125,7 +125,7 @@ i810CreateContext( Display *dpy, const __GLcontextModes *mesaVis,
    i810ContextPtr imesa;
    __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
    i810ScreenPrivate *i810Screen = (i810ScreenPrivate *)sPriv->private;
-   drm_i810_sarea_t *saPriv = (drm_i810_sarea_t *)
+   I810SAREAPtr saPriv = (I810SAREAPtr)
       (((GLubyte *)sPriv->pSAREA) + i810Screen->sarea_priv_offset);
 
    /* Allocate i810 context */
@@ -362,7 +362,7 @@ void i810GetLock( i810ContextPtr imesa, GLuint flags )
 {
    __DRIdrawablePrivate *dPriv = imesa->driDrawable;
    __DRIscreenPrivate *sPriv = imesa->driScreen;
-   drm_i810_sarea_t *sarea = imesa->sarea;
+   I810SAREAPtr sarea = imesa->sarea;
    int me = imesa->hHWContext;
 
    drmGetLock(imesa->driFd, imesa->hHWContext, flags);
diff --git a/xc/lib/GL/mesa/src/drv/i810/i810context.h b/xc/lib/GL/mesa/src/drv/i810/i810context.h
index d7704ac66..164e9b8b3 100644
--- a/xc/lib/GL/mesa/src/drv/i810/i810context.h
+++ b/xc/lib/GL/mesa/src/drv/i810/i810context.h
@@ -33,7 +33,6 @@ typedef struct i810_texture_object_t *i810TextureObjectPtr;
 #include <X11/Xlibint.h>
 
 #include "mtypes.h"
-#include "drm.h"
 #include "mm.h"
 
 #include "i810screen.h"
@@ -170,8 +169,8 @@ struct i810_context_t {
    int dirtyAge;
 
    GLboolean scissor;
-   drm_clip_rect_t draw_rect;
-   drm_clip_rect_t scissor_rect;
+   XF86DRIClipRectRec draw_rect;
+   XF86DRIClipRectRec scissor_rect;
 
    drmContext hHWContext;
    drmLock *driHwLock;
@@ -181,7 +180,7 @@ struct i810_context_t {
    __DRIdrawablePrivate *driDrawable;
    __DRIscreenPrivate *driScreen;
    i810ScreenPrivate *i810Screen; 
-   drm_i810_sarea_t *sarea;
+   I810SAREAPtr sarea;
 };
 
 
diff --git a/xc/lib/GL/mesa/src/drv/i810/i810ioctl.c b/xc/lib/GL/mesa/src/drv/i810/i810ioctl.c
index 89dd769bd..ff6e627b6 100644
--- a/xc/lib/GL/mesa/src/drv/i810/i810ioctl.c
+++ b/xc/lib/GL/mesa/src/drv/i810/i810ioctl.c
@@ -8,29 +8,30 @@
 #include "macros.h"
 #include "dd.h"
 #include "swrast/swrast.h"
-
 #include "mm.h"
+
+#include "i810screen.h"
+#include "i810_dri.h"
+
 #include "i810context.h"
 #include "i810ioctl.h"
 #include "i810state.h"
 
-#include "drm.h"
-#include <sys/ioctl.h>
-
 static drmBufPtr i810_get_buffer_ioctl( i810ContextPtr imesa )
 {
-   drm_i810_dma_t dma;
+   drmI810DMA dma;
    drmBufPtr buf;
    int retcode, i = 0;
    
    while (1) {
-      retcode = ioctl(imesa->driFd, DRM_IOCTL_I810_GETBUF, &dma);
+      retcode = drmCommandWriteRead(imesa->driFd, DRM_I810_GETBUF,
+                                    &dma, sizeof(drmI810DMA));
 
       if (dma.granted == 1 && retcode == 0) 
 	 break;
       
       if (++i > 1000) {
-	 ioctl(imesa->driFd, DRM_IOCTL_I810_FLUSH);
+	 drmCommandNone(imesa->driFd, DRM_I810_FLUSH);
 	 i = 0;
       }
    }
@@ -54,7 +55,7 @@ static void i810Clear( GLcontext *ctx, GLbitfield mask, GLboolean all,
    i810ContextPtr imesa = I810_CONTEXT( ctx );
    __DRIdrawablePrivate *dPriv = imesa->driDrawable;
    const GLuint colorMask = *((GLuint *) &ctx->Color.ColorMask);
-   drm_i810_clear_t clear;
+   drmI810Clear clear;
    int i;
 
    clear.flags = 0;
@@ -90,8 +91,8 @@ static void i810Clear( GLcontext *ctx, GLbitfield mask, GLboolean all,
       for (i = 0 ; i < imesa->numClipRects ; ) 
       { 	 
 	 int nr = MIN2(i + I810_NR_SAREA_CLIPRECTS, imesa->numClipRects);
-	 XF86DRIClipRectRec *box = imesa->pClipRects;	 
-	 drm_clip_rect_t *b = imesa->sarea->boxes;
+	 XF86DRIClipRectPtr box = imesa->pClipRects;	 
+	 XF86DRIClipRectPtr b = imesa->sarea->boxes;
 	 int n = 0;
 
 	 if (!all) {
@@ -117,13 +118,14 @@ static void i810Clear( GLcontext *ctx, GLbitfield mask, GLboolean all,
 	    }
 	 } else {
 	    for ( ; i < nr ; i++) {
-	       *b++ = *(drm_clip_rect_t *)&box[i];
+	       *b++ = *(XF86DRIClipRectPtr)&box[i];
 	       n++;
 	    }
 	 }
 
 	 imesa->sarea->nbox = n;
-	 ioctl(imesa->driFd, DRM_IOCTL_I810_CLEAR, &clear);
+         drmCommandWrite(imesa->driFd, DRM_I810_CLEAR,
+                         &clear, sizeof(drmI810Clear));
       }
 
       UNLOCK_HARDWARE( imesa );
@@ -168,7 +170,7 @@ void i810CopyBuffer( const __DRIdrawablePrivate *dPriv )
       for ( ; i < nr ; i++) 
 	 *b++ = pbox[i];
 
-      ioctl(imesa->driFd, DRM_IOCTL_I810_SWAP);
+      drmCommandNone(imesa->driFd, DRM_I810_SWAP);
    }
 
    tmp = GET_ENQUEUE_AGE(imesa);
@@ -219,14 +221,14 @@ void i810WaitAgeLocked( i810ContextPtr imesa, int age  )
    int i = 0, j;
 
    while (++i < 5000) {
-      ioctl(imesa->driFd, DRM_IOCTL_I810_GETAGE);
+      drmCommandNone(imesa->driFd, DRM_I810_GETAGE);
       if (GET_DISPATCH_AGE(imesa) >= age)
 	 return;
       for (j = 0 ; j < 1000 ; j++)
 	 ;
    }
 
-   ioctl(imesa->driFd, DRM_IOCTL_I810_FLUSH);
+   drmCommandNone(imesa->driFd, DRM_I810_FLUSH);
 }
 
 
@@ -235,7 +237,7 @@ void i810WaitAge( i810ContextPtr imesa, int age  )
    int i = 0, j;
 
    while (++i < 5000) {
-      ioctl(imesa->driFd, DRM_IOCTL_I810_GETAGE);
+      drmCommandNone(imesa->driFd, DRM_I810_GETAGE);
       if (GET_DISPATCH_AGE(imesa) >= age)
 	 return;
       for (j = 0 ; j < 1000 ; j++)
@@ -244,23 +246,23 @@ void i810WaitAge( i810ContextPtr imesa, int age  )
 
    i = 0;
    while (++i < 1000) {
-      ioctl(imesa->driFd, DRM_IOCTL_I810_GETAGE);
+      drmCommandNone(imesa->driFd, DRM_I810_GETAGE);
       if (GET_DISPATCH_AGE(imesa) >= age)
 	 return;
       usleep(1000);
    }
 
    LOCK_HARDWARE(imesa);
-   ioctl(imesa->driFd, DRM_IOCTL_I810_FLUSH);
+   drmCommandNone(imesa->driFd, DRM_I810_FLUSH);
    UNLOCK_HARDWARE(imesa);
 }
 
 
 
 
-static int intersect_rect( drm_clip_rect_t *out,
-			    drm_clip_rect_t *a,
-			    drm_clip_rect_t *b )
+static int intersect_rect( XF86DRIClipRectPtr out,
+                           XF86DRIClipRectPtr a,
+                           XF86DRIClipRectPtr b )
 {
    *out = *a;
    if (b->x1 > out->x1) out->x1 = b->x1;
@@ -277,7 +279,7 @@ static int intersect_rect( drm_clip_rect_t *out,
 static void emit_state( i810ContextPtr imesa )
 {
    GLuint dirty = imesa->dirty;   
-   drm_i810_sarea_t *sarea = imesa->sarea;
+   I810SAREAPtr sarea = imesa->sarea;
 
    if (dirty & I810_UPLOAD_BUFFERS) {
       memcpy( sarea->BufferState, imesa->BufferSetup, 
@@ -326,11 +328,11 @@ static void age_imesa( i810ContextPtr imesa, int age )
 
 void i810FlushPrimsLocked( i810ContextPtr imesa )
 {
-   drm_clip_rect_t *pbox = (drm_clip_rect_t *)imesa->pClipRects;
+   XF86DRIClipRectPtr pbox = (XF86DRIClipRectPtr)imesa->pClipRects;
    int nbox = imesa->numClipRects;
    drmBufPtr buffer = imesa->vertex_buffer;
-   drm_i810_sarea_t *sarea = imesa->sarea;
-   drm_i810_vertex_t vertex;
+   I810SAREAPtr sarea = imesa->sarea;
+   drmI810Vertex vertex;
    int i;
 	  
    if (imesa->dirty)
@@ -356,7 +358,8 @@ void i810FlushPrimsLocked( i810ContextPtr imesa )
 	 sarea->nbox = nbox;
 
       vertex.discard = 1;	
-      ioctl(imesa->driFd, DRM_IOCTL_I810_VERTEX, &vertex);
+      drmCommandWrite(imesa->driFd, DRM_I810_VERTEX,
+                      &vertex, sizeof(drmI810Vertex));
       age_imesa(imesa, sarea->last_enqueue);
    }  
    else 
@@ -364,7 +367,7 @@ void i810FlushPrimsLocked( i810ContextPtr imesa )
       for (i = 0 ; i < nbox ; )
       {
 	 int nr = MIN2(i + I810_NR_SAREA_CLIPRECTS, nbox);
-	 drm_clip_rect_t *b = sarea->boxes;
+	 XF86DRIClipRectPtr b = sarea->boxes;
 
 	 if (imesa->scissor) {
 	    sarea->nbox = 0;
@@ -402,7 +405,8 @@ void i810FlushPrimsLocked( i810ContextPtr imesa )
 	 if (nr == nbox) 
 	    vertex.discard = 1;
 
-	 ioctl(imesa->driFd, DRM_IOCTL_I810_VERTEX, &vertex);
+	 drmCommandWrite(imesa->driFd, DRM_I810_VERTEX,
+                         &vertex, sizeof(drmI810Vertex));
 	 age_imesa(imesa, imesa->sarea->last_enqueue);
       }
    }
@@ -447,7 +451,7 @@ void i810FlushPrims( i810ContextPtr imesa )
 
 int i810_check_copy(int fd)
 {
-   return(ioctl(fd, DRM_IOCTL_I810_DOCOPY));
+   return(drmCommandNone(fd, DRM_I810_DOCOPY));
 }
 
 static void i810Flush( GLcontext *ctx )
diff --git a/xc/lib/GL/mesa/src/drv/i810/i810ioctl.h b/xc/lib/GL/mesa/src/drv/i810/i810ioctl.h
index add49d93c..47c13615e 100644
--- a/xc/lib/GL/mesa/src/drv/i810/i810ioctl.h
+++ b/xc/lib/GL/mesa/src/drv/i810/i810ioctl.h
@@ -5,7 +5,6 @@
 
 #include "i810context.h"
 
-
 void i810EmitPrim( i810ContextPtr imesa );
 void i810FlushPrims( i810ContextPtr mmesa ); 
 void i810FlushPrimsLocked( i810ContextPtr mmesa );
diff --git a/xc/lib/GL/mesa/src/drv/i810/i810render.c b/xc/lib/GL/mesa/src/drv/i810/i810render.c
index afc6b1c48..b2c30ed8f 100644
--- a/xc/lib/GL/mesa/src/drv/i810/i810render.c
+++ b/xc/lib/GL/mesa/src/drv/i810/i810render.c
@@ -1,4 +1,4 @@
-/* $Id: i810render.c,v 1.2 2002/02/14 01:59:53 dawes Exp $ */
+/* $Id: i810render.c,v 1.3 2002/04/09 21:54:48 jensowen Exp $ */
 
 /*
  * Intel i810 DRI driver for Mesa 3.5
@@ -42,6 +42,9 @@
 
 #include "tnl/t_context.h"
 
+#include "i810screen.h"
+#include "i810_dri.h"
+
 #include "i810context.h"
 #include "i810tris.h"
 #include "i810state.h"
diff --git a/xc/lib/GL/mesa/src/drv/i810/i810screen.c b/xc/lib/GL/mesa/src/drv/i810/i810screen.c
index b83c683a8..9f1818848 100644
--- a/xc/lib/GL/mesa/src/drv/i810/i810screen.c
+++ b/xc/lib/GL/mesa/src/drv/i810/i810screen.c
@@ -41,14 +41,15 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "matrix.h"
 #include "simple_list.h"
 
+#include "i810screen.h"
+#include "i810_dri.h"
+
 #include "i810state.h"
 #include "i810tex.h"
 #include "i810span.h"
 #include "i810tris.h"
 #include "i810ioctl.h"
 
-#include "i810_dri.h"
-
 
 
 /*  static int i810_malloc_proxy_buf(drmBufMapPtr buffers) */
diff --git a/xc/lib/GL/mesa/src/drv/i810/i810span.c b/xc/lib/GL/mesa/src/drv/i810/i810span.c
index 6971eb145..f7ca9124c 100644
--- a/xc/lib/GL/mesa/src/drv/i810/i810span.c
+++ b/xc/lib/GL/mesa/src/drv/i810/i810span.c
@@ -1,10 +1,15 @@
 #include "glheader.h"
 #include "macros.h"
 #include "mtypes.h"
+
+#include "i810screen.h"
+#include "i810_dri.h"
+
 #include "i810span.h"
 #include "i810ioctl.h"
 #include "swrast/swrast.h"
 
+
 #define DBG 0
 
 #define LOCAL_VARS					\
diff --git a/xc/lib/GL/mesa/src/drv/i810/i810state.c b/xc/lib/GL/mesa/src/drv/i810/i810state.c
index a507b39b5..486ac543b 100644
--- a/xc/lib/GL/mesa/src/drv/i810/i810state.c
+++ b/xc/lib/GL/mesa/src/drv/i810/i810state.c
@@ -9,6 +9,10 @@
 #include "dd.h"
 
 #include "mm.h"
+
+#include "i810screen.h"
+#include "i810_dri.h"
+
 #include "i810context.h"
 #include "i810state.h"
 #include "i810tex.h"
diff --git a/xc/lib/GL/mesa/src/drv/i810/i810tex.c b/xc/lib/GL/mesa/src/drv/i810/i810tex.c
index e54e7bf97..1b3c53865 100644
--- a/xc/lib/GL/mesa/src/drv/i810/i810tex.c
+++ b/xc/lib/GL/mesa/src/drv/i810/i810tex.c
@@ -36,6 +36,10 @@
 #include "swrast/swrast.h"
 
 #include "mm.h"
+
+#include "i810screen.h"
+#include "i810_dri.h"
+
 #include "i810context.h"
 #include "i810tex.h"
 #include "i810state.h"
diff --git a/xc/lib/GL/mesa/src/drv/i810/i810texmem.c b/xc/lib/GL/mesa/src/drv/i810/i810texmem.c
index a4467ec3c..05a4fe922 100644
--- a/xc/lib/GL/mesa/src/drv/i810/i810texmem.c
+++ b/xc/lib/GL/mesa/src/drv/i810/i810texmem.c
@@ -32,6 +32,10 @@
 #include "enums.h"
 
 #include "mm.h"
+
+#include "i810screen.h"
+#include "i810_dri.h"
+
 #include "i810context.h"
 #include "i810tex.h"
 #include "i810state.h"
@@ -230,7 +234,7 @@ void i810PrintLocalLRU( i810ContextPtr imesa )
 void i810PrintGlobalLRU( i810ContextPtr imesa )
 {
    int i, j;
-   drm_i810_tex_region_t *list = imesa->sarea->texList;
+   I810TexRegionRec *list = imesa->sarea->texList;
 
    for (i = 0, j = I810_NR_TEX_REGIONS ; i < I810_NR_TEX_REGIONS ; i++) {
       fprintf(stderr, "list[%d] age %d next %d prev %d\n",
@@ -246,7 +250,7 @@ void i810PrintGlobalLRU( i810ContextPtr imesa )
 
 void i810ResetGlobalLRU( i810ContextPtr imesa )
 {
-   drm_i810_tex_region_t *list = imesa->sarea->texList;
+   I810TexRegionRec *list = imesa->sarea->texList;
    int sz = 1 << imesa->i810Screen->logTextureGranularity;
    int i;
 
@@ -278,7 +282,7 @@ void i810UpdateTexLRU( i810ContextPtr imesa, i810TextureObjectPtr t )
    int logsz = imesa->i810Screen->logTextureGranularity;
    int start = t->MemBlock->ofs >> logsz;
    int end = (t->MemBlock->ofs + t->MemBlock->size - 1) >> logsz;
-   drm_i810_tex_region_t *list = imesa->sarea->texList;
+   I810TexRegionRec *list = imesa->sarea->texList;
 
    imesa->texAge = ++imesa->sarea->texAge;
 
diff --git a/xc/lib/GL/mesa/src/drv/i810/i810texstate.c b/xc/lib/GL/mesa/src/drv/i810/i810texstate.c
index 2fdd336f6..0f0c58421 100644
--- a/xc/lib/GL/mesa/src/drv/i810/i810texstate.c
+++ b/xc/lib/GL/mesa/src/drv/i810/i810texstate.c
@@ -32,6 +32,10 @@
 #include "enums.h"
 
 #include "mm.h"
+
+#include "i810screen.h"
+#include "i810_dri.h"
+
 #include "i810context.h"
 #include "i810tex.h"
 #include "i810state.h"
diff --git a/xc/lib/GL/mesa/src/drv/i810/i810tris.c b/xc/lib/GL/mesa/src/drv/i810/i810tris.c
index 1fb67e0d5..ce2f8d3bc 100644
--- a/xc/lib/GL/mesa/src/drv/i810/i810tris.c
+++ b/xc/lib/GL/mesa/src/drv/i810/i810tris.c
@@ -44,6 +44,9 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "tnl/t_context.h"
 #include "tnl/t_pipeline.h"
 
+#include "i810screen.h"
+#include "i810_dri.h"
+
 #include "i810tris.h"
 #include "i810state.h"
 #include "i810vb.h"
diff --git a/xc/lib/GL/mesa/src/drv/i810/i810vb.c b/xc/lib/GL/mesa/src/drv/i810/i810vb.c
index dd8f09a3f..6798623c6 100644
--- a/xc/lib/GL/mesa/src/drv/i810/i810vb.c
+++ b/xc/lib/GL/mesa/src/drv/i810/i810vb.c
@@ -34,6 +34,9 @@
 #include "swrast_setup/swrast_setup.h"
 #include "tnl/t_context.h"
 
+#include "i810screen.h"
+#include "i810_dri.h"
+
 #include "i810context.h"
 #include "i810vb.h"
 #include "i810ioctl.h"
diff --git a/xc/lib/GL/mesa/src/drv/mga/Imakefile b/xc/lib/GL/mesa/src/drv/mga/Imakefile
index f7e7ebc09..6eae16c1f 100644
--- a/xc/lib/GL/mesa/src/drv/mga/Imakefile
+++ b/xc/lib/GL/mesa/src/drv/mga/Imakefile
@@ -42,8 +42,7 @@ XCOMM $XFree86: xc/lib/GL/mesa/src/drv/mga/Imakefile,v 1.22 2002/02/23 00:45:50
       DRMOBJS = $(GLXLIBSRC)/dri/drm/xf86drm.o \
 		$(GLXLIBSRC)/dri/drm/xf86drmHash.o \
 		$(GLXLIBSRC)/dri/drm/xf86drmRandom.o \
-		$(GLXLIBSRC)/dri/drm/xf86drmSL.o \
-		$(GLXLIBSRC)/dri/drm/xf86drmMga.o
+		$(GLXLIBSRC)/dri/drm/xf86drmSL.o
 
 #ifdef GlxSoProf
        LOSRCS = ../../../../lowpc.c
diff --git a/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.c b/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.c
index a0407137b..cdd74fb4f 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.c
+++ b/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.c
@@ -58,7 +58,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include <X11/Xlibint.h>
 #include <stdio.h>
 
-#include "drm.h"
+#include "xf86drm.h"
+#include "mga_common.h"
 #include "mga_xmesa.h"
 #include "context.h"
 #include "matrix.h"
@@ -296,7 +297,7 @@ mgaCreateContext( Display *dpy, const __GLcontextModes *mesaVis,
    mgaContextPtr mmesa;
    __DRIscreenPrivate *sPriv = driContextPriv->driScreenPriv;
    mgaScreenPrivate *mgaScreen = (mgaScreenPrivate *)sPriv->private;
-   drm_mga_sarea_t *saPriv=(drm_mga_sarea_t*)(((char*)sPriv->pSAREA)+
+   MGASAREAPrivPtr saPriv=(MGASAREAPrivPtr)(((char*)sPriv->pSAREA)+
 					      mgaScreen->sarea_priv_offset);
 
    if (MGA_DEBUG&DEBUG_VERBOSE_DRI)
diff --git a/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.h b/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.h
index 366d4fe5e..891bf5956 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.h
+++ b/xc/lib/GL/mesa/src/drv/mga/mga_xmesa.h
@@ -35,6 +35,7 @@
 #include "dri_util.h"
 #include "mtypes.h"
 #include "mgaregs.h"
+#include "mga_common.h"
 
 typedef struct mga_screen_private_s {
 
@@ -59,10 +60,10 @@ typedef struct mga_screen_private_s {
 
    unsigned int dmaOffset;
 
-   unsigned int textureOffset[MGA_NR_TEX_HEAPS];
-   unsigned int textureSize[MGA_NR_TEX_HEAPS];
-   int logTextureGranularity[MGA_NR_TEX_HEAPS];
-   char *texVirtual[MGA_NR_TEX_HEAPS];
+   unsigned int textureOffset[DRM_MGA_NR_TEX_HEAPS];
+   unsigned int textureSize[DRM_MGA_NR_TEX_HEAPS];
+   int logTextureGranularity[DRM_MGA_NR_TEX_HEAPS];
+   char *texVirtual[DRM_MGA_NR_TEX_HEAPS];
 
 
    __DRIscreenPrivate *sPriv;
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgacontext.h b/xc/lib/GL/mesa/src/drv/mga/mgacontext.h
index fee1adae6..5f00b4bd6 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mgacontext.h
+++ b/xc/lib/GL/mesa/src/drv/mga/mgacontext.h
@@ -32,7 +32,7 @@
 #include <X11/Xlibint.h>
 #include "dri_util.h"
 #include "mtypes.h"
-#include "drm.h"
+#include "xf86drm.h"
 #include "mm.h"
 #include "mem.h"
 #include "mga_sarea.h"
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgaioctl.c b/xc/lib/GL/mesa/src/drv/mga/mgaioctl.c
index 4e8d0de81..594bbc595 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mgaioctl.c
+++ b/xc/lib/GL/mesa/src/drv/mga/mgaioctl.c
@@ -45,21 +45,31 @@
 #include "mgabuffers.h"
 
 
-#include "drm.h"
-#include "xf86drmMga.h"
+#include "xf86drm.h"
+#include "mga_common.h"
 
 static void mga_iload_dma_ioctl(mgaContextPtr mmesa,
 				unsigned long dest,
 				int length)
 {
    drmBufPtr buf = mmesa->iload_buffer;
-   int ret;
+   drmMGAIload iload;
+   int ret, i;
 
    if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL)
       fprintf(stderr, "DRM_IOCTL_MGA_ILOAD idx %d dst %x length %d\n",
 	      buf->idx, (int) dest, length);
 
-   ret = drmMGATextureLoad( mmesa->driFd, buf->idx, dest, length );
+   iload.idx = buf->idx;
+   iload.dstorg = dest;
+   iload.length = length;
+
+   i = 0;
+   do {
+      ret = drmCommandWrite( mmesa->driFd, DRM_MGA_ILOAD, 
+                             &iload, sizeof(drmMGAIload) );
+   } while ( ret == -EBUSY && i++ < DRM_MGA_IDLE_RETRY );
+
    if ( ret < 0 ) {
       printf("send iload retcode = %d\n", ret);
       exit(1);
@@ -155,6 +165,7 @@ mgaDDClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
    int ret;
    int i;
    static int nrclears;
+   drmMGAClearRec clear;
 
    FLUSH_BATCH( mmesa );
 
@@ -242,9 +253,13 @@ mgaDDClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
 
 	 mmesa->sarea->nbox = n;
 
-	 ret = drmMGAClear( mmesa->driFd, flags,
-			    clear_color, clear_depth,
-			    color_mask, depth_mask );
+         clear.flags = flags;
+         clear.clear_color = clear_color;
+         clear.clear_depth = clear_depth;
+         clear.color_mask = color_mask;
+         clear.depth_mask = depth_mask;
+         ret = drmCommandWrite( mmesa->driFd, DRM_MGA_CLEAR,
+                                 &clear, sizeof(drmMGAClearRec));
 	 if ( ret ) {
 	    fprintf( stderr, "send clear retcode = %d\n", ret );
 	    exit( 1 );
@@ -340,7 +355,7 @@ void mgaSwapBuffers(Display *dpy, void *drawablePrivate)
       if (0)
 	 fprintf(stderr, "DRM_IOCTL_MGA_SWAP\n");
 
-      ret = drmMGASwapBuffers( mmesa->driFd );
+      ret = drmCommandNone( mmesa->driFd, DRM_MGA_SWAP );
       if ( ret ) {
 	 printf("send swap retcode = %d\n", ret);
 	 exit(1);
@@ -423,6 +438,7 @@ void mgaFlushVerticesLocked( mgaContextPtr mmesa )
    XF86DRIClipRectPtr pbox = mmesa->pClipRects;
    int nbox = mmesa->numClipRects;
    drmBufPtr buffer = mmesa->vertex_dma_buffer;
+   drmMGAVertex vertex;
    int i;
 
    mmesa->vertex_dma_buffer = 0;
@@ -457,7 +473,12 @@ void mgaFlushVerticesLocked( mgaContextPtr mmesa )
       if (MGA_DEBUG&DEBUG_VERBOSE_IOCTL)
 	 fprintf(stderr, "Firing vertex -- case a nbox %d\n", nbox);
 
-      drmMGAFlushVertexBuffer( mmesa->driFd, buffer->idx, buffer->used, 1 );
+      vertex.idx = buffer->idx;
+      vertex.used = buffer->used;
+      vertex.discard = 1;
+      drmCommandWrite( mmesa->driFd, DRM_MGA_VERTEX, 
+                       &vertex, sizeof(drmMGAVertex) );
+
       age_mmesa(mmesa, mmesa->sarea->last_enqueue);
    }
    else
@@ -498,8 +519,13 @@ void mgaFlushVerticesLocked( mgaContextPtr mmesa )
 	    discard = 1;
 
 	 mmesa->sarea->dirty |= MGA_UPLOAD_CLIPRECTS;
-	 drmMGAFlushVertexBuffer( mmesa->driFd, buffer->idx,
-				  buffer->used, discard );
+
+         vertex.idx = buffer->idx;
+         vertex.used = buffer->used;
+         vertex.discard = discard;
+         drmCommandWrite( mmesa->driFd, DRM_MGA_VERTEX, 
+                          &vertex, sizeof(drmMGAVertex) );
+
 	 age_mmesa(mmesa, mmesa->sarea->last_enqueue);
       }
    }
@@ -575,11 +601,53 @@ void mgaDDFlush( GLcontext *ctx )
 
 void mgaReleaseBufLocked( mgaContextPtr mmesa, drmBufPtr buffer )
 {
+   drmMGAVertex vertex;
+
    if (!buffer) return;
 
-   drmMGAFlushVertexBuffer( mmesa->driFd, buffer->idx, 0, 1 );
+   vertex.idx = buffer->idx;
+   vertex.used = 0;
+   vertex.discard = 1;
+   drmCommandWrite( mmesa->driFd, DRM_MGA_VERTEX, 
+                    &vertex, sizeof(drmMGAVertex) );
 }
 
+int mgaFlushDMA( int fd, drmLockFlags flags )
+{
+   drmMGALock lock;
+   int ret, i = 0;
+
+   memset( &lock, 0, sizeof(drmMGALock) );
+
+   if ( flags & DRM_LOCK_QUIESCENT )    lock.flags |= DRM_LOCK_QUIESCENT;
+   if ( flags & DRM_LOCK_FLUSH )        lock.flags |= DRM_LOCK_FLUSH;
+   if ( flags & DRM_LOCK_FLUSH_ALL )    lock.flags |= DRM_LOCK_FLUSH_ALL;
+
+   do {
+      ret = drmCommandWrite( fd, DRM_MGA_FLUSH, &lock, sizeof(drmMGALock) );
+   } while ( ret && errno == EBUSY && i++ < DRM_MGA_IDLE_RETRY );
+
+   if ( ret == 0 )
+      return 0;
+   if ( errno != EBUSY )
+      return -errno;
+
+   if ( lock.flags & DRM_LOCK_QUIESCENT ) {
+      /* Only keep trying if we need quiescence.
+       */
+      lock.flags &= ~(DRM_LOCK_FLUSH | DRM_LOCK_FLUSH_ALL);
+
+      do {
+         ret = drmCommandWrite( fd, DRM_MGA_FLUSH, &lock, sizeof(drmMGALock) );
+      } while ( ret && errno == EBUSY && i++ < DRM_MGA_IDLE_RETRY );
+   }
+
+   if ( ret == 0 ) {
+      return 0;
+   } else {
+      return -errno;
+   }
+}
 
 void mgaDDInitIoctlFuncs( GLcontext *ctx )
 {
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgaioctl.h b/xc/lib/GL/mesa/src/drv/mga/mgaioctl.h
index 47c08ba3a..8a02a4471 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mgaioctl.h
+++ b/xc/lib/GL/mesa/src/drv/mga/mgaioctl.h
@@ -51,6 +51,7 @@ void mgaWaitAge( mgaContextPtr mmesa, int age );
 void mgaFlushVertices( mgaContextPtr mmesa );
 void mgaFlushVerticesLocked( mgaContextPtr mmesa );
 void mgaReleaseBufLocked( mgaContextPtr mmesa, drmBufPtr buffer );
+int mgaFlushDMA( int fd, drmLockFlags flags );
 
 void mgaDDFlush( GLcontext *ctx );
 void mgaDDFinish( GLcontext *ctx );
@@ -98,9 +99,9 @@ GLuint *mgaAllocDmaLow( mgaContextPtr mmesa, int bytes )
 
 #define UPDATE_LOCK( mmesa, flags )					\
 do {									\
-   GLint ret = drmMGAFlushDMA( mmesa->driFd, flags );			\
+   GLint ret = mgaFlushDMA( mmesa->driFd, flags );			\
    if ( ret < 0 ) {							\
-      drmMGAEngineReset( mmesa->driFd );				\
+      drmCommandNone( mmesa->driFd, DRM_MGA_RESET );			\
       UNLOCK_HARDWARE( mmesa );						\
       fprintf( stderr, __FUNCTION__ ": flush ret=%d\n", ret );		\
       /*fprintf( stderr, "drmMGAFlushDMA: return = %d\n", ret );*/	\
diff --git a/xc/lib/GL/mesa/src/drv/mga/mgapixel.c b/xc/lib/GL/mesa/src/drv/mga/mgapixel.c
index 990fe0ee3..1af691246 100644
--- a/xc/lib/GL/mesa/src/drv/mga/mgapixel.c
+++ b/xc/lib/GL/mesa/src/drv/mga/mgapixel.c
@@ -37,8 +37,8 @@
 #include "mgapixel.h"
 #include "mgabuffers.h"
 
-#include "drm.h"
-#include "xf86drmMga.h"
+#include "xf86drm.h"
+#include "mga_common.h"
 
 #include "swrast/swrast.h"
 
@@ -220,7 +220,7 @@ mgaTryReadPixels( GLcontext *ctx,
 		  GLvoid *pixels )
 {
    mgaContextPtr mmesa = MGA_CONTEXT(ctx);
-   drm_mga_blit_t blit;
+   drmMGABlit blit;
    GLint size, skipPixels, skipRows;
    GLint pitch = pack->RowLength ? pack->RowLength : width;
    GLboolean ok;
@@ -353,7 +353,8 @@ mgaTryReadPixels( GLcontext *ctx,
 
 	 mmesa->sarea->nbox = n;
 
-	 if (n && (retcode = ioctl(mmesa->driFd, DRM_IOCTL_MGA_BLIT, &blit))) {
+	 if (n && (retcode = drmCommandWrite( mmesa->driFd, DRM_MGA_BLIT,
+                                              &blit, sizeof(drmMGABlit)))) {
 	    fprintf(stderr, "blit ioctl failed, retcode = %d\n", retcode);
 	    UNLOCK_HARDWARE( mmesa );
 	    exit(1);
@@ -390,7 +391,7 @@ static void do_draw_pix( GLcontext *ctx,
 			 GLuint dest, GLuint planemask)
 {
    mgaContextPtr mmesa = MGA_CONTEXT(ctx);
-   drm_mga_blit_t blit;
+   drmMGABlit blit;
    __DRIdrawablePrivate *dPriv = mmesa->driDrawable;
    XF86DRIClipRectPtr pbox = dPriv->pClipRects;
    int nbox = dPriv->numClipRects;
@@ -453,7 +454,8 @@ static void do_draw_pix( GLcontext *ctx,
 
       mmesa->sarea->nbox = n;
 
-      if (n && (retcode = ioctl(mmesa->driFd, DRM_IOCTL_MGA_BLIT, &blit))) {
+      if (n && (retcode = drmCommandWrite( mmesa->driFd, DRM_MGA_BLIT,
+                                              &blit, sizeof(drmMGABlit)))) {
 	 fprintf(stderr, "blit ioctl failed, retcode = %d\n", retcode);
 	 UNLOCK_HARDWARE( mmesa );
 	 exit(1);
diff --git a/xc/lib/GL/mesa/src/drv/r128/Imakefile b/xc/lib/GL/mesa/src/drv/r128/Imakefile
index ff032a38a..008a990b5 100644
--- a/xc/lib/GL/mesa/src/drv/r128/Imakefile
+++ b/xc/lib/GL/mesa/src/drv/r128/Imakefile
@@ -41,8 +41,7 @@ XCOMM $XFree86: xc/lib/GL/mesa/src/drv/r128/Imakefile,v 1.19 2002/02/23 00:45:50
       DRMOBJS = $(GLXLIBSRC)/dri/drm/xf86drm.o \
 		$(GLXLIBSRC)/dri/drm/xf86drmHash.o \
 		$(GLXLIBSRC)/dri/drm/xf86drmRandom.o \
-		$(GLXLIBSRC)/dri/drm/xf86drmSL.o \
-		$(GLXLIBSRC)/dri/drm/xf86drmR128.o
+		$(GLXLIBSRC)/dri/drm/xf86drmSL.o
 
 #ifdef GlxSoProf
        LOSRCS = ../../../../lowpc.c
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_context.h b/xc/lib/GL/mesa/src/drv/r128/r128_context.h
index 7f3a90ec9..28d35062d 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_context.h
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_context.h
@@ -43,7 +43,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "dri_util.h"
 
 #include "xf86drm.h"
-#include "xf86drmR128.h"
+#include "r128_common.h"
 
 #include "mtypes.h"
 
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_ioctl.c b/xc/lib/GL/mesa/src/drv/r128/r128_ioctl.c
index 996106141..7bf2029a4 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_ioctl.c
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_ioctl.c
@@ -42,6 +42,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "swrast/swrast.h"
 
 #define R128_TIMEOUT        2048
+#define R128_IDLE_RETRY       32
 
 
 /* =============================================================
@@ -86,7 +87,7 @@ drmBufPtr r128GetBufferLocked( r128ContextPtr rmesa )
    }
 
    if ( !buf ) {
-      drmR128EngineReset( fd );
+      drmCommandNone( fd, DRM_R128_CCE_RESET);
       UNLOCK_HARDWARE( rmesa );
       fprintf( stderr, "Error: Could not get new VB... exiting\n" );
       exit( -1 );
@@ -103,6 +104,7 @@ void r128FlushVerticesLocked( r128ContextPtr rmesa )
    int count = rmesa->num_verts;
    int prim = rmesa->hw_primitive;
    int fd = rmesa->driScreen->fd;
+   drmR128Vertex vertex;
    int i;
 
    rmesa->num_verts = 0;
@@ -128,7 +130,11 @@ void r128FlushVerticesLocked( r128ContextPtr rmesa )
 	 rmesa->sarea->nbox = nbox;
       }
 
-      drmR128FlushVertexBuffer( fd, prim, buffer->idx, count, 1 );
+      vertex.prim = prim;
+      vertex.idx = buffer->idx;
+      vertex.count = count;
+      vertex.discard = 1;
+      drmCommandWrite( fd, DRM_R128_VERTEX, &vertex, sizeof(drmR128Vertex) );
    }
    else
    {
@@ -149,7 +155,12 @@ void r128FlushVerticesLocked( r128ContextPtr rmesa )
 	 }
 
 	 rmesa->sarea->dirty |= R128_UPLOAD_CLIPRECTS;
-	 drmR128FlushVertexBuffer( fd, prim, buffer->idx, count, discard );
+
+         vertex.prim = prim;
+         vertex.idx = buffer->idx;
+         vertex.count = count;
+         vertex.discard = discard;
+         drmCommandWrite( fd, DRM_R128_VERTEX, &vertex, sizeof(drmR128Vertex) );
       }
    }
 
@@ -168,15 +179,24 @@ void r128FireBlitLocked( r128ContextPtr rmesa, drmBufPtr buffer,
 			 GLint offset, GLint pitch, GLint format,
 			 GLint x, GLint y, GLint width, GLint height )
 {
+   drmR128Blit blit;
    GLint ret;
 
-   ret = drmR128TextureBlit( rmesa->driFd, buffer->idx,
-			     offset, pitch, format,
-			     x, y, width, height );
+   blit.idx = buffer->idx;
+   blit.offset = offset;
+   blit.pitch = pitch;
+   blit.format = format;
+   blit.x = x;
+   blit.y = y;
+   blit.width = width;
+   blit.height = height;
+
+   ret = drmCommandWrite( rmesa->driFd, DRM_R128_BLIT, 
+                          &blit, sizeof(drmR128Blit) );
 
    if ( ret ) {
       UNLOCK_HARDWARE( rmesa );
-      fprintf( stderr, "drmR128TextureBlit: return = %d\n", ret );
+      fprintf( stderr, "DRM_R128_BLIT: return = %d\n", ret );
       exit( 1 );
    }
 }
@@ -270,17 +290,20 @@ void r128CopyBuffer( const __DRIdrawablePrivate *dPriv )
       }
       rmesa->sarea->nbox = n;
 
-      ret = drmR128SwapBuffers( rmesa->driFd );
+      ret = drmCommandNone( rmesa->driFd, DRM_R128_SWAP );
 
       if ( ret ) {
 	 UNLOCK_HARDWARE( rmesa );
-	 fprintf( stderr, "drmR128SwapBuffers: return = %d\n", ret );
+	 fprintf( stderr, "DRM_R128_SWAP: return = %d\n", ret );
 	 exit( 1 );
       }
    }
 
    if ( R128_DEBUG & DEBUG_ALWAYS_SYNC ) {
-      drmR128WaitForIdleCCE( rmesa->driFd );
+      i = 0;
+      do {
+         ret = drmCommandNone(rmesa->driFd, DRM_R128_CCE_IDLE);
+      } while ( ret && errno == EBUSY && i++ < R128_IDLE_RETRY );
    }
 
    UNLOCK_HARDWARE( rmesa );
@@ -328,12 +351,12 @@ void r128PageFlip( const __DRIdrawablePrivate *dPriv )
    /* The kernel will have been initialized to perform page flipping
     * on a swapbuffers ioctl.
     */
-   ret = drmR128SwapBuffers( rmesa->driFd );
+   ret = drmCommandNone( rmesa->driFd, DRM_R128_SWAP );
 
    UNLOCK_HARDWARE( rmesa );
 
    if ( ret ) {
-      fprintf( stderr, "drmR128SwapBuffers: return = %d\n", ret );
+      fprintf( stderr, "DRM_R128_SWAP: return = %d\n", ret );
       exit( 1 );
    }
 
@@ -373,6 +396,7 @@ static void r128DDClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
 {
    r128ContextPtr rmesa = R128_CONTEXT(ctx);
    __DRIdrawablePrivate *dPriv = rmesa->driDrawable;
+   drmR128Clear clear;
    GLuint flags = 0;
    GLint i;
    GLint ret;
@@ -468,28 +492,25 @@ static void r128DDClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
 
 	 if ( R128_DEBUG & DEBUG_VERBOSE_IOCTL ) {
 	    fprintf( stderr,
-		     "drmR128Clear: flag 0x%x color %x depth %x nbox %d\n",
+		     "DRM_R128_CLEAR: flag 0x%x color %x depth %x nbox %d\n",
 		     flags,
 		     (GLuint)rmesa->ClearColor,
 		     (GLuint)rmesa->ClearDepth,
 		     rmesa->sarea->nbox );
 	 }
 
-/*  	 ret = drmR128Clear( rmesa->driFd,  */
-/*  			     flags, */
-/*  			     rmesa->ClearColor, */
-/*  			     rmesa->setup.plane_3d_mask_c, */
-/*  			     rmesa->ClearDepth ); */
+         clear.flags = flags;
+         clear.clear_color = rmesa->ClearColor;
+         clear.clear_depth = rmesa->ClearDepth;
+         clear.color_mask = rmesa->setup.plane_3d_mask_c;
+         clear.depth_mask = ~0;
 
-	 ret = drmR128Clear( rmesa->driFd, flags,
-			     rmesa->ClearColor, 
-			     rmesa->ClearDepth,
-			     rmesa->setup.plane_3d_mask_c, 
-			     ~0 ); /* depthmask */
+         ret = drmCommandWrite( rmesa->driFd, DRM_R128_CLEAR,
+                                &clear, sizeof(drmR128Clear) );
 
 	 if ( ret ) {
 	    UNLOCK_HARDWARE( rmesa );
-	    fprintf( stderr, "drmR128Clear: return = %d\n", ret );
+	    fprintf( stderr, "DRM_R128_CLEAR: return = %d\n", ret );
 	    exit( 1 );
 	 }
       }
@@ -514,6 +535,7 @@ void r128WriteDepthSpanLocked( r128ContextPtr rmesa,
 			       const GLubyte mask[] )
 {
    XF86DRIClipRectPtr pbox = rmesa->pClipRects;
+   drmR128Depth d;
    int nbox = rmesa->numClipRects;
    int fd = rmesa->driScreen->fd;
    int i;
@@ -533,7 +555,15 @@ void r128WriteDepthSpanLocked( r128ContextPtr rmesa,
 	 rmesa->sarea->nbox = nbox;
       }
 
-      drmR128WriteDepthSpan( fd, n, x, y, depth, mask );
+      d.func = DRM_R128_WRITE_SPAN;
+      d.n = n;
+      d.x = &x;
+      d.y = &y;
+      d.buffer = (unsigned int *)depth;
+      d.mask = (unsigned char *)mask;
+
+      drmCommandWrite( fd, DRM_R128_DEPTH, &d, sizeof(drmR128Depth));
+
    }
    else
    {
@@ -547,7 +577,15 @@ void r128WriteDepthSpanLocked( r128ContextPtr rmesa,
 	 }
 
 	 rmesa->sarea->dirty |= R128_UPLOAD_CLIPRECTS;
-	 drmR128WriteDepthSpan( fd, n, x, y, depth, mask );
+
+         d.func = DRM_R128_WRITE_SPAN;
+         d.n = n;
+         d.x = &x;
+         d.y = &y;
+         d.buffer = (unsigned int *)depth;
+         d.mask = (unsigned char *)mask;
+
+         drmCommandWrite( fd, DRM_R128_DEPTH, &d, sizeof(drmR128Depth));
       }
    }
 
@@ -560,6 +598,7 @@ void r128WriteDepthPixelsLocked( r128ContextPtr rmesa, GLuint n,
 				 const GLubyte mask[] )
 {
    XF86DRIClipRectPtr pbox = rmesa->pClipRects;
+   drmR128Depth d;
    int nbox = rmesa->numClipRects;
    int fd = rmesa->driScreen->fd;
    int i;
@@ -579,7 +618,14 @@ void r128WriteDepthPixelsLocked( r128ContextPtr rmesa, GLuint n,
 	 rmesa->sarea->nbox = nbox;
       }
 
-      drmR128WriteDepthPixels( fd, n, x, y, depth, mask );
+      d.func = DRM_R128_WRITE_PIXELS;
+      d.n = n;
+      d.x = &x;
+      d.y = &y;
+      d.buffer = (unsigned int *)depth;
+      d.mask = (unsigned char *)mask;
+
+      drmCommandWrite( fd, DRM_R128_DEPTH, &d, sizeof(drmR128Depth));
    }
    else
    {
@@ -593,7 +639,15 @@ void r128WriteDepthPixelsLocked( r128ContextPtr rmesa, GLuint n,
 	 }
 
 	 rmesa->sarea->dirty |= R128_UPLOAD_CLIPRECTS;
-	 drmR128WriteDepthPixels( fd, n, x, y, depth, mask );
+
+         d.func = DRM_R128_WRITE_PIXELS;
+         d.n = n;
+         d.x = &x;
+         d.y = &y;
+         d.buffer = (unsigned int *)depth;
+         d.mask = (unsigned char *)mask;
+
+         drmCommandWrite( fd, DRM_R128_DEPTH, &d, sizeof(drmR128Depth));
       }
    }
 
@@ -604,6 +658,7 @@ void r128ReadDepthSpanLocked( r128ContextPtr rmesa,
 			      GLuint n, GLint x, GLint y )
 {
    XF86DRIClipRectPtr pbox = rmesa->pClipRects;
+   drmR128Depth d;
    int nbox = rmesa->numClipRects;
    int fd = rmesa->driScreen->fd;
    int i;
@@ -623,7 +678,14 @@ void r128ReadDepthSpanLocked( r128ContextPtr rmesa,
 	 rmesa->sarea->nbox = nbox;
       }
 
-      drmR128ReadDepthSpan( fd, n, x, y );
+      d.func = DRM_R128_READ_SPAN;
+      d.n = n;
+      d.x = &x;
+      d.y = &y;
+      d.buffer = NULL;
+      d.mask = NULL;
+
+      drmCommandWrite( fd, DRM_R128_DEPTH, &d, sizeof(drmR128Depth));
    }
    else
    {
@@ -637,7 +699,15 @@ void r128ReadDepthSpanLocked( r128ContextPtr rmesa,
 	 }
 
 	 rmesa->sarea->dirty |= R128_UPLOAD_CLIPRECTS;
-	 drmR128ReadDepthSpan( fd, n, x, y );
+
+         d.func = DRM_R128_READ_SPAN;
+         d.n = n;
+         d.x = &x;
+         d.y = &y;
+         d.buffer = NULL;
+         d.mask = NULL;
+
+         drmCommandWrite( fd, DRM_R128_DEPTH, &d, sizeof(drmR128Depth));
       }
    }
 
@@ -648,6 +718,7 @@ void r128ReadDepthPixelsLocked( r128ContextPtr rmesa, GLuint n,
 				const GLint x[], const GLint y[] )
 {
    XF86DRIClipRectPtr pbox = rmesa->pClipRects;
+   drmR128Depth d;
    int nbox = rmesa->numClipRects;
    int fd = rmesa->driScreen->fd;
    int i;
@@ -667,7 +738,14 @@ void r128ReadDepthPixelsLocked( r128ContextPtr rmesa, GLuint n,
 	 rmesa->sarea->nbox = nbox;
       }
 
-      drmR128ReadDepthPixels( fd, n, x, y );
+      d.func = DRM_R128_READ_PIXELS;
+      d.n = n;
+      d.x = &x;
+      d.y = &y;
+      d.buffer = NULL;
+      d.mask = NULL;
+
+      drmCommandWrite( fd, DRM_R128_DEPTH, &d, sizeof(drmR128Depth));
    }
    else
    {
@@ -681,7 +759,15 @@ void r128ReadDepthPixelsLocked( r128ContextPtr rmesa, GLuint n,
 	 }
 
 	 rmesa->sarea->dirty |= R128_UPLOAD_CLIPRECTS;
-	 drmR128ReadDepthPixels( fd, n, x, y );
+
+         d.func = DRM_R128_READ_PIXELS;
+         d.n = n;
+         d.x = &x;
+         d.y = &y;
+         d.buffer = NULL;
+         d.mask = NULL;
+
+         drmCommandWrite( fd, DRM_R128_DEPTH, &d, sizeof(drmR128Depth));
       }
    }
 
@@ -693,14 +779,17 @@ void r128WaitForIdleLocked( r128ContextPtr rmesa )
 {
     int fd = rmesa->r128Screen->driScreen->fd;
     int to = 0;
-    int ret;
+    int ret, i;
 
     do {
-	ret = drmR128WaitForIdleCCE( fd );
+        i = 0;
+        do {
+            ret = drmCommandNone( fd, DRM_R128_CCE_IDLE);
+        } while ( ret && errno == EBUSY && i++ < R128_IDLE_RETRY );
     } while ( ( ret == -EBUSY ) && ( to++ < R128_TIMEOUT ) );
 
     if ( ret < 0 ) {
-	drmR128EngineReset( fd );
+        drmCommandNone( fd, DRM_R128_CCE_RESET);
 	UNLOCK_HARDWARE( rmesa );
 	fprintf( stderr, "Error: Rage 128 timed out... exiting\n" );
 	exit( -1 );
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_ioctl.h b/xc/lib/GL/mesa/src/drv/r128/r128_ioctl.h
index a0c72000b..955f3b4f8 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_ioctl.h
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_ioctl.h
@@ -42,7 +42,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "r128_lock.h"
 
 #include "xf86drm.h"
-#include "xf86drmR128.h"
+#include "r128_common.h"
 
 #define R128_BUFFER_MAX_DWORDS	(R128_BUFFER_SIZE / sizeof(CARD32))
 
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_screen.c b/xc/lib/GL/mesa/src/drv/r128/r128_screen.c
index 8af724493..d1caccd71 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_screen.c
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_screen.c
@@ -185,6 +185,7 @@ r128OpenFullScreen( __DRIcontextPrivate *driContextPriv )
 {
 #if 0
    r128ContextPtr rmesa = (r128ContextPtr)driContextPriv->driverPrivate;
+   drmR128Fullscreen fullscreen;
    GLint ret;
 
    /* FIXME: Do we need to check this?
@@ -197,7 +198,9 @@ r128OpenFullScreen( __DRIcontextPrivate *driContextPriv )
 
    /* Ignore errors.  If this fails, we simply don't do page flipping.
     */
-   ret = drmR128FullScreen( rmesa->driFd, GL_TRUE );
+   fullscreen.func = DRM_R128_INIT_FULLSCREEN;
+   ret = drmCommandWrite( rmesa->driFd, DRM_R128_FULLSCREEN, 
+                          &fullscreen, sizeof(drmR128Fullscreen) );
 
    UNLOCK_HARDWARE( rmesa );
 
@@ -214,12 +217,15 @@ r128CloseFullScreen( __DRIcontextPrivate *driContextPriv )
 {
 #if 0
    r128ContextPtr rmesa = (r128ContextPtr)driContextPriv->driverPrivate;
+   drmR128Fullscreen fullscreen;
    LOCK_HARDWARE( rmesa );
    r128WaitForIdleLocked( rmesa );
 
    /* Don't care if this fails, we're not page flipping anymore.
     */
-   drmR128FullScreen( rmesa->driFd, GL_FALSE );
+   fullscreen.func = DRM_R128_CLEANUP_FULLSCREEN;
+   drmCommandWrite( rmesa->driFd, DRM_R128_FULLSCREEN, 
+                    &fullscreen, sizeof(drmR128Fullscreen) );
 
    UNLOCK_HARDWARE( rmesa );
 
diff --git a/xc/lib/GL/mesa/src/drv/r128/r128_state.c b/xc/lib/GL/mesa/src/drv/r128/r128_state.c
index 64f4d7e3d..e989290bc 100644
--- a/xc/lib/GL/mesa/src/drv/r128/r128_state.c
+++ b/xc/lib/GL/mesa/src/drv/r128/r128_state.c
@@ -722,6 +722,7 @@ static void r128DDPolygonStipple( GLcontext *ctx, const GLubyte *mask )
 {
    r128ContextPtr rmesa = R128_CONTEXT(ctx);
    GLuint stipple[32], i;
+   drmR128Stipple stippleRec;
 
    for (i = 0; i < 32; i++) {
       stipple[31 - i] = ((mask[i*4+0] << 24) |
@@ -732,7 +733,11 @@ static void r128DDPolygonStipple( GLcontext *ctx, const GLubyte *mask )
 
    FLUSH_BATCH( rmesa );
    LOCK_HARDWARE( rmesa );
-   drmR128PolygonStipple( rmesa->driFd, stipple );
+
+   stippleRec.mask = stipple;
+   drmCommandWrite( rmesa->driFd, DRM_R128_STIPPLE, 
+                    &stippleRec, sizeof(drmR128Stipple) );
+
    UNLOCK_HARDWARE( rmesa );
 
    rmesa->new_state |= R128_NEW_CONTEXT;
diff --git a/xc/lib/GL/mesa/src/drv/radeon/Imakefile b/xc/lib/GL/mesa/src/drv/radeon/Imakefile
index 2a0922ccf..02c244419 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/Imakefile
+++ b/xc/lib/GL/mesa/src/drv/radeon/Imakefile
@@ -40,8 +40,7 @@ XCOMM $XFree86: xc/lib/GL/mesa/src/drv/radeon/Imakefile,v 1.9 2002/02/23 00:45:5
       DRMOBJS = $(GLXLIBSRC)/dri/drm/xf86drm.o \
 		$(GLXLIBSRC)/dri/drm/xf86drmHash.o \
 		$(GLXLIBSRC)/dri/drm/xf86drmRandom.o \
-		$(GLXLIBSRC)/dri/drm/xf86drmSL.o \
-		$(GLXLIBSRC)/dri/drm/xf86drmRadeon.o
+		$(GLXLIBSRC)/dri/drm/xf86drmSL.o
 
 #ifdef GlxSoProf
        LOSRCS = ../../../../lowpc.c
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_context.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_context.c
index 9593af321..1f1e27062 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_context.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_context.c
@@ -582,6 +582,7 @@ radeonOpenFullScreen( __DRIcontextPrivate *driContextPriv )
 {
 #if 0
    radeonContextPtr rmesa = (radeonContextPtr)driContextPriv->driverPrivate;
+   drmRadeonFullScreenType fs;
    GLint ret;
 
    /* FIXME: Do we need to check this?
@@ -594,7 +595,9 @@ radeonOpenFullScreen( __DRIcontextPrivate *driContextPriv )
 
    /* Ignore errors.  If this fails, we simply don't do page flipping.
     */
-   ret = drmRadeonFullScreen( rmesa->driFd, GL_TRUE );
+   fs.func = RADEON_INIT_FULLSCREEN;
+   ret = drmCommandWrite( rmesa->driFd, DRM_RADEON_FULL_SCREEN,
+                          &fs, sizeof(drmRadeonFullScreenType) );
 
    UNLOCK_HARDWARE( rmesa );
 
@@ -610,13 +613,16 @@ radeonCloseFullScreen( __DRIcontextPrivate *driContextPriv )
 {
 #if 0
    radeonContextPtr rmesa = (radeonContextPtr)driContextPriv->driverPrivate;
+   drmRadeonFullScreenType fs;
 
    LOCK_HARDWARE( rmesa );
    radeonWaitForIdleLocked( rmesa );
 
    /* Don't care if this fails, we're not page flipping anymore.
     */
-   drmRadeonFullScreen( rmesa->driFd, GL_FALSE );
+   fs.func = RADEON_CLEANUP_FULLSCREEN;
+   drmCommandWrite( rmesa->driFd, DRM_RADEON_FULL_SCREEN,
+                    &fs, sizeof(drmRadeonFullScreenType) );
 
    UNLOCK_HARDWARE( rmesa );
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_context.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_context.h
index 5dfb1f59b..4dc915e40 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_context.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_context.h
@@ -44,7 +44,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "dri_util.h"
 
 #include "xf86drm.h"
-#include "xf86drmRadeon.h"
+#include "radeon_common.h"
 
 #include "macros.h"
 #include "mtypes.h"
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.c
index f6e152351..521580319 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.c
@@ -43,6 +43,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "swrast/swrast.h"
 
 #define RADEON_TIMEOUT             512
+#define RADEON_IDLE_RETRY           16
 
 
 /* =============================================================
@@ -284,6 +285,7 @@ void radeonFlushPrimsLocked( radeonContextPtr rmesa )
    XF86DRIClipRectPtr pbox = (XF86DRIClipRectPtr)rmesa->pClipRects;
    int nbox = rmesa->numClipRects;
    drmBufPtr buffer = rmesa->dma.buffer;
+   drmRadeonVertex2 v;
    RADEONSAREAPrivPtr sarea = rmesa->sarea;
    int fd = rmesa->dri.fd;
    int discard_sz = rmesa->dma.high - rmesa->dma.low < 4096;
@@ -319,14 +321,16 @@ void radeonFlushPrimsLocked( radeonContextPtr rmesa )
 
 /*        fprintf(stderr, "case a %d boxes %d prims %d states\n", */
 /*  	      sarea->nbox, rmesa->store.primnr, rmesa->store.statenr); */
-      if (discard || rmesa->store.primnr)
-	 drmRadeonFlushPrims( fd, 
-			       buffer->idx,
-			       discard,
-			       rmesa->store.statenr,
-			       rmesa->store.state,
-			       rmesa->store.primnr,
-			       rmesa->store.prim);
+      if (discard || rmesa->store.primnr) {
+         v.idx       = buffer->idx;
+         v.discard   = discard;
+         v.nr_states = rmesa->store.statenr;
+         v.state     = rmesa->store.state;
+         v.nr_prims  = rmesa->store.primnr;
+         v.prim      = rmesa->store.prim;
+
+         drmCommandWrite( fd, DRM_RADEON_VERTEX2, &v, sizeof(drmRadeonVertex2));
+      }
    }
    else
    {
@@ -369,13 +373,14 @@ void radeonFlushPrimsLocked( radeonContextPtr rmesa )
 
 /*  	 fprintf(stderr, "case a %d boxes %d prims %d states, discard: %d\n", */
 /*  		 sarea->nbox, rmesa->store.primnr, rmesa->store.statenr, discard); */
-	 drmRadeonFlushPrims( fd, 
-			       buffer->idx,
-			       discard_now,
-			       rmesa->store.statenr,
-			       rmesa->store.state,
-			       rmesa->store.primnr,
-			       rmesa->store.prim);
+         v.idx       = buffer->idx;
+         v.discard   = discard_now;
+         v.nr_states = rmesa->store.statenr;
+         v.state     = rmesa->store.state;
+         v.nr_prims  = rmesa->store.primnr;
+         v.prim      = rmesa->store.prim;
+
+         drmCommandWrite( fd, DRM_RADEON_VERTEX2, &v, sizeof(drmRadeonVertex2));
       }
    }
 
@@ -458,15 +463,24 @@ void radeonFireBlitLocked( radeonContextPtr rmesa, drmBufPtr buffer,
 			   GLint x, GLint y, GLint width, GLint height )
 {
 #if 0
+   drmRadeonTextureBlitType texture;
    GLint ret;
 
-   ret = drmRadeonTextureBlit( rmesa->dri.fd, buffer->idx,
-			       offset, pitch, format,
-			       x, y, width, height );
+   texture.idx    = buffer->idx;
+   texture.offset = offset;
+   texture.pitch  = pitch;
+   texture.format = format;
+   texture.x      = x;
+   texture.y      = y;
+   texture.width  = width;
+   texture.height = height;
+
+   ret = drmCommandWrite( rmesa->dri.fd, DRM_RADEON_TEXTURE_BLIT,
+                          &texture, sizeof(drmRadeonTexture));
 
    if ( ret ) {
       UNLOCK_HARDWARE( rmesa );
-      fprintf( stderr, "drmRadeonTextureBlit: return = %d\n", ret );
+      fprintf( stderr, "DRM_RADEON_TEXTURE_BLIT: return = %d\n", ret );
       exit( 1 );
    }
 #endif
@@ -552,10 +566,10 @@ void radeonCopyBuffer( const __DRIdrawablePrivate *dPriv )
       }
       rmesa->sarea->nbox = n;
 
-      ret = drmRadeonSwapBuffers( rmesa->dri.fd );
+      ret = drmCommandNone( rmesa->dri.fd, DRM_RADEON_SWAP );
 
       if ( ret ) {
-	 fprintf( stderr, "drmRadeonSwapBuffers: return = %d\n", ret );
+	 fprintf( stderr, "DRM_RADEON_SWAP_BUFFERS: return = %d\n", ret );
 	 UNLOCK_HARDWARE( rmesa );
 	 exit( 1 );
       }
@@ -608,12 +622,12 @@ void radeonPageFlip( const __DRIdrawablePrivate *dPriv )
    /* The kernel will have been initialized to perform page flipping
     * on a swapbuffers ioctl.
     */
-   ret = drmRadeonSwapBuffers( rmesa->dri.fd );
+   ret = drmCommandNone( rmesa->dri.fd, DRM_RADEON_SWAP );
 
    UNLOCK_HARDWARE( rmesa );
 
    if ( ret ) {
-      fprintf( stderr, "drmRadeonSwapBuffers: return = %d\n", ret );
+      fprintf( stderr, "DRM_RADEON_SWAP_BUFFERS: return = %d\n", ret );
       exit( 1 );
    }
 
@@ -725,6 +739,8 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
 	 GLint nr = MIN2( i + RADEON_NR_SAREA_CLIPRECTS, dPriv->numClipRects );
 	 XF86DRIClipRectPtr box = dPriv->pClipRects;
 	 XF86DRIClipRectPtr b = rmesa->sarea->boxes;
+         drmRadeonClearType clear;
+         drmRadeonClearRect depth_boxes[RADEON_NR_SAREA_CLIPRECTS];
 	 GLint n = 0;
 
 	 if ( !all ) {
@@ -758,23 +774,37 @@ static void radeonClear( GLcontext *ctx, GLbitfield mask, GLboolean all,
 	 rmesa->sarea->nbox = n;
 
 /*  	    fprintf( stderr, */
-/*  		     "drmRadeonClear: flag 0x%x color %x depth %x sten %x nbox %d\n", */
+/*  		     "DRM_RADEON_CLEAR: flag 0x%x color %x depth %x sten %x nbox %d\n", */
 /*  		     flags, */
 /*  		     rmesa->state.color.clear, */
 /*  		     rmesa->state.depth.clear, */
 /*  		     rmesa->state.stencil.clear, */
 /*  		     rmesa->sarea->nbox ); */
 
-	 ret = drmRadeonClear( rmesa->dri.fd, flags,
-			       rmesa->state.color.clear,
-			       rmesa->state.depth.clear,
-			       rmesa->state.hw.mask.rb3d_planemask,
-			       rmesa->state.stencil.clear,
-			       rmesa->sarea->boxes, rmesa->sarea->nbox );
+         clear.flags       = flags;
+         clear.clear_color = rmesa->state.color.clear;
+         clear.clear_depth = rmesa->state.depth.clear;
+         clear.color_mask  = rmesa->state.hw.mask.rb3d_planemask,
+         clear.depth_mask  = rmesa->state.stencil.clear,
+         clear.depth_boxes = depth_boxes;
+
+         nr = rmesa->sarea->nbox;
+         b = rmesa->sarea->boxes;
+         for ( i = 0 ; i < nr ; i++ ) {
+           depth_boxes[i].f[RADEON_CLEAR_X1] = (float)b[i].x1;
+           depth_boxes[i].f[RADEON_CLEAR_Y1] = (float)b[i].y1;
+           depth_boxes[i].f[RADEON_CLEAR_X2] = (float)b[i].x2;
+           depth_boxes[i].f[RADEON_CLEAR_Y2] = (float)b[i].y2;
+           depth_boxes[i].f[RADEON_CLEAR_DEPTH] = 
+                              (float)rmesa->state.depth.clear;
+         }
+
+         ret = drmCommandWrite( rmesa->dri.fd, DRM_RADEON_CLEAR,
+                                &clear, sizeof(drmRadeonClearType));
 
 	 if ( ret ) {
 	    UNLOCK_HARDWARE( rmesa );
-	    fprintf( stderr, "drmRadeonClear: return = %d\n", ret );
+	    fprintf( stderr, "DRM_RADEON_CLEAR: return = %d\n", ret );
 	    exit( 1 );
 	 }
       }
@@ -798,10 +828,20 @@ void radeonWaitForIdleLocked( radeonContextPtr rmesa )
 {
     int fd = rmesa->dri.fd;
     int to = 0;
-    int ret;
+    int ret, i;
 
     do {
-	ret = drmRadeonWaitForIdleCP( fd );
+        do {
+            ret = drmCommandNone( fd, DRM_RADEON_CP_IDLE);
+        } while ( ret && errno == EBUSY && i++ < RADEON_IDLE_RETRY );
+        if (ret && ret != -EBUSY) {
+            /*
+             * JO - I'm reluctant to print this message while holding the lock
+             *
+            xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+                   "%s: CP idle %d\n", __FUNCTION__, ret);
+             */
+        }
     } while ( ( ret == -EBUSY ) && ( to++ < RADEON_TIMEOUT ) );
 
     if ( ret < 0 ) {
@@ -821,6 +861,7 @@ void radeonInitIoctlFuncs( GLcontext *ctx )
 
 void radeonReleaseRetainedBuffer( radeonContextPtr rmesa )
 {
+   drmRadeonVertex2 v;
    ASSERT(rmesa->dma.retained);
 
    if (rmesa->dma.retained &&
@@ -831,11 +872,15 @@ void radeonReleaseRetainedBuffer( radeonContextPtr rmesa )
 /*  	      rmesa->dma.retained, rmesa->dma.buffer); */
       
       LOCK_HARDWARE(rmesa);
-      drmRadeonFlushPrims( rmesa->dri.fd,
-			   rmesa->dma.retained->idx, 
-			   1,
-			   0, rmesa->store.state,
-			   0, rmesa->store.prim);
+      v.idx       = rmesa->dma.retained->idx;
+      v.discard   = 1;
+      v.nr_states = 0;
+      v.state     = rmesa->store.state;
+      v.nr_prims  = 0;
+      v.prim      = rmesa->store.prim;
+
+      drmCommandWrite( rmesa->dri.fd, DRM_RADEON_VERTEX2,
+                       &v, sizeof(drmRadeonVertex2));
       UNLOCK_HARDWARE(rmesa);
    }
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.h
index 030864f42..e77858f61 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.h
@@ -43,7 +43,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "radeon_lock.h"
 
 #include "xf86drm.h"
-#include "xf86drmRadeon.h"
+#include "radeon_common.h"
 
 #define RADEON_BUFFER_MAX_DWORDS	(RADEON_BUFFER_SIZE / sizeof(CARD32))
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.h b/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.h
index 1098afa2c..96ab00879 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.h
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_screen.h
@@ -42,7 +42,7 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include <X11/Xlibint.h>
 #include "dri_util.h"
 #include "xf86drm.h"
-#include "xf86drmRadeon.h"
+#include "radeon_common.h"
 #include "radeon_sarea.h"
 
 typedef struct {
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_state.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_state.c
index 7409fbeb8..5b65872dc 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_state.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_state.c
@@ -456,6 +456,7 @@ static void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask )
 {
    radeonContextPtr rmesa = RADEON_CONTEXT(ctx);
    GLuint i;
+   drmRadeonStipple stipple;
 
    /* Must flip pattern upside down.
     */
@@ -468,7 +469,9 @@ static void radeonPolygonStipple( GLcontext *ctx, const GLubyte *mask )
 
    /* FIXME: Use window x,y offsets into stipple RAM.
     */
-   drmRadeonPolygonStipple( rmesa->dri.fd, rmesa->state.stipple.mask );
+   stipple.mask = rmesa->state.stipple.mask;
+   drmCommandWrite( rmesa->dri.fd, DRM_RADEON_STIPPLE, 
+                    &stipple, sizeof(drmRadeonStipple) );
    UNLOCK_HARDWARE( rmesa );
 }
 
diff --git a/xc/lib/GL/mesa/src/drv/radeon/radeon_texmem.c b/xc/lib/GL/mesa/src/drv/radeon/radeon_texmem.c
index 82461e034..4e6b67dcb 100644
--- a/xc/lib/GL/mesa/src/drv/radeon/radeon_texmem.c
+++ b/xc/lib/GL/mesa/src/drv/radeon/radeon_texmem.c
@@ -329,6 +329,8 @@ static void radeonUploadSubImage( radeonContextPtr rmesa,
    GLuint format, pitch, offset;
    GLint imageWidth, imageHeight;
    GLint ret;
+   drmRadeonTexture tex;
+   drmRadeonTexImage tmp;
 
    if ( RADEON_DEBUG & DEBUG_VERBOSE_TEXTURE ) {
       fprintf( stderr, __FUNCTION__"( %p, %p )\n", t, t->tObj );
@@ -397,12 +399,24 @@ static void radeonUploadSubImage( radeonContextPtr rmesa,
    }
 
    t->image[level].data = texImage->Data;
-   ret = drmRadeonLoadTexture( rmesa->dri.fd, offset, pitch, format,
-			       imageWidth, imageHeight, &t->image[level] );
+
+   tex.offset = offset;
+   tex.pitch = pitch;
+   tex.format = format;
+   tex.width = imageWidth;
+   tex.height = imageHeight;
+   tex.image = &tmp;
+
+   memcpy( &tmp, &t->image[level], sizeof(drmRadeonTexImage) );
+
+   do {
+      ret = drmCommandWriteRead( rmesa->dri.fd, DRM_RADEON_TEXTURE,
+                                 &tex, sizeof(drmRadeonTexture) );
+   } while ( ret && errno == EAGAIN );
 
    if ( ret ) {
       UNLOCK_HARDWARE( rmesa );
-      fprintf( stderr, "drmRadeonTextureBlit: return = %d\n", ret );
+      fprintf( stderr, "DRM_RADEON_TEXTURE: return = %d\n", ret );
       fprintf( stderr, "   offset=0x%08x pitch=0x%x format=%d\n",
 	       offset, pitch, format );
       fprintf( stderr, "   image width=%d height=%d\n",
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h
index e5b0dc34e..dbdec3436 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128.h
@@ -61,7 +61,8 @@
 #include "GL/glxint.h"
 #endif
 
-#define R128_DEBUG    0         /* Turn off debugging output                */
+#define R128_DEBUG          0   /* Turn off debugging output               */
+#define R128_IDLE_RETRY    32   /* Fall out of idle loops after this count */
 #define R128_TIMEOUT  2000000   /* Fall out of wait loops after this count */
 #define R128_MMIOSIZE 0x80000
 
@@ -423,7 +424,7 @@ extern Bool        R128DRIFinishScreenInit(ScreenPtr pScreen);
 
 #define R128CCE_START(pScrn, info)					\
 do {									\
-    int _ret = drmR128StartCCE(info->drmFD);				\
+    int _ret = drmCommandNone(info->drmFD, DRM_R128_CCE_START);		\
     if (_ret) {								\
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,				\
 		   "%s: CCE start %d\n", __FUNCTION__, _ret);		\
@@ -432,7 +433,7 @@ do {									\
 
 #define R128CCE_STOP(pScrn, info)					\
 do {									\
-    int _ret = drmR128StopCCE(info->drmFD);				\
+    int _ret = R128CCEStop(pScrn);					\
     if (_ret) {								\
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,				\
 		   "%s: CCE stop %d\n", __FUNCTION__, _ret);		\
@@ -443,7 +444,7 @@ do {									\
 do {									\
     if (info->directRenderingEnabled					\
 	&& R128CCE_USE_RING_BUFFER(info->CCEMode)) {			\
-	int _ret = drmR128ResetCCE(info->drmFD);			\
+	int _ret = drmCommandNone(info->drmFD, DRM_R128_CCE_RESET);	\
 	if (_ret) {							\
 	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,			\
 		       "%s: CCE reset %d\n", __FUNCTION__, _ret);	\
@@ -457,6 +458,7 @@ extern drmBufPtr   R128CCEGetBuffer(ScrnInfoPtr pScrn);
 extern void        R128CCEFlushIndirect(ScrnInfoPtr pScrn, int discard);
 extern void        R128CCEReleaseIndirect(ScrnInfoPtr pScrn);
 extern void        R128CCEWaitForIdle(ScrnInfoPtr pScrn);
+extern int         R128CCEStop(ScrnInfoPtr pScrn);
 
 
 #define CCE_PACKET0( reg, n )						\
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c
index 6146a7a7c..035449026 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_accel.c
@@ -229,13 +229,16 @@ void R128WaitForIdle(ScrnInfoPtr pScrn)
 void R128CCEWaitForIdle(ScrnInfoPtr pScrn)
 {
     R128InfoPtr info = R128PTR(pScrn);
-    int         ret;
+    int         ret, i;
 
     FLUSH_RING();
 
     for (;;) {
-        /* The ioctl already has a timeout */
-        ret = drmR128WaitForIdleCCE(info->drmFD);
+        i = 0;
+        do {
+            ret = drmCommandNone(info->drmFD, DRM_R128_CCE_IDLE);
+        } while ( ret && errno == EBUSY && i++ < R128_IDLE_RETRY );
+
 	if (ret && ret != -EBUSY) {
 	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 		       "%s: CCE idle %d\n", __FUNCTION__, ret);
@@ -252,6 +255,49 @@ void R128CCEWaitForIdle(ScrnInfoPtr pScrn)
 	R128CCE_START(pScrn, info);
     }
 }
+
+int R128CCEStop(ScrnInfoPtr pScrn)
+{
+    R128InfoPtr    info = R128PTR(pScrn);
+    drmR128CCEStop stop;
+    int            ret, i;
+
+    stop.flush = 1;
+    stop.idle  = 1;
+
+    ret = drmCommandWrite( info->drmFD, DRM_R128_CCE_STOP,
+                           &stop, sizeof(drmR128CCEStop) );
+
+    if ( ret == 0 ) {
+        return 0;
+    } else if ( errno != EBUSY ) {
+        return -errno;
+    }
+
+    stop.flush = 0;
+
+    i = 0;
+    do {
+        ret = drmCommandWrite( info->drmFD, DRM_R128_CCE_STOP,
+                               &stop, sizeof(drmR128CCEStop) );
+    } while ( ret && errno == EBUSY && i++ < R128_IDLE_RETRY );
+
+    if ( ret == 0 ) {
+        return 0;
+    } else if ( errno != EBUSY ) {
+        return -errno;
+    }
+
+    stop.idle = 0;
+
+    if ( drmCommandWrite( info->drmFD, DRM_R128_CCE_STOP,
+                          &stop, sizeof(drmR128CCEStop) )) {
+        return -errno;
+    } else {
+        return 0;
+    }
+}
+
 #endif
 
 /* Setup for XAA SolidFill. */
@@ -1536,6 +1582,7 @@ void R128CCEFlushIndirect( ScrnInfoPtr pScrn, int discard )
     R128InfoPtr   info = R128PTR(pScrn);
     drmBufPtr buffer = info->indirectBuffer;
     int start = info->indirectStart;
+    drmR128Indirect indirect;
 
     if ( !buffer )
 	return;
@@ -1543,8 +1590,13 @@ void R128CCEFlushIndirect( ScrnInfoPtr pScrn, int discard )
     if ( (start == buffer->used) && !discard )
         return;
 
-    drmR128FlushIndirectBuffer( info->drmFD, buffer->idx,
-				start, buffer->used, discard );
+    indirect.idx = buffer->idx;
+    indirect.start = start;
+    indirect.end = buffer->used;
+    indirect.discard = discard;
+
+    drmCommandWriteRead( info->drmFD, DRM_R128_INDIRECT,
+                         &indirect, sizeof(drmR128Indirect));
 
     if ( discard )
         buffer = info->indirectBuffer = R128CCEGetBuffer( pScrn );
@@ -1563,6 +1615,7 @@ void R128CCEReleaseIndirect( ScrnInfoPtr pScrn )
     R128InfoPtr   info = R128PTR(pScrn);
     drmBufPtr buffer = info->indirectBuffer;
     int start = info->indirectStart;
+    drmR128Indirect indirect;
 
     info->indirectBuffer = NULL;
     info->indirectStart = 0;
@@ -1570,8 +1623,13 @@ void R128CCEReleaseIndirect( ScrnInfoPtr pScrn )
     if ( !buffer )
 	return;
 
-    drmR128FlushIndirectBuffer( info->drmFD, buffer->idx,
-				start, buffer->used, 1 );
+    indirect.idx = buffer->idx;
+    indirect.start = start;
+    indirect.end = buffer->used;
+    indirect.discard = 1;
+
+    drmCommandWriteRead( info->drmFD, DRM_R128_INDIRECT,
+                         &indirect, sizeof(drmR128Indirect));
 }
 
 static void R128CCEAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a)
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmR128.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_common.h
index 3bd245da8..5d5bed8b4 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmR128.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_common.h
@@ -1,7 +1,8 @@
-/* xf86drm.h -- OS-independent header for DRM user-level library interface
+/* r128_common.h -- common header definitions for R128 2D/3D/DRM suite
  * Created: Sun Apr  9 18:16:28 2000 by kevin@precisioninsight.com
  *
  * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -27,12 +28,15 @@
  *   Gareth Hughes <gareth@valinux.com>
  *   Kevin E. Martin <martin@valinux.com>
  *
+ * Converted to common header format:
+ *   Jens Owen <jens@tungstengraphics.com>
+ *
  * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86drmR128.h,v 3.11 2001/04/16 15:02:13 tsi Exp $
  *
  */
 
-#ifndef _XF86DRI_R128_H_
-#define _XF86DRI_R128_H_
+#ifndef _R128_COMMON_H_
+#define _R128_COMMON_H_
 
 #include "X11/Xmd.h"
 
@@ -41,11 +45,37 @@
  * the kernel include file as well (r128_drm.h)
  */
 
+/* Driver specific DRM command indices
+ * NOTE: these are not OS specific, but they are driver specific
+ */
+#define DRM_R128_INIT           0x00
+#define DRM_R128_CCE_START      0x01
+#define DRM_R128_CCE_STOP       0x02
+#define DRM_R128_CCE_RESET      0x03
+#define DRM_R128_CCE_IDLE       0x04
+#define DRM_R128_UNDEFINED1     0x05
+#define DRM_R128_RESET          0x06
+#define DRM_R128_SWAP           0x07
+#define DRM_R128_CLEAR          0x08
+#define DRM_R128_VERTEX         0x09
+#define DRM_R128_INDICES        0x0a
+#define DRM_R128_BLIT           0x0b
+#define DRM_R128_DEPTH          0x0c
+#define DRM_R128_STIPPLE        0x0d
+#define DRM_R128_UNDEFINED2     0x0e
+#define DRM_R128_INDIRECT       0x0f
+#define DRM_R128_FULLSCREEN     0x10
+#define DRM_R128_CLEAR2         0x11
+
 #define DRM_R128_FRONT		0x1
 #define DRM_R128_BACK		0x2
 #define DRM_R128_DEPTH		0x4
 
 typedef struct {
+   enum {
+      DRM_R128_INIT_CCE    = 0x01,
+      DRM_R128_CLEANUP_CCE = 0x02
+   } func;
    unsigned long sarea_priv_offset;
    int is_pci;
    int cce_mode;
@@ -68,46 +98,65 @@ typedef struct {
    unsigned long agp_textures_offset;
 } drmR128Init;
 
-extern int drmR128InitCCE( int fd, drmR128Init *info );
-extern int drmR128CleanupCCE( int fd );
-
-extern int drmR128StartCCE( int fd );
-extern int drmR128StopCCE( int fd );
-extern int drmR128ResetCCE( int fd );
-extern int drmR128WaitForIdleCCE( int fd );
-
-extern int drmR128EngineReset( int fd );
+typedef struct {
+   int flush;
+   int idle;
+} drmR128CCEStop;
 
-extern int drmR128FullScreen( int fd, int enable );
+typedef struct {
+   int idx;
+   int start;
+   int end;
+   int discard;
+} drmR128Indirect;
 
-extern int drmR128SwapBuffers( int fd );
-extern int drmR128Clear( int fd, unsigned int flags,
-			 unsigned int clear_color, unsigned int clear_depth,
-			 unsigned int color_mask, unsigned int depth_mask );
+typedef struct {
+   int idx;
+   int pitch;
+   int offset;
+   int format;
+   unsigned short x, y;
+   unsigned short width, height;
+} drmR128Blit;
 
-extern int drmR128FlushVertexBuffer( int fd, int prim, int indx,
-				     int count, int discard );
-extern int drmR128FlushIndices( int fd, int prim, int indx,
-				int start, int end, int discard );
+typedef struct {
+   enum {
+      DRM_R128_WRITE_SPAN         = 0x01,
+      DRM_R128_WRITE_PIXELS       = 0x02,
+      DRM_R128_READ_SPAN          = 0x03,
+      DRM_R128_READ_PIXELS        = 0x04
+   } func;
+   int n;
+   int *x;
+   int *y;
+   unsigned int *buffer;
+   unsigned char *mask;
+} drmR128Depth;
 
-extern int drmR128TextureBlit( int fd, int indx,
-			       int offset, int pitch, int format,
-			       int x, int y, int width, int height );
+typedef struct {
+   int prim;
+   int idx;                        /* Index of vertex buffer */
+   int count;                      /* Number of vertices in buffer */
+   int discard;                    /* Client finished with buffer? */
+} drmR128Vertex;
 
-extern int drmR128WriteDepthSpan( int fd, int n, int x, int y,
-				  const unsigned int depth[],
-				  const unsigned char mask[] );
-extern int drmR128WriteDepthPixels( int fd, int n,
-				    const int x[], const int y[],
-				    const unsigned int depth[],
-				    const unsigned char mask[] );
-extern int drmR128ReadDepthSpan( int fd, int n, int x, int y );
-extern int drmR128ReadDepthPixels( int fd, int n,
-				   const int x[], const int y[] );
+typedef struct {
+   unsigned int *mask;
+} drmR128Stipple;
 
-extern int drmR128PolygonStipple( int fd, unsigned int *mask );
+typedef struct {
+   unsigned int flags;
+   unsigned int clear_color;
+   unsigned int clear_depth;
+   unsigned int color_mask;
+   unsigned int depth_mask;
+} drmR128Clear;
 
-extern int drmR128FlushIndirectBuffer( int fd, int indx,
-				       int start, int end, int discard );
+typedef struct {
+   enum {
+      DRM_R128_INIT_FULLSCREEN    = 0x01,
+      DRM_R128_CLEANUP_FULLSCREEN = 0x02
+   } func;
+} drmR128Fullscreen;
 
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c
index e3f981731..3031b35f0 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.c
@@ -769,6 +769,9 @@ static int R128DRIKernelInit(R128InfoPtr info, ScreenPtr pScreen)
 {
     drmR128Init drmInfo;
 
+    memset( &drmInfo, 0, sizeof(drmR128Init) );
+
+    drmInfo.func                = DRM_R128_INIT_CCE;
     drmInfo.sarea_priv_offset   = sizeof(XF86DRISAREARec);
     drmInfo.is_pci              = info->IsPCI;
     drmInfo.cce_mode            = info->CCEMode;
@@ -796,7 +799,9 @@ static int R128DRIKernelInit(R128InfoPtr info, ScreenPtr pScreen)
     drmInfo.buffers_offset      = info->bufHandle;
     drmInfo.agp_textures_offset = info->agpTexHandle;
 
-    if (drmR128InitCCE(info->drmFD, &drmInfo) < 0) return FALSE;
+    if (drmCommandWrite(info->drmFD, DRM_R128_INIT,
+                        &drmInfo, sizeof(drmR128Init)) < 0)
+        return FALSE;
 
     return TRUE;
 }
@@ -996,6 +1001,42 @@ Bool R128DRIScreenInit(ScreenPtr pScreen)
 	return FALSE;
     }
 
+    /* Check the DRM lib version.
+       drmGetLibVersion was not supported in version 1.0, so check for
+       symbol first to avoid possible crash or hang.
+     */
+    if (xf86LoaderCheckSymbol("drmGetLibVersion")) {
+        version = drmGetLibVersion(info->drmFD);
+    }
+    else {
+        /* drmlib version 1.0.0 didn't have the drmGetLibVersion
+           entry point.  Fake it by allocating a version record
+           via drmGetVersion and changing it to version 1.0.0
+         */
+        version = drmGetVersion(info->drmFD);
+        version->version_major      = 1;
+        version->version_minor      = 0;
+        version->version_patchlevel = 0;
+    }
+
+    if (version) {
+	if (version->version_major != 1 ||
+	    version->version_minor < 1) {
+            /* incompatible drm library version */
+            xf86DrvMsg(pScreen->myNum, X_ERROR,
+		"[dri] R128DRIScreenInit failed because of a version mismatch.\n"
+		"[dri] libdrm.a module version is %d.%d.%d but version 1.1.x is needed.\n"
+		"[dri] Disabling DRI.\n",
+                version->version_major,
+                version->version_minor,
+                version->version_patchlevel);
+            drmFreeVersion(version);
+	    R128DRICloseScreen(pScreen);
+            return FALSE;
+	}
+	drmFreeVersion(version);
+    }
+
     /* Check the r128 DRM version */
     version = drmGetVersion(info->drmFD);
     if (version) {
@@ -1130,6 +1171,7 @@ void R128DRICloseScreen(ScreenPtr pScreen)
 {
     ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
     R128InfoPtr info = R128PTR(pScrn);
+    drmR128Init drmInfo;
 
 				/* Stop the CCE if it is still in use */
     if (info->directRenderingEnabled) {
@@ -1143,7 +1185,10 @@ void R128DRICloseScreen(ScreenPtr pScreen)
     }
 
 				/* De-allocate all kernel resources */
-    drmR128CleanupCCE(info->drmFD);
+    memset(&drmInfo, 0, sizeof(drmR128Init));
+    drmInfo.func = DRM_R128_CLEANUP_CCE;
+    drmCommandWrite(info->drmFD, DRM_R128_INIT,
+                    &drmInfo, sizeof(drmR128Init));
 
 				/* De-allocate all AGP resources */
     if (info->agpTex) {
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h
index 5ef9cdfee..64345d3c2 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_dri.h
@@ -40,7 +40,7 @@
 #define _R128_DRI_
 
 #include "xf86drm.h"
-#include "xf86drmR128.h"
+#include "r128_common.h"
 
 /* DRI Driver defaults */
 #define R128_DEFAULT_CCE_PIO_MODE R128_PM4_64PIO_64VCBM_64INDBM
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c
index 2156a4203..cb05eb68a 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_driver.c
@@ -277,18 +277,16 @@ static const char *drmSymbols[] = {
     "drmAgpUnbind",
     "drmAgpVendorId",
     "drmAvailable",
+    "drmCommandNone",
+    "drmCommandRead",
+    "drmCommandWrite",
+    "drmCommandWriteRead",
     "drmFreeVersion",
+    "drmGetLibVersion",
     "drmGetVersion",
     "drmMap",
     "drmMapBufs",
     "drmDMA",
-    "drmR128CleanupCCE",
-    "drmR128InitCCE",
-    "drmR128ResetCCE",
-    "drmR128StartCCE",
-    "drmR128StopCCE",
-    "drmR128WaitForIdleCCE",
-    "drmR128FlushIndirectBuffer",
     "drmScatterGatherAlloc",
     "drmScatterGatherFree",
     "drmUnmap",
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c
index ac7459502..031026d9b 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/r128_video.c
@@ -4,7 +4,7 @@
 #include "r128_reg.h"
 
 #ifdef XF86DRI
-#include "xf86drmR128.h"
+#include "r128_common.h"
 #include "r128_sarea.h"
 #endif
 
@@ -509,6 +509,7 @@ R128DMA(
     int err=-1, i, idx, offset, hpass, passes, srcpassbytes, dstpassbytes;
     int sizes[MAXPASSES], list[MAXPASSES];
     drmDMAReq req;
+    drmR128Blit blit;
 
     /* Verify conditions and bail out as early as possible */
     if (!info->directRenderingEnabled)
@@ -567,8 +568,17 @@ R128DMA(
 	    }
 	}
 
-	if ((err = drmR128TextureBlit(info->drmFD, idx, offset, dstPitch,
-		  (R128_DATATYPE_CI8 >> 16), (offset % 32), 0, w, hpass)) < 0)
+        blit.idx = idx;
+        blit.offset = offset;
+        blit.pitch = dstPitch;
+        blit.format = (R128_DATATYPE_CI8 >> 16);
+        blit.x = (offset % 32);
+        blit.y = 0;
+        blit.width = w;
+        blit.height = hpass;
+
+	if ((err = drmCommandWrite(info->drmFD, DRM_R128_BLIT,
+                                   &blit, sizeof(drmR128Blit))) < 0)
 	    break;
     }
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h
index cce71271d..08b5ee810 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon.h
@@ -66,9 +66,10 @@
 #include "picturestr.h"
 #endif
 
-#define RADEON_DEBUG    0       /* Turn off debugging output                */
-#define RADEON_TIMEOUT  2000000 /* Fall out of wait loops after this count */
-#define RADEON_MMIOSIZE 0x80000
+#define RADEON_DEBUG            0 /* Turn off debugging output               */
+#define RADEON_IDLE_RETRY      16 /* Fall out of idle loops after this count */
+#define RADEON_TIMEOUT    2000000 /* Fall out of wait loops after this count */
+#define RADEON_MMIOSIZE   0x80000
 
 #define RADEON_VBIOS_SIZE 0x00010000
 
@@ -498,11 +499,12 @@ extern Bool        RADEONDRIFinishScreenInit(ScreenPtr pScreen);
 extern drmBufPtr   RADEONCPGetBuffer(ScrnInfoPtr pScrn);
 extern void        RADEONCPFlushIndirect(ScrnInfoPtr pScrn);
 extern void        RADEONCPReleaseIndirect(ScrnInfoPtr pScrn);
+extern int         RADEONCPStop(ScrnInfoPtr pScrn,  RADEONInfoPtr info);
 
 
 #define RADEONCP_START(pScrn, info)					\
 do {									\
-    int _ret = drmRadeonStartCP(info->drmFD);				\
+    int _ret = drmCommandNone(info->drmFD, DRM_RADEON_CP_START);	\
     if (_ret) {								\
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,				\
 		   "%s: CP start %d\n", __FUNCTION__, _ret);		\
@@ -511,7 +513,7 @@ do {									\
 
 #define RADEONCP_STOP(pScrn, info)					\
 do {									\
-    int _ret = drmRadeonStopCP(info->drmFD);				\
+    int _ret = RADEONCPStop(pScrn, info);				\
     if (_ret) {								\
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR,				\
 		   "%s: CP stop %d\n", __FUNCTION__, _ret);		\
@@ -522,7 +524,7 @@ do {									\
 #define RADEONCP_RESET(pScrn, info)					\
 do {									\
     if (RADEONCP_USE_RING_BUFFER(info->CPMode)) {			\
-	int _ret = drmRadeonResetCP(info->drmFD);			\
+        int _ret = drmCommandNone(info->drmFD, DRM_RADEON_CP_RESET);	\
 	if (_ret) {							\
 	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,			\
 		       "%s: CP reset %d\n", __FUNCTION__, _ret);	\
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c
index a4b844d37..0b48955e7 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_accel.c
@@ -186,14 +186,16 @@ void RADEONWaitForIdle(ScrnInfoPtr pScrn)
 static void RADEONCPWaitForIdle(ScrnInfoPtr pScrn)
 {
     RADEONInfoPtr info = RADEONPTR(pScrn);
-    int         ret;
-    int         i    = 0;
+    int ret, i;
 
     FLUSH_RING();
 
     for (;;) {
 	do {
-	    ret = drmRadeonWaitForIdleCP(info->drmFD);
+            i = 0;
+            do {
+                ret = drmCommandNone(info->drmFD, DRM_RADEON_CP_IDLE);
+            } while ( ret && errno == EBUSY && i++ < RADEON_IDLE_RETRY );
 	    if (ret && ret != -EBUSY) {
 		xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 			   "%s: CP idle %d\n", __FUNCTION__, ret);
@@ -212,6 +214,47 @@ static void RADEONCPWaitForIdle(ScrnInfoPtr pScrn)
 	RADEONCP_START(pScrn, info);
     }
 }
+
+int RADEONCPStop(ScrnInfoPtr pScrn,  RADEONInfoPtr info)
+{
+    drmRadeonCPStop stop;
+    int ret, i;
+
+    stop.flush = 1;
+    stop.idle = 1;
+
+    ret = drmCommandWrite(info->drmFD, DRM_RADEON_CP_STOP, &stop, 
+                         sizeof(drmRadeonCPStop));
+
+    if ( ret == 0 ) {
+        return 0;
+    } else if ( errno != EBUSY ) {
+        return -errno;
+    }
+
+    stop.flush = 0;
+ 
+    i = 0;
+    do {
+        ret = drmCommandWrite(info->drmFD, DRM_RADEON_CP_STOP, &stop, 
+                              sizeof(drmRadeonCPStop));
+    } while ( ret && errno == EBUSY && i++ < RADEON_IDLE_RETRY );
+
+    if ( ret == 0 ) {
+        return 0;
+    } else if ( errno != EBUSY ) {
+        return -errno;
+    }
+
+    stop.idle = 0;
+
+    if (drmCommandWrite(info->drmFD, DRM_RADEON_CP_STOP,
+                        &stop, sizeof(drmRadeonCPStop))) {
+        return -errno;
+    } else {
+        return 0;
+    }
+}
 #endif
 
 /* Flush all dirty data in the Pixel Cache to memory. */
@@ -1509,6 +1552,7 @@ void RADEONCPFlushIndirect( ScrnInfoPtr pScrn )
     RADEONInfoPtr info = RADEONPTR(pScrn);
     drmBufPtr buffer = info->indirectBuffer;
     int start = info->indirectStart;
+    drmRadeonIndirect indirect;
     int discard;
 
     if ( !buffer )
@@ -1519,8 +1563,13 @@ void RADEONCPFlushIndirect( ScrnInfoPtr pScrn )
 
     discard = ( buffer->used + RING_THRESHOLD > buffer->total );
 
-    drmRadeonFlushIndirectBuffer( info->drmFD, buffer->idx,
-				  start, buffer->used, discard );
+    indirect.idx = buffer->idx;
+    indirect.start = start;
+    indirect.end = buffer->used;
+    indirect.discard = discard;
+
+    drmCommandWriteRead( info->drmFD, DRM_RADEON_INDIRECT,
+	&indirect, sizeof(drmRadeonIndirect) );
 
     if ( discard ) {
 	info->indirectBuffer = RADEONCPGetBuffer( pScrn );
@@ -1537,6 +1586,7 @@ void RADEONCPReleaseIndirect( ScrnInfoPtr pScrn )
     RADEONInfoPtr info = RADEONPTR(pScrn);
     drmBufPtr buffer = info->indirectBuffer;
     int start = info->indirectStart;
+    drmRadeonIndirect indirect;
 
     info->indirectBuffer = NULL;
     info->indirectStart = 0;
@@ -1544,8 +1594,13 @@ void RADEONCPReleaseIndirect( ScrnInfoPtr pScrn )
     if ( !buffer )
 	return;
 
-    drmRadeonFlushIndirectBuffer( info->drmFD, buffer->idx,
-				  start, buffer->used, 1 );
+    indirect.idx = buffer->idx;
+    indirect.start = start;
+    indirect.end = buffer->used;
+    indirect.discard = 1;
+
+    drmCommandWriteRead( info->drmFD, DRM_RADEON_INDIRECT,
+	&indirect, sizeof(drmRadeonIndirect) );
 }
 
 static void RADEONCPAccelInit(ScrnInfoPtr pScrn, XAAInfoRecPtr a)
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmRadeon.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_common.h
index d053f204a..89f92cc8f 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmRadeon.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_common.h
@@ -1,7 +1,7 @@
-/* xf86drmRadeon.h -- OS-independent header for Radeon DRM user-level
- *                    library interface
+/* radeon_common.h -- common header definitions for Radeon 2D/3D/DRM suite
  *
  * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
+ * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
  * All Rights Reserved.
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
@@ -28,25 +28,60 @@
  *   Kevin E. Martin <martin@valinux.com>
  *   Keith Whitwell <keith_whitwell@yahoo.com>
  *
+ * Converted to common header format:
+ *   Jens Owen <jens@tungstengraphics.com>
+ *
  * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86drmRadeon.h,v 1.6 2001/04/16 15:02:13 tsi Exp $
  *
  */
 
-#ifndef _XF86DRI_RADEON_H_
-#define _XF86DRI_RADEON_H_
+#ifndef _RADEON_COMMON_H_
+#define _RADEON_COMMON_H_
 
 /* WARNING: If you change any of these defines, make sure to change
  * the kernel include file as well (radeon_drm.h)
  */
 
+/* Driver specific DRM command indices
+ * NOTE: these are not OS specific, but they are driver specific
+ */
+#define DRM_RADEON_CP_INIT                0x00
+#define DRM_RADEON_CP_START               0x01
+#define DRM_RADEON_CP_STOP                0x02
+#define DRM_RADEON_CP_RESET               0x03
+#define DRM_RADEON_CP_IDLE                0x04
+#define DRM_RADEON_RESET                  0x05
+#define DRM_RADEON_FULLSCREEN             0x06
+#define DRM_RADEON_SWAP                   0x07
+#define DRM_RADEON_CLEAR                  0x08
+#define DRM_RADEON_VERTEX                 0x09
+#define DRM_RADEON_INDICES                0x0a
+#define DRM_RADEON_STIPPLE                0x0c
+#define DRM_RADEON_INDIRECT               0x0d
+#define DRM_RADEON_TEXTURE                0x0e
+#define DRM_RADEON_VERTEX2                0x0f
+#define DRM_RADEON_CMDBUF                 0x10
+#define DRM_RADEON_GETPARAM               0x11
+#define DRM_RADEON_MAX_DRM_COMMAND_INDEX  0x39
+
+
 #define RADEON_FRONT	0x1
 #define RADEON_BACK	0x2
 #define RADEON_DEPTH	0x4
 #define RADEON_STENCIL	0x8
 
+#define RADEON_CLEAR_X1        0
+#define RADEON_CLEAR_Y1        1
+#define RADEON_CLEAR_X2        2
+#define RADEON_CLEAR_Y2        3
+#define RADEON_CLEAR_DEPTH     4
 
 
 typedef struct {
+   enum {
+      DRM_RADEON_INIT_CP    = 0x01,
+      DRM_RADEON_CLEANUP_CP = 0x02
+   } func;
    unsigned long sarea_priv_offset;
    int is_pci;
    int cp_mode;
@@ -69,13 +104,59 @@ typedef struct {
 } drmRadeonInit;
 
 typedef struct {
-   unsigned int x;
-   unsigned int y;
-   unsigned int width;
-   unsigned int height;
-   void *data;
+   int flush;
+   int idle;
+} drmRadeonCPStop;
+
+typedef struct {
+   int idx;
+   int start;
+   int end;
+   int discard;
+} drmRadeonIndirect;
+
+typedef union drmRadeonClearR {
+        float f[5];
+        unsigned int ui[5];
+} drmRadeonClearRect;
+
+typedef struct drmRadeonClearT {
+        unsigned int flags;
+        unsigned int clear_color;
+        unsigned int clear_depth;
+        unsigned int color_mask;
+        unsigned int depth_mask;   /* misnamed field:  should be stencil */
+        drmRadeonClearRect *depth_boxes;
+} drmRadeonClearType;
+
+typedef struct drmRadeonFullscreenT {
+        enum {
+                RADEON_INIT_FULLSCREEN    = 0x01,
+                RADEON_CLEANUP_FULLSCREEN = 0x02
+        } func;
+} drmRadeonFullscreenType;
+
+typedef struct {
+        unsigned int *mask;
+} drmRadeonStipple;
+
+typedef struct {
+        unsigned int x;
+        unsigned int y;
+        unsigned int width;
+        unsigned int height;
+        const void *data;
 } drmRadeonTexImage;
 
+typedef struct {
+        int offset;
+        int pitch;
+        int format;
+        int width;                      /* Texture image coordinates */
+        int height;
+        drmRadeonTexImage *image;
+} drmRadeonTexture;
+
 
 #define RADEON_MAX_TEXTURE_UNITS 3
 
@@ -148,7 +229,6 @@ typedef struct {
 	unsigned int dirty;
 } drmRadeonState;
 
-
 typedef struct {
 	unsigned int start;
 	unsigned int finish;
@@ -158,52 +238,16 @@ typedef struct {
         unsigned int vc_format;
 } drmRadeonPrim;
 
+typedef struct {
+        int idx;                        /* Index of vertex buffer */
+        int discard;                    /* Client finished with buffer? */
+        int nr_states;
+        drmRadeonState *state;
+        int nr_prims;
+        drmRadeonPrim *prim;
+} drmRadeonVertex2;
+
 #define RADEON_MAX_STATES 16
 #define RADEON_MAX_PRIMS  64
 
-extern int drmRadeonInitCP( int fd, drmRadeonInit *info );
-extern int drmRadeonCleanupCP( int fd );
-
-extern int drmRadeonStartCP( int fd );
-extern int drmRadeonStopCP( int fd );
-extern int drmRadeonResetCP( int fd );
-extern int drmRadeonWaitForIdleCP( int fd );
-
-extern int drmRadeonEngineReset( int fd );
-
-extern int drmRadeonFullScreen( int fd, int enable );
-
-extern int drmRadeonSwapBuffers( int fd );
-extern int drmRadeonClear( int fd, unsigned int flags,
-			   unsigned int clear_color, unsigned int clear_depth,
-			   unsigned int color_mask, unsigned int stencil,
-			   void *boxes, int nbox );
-
-/* Obsolete
- */
-extern int drmRadeonFlushVertexBuffer( int fd, int prim, int indx,
-				       int count, int discard );
-/* Obsolete
- */
-extern int drmRadeonFlushIndices( int fd, int prim, int indx,
-				  int start, int end, int discard );
-
-/* Replaces FlushVertexBuffer, FlushIndices
- */
-extern int drmRadeonFlushPrims( int fd, int indx,
-				int discard, 
-				int nr_states, 
-				drmRadeonState *state, 
-				int nr_prims,
-				drmRadeonPrim *prim );
-
-extern int drmRadeonLoadTexture( int fd, int offset, int pitch, int format,
-				 int width, int height,
-				 drmRadeonTexImage *image );
-
-extern int drmRadeonPolygonStipple( int fd, unsigned int *mask );
-
-extern int drmRadeonFlushIndirectBuffer( int fd, int indx,
-					 int start, int end, int discard );
-
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c
index 769d45e2e..235acafdd 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.c
@@ -491,6 +491,8 @@ static void RADEONDRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 indx)
     int                nbox;
     unsigned int       color, depth, stencil;
     unsigned int       color_mask, depth_mask, flags;
+    drmRadeonClearType clear;
+    drmRadeonClearRect depth_boxes[RADEON_NR_SAREA_CLIPRECTS];
 
     /* FIXME: This should be based on the __GLXvisualConfig info */
     color = 0;
@@ -521,25 +523,36 @@ static void RADEONDRIInitBuffers(WindowPtr pWin, RegionPtr prgn, CARD32 indx)
 
     pSAREAPriv = (RADEONSAREAPrivPtr)DRIGetSAREAPrivate(pScreen);
 
+    clear.flags = flags;
+    clear.clear_color = color;
+    clear.clear_depth = depth;
+    clear.color_mask = color_mask;
+    clear.depth_mask = depth_mask;
+    clear.depth_boxes = depth_boxes;
+
     pbox = REGION_RECTS(prgn);
     nbox = REGION_NUM_RECTS(prgn);
 
     for (; nbox; nbox--, pbox++) {
 	int ret;
 
-	/* drmRadeonClear uses the clip rects to draw instead of the
+	/* DRM_RADEON_CLEAR uses the clip rects to draw instead of the
            rect passed to it; however, it uses the rect for the depth
            clears */
 	pSAREAPriv->boxes[0].x1 = pbox->x1;
-	pSAREAPriv->boxes[0].x2 = pbox->x2;
 	pSAREAPriv->boxes[0].y1 = pbox->y1;
+	pSAREAPriv->boxes[0].x2 = pbox->x2;
 	pSAREAPriv->boxes[0].y2 = pbox->y2;
 	pSAREAPriv->nbox = 1;
 
-	ret = drmRadeonClear(info->drmFD,
-			     flags,
-			     color, depth, color_mask, depth_mask,
-			     pSAREAPriv->boxes, pSAREAPriv->nbox);
+        depth_boxes[0].f[RADEON_CLEAR_X1] = (float)pbox->x1;
+        depth_boxes[0].f[RADEON_CLEAR_Y1] = (float)pbox->y1;
+        depth_boxes[0].f[RADEON_CLEAR_X2] = (float)pbox->x2;
+        depth_boxes[0].f[RADEON_CLEAR_Y2] = (float)pbox->y2;
+        depth_boxes[0].f[RADEON_CLEAR_DEPTH] = (float)depth;
+
+	ret = drmCommandWrite(info->drmFD, DRM_RADEON_CLEAR,
+                              &clear, sizeof(drmRadeonClearType));
 	if (ret) {
 	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
 		       "[dri] DRIInitBuffers timed out, resetting engine...\n");
@@ -1007,6 +1020,9 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
     int           cpp         = info->CurrentLayout.pixel_bytes;
     drmRadeonInit drmInfo;
 
+    memset(&drmInfo, 0, sizeof(drmRadeonInit));
+
+    drmInfo.func                = DRM_RADEON_INIT_CP;
     drmInfo.sarea_priv_offset   = sizeof(XF86DRISAREARec);
     drmInfo.is_pci              = info->IsPCI;
     drmInfo.cp_mode             = info->CPMode;
@@ -1031,9 +1047,11 @@ static int RADEONDRIKernelInit(RADEONInfoPtr info, ScreenPtr pScreen)
     drmInfo.buffers_offset      = info->bufHandle;
     drmInfo.agp_textures_offset = info->agpTexHandle;
 
-    if (drmRadeonInitCP(info->drmFD, &drmInfo) < 0) return FALSE;
+    if (drmCommandWrite(info->drmFD, DRM_RADEON_CP_INIT,
+                        &drmInfo, sizeof(drmRadeonInit)) < 0)
+        return FALSE;
 
-    /* drmRadeonInitCP does an engine reset, which resets some engine
+    /* DRM_RADEON_CP_INIT does an engine reset, which resets some engine
        registers back to their default values, so we need to restore
        those engine register here. */
     RADEONEngineRestore(pScrn);
@@ -1412,6 +1430,42 @@ Bool RADEONDRIScreenInit(ScreenPtr pScreen)
 	return FALSE;
     }
 
+    /* Check the DRM lib version.
+       drmGetLibVersion was not supported in version 1.0, so check for
+       symbol first to avoid possible crash or hang.
+     */
+    if (xf86LoaderCheckSymbol("drmGetLibVersion")) {
+        version = drmGetLibVersion(info->drmFD);
+    }
+    else {
+        /* drmlib version 1.0.0 didn't have the drmGetLibVersion
+           entry point.  Fake it by allocating a version record
+           via drmGetVersion and changing it to version 1.0.0
+         */
+        version = drmGetVersion(info->drmFD);
+        version->version_major      = 1;
+        version->version_minor      = 0;
+        version->version_patchlevel = 0;
+    }
+
+    if (version) {
+	if (version->version_major != 1 ||
+	    version->version_minor < 1) {
+            /* incompatible drm library version */
+            xf86DrvMsg(pScreen->myNum, X_ERROR,
+                "[dri] RADEONDRIScreenInit failed because of a version mismatch.\n"
+		"[dri] libdrm.a module version is %d.%d.%d but version 1.1.x is needed.\n"
+		"[dri] Disabling DRI.\n",
+                version->version_major,
+                version->version_minor,
+                version->version_patchlevel);
+            drmFreeVersion(version);
+            RADEONDRICloseScreen(pScreen);
+            return FALSE;
+	}
+	drmFreeVersion(version);
+    }
+
     /* Check the radeon DRM version */
     version = drmGetVersion(info->drmFD);
     if (version) {
@@ -1572,6 +1626,7 @@ void RADEONDRICloseScreen(ScreenPtr pScreen)
 {
     ScrnInfoPtr   pScrn = xf86Screens[pScreen->myNum];
     RADEONInfoPtr info  = RADEONPTR(pScrn);
+    drmRadeonInit drmInfo;
 
 				/* Stop the CP */
     if (info->directRenderingEnabled) {
@@ -1585,7 +1640,10 @@ void RADEONDRICloseScreen(ScreenPtr pScreen)
     }
 
 				/* De-allocate all kernel resources */
-    drmRadeonCleanupCP(info->drmFD);
+    memset(&drmInfo, 0, sizeof(drmRadeonInit));
+    drmInfo.func = DRM_RADEON_CLEANUP_CP;
+    drmCommandWrite(info->drmFD, DRM_RADEON_CP_INIT,
+                    &drmInfo, sizeof(drmRadeonInit));
 
 				/* De-allocate all AGP resources */
     if (info->agpTex) {
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.h
index 553d54526..4a4f53724 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dri.h
@@ -38,7 +38,7 @@
 #define _RADEON_DRI_
 
 #include "xf86drm.h"
-#include "xf86drmRadeon.h"
+#include "radeon_common.h"
 
 /* DRI Driver defaults */
 #define RADEON_DEFAULT_CP_PIO_MODE  RADEON_CSQ_PRIPIO_INDPIO
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dripriv.h b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dripriv.h
index 351713e56..530fd4abb 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dripriv.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_dripriv.h
@@ -39,7 +39,7 @@
 
 #include "GL/glxint.h"
 #include "xf86drm.h"
-#include "xf86drmRadeon.h"
+#include "radeon_common.h"
 
 #define RADEON_MAX_DRAWABLES 256
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c
index cb46661a3..f64ba654a 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_driver.c
@@ -260,19 +260,16 @@ static const char *drmSymbols[] = {
     "drmAgpRelease",
     "drmAgpUnbind",
     "drmAgpVendorId",
+    "drmCommandNone",
+    "drmCommandRead",
+    "drmCommandWrite",
+    "drmCommandWriteRead",
     "drmDMA",
     "drmFreeVersion",
+    "drmGetLibVersion",
     "drmGetVersion",
     "drmMap",
     "drmMapBufs",
-    "drmRadeonCleanupCP",
-    "drmRadeonClear",
-    "drmRadeonFlushIndirectBuffer",
-    "drmRadeonInitCP",
-    "drmRadeonResetCP",
-    "drmRadeonStartCP",
-    "drmRadeonStopCP",
-    "drmRadeonWaitForIdleCP",
     "drmScatterGatherFree"
     "drmUnmap",
     "drmUnmapBufs",
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_common.h b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_common.h
new file mode 100644
index 000000000..71f6f6d48
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_common.h
@@ -0,0 +1,63 @@
+/* glint_common.h -- common header definitions for Gamma 2D/3D/DRM suite
+ *
+ * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Converted to common header format:
+ *   Jens Owen <jens@tungstengraphics.com>
+ *
+ * $XFree86$
+ *
+ */
+
+#ifndef _GLINT_COMMON_H_
+#define _GLINT_COMMON_H_
+
+/*
+ * WARNING: If you change any of these defines, make sure to change
+ * the kernel include file as well (gamma_drm.h)
+ */
+
+/* Driver specific DRM command indices
+ * NOTE: these are not OS specific, but they are driver specific
+ */
+#define DRM_GAMMA_INIT                0x00
+#define DRM_GAMMA_COPY                0x01
+
+typedef struct {
+   enum {
+      GAMMA_INIT_DMA    = 0x01,
+      GAMMA_CLEANUP_DMA = 0x02
+   } func;
+   int sarea_priv_offset;
+   int pcimode;
+   unsigned int mmio0;
+   unsigned int mmio1;
+   unsigned int mmio2;
+   unsigned int mmio3;
+   unsigned int buffers_offset;
+} drmGAMMAInit;
+
+extern int drmGAMMAInitDMA( int fd, drmGAMMAInit *info );
+extern int drmGAMMACleanupDMA( int fd );
+
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.c
index 1b16da6ba..e6a25cfd1 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.c
@@ -406,6 +406,7 @@ static Bool GLINTDRIKernelInit( ScreenPtr pScreen )
 
    memset( &init, 0, sizeof(drmGAMMAInit) );
 
+   init.func = GAMMA_INIT_DMA;
    init.sarea_priv_offset = sizeof(XF86DRISAREARec);
 
    init.mmio0 = pGlintDRI->registers0.handle;
@@ -420,7 +421,8 @@ static Bool GLINTDRIKernelInit( ScreenPtr pScreen )
        init.pcimode = 1;
    }
 
-   ret = drmGAMMAInitDMA( pGlint->drmSubFD, &init );
+   ret = drmCommandWrite( pGlint->drmSubFD, DRM_GAMMA_INIT, 
+                          &init, sizeof(drmGAMMAInit) );
 
    if ( ret < 0 ) {
       xf86DrvMsg( pScrn->scrnIndex, X_ERROR,
@@ -553,9 +555,48 @@ GLINTDRIScreenInit(ScreenPtr pScreen)
 	return FALSE;
     }
 
-    /* Check the GLINT DRM version */
+    /* Check the DRM versioning */
     {
-        drmVersionPtr version = drmGetVersion(pGlint->drmSubFD);
+        drmVersionPtr version;
+
+	/* Check the DRM lib version.
+	   drmGetLibVersion was not supported in version 1.0, so check for
+	   symbol first to avoid possible crash or hang.
+	 */
+	if (xf86LoaderCheckSymbol("drmGetLibVersion")) {
+	    version = drmGetLibVersion(pGlint->drmSubFD);
+	}
+	else {
+	    /* drmlib version 1.0.0 didn't have the drmGetLibVersion
+	       entry point.  Fake it by allocating a version record
+	       via drmGetVersion and changing it to version 1.0.0
+	     */
+	    version = drmGetVersion(pGlint->drmSubFD);
+	    version->version_major      = 1;
+	    version->version_minor      = 0;
+	    version->version_patchlevel = 0;
+	}
+
+	if (version) {
+	    if (version->version_major != 1 ||
+		version->version_minor < 1) {
+		/* incompatible drm library version */
+		xf86DrvMsg(pScreen->myNum, X_ERROR,
+		    "[dri] GLINTDRIScreenInit failed because of a version mismatch.\n"
+		    "[dri] libdrm.a module version is %d.%d.%d but version 1.1.x is needed.\n"
+		    "[dri] Disabling DRI.\n",
+		    version->version_major,
+		    version->version_minor,
+		    version->version_patchlevel);
+		drmFreeVersion(version);
+		GLINTDRICloseScreen(pScreen);
+		return FALSE;
+	    }
+	    drmFreeVersion(version);
+	}
+
+        /* Check the GLINT DRM version */
+        version = drmGetVersion(pGlint->drmSubFD);
         if (version) {
             if (version->version_major != 2 ||
                 version->version_minor < 0) {
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.h b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.h
index 5558110e6..8285f17fb 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_dri.h
@@ -36,8 +36,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #ifndef _GLINT_DRI_H_
 #define _GLINT_DRI_H_
 
-#include <xf86drm.h>
-#include <xf86drmGamma.h>
+#include "xf86drm.h"
+#include "glint_common.h"
 
 typedef struct {
 	unsigned int	GDeltaMode;
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c
index 3377d3a0a..4633d2df6 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/glint/glint_driver.c
@@ -341,9 +341,11 @@ const char *GLINTint10Symbols[] = {
 static const char *drmSymbols[] = {
     "drmAddBufs",
     "drmAddMap",
+    "drmCommandWrite",
     "drmCtlInstHandler",
     "drmFreeVersion",
     "drmGetInterruptFromBusID",
+    "drmGetLibVersion",
     "drmGetVersion",
     "drmMapBufs",
     "drmUnmapBufs",
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_common.h b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_common.h
new file mode 100644
index 000000000..b96104cdf
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_common.h
@@ -0,0 +1,188 @@
+/* i810_common.h -- common header definitions for I810 2D/3D/DRM suite
+ *
+ * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Converted to common header format:
+ *   Jens Owen <jens@tungstengraphics.com>
+ *
+ * $XFree86$
+ *
+ */
+
+/* WARNING: If you change any of these defines, make sure to change
+ * the kernel include file as well (i810_drm.h)
+ */
+
+#ifndef _I810_COMMON_H_
+#define _I810_COMMON_H_
+
+#ifndef _I810_DEFINES_
+#define _I810_DEFINES_
+#define I810_USE_BATCH 1
+
+#define I810_DMA_BUF_ORDER     12
+#define I810_DMA_BUF_SZ        (1<<I810_DMA_BUF_ORDER)
+#define I810_DMA_BUF_NR        256
+
+#define I810_NR_SAREA_CLIPRECTS 8
+
+/* Each region is a minimum of 64k, and there are at most 64 of them.
+ */
+#define I810_NR_TEX_REGIONS 64
+#define I810_LOG_MIN_TEX_REGION_SIZE 16
+
+/* Destbuffer state
+ *    - backbuffer linear offset and pitch -- invarient in the current dri
+ *    - zbuffer linear offset and pitch -- also invarient
+ *    - drawing origin in back and depth buffers.
+ *
+ * Keep the depth/back buffer state here to acommodate private buffers
+ * in the future.
+ */
+#define I810_DESTREG_DI0  0     /* CMD_OP_DESTBUFFER_INFO (2 dwords) */
+#define I810_DESTREG_DI1  1
+#define I810_DESTREG_DV0  2     /* GFX_OP_DESTBUFFER_VARS (2 dwords) */
+#define I810_DESTREG_DV1  3
+#define I810_DESTREG_DR0  4     /* GFX_OP_DRAWRECT_INFO (4 dwords) */
+#define I810_DESTREG_DR1  5
+#define I810_DESTREG_DR2  6
+#define I810_DESTREG_DR3  7
+#define I810_DESTREG_DR4  8
+#define I810_DEST_SETUP_SIZE 10
+
+/* Context state
+ */
+#define I810_CTXREG_CF0   0     /* GFX_OP_COLOR_FACTOR */
+#define I810_CTXREG_CF1   1
+#define I810_CTXREG_ST0   2     /* GFX_OP_STIPPLE */
+#define I810_CTXREG_ST1   3
+#define I810_CTXREG_VF    4     /* GFX_OP_VERTEX_FMT */
+#define I810_CTXREG_MT    5     /* GFX_OP_MAP_TEXELS */
+#define I810_CTXREG_MC0   6     /* GFX_OP_MAP_COLOR_STAGES - stage 0 */
+#define I810_CTXREG_MC1   7     /* GFX_OP_MAP_COLOR_STAGES - stage 1 */
+#define I810_CTXREG_MC2   8     /* GFX_OP_MAP_COLOR_STAGES - stage 2 */
+#define I810_CTXREG_MA0   9     /* GFX_OP_MAP_ALPHA_STAGES - stage 0 */
+#define I810_CTXREG_MA1   10    /* GFX_OP_MAP_ALPHA_STAGES - stage 1 */
+#define I810_CTXREG_MA2   11    /* GFX_OP_MAP_ALPHA_STAGES - stage 2 */
+#define I810_CTXREG_SDM   12    /* GFX_OP_SRC_DEST_MONO */
+#define I810_CTXREG_FOG   13    /* GFX_OP_FOG_COLOR */
+#define I810_CTXREG_B1    14    /* GFX_OP_BOOL_1 */
+#define I810_CTXREG_B2    15    /* GFX_OP_BOOL_2 */
+#define I810_CTXREG_LCS   16    /* GFX_OP_LINEWIDTH_CULL_SHADE_MODE */
+#define I810_CTXREG_PV    17    /* GFX_OP_PV_RULE -- Invarient! */
+#define I810_CTXREG_ZA    18    /* GFX_OP_ZBIAS_ALPHAFUNC */
+#define I810_CTXREG_AA    19    /* GFX_OP_ANTIALIAS */
+#define I810_CTX_SETUP_SIZE 20
+
+/* Texture state (per tex unit)
+ */
+#define I810_TEXREG_MI0  0      /* GFX_OP_MAP_INFO (4 dwords) */
+#define I810_TEXREG_MI1  1
+#define I810_TEXREG_MI2  2
+#define I810_TEXREG_MI3  3
+#define I810_TEXREG_MF   4      /* GFX_OP_MAP_FILTER */
+#define I810_TEXREG_MLC  5      /* GFX_OP_MAP_LOD_CTL */
+#define I810_TEXREG_MLL  6      /* GFX_OP_MAP_LOD_LIMITS */
+#define I810_TEXREG_MCS  7      /* GFX_OP_MAP_COORD_SETS ??? */
+#define I810_TEX_SETUP_SIZE 8
+
+/* Driver specific DRM command indices
+ * NOTE: these are not OS specific, but they are driver specific
+ */
+#define DRM_I810_INIT                     0x00
+#define DRM_I810_VERTEX                   0x01
+#define DRM_I810_CLEAR                    0x02
+#define DRM_I810_FLUSH                    0x03
+#define DRM_I810_GETAGE                   0x04
+#define DRM_I810_GETBUF                   0x05
+#define DRM_I810_SWAP                     0x06
+#define DRM_I810_COPY                     0x07
+#define DRM_I810_DOCOPY                   0x08
+#define DRM_I810_OV0INFO                  0x09
+#define DRM_I810_FSTATUS                  0x0a
+#define DRM_I810_OV0FLIP                  0x0b
+#define DRM_I810_MC                       0x0c
+#define DRM_I810_RSTATUS                  0x0d
+
+#endif
+
+typedef struct {
+   enum {
+      I810_INIT_DMA = 0x01,
+      I810_CLEANUP_DMA = 0x02
+   } func;
+   unsigned int mmio_offset;
+   unsigned int buffers_offset;
+   int sarea_priv_offset;
+   unsigned int ring_start;
+   unsigned int ring_end;
+   unsigned int ring_size;
+   unsigned int front_offset;
+   unsigned int back_offset;
+   unsigned int depth_offset;
+   unsigned int overlay_offset;
+   unsigned int overlay_physical;
+   unsigned int w;
+   unsigned int h;
+   unsigned int pitch;
+   unsigned int pitch_bits;
+} drmI810Init;
+
+typedef struct {
+        void *virtual;
+        int request_idx;
+        int request_size;
+        int granted;
+} drmI810DMA;
+
+/* Flags for clear ioctl
+ */
+#define I810_FRONT   0x1
+#define I810_BACK    0x2
+#define I810_DEPTH   0x4
+
+typedef struct {
+        int clear_color;
+        int clear_depth;
+        int flags;
+} drmI810Clear;
+
+typedef struct {
+        int idx;                /* buffer index */
+        int used;               /* nr bytes in use */
+        int discard;            /* client is finished with the buffer? */
+} drmI810Vertex;
+
+/* Flags for vertex ioctl
+ */
+#define PR_TRIANGLES         (0x0<<18)
+#define PR_TRISTRIP_0        (0x1<<18)
+#define PR_TRISTRIP_1        (0x2<<18)
+#define PR_TRIFAN            (0x3<<18)
+#define PR_POLYGON           (0x4<<18)
+#define PR_LINES             (0x5<<18)
+#define PR_LINESTRIP         (0x6<<18)
+#define PR_RECTS             (0x7<<18)
+#define PR_MASK              (0x7<<18)
+
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.c
index 297c2e4ed..43d6c924c 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.c
@@ -56,12 +56,18 @@ static int i810_pitch_flags[] = {
 Bool I810CleanupDma(ScrnInfoPtr pScrn)
 {
    I810Ptr pI810 = I810PTR(pScrn);
-   Bool ret_val;
+   drmI810Init info;
+
+   memset(&info, 0, sizeof(drmI810Init));
+   info.func = I810_CLEANUP_DMA;
 
-   ret_val = drmI810CleanupDma(pI810->drmSubFD);
-   if (ret_val == FALSE)
+   if (drmCommandWrite(pI810->drmSubFD, DRM_I810_INIT, 
+                       &info, sizeof(drmI810Init))) {
       xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "[dri] I810 Dma Cleanup Failed\n");
-   return ret_val;
+      return FALSE;
+   }
+
+   return TRUE;
 }
 
 Bool I810InitDma(ScrnInfoPtr pScrn)
@@ -70,14 +76,17 @@ Bool I810InitDma(ScrnInfoPtr pScrn)
    I810RingBuffer *ring = &(pI810->LpRing);
    I810DRIPtr pI810DRI = (I810DRIPtr) pI810->pDRIInfo->devPrivate;
    drmI810Init info;
-   Bool ret_val;
 
-   info.start = ring->mem.Start;
-   info.end = ring->mem.End;
-   info.size = ring->mem.Size;
+   memset(&info, 0, sizeof(drmI810Init));
+
+   info.func = I810_INIT_DMA;
+
+   info.ring_start = ring->mem.Start;
+   info.ring_end = ring->mem.End;
+   info.ring_size = ring->mem.Size;
    info.mmio_offset = (unsigned int)pI810DRI->regs;
    info.buffers_offset = (unsigned int)pI810->buffer_map;
-   info.sarea_off = sizeof(XF86DRISAREARec);
+   info.sarea_priv_offset = sizeof(XF86DRISAREARec);
 
    info.front_offset = 0;
    info.back_offset = pI810->BackBuffer.Start;
@@ -89,12 +98,14 @@ Bool I810InitDma(ScrnInfoPtr pScrn)
    info.pitch = pI810->auxPitch;
    info.pitch_bits = pI810->auxPitchBits;
 
-   ret_val = drmI810InitDma(pI810->drmSubFD, &info);
-   if(ret_val == FALSE) {
+   if (drmCommandWrite(pI810->drmSubFD, DRM_I810_INIT, 
+                       &info, sizeof(drmI810Init))) {
       xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
                  "[drm] I810 Dma Initialization failed.\n");
+      return FALSE;
    }
-   return ret_val;
+
+   return TRUE;
 }
 
 static Bool
@@ -334,9 +345,48 @@ Bool I810DRIScreenInit(ScreenPtr pScreen)
       return FALSE;
    }
 
-   /* Check the i810 DRM version */
+   /* Check the DRM versioning */
    {
-      drmVersionPtr version = drmGetVersion(pI810->drmSubFD);
+      drmVersionPtr version;
+
+      /* Check the DRM lib version.
+	 drmGetLibVersion was not supported in version 1.0, so check for
+	 symbol first to avoid possible crash or hang.
+       */
+      if (xf86LoaderCheckSymbol("drmGetLibVersion")) {
+         version = drmGetLibVersion(pI810->drmSubFD);
+      }
+      else {
+	 /* drmlib version 1.0.0 didn't have the drmGetLibVersion
+	    entry point.  Fake it by allocating a version record
+	    via drmGetVersion and changing it to version 1.0.0
+	  */
+	 version = drmGetVersion(pI810->drmSubFD);
+	 version->version_major      = 1;
+	 version->version_minor      = 0;
+	 version->version_patchlevel = 0;
+      }
+
+      if (version) {
+	 if (version->version_major != 1 ||
+	     version->version_minor < 1) {
+	    /* incompatible drm library version */
+	    xf86DrvMsg(pScreen->myNum, X_ERROR,
+		       "[dri] I810DRIScreenInit failed because of a version mismatch.\n"
+		       "[dri] libdrm.a module version is %d.%d.%d but version 1.1.x is needed.\n"
+		       "[dri] Disabling DRI.\n",
+		       version->version_major,
+		       version->version_minor,
+		       version->version_patchlevel);
+	    drmFreeVersion(version);
+	    I810DRICloseScreen(pScreen);
+	    return FALSE;
+	 }
+	 drmFreeVersion(version);
+      }
+
+      /* Check the i810 DRM version */
+      version = drmGetVersion(pI810->drmSubFD);
       if (version) {
          if (version->version_major != 1 ||
              version->version_minor < 2) {
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.h b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.h
index 96a680b85..f52f91562 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_dri.h
@@ -3,8 +3,8 @@
 #ifndef _I810_DRI_
 #define _I810_DRI_
 
-#include <xf86drm.h>
-#include <xf86drmI810.h>
+#include "xf86drm.h"
+#include "i810_common.h"
 
 #define I810_MAX_DRAWABLES 256
 
@@ -57,6 +57,14 @@ typedef struct {
 /* WARNING: Do not change the SAREA structure without changing the kernel
  * as well */
 
+#define I810_UPLOAD_TEX0IMAGE  0x1 /* handled clientside */
+#define I810_UPLOAD_TEX1IMAGE  0x2 /* handled clientside */
+#define I810_UPLOAD_CTX        0x4
+#define I810_UPLOAD_BUFFERS    0x8
+#define I810_UPLOAD_TEX0       0x10
+#define I810_UPLOAD_TEX1       0x20
+#define I810_UPLOAD_CLIPRECTS  0x40
+
 typedef struct {
    unsigned char next, prev; /* indices to form a circular LRU  */
    unsigned char in_use;   /* owned by a client, or free? */
@@ -64,6 +72,11 @@ typedef struct {
 } I810TexRegionRec, *I810TexRegionPtr;
 
 typedef struct {
+   unsigned int ContextState[I810_CTX_SETUP_SIZE];
+   unsigned int BufferState[I810_DEST_SETUP_SIZE];
+   unsigned int TexState[2][I810_TEX_SETUP_SIZE];
+   unsigned int dirty;
+
    unsigned int nbox;
    XF86DRIClipRectRec boxes[I810_NR_SAREA_CLIPRECTS];
    
@@ -91,6 +104,9 @@ typedef struct {
    int last_quiescent;     /*  */
    
    int ctxOwner;           /* last context to upload state */
+
+   int vertex_prim;
+
 } I810SAREARec, *I810SAREAPtr;
 
 typedef struct {
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c
index 5bf7976e8..0f08b4c96 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i810_driver.c
@@ -205,16 +205,17 @@ static const char *drmSymbols[] = {
    "drmAgpRelease",
    "drmAvailable",
    "drmAuthMagic",
+   "drmCommandNone",
+   "drmCommandRead",
+   "drmCommandWrite",
+   "drmCommandWriteRead",
    "drmCreateContext",
    "drmCtlInstHandler",
    "drmDestroyContext",
    "drmFreeVersion",
    "drmGetInterruptFromBusID",
+   "drmGetLibVersion",
    "drmGetVersion",
-   "drmI810CleanupDma",
-   "drmI810InitDma",
-   "drmI830CleanupDma",
-   "drmI830InitDma",
    NULL
 };
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmI830.h b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_common.h
index 89d8d8cb5..56b2c449e 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmI830.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_common.h
@@ -1,6 +1,7 @@
 /**************************************************************************
 
 Copyright 2001 VA Linux Systems Inc., Fremont, California.
+Copyright 2002 Tungsten Graphics Inc., Cedar Park, Texas.
 
 All Rights Reserved.
 
@@ -29,10 +30,13 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 /* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86drmI830.h,v 1.2 2001/10/04 18:32:29 alanh Exp $ */
 
 /* Author: Jeff Hartmann <jhartmann@valinux.com> 
+
+   Converted to common header format:
+     Jens Owen <jens@tungstengraphics.com>
  */
 
-#ifndef _I830_XF86DRM_H_
-#define _I830_XF86DRM_H_
+#ifndef _I830_COMMON_H_
+#define _I830_COMMON_H_
 
 /* WARNING: These defines must be the same as what the Xserver uses.
  * if you change them, you must change the defines in the Xserver.
@@ -161,15 +165,33 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define I830_FRONT   0x1
 #define I830_BACK    0x2
 #define I830_DEPTH   0x4
+
+/* Driver specific DRM command indices
+ * NOTE: these are not OS specific, but they are driver specific
+ */
+#define DRM_I830_INIT                     0x00
+#define DRM_I830_VERTEX                   0x01
+#define DRM_I830_CLEAR                    0x02
+#define DRM_I830_FLUSH                    0x03
+#define DRM_I830_GETAGE                   0x04
+#define DRM_I830_GETBUF                   0x05
+#define DRM_I830_SWAP                     0x06
+#define DRM_I830_COPY                     0x07
+#define DRM_I830_DOCOPY                   0x08
+
 #endif /* _I830_DEFINES_ */
 
-typedef struct _drmI830Init {
-   unsigned int start;
-   unsigned int end;
-   unsigned int size;
+typedef struct {
+   enum {
+      I830_INIT_DMA = 0x01,
+      I830_CLEANUP_DMA = 0x02
+   } func;
    unsigned int mmio_offset;
    unsigned int buffers_offset;
-   int sarea_off;
+   int sarea_priv_offset;
+   unsigned int ring_start;
+   unsigned int ring_end;
+   unsigned int ring_size;
    unsigned int front_offset;
    unsigned int back_offset;
    unsigned int depth_offset;
@@ -177,10 +199,9 @@ typedef struct _drmI830Init {
    unsigned int h;
    unsigned int pitch;
    unsigned int pitch_bits;
+   unsigned int back_pitch;
+   unsigned int depth_pitch;
    unsigned int cpp;
 } drmI830Init;
 
-Bool drmI830CleanupDma(int driSubFD);
-Bool drmI830InitDma(int driSubFD, drmI830Init *info );
-
 #endif /* _I830_DRM_H_ */
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.c
index b970bffa0..c61643225 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.c
@@ -80,12 +80,18 @@ static int i830_pitches[] = {
 Bool I830CleanupDma(ScrnInfoPtr pScrn)
 {
    I810Ptr pI810 = I810PTR(pScrn);
-   Bool ret_val;
-   
-   ret_val = drmI830CleanupDma(pI810->drmSubFD);
-   if (ret_val == FALSE)
+   drmI830Init info;
+
+   memset(&info, 0, sizeof(drmI830Init));
+   info.func = I830_CLEANUP_DMA;
+
+   if (drmCommandWrite(pI810->drmSubFD, DRM_I830_INIT, 
+                       &info, sizeof(drmI830Init))) {
       xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "I830 Dma Cleanup Failed\n");
-   return ret_val;
+      return FALSE;
+   }
+
+   return TRUE;
 }
 
 Bool I830InitDma(ScrnInfoPtr pScrn)
@@ -94,16 +100,18 @@ Bool I830InitDma(ScrnInfoPtr pScrn)
    I810RingBuffer *ring = &(pI810->LpRing);
    I830DRIPtr pI830DRI=(I830DRIPtr)pI810->pDRIInfo->devPrivate;
    drmI830Init info;
-   Bool ret_val;
 
-   info.start = ring->mem.Start;
-   info.end = ring->mem.End; 
-   info.size = ring->mem.Size;
+   memset(&info, 0, sizeof(drmI830Init));
+   info.func = I830_INIT_DMA;
+
+   info.ring_start = ring->mem.Start;
+   info.ring_end = ring->mem.End; 
+   info.ring_size = ring->mem.Size;
 
    info.mmio_offset = (unsigned int)pI830DRI->regs;
    info.buffers_offset = (unsigned int)pI810->buffer_map;
 
-   info.sarea_off = sizeof(XF86DRISAREARec);
+   info.sarea_priv_offset = sizeof(XF86DRISAREARec);
 
    info.front_offset = 0;
    info.back_offset = pI810->BackBuffer.Start;
@@ -112,11 +120,17 @@ Bool I830InitDma(ScrnInfoPtr pScrn)
    info.h = pScrn->virtualY;
    info.pitch = pI810->auxPitch;
    info.pitch_bits = pI810->auxPitchBits;
+   info.back_pitch = pI810->auxPitch;
+   info.depth_pitch = pI810->auxPitch;
    info.cpp = pI810->cpp;
 
-   ret_val = drmI830InitDma(pI810->drmSubFD, &info);
-   if(ret_val == FALSE) ErrorF("i830 Dma Initialization Failed\n");
-   return ret_val;
+   if (drmCommandWrite(pI810->drmSubFD, DRM_I830_INIT, 
+                       &info, sizeof(drmI830Init))) {
+      xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "I830 Dma Initialization Failed\n");
+      return FALSE;
+   }
+
+   return TRUE;
 }
 
 static Bool
@@ -445,9 +459,48 @@ Bool I830DRIScreenInit(ScreenPtr pScreen)
       return FALSE;
    }
    
-   /* Check the i830 DRM version */
+   /* Check the DRM versioning */
    {
-      drmVersionPtr version = drmGetVersion(pI810->drmSubFD);
+      drmVersionPtr version;
+
+      /* Check the DRM lib version.
+	 drmGetLibVersion was not supported in version 1.0, so check for
+	 symbol first to avoid possible crash or hang.
+       */
+      if (xf86LoaderCheckSymbol("drmGetLibVersion")) {
+         version = drmGetLibVersion(pI810->drmSubFD);
+      }
+      else {
+	 /* drmlib version 1.0.0 didn't have the drmGetLibVersion
+	    entry point.  Fake it by allocating a version record
+	    via drmGetVersion and changing it to version 1.0.0
+	  */
+	 version = drmGetVersion(pI810->drmSubFD);
+	 version->version_major      = 1;
+	 version->version_minor      = 0;
+	 version->version_patchlevel = 0;
+      }
+
+      if (version) {
+	 if (version->version_major != 1 ||
+	     version->version_minor < 1) {
+	    /* incompatible drm library version */
+	    xf86DrvMsg(pScreen->myNum, X_ERROR,
+                       "[dri] I830DRIScreenInit failed because of a version mismatch.\n"
+                       "[dri] libdrm.a module version is %d.%d.%d but version 1.1.x is needed.\n"
+                       "[dri] Disabling DRI.\n",
+                       version->version_major,
+                       version->version_minor,
+                       version->version_patchlevel);
+	    drmFreeVersion(version);
+            I830DRICloseScreen(pScreen);
+	    return FALSE;
+	 }
+	 drmFreeVersion(version);
+      }
+
+      /* Check the i830 DRM version */
+      version = drmGetVersion(pI810->drmSubFD);
       if (version) {
          if (version->version_major != 1 ||
              version->version_minor < 2) {
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.h b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.h
index 6c99080af..ac6302681 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/i810/i830_dri.h
@@ -3,8 +3,8 @@
 #ifndef _I830_DRI_H
 #define _I830_DRI_H
 
-#include <xf86drm.h>
-#include <xf86drmI830.h>
+#include "xf86drm.h"
+#include "i830_common.h"
 
 #define I830_MAX_DRAWABLES 256
 
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_common.h b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_common.h
new file mode 100644
index 000000000..6283d979c
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_common.h
@@ -0,0 +1,141 @@
+/* mga_common.h -- common header definitions for MGA 2D/3D/DRM suite
+ *
+ * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Converted to common header format:
+ *   Jens Owen <jens@tungstengraphics.com>
+ *
+ * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86drmMga.h,v 3.6 2001/04/16 15:02:13 tsi Exp $
+ *
+ */
+
+#ifndef _MGA_COMMON_H_
+#define _MGA_COMMON_H_
+
+/*
+ * WARNING: If you change any of these defines, make sure to change
+ * the kernel include file as well (mga_drm.h)
+ */
+
+#define  DRM_MGA_IDLE_RETRY          2048
+#define  DRM_MGA_NR_TEX_HEAPS        2
+
+typedef struct {
+   int installed;
+   unsigned long phys_addr;
+   int size;
+} drmMGAWarpIndex;
+
+/* Driver specific DRM command indices
+ * NOTE: these are not OS specific, but they are driver specific
+ */
+#define DRM_MGA_INIT              0x00
+#define DRM_MGA_FLUSH             0x01
+#define DRM_MGA_RESET             0x02
+#define DRM_MGA_SWAP              0x03
+#define DRM_MGA_CLEAR             0x04
+#define DRM_MGA_VERTEX            0x05
+#define DRM_MGA_INDICES           0x06
+#define DRM_MGA_ILOAD             0x07
+#define DRM_MGA_BLIT              0x08
+
+typedef struct {
+   enum {
+      MGA_INIT_DMA    = 0x01,
+      MGA_CLEANUP_DMA = 0x02
+   } func;
+
+   unsigned long sarea_priv_offset;
+
+   int chipset;
+   int sgram;
+
+   unsigned int maccess;
+
+   unsigned int fb_cpp;
+   unsigned int front_offset, front_pitch;
+   unsigned int back_offset, back_pitch;
+
+   unsigned int depth_cpp;
+   unsigned int depth_offset, depth_pitch;
+
+   unsigned int texture_offset[DRM_MGA_NR_TEX_HEAPS];
+   unsigned int texture_size[DRM_MGA_NR_TEX_HEAPS];
+
+   unsigned long fb_offset;
+   unsigned long mmio_offset;
+   unsigned long status_offset;
+   unsigned long warp_offset;
+   unsigned long primary_offset;
+   unsigned long buffers_offset;
+} drmMGAInit;
+
+typedef enum {
+   DRM_MGA_LOCK_READY      = 0x01, /* Wait until hardware is ready for DMA */
+   DRM_MGA_LOCK_QUIESCENT  = 0x02, /* Wait until hardware quiescent        */
+   DRM_MGA_LOCK_FLUSH      = 0x04, /* Flush this context's DMA queue first */
+   DRM_MGA_LOCK_FLUSH_ALL  = 0x08, /* Flush all DMA queues first           */
+                                   /* These *HALT* flags aren't supported yet
+                                      -- they will be used to support the
+                                         full-screen DGA-like mode.        */
+   DRM_MGA_HALT_ALL_QUEUES = 0x10, /* Halt all current and future queues   */
+   DRM_MGA_HALT_CUR_QUEUES = 0x20  /* Halt all current queues              */
+} drmMGALockFlags;
+
+typedef struct {
+   int             context;
+   drmMGALockFlags flags;
+} drmMGALock;
+
+typedef struct {
+   int idx;
+   unsigned int dstorg;
+   unsigned int length;
+} drmMGAIload;
+
+typedef struct {
+   unsigned int flags;
+   unsigned int clear_color;
+   unsigned int clear_depth;
+   unsigned int color_mask;
+   unsigned int depth_mask;
+} drmMGAClearRec;
+
+typedef struct {
+   int idx;                        /* buffer to queue */
+   int used;                       /* bytes in use */
+   int discard;                    /* client finished with buffer?  */
+} drmMGAVertex;
+
+typedef struct {
+        unsigned int planemask;
+        unsigned int srcorg;
+        unsigned int dstorg;
+        int src_pitch, dst_pitch;
+        int delta_sx, delta_sy;
+        int delta_dx, delta_dy;
+        int height, ydir;               /* flip image vertically */
+        int source_pitch, dest_pitch;
+} drmMGABlit;
+
+#endif
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c
index 3d7df452b..c8545329d 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.c
@@ -342,13 +342,29 @@ static void MGADestroyContext( ScreenPtr pScreen, drmContext hwContext,
 static void MGAWaitForIdleDMA( ScrnInfoPtr pScrn )
 {
    MGAPtr pMga = MGAPTR(pScrn);
+   drmMGALock lock;
    int ret;
    int i = 0;
 
+   memset( &lock, 0, sizeof(drmMGALock) );
+
    for (;;) {
       do {
-	 ret = drmMGAFlushDMA( pMga->drmFD,
-			       DRM_LOCK_QUIESCENT | DRM_LOCK_FLUSH );
+         /* first ask for quiescent and flush */
+         lock.flags = DRM_MGA_LOCK_QUIESCENT | DRM_MGA_LOCK_FLUSH;
+         do {
+	    ret = drmCommandWrite( pMga->drmFD, DRM_MGA_FLUSH,
+                                   &lock, sizeof( drmMGALock ) );
+         } while ( ret == -EBUSY && i++ < DRM_MGA_IDLE_RETRY );
+
+         /* if it's still busy just try quiescent */
+         if ( ret == -EBUSY ) { 
+            lock.flags = DRM_MGA_LOCK_QUIESCENT;
+            do {
+	       ret = drmCommandWrite( pMga->drmFD, DRM_MGA_FLUSH,
+                                      &lock, sizeof( drmMGALock ) );
+            } while ( ret == -EBUSY && i++ < DRM_MGA_IDLE_RETRY );
+         }
       } while ( ( ret == -EBUSY ) && ( i++ < MGA_TIMEOUT ) );
 
       if ( ret == 0 )
@@ -357,7 +373,7 @@ static void MGAWaitForIdleDMA( ScrnInfoPtr pScrn )
       xf86DrvMsg( pScrn->scrnIndex, X_ERROR,
 		  "[dri] Idle timed out, resetting engine...\n" );
 
-      drmMGAEngineReset( pMga->drmFD );
+      drmCommandNone( pMga->drmFD, DRM_MGA_RESET );
    }
 }
 
@@ -846,6 +862,7 @@ static Bool MGADRIKernelInit( ScreenPtr pScreen )
 
    memset( &init, 0, sizeof(drmMGAInit) );
 
+   init.func = MGA_INIT_DMA;
    init.sarea_priv_offset = sizeof(XF86DRISAREARec);
 
    switch ( pMga->Chipset ) {
@@ -888,7 +905,7 @@ static Bool MGADRIKernelInit( ScreenPtr pScreen )
    init.texture_offset[1] = pMGADRIServer->agpTextures.handle;
    init.texture_size[1] = pMGADRIServer->agpTextures.size;
 
-   ret = drmMGAInitDMA( pMga->drmFD, &init );
+   ret = drmCommandWrite( pMga->drmFD, DRM_MGA_INIT, &init, sizeof(drmMGAInit));
    if ( ret < 0 ) {
       xf86DrvMsg( pScrn->scrnIndex, X_ERROR,
 		  "[drm] Failed to initialize DMA! (%d)\n", ret );
@@ -1099,9 +1116,48 @@ Bool MGADRIScreenInit( ScreenPtr pScreen )
       return FALSE;
    }
 
-   /* Check the MGA DRM version */
+   /* Check the DRM versioning */
    {
-      drmVersionPtr version = drmGetVersion(pMga->drmFD);
+      drmVersionPtr version;
+
+      /* Check the DRM lib version.
+	 drmGetLibVersion was not supported in version 1.0, so check for
+	 symbol first to avoid possible crash or hang.
+       */
+      if (xf86LoaderCheckSymbol("drmGetLibVersion")) {
+         version = drmGetLibVersion(pMga->drmFD);
+      }
+      else {
+	 /* drmlib version 1.0.0 didn't have the drmGetLibVersion
+	    entry point.  Fake it by allocating a version record
+	    via drmGetVersion and changing it to version 1.0.0
+	  */
+	 version = drmGetVersion(pMga->drmFD);
+	 version->version_major      = 1;
+	 version->version_minor      = 0;
+	 version->version_patchlevel = 0;
+      }
+
+      if (version) {
+	 if (version->version_major != 1 ||
+	     version->version_minor < 1) {
+	     /* incompatible drm library version */
+	    xf86DrvMsg(pScreen->myNum, X_ERROR,
+		       "[dri] MGADRIScreenInit failed because of a version mismatch.\n"
+		       "[dri] libdrm.a module version is %d.%d.%d but version 1.1.x is needed.\n"
+		       "[dri] Disabling DRI.\n",
+		       version->version_major,
+		       version->version_minor,
+		       version->version_patchlevel);
+	    drmFreeVersion(version);
+	    MGADRICloseScreen( pScreen );		/* FIXME: ??? */
+	    return FALSE;
+	 }
+	 drmFreeVersion(version);
+      }
+
+      /* Check the MGA DRM version */
+      version = drmGetVersion(pMga->drmFD);
       if ( version ) {
          if ( version->version_major != 3 ||
 	      version->version_minor < 0 ) {
@@ -1253,13 +1309,17 @@ void MGADRICloseScreen( ScreenPtr pScreen )
    ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
    MGAPtr pMga = MGAPTR(pScrn);
    MGADRIServerPrivatePtr pMGADRIServer = pMga->DRIServerInfo;
+   drmMGAInit init;
 
    if ( pMGADRIServer->drmBuffers ) {
       drmUnmapBufs( pMGADRIServer->drmBuffers );
       pMGADRIServer->drmBuffers = NULL;
    }
 
-   drmMGACleanupDMA( pMga->drmFD );
+   /* Cleanup DMA */
+   memset( &init, 0, sizeof(drmMGAInit) );
+   init.func = MGA_CLEANUP_DMA;
+   drmCommandWrite( pMga->drmFD, DRM_MGA_INIT, &init, sizeof(drmMGAInit) );
 
    if ( pMGADRIServer->status.map ) {
       drmUnmap( pMGADRIServer->status.map, pMGADRIServer->status.size );
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.h b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.h
index 0ab62aa32..9d6d7d47c 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_dri.h
@@ -24,7 +24,7 @@
  * OTHER DEALINGS IN THE SOFTWARE.
  *
  * Authors:
- *   Keith WHitwell <keithw@valinux.com>
+ *   Keith Whitwell <keithw@valinux.com>
  *   Gareth Hughes <gareth@valinux.com>
  */
 
@@ -32,7 +32,7 @@
 #define __MGA_DRI_H__
 
 #include "xf86drm.h"
-#include "xf86drmMga.h"
+#include "mga_common.h"
 
 #define MGA_DEFAULT_AGP_MODE     1
 #define MGA_MAX_AGP_MODE         4
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c
index 084e3f16f..fcecb2770 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/mga/mga_driver.c
@@ -331,12 +331,13 @@ static const char *drmSymbols[] = {
     "drmAgpRelease",
     "drmAgpUnbind",
     "drmAgpVendorId",
+    "drmCommandNone",
+    "drmCommandRead",
+    "drmCommandWrite",
+    "drmCommandWriteRead",
     "drmFreeVersion",
+    "drmGetLibVersion",
     "drmGetVersion",
-    "drmMGACleanupDMA",
-    "drmMGAEngineReset",
-    "drmMGAFlushDMA",
-    "drmMGAInitDMA",
     "drmMapBufs",
     "drmMap",
     "drmUnmap",
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmSiS.h b/xc/programs/Xserver/hw/xfree86/drivers/sis/xf86drmSiS.h
index a4d31a004..a4d31a004 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmSiS.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/sis/xf86drmSiS.h
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/Imakefile b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/Imakefile
index d9fc90cf1..e5534135f 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/Imakefile
@@ -22,8 +22,8 @@ MTRR_DEFINES = -DHAS_MTRR_SUPPORT
 	xf86drmI830.c \
 	xf86drmMga.c \
 	xf86drmR128.c \
-	xf86drmRadeon.c \
 	xf86drmSiS.c \
+	xf86drmCompat.c \
 	$(MSRC)
 
  OBJS = xf86drm.o \
@@ -34,8 +34,8 @@ MTRR_DEFINES = -DHAS_MTRR_SUPPORT
 	xf86drmI830.o \
 	xf86drmMga.o \
 	xf86drmR128.o \
-	xf86drmRadeon.o \
 	xf86drmSiS.o \
+	xf86drmCompat.o \
 	$(MOBJ)
 
 INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \
@@ -67,8 +67,8 @@ LinkSourceFile(xf86drmI830.c,$(XF86OSSRC)/linux/drm)
 LinkSourceFile(xf86drmMga.c,$(XF86OSSRC)/linux/drm)
 LinkSourceFile(xf86drmR128.c,$(XF86OSSRC)/linux/drm)
 LinkSourceFile(xf86drmRandom.c,$(XF86OSSRC)/linux/drm)
-LinkSourceFile(xf86drmRadeon.c,$(XF86OSSRC)/linux/drm)
 LinkSourceFile(xf86drmSL.c,$(XF86OSSRC)/linux/drm)
 LinkSourceFile(xf86drmSiS.c,$(XF86OSSRC)/linux/drm)
+LinkSourceFile(xf86drmCompat.c,$(XF86OSSRC)/linux/drm)
 
 InstallDriverSDKLibraryModule(drm,$(DRIVERSDKMODULEDIR),freebsd)
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm.h
index 92fddec6a..ddb280cc0 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/drm.h
@@ -93,15 +93,6 @@ typedef struct drm_tex_region {
 	unsigned int	age;
 } drm_tex_region_t;
 
-/* Seperate include files for the driver specific structures */
-#include "mga_drm.h"
-#include "i810_drm.h"
-#include "i830_drm.h"
-#include "r128_drm.h"
-#include "radeon_drm.h"
-#include "sis_drm.h"
-#include "gamma_drm.h"
-
 typedef struct drm_version {
 	int    version_major;	  /* Major version			    */
 	int    version_minor;	  /* Minor version			    */
@@ -422,87 +413,8 @@ typedef struct drm_scatter_gather {
 #define DRM_IOCTL_SG_ALLOC		DRM_IOW( 0x38, drm_scatter_gather_t)
 #define DRM_IOCTL_SG_FREE		DRM_IOW( 0x39, drm_scatter_gather_t)
 
-/* MGA specific ioctls */
-#define DRM_IOCTL_MGA_INIT		DRM_IOW( 0x40, drm_mga_init_t)
-#define DRM_IOCTL_MGA_FLUSH		DRM_IOW( 0x41, drm_lock_t)
-#define DRM_IOCTL_MGA_RESET		DRM_IO(  0x42)
-#define DRM_IOCTL_MGA_SWAP		DRM_IO(  0x43)
-#define DRM_IOCTL_MGA_CLEAR		DRM_IOW( 0x44, drm_mga_clear_t)
-#define DRM_IOCTL_MGA_VERTEX		DRM_IOW( 0x45, drm_mga_vertex_t)
-#define DRM_IOCTL_MGA_INDICES		DRM_IOW( 0x46, drm_mga_indices_t)
-#define DRM_IOCTL_MGA_ILOAD		DRM_IOW( 0x47, drm_mga_iload_t)
-#define DRM_IOCTL_MGA_BLIT		DRM_IOW( 0x48, drm_mga_blit_t)
-
-/* i810 specific ioctls */
-#define DRM_IOCTL_I810_INIT		DRM_IOW( 0x40, drm_i810_init_t)
-#define DRM_IOCTL_I810_VERTEX		DRM_IOW( 0x41, drm_i810_vertex_t)
-#define DRM_IOCTL_I810_CLEAR		DRM_IOW( 0x42, drm_i810_clear_t)
-#define DRM_IOCTL_I810_FLUSH		DRM_IO(  0x43)
-#define DRM_IOCTL_I810_GETAGE		DRM_IO(  0x44)
-#define DRM_IOCTL_I810_GETBUF		DRM_IOWR(0x45, drm_i810_dma_t)
-#define DRM_IOCTL_I810_SWAP		DRM_IO(  0x46)
-#define DRM_IOCTL_I810_COPY		DRM_IOW( 0x47, drm_i810_copy_t)
-#define DRM_IOCTL_I810_DOCOPY		DRM_IO(  0x48)
-
-/* Rage 128 specific ioctls */
-#define DRM_IOCTL_R128_INIT		DRM_IOW( 0x40, drm_r128_init_t)
-#define DRM_IOCTL_R128_CCE_START	DRM_IO(  0x41)
-#define DRM_IOCTL_R128_CCE_STOP		DRM_IOW( 0x42, drm_r128_cce_stop_t)
-#define DRM_IOCTL_R128_CCE_RESET	DRM_IO(  0x43)
-#define DRM_IOCTL_R128_CCE_IDLE		DRM_IO(  0x44)
-#define DRM_IOCTL_R128_RESET		DRM_IO(  0x46)
-#define DRM_IOCTL_R128_SWAP		DRM_IO(  0x47)
-#define DRM_IOCTL_R128_CLEAR		DRM_IOW( 0x48, drm_r128_clear_t)
-#define DRM_IOCTL_R128_VERTEX		DRM_IOW( 0x49, drm_r128_vertex_t)
-#define DRM_IOCTL_R128_INDICES		DRM_IOW( 0x4a, drm_r128_indices_t)
-#define DRM_IOCTL_R128_BLIT		DRM_IOW( 0x4b, drm_r128_blit_t)
-#define DRM_IOCTL_R128_DEPTH		DRM_IOW( 0x4c, drm_r128_depth_t)
-#define DRM_IOCTL_R128_STIPPLE		DRM_IOW( 0x4d, drm_r128_stipple_t)
-#define DRM_IOCTL_R128_INDIRECT		DRM_IOWR(0x4f, drm_r128_indirect_t)
-#define DRM_IOCTL_R128_FULLSCREEN	DRM_IOW( 0x50, drm_r128_fullscreen_t)
-#define DRM_IOCTL_R128_CLEAR2		DRM_IOW( 0x51, drm_r128_clear2_t)
-
-/* Radeon specific ioctls */
-#define DRM_IOCTL_RADEON_CP_INIT	DRM_IOW( 0x40, drm_radeon_init_t)
-#define DRM_IOCTL_RADEON_CP_START	DRM_IO(  0x41)
-#define DRM_IOCTL_RADEON_CP_STOP	DRM_IOW( 0x42, drm_radeon_cp_stop_t)
-#define DRM_IOCTL_RADEON_CP_RESET	DRM_IO(  0x43)
-#define DRM_IOCTL_RADEON_CP_IDLE	DRM_IO(  0x44)
-#define DRM_IOCTL_RADEON_RESET		DRM_IO(  0x45)
-#define DRM_IOCTL_RADEON_FULLSCREEN	DRM_IOW( 0x46, drm_radeon_fullscreen_t)
-#define DRM_IOCTL_RADEON_SWAP		DRM_IO(  0x47)
-#define DRM_IOCTL_RADEON_CLEAR		DRM_IOW( 0x48, drm_radeon_clear_t)
-#define DRM_IOCTL_RADEON_VERTEX		DRM_IOW( 0x49, drm_radeon_vertex_t)
-#define DRM_IOCTL_RADEON_INDICES	DRM_IOW( 0x4a, drm_radeon_indices_t)
-#define DRM_IOCTL_RADEON_STIPPLE	DRM_IOW( 0x4c, drm_radeon_stipple_t)
-#define DRM_IOCTL_RADEON_INDIRECT	DRM_IOWR(0x4d, drm_radeon_indirect_t)
-#define DRM_IOCTL_RADEON_TEXTURE	DRM_IOWR(0x4e, drm_radeon_texture_t)
-#define DRM_IOCTL_RADEON_VERTEX2	DRM_IOW( 0x4f, drm_radeon_vertex_t)
-
-/* Gamma specific ioctls */
-#define DRM_IOCTL_GAMMA_INIT		DRM_IOW( 0x40, drm_gamma_init_t)
-#define DRM_IOCTL_GAMMA_COPY		DRM_IOW( 0x41, drm_gamma_copy_t)
-
-/* SiS specific ioctls */
-
-#define SIS_IOCTL_FB_ALLOC		DRM_IOWR(0x44, drm_sis_mem_t)
-#define SIS_IOCTL_FB_FREE		DRM_IOW( 0x45, drm_sis_mem_t)
-#define SIS_IOCTL_AGP_INIT		DRM_IOWR(0x53, drm_sis_agp_t)
-#define SIS_IOCTL_AGP_ALLOC		DRM_IOWR(0x54, drm_sis_mem_t)
-#define SIS_IOCTL_AGP_FREE		DRM_IOW( 0x55, drm_sis_mem_t)
-#define SIS_IOCTL_FLIP			DRM_IOW( 0x48, drm_sis_flip_t)
-#define SIS_IOCTL_FLIP_INIT		DRM_IO(  0x49)
-#define SIS_IOCTL_FLIP_FINAL		DRM_IO(  0x50)
-
-/* I830 specific ioctls */
-#define DRM_IOCTL_I830_INIT		DRM_IOW( 0x40, drm_i830_init_t)
-#define DRM_IOCTL_I830_VERTEX		DRM_IOW( 0x41, drm_i830_vertex_t)
-#define DRM_IOCTL_I830_CLEAR		DRM_IOW( 0x42, drm_i830_clear_t)
-#define DRM_IOCTL_I830_FLUSH		DRM_IO ( 0x43)
-#define DRM_IOCTL_I830_GETAGE		DRM_IO ( 0x44)
-#define DRM_IOCTL_I830_GETBUF		DRM_IOWR(0x45, drm_i830_dma_t)
-#define DRM_IOCTL_I830_SWAP		DRM_IO ( 0x46)
-#define DRM_IOCTL_I830_COPY		DRM_IOW( 0x47, drm_i830_copy_t)
-#define DRM_IOCTL_I830_DOCOPY		DRM_IO ( 0x48)
+/* Device specfic ioctls should only be in their respective headers
+ * The device specific ioctl range is 0x40 to 0x79.                  */
+#define DRM_COMMAND_BASE                0x40
 
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/gamma/gamma_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/gamma/gamma_dma.c
index fd0da710a..0dee8c74a 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/gamma/gamma_dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/gamma/gamma_dma.c
@@ -33,6 +33,8 @@
 
 #include "gamma.h"
 #include "drmP.h"
+#include "drm.h"
+#include "gamma_drm.h"
 #include "gamma_drv.h"
 
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/gamma/gamma_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/gamma/gamma_drv.c
index e58d853c9..50658bbae 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/gamma/gamma_drv.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/gamma/gamma_drv.c
@@ -35,6 +35,8 @@
 #include <opt_drm_linux.h>
 #include "gamma.h"
 #include "drmP.h"
+#include "drm.h"
+#include "gamma_drm.h"
 #include "gamma_drv.h"
 
 #define DRIVER_AUTHOR		"VA Linux Systems Inc."
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/gamma_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/gamma_drm.h
index d06763ae9..0d58b07b5 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/gamma_drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/gamma_drm.h
@@ -48,6 +48,16 @@ typedef struct _drm_gamma_sarea {
 	int vertex_prim;
 } drm_gamma_sarea_t;
 
+/* WARNING: If you change any of these defines, make sure to change the
+ * defines in the Xserver file (xf86drmGamma.h)
+ */
+
+/* Gamma specific ioctls
+ * The device specific ioctl range is 0x40 to 0x79.
+ */
+#define DRM_IOCTL_GAMMA_INIT		DRM_IOW( 0x40, drm_gamma_init_t)
+#define DRM_IOCTL_GAMMA_COPY		DRM_IOW( 0x41, drm_gamma_copy_t)
+
 typedef struct drm_gamma_copy {
 	unsigned int	DMAOutputAddress;
 	unsigned int	DMAOutputCount;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i810/i810_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i810/i810_dma.c
index 4558c1990..4310851a5 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i810/i810_dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i810/i810_dma.c
@@ -33,6 +33,8 @@
 
 #include "i810.h"
 #include "drmP.h"
+#include "drm.h"
+#include "i810_drm.h"
 #include "i810_drv.h"
 
 #define I810_BUF_FREE		2
@@ -125,7 +127,7 @@ static int i810_freelist_put(drm_device_t *dev, drm_buf_t *buf)
    	return 0;
 }
 
-
+#if 0
 int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
 {
 	DRM_OS_DEVICE;
@@ -150,6 +152,7 @@ int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
 			     vma->vm_page_prot)) DRM_OS_RETURN(EAGAIN);
 	return 0;
 }
+#endif
 
 static int i810_map_buffer(drm_buf_t *buf, struct file *filp)
 {
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i810/i810_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i810/i810_drv.c
index e1c081274..e76e3a8ae 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i810/i810_drv.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i810/i810_drv.c
@@ -38,6 +38,8 @@
 
 #include "i810.h"
 #include "drmP.h"
+#include "drm.h"
+#include "i810_drm.h"
 #include "i810_drv.h"
 
 #define DRIVER_AUTHOR		"VA Linux Systems Inc."
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i810_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i810_drm.h
index f2114dd15..990e50e2b 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i810_drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i810_drm.h
@@ -166,14 +166,34 @@ typedef struct _drm_i810_sarea {
 
 } drm_i810_sarea_t;
 
+/* WARNING: If you change any of these defines, make sure to change the
+ * defines in the Xserver file (xf86drmMga.h)
+ */
+
+/* i810 specific ioctls
+ * The device specific ioctl range is 0x40 to 0x79.
+ */
+#define DRM_IOCTL_I810_INIT		DRM_IOW( 0x40, drm_i810_init_t)
+#define DRM_IOCTL_I810_VERTEX		DRM_IOW( 0x41, drm_i810_vertex_t)
+#define DRM_IOCTL_I810_CLEAR		DRM_IOW( 0x42, drm_i810_clear_t)
+#define DRM_IOCTL_I810_FLUSH		DRM_IO(  0x43)
+#define DRM_IOCTL_I810_GETAGE		DRM_IO(  0x44)
+#define DRM_IOCTL_I810_GETBUF		DRM_IOWR(0x45, drm_i810_dma_t)
+#define DRM_IOCTL_I810_SWAP		DRM_IO(  0x46)
+#define DRM_IOCTL_I810_COPY		DRM_IOW( 0x47, drm_i810_copy_t)
+#define DRM_IOCTL_I810_DOCOPY		DRM_IO(  0x48)
+#define DRM_IOCTL_I810_OV0INFO		DRM_IOR( 0x49, drm_i810_overlay_t)
+#define DRM_IOCTL_I810_FSTATUS		DRM_IO ( 0x4a)
+#define DRM_IOCTL_I810_OV0FLIP		DRM_IO ( 0x4b)
+#define DRM_IOCTL_I810_MC		DRM_IOW( 0x4c, drm_i810_mc_t)
+#define DRM_IOCTL_I810_RSTATUS		DRM_IO ( 0x4d )
+
 typedef struct _drm_i810_clear {
 	int clear_color;
 	int clear_depth;
 	int flags;
 } drm_i810_clear_t;
 
-
-
 /* These may be placeholders if we have more cliprects than
  * I810_NR_SAREA_CLIPRECTS.  In that case, the client sets discard to
  * false, indicating that the buffer will be dispatched again with a
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i830/i830_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i830/i830_dma.c
index 69b1c8a32..fbdc95230 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i830/i830_dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i830/i830_dma.c
@@ -34,6 +34,8 @@
 #define __NO_VERSION__
 #include "i830.h"
 #include "drmP.h"
+#include "drm.h"
+#include "i830_drm.h"
 #include "i830_drv.h"
 #include <linux/interrupt.h>	/* For task queue support */
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i830/i830_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i830/i830_drv.c
index 904f36601..ad31d1efd 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i830/i830_drv.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i830/i830_drv.c
@@ -34,6 +34,8 @@
 #include <linux/config.h>
 #include "i830.h"
 #include "drmP.h"
+#include "drm.h"
+#include "i830_drm.h"
 #include "i830_drv.h"
 
 #define DRIVER_AUTHOR		"VA Linux Systems Inc."
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i830_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i830_drm.h
index e4a2a257c..725ad3692 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i830_drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/i830_drm.h
@@ -201,6 +201,19 @@ typedef struct _drm_i830_sarea {
 	int vertex_prim;
 } drm_i830_sarea_t;
 
+/* I830 specific ioctls
+ * The device specific ioctl range is 0x40 to 0x79.
+ */
+#define DRM_IOCTL_I830_INIT		DRM_IOW( 0x40, drm_i830_init_t)
+#define DRM_IOCTL_I830_VERTEX		DRM_IOW( 0x41, drm_i830_vertex_t)
+#define DRM_IOCTL_I830_CLEAR		DRM_IOW( 0x42, drm_i830_clear_t)
+#define DRM_IOCTL_I830_FLUSH		DRM_IO ( 0x43)
+#define DRM_IOCTL_I830_GETAGE		DRM_IO ( 0x44)
+#define DRM_IOCTL_I830_GETBUF		DRM_IOWR(0x45, drm_i830_dma_t)
+#define DRM_IOCTL_I830_SWAP		DRM_IO ( 0x46)
+#define DRM_IOCTL_I830_COPY		DRM_IOW( 0x47, drm_i830_copy_t)
+#define DRM_IOCTL_I830_DOCOPY		DRM_IO ( 0x48)
+
 typedef struct _drm_i830_clear {
 	int clear_color;
 	int clear_depth;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/mga_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/mga_dma.c
index 9ed5d0950..d9449c534 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/mga_dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/mga_dma.c
@@ -36,6 +36,8 @@
 #define __NO_VERSION__
 #include "mga.h"
 #include "drmP.h"
+#include "drm.h"
+#include "mga_drm.h"
 #include "mga_drv.h"
 
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/mga_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/mga_drv.c
index 206a77dc0..d8af22364 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/mga_drv.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/mga_drv.c
@@ -37,6 +37,8 @@
 
 #include "mga.h"
 #include "drmP.h"
+#include "drm.h"
+#include "mga_drm.h"
 #include "mga_drv.h"
 
 #define DRIVER_AUTHOR		"Gareth Hughes, VA Linux Systems Inc."
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/mga_state.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/mga_state.c
index b71f333dd..a0bd404a8 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/mga_state.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/mga_state.c
@@ -35,6 +35,8 @@
 #define __NO_VERSION__
 #include "mga.h"
 #include "drmP.h"
+#include "drm.h"
+#include "mga_drm.h"
 #include "mga_drv.h"
 #include "drm.h"
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/mga_warp.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/mga_warp.c
index 4fe4315ca..f11cd922c 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/mga_warp.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga/mga_warp.c
@@ -30,6 +30,8 @@
 #define __NO_VERSION__
 #include "mga.h"
 #include "drmP.h"
+#include "drm.h"
+#include "mga_drm.h"
 #include "mga_drv.h"
 #include "mga_ucode.h"
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga_drm.h
index 4af2ca2e8..8f56beed6 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga_drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/mga_drm.h
@@ -38,6 +38,7 @@
 /* WARNING: If you change any of these defines, make sure to change the
  * defines in the Xserver file (mga_sarea.h)
  */
+
 #ifndef __MGA_SAREA_DEFINES__
 #define __MGA_SAREA_DEFINES__
 
@@ -225,6 +226,20 @@ typedef struct _drm_mga_sarea {
 /* WARNING: If you change any of these defines, make sure to change the
  * defines in the Xserver file (xf86drmMga.h)
  */
+
+/* MGA specific ioctls
+ * The device specific ioctl range is 0x40 to 0x79.
+ */
+#define DRM_IOCTL_MGA_INIT		DRM_IOW( 0x40, drm_mga_init_t)
+#define DRM_IOCTL_MGA_FLUSH		DRM_IOW( 0x41, drm_lock_t)
+#define DRM_IOCTL_MGA_RESET		DRM_IO(  0x42)
+#define DRM_IOCTL_MGA_SWAP		DRM_IO(  0x43)
+#define DRM_IOCTL_MGA_CLEAR		DRM_IOW( 0x44, drm_mga_clear_t)
+#define DRM_IOCTL_MGA_VERTEX		DRM_IOW( 0x45, drm_mga_vertex_t)
+#define DRM_IOCTL_MGA_INDICES		DRM_IOW( 0x46, drm_mga_indices_t)
+#define DRM_IOCTL_MGA_ILOAD		DRM_IOW( 0x47, drm_mga_iload_t)
+#define DRM_IOCTL_MGA_BLIT		DRM_IOW( 0x48, drm_mga_blit_t)
+
 typedef struct _drm_mga_warp_index {
    	int installed;
    	unsigned long phys_addr;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128/r128_cce.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128/r128_cce.c
index 6c4a5e65c..36cc31206 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128/r128_cce.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128/r128_cce.c
@@ -31,6 +31,8 @@
 #define __NO_VERSION__
 #include "r128.h"
 #include "drmP.h"
+#include "drm.h"
+#include "r128_drm.h"
 #include "r128_drv.h"
 
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128/r128_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128/r128_drv.c
index 51e08a28b..cf59aa0d0 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128/r128_drv.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128/r128_drv.c
@@ -37,6 +37,8 @@
 
 #include "r128.h"
 #include "drmP.h"
+#include "drm.h"
+#include "r128_drm.h"
 #include "r128_drv.h"
 #if __REALLY_HAVE_SG
 #include "ati_pcigart.h"
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128/r128_state.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128/r128_state.c
index 0fce0c55e..34500bb3f 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128/r128_state.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128/r128_state.c
@@ -30,6 +30,8 @@
 
 #include "r128.h"
 #include "drmP.h"
+#include "drm.h"
+#include "r128_drm.h"
 #include "r128_drv.h"
 #include "drm.h"
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128_drm.h
index 0fc6a6cd1..a8d230088 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128_drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/r128_drm.h
@@ -170,6 +170,27 @@ typedef struct drm_r128_sarea {
 /* WARNING: If you change any of these defines, make sure to change the
  * defines in the Xserver file (xf86drmR128.h)
  */
+
+/* Rage 128 specific ioctls
+ * The device specific ioctl range is 0x40 to 0x79.
+ */
+#define DRM_IOCTL_R128_INIT		DRM_IOW( 0x40, drm_r128_init_t)
+#define DRM_IOCTL_R128_CCE_START	DRM_IO(  0x41)
+#define DRM_IOCTL_R128_CCE_STOP		DRM_IOW( 0x42, drm_r128_cce_stop_t)
+#define DRM_IOCTL_R128_CCE_RESET	DRM_IO(  0x43)
+#define DRM_IOCTL_R128_CCE_IDLE		DRM_IO(  0x44)
+#define DRM_IOCTL_R128_RESET		DRM_IO(  0x46)
+#define DRM_IOCTL_R128_SWAP		DRM_IO(  0x47)
+#define DRM_IOCTL_R128_CLEAR		DRM_IOW( 0x48, drm_r128_clear_t)
+#define DRM_IOCTL_R128_VERTEX		DRM_IOW( 0x49, drm_r128_vertex_t)
+#define DRM_IOCTL_R128_INDICES		DRM_IOW( 0x4a, drm_r128_indices_t)
+#define DRM_IOCTL_R128_BLIT		DRM_IOW( 0x4b, drm_r128_blit_t)
+#define DRM_IOCTL_R128_DEPTH		DRM_IOW( 0x4c, drm_r128_depth_t)
+#define DRM_IOCTL_R128_STIPPLE		DRM_IOW( 0x4d, drm_r128_stipple_t)
+#define DRM_IOCTL_R128_INDIRECT		DRM_IOWR(0x4f, drm_r128_indirect_t)
+#define DRM_IOCTL_R128_FULLSCREEN	DRM_IOW( 0x50, drm_r128_fullscreen_t)
+#define DRM_IOCTL_R128_CLEAR2		DRM_IOW( 0x51, drm_r128_clear2_t)
+
 typedef struct drm_r128_init {
 	enum {
 		R128_INIT_CCE    = 0x01,
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon/radeon_cp.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon/radeon_cp.c
index ed5128b20..9c262ae39 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon/radeon_cp.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon/radeon_cp.c
@@ -30,6 +30,8 @@
 
 #include "radeon.h"
 #include "drmP.h"
+#include "drm.h"
+#include "radeon_drm.h"
 #include "radeon_drv.h"
 
 #include <vm/vm.h>
@@ -624,7 +626,7 @@ static void radeon_cp_init_ring_buffer( drm_device_t *dev,
 
 		RADEON_WRITE( RADEON_CP_RB_RPTR_ADDR,
 			     entry->busaddr[page_ofs]);
-		DRM_DEBUG( "ring rptr: offset=0x%08x handle=0x%08lx\n",
+		DRM_DEBUG( "ring rptr: offset=0x%08x handle=0x%08x\n",
 			   entry->busaddr[page_ofs],
 			   entry->handle + tmp_ofs );
 	}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon/radeon_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon/radeon_drv.c
index 61be65f7e..009f90c18 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon/radeon_drv.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon/radeon_drv.c
@@ -36,6 +36,8 @@
 
 #include "radeon.h"
 #include "drmP.h"
+#include "drm.h"
+#include "radeon_drm.h"
 #include "radeon_drv.h"
 #if __REALLY_HAVE_SG
 #include "ati_pcigart.h"
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon/radeon_state.c b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon/radeon_state.c
index a7e301e70..cbb9d1f6b 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon/radeon_state.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon/radeon_state.c
@@ -29,8 +29,9 @@
 
 #include "radeon.h"
 #include "drmP.h"
-#include "radeon_drv.h"
 #include "drm.h"
+#include "radeon_drm.h"
+#include "radeon_drv.h"
 
 
 /* ================================================================
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon_drm.h
index 81e76b19b..6774b2bc0 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon_drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/radeon_drm.h
@@ -236,7 +236,29 @@ typedef struct {
 
 /* WARNING: If you change any of these defines, make sure to change the
  * defines in the Xserver file (xf86drmRadeon.h)
+ *
+ * KW: actually it's illegal to change any of this (backwards compatibility).
+ */
+
+/* Radeon specific ioctls
+ * The device specific ioctl range is 0x40 to 0x79.
  */
+#define DRM_IOCTL_RADEON_CP_INIT    DRM_IOW( 0x40, drm_radeon_init_t)
+#define DRM_IOCTL_RADEON_CP_START   DRM_IO(  0x41)
+#define DRM_IOCTL_RADEON_CP_STOP    DRM_IOW( 0x42, drm_radeon_cp_stop_t)
+#define DRM_IOCTL_RADEON_CP_RESET   DRM_IO(  0x43)
+#define DRM_IOCTL_RADEON_CP_IDLE    DRM_IO(  0x44)
+#define DRM_IOCTL_RADEON_RESET      DRM_IO(  0x45)
+#define DRM_IOCTL_RADEON_FULLSCREEN DRM_IOW( 0x46, drm_radeon_fullscreen_t)
+#define DRM_IOCTL_RADEON_SWAP       DRM_IO(  0x47)
+#define DRM_IOCTL_RADEON_CLEAR      DRM_IOW( 0x48, drm_radeon_clear_t)
+#define DRM_IOCTL_RADEON_VERTEX     DRM_IOW( 0x49, drm_radeon_vertex_t)
+#define DRM_IOCTL_RADEON_INDICES    DRM_IOW( 0x4a, drm_radeon_indices_t)
+#define DRM_IOCTL_RADEON_STIPPLE    DRM_IOW( 0x4c, drm_radeon_stipple_t)
+#define DRM_IOCTL_RADEON_INDIRECT   DRM_IOWR(0x4d, drm_radeon_indirect_t)
+#define DRM_IOCTL_RADEON_TEXTURE    DRM_IOWR(0x4e, drm_radeon_texture_t)
+#define DRM_IOCTL_RADEON_VERTEX2    DRM_IOW( 0x4f, drm_radeon_vertex_t)
+
 typedef struct drm_radeon_init {
 	enum {
 		RADEON_INIT_CP    = 0x01,
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/sis_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/sis_drm.h
index db11cf632..21b663501 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/sis_drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/bsd/drm/kernel/sis_drm.h
@@ -2,6 +2,16 @@
 #ifndef _sis_drm_public_h_
 #define _sis_drm_public_h_
 
+/* SiS specific ioctls */
+#define SIS_IOCTL_FB_ALLOC		DRM_IOWR(0x44, drm_sis_mem_t)
+#define SIS_IOCTL_FB_FREE		DRM_IOW( 0x45, drm_sis_mem_t)
+#define SIS_IOCTL_AGP_INIT		DRM_IOWR(0x53, drm_sis_agp_t)
+#define SIS_IOCTL_AGP_ALLOC		DRM_IOWR(0x54, drm_sis_mem_t)
+#define SIS_IOCTL_AGP_FREE		DRM_IOW( 0x55, drm_sis_mem_t)
+#define SIS_IOCTL_FLIP			DRM_IOW( 0x48, drm_sis_flip_t)
+#define SIS_IOCTL_FLIP_INIT		DRM_IO(  0x49)
+#define SIS_IOCTL_FLIP_FINAL		DRM_IO(  0x50)
+
 typedef struct {
   int context;
   unsigned int offset;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/Imakefile b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/Imakefile
index 61676b9e4..735ab1b0d 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/Imakefile
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/Imakefile
@@ -17,26 +17,14 @@ MTRR_DEFINES = -DHAS_MTRR_SUPPORT
 	xf86drmHash.c \
 	xf86drmRandom.c \
 	xf86drmSL.c \
-	xf86drmI810.c \
-	xf86drmMga.c \
-	xf86drmR128.c \
-	xf86drmRadeon.c \
-	xf86drmSiS.c \
-	xf86drmGamma.c \
-	xf86drmI830.c \
+	xf86drmCompat.c \
 	$(MSRC)
 
  OBJS = xf86drm.o \
 	xf86drmHash.o \
 	xf86drmRandom.o \
 	xf86drmSL.o \
-	xf86drmI810.o \
-	xf86drmMga.o \
-	xf86drmR128.o \
-	xf86drmRadeon.o \
-	xf86drmSiS.o \
-	xf86drmGamma.o \
-	xf86drmI830.o \
+	xf86drmCompat.o \
 	$(MOBJ)
 
 INCLUDES = -I$(XF86COMSRC) -I$(XF86OSSRC) -I. -I$(SERVERSRC)/include \
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h
index 79dd58142..d116f3752 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/drm.h
@@ -99,15 +99,6 @@ typedef struct drm_tex_region {
 	unsigned int	age;
 } drm_tex_region_t;
 
-/* Seperate include files for the i810/mga/r128 specific structures */
-#include "mga_drm.h"
-#include "i810_drm.h"
-#include "r128_drm.h"
-#include "radeon_drm.h"
-#include "sis_drm.h"
-#include "i830_drm.h"
-#include "gamma_drm.h"
-
 typedef struct drm_version {
 	int    version_major;	  /* Major version			    */
 	int    version_minor;	  /* Minor version			    */
@@ -428,92 +419,8 @@ typedef struct drm_scatter_gather {
 #define DRM_IOCTL_SG_ALLOC		DRM_IOW( 0x38, drm_scatter_gather_t)
 #define DRM_IOCTL_SG_FREE		DRM_IOW( 0x39, drm_scatter_gather_t)
 
-/* MGA specific ioctls */
-#define DRM_IOCTL_MGA_INIT		DRM_IOW( 0x40, drm_mga_init_t)
-#define DRM_IOCTL_MGA_FLUSH		DRM_IOW( 0x41, drm_lock_t)
-#define DRM_IOCTL_MGA_RESET		DRM_IO(  0x42)
-#define DRM_IOCTL_MGA_SWAP		DRM_IO(  0x43)
-#define DRM_IOCTL_MGA_CLEAR		DRM_IOW( 0x44, drm_mga_clear_t)
-#define DRM_IOCTL_MGA_VERTEX		DRM_IOW( 0x45, drm_mga_vertex_t)
-#define DRM_IOCTL_MGA_INDICES		DRM_IOW( 0x46, drm_mga_indices_t)
-#define DRM_IOCTL_MGA_ILOAD		DRM_IOW( 0x47, drm_mga_iload_t)
-#define DRM_IOCTL_MGA_BLIT		DRM_IOW( 0x48, drm_mga_blit_t)
-
-/* i810 specific ioctls */
-#define DRM_IOCTL_I810_INIT		DRM_IOW( 0x40, drm_i810_init_t)
-#define DRM_IOCTL_I810_VERTEX		DRM_IOW( 0x41, drm_i810_vertex_t)
-#define DRM_IOCTL_I810_CLEAR		DRM_IOW( 0x42, drm_i810_clear_t)
-#define DRM_IOCTL_I810_FLUSH		DRM_IO(  0x43)
-#define DRM_IOCTL_I810_GETAGE		DRM_IO(  0x44)
-#define DRM_IOCTL_I810_GETBUF		DRM_IOWR(0x45, drm_i810_dma_t)
-#define DRM_IOCTL_I810_SWAP		DRM_IO(  0x46)
-#define DRM_IOCTL_I810_COPY		DRM_IOW( 0x47, drm_i810_copy_t)
-#define DRM_IOCTL_I810_DOCOPY		DRM_IO(  0x48)
-#define DRM_IOCTL_I810_OV0INFO		DRM_IOR( 0x49, drm_i810_overlay_t)
-#define DRM_IOCTL_I810_FSTATUS		DRM_IO ( 0x4a)
-#define DRM_IOCTL_I810_OV0FLIP		DRM_IO ( 0x4b)
-#define DRM_IOCTL_I810_MC		DRM_IOW( 0x4c, drm_i810_mc_t)
-#define DRM_IOCTL_I810_RSTATUS		DRM_IO ( 0x4d )
-
-
-/* Rage 128 specific ioctls */
-#define DRM_IOCTL_R128_INIT		DRM_IOW( 0x40, drm_r128_init_t)
-#define DRM_IOCTL_R128_CCE_START	DRM_IO(  0x41)
-#define DRM_IOCTL_R128_CCE_STOP		DRM_IOW( 0x42, drm_r128_cce_stop_t)
-#define DRM_IOCTL_R128_CCE_RESET	DRM_IO(  0x43)
-#define DRM_IOCTL_R128_CCE_IDLE		DRM_IO(  0x44)
-#define DRM_IOCTL_R128_RESET		DRM_IO(  0x46)
-#define DRM_IOCTL_R128_SWAP		DRM_IO(  0x47)
-#define DRM_IOCTL_R128_CLEAR		DRM_IOW( 0x48, drm_r128_clear_t)
-#define DRM_IOCTL_R128_VERTEX		DRM_IOW( 0x49, drm_r128_vertex_t)
-#define DRM_IOCTL_R128_INDICES		DRM_IOW( 0x4a, drm_r128_indices_t)
-#define DRM_IOCTL_R128_BLIT		DRM_IOW( 0x4b, drm_r128_blit_t)
-#define DRM_IOCTL_R128_DEPTH		DRM_IOW( 0x4c, drm_r128_depth_t)
-#define DRM_IOCTL_R128_STIPPLE		DRM_IOW( 0x4d, drm_r128_stipple_t)
-#define DRM_IOCTL_R128_INDIRECT		DRM_IOWR(0x4f, drm_r128_indirect_t)
-#define DRM_IOCTL_R128_FULLSCREEN	DRM_IOW( 0x50, drm_r128_fullscreen_t)
-#define DRM_IOCTL_R128_CLEAR2		DRM_IOW( 0x51, drm_r128_clear2_t)
-
-/* Radeon specific ioctls */
-#define DRM_IOCTL_RADEON_CP_INIT	DRM_IOW( 0x40, drm_radeon_init_t)
-#define DRM_IOCTL_RADEON_CP_START	DRM_IO(  0x41)
-#define DRM_IOCTL_RADEON_CP_STOP	DRM_IOW( 0x42, drm_radeon_cp_stop_t)
-#define DRM_IOCTL_RADEON_CP_RESET	DRM_IO(  0x43)
-#define DRM_IOCTL_RADEON_CP_IDLE	DRM_IO(  0x44)
-#define DRM_IOCTL_RADEON_RESET		DRM_IO(  0x45)
-#define DRM_IOCTL_RADEON_FULLSCREEN	DRM_IOW( 0x46, drm_radeon_fullscreen_t)
-#define DRM_IOCTL_RADEON_SWAP		DRM_IO(  0x47)
-#define DRM_IOCTL_RADEON_CLEAR		DRM_IOW( 0x48, drm_radeon_clear_t)
-#define DRM_IOCTL_RADEON_VERTEX		DRM_IOW( 0x49, drm_radeon_vertex_t)
-#define DRM_IOCTL_RADEON_INDICES	DRM_IOW( 0x4a, drm_radeon_indices_t)
-#define DRM_IOCTL_RADEON_STIPPLE	DRM_IOW( 0x4c, drm_radeon_stipple_t)
-#define DRM_IOCTL_RADEON_INDIRECT	DRM_IOWR(0x4d, drm_radeon_indirect_t)
-#define DRM_IOCTL_RADEON_TEXTURE	DRM_IOWR(0x4e, drm_radeon_texture_t)
-#define DRM_IOCTL_RADEON_VERTEX2	DRM_IOW( 0x4f, drm_radeon_vertex_t)
-
-/* Gamma specific ioctls */
-#define DRM_IOCTL_GAMMA_INIT		DRM_IOW( 0x40, drm_gamma_init_t)
-#define DRM_IOCTL_GAMMA_COPY		DRM_IOW( 0x41, drm_gamma_copy_t)
-
-/* SiS specific ioctls */
-#define SIS_IOCTL_FB_ALLOC		DRM_IOWR(0x44, drm_sis_mem_t)
-#define SIS_IOCTL_FB_FREE		DRM_IOW( 0x45, drm_sis_mem_t)
-#define SIS_IOCTL_AGP_INIT		DRM_IOWR(0x53, drm_sis_agp_t)
-#define SIS_IOCTL_AGP_ALLOC		DRM_IOWR(0x54, drm_sis_mem_t)
-#define SIS_IOCTL_AGP_FREE		DRM_IOW( 0x55, drm_sis_mem_t)
-#define SIS_IOCTL_FLIP			DRM_IOW( 0x48, drm_sis_flip_t)
-#define SIS_IOCTL_FLIP_INIT		DRM_IO(  0x49)
-#define SIS_IOCTL_FLIP_FINAL		DRM_IO(  0x50)
-
-/* I830 specific ioctls */
-#define DRM_IOCTL_I830_INIT		DRM_IOW( 0x40, drm_i830_init_t)
-#define DRM_IOCTL_I830_VERTEX		DRM_IOW( 0x41, drm_i830_vertex_t)
-#define DRM_IOCTL_I830_CLEAR		DRM_IOW( 0x42, drm_i830_clear_t)
-#define DRM_IOCTL_I830_FLUSH		DRM_IO ( 0x43)
-#define DRM_IOCTL_I830_GETAGE		DRM_IO ( 0x44)
-#define DRM_IOCTL_I830_GETBUF		DRM_IOWR(0x45, drm_i830_dma_t)
-#define DRM_IOCTL_I830_SWAP		DRM_IO ( 0x46)
-#define DRM_IOCTL_I830_COPY		DRM_IOW( 0x47, drm_i830_copy_t)
-#define DRM_IOCTL_I830_DOCOPY		DRM_IO ( 0x48)
+/* Device specfic ioctls should only be in their respective headers
+ * The device specific ioctl range is 0x40 to 0x79.                  */
+#define DRM_COMMAND_BASE                0x40
 
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c
index 094f51d65..e18a577c7 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_dma.c
@@ -32,6 +32,8 @@
 #define __NO_VERSION__
 #include "gamma.h"
 #include "drmP.h"
+#include "drm.h"
+#include "gamma_drm.h"
 #include "gamma_drv.h"
 
 #include <linux/interrupt.h>	/* For task queue support */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drm.h
index d06763ae9..0d58b07b5 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drm.h
@@ -48,6 +48,16 @@ typedef struct _drm_gamma_sarea {
 	int vertex_prim;
 } drm_gamma_sarea_t;
 
+/* WARNING: If you change any of these defines, make sure to change the
+ * defines in the Xserver file (xf86drmGamma.h)
+ */
+
+/* Gamma specific ioctls
+ * The device specific ioctl range is 0x40 to 0x79.
+ */
+#define DRM_IOCTL_GAMMA_INIT		DRM_IOW( 0x40, drm_gamma_init_t)
+#define DRM_IOCTL_GAMMA_COPY		DRM_IOW( 0x41, drm_gamma_copy_t)
+
 typedef struct drm_gamma_copy {
 	unsigned int	DMAOutputAddress;
 	unsigned int	DMAOutputCount;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drv.c
index 58cea2412..3d37a5fc5 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drv.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/gamma_drv.c
@@ -32,6 +32,8 @@
 #include <linux/config.h>
 #include "gamma.h"
 #include "drmP.h"
+#include "drm.h"
+#include "gamma_drm.h"
 #include "gamma_drv.h"
 
 #define DRIVER_AUTHOR		"VA Linux Systems Inc."
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c
index 4f4341999..815633b6a 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_dma.c
@@ -33,6 +33,8 @@
 #define __NO_VERSION__
 #include "i810.h"
 #include "drmP.h"
+#include "drm.h"
+#include "i810_drm.h"
 #include "i810_drv.h"
 #include <linux/interrupt.h>	/* For task queue support */
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drm.h
index bff616375..6b865d409 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drm.h
@@ -168,14 +168,34 @@ typedef struct _drm_i810_sarea {
 
 } drm_i810_sarea_t;
 
+/* WARNING: If you change any of these defines, make sure to change the
+ * defines in the Xserver file (xf86drmMga.h)
+ */
+
+/* i810 specific ioctls
+ * The device specific ioctl range is 0x40 to 0x79.
+ */
+#define DRM_IOCTL_I810_INIT		DRM_IOW( 0x40, drm_i810_init_t)
+#define DRM_IOCTL_I810_VERTEX		DRM_IOW( 0x41, drm_i810_vertex_t)
+#define DRM_IOCTL_I810_CLEAR		DRM_IOW( 0x42, drm_i810_clear_t)
+#define DRM_IOCTL_I810_FLUSH		DRM_IO(  0x43)
+#define DRM_IOCTL_I810_GETAGE		DRM_IO(  0x44)
+#define DRM_IOCTL_I810_GETBUF		DRM_IOWR(0x45, drm_i810_dma_t)
+#define DRM_IOCTL_I810_SWAP		DRM_IO(  0x46)
+#define DRM_IOCTL_I810_COPY		DRM_IOW( 0x47, drm_i810_copy_t)
+#define DRM_IOCTL_I810_DOCOPY		DRM_IO(  0x48)
+#define DRM_IOCTL_I810_OV0INFO		DRM_IOR( 0x49, drm_i810_overlay_t)
+#define DRM_IOCTL_I810_FSTATUS		DRM_IO ( 0x4a)
+#define DRM_IOCTL_I810_OV0FLIP		DRM_IO ( 0x4b)
+#define DRM_IOCTL_I810_MC		DRM_IOW( 0x4c, drm_i810_mc_t)
+#define DRM_IOCTL_I810_RSTATUS		DRM_IO ( 0x4d )
+
 typedef struct _drm_i810_clear {
 	int clear_color;
 	int clear_depth;
 	int flags;
 } drm_i810_clear_t;
 
-
-
 /* These may be placeholders if we have more cliprects than
  * I810_NR_SAREA_CLIPRECTS.  In that case, the client sets discard to
  * false, indicating that the buffer will be dispatched again with a
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.c
index f792e3781..d1a92e2a8 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i810_drv.c
@@ -33,6 +33,8 @@
 #include <linux/config.h>
 #include "i810.h"
 #include "drmP.h"
+#include "drm.h"
+#include "i810_drm.h"
 #include "i810_drv.h"
 
 #define DRIVER_AUTHOR		"VA Linux Systems Inc."
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_dma.c
index 69b1c8a32..fbdc95230 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_dma.c
@@ -34,6 +34,8 @@
 #define __NO_VERSION__
 #include "i830.h"
 #include "drmP.h"
+#include "drm.h"
+#include "i830_drm.h"
 #include "i830_drv.h"
 #include <linux/interrupt.h>	/* For task queue support */
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_drm.h
index e4a2a257c..725ad3692 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_drm.h
@@ -201,6 +201,19 @@ typedef struct _drm_i830_sarea {
 	int vertex_prim;
 } drm_i830_sarea_t;
 
+/* I830 specific ioctls
+ * The device specific ioctl range is 0x40 to 0x79.
+ */
+#define DRM_IOCTL_I830_INIT		DRM_IOW( 0x40, drm_i830_init_t)
+#define DRM_IOCTL_I830_VERTEX		DRM_IOW( 0x41, drm_i830_vertex_t)
+#define DRM_IOCTL_I830_CLEAR		DRM_IOW( 0x42, drm_i830_clear_t)
+#define DRM_IOCTL_I830_FLUSH		DRM_IO ( 0x43)
+#define DRM_IOCTL_I830_GETAGE		DRM_IO ( 0x44)
+#define DRM_IOCTL_I830_GETBUF		DRM_IOWR(0x45, drm_i830_dma_t)
+#define DRM_IOCTL_I830_SWAP		DRM_IO ( 0x46)
+#define DRM_IOCTL_I830_COPY		DRM_IOW( 0x47, drm_i830_copy_t)
+#define DRM_IOCTL_I830_DOCOPY		DRM_IO ( 0x48)
+
 typedef struct _drm_i830_clear {
 	int clear_color;
 	int clear_depth;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_drv.c
index 904f36601..ad31d1efd 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_drv.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/i830_drv.c
@@ -34,6 +34,8 @@
 #include <linux/config.h>
 #include "i830.h"
 #include "drmP.h"
+#include "drm.h"
+#include "i830_drm.h"
 #include "i830_drv.h"
 
 #define DRIVER_AUTHOR		"VA Linux Systems Inc."
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_dma.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_dma.c
index 2a151361c..525975a87 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_dma.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_dma.c
@@ -36,6 +36,8 @@
 #define __NO_VERSION__
 #include "mga.h"
 #include "drmP.h"
+#include "drm.h"
+#include "mga_drm.h"
 #include "mga_drv.h"
 
 #include <linux/interrupt.h>	/* For task queue support */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drm.h
index 4af2ca2e8..8f56beed6 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drm.h
@@ -38,6 +38,7 @@
 /* WARNING: If you change any of these defines, make sure to change the
  * defines in the Xserver file (mga_sarea.h)
  */
+
 #ifndef __MGA_SAREA_DEFINES__
 #define __MGA_SAREA_DEFINES__
 
@@ -225,6 +226,20 @@ typedef struct _drm_mga_sarea {
 /* WARNING: If you change any of these defines, make sure to change the
  * defines in the Xserver file (xf86drmMga.h)
  */
+
+/* MGA specific ioctls
+ * The device specific ioctl range is 0x40 to 0x79.
+ */
+#define DRM_IOCTL_MGA_INIT		DRM_IOW( 0x40, drm_mga_init_t)
+#define DRM_IOCTL_MGA_FLUSH		DRM_IOW( 0x41, drm_lock_t)
+#define DRM_IOCTL_MGA_RESET		DRM_IO(  0x42)
+#define DRM_IOCTL_MGA_SWAP		DRM_IO(  0x43)
+#define DRM_IOCTL_MGA_CLEAR		DRM_IOW( 0x44, drm_mga_clear_t)
+#define DRM_IOCTL_MGA_VERTEX		DRM_IOW( 0x45, drm_mga_vertex_t)
+#define DRM_IOCTL_MGA_INDICES		DRM_IOW( 0x46, drm_mga_indices_t)
+#define DRM_IOCTL_MGA_ILOAD		DRM_IOW( 0x47, drm_mga_iload_t)
+#define DRM_IOCTL_MGA_BLIT		DRM_IOW( 0x48, drm_mga_blit_t)
+
 typedef struct _drm_mga_warp_index {
    	int installed;
    	unsigned long phys_addr;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.c
index 91216d24f..cc8d728e2 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_drv.c
@@ -32,6 +32,8 @@
 #include <linux/config.h>
 #include "mga.h"
 #include "drmP.h"
+#include "drm.h"
+#include "mga_drm.h"
 #include "mga_drv.h"
 
 #define DRIVER_AUTHOR		"Gareth Hughes, VA Linux Systems Inc."
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_state.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_state.c
index 16919514a..17cbc8558 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_state.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_state.c
@@ -35,6 +35,8 @@
 #define __NO_VERSION__
 #include "mga.h"
 #include "drmP.h"
+#include "drm.h"
+#include "mga_drm.h"
 #include "mga_drv.h"
 #include "drm.h"
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_warp.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_warp.c
index fba691b1c..4dd998b39 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_warp.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/mga_warp.c
@@ -30,6 +30,8 @@
 #define __NO_VERSION__
 #include "mga.h"
 #include "drmP.h"
+#include "drm.h"
+#include "mga_drm.h"
 #include "mga_drv.h"
 #include "mga_ucode.h"
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_cce.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_cce.c
index ef11a497f..72b8d767c 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_cce.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_cce.c
@@ -31,6 +31,8 @@
 #define __NO_VERSION__
 #include "r128.h"
 #include "drmP.h"
+#include "drm.h"
+#include "r128_drm.h"
 #include "r128_drv.h"
 
 #include <linux/interrupt.h>	/* For task queue support */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drm.h
index 0fc6a6cd1..a8d230088 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drm.h
@@ -170,6 +170,27 @@ typedef struct drm_r128_sarea {
 /* WARNING: If you change any of these defines, make sure to change the
  * defines in the Xserver file (xf86drmR128.h)
  */
+
+/* Rage 128 specific ioctls
+ * The device specific ioctl range is 0x40 to 0x79.
+ */
+#define DRM_IOCTL_R128_INIT		DRM_IOW( 0x40, drm_r128_init_t)
+#define DRM_IOCTL_R128_CCE_START	DRM_IO(  0x41)
+#define DRM_IOCTL_R128_CCE_STOP		DRM_IOW( 0x42, drm_r128_cce_stop_t)
+#define DRM_IOCTL_R128_CCE_RESET	DRM_IO(  0x43)
+#define DRM_IOCTL_R128_CCE_IDLE		DRM_IO(  0x44)
+#define DRM_IOCTL_R128_RESET		DRM_IO(  0x46)
+#define DRM_IOCTL_R128_SWAP		DRM_IO(  0x47)
+#define DRM_IOCTL_R128_CLEAR		DRM_IOW( 0x48, drm_r128_clear_t)
+#define DRM_IOCTL_R128_VERTEX		DRM_IOW( 0x49, drm_r128_vertex_t)
+#define DRM_IOCTL_R128_INDICES		DRM_IOW( 0x4a, drm_r128_indices_t)
+#define DRM_IOCTL_R128_BLIT		DRM_IOW( 0x4b, drm_r128_blit_t)
+#define DRM_IOCTL_R128_DEPTH		DRM_IOW( 0x4c, drm_r128_depth_t)
+#define DRM_IOCTL_R128_STIPPLE		DRM_IOW( 0x4d, drm_r128_stipple_t)
+#define DRM_IOCTL_R128_INDIRECT		DRM_IOWR(0x4f, drm_r128_indirect_t)
+#define DRM_IOCTL_R128_FULLSCREEN	DRM_IOW( 0x50, drm_r128_fullscreen_t)
+#define DRM_IOCTL_R128_CLEAR2		DRM_IOW( 0x51, drm_r128_clear2_t)
+
 typedef struct drm_r128_init {
 	enum {
 		R128_INIT_CCE    = 0x01,
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drv.c
index d8d7be4f6..32180a308 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drv.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_drv.c
@@ -32,6 +32,8 @@
 #include <linux/config.h>
 #include "r128.h"
 #include "drmP.h"
+#include "drm.h"
+#include "r128_drm.h"
 #include "r128_drv.h"
 #include "ati_pcigart.h"
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_state.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_state.c
index 9de1b6b9c..a5b925f52 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_state.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/r128_state.c
@@ -30,6 +30,8 @@
 #define __NO_VERSION__
 #include "r128.h"
 #include "drmP.h"
+#include "drm.h"
+#include "r128_drm.h"
 #include "r128_drv.h"
 #include "drm.h"
 #include <linux/delay.h>
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_cp.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_cp.c
index 0acaca8e5..0823edd08 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_cp.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_cp.c
@@ -31,6 +31,8 @@
 #define __NO_VERSION__
 #include "radeon.h"
 #include "drmP.h"
+#include "drm.h"
+#include "radeon_drm.h"
 #include "radeon_drv.h"
 
 #include <linux/interrupt.h>	/* For task queue support */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_drm.h
index 81e76b19b..6774b2bc0 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_drm.h
@@ -236,7 +236,29 @@ typedef struct {
 
 /* WARNING: If you change any of these defines, make sure to change the
  * defines in the Xserver file (xf86drmRadeon.h)
+ *
+ * KW: actually it's illegal to change any of this (backwards compatibility).
+ */
+
+/* Radeon specific ioctls
+ * The device specific ioctl range is 0x40 to 0x79.
  */
+#define DRM_IOCTL_RADEON_CP_INIT    DRM_IOW( 0x40, drm_radeon_init_t)
+#define DRM_IOCTL_RADEON_CP_START   DRM_IO(  0x41)
+#define DRM_IOCTL_RADEON_CP_STOP    DRM_IOW( 0x42, drm_radeon_cp_stop_t)
+#define DRM_IOCTL_RADEON_CP_RESET   DRM_IO(  0x43)
+#define DRM_IOCTL_RADEON_CP_IDLE    DRM_IO(  0x44)
+#define DRM_IOCTL_RADEON_RESET      DRM_IO(  0x45)
+#define DRM_IOCTL_RADEON_FULLSCREEN DRM_IOW( 0x46, drm_radeon_fullscreen_t)
+#define DRM_IOCTL_RADEON_SWAP       DRM_IO(  0x47)
+#define DRM_IOCTL_RADEON_CLEAR      DRM_IOW( 0x48, drm_radeon_clear_t)
+#define DRM_IOCTL_RADEON_VERTEX     DRM_IOW( 0x49, drm_radeon_vertex_t)
+#define DRM_IOCTL_RADEON_INDICES    DRM_IOW( 0x4a, drm_radeon_indices_t)
+#define DRM_IOCTL_RADEON_STIPPLE    DRM_IOW( 0x4c, drm_radeon_stipple_t)
+#define DRM_IOCTL_RADEON_INDIRECT   DRM_IOWR(0x4d, drm_radeon_indirect_t)
+#define DRM_IOCTL_RADEON_TEXTURE    DRM_IOWR(0x4e, drm_radeon_texture_t)
+#define DRM_IOCTL_RADEON_VERTEX2    DRM_IOW( 0x4f, drm_radeon_vertex_t)
+
 typedef struct drm_radeon_init {
 	enum {
 		RADEON_INIT_CP    = 0x01,
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_drv.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_drv.c
index 847c71c92..4dea95f69 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_drv.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_drv.c
@@ -30,6 +30,8 @@
 #include <linux/config.h>
 #include "radeon.h"
 #include "drmP.h"
+#include "drm.h"
+#include "radeon_drm.h"
 #include "radeon_drv.h"
 #include "ati_pcigart.h"
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_state.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_state.c
index 2f7b7c14b..79b29134b 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_state.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/radeon_state.c
@@ -30,8 +30,9 @@
 #define __NO_VERSION__
 #include "radeon.h"
 #include "drmP.h"
-#include "radeon_drv.h"
 #include "drm.h"
+#include "radeon_drm.h"
+#include "radeon_drv.h"
 #include <linux/delay.h>
 
 
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drm.h b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drm.h
index 339ed5a00..8aaee2240 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis_drm.h
@@ -2,6 +2,16 @@
 #ifndef _sis_drm_public_h_
 #define _sis_drm_public_h_
 
+/* SiS specific ioctls */
+#define SIS_IOCTL_FB_ALLOC		DRM_IOWR(0x44, drm_sis_mem_t)
+#define SIS_IOCTL_FB_FREE		DRM_IOW( 0x45, drm_sis_mem_t)
+#define SIS_IOCTL_AGP_INIT		DRM_IOWR(0x53, drm_sis_agp_t)
+#define SIS_IOCTL_AGP_ALLOC		DRM_IOWR(0x54, drm_sis_mem_t)
+#define SIS_IOCTL_AGP_FREE		DRM_IOW( 0x55, drm_sis_mem_t)
+#define SIS_IOCTL_FLIP			DRM_IOW( 0x48, drm_sis_flip_t)
+#define SIS_IOCTL_FLIP_INIT		DRM_IO(  0x49)
+#define SIS_IOCTL_FLIP_FINAL		DRM_IO(  0x50)
+
 typedef struct {
   int context;
   unsigned int offset;
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c
index 1d26b6e63..9cc83a275 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c
@@ -434,7 +434,7 @@ static void drmCopyVersion(drmVersionPtr d, const drm_version_t *s)
     d->desc               = drmStrdup(s->desc);
 }
 
-/* drmVersion obtains the version information via an ioctl.  Similar
+/* drmGet Version obtains the driver version information via an ioctl.  Similar
  * information is available via /proc/dri. */
 
 drmVersionPtr drmGetVersion(int fd)
@@ -483,6 +483,26 @@ drmVersionPtr drmGetVersion(int fd)
     return retval;
 }
 
+/* drmGetLibVersion set version information for the drm user space library.
+ * this version number is driver indepedent */
+
+drmVersionPtr drmGetLibVersion(int fd)
+{
+    drm_version_t *version = drmMalloc(sizeof(*version));
+
+    /* Version history:
+     *   revision 1.0.x = original DRM interface with no drmGetLibVersion
+     *                    entry point and many drm<Device> extensions
+     *   revision 1.1.x = added drmCommand entry points for device extensions
+     *                    added drmGetLibVersion to identify libdrm.a version
+     */
+    version->version_major      = 1;
+    version->version_minor      = 1;
+    version->version_patchlevel = 0;
+
+    return (drmVersionPtr)version;
+}
+
 void drmFreeBusid(const char *busid)
 {
     drmFree((void *)busid);
@@ -1343,6 +1363,58 @@ int drmGetStats(int fd, drmStatsT *stats)
     return 0;
 }
 
+int drmCommandNone(int fd, unsigned long drmCommandIndex)
+{
+    void *data = NULL; /* dummy */
+    unsigned long request;
+
+    request = DRM_IO( DRM_COMMAND_BASE + drmCommandIndex);
+
+    if (ioctl(fd, request, data)) {
+	return -errno;
+    }
+    return 0;
+}
+
+int drmCommandRead(int fd, unsigned long drmCommandIndex,
+                   void *data, unsigned long size )
+{
+    unsigned long request;
+
+    request = DRM_IOR( DRM_COMMAND_BASE + drmCommandIndex, size);
+
+    if (ioctl(fd, request, data)) {
+	return -errno;
+    }
+    return 0;
+}
+
+int drmCommandWrite(int fd, unsigned long drmCommandIndex,
+                   void *data, unsigned long size )
+{
+    unsigned long request;
+
+    request = DRM_IOW( DRM_COMMAND_BASE + drmCommandIndex, size);
+
+    if (ioctl(fd, request, data)) {
+	return -errno;
+    }
+    return 0;
+}
+
+int drmCommandWriteRead(int fd, unsigned long drmCommandIndex,
+                   void *data, unsigned long size )
+{
+    unsigned long request;
+
+    request = DRM_IOWR( DRM_COMMAND_BASE + drmCommandIndex, size);
+
+    if (ioctl(fd, request, data)) {
+	return -errno;
+    }
+    return 0;
+}
+
 #if defined(XFree86Server) || defined(DRM_USE_MALLOC)
 static void drmSIGIOHandler(int interrupt, void *closure)
 {
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmCompat.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmCompat.c
new file mode 100644
index 000000000..efe744ec3
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmCompat.c
@@ -0,0 +1,1073 @@
+/* xf86drmCompat.c -- User-level interface to old DRM device drivers
+ *
+ * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Backwards compatability modules broken out by:
+ *   Jens Owen <jens@tungstengraphics.com>
+ *
+ */
+/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drm.c,v 1.4 2001/08/27 17:40:59 dawes Exp $ */
+
+#ifdef XFree86Server
+# include "xf86.h"
+# include "xf86_OSproc.h"
+# include "xf86_ansic.h"
+# define _DRM_MALLOC xalloc
+# define _DRM_FREE   xfree
+# ifndef XFree86LOADER
+#  include <sys/mman.h>
+# endif
+#else
+# include <stdio.h>
+# include <stdlib.h>
+# include <unistd.h>
+# include <string.h>
+# include <ctype.h>
+# include <fcntl.h>
+# include <errno.h>
+# include <signal.h>
+# include <sys/types.h>
+# include <sys/ioctl.h>
+# include <sys/mman.h>
+# include <sys/time.h>
+# ifdef DRM_USE_MALLOC
+#  define _DRM_MALLOC malloc
+#  define _DRM_FREE   free
+extern int xf86InstallSIGIOHandler(int fd, void (*f)(int, void *), void *);
+extern int xf86RemoveSIGIOHandler(int fd);
+# else
+#  include <X11/Xlibint.h>
+#  define _DRM_MALLOC Xmalloc
+#  define _DRM_FREE   Xfree
+# endif
+#endif
+
+/* Not all systems have MAP_FAILED defined */
+#ifndef MAP_FAILED
+#define MAP_FAILED ((void *)-1)
+#endif
+
+#ifdef __linux__
+#include <sys/sysmacros.h>	/* for makedev() */
+#endif
+#include "xf86drm.h"
+#include "xf86drmCompat.h"
+#include "drm.h"
+#include "i810_drm.h"
+#include "mga_drm.h"
+#include "r128_drm.h"
+#include "radeon_drm.h"
+#include "sis_drm.h"
+#include "i830_drm.h"
+
+
+/* WARNING: Do not change, or add, anything to this file.  It is only provided
+ * for binary backwards compatability with the old driver specific DRM
+ * extensions used before XFree86 4.3.
+ */
+
+/* I810 */
+
+Bool drmI810CleanupDma(int driSubFD)
+{
+   drm_i810_init_t init;
+   
+   memset(&init, 0, sizeof(drm_i810_init_t));
+   init.func = I810_CLEANUP_DMA;
+   
+   if(ioctl(driSubFD, DRM_IOCTL_I810_INIT, &init)) {
+      return 0; /* FALSE */
+   }
+   
+   return 1; /* TRUE */
+}
+
+Bool drmI810InitDma(int driSubFD, drmCompatI810Init *info)
+{
+   drm_i810_init_t init;
+   
+   memset(&init, 0, sizeof(drm_i810_init_t));
+
+   init.func = I810_INIT_DMA;
+   init.mmio_offset = info->mmio_offset;
+   init.buffers_offset = info->buffers_offset;
+   init.ring_start = info->start;
+   init.ring_end = info->end;
+   init.ring_size = info->size;
+   init.sarea_priv_offset = info->sarea_off;
+   init.front_offset = info->front_offset;
+   init.back_offset = info->back_offset;
+   init.depth_offset = info->depth_offset;
+   init.overlay_offset = info->overlay_offset;
+   init.overlay_physical = info->overlay_physical;
+   init.w = info->w;
+   init.h = info->h;
+   init.pitch = info->pitch;
+   init.pitch_bits = info->pitch_bits;
+
+   if(ioctl(driSubFD, DRM_IOCTL_I810_INIT, &init)) {
+      return 0; /* FALSE */
+   }
+   return 1; /* TRUE */
+}
+
+/* Mga */
+
+#define MGA_IDLE_RETRY		2048
+
+int drmMGAInitDMA( int fd, drmCompatMGAInit *info )
+{
+   drm_mga_init_t init;
+
+   memset( &init, 0, sizeof(drm_mga_init_t) );
+
+   init.func			= MGA_INIT_DMA;
+
+   init.sarea_priv_offset	= info->sarea_priv_offset;
+   init.sgram			= info->sgram;
+   init.chipset			= info->chipset;
+   init.maccess			= info->maccess;
+
+   init.fb_cpp			= info->fb_cpp;
+   init.front_offset		= info->front_offset;
+   init.front_pitch		= info->front_pitch;
+   init.back_offset		= info->back_offset;
+   init.back_pitch		= info->back_pitch;
+
+   init.depth_cpp		= info->depth_cpp;
+   init.depth_offset		= info->depth_offset;
+   init.depth_pitch		= info->depth_pitch;
+
+   init.texture_offset[0]	= info->texture_offset[0];
+   init.texture_size[0]		= info->texture_size[0];
+   init.texture_offset[1]	= info->texture_offset[1];
+   init.texture_size[1]		= info->texture_size[1];
+
+   init.fb_offset		= info->fb_offset;
+   init.mmio_offset		= info->mmio_offset;
+   init.status_offset		= info->status_offset;
+   init.warp_offset		= info->warp_offset;
+   init.primary_offset		= info->primary_offset;
+   init.buffers_offset		= info->buffers_offset;
+
+   if ( ioctl( fd, DRM_IOCTL_MGA_INIT, &init ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmMGACleanupDMA( int fd )
+{
+   drm_mga_init_t init;
+
+   memset( &init, 0, sizeof(drm_mga_init_t) );
+
+   init.func = MGA_CLEANUP_DMA;
+
+   if ( ioctl( fd, DRM_IOCTL_MGA_INIT, &init ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmMGAFlushDMA( int fd, drmLockFlags flags )
+{
+   drm_lock_t lock;
+   int ret, i = 0;
+
+   memset( &lock, 0, sizeof(drm_lock_t) );
+
+   if ( flags & DRM_LOCK_QUIESCENT )	lock.flags |= _DRM_LOCK_QUIESCENT;
+   if ( flags & DRM_LOCK_FLUSH )	lock.flags |= _DRM_LOCK_FLUSH;
+   if ( flags & DRM_LOCK_FLUSH_ALL )	lock.flags |= _DRM_LOCK_FLUSH_ALL;
+
+   do {
+      ret = ioctl( fd, DRM_IOCTL_MGA_FLUSH, &lock );
+   } while ( ret && errno == EBUSY && i++ < MGA_IDLE_RETRY );
+
+   if ( ret == 0 )
+      return 0;
+   if ( errno != EBUSY )
+      return -errno;
+
+   if ( lock.flags & _DRM_LOCK_QUIESCENT ) {
+      /* Only keep trying if we need quiescence.
+       */
+      lock.flags &= ~(_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL);
+
+      do {
+	 ret = ioctl( fd, DRM_IOCTL_MGA_FLUSH, &lock );
+      } while ( ret && errno == EBUSY && i++ < MGA_IDLE_RETRY );
+   }
+
+   if ( ret == 0 ) {
+      return 0;
+   } else {
+      return -errno;
+   }
+}
+
+int drmMGAEngineReset( int fd )
+{
+   if ( ioctl( fd, DRM_IOCTL_MGA_RESET, NULL ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmMGAFullScreen( int fd, int enable )
+{
+   return -EINVAL;
+}
+
+int drmMGASwapBuffers( int fd )
+{
+   int ret, i = 0;
+
+   do {
+      ret = ioctl( fd, DRM_IOCTL_MGA_SWAP, NULL );
+   } while ( ret && errno == EBUSY && i++ < MGA_IDLE_RETRY );
+
+   if ( ret == 0 ) {
+      return 0;
+   } else {
+      return -errno;
+   }
+}
+
+int drmMGAClear( int fd, unsigned int flags,
+		 unsigned int clear_color, unsigned int clear_depth,
+		 unsigned int color_mask, unsigned int depth_mask )
+{
+   drm_mga_clear_t clear;
+   int ret, i = 0;
+
+   clear.flags = flags;
+   clear.clear_color = clear_color;
+   clear.clear_depth = clear_depth;
+   clear.color_mask = color_mask;
+   clear.depth_mask = depth_mask;
+
+   do {
+      ret = ioctl( fd, DRM_IOCTL_MGA_CLEAR, &clear );
+   } while ( ret && errno == EBUSY && i++ < MGA_IDLE_RETRY );
+
+   if ( ret == 0 ) {
+      return 0;
+   } else {
+      return -errno;
+   }
+}
+
+int drmMGAFlushVertexBuffer( int fd, int index, int used, int discard )
+{
+   drm_mga_vertex_t vertex;
+
+   vertex.idx = index;
+   vertex.used = used;
+   vertex.discard = discard;
+
+   if ( ioctl( fd, DRM_IOCTL_MGA_VERTEX, &vertex ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmMGAFlushIndices( int fd, int index, int start, int end, int discard )
+{
+   drm_mga_indices_t indices;
+
+   indices.idx = index;
+   indices.start = start;
+   indices.end = end;
+   indices.discard = discard;
+
+   if ( ioctl( fd, DRM_IOCTL_MGA_INDICES, &indices ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmMGATextureLoad( int fd, int index,
+		       unsigned int dstorg, unsigned int length )
+{
+   drm_mga_iload_t iload;
+   int ret, i = 0;
+
+   iload.idx = index;
+   iload.dstorg = dstorg;
+   iload.length = length;
+
+   do {
+      ret = ioctl( fd, DRM_IOCTL_MGA_ILOAD, &iload );
+   } while ( ret && errno == EBUSY && i++ < MGA_IDLE_RETRY );
+
+   if ( ret == 0 ) {
+      return 0;
+   } else {
+      return -errno;
+   }
+}
+
+int drmMGAAgpBlit( int fd, unsigned int planemask,
+		   unsigned int src_offset, int src_pitch,
+		   unsigned int dst_offset, int dst_pitch,
+		   int delta_sx, int delta_sy,
+		   int delta_dx, int delta_dy,
+		   int height, int ydir )
+{
+   drm_mga_blit_t blit;
+   int ret, i = 0;
+
+   blit.planemask = planemask;
+   blit.srcorg = src_offset;
+   blit.dstorg = dst_offset;
+   blit.src_pitch = src_pitch;
+   blit.dst_pitch = dst_pitch;
+   blit.delta_sx = delta_sx;
+   blit.delta_sy = delta_sy;
+   blit.delta_dx = delta_dx;
+   blit.delta_dx = delta_dx;
+   blit.height = height;
+   blit.ydir = ydir;
+
+   do {
+      ret = ioctl( fd, DRM_IOCTL_MGA_BLIT, &blit );
+   } while ( ret && errno == EBUSY && i++ < MGA_IDLE_RETRY );
+
+   if ( ret == 0 ) {
+      return 0;
+   } else {
+      return -errno;
+   }
+}
+
+/* R128 */
+
+#define R128_BUFFER_RETRY	32
+#define R128_IDLE_RETRY		32
+
+int drmR128InitCCE( int fd, drmCompatR128Init *info )
+{
+   drm_r128_init_t init;
+
+   memset( &init, 0, sizeof(drm_r128_init_t) );
+
+   init.func			= R128_INIT_CCE;
+   init.sarea_priv_offset	= info->sarea_priv_offset;
+   init.is_pci			= info->is_pci;
+   init.cce_mode		= info->cce_mode;
+   init.cce_secure		= info->cce_secure;
+   init.ring_size		= info->ring_size;
+   init.usec_timeout		= info->usec_timeout;
+
+   init.fb_bpp			= info->fb_bpp;
+   init.front_offset		= info->front_offset;
+   init.front_pitch		= info->front_pitch;
+   init.back_offset		= info->back_offset;
+   init.back_pitch		= info->back_pitch;
+
+   init.depth_bpp		= info->depth_bpp;
+   init.depth_offset		= info->depth_offset;
+   init.depth_pitch		= info->depth_pitch;
+   init.span_offset		= info->span_offset;
+
+   init.fb_offset		= info->fb_offset;
+   init.mmio_offset		= info->mmio_offset;
+   init.ring_offset		= info->ring_offset;
+   init.ring_rptr_offset	= info->ring_rptr_offset;
+   init.buffers_offset		= info->buffers_offset;
+   init.agp_textures_offset	= info->agp_textures_offset;
+
+   if ( ioctl( fd, DRM_IOCTL_R128_INIT, &init ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmR128CleanupCCE( int fd )
+{
+   drm_r128_init_t init;
+
+   memset( &init, 0, sizeof(drm_r128_init_t) );
+
+   init.func = R128_CLEANUP_CCE;
+
+   if ( ioctl( fd, DRM_IOCTL_R128_INIT, &init ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmR128StartCCE( int fd )
+{
+   if ( ioctl( fd, DRM_IOCTL_R128_CCE_START, NULL ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmR128StopCCE( int fd )
+{
+   drm_r128_cce_stop_t stop;
+   int ret, i = 0;
+
+   stop.flush = 1;
+   stop.idle = 1;
+
+   ret = ioctl( fd, DRM_IOCTL_R128_CCE_STOP, &stop );
+
+   if ( ret == 0 ) {
+      return 0;
+   } else if ( errno != EBUSY ) {
+      return -errno;
+   }
+
+   stop.flush = 0;
+
+   do {
+      ret = ioctl( fd, DRM_IOCTL_R128_CCE_STOP, &stop );
+   } while ( ret && errno == EBUSY && i++ < R128_IDLE_RETRY );
+
+   if ( ret == 0 ) {
+      return 0;
+   } else if ( errno != EBUSY ) {
+      return -errno;
+   }
+
+   stop.idle = 0;
+
+   if ( ioctl( fd, DRM_IOCTL_R128_CCE_STOP, &stop ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmR128ResetCCE( int fd )
+{
+   if ( ioctl( fd, DRM_IOCTL_R128_CCE_RESET, NULL ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmR128WaitForIdleCCE( int fd )
+{
+   int ret, i = 0;
+
+   do {
+      ret = ioctl( fd, DRM_IOCTL_R128_CCE_IDLE, NULL );
+   } while ( ret && errno == EBUSY && i++ < R128_IDLE_RETRY );
+
+   if ( ret == 0 ) {
+      return 0;
+   } else {
+      return -errno;
+   }
+}
+
+int drmR128EngineReset( int fd )
+{
+   if ( ioctl( fd, DRM_IOCTL_R128_RESET, NULL ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmR128FullScreen( int fd, int enable )
+{
+   drm_r128_fullscreen_t fs;
+
+   if ( enable ) {
+      fs.func = R128_INIT_FULLSCREEN;
+   } else {
+      fs.func = R128_CLEANUP_FULLSCREEN;
+   }
+
+   if ( ioctl( fd, DRM_IOCTL_R128_FULLSCREEN, &fs ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmR128SwapBuffers( int fd )
+{
+   if ( ioctl( fd, DRM_IOCTL_R128_SWAP, NULL ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmR128Clear( int fd, unsigned int flags,
+		  unsigned int clear_color, unsigned int clear_depth,
+		  unsigned int color_mask, unsigned int depth_mask )
+{
+   drm_r128_clear_t clear;
+
+   clear.flags = flags;
+   clear.clear_color = clear_color;
+   clear.clear_depth = clear_depth;
+   clear.color_mask = color_mask;
+   clear.depth_mask = depth_mask;
+
+   if ( ioctl( fd, DRM_IOCTL_R128_CLEAR, &clear ) < 0 ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmR128FlushVertexBuffer( int fd, int prim, int index,
+			      int count, int discard )
+{
+   drm_r128_vertex_t v;
+
+   v.prim = prim;
+   v.idx = index;
+   v.count = count;
+   v.discard = discard;
+
+   if ( ioctl( fd, DRM_IOCTL_R128_VERTEX, &v ) < 0 ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmR128FlushIndices( int fd, int prim, int index,
+			 int start, int end, int discard )
+{
+   drm_r128_indices_t elts;
+
+   elts.prim = prim;
+   elts.idx = index;
+   elts.start = start;
+   elts.end = end;
+   elts.discard = discard;
+
+   if ( ioctl( fd, DRM_IOCTL_R128_INDICES, &elts ) < 0 ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmR128TextureBlit( int fd, int index,
+			int offset, int pitch, int format,
+			int x, int y, int width, int height )
+{
+   drm_r128_blit_t blit;
+
+   blit.idx = index;
+   blit.offset = offset;
+   blit.pitch = pitch;
+   blit.format = format;
+   blit.x = x;
+   blit.y = y;
+   blit.width = width;
+   blit.height = height;
+
+   if ( ioctl( fd, DRM_IOCTL_R128_BLIT, &blit ) < 0 ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmR128WriteDepthSpan( int fd, int n, int x, int y,
+			   const unsigned int depth[],
+			   const unsigned char mask[] )
+{
+   drm_r128_depth_t d;
+
+   d.func = R128_WRITE_SPAN;
+   d.n = n;
+   d.x = &x;
+   d.y = &y;
+   d.buffer = (unsigned int *)depth;
+   d.mask = (unsigned char *)mask;
+
+   if ( ioctl( fd, DRM_IOCTL_R128_DEPTH, &d ) < 0 ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmR128WriteDepthPixels( int fd, int n,
+			     const int x[], const int y[],
+			     const unsigned int depth[],
+			     const unsigned char mask[] )
+{
+   drm_r128_depth_t d;
+
+   d.func = R128_WRITE_PIXELS;
+   d.n = n;
+   d.x = (int *)x;
+   d.y = (int *)y;
+   d.buffer = (unsigned int *)depth;
+   d.mask = (unsigned char *)mask;
+
+   if ( ioctl( fd, DRM_IOCTL_R128_DEPTH, &d ) < 0 ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmR128ReadDepthSpan( int fd, int n, int x, int y )
+{
+   drm_r128_depth_t d;
+
+   d.func = R128_READ_SPAN;
+   d.n = n;
+   d.x = &x;
+   d.y = &y;
+   d.buffer = NULL;
+   d.mask = NULL;
+
+   if ( ioctl( fd, DRM_IOCTL_R128_DEPTH, &d ) < 0 ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmR128ReadDepthPixels( int fd, int n,
+			    const int x[], const int y[] )
+{
+   drm_r128_depth_t d;
+
+   d.func = R128_READ_PIXELS;
+   d.n = n;
+   d.x = (int *)x;
+   d.y = (int *)y;
+   d.buffer = NULL;
+   d.mask = NULL;
+
+   if ( ioctl( fd, DRM_IOCTL_R128_DEPTH, &d ) < 0 ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmR128PolygonStipple( int fd, unsigned int *mask )
+{
+   drm_r128_stipple_t stipple;
+
+   stipple.mask = mask;
+
+   if ( ioctl( fd, DRM_IOCTL_R128_STIPPLE, &stipple ) < 0 ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmR128FlushIndirectBuffer( int fd, int index,
+				int start, int end, int discard )
+{
+   drm_r128_indirect_t ind;
+
+   ind.idx = index;
+   ind.start = start;
+   ind.end = end;
+   ind.discard = discard;
+
+   if ( ioctl( fd, DRM_IOCTL_R128_INDIRECT, &ind ) < 0 ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+/* Radeon */
+
+#define RADEON_BUFFER_RETRY	32
+#define RADEON_IDLE_RETRY	16
+
+int drmRadeonInitCP( int fd, drmCompatRadeonInit *info )
+{
+   drm_radeon_init_t init;
+
+   memset( &init, 0, sizeof(drm_radeon_init_t) );
+
+   init.func			= RADEON_INIT_CP;
+   init.sarea_priv_offset	= info->sarea_priv_offset;
+   init.is_pci			= info->is_pci;
+   init.cp_mode			= info->cp_mode;
+   init.agp_size		= info->agp_size;
+   init.ring_size		= info->ring_size;
+   init.usec_timeout		= info->usec_timeout;
+
+   init.fb_bpp			= info->fb_bpp;
+   init.front_offset		= info->front_offset;
+   init.front_pitch		= info->front_pitch;
+   init.back_offset		= info->back_offset;
+   init.back_pitch		= info->back_pitch;
+
+   init.depth_bpp		= info->depth_bpp;
+   init.depth_offset		= info->depth_offset;
+   init.depth_pitch		= info->depth_pitch;
+
+   init.fb_offset		= info->fb_offset;
+   init.mmio_offset		= info->mmio_offset;
+   init.ring_offset		= info->ring_offset;
+   init.ring_rptr_offset	= info->ring_rptr_offset;
+   init.buffers_offset		= info->buffers_offset;
+   init.agp_textures_offset	= info->agp_textures_offset;
+
+   if ( ioctl( fd, DRM_IOCTL_RADEON_CP_INIT, &init ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmRadeonCleanupCP( int fd )
+{
+   drm_radeon_init_t init;
+
+   memset( &init, 0, sizeof(drm_radeon_init_t) );
+
+   init.func = RADEON_CLEANUP_CP;
+
+   if ( ioctl( fd, DRM_IOCTL_RADEON_CP_INIT, &init ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmRadeonStartCP( int fd )
+{
+   if ( ioctl( fd, DRM_IOCTL_RADEON_CP_START, NULL ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmRadeonStopCP( int fd )
+{
+   drm_radeon_cp_stop_t stop;
+   int ret, i = 0;
+
+   stop.flush = 1;
+   stop.idle = 1;
+
+   ret = ioctl( fd, DRM_IOCTL_RADEON_CP_STOP, &stop );
+
+   if ( ret == 0 ) {
+      return 0;
+   } else if ( errno != EBUSY ) {
+      return -errno;
+   }
+
+   stop.flush = 0;
+
+   do {
+      ret = ioctl( fd, DRM_IOCTL_RADEON_CP_STOP, &stop );
+   } while ( ret && errno == EBUSY && i++ < RADEON_IDLE_RETRY );
+
+   if ( ret == 0 ) {
+      return 0;
+   } else if ( errno != EBUSY ) {
+      return -errno;
+   }
+
+   stop.idle = 0;
+
+   if ( ioctl( fd, DRM_IOCTL_RADEON_CP_STOP, &stop ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmRadeonResetCP( int fd )
+{
+   if ( ioctl( fd, DRM_IOCTL_RADEON_CP_RESET, NULL ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmRadeonWaitForIdleCP( int fd )
+{
+   int ret, i = 0;
+
+   do {
+      ret = ioctl( fd, DRM_IOCTL_RADEON_CP_IDLE, NULL );
+   } while ( ret && errno == EBUSY && i++ < RADEON_IDLE_RETRY );
+
+   if ( ret == 0 ) {
+      return 0;
+   } else {
+      return -errno;
+   }
+}
+
+int drmRadeonEngineReset( int fd )
+{
+   if ( ioctl( fd, DRM_IOCTL_RADEON_RESET, NULL ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmRadeonFullScreen( int fd, int enable )
+{
+   drm_radeon_fullscreen_t fs;
+
+   if ( enable ) {
+      fs.func = RADEON_INIT_FULLSCREEN;
+   } else {
+      fs.func = RADEON_CLEANUP_FULLSCREEN;
+   }
+
+   if ( ioctl( fd, DRM_IOCTL_RADEON_FULLSCREEN, &fs ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmRadeonSwapBuffers( int fd )
+{
+   if ( ioctl( fd, DRM_IOCTL_RADEON_SWAP, NULL ) ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmRadeonClear( int fd, unsigned int flags,
+		    unsigned int clear_color, unsigned int clear_depth,
+		    unsigned int color_mask, unsigned int stencil,
+		    void *b, int nbox )
+{
+   drm_radeon_clear_t clear;
+   drm_radeon_clear_rect_t depth_boxes[RADEON_NR_SAREA_CLIPRECTS];
+   drm_clip_rect_t *boxes = (drm_clip_rect_t *)b;
+   int i;
+
+   clear.flags = flags;
+   clear.clear_color = clear_color;
+   clear.clear_depth = clear_depth;
+   clear.color_mask = color_mask;
+   clear.depth_mask = stencil;	/* misnamed field in ioctl */
+   clear.depth_boxes = depth_boxes;
+
+   /* We can remove this when we do real depth clears, instead of
+    * rendering a rectangle into the depth buffer.  This prevents
+    * floating point calculations being done in the kernel.
+    */
+   for ( i = 0 ; i < nbox ; i++ ) {
+      depth_boxes[i].f[CLEAR_X1] = (float)boxes[i].x1;
+      depth_boxes[i].f[CLEAR_Y1] = (float)boxes[i].y1;
+      depth_boxes[i].f[CLEAR_X2] = (float)boxes[i].x2;
+      depth_boxes[i].f[CLEAR_Y2] = (float)boxes[i].y2;
+      depth_boxes[i].f[CLEAR_DEPTH] = (float)clear_depth;
+   }
+
+   if ( ioctl( fd, DRM_IOCTL_RADEON_CLEAR, &clear ) < 0 ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmRadeonFlushVertexBuffer( int fd, int prim, int index,
+				int count, int discard )
+{
+   drm_radeon_vertex_t v;
+
+   v.prim = prim;
+   v.idx = index;
+   v.count = count;
+   v.discard = discard;
+
+   if ( ioctl( fd, DRM_IOCTL_RADEON_VERTEX, &v ) < 0 ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmRadeonFlushIndices( int fd, int prim, int index,
+			   int start, int end, int discard )
+{
+   drm_radeon_indices_t elts;
+
+   elts.prim = prim;
+   elts.idx = index;
+   elts.start = start;
+   elts.end = end;
+   elts.discard = discard;
+
+   if ( ioctl( fd, DRM_IOCTL_RADEON_INDICES, &elts ) < 0 ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmRadeonLoadTexture( int fd, int offset, int pitch, int format, int width,
+                          int height, drmCompatRadeonTexImage *image )
+{
+   drm_radeon_texture_t tex;
+   drm_radeon_tex_image_t tmp;
+   int ret;
+
+   tex.offset = offset;
+   tex.pitch = pitch;
+   tex.format = format;
+   tex.width = width;
+   tex.height = height;
+   tex.image = &tmp;
+
+   /* This gets updated by the kernel when a multipass blit is needed.
+    */
+   memcpy( &tmp, image, sizeof(drm_radeon_tex_image_t) );
+
+   do {
+      ret = ioctl( fd, DRM_IOCTL_RADEON_TEXTURE, &tex );
+   } while ( ret && errno == EAGAIN );
+
+   if ( ret == 0 ) {
+      return 0;
+   } else {
+      return -errno;
+   }
+}
+
+int drmRadeonPolygonStipple( int fd, unsigned int *mask )
+{
+   drm_radeon_stipple_t stipple;
+
+   stipple.mask = mask;
+
+   if ( ioctl( fd, DRM_IOCTL_RADEON_STIPPLE, &stipple ) < 0 ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+int drmRadeonFlushIndirectBuffer( int fd, int index,
+				  int start, int end, int discard )
+{
+   drm_radeon_indirect_t ind;
+
+   ind.idx = index;
+   ind.start = start;
+   ind.end = end;
+   ind.discard = discard;
+
+   if ( ioctl( fd, DRM_IOCTL_RADEON_INDIRECT, &ind ) < 0 ) {
+      return -errno;
+   } else {
+      return 0;
+   }
+}
+
+/* SiS */
+
+Bool drmSiSAgpInit(int driSubFD, int offset, int size)
+{
+   drm_sis_agp_t agp;
+      
+   agp.offset = offset;
+   agp.size = size;
+   ioctl(driSubFD, SIS_IOCTL_AGP_INIT, &agp);
+
+   return 1; /* TRUE */
+}
+
+/* I830 */
+
+Bool drmI830CleanupDma(int driSubFD)
+{
+   drm_i830_init_t init;
+
+   memset(&init, 0, sizeof(drm_i830_init_t));
+   init.func = I810_CLEANUP_DMA;
+
+   if(ioctl(driSubFD, DRM_IOCTL_I830_INIT, &init)) {
+      return 0; /* FALSE */
+   }
+
+   return 1; /* TRUE */
+}
+
+Bool drmI830InitDma(int driSubFD, drmCompatI830Init *info)
+{
+   drm_i830_init_t init;
+
+   memset(&init, 0, sizeof(drm_i830_init_t));
+
+   init.func = I810_INIT_DMA;
+   init.mmio_offset = info->mmio_offset;
+   init.buffers_offset = info->buffers_offset;
+   init.ring_start = info->start;
+   init.ring_end = info->end;
+   init.ring_size = info->size;
+   init.sarea_priv_offset = info->sarea_off;
+   init.front_offset = info->front_offset;
+   init.back_offset = info->back_offset;
+   init.depth_offset = info->depth_offset;
+   init.w = info->w;
+   init.h = info->h;
+   init.pitch = info->pitch;
+   init.pitch_bits = info->pitch_bits;
+   init.back_pitch = info->pitch;
+   init.depth_pitch = info->pitch;
+   init.cpp = info->cpp;
+
+   if(ioctl(driSubFD, DRM_IOCTL_I830_INIT, &init)) {
+      return 0; /* FALSE */
+   }
+   return 1; /* TRUE */
+}
+
+/* WARNING: Do not change, or add, anything to this file.  It is only provided
+ * for binary backwards compatability with the old driver specific DRM
+ * extensions used before XFree86 4.3.
+ */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmGamma.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmGamma.c
deleted file mode 100644
index 137d1d227..000000000
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmGamma.c
+++ /dev/null
@@ -1,87 +0,0 @@
-#ifdef XFree86Server
-# include "xf86.h"
-# include "xf86_OSproc.h"
-# include "xf86_ansic.h"
-# include "xf86Priv.h"
-# define _DRM_MALLOC xalloc
-# define _DRM_FREE   xfree
-# ifndef XFree86LOADER
-#  include <sys/stat.h>
-#  include <sys/mman.h>
-# endif
-#else
-# include <stdio.h>
-# include <stdlib.h>
-# include <unistd.h>
-# include <string.h>
-# include <ctype.h>
-# include <fcntl.h>
-# include <errno.h>
-# include <signal.h>
-# include <sys/types.h>
-# include <sys/stat.h>
-# include <sys/ioctl.h>
-# include <sys/mman.h>
-# include <sys/time.h>
-# ifdef DRM_USE_MALLOC
-#  define _DRM_MALLOC malloc
-#  define _DRM_FREE   free
-extern int xf86InstallSIGIOHandler(int fd, void (*f)(int, void *), void *);
-extern int xf86RemoveSIGIOHandler(int fd);
-# else
-#  include <X11/Xlibint.h>
-#  define _DRM_MALLOC Xmalloc
-#  define _DRM_FREE   Xfree
-# endif
-#endif
-
-/* Not all systems have MAP_FAILED defined */
-#ifndef MAP_FAILED
-#define MAP_FAILED ((void *)-1)
-#endif
-
-#ifdef __linux__
-#include <sys/sysmacros.h>	/* for makedev() */
-#endif
-#include "xf86drm.h"
-#include "xf86drmGamma.h"
-#include "drm.h"
-
-int drmGAMMAInitDMA( int fd, drmGAMMAInit *info )
-{
-   drm_gamma_init_t init;
-
-   memset( &init, 0, sizeof(drm_gamma_init_t) );
-
-   init.func			= GAMMA_INIT_DMA;
-
-   init.mmio0			= info->mmio0;
-   init.mmio1			= info->mmio1;
-   init.mmio2			= info->mmio2;
-   init.mmio3			= info->mmio3;
-   init.sarea_priv_offset	= info->sarea_priv_offset;
-   init.pcimode			= info->pcimode;
-   if (!init.pcimode)
-   	init.buffers_offset		= info->buffers_offset;
-
-   if ( ioctl( fd, DRM_IOCTL_GAMMA_INIT, &init ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmGAMMACleanupDMA( int fd )
-{
-   drm_gamma_init_t init;
-
-   memset( &init, 0, sizeof(drm_gamma_init_t) );
-
-   init.func = GAMMA_CLEANUP_DMA;
-
-   if ( ioctl( fd, DRM_IOCTL_GAMMA_INIT, &init ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmI810.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmI810.c
deleted file mode 100644
index f702d8488..000000000
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmI810.c
+++ /dev/null
@@ -1,90 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmI810.c,v 1.7 2001/09/27 08:25:04 alanh Exp $ */
-
-#ifdef XFree86Server
-# include "xf86.h"
-# include "xf86_OSproc.h"
-# include "xf86_ansic.h"
-# define _DRM_MALLOC xalloc
-# define _DRM_FREE   xfree
-# ifndef XFree86LOADER
-#  include <sys/mman.h>
-# endif
-#else
-# include <stdio.h>
-# include <stdlib.h>
-# include <unistd.h>
-# include <string.h>
-# include <ctype.h>
-# include <fcntl.h>
-# include <errno.h>
-# include <signal.h>
-# include <sys/types.h>
-# include <sys/ioctl.h>
-# include <sys/mman.h>
-# include <sys/time.h>
-# ifdef DRM_USE_MALLOC
-#  define _DRM_MALLOC malloc
-#  define _DRM_FREE   free
-extern int xf86InstallSIGIOHandler(int fd, void (*f)(int, void *), void *);
-extern int xf86RemoveSIGIOHandler(int fd);
-# else
-#  include <X11/Xlibint.h>
-#  define _DRM_MALLOC Xmalloc
-#  define _DRM_FREE   Xfree
-# endif
-#endif
-
-/* Not all systems have MAP_FAILED defined */
-#ifndef MAP_FAILED
-#define MAP_FAILED ((void *)-1)
-#endif
-
-#ifdef __linux__
-#include <sys/sysmacros.h>	/* for makedev() */
-#endif
-#include "xf86drm.h"
-#include "xf86drmI810.h"
-#include "drm.h"
-
-Bool drmI810CleanupDma(int driSubFD)
-{
-   drm_i810_init_t init;
-   
-   memset(&init, 0, sizeof(drm_i810_init_t));
-   init.func = I810_CLEANUP_DMA;
-   
-   if(ioctl(driSubFD, DRM_IOCTL_I810_INIT, &init)) {
-      return FALSE;
-   }
-   
-   return TRUE;
-}
-
-Bool drmI810InitDma(int driSubFD, drmI810Init *info)
-{
-   drm_i810_init_t init;
-   
-   memset(&init, 0, sizeof(drm_i810_init_t));
-
-   init.func = I810_INIT_DMA;
-   init.mmio_offset = info->mmio_offset;
-   init.buffers_offset = info->buffers_offset;
-   init.ring_start = info->start;
-   init.ring_end = info->end;
-   init.ring_size = info->size;
-   init.sarea_priv_offset = info->sarea_off;
-   init.front_offset = info->front_offset;
-   init.back_offset = info->back_offset;
-   init.depth_offset = info->depth_offset;
-   init.overlay_offset = info->overlay_offset;
-   init.overlay_physical = info->overlay_physical;
-   init.w = info->w;
-   init.h = info->h;
-   init.pitch = info->pitch;
-   init.pitch_bits = info->pitch_bits;
-
-   if(ioctl(driSubFD, DRM_IOCTL_I810_INIT, &init)) {
-      return FALSE;
-   }
-   return TRUE;
-}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmI830.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmI830.c
deleted file mode 100644
index 4246fdef8..000000000
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmI830.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmI830.c,v 1.1 2001/10/04 18:28:22 alanh Exp $ */
-
-#ifdef XFree86Server
-# include "xf86.h"
-# include "xf86_OSproc.h"
-# include "xf86_ansic.h"
-# include "xf86Priv.h"
-# define _DRM_MALLOC xalloc
-# define _DRM_FREE   xfree
-# ifndef XFree86LOADER
-#  include <sys/stat.h>
-#  include <sys/mman.h>
-# endif
-#else
-# include <stdio.h>
-# include <stdlib.h>
-# include <unistd.h>
-# include <string.h>
-# include <ctype.h>
-# include <fcntl.h>
-# include <errno.h>
-# include <signal.h>
-# include <sys/types.h>
-# include <sys/stat.h>
-# include <sys/ioctl.h>
-# include <sys/mman.h>
-# include <sys/time.h>
-# ifdef DRM_USE_MALLOC
-#  define _DRM_MALLOC malloc
-#  define _DRM_FREE   free
-extern int xf86InstallSIGIOHandler(int fd, void (*f)(int, void *), void *);
-extern int xf86RemoveSIGIOHandler(int fd);
-# else
-#  include <Xlibint.h>
-#  define _DRM_MALLOC Xmalloc
-#  define _DRM_FREE   Xfree
-# endif
-#endif
-
-/* Not all systems have MAP_FAILED defined */
-#ifndef MAP_FAILED
-#define MAP_FAILED ((void *)-1)
-#endif
-
-#ifdef __linux__
-#include <sys/sysmacros.h>	/* for makedev() */
-#endif
-
-#include "xf86drm.h"
-#include "drm.h"
-#include "xf86drmI830.h"
-
-Bool drmI830CleanupDma(int driSubFD)
-{
-   drm_i830_init_t init;
-   
-   memset(&init, 0, sizeof(drm_i830_init_t));
-   init.func = I810_CLEANUP_DMA;
-   
-   if(ioctl(driSubFD, DRM_IOCTL_I830_INIT, &init)) {
-      return FALSE;
-   }
-   
-   return TRUE;
-}
-
-Bool drmI830InitDma(int driSubFD, drmI830Init *info)
-{
-   drm_i830_init_t init;
-   
-   memset(&init, 0, sizeof(drm_i830_init_t));
-
-   init.func = I810_INIT_DMA;
-   init.mmio_offset = info->mmio_offset;
-   init.buffers_offset = info->buffers_offset;
-   init.ring_start = info->start;
-   init.ring_end = info->end;
-   init.ring_size = info->size;
-   init.sarea_priv_offset = info->sarea_off;
-   init.front_offset = info->front_offset;
-   init.back_offset = info->back_offset;
-   init.depth_offset = info->depth_offset;
-   init.w = info->w;
-   init.h = info->h;
-   init.pitch = info->pitch;
-   init.pitch_bits = info->pitch_bits;
-   init.back_pitch = info->pitch;
-   init.depth_pitch = info->pitch;
-   init.cpp = info->cpp;
-
-   if(ioctl(driSubFD, DRM_IOCTL_I830_INIT, &init)) {
-      return FALSE;
-   }
-   return TRUE;
-}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmMga.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmMga.c
deleted file mode 100644
index 2910da192..000000000
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmMga.c
+++ /dev/null
@@ -1,311 +0,0 @@
-/* xf86drmMga.c -- User-level interface to MGA DRM device
- * Created: Sun Apr  9 18:13:54 2000 by gareth@valinux.com
- *
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Author:
- *   Gareth Hughes <gareth@valinux.com>
- *
- */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmMga.c,v 1.6 2001/08/27 17:40:59 dawes Exp $ */
-
-#ifdef XFree86Server
-# include "xf86.h"
-# include "xf86_OSproc.h"
-# include "xf86_ansic.h"
-# define _DRM_MALLOC xalloc
-# define _DRM_FREE   xfree
-# ifndef XFree86LOADER
-#  include <sys/mman.h>
-# endif
-#else
-# include <stdio.h>
-# include <stdlib.h>
-# include <unistd.h>
-# include <string.h>
-# include <ctype.h>
-# include <fcntl.h>
-# include <errno.h>
-# include <signal.h>
-# include <sys/types.h>
-# include <sys/ioctl.h>
-# include <sys/mman.h>
-# include <sys/time.h>
-# ifdef DRM_USE_MALLOC
-#  define _DRM_MALLOC malloc
-#  define _DRM_FREE   free
-extern int xf86InstallSIGIOHandler(int fd, void (*f)(int, void *), void *);
-extern int xf86RemoveSIGIOHandler(int fd);
-# else
-#  include <X11/Xlibint.h>
-#  define _DRM_MALLOC Xmalloc
-#  define _DRM_FREE   Xfree
-# endif
-#endif
-
-/* Not all systems have MAP_FAILED defined */
-#ifndef MAP_FAILED
-#define MAP_FAILED ((void *)-1)
-#endif
-
-#ifdef __linux__
-#include <sys/sysmacros.h>	/* for makedev() */
-#endif
-#include "xf86drm.h"
-#include "xf86drmMga.h"
-#include "drm.h"
-
-#define MGA_IDLE_RETRY		2048
-
-
-int drmMGAInitDMA( int fd, drmMGAInit *info )
-{
-   drm_mga_init_t init;
-
-   memset( &init, 0, sizeof(drm_mga_init_t) );
-
-   init.func			= MGA_INIT_DMA;
-
-   init.sarea_priv_offset	= info->sarea_priv_offset;
-   init.sgram			= info->sgram;
-   init.chipset			= info->chipset;
-   init.maccess			= info->maccess;
-
-   init.fb_cpp			= info->fb_cpp;
-   init.front_offset		= info->front_offset;
-   init.front_pitch		= info->front_pitch;
-   init.back_offset		= info->back_offset;
-   init.back_pitch		= info->back_pitch;
-
-   init.depth_cpp		= info->depth_cpp;
-   init.depth_offset		= info->depth_offset;
-   init.depth_pitch		= info->depth_pitch;
-
-   init.texture_offset[0]	= info->texture_offset[0];
-   init.texture_size[0]		= info->texture_size[0];
-   init.texture_offset[1]	= info->texture_offset[1];
-   init.texture_size[1]		= info->texture_size[1];
-
-   init.fb_offset		= info->fb_offset;
-   init.mmio_offset		= info->mmio_offset;
-   init.status_offset		= info->status_offset;
-   init.warp_offset		= info->warp_offset;
-   init.primary_offset		= info->primary_offset;
-   init.buffers_offset		= info->buffers_offset;
-
-   if ( ioctl( fd, DRM_IOCTL_MGA_INIT, &init ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmMGACleanupDMA( int fd )
-{
-   drm_mga_init_t init;
-
-   memset( &init, 0, sizeof(drm_mga_init_t) );
-
-   init.func = MGA_CLEANUP_DMA;
-
-   if ( ioctl( fd, DRM_IOCTL_MGA_INIT, &init ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmMGAFlushDMA( int fd, drmLockFlags flags )
-{
-   drm_lock_t lock;
-   int ret, i = 0;
-
-   memset( &lock, 0, sizeof(drm_lock_t) );
-
-   if ( flags & DRM_LOCK_QUIESCENT )	lock.flags |= _DRM_LOCK_QUIESCENT;
-   if ( flags & DRM_LOCK_FLUSH )	lock.flags |= _DRM_LOCK_FLUSH;
-   if ( flags & DRM_LOCK_FLUSH_ALL )	lock.flags |= _DRM_LOCK_FLUSH_ALL;
-
-   do {
-      ret = ioctl( fd, DRM_IOCTL_MGA_FLUSH, &lock );
-   } while ( ret && errno == EBUSY && i++ < MGA_IDLE_RETRY );
-
-   if ( ret == 0 )
-      return 0;
-   if ( errno != EBUSY )
-      return -errno;
-
-   if ( lock.flags & _DRM_LOCK_QUIESCENT ) {
-      /* Only keep trying if we need quiescence.
-       */
-      lock.flags &= ~(_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL);
-
-      do {
-	 ret = ioctl( fd, DRM_IOCTL_MGA_FLUSH, &lock );
-      } while ( ret && errno == EBUSY && i++ < MGA_IDLE_RETRY );
-   }
-
-   if ( ret == 0 ) {
-      return 0;
-   } else {
-      return -errno;
-   }
-}
-
-int drmMGAEngineReset( int fd )
-{
-   if ( ioctl( fd, DRM_IOCTL_MGA_RESET, NULL ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmMGAFullScreen( int fd, int enable )
-{
-   return -EINVAL;
-}
-
-int drmMGASwapBuffers( int fd )
-{
-   int ret, i = 0;
-
-   do {
-      ret = ioctl( fd, DRM_IOCTL_MGA_SWAP, NULL );
-   } while ( ret && errno == EBUSY && i++ < MGA_IDLE_RETRY );
-
-   if ( ret == 0 ) {
-      return 0;
-   } else {
-      return -errno;
-   }
-}
-
-int drmMGAClear( int fd, unsigned int flags,
-		 unsigned int clear_color, unsigned int clear_depth,
-		 unsigned int color_mask, unsigned int depth_mask )
-{
-   drm_mga_clear_t clear;
-   int ret, i = 0;
-
-   clear.flags = flags;
-   clear.clear_color = clear_color;
-   clear.clear_depth = clear_depth;
-   clear.color_mask = color_mask;
-   clear.depth_mask = depth_mask;
-
-   do {
-      ret = ioctl( fd, DRM_IOCTL_MGA_CLEAR, &clear );
-   } while ( ret && errno == EBUSY && i++ < MGA_IDLE_RETRY );
-
-   if ( ret == 0 ) {
-      return 0;
-   } else {
-      return -errno;
-   }
-}
-
-int drmMGAFlushVertexBuffer( int fd, int index, int used, int discard )
-{
-   drm_mga_vertex_t vertex;
-
-   vertex.idx = index;
-   vertex.used = used;
-   vertex.discard = discard;
-
-   if ( ioctl( fd, DRM_IOCTL_MGA_VERTEX, &vertex ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmMGAFlushIndices( int fd, int index, int start, int end, int discard )
-{
-   drm_mga_indices_t indices;
-
-   indices.idx = index;
-   indices.start = start;
-   indices.end = end;
-   indices.discard = discard;
-
-   if ( ioctl( fd, DRM_IOCTL_MGA_INDICES, &indices ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmMGATextureLoad( int fd, int index,
-		       unsigned int dstorg, unsigned int length )
-{
-   drm_mga_iload_t iload;
-   int ret, i = 0;
-
-   iload.idx = index;
-   iload.dstorg = dstorg;
-   iload.length = length;
-
-   do {
-      ret = ioctl( fd, DRM_IOCTL_MGA_ILOAD, &iload );
-   } while ( ret && errno == EBUSY && i++ < MGA_IDLE_RETRY );
-
-   if ( ret == 0 ) {
-      return 0;
-   } else {
-      return -errno;
-   }
-}
-
-int drmMGAAgpBlit( int fd, unsigned int planemask,
-		   unsigned int src_offset, int src_pitch,
-		   unsigned int dst_offset, int dst_pitch,
-		   int delta_sx, int delta_sy,
-		   int delta_dx, int delta_dy,
-		   int height, int ydir )
-{
-   drm_mga_blit_t blit;
-   int ret, i = 0;
-
-   blit.planemask = planemask;
-   blit.srcorg = src_offset;
-   blit.dstorg = dst_offset;
-   blit.src_pitch = src_pitch;
-   blit.dst_pitch = dst_pitch;
-   blit.delta_sx = delta_sx;
-   blit.delta_sy = delta_sy;
-   blit.delta_dx = delta_dx;
-   blit.delta_dx = delta_dx;
-   blit.height = height;
-   blit.ydir = ydir;
-
-   do {
-      ret = ioctl( fd, DRM_IOCTL_MGA_BLIT, &blit );
-   } while ( ret && errno == EBUSY && i++ < MGA_IDLE_RETRY );
-
-   if ( ret == 0 ) {
-      return 0;
-   } else {
-      return -errno;
-   }
-}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmR128.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmR128.c
deleted file mode 100644
index b65597e99..000000000
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmR128.c
+++ /dev/null
@@ -1,422 +0,0 @@
-/* xf86drmR128.c -- User-level interface to Rage 128 DRM device
- * Created: Sun Apr  9 18:13:54 2000 by kevin@precisioninsight.com
- *
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Author: Kevin E. Martin <martin@valinux.com>
- *
- */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmR128.c,v 1.11 2001/08/27 17:40:59 dawes Exp $ */
-
-#ifdef XFree86Server
-# include "xf86.h"
-# include "xf86_OSproc.h"
-# include "xf86_ansic.h"
-# define _DRM_MALLOC xalloc
-# define _DRM_FREE   xfree
-# ifndef XFree86LOADER
-#  include <sys/mman.h>
-# endif
-#else
-# include <stdio.h>
-# include <stdlib.h>
-# include <unistd.h>
-# include <string.h>
-# include <ctype.h>
-# include <fcntl.h>
-# include <errno.h>
-# include <signal.h>
-# include <sys/types.h>
-# include <sys/ioctl.h>
-# include <sys/mman.h>
-# include <sys/time.h>
-# ifdef DRM_USE_MALLOC
-#  define _DRM_MALLOC malloc
-#  define _DRM_FREE   free
-extern int xf86InstallSIGIOHandler(int fd, void (*f)(int, void *), void *);
-extern int xf86RemoveSIGIOHandler(int fd);
-# else
-#  include <X11/Xlibint.h>
-#  define _DRM_MALLOC Xmalloc
-#  define _DRM_FREE   Xfree
-# endif
-#endif
-
-/* Not all systems have MAP_FAILED defined */
-#ifndef MAP_FAILED
-#define MAP_FAILED ((void *)-1)
-#endif
-
-#ifdef __linux__
-#include <sys/sysmacros.h>	/* for makedev() */
-#endif
-#include "xf86drm.h"
-#include "xf86drmR128.h"
-#include "drm.h"
-
-#define R128_BUFFER_RETRY	32
-#define R128_IDLE_RETRY		32
-
-
-int drmR128InitCCE( int fd, drmR128Init *info )
-{
-   drm_r128_init_t init;
-
-   memset( &init, 0, sizeof(drm_r128_init_t) );
-
-   init.func			= R128_INIT_CCE;
-   init.sarea_priv_offset	= info->sarea_priv_offset;
-   init.is_pci			= info->is_pci;
-   init.cce_mode		= info->cce_mode;
-   init.cce_secure		= info->cce_secure;
-   init.ring_size		= info->ring_size;
-   init.usec_timeout		= info->usec_timeout;
-
-   init.fb_bpp			= info->fb_bpp;
-   init.front_offset		= info->front_offset;
-   init.front_pitch		= info->front_pitch;
-   init.back_offset		= info->back_offset;
-   init.back_pitch		= info->back_pitch;
-
-   init.depth_bpp		= info->depth_bpp;
-   init.depth_offset		= info->depth_offset;
-   init.depth_pitch		= info->depth_pitch;
-   init.span_offset		= info->span_offset;
-
-   init.fb_offset		= info->fb_offset;
-   init.mmio_offset		= info->mmio_offset;
-   init.ring_offset		= info->ring_offset;
-   init.ring_rptr_offset	= info->ring_rptr_offset;
-   init.buffers_offset		= info->buffers_offset;
-   init.agp_textures_offset	= info->agp_textures_offset;
-
-   if ( ioctl( fd, DRM_IOCTL_R128_INIT, &init ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmR128CleanupCCE( int fd )
-{
-   drm_r128_init_t init;
-
-   memset( &init, 0, sizeof(drm_r128_init_t) );
-
-   init.func = R128_CLEANUP_CCE;
-
-   if ( ioctl( fd, DRM_IOCTL_R128_INIT, &init ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmR128StartCCE( int fd )
-{
-   if ( ioctl( fd, DRM_IOCTL_R128_CCE_START, NULL ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmR128StopCCE( int fd )
-{
-   drm_r128_cce_stop_t stop;
-   int ret, i = 0;
-
-   stop.flush = 1;
-   stop.idle = 1;
-
-   ret = ioctl( fd, DRM_IOCTL_R128_CCE_STOP, &stop );
-
-   if ( ret == 0 ) {
-      return 0;
-   } else if ( errno != EBUSY ) {
-      return -errno;
-   }
-
-   stop.flush = 0;
-
-   do {
-      ret = ioctl( fd, DRM_IOCTL_R128_CCE_STOP, &stop );
-   } while ( ret && errno == EBUSY && i++ < R128_IDLE_RETRY );
-
-   if ( ret == 0 ) {
-      return 0;
-   } else if ( errno != EBUSY ) {
-      return -errno;
-   }
-
-   stop.idle = 0;
-
-   if ( ioctl( fd, DRM_IOCTL_R128_CCE_STOP, &stop ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmR128ResetCCE( int fd )
-{
-   if ( ioctl( fd, DRM_IOCTL_R128_CCE_RESET, NULL ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmR128WaitForIdleCCE( int fd )
-{
-   int ret, i = 0;
-
-   do {
-      ret = ioctl( fd, DRM_IOCTL_R128_CCE_IDLE, NULL );
-   } while ( ret && errno == EBUSY && i++ < R128_IDLE_RETRY );
-
-   if ( ret == 0 ) {
-      return 0;
-   } else {
-      return -errno;
-   }
-}
-
-int drmR128EngineReset( int fd )
-{
-   if ( ioctl( fd, DRM_IOCTL_R128_RESET, NULL ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmR128FullScreen( int fd, int enable )
-{
-   drm_r128_fullscreen_t fs;
-
-   if ( enable ) {
-      fs.func = R128_INIT_FULLSCREEN;
-   } else {
-      fs.func = R128_CLEANUP_FULLSCREEN;
-   }
-
-   if ( ioctl( fd, DRM_IOCTL_R128_FULLSCREEN, &fs ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmR128SwapBuffers( int fd )
-{
-   if ( ioctl( fd, DRM_IOCTL_R128_SWAP, NULL ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmR128Clear( int fd, unsigned int flags,
-		  unsigned int clear_color, unsigned int clear_depth,
-		  unsigned int color_mask, unsigned int depth_mask )
-{
-   drm_r128_clear_t clear;
-
-   clear.flags = flags;
-   clear.clear_color = clear_color;
-   clear.clear_depth = clear_depth;
-   clear.color_mask = color_mask;
-   clear.depth_mask = depth_mask;
-
-   if ( ioctl( fd, DRM_IOCTL_R128_CLEAR, &clear ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmR128FlushVertexBuffer( int fd, int prim, int index,
-			      int count, int discard )
-{
-   drm_r128_vertex_t v;
-
-   v.prim = prim;
-   v.idx = index;
-   v.count = count;
-   v.discard = discard;
-
-   if ( ioctl( fd, DRM_IOCTL_R128_VERTEX, &v ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmR128FlushIndices( int fd, int prim, int index,
-			 int start, int end, int discard )
-{
-   drm_r128_indices_t elts;
-
-   elts.prim = prim;
-   elts.idx = index;
-   elts.start = start;
-   elts.end = end;
-   elts.discard = discard;
-
-   if ( ioctl( fd, DRM_IOCTL_R128_INDICES, &elts ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmR128TextureBlit( int fd, int index,
-			int offset, int pitch, int format,
-			int x, int y, int width, int height )
-{
-   drm_r128_blit_t blit;
-
-   blit.idx = index;
-   blit.offset = offset;
-   blit.pitch = pitch;
-   blit.format = format;
-   blit.x = x;
-   blit.y = y;
-   blit.width = width;
-   blit.height = height;
-
-   if ( ioctl( fd, DRM_IOCTL_R128_BLIT, &blit ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmR128WriteDepthSpan( int fd, int n, int x, int y,
-			   const unsigned int depth[],
-			   const unsigned char mask[] )
-{
-   drm_r128_depth_t d;
-
-   d.func = R128_WRITE_SPAN;
-   d.n = n;
-   d.x = &x;
-   d.y = &y;
-   d.buffer = (unsigned int *)depth;
-   d.mask = (unsigned char *)mask;
-
-   if ( ioctl( fd, DRM_IOCTL_R128_DEPTH, &d ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmR128WriteDepthPixels( int fd, int n,
-			     const int x[], const int y[],
-			     const unsigned int depth[],
-			     const unsigned char mask[] )
-{
-   drm_r128_depth_t d;
-
-   d.func = R128_WRITE_PIXELS;
-   d.n = n;
-   d.x = (int *)x;
-   d.y = (int *)y;
-   d.buffer = (unsigned int *)depth;
-   d.mask = (unsigned char *)mask;
-
-   if ( ioctl( fd, DRM_IOCTL_R128_DEPTH, &d ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmR128ReadDepthSpan( int fd, int n, int x, int y )
-{
-   drm_r128_depth_t d;
-
-   d.func = R128_READ_SPAN;
-   d.n = n;
-   d.x = &x;
-   d.y = &y;
-   d.buffer = NULL;
-   d.mask = NULL;
-
-   if ( ioctl( fd, DRM_IOCTL_R128_DEPTH, &d ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmR128ReadDepthPixels( int fd, int n,
-			    const int x[], const int y[] )
-{
-   drm_r128_depth_t d;
-
-   d.func = R128_READ_PIXELS;
-   d.n = n;
-   d.x = (int *)x;
-   d.y = (int *)y;
-   d.buffer = NULL;
-   d.mask = NULL;
-
-   if ( ioctl( fd, DRM_IOCTL_R128_DEPTH, &d ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmR128PolygonStipple( int fd, unsigned int *mask )
-{
-   drm_r128_stipple_t stipple;
-
-   stipple.mask = mask;
-
-   if ( ioctl( fd, DRM_IOCTL_R128_STIPPLE, &stipple ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmR128FlushIndirectBuffer( int fd, int index,
-				int start, int end, int discard )
-{
-   drm_r128_indirect_t ind;
-
-   ind.idx = index;
-   ind.start = start;
-   ind.end = end;
-   ind.discard = discard;
-
-   if ( ioctl( fd, DRM_IOCTL_R128_INDIRECT, &ind ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmRadeon.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmRadeon.c
deleted file mode 100644
index 68076e623..000000000
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmRadeon.c
+++ /dev/null
@@ -1,400 +0,0 @@
-/* xf86drmRadeon.c -- User-level interface to Radeon DRM device
- *
- * Copyright 2000 VA Linx Systems, Inc., Fremont, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- *   Gareth Hughes <gareth@valinux.com>
- *   Kevin E. Martin <martin@valinux.com>
- *
- */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmRadeon.c,v 1.4 2001/08/27 17:40:59 dawes Exp $ */
-
-#ifdef XFree86Server
-# include "xf86.h"
-# include "xf86_OSproc.h"
-# include "xf86_ansic.h"
-# define _DRM_MALLOC xalloc
-# define _DRM_FREE   xfree
-# ifndef XFree86LOADER
-#  include <sys/mman.h>
-# endif
-#else
-# include <stdio.h>
-# include <stdlib.h>
-# include <unistd.h>
-# include <string.h>
-# include <ctype.h>
-# include <fcntl.h>
-# include <errno.h>
-# include <signal.h>
-# include <sys/types.h>
-# include <sys/ioctl.h>
-# include <sys/mman.h>
-# include <sys/time.h>
-# ifdef DRM_USE_MALLOC
-#  define _DRM_MALLOC malloc
-#  define _DRM_FREE   free
-extern int xf86InstallSIGIOHandler(int fd, void (*f)(int, void *), void *);
-extern int xf86RemoveSIGIOHandler(int fd);
-# else
-#  include <X11/Xlibint.h>
-#  define _DRM_MALLOC Xmalloc
-#  define _DRM_FREE   Xfree
-# endif
-#endif
-
-/* Not all systems have MAP_FAILED defined */
-#ifndef MAP_FAILED
-#define MAP_FAILED ((void *)-1)
-#endif
-
-#ifdef __linux__
-#include <sys/sysmacros.h>	/* for makedev() */
-#endif
-#include "xf86drm.h"
-#include "xf86drmRadeon.h"
-#include "drm.h"
-
-#define RADEON_BUFFER_RETRY	32
-#define RADEON_IDLE_RETRY	16
-
-
-int drmRadeonInitCP( int fd, drmRadeonInit *info )
-{
-   drm_radeon_init_t init;
-
-   memset( &init, 0, sizeof(drm_radeon_init_t) );
-
-   init.func			= RADEON_INIT_CP;
-   init.sarea_priv_offset	= info->sarea_priv_offset;
-   init.is_pci			= info->is_pci;
-   init.cp_mode			= info->cp_mode;
-   init.agp_size		= info->agp_size;
-   init.ring_size		= info->ring_size;
-   init.usec_timeout		= info->usec_timeout;
-
-   init.fb_bpp			= info->fb_bpp;
-   init.front_offset		= info->front_offset;
-   init.front_pitch		= info->front_pitch;
-   init.back_offset		= info->back_offset;
-   init.back_pitch		= info->back_pitch;
-
-   init.depth_bpp		= info->depth_bpp;
-   init.depth_offset		= info->depth_offset;
-   init.depth_pitch		= info->depth_pitch;
-
-   init.fb_offset		= info->fb_offset;
-   init.mmio_offset		= info->mmio_offset;
-   init.ring_offset		= info->ring_offset;
-   init.ring_rptr_offset	= info->ring_rptr_offset;
-   init.buffers_offset		= info->buffers_offset;
-   init.agp_textures_offset	= info->agp_textures_offset;
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_CP_INIT, &init ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonCleanupCP( int fd )
-{
-   drm_radeon_init_t init;
-
-   memset( &init, 0, sizeof(drm_radeon_init_t) );
-
-   init.func = RADEON_CLEANUP_CP;
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_CP_INIT, &init ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonStartCP( int fd )
-{
-   if ( ioctl( fd, DRM_IOCTL_RADEON_CP_START, NULL ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonStopCP( int fd )
-{
-   drm_radeon_cp_stop_t stop;
-   int ret, i = 0;
-
-   stop.flush = 1;
-   stop.idle = 1;
-
-   ret = ioctl( fd, DRM_IOCTL_RADEON_CP_STOP, &stop );
-
-   if ( ret == 0 ) {
-      return 0;
-   } else if ( errno != EBUSY ) {
-      return -errno;
-   }
-
-   stop.flush = 0;
-
-   do {
-      ret = ioctl( fd, DRM_IOCTL_RADEON_CP_STOP, &stop );
-   } while ( ret && errno == EBUSY && i++ < RADEON_IDLE_RETRY );
-
-   if ( ret == 0 ) {
-      return 0;
-   } else if ( errno != EBUSY ) {
-      return -errno;
-   }
-
-   stop.idle = 0;
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_CP_STOP, &stop ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonResetCP( int fd )
-{
-   if ( ioctl( fd, DRM_IOCTL_RADEON_CP_RESET, NULL ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonWaitForIdleCP( int fd )
-{
-   int ret, i = 0;
-
-   do {
-      ret = ioctl( fd, DRM_IOCTL_RADEON_CP_IDLE, NULL );
-   } while ( ret && errno == EBUSY && i++ < RADEON_IDLE_RETRY );
-
-   if ( ret == 0 ) {
-      return 0;
-   } else {
-      return -errno;
-   }
-}
-
-int drmRadeonEngineReset( int fd )
-{
-   if ( ioctl( fd, DRM_IOCTL_RADEON_RESET, NULL ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonFullScreen( int fd, int enable )
-{
-   drm_radeon_fullscreen_t fs;
-
-   if ( enable ) {
-      fs.func = RADEON_INIT_FULLSCREEN;
-   } else {
-      fs.func = RADEON_CLEANUP_FULLSCREEN;
-   }
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_FULLSCREEN, &fs ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonSwapBuffers( int fd )
-{
-   if ( ioctl( fd, DRM_IOCTL_RADEON_SWAP, NULL ) ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonClear( int fd, unsigned int flags,
-		    unsigned int clear_color, unsigned int clear_depth,
-		    unsigned int color_mask, unsigned int stencil,
-		    void *b, int nbox )
-{
-   drm_radeon_clear_t clear;
-   drm_radeon_clear_rect_t depth_boxes[RADEON_NR_SAREA_CLIPRECTS];
-   drm_clip_rect_t *boxes = (drm_clip_rect_t *)b;
-   int i;
-
-   clear.flags = flags;
-   clear.clear_color = clear_color;
-   clear.clear_depth = clear_depth;
-   clear.color_mask = color_mask;
-   clear.depth_mask = stencil;	/* misnamed field in ioctl */
-   clear.depth_boxes = depth_boxes;
-
-   /* We can remove this when we do real depth clears, instead of
-    * rendering a rectangle into the depth buffer.  This prevents
-    * floating point calculations being done in the kernel.
-    */
-   for ( i = 0 ; i < nbox ; i++ ) {
-      depth_boxes[i].f[CLEAR_X1] = (float)boxes[i].x1;
-      depth_boxes[i].f[CLEAR_Y1] = (float)boxes[i].y1;
-      depth_boxes[i].f[CLEAR_X2] = (float)boxes[i].x2;
-      depth_boxes[i].f[CLEAR_Y2] = (float)boxes[i].y2;
-      depth_boxes[i].f[CLEAR_DEPTH] = (float)clear_depth;
-   }
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_CLEAR, &clear ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-
-/* Obsolete
- */
-int drmRadeonFlushVertexBuffer( int fd, int prim, int index,
-				int count, int discard )
-{
-   drm_radeon_vertex_t v;
-
-   v.prim = prim;
-   v.idx = index;
-   v.count = count;
-   v.discard = discard;
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_VERTEX, &v ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-/* Obsolete
- */
-int drmRadeonFlushIndices( int fd, int prim, int index,
-			   int start, int end, int discard )
-{
-   drm_radeon_indices_t elts;
-
-   elts.prim = prim;
-   elts.idx = index;
-   elts.start = start;
-   elts.end = end;
-   elts.discard = discard;
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_INDICES, &elts ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonFlushPrims( int fd, int index,
-			 int discard, int nr_states,
-			 drmRadeonState *state,
-			 int nr_prims,
-			 drmRadeonPrim *prim )
-{
-   drm_radeon_vertex2_t v;
-
-/*     assert(sizeof(drm_radeon_context_regs_t) == sizeof(drmRadeonState)); */
-/*     assert(sizeof(drm_radeon_prim_t) == sizeof(drmRadeonPrim)); */
-
-   v.idx = index;
-   v.discard = discard;
-   v.nr_states = nr_states;
-   v.state = (drm_radeon_state_t *)state;
-   v.nr_prims = nr_prims;
-   v.prim = (drm_radeon_prim_t *)prim;
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_VERTEX2, &v ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-
-
-int drmRadeonLoadTexture( int fd, int offset, int pitch, int format,
-			  int width, int height, drmRadeonTexImage *image )
-{
-   drm_radeon_texture_t tex;
-   drm_radeon_tex_image_t tmp;
-   int ret;
-
-   tex.offset = offset;
-   tex.pitch = pitch;
-   tex.format = format;
-   tex.width = width;
-   tex.height = height;
-   tex.image = &tmp;
-
-   /* This gets updated by the kernel when a multipass blit is needed.
-    */
-   memcpy( &tmp, image, sizeof(drm_radeon_tex_image_t) );
-
-   do {
-      ret = ioctl( fd, DRM_IOCTL_RADEON_TEXTURE, &tex );
-   } while ( ret && errno == EAGAIN );
-
-   if ( ret == 0 ) {
-      return 0;
-   } else {
-      return -errno;
-   }
-}
-
-int drmRadeonPolygonStipple( int fd, unsigned int *mask )
-{
-   drm_radeon_stipple_t stipple;
-
-   stipple.mask = mask;
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_STIPPLE, &stipple ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
-
-int drmRadeonFlushIndirectBuffer( int fd, int index,
-				  int start, int end, int discard )
-{
-   drm_radeon_indirect_t ind;
-
-   ind.idx = index;
-   ind.start = start;
-   ind.end = end;
-   ind.discard = discard;
-
-   if ( ioctl( fd, DRM_IOCTL_RADEON_INDIRECT, &ind ) < 0 ) {
-      return -errno;
-   } else {
-      return 0;
-   }
-}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmSiS.c b/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmSiS.c
deleted file mode 100644
index d59220540..000000000
--- a/xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmSiS.c
+++ /dev/null
@@ -1,60 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/xf86drmSiS.c,v 1.10 2001/12/15 00:59:12 dawes Exp $ */
-
-#ifdef XFree86Server
-# include "xf86.h"
-# include "xf86_OSproc.h"
-# include "xf86_ansic.h"
-# define _DRM_MALLOC xalloc
-# define _DRM_FREE   xfree
-# ifndef XFree86LOADER
-#  include <sys/mman.h>
-# endif
-#else
-# include <stdio.h>
-# include <stdlib.h>
-# include <unistd.h>
-# include <string.h>
-# include <ctype.h>
-# include <fcntl.h>
-# include <errno.h>
-# include <signal.h>
-# include <sys/types.h>
-# include <sys/ioctl.h>
-# include <sys/mman.h>
-# include <sys/time.h>
-# ifdef DRM_USE_MALLOC
-#  define _DRM_MALLOC malloc
-#  define _DRM_FREE   free
-extern int xf86InstallSIGIOHandler(int fd, void (*f)(int, void *), void *);
-extern int xf86RemoveSIGIOHandler(int fd);
-# else
-#  include <X11/Xlibint.h>
-#  define _DRM_MALLOC Xmalloc
-#  define _DRM_FREE   Xfree
-# endif
-#endif
-
-/* Not all systems have MAP_FAILED defined */
-#ifndef MAP_FAILED
-#define MAP_FAILED ((void *)-1)
-#endif
-
-#ifdef __linux__
-#include <sys/sysmacros.h>	/* for makedev() */
-#endif
-#include "xf86drm.h"
-#include "xf86drmSiS.h"
-#define CONFIG_DRM_SIS
-#include "drm.h"
-#undef CONFIG_DRM_SIS
-
-Bool drmSiSAgpInit(int driSubFD, int offset, int size)
-{
-   drm_sis_agp_t agp;
-      
-   agp.offset = offset;
-   agp.size = size;
-   ioctl(driSubFD, SIS_IOCTL_AGP_INIT, &agp);
-
-   return TRUE;
-}
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h
index 79dd58142..d116f3752 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/drm.h
@@ -99,15 +99,6 @@ typedef struct drm_tex_region {
 	unsigned int	age;
 } drm_tex_region_t;
 
-/* Seperate include files for the i810/mga/r128 specific structures */
-#include "mga_drm.h"
-#include "i810_drm.h"
-#include "r128_drm.h"
-#include "radeon_drm.h"
-#include "sis_drm.h"
-#include "i830_drm.h"
-#include "gamma_drm.h"
-
 typedef struct drm_version {
 	int    version_major;	  /* Major version			    */
 	int    version_minor;	  /* Minor version			    */
@@ -428,92 +419,8 @@ typedef struct drm_scatter_gather {
 #define DRM_IOCTL_SG_ALLOC		DRM_IOW( 0x38, drm_scatter_gather_t)
 #define DRM_IOCTL_SG_FREE		DRM_IOW( 0x39, drm_scatter_gather_t)
 
-/* MGA specific ioctls */
-#define DRM_IOCTL_MGA_INIT		DRM_IOW( 0x40, drm_mga_init_t)
-#define DRM_IOCTL_MGA_FLUSH		DRM_IOW( 0x41, drm_lock_t)
-#define DRM_IOCTL_MGA_RESET		DRM_IO(  0x42)
-#define DRM_IOCTL_MGA_SWAP		DRM_IO(  0x43)
-#define DRM_IOCTL_MGA_CLEAR		DRM_IOW( 0x44, drm_mga_clear_t)
-#define DRM_IOCTL_MGA_VERTEX		DRM_IOW( 0x45, drm_mga_vertex_t)
-#define DRM_IOCTL_MGA_INDICES		DRM_IOW( 0x46, drm_mga_indices_t)
-#define DRM_IOCTL_MGA_ILOAD		DRM_IOW( 0x47, drm_mga_iload_t)
-#define DRM_IOCTL_MGA_BLIT		DRM_IOW( 0x48, drm_mga_blit_t)
-
-/* i810 specific ioctls */
-#define DRM_IOCTL_I810_INIT		DRM_IOW( 0x40, drm_i810_init_t)
-#define DRM_IOCTL_I810_VERTEX		DRM_IOW( 0x41, drm_i810_vertex_t)
-#define DRM_IOCTL_I810_CLEAR		DRM_IOW( 0x42, drm_i810_clear_t)
-#define DRM_IOCTL_I810_FLUSH		DRM_IO(  0x43)
-#define DRM_IOCTL_I810_GETAGE		DRM_IO(  0x44)
-#define DRM_IOCTL_I810_GETBUF		DRM_IOWR(0x45, drm_i810_dma_t)
-#define DRM_IOCTL_I810_SWAP		DRM_IO(  0x46)
-#define DRM_IOCTL_I810_COPY		DRM_IOW( 0x47, drm_i810_copy_t)
-#define DRM_IOCTL_I810_DOCOPY		DRM_IO(  0x48)
-#define DRM_IOCTL_I810_OV0INFO		DRM_IOR( 0x49, drm_i810_overlay_t)
-#define DRM_IOCTL_I810_FSTATUS		DRM_IO ( 0x4a)
-#define DRM_IOCTL_I810_OV0FLIP		DRM_IO ( 0x4b)
-#define DRM_IOCTL_I810_MC		DRM_IOW( 0x4c, drm_i810_mc_t)
-#define DRM_IOCTL_I810_RSTATUS		DRM_IO ( 0x4d )
-
-
-/* Rage 128 specific ioctls */
-#define DRM_IOCTL_R128_INIT		DRM_IOW( 0x40, drm_r128_init_t)
-#define DRM_IOCTL_R128_CCE_START	DRM_IO(  0x41)
-#define DRM_IOCTL_R128_CCE_STOP		DRM_IOW( 0x42, drm_r128_cce_stop_t)
-#define DRM_IOCTL_R128_CCE_RESET	DRM_IO(  0x43)
-#define DRM_IOCTL_R128_CCE_IDLE		DRM_IO(  0x44)
-#define DRM_IOCTL_R128_RESET		DRM_IO(  0x46)
-#define DRM_IOCTL_R128_SWAP		DRM_IO(  0x47)
-#define DRM_IOCTL_R128_CLEAR		DRM_IOW( 0x48, drm_r128_clear_t)
-#define DRM_IOCTL_R128_VERTEX		DRM_IOW( 0x49, drm_r128_vertex_t)
-#define DRM_IOCTL_R128_INDICES		DRM_IOW( 0x4a, drm_r128_indices_t)
-#define DRM_IOCTL_R128_BLIT		DRM_IOW( 0x4b, drm_r128_blit_t)
-#define DRM_IOCTL_R128_DEPTH		DRM_IOW( 0x4c, drm_r128_depth_t)
-#define DRM_IOCTL_R128_STIPPLE		DRM_IOW( 0x4d, drm_r128_stipple_t)
-#define DRM_IOCTL_R128_INDIRECT		DRM_IOWR(0x4f, drm_r128_indirect_t)
-#define DRM_IOCTL_R128_FULLSCREEN	DRM_IOW( 0x50, drm_r128_fullscreen_t)
-#define DRM_IOCTL_R128_CLEAR2		DRM_IOW( 0x51, drm_r128_clear2_t)
-
-/* Radeon specific ioctls */
-#define DRM_IOCTL_RADEON_CP_INIT	DRM_IOW( 0x40, drm_radeon_init_t)
-#define DRM_IOCTL_RADEON_CP_START	DRM_IO(  0x41)
-#define DRM_IOCTL_RADEON_CP_STOP	DRM_IOW( 0x42, drm_radeon_cp_stop_t)
-#define DRM_IOCTL_RADEON_CP_RESET	DRM_IO(  0x43)
-#define DRM_IOCTL_RADEON_CP_IDLE	DRM_IO(  0x44)
-#define DRM_IOCTL_RADEON_RESET		DRM_IO(  0x45)
-#define DRM_IOCTL_RADEON_FULLSCREEN	DRM_IOW( 0x46, drm_radeon_fullscreen_t)
-#define DRM_IOCTL_RADEON_SWAP		DRM_IO(  0x47)
-#define DRM_IOCTL_RADEON_CLEAR		DRM_IOW( 0x48, drm_radeon_clear_t)
-#define DRM_IOCTL_RADEON_VERTEX		DRM_IOW( 0x49, drm_radeon_vertex_t)
-#define DRM_IOCTL_RADEON_INDICES	DRM_IOW( 0x4a, drm_radeon_indices_t)
-#define DRM_IOCTL_RADEON_STIPPLE	DRM_IOW( 0x4c, drm_radeon_stipple_t)
-#define DRM_IOCTL_RADEON_INDIRECT	DRM_IOWR(0x4d, drm_radeon_indirect_t)
-#define DRM_IOCTL_RADEON_TEXTURE	DRM_IOWR(0x4e, drm_radeon_texture_t)
-#define DRM_IOCTL_RADEON_VERTEX2	DRM_IOW( 0x4f, drm_radeon_vertex_t)
-
-/* Gamma specific ioctls */
-#define DRM_IOCTL_GAMMA_INIT		DRM_IOW( 0x40, drm_gamma_init_t)
-#define DRM_IOCTL_GAMMA_COPY		DRM_IOW( 0x41, drm_gamma_copy_t)
-
-/* SiS specific ioctls */
-#define SIS_IOCTL_FB_ALLOC		DRM_IOWR(0x44, drm_sis_mem_t)
-#define SIS_IOCTL_FB_FREE		DRM_IOW( 0x45, drm_sis_mem_t)
-#define SIS_IOCTL_AGP_INIT		DRM_IOWR(0x53, drm_sis_agp_t)
-#define SIS_IOCTL_AGP_ALLOC		DRM_IOWR(0x54, drm_sis_mem_t)
-#define SIS_IOCTL_AGP_FREE		DRM_IOW( 0x55, drm_sis_mem_t)
-#define SIS_IOCTL_FLIP			DRM_IOW( 0x48, drm_sis_flip_t)
-#define SIS_IOCTL_FLIP_INIT		DRM_IO(  0x49)
-#define SIS_IOCTL_FLIP_FINAL		DRM_IO(  0x50)
-
-/* I830 specific ioctls */
-#define DRM_IOCTL_I830_INIT		DRM_IOW( 0x40, drm_i830_init_t)
-#define DRM_IOCTL_I830_VERTEX		DRM_IOW( 0x41, drm_i830_vertex_t)
-#define DRM_IOCTL_I830_CLEAR		DRM_IOW( 0x42, drm_i830_clear_t)
-#define DRM_IOCTL_I830_FLUSH		DRM_IO ( 0x43)
-#define DRM_IOCTL_I830_GETAGE		DRM_IO ( 0x44)
-#define DRM_IOCTL_I830_GETBUF		DRM_IOWR(0x45, drm_i830_dma_t)
-#define DRM_IOCTL_I830_SWAP		DRM_IO ( 0x46)
-#define DRM_IOCTL_I830_COPY		DRM_IOW( 0x47, drm_i830_copy_t)
-#define DRM_IOCTL_I830_DOCOPY		DRM_IO ( 0x48)
+/* Device specfic ioctls should only be in their respective headers
+ * The device specific ioctl range is 0x40 to 0x79.                  */
+#define DRM_COMMAND_BASE                0x40
 
 #endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h
index 692d107b2..d7859bbe7 100644
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h
+++ b/xc/programs/Xserver/hw/xfree86/os-support/xf86drm.h
@@ -422,6 +422,7 @@ extern int           drmAvailable(void);
 extern int           drmOpen(const char *name, const char *busid);
 extern int           drmClose(int fd);
 extern drmVersionPtr drmGetVersion(int fd);
+extern drmVersionPtr drmGetLibVersion(int fd);
 extern void          drmFreeVersion(drmVersionPtr);
 extern int           drmGetMagic(int fd, drmMagicPtr magic);
 extern char          *drmGetBusid(int fd);
@@ -435,7 +436,13 @@ extern int           drmGetClient(int fd, int idx, int *auth, int *pid,
 				  int *uid, unsigned long *magic,
 				  unsigned long *iocs);
 extern int           drmGetStats(int fd, drmStatsT *stats);
-
+extern int           drmCommandNone(int fd, unsigned long drmCommandIndex);
+extern int           drmCommandRead(int fd, unsigned long drmCommandIndex,
+                                    void *data, unsigned long size);
+extern int           drmCommandWrite(int fd, unsigned long drmCommandIndex,
+                                     void *data, unsigned long size);
+extern int           drmCommandWriteRead(int fd, unsigned long drmCommandIndex,
+                                         void *data, unsigned long size);
 
 /* General user-level programmer's API: X server (root) only  */
 extern void          drmFreeBusid(const char *busid);
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmCompat.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86drmCompat.h
new file mode 100644
index 000000000..125c6d6fa
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/os-support/xf86drmCompat.h
@@ -0,0 +1,255 @@
+/* xf86drmCompat.h -- OS-independent header for old device specific DRM user-level
+ *                    library interface
+ *
+ * Copyright 2000 VA Linux Systems, Inc., Fremont, California.
+ * Copyright 2002 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *   Gareth Hughes <gareth@valinux.com>
+ *   Kevin E. Martin <martin@valinux.com>
+ *   Keith Whitwell <keith_whitwell@yahoo.com>
+ *
+ * Backwards compatability modules broken out by:
+ *   Jens Owen <jens@tungstengraphics.com>
+ *
+ * $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86drmRadeon.h,v 1.6 2001/04/16 15:02:13 tsi Exp $
+ *
+ */
+
+#ifndef _XF86DRI_COMPAT_H_
+#define _XF86DRI_COMPAT_H_
+
+/* WARNING: Do not change, or add, anything to this file.  It is only provided
+ * for binary backwards compatability with the old driver specific DRM 
+ * extensions used before XFree86 4.3.
+ */
+
+/* I810 */
+
+typedef struct {
+   unsigned int start; 
+   unsigned int end; 
+   unsigned int size;
+   unsigned int mmio_offset;
+   unsigned int buffers_offset;
+   int sarea_off;
+
+   unsigned int front_offset;
+   unsigned int back_offset;
+   unsigned int depth_offset;
+   unsigned int overlay_offset;
+   unsigned int overlay_physical;
+   unsigned int w;
+   unsigned int h;
+   unsigned int pitch;
+   unsigned int pitch_bits;
+} drmCompatI810Init;
+
+extern Bool drmI810CleanupDma(int driSubFD);
+extern Bool drmI810InitDma(int driSubFD, drmCompatI810Init *info );
+
+/* Mga */
+
+typedef struct {
+   unsigned long sarea_priv_offset;
+   int chipset;
+   int sgram;
+   unsigned int maccess;
+   unsigned int fb_cpp;
+   unsigned int front_offset, front_pitch;
+   unsigned int back_offset, back_pitch;
+   unsigned int depth_cpp;
+   unsigned int depth_offset, depth_pitch;
+   unsigned int texture_offset[2];
+   unsigned int texture_size[2];
+   unsigned long fb_offset;
+   unsigned long mmio_offset;
+   unsigned long status_offset;
+   unsigned long warp_offset;
+   unsigned long primary_offset;
+   unsigned long buffers_offset;
+} drmCompatMGAInit;
+
+extern int drmMGAInitDMA( int fd, drmCompatMGAInit *info );
+extern int drmMGACleanupDMA( int fd );
+extern int drmMGAFlushDMA( int fd, drmLockFlags flags );
+extern int drmMGAEngineReset( int fd );
+extern int drmMGAFullScreen( int fd, int enable );
+extern int drmMGASwapBuffers( int fd );
+extern int drmMGAClear( int fd, unsigned int flags,
+			unsigned int clear_color, unsigned int clear_depth,
+			unsigned int color_mask, unsigned int depth_mask );
+extern int drmMGAFlushVertexBuffer( int fd, int indx, int used, int discard );
+extern int drmMGAFlushIndices( int fd, int indx,
+			       int start, int end, int discard );
+extern int drmMGATextureLoad( int fd, int indx,
+			      unsigned int dstorg, unsigned int length );
+extern int drmMGAAgpBlit( int fd, unsigned int planemask,
+			  unsigned int src, int src_pitch,
+			  unsigned int dst, int dst_pitch,
+			  int delta_sx, int delta_sy,
+			  int delta_dx, int delta_dy,
+			  int height, int ydir );
+
+/* R128 */
+
+typedef struct {
+   unsigned long sarea_priv_offset;
+   int is_pci;
+   int cce_mode;
+   int cce_secure;
+   int ring_size;
+   int usec_timeout;
+   unsigned int fb_bpp;
+   unsigned int front_offset, front_pitch;
+   unsigned int back_offset, back_pitch;
+   unsigned int depth_bpp;
+   unsigned int depth_offset, depth_pitch;
+   unsigned int span_offset;
+   unsigned long fb_offset;
+   unsigned long mmio_offset;
+   unsigned long ring_offset;
+   unsigned long ring_rptr_offset;
+   unsigned long buffers_offset;
+   unsigned long agp_textures_offset;
+} drmCompatR128Init;
+
+extern int drmR128InitCCE( int fd, drmCompatR128Init *info );
+extern int drmR128CleanupCCE( int fd );
+extern int drmR128StartCCE( int fd );
+extern int drmR128StopCCE( int fd );
+extern int drmR128ResetCCE( int fd );
+extern int drmR128WaitForIdleCCE( int fd );
+extern int drmR128EngineReset( int fd );
+extern int drmR128FullScreen( int fd, int enable );
+extern int drmR128SwapBuffers( int fd );
+extern int drmR128Clear( int fd, unsigned int flags,
+			 unsigned int clear_color, unsigned int clear_depth,
+			 unsigned int color_mask, unsigned int depth_mask );
+extern int drmR128FlushVertexBuffer( int fd, int prim, int indx,
+				     int count, int discard );
+extern int drmR128FlushIndices( int fd, int prim, int indx,
+				int start, int end, int discard );
+extern int drmR128TextureBlit( int fd, int indx,
+			       int offset, int pitch, int format,
+			       int x, int y, int width, int height );
+extern int drmR128WriteDepthSpan( int fd, int n, int x, int y,
+				  const unsigned int depth[],
+				  const unsigned char mask[] );
+extern int drmR128WriteDepthPixels( int fd, int n,
+				    const int x[], const int y[],
+				    const unsigned int depth[],
+				    const unsigned char mask[] );
+extern int drmR128ReadDepthSpan( int fd, int n, int x, int y );
+extern int drmR128ReadDepthPixels( int fd, int n,
+				   const int x[], const int y[] );
+extern int drmR128PolygonStipple( int fd, unsigned int *mask );
+extern int drmR128FlushIndirectBuffer( int fd, int indx,
+				       int start, int end, int discard );
+
+/* Radeon */
+
+typedef struct {
+   unsigned long sarea_priv_offset;
+   int is_pci;
+   int cp_mode;
+   int agp_size;
+   int ring_size;
+   int usec_timeout;
+
+   unsigned int fb_bpp;
+   unsigned int front_offset, front_pitch;
+   unsigned int back_offset, back_pitch;
+   unsigned int depth_bpp;
+   unsigned int depth_offset, depth_pitch;
+
+   unsigned long fb_offset;
+   unsigned long mmio_offset;
+   unsigned long ring_offset;
+   unsigned long ring_rptr_offset;
+   unsigned long buffers_offset;
+   unsigned long agp_textures_offset;
+} drmCompatRadeonInit;
+
+typedef struct {
+   unsigned int x;
+   unsigned int y;
+   unsigned int width;
+   unsigned int height;
+   void *data;
+} drmCompatRadeonTexImage;
+
+extern int drmRadeonInitCP( int fd, drmCompatRadeonInit *info );
+extern int drmRadeonCleanupCP( int fd );
+extern int drmRadeonStartCP( int fd );
+extern int drmRadeonStopCP( int fd );
+extern int drmRadeonResetCP( int fd );
+extern int drmRadeonWaitForIdleCP( int fd );
+extern int drmRadeonEngineReset( int fd );
+extern int drmRadeonFullScreen( int fd, int enable );
+extern int drmRadeonSwapBuffers( int fd );
+extern int drmRadeonClear( int fd, unsigned int flags,
+			   unsigned int clear_color, unsigned int clear_depth,
+			   unsigned int color_mask, unsigned int stencil,
+			   void *boxes, int nbox );
+extern int drmRadeonFlushVertexBuffer( int fd, int prim, int indx,
+				       int count, int discard );
+extern int drmRadeonFlushIndices( int fd, int prim, int indx,
+				  int start, int end, int discard );
+extern int drmRadeonLoadTexture( int fd, int offset, int pitch, int format,
+				 int width, int height,
+				 drmCompatRadeonTexImage *image );
+extern int drmRadeonPolygonStipple( int fd, unsigned int *mask );
+extern int drmRadeonFlushIndirectBuffer( int fd, int indx,
+					 int start, int end, int discard );
+
+/* SiS */
+extern Bool drmSiSAgpInit(int driSubFD, int offset, int size);
+
+/* I830 */
+typedef struct {
+   unsigned int start;
+   unsigned int end;
+   unsigned int size;
+   unsigned int mmio_offset;
+   unsigned int buffers_offset;
+   int sarea_off;
+   unsigned int front_offset;
+   unsigned int back_offset;
+   unsigned int depth_offset;
+   unsigned int w;
+   unsigned int h;
+   unsigned int pitch;
+   unsigned int pitch_bits;
+   unsigned int cpp;
+} drmCompatI830Init;
+
+extern Bool drmI830CleanupDma(int driSubFD);
+extern Bool drmI830InitDma(int driSubFD, drmCompatI830Init *info );
+
+#endif
+
+/* WARNING: Do not change, or add, anything to this file.  It is only provided
+ * for binary backwards compatability with the old driver specific DRM 
+ * extensions used before XFree86 4.3.
+ */
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmGamma.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86drmGamma.h
deleted file mode 100644
index 1196e95a5..000000000
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmGamma.h
+++ /dev/null
@@ -1,22 +0,0 @@
-#ifndef __XF86DRI_GAMMA_H__
-#define __XF86DRI_GAMMA_H__
-
-/*
- * WARNING: If you change any of these defines, make sure to change
- * the kernel include file as well (gamma_drm.h)
- */
-
-typedef struct {
-   int sarea_priv_offset;
-   int pcimode;
-   unsigned int mmio0;
-   unsigned int mmio1;
-   unsigned int mmio2;
-   unsigned int mmio3;
-   unsigned int buffers_offset;
-} drmGAMMAInit;
-
-extern int drmGAMMAInitDMA( int fd, drmGAMMAInit *info );
-extern int drmGAMMACleanupDMA( int fd );
-
-#endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmI810.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86drmI810.h
deleted file mode 100644
index 0fba844ba..000000000
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmI810.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86drmI810.h,v 3.4 2001/09/27 08:25:04 alanh Exp $ */
-
-/* WARNING: If you change any of these defines, make sure to change
- * the kernel include file as well (i810_drm.h)
- */
-
-#ifndef _XF86DRI_I810_H_
-#define _XF86DRI_I810_H_
-
-#ifndef _I810_DEFINES_
-#define _I810_DEFINES_
-#define I810_USE_BATCH 1
-
-#define I810_DMA_BUF_ORDER     12
-#define I810_DMA_BUF_SZ        (1<<I810_DMA_BUF_ORDER)
-#define I810_DMA_BUF_NR        256
-
-#define I810_NR_SAREA_CLIPRECTS 8
-
-/* Each region is a minimum of 64k, and there are at most 64 of them.
- */
-#define I810_NR_TEX_REGIONS 64
-#define I810_LOG_MIN_TEX_REGION_SIZE 16
-#endif
-
-typedef struct _drmI810Init {
-   unsigned int start; 
-   unsigned int end; 
-   unsigned int size;
-   unsigned int mmio_offset;
-   unsigned int buffers_offset;
-   int sarea_off;
-
-   unsigned int front_offset;
-   unsigned int back_offset;
-   unsigned int depth_offset;
-   unsigned int overlay_offset;
-   unsigned int overlay_physical;
-   unsigned int w;
-   unsigned int h;
-   unsigned int pitch;
-   unsigned int pitch_bits;
-} drmI810Init;
-
-
-Bool drmI810CleanupDma(int driSubFD);
-Bool drmI810InitDma(int driSubFD, drmI810Init *info );
-
-#endif
diff --git a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmMga.h b/xc/programs/Xserver/hw/xfree86/os-support/xf86drmMga.h
deleted file mode 100644
index 3eb47605d..000000000
--- a/xc/programs/Xserver/hw/xfree86/os-support/xf86drmMga.h
+++ /dev/null
@@ -1,71 +0,0 @@
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/xf86drmMga.h,v 3.6 2001/04/16 15:02:13 tsi Exp $ */
-
-#ifndef __XF86DRI_MGA_H__
-#define __XF86DRI_MGA_H__
-
-/*
- * WARNING: If you change any of these defines, make sure to change
- * the kernel include file as well (mga_drm.h)
- */
-
-typedef struct {
-   int installed;
-   unsigned long phys_addr;
-   int size;
-} drmMGAWarpIndex;
-
-typedef struct {
-   unsigned long sarea_priv_offset;
-
-   int chipset;
-   int sgram;
-
-   unsigned int maccess;
-
-   unsigned int fb_cpp;
-   unsigned int front_offset, front_pitch;
-   unsigned int back_offset, back_pitch;
-
-   unsigned int depth_cpp;
-   unsigned int depth_offset, depth_pitch;
-
-   unsigned int texture_offset[2];
-   unsigned int texture_size[2];
-
-   unsigned long fb_offset;
-   unsigned long mmio_offset;
-   unsigned long status_offset;
-   unsigned long warp_offset;
-   unsigned long primary_offset;
-   unsigned long buffers_offset;
-} drmMGAInit;
-
-extern int drmMGAInitDMA( int fd, drmMGAInit *info );
-extern int drmMGACleanupDMA( int fd );
-
-extern int drmMGAFlushDMA( int fd, drmLockFlags flags );
-
-extern int drmMGAEngineReset( int fd );
-
-extern int drmMGAFullScreen( int fd, int enable );
-
-extern int drmMGASwapBuffers( int fd );
-extern int drmMGAClear( int fd, unsigned int flags,
-			unsigned int clear_color, unsigned int clear_depth,
-			unsigned int color_mask, unsigned int depth_mask );
-
-extern int drmMGAFlushVertexBuffer( int fd, int indx, int used, int discard );
-extern int drmMGAFlushIndices( int fd, int indx,
-			       int start, int end, int discard );
-
-extern int drmMGATextureLoad( int fd, int indx,
-			      unsigned int dstorg, unsigned int length );
-
-extern int drmMGAAgpBlit( int fd, unsigned int planemask,
-			  unsigned int src, int src_pitch,
-			  unsigned int dst, int dst_pitch,
-			  int delta_sx, int delta_sy,
-			  int delta_dx, int delta_dy,
-			  int height, int ydir );
-
-#endif