Initialize the PCI space for the multiple chips.tdfx-2-0-20000222-freeze

4 files changed, 723 insertions, 5 deletions

diff --git a/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_accel.c b/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_accel.c
index ceff6b95e..b09a79a7b 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_accel.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_accel.c
@@ -623,8 +623,8 @@ TDFXNonTEGlyphRenderer(ScrnInfoPtr pScrn, int x, int y, int n,
 	  SSTCP_SRCXY|SSTCP_COLORFORE|SSTCP_COMMAND);
   TDFXWriteLong(pTDFX, SST_2D_CLIP1MIN, ((pbox->y1&0x1FFF)<<16) |
 		(pbox->x1&0x1FFF));
-  TDFXWriteLong(pTDFX, SST_2D_CLIP1MAX, (((pbox->y2+1)&0x1FFF)<<16) |
-		((pbox->x2+1)&0x1FFF));
+  TDFXWriteLong(pTDFX, SST_2D_CLIP1MAX, ((pbox->y2&0x1FFF)<<16) |
+		(pbox->x2&0x1FFF));
   TDFXWriteLong(pTDFX, SST_2D_SRCFORMAT, SST_2D_PIXFMT_1BPP |
 		SST_2D_SOURCE_PACKING_DWORD);
   TDFXWriteLong(pTDFX, SST_2D_SRCXY, 0);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c
index dfdf2d368..ced6256d1 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c
@@ -515,8 +515,6 @@ TDFXCountRam(ScrnInfoPtr pScrn) {
       partSize=1<<((dramInit0_strap&0x38000000)>>28);
       banks=((dramInit0_strap&BIT(30))==0) ? 2 : 4;
       memSize=nChips*partSize*banks;
-      ErrorF("reg=%x nChips=%d partSize=%d banks=%d memSize=%d\n", 
-	     dramInit0_strap, nChips, partSize, banks, memSize);
     }
     TDFXTRACEREG("dramInit0 = %x dramInit1 = %x\n", dramInit0_strap, dramInit1_strap);
     TDFXTRACEREG("MemConfig %d chips %d size %d total\n", nChips, partSize, memSize);
@@ -548,6 +546,29 @@ TDFXProbeDDC(ScrnInfoPtr pScrn, int index)
     }
 }
 
+static int TDFXCfgToSize(int cfg)
+{
+  if (cfg<4) return 0x8000000<<cfg;
+  return 0x4000000>>(cfg-4);
+}
+
+static int TDFXSizeToCfg(int size)
+{
+  switch (size) {
+  case 0x40000000: return 3;
+  case 0x20000000: return 2;
+  case 0x10000000: return 1;
+  case 0x08000000: return 0;
+  case 0x04000000: return 4;
+  case 0x02000000: return 5;
+  case 0x01000000: return 6;
+  case 0x00800000: return 7;
+  case 0x00400000: return 8;
+  default:
+    return -1;
+  }
+}
+
 static void
 TDFXFindChips(ScrnInfoPtr pScrn, pciVideoPtr match)
 {
@@ -570,6 +591,39 @@ TDFXFindChips(ScrnInfoPtr pScrn, pciVideoPtr match)
   }
 }
 
+static void
+TDFXInitChips(ScrnInfoPtr pScrn)
+{
+  TDFXPtr pTDFX;
+  int i, cfgbits, initbits;
+  int mem0base, mem1base, mem0size, mem0bits, mem1size, mem1bits;
+
+  pTDFX=TDFXPTR(pScrn);
+  if (pTDFX->numChips==1) return;
+  /* Chip0 allocates all the space for all the boards. We have to
+     reassign it correctly. */
+  cfgbits=pciReadLong(pTDFX->PciTag[0], CFG_PCI_DECODE);
+  mem0base=pciReadLong(pTDFX->PciTag[0], CFG_MEM0BASE);
+  mem1base=pciReadLong(pTDFX->PciTag[0], CFG_MEM1BASE);
+  mem0size=32*1024*1024; /* Registers are always 32MB */
+  mem1size=pScrn->videoRam*1024*4; /* Linear mapping is 4x memory */
+  mem0bits=TDFXSizeToCfg(mem0size);
+  mem1bits=TDFXSizeToCfg(mem1size)<<4;
+  cfgbits=(cfgbits&~(0xFF))|mem0bits|mem1bits;
+  for (i=0; i<pTDFX->numChips; i++) {
+    initbits=pciReadLong(pTDFX->PciTag[i], CFG_INIT_ENABLE);
+    initbits|=BIT(10);
+    pciWriteLong(pTDFX->PciTag[i], CFG_INIT_ENABLE, initbits);
+    pciWriteLong(pTDFX->PciTag[i], CFG_MEM0BASE, 0xFFFFFFFF);
+    pciWriteLong(pTDFX->PciTag[i], CFG_MEM0BASE, mem0base+i*mem0size);
+    pciWriteLong(pTDFX->PciTag[i], CFG_MEM1BASE, 0xFFFFFFFF);
+    pciWriteLong(pTDFX->PciTag[i], CFG_MEM1BASE, mem1base+i*mem1size);
+    pciWriteLong(pTDFX->PciTag[i], CFG_PCI_DECODE, cfgbits);
+    initbits&=~BIT(10);
+    pciWriteLong(pTDFX->PciTag[i], CFG_INIT_ENABLE, initbits);
+  }
+}
+
 /*
  * TDFXPreInit --
  *
@@ -771,6 +825,8 @@ TDFXPreInit(ScrnInfoPtr pScrn, int flags)
     from = X_CONFIG;
   }
 
+  TDFXInitChips(pScrn);
+
   /* Multiple by two because tiled access requires more address space */
   pTDFX->FbMapSize = pScrn->videoRam*1024*2;
   xf86DrvMsg(pScrn->scrnIndex, from, "VideoRAM: %d kByte Mapping %d kByte\n",
@@ -1653,7 +1709,8 @@ TDFXScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) {
 
   tmp=pTDFX->numChips;
   pTDFX->numChips=1;
-  /* TDFXSetupSLI(pScrn, (pTDFX->numChips>1)?TRUE:FALSE, 0); */
+  if (pTDFX->numChips>1)
+    TDFXSetupSLI(pScrn, TRUE, 0);
   pTDFX->numChips=tmp;
 
   allocateMemory(pScrn);
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_sli.c b/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_sli.c
new file mode 100644
index 000000000..99bdf9075
--- /dev/null
+++ b/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_sli.c
@@ -0,0 +1,659 @@
+
+#include "xf86.h"
+#include "xf86_ansic.h"
+#include "xf86_OSproc.h"
+#include "xf86Pci.h"
+#include "tdfx.h"
+
+#define AACLKOUTDEL 0x2
+#define CFGSWAPALGORITHM 0x1
+
+/* #define RD_ABORT_ERROR */
+#define H3VDD
+
+Bool TDFXSetupSLI(ScrnInfoPtr pScrn, Bool sliEnable, int aaSamples)
+{
+  TDFXPtr pTDFX;
+  int i, sliLines, sliLinesLog2, nChipsLog2, v;
+  int sli_renderMask, sli_compareMask, sli_scanMask;
+  int sliAnalog;
+
+  pTDFX=TDFXPTR(pScrn);
+  if (pScrn->depth == 24 || pScrn->depth==32) {
+    if ((aaSamples == 4) && (pTDFX->numChips>1)) {
+      pTDFX->pixelFormat=GR_PIXFMT_AA_4_ARGB_8888;
+    } else if (aaSamples >= 2) {
+      pTDFX->pixelFormat=GR_PIXFMT_AA_2_ARGB_8888;
+    } else {
+      pTDFX->pixelFormat=GR_PIXFMT_ARGB_8888;
+    }
+  } else if (pScrn->depth == 16) {
+    if ((aaSamples == 4) && (pTDFX->numChips>1)) {
+      pTDFX->pixelFormat=GR_PIXFMT_AA_4_RGB_565;
+    } else if (aaSamples >= 2) {
+      pTDFX->pixelFormat=GR_PIXFMT_AA_2_RGB_565;
+    } else {
+      pTDFX->pixelFormat=GR_PIXFMT_RGB_565;
+    }
+  } else if (pScrn->depth == 8) {
+    pTDFX->pixelFormat=GR_PIXFMT_I_8;
+  }
+
+  if (pScrn->virtualY>768) sliLinesLog2=5;
+  else sliLinesLog2=4;
+  sliLines=1<<sliLinesLog2;
+  if (pScrn->virtualY*pScrn->virtualX>1600*1024) sliAnalog=1;
+  else sliAnalog=0;
+  /* XXX We need to avoid SLI in double scan modes somehow */
+
+  switch (pTDFX->numChips) {
+  case 1:
+    nChipsLog2=0;
+    break;
+  case 2:
+    nChipsLog2=1;
+    break;
+  case 4:
+    nChipsLog2=2;
+    break;
+  default:
+    return FALSE;
+    /* XXX Huh? Unsupported configuration */
+  }
+
+  for (i=0; i<pTDFX->numChips; i++) {
+    /* Do we want to set these differently for a VIA board? */
+    v=pTDFX->readChipLong(pTDFX, i, PCIINIT0);
+    v=(v&~(SST_PCI_RETRY_INTERVAL|SST_PCI_FORCE_FB_HIGH)) |
+		     SST_PCI_READ_WS | SST_PCI_WRITE_WS |
+		     SST_PCI_DISABLE_IO | SST_PCI_DISABLE_MEM |
+		     (5<<SST_PCI_RETRY_INTERVAL_SHIFT);
+    pTDFX->writeChipLong(pTDFX, i, PCIINIT0,
+			 (v&~(SST_PCI_RETRY_INTERVAL|SST_PCI_FORCE_FB_HIGH)) |
+			 SST_PCI_READ_WS | SST_PCI_WRITE_WS |
+			 SST_PCI_DISABLE_IO | SST_PCI_DISABLE_MEM |
+			 (5<<SST_PCI_RETRY_INTERVAL_SHIFT));
+    pTDFX->readChipLong(pTDFX, i, TMUGBEINIT);
+    pTDFX->writeChipLong(pTDFX, i, TMUGBEINIT, 
+			 (v&~(SST_AA_CLK_DELAY | SST_AA_CLK_INVERT)) |
+			 (AACLKOUTDEL<<SST_AA_CLK_DELAY_SHIFT) | 
+			 SST_AA_CLK_INVERT);
+    if (pTDFX->numChips>1) {
+      v=pciReadLong(pTDFX->PciTag[i], CFG_INIT_ENABLE);
+      pciWriteLong(pTDFX->PciTag[i], CFG_INIT_ENABLE, v |
+		   (CFGSWAPALGORITHM << CFG_SWAPBUFFER_ALGORITHM_SHIFT) |
+		   CFG_SWAP_ALGORITHM | ((!i)? CFG_SWAP_MASTER : 0));
+      if (!i) {
+	v=pciReadLong(pTDFX->PciTag[i], CFG_INIT_ENABLE);
+	pciWriteLong(pTDFX->PciTag[i], CFG_INIT_ENABLE, 
+			 v | CFG_SNOOP_EN);
+      } else {
+	v=pciReadLong(pTDFX->PciTag[i], CFG_INIT_ENABLE);
+	pciWriteLong(pTDFX->PciTag[i], CFG_INIT_ENABLE,
+		     (v & ~CFG_SNOOP_MEMBASE0) | CFG_SNOOP_EN | 
+		     CFG_SNOOP_MEMBASE0_EN | CFG_SNOOP_MEMBASE1_EN |
+		     CFG_SNOOP_SLAVE | CFG_SNOOP_FBIINIT_WR_EN |
+		     (((pTDFX->MMIOAddr>>22)&0x3ff)<<CFG_SNOOP_MEMBASE0_SHIFT) |
+		     ((pTDFX->numChips>2)? CFG_SWAP_QUICK : 0));
+	v=pciReadLong(pTDFX->PciTag[i], CFG_PCI_DECODE);
+	pciWriteLong(pTDFX->PciTag[i], CFG_PCI_DECODE,
+		     (v & ~CFG_SNOOP_MEMBASE1) |
+		     ((pTDFX->LinearAddr>>22)&0x3ff)<<CFG_SNOOP_MEMBASE1_SHIFT);
+      }
+    }
+
+    if (sliEnable && aaSamples<4) {
+      /* SLI is on and we're using less than 4 AA samples */
+      sli_renderMask = (pTDFX->numChips-1) << sliLinesLog2;
+      sli_compareMask = i << sliLinesLog2;
+      sli_scanMask = sliLines - 1;
+      v = (sli_renderMask << CFG_SLI_LFB_RENDERMASK_SHIFT) |
+	(sli_compareMask << CFG_SLI_LFB_COMPAREMASK_SHIFT) |
+	(sli_scanMask << CFG_SLI_LFB_SCANMASK_SHIFT) |
+	(nChipsLog2 << CFG_SLI_LFB_NUMCHIPS_LOG2_SHIFT) |
+	CFG_SLI_LFB_CPU_WR_EN | CFG_SLI_LFB_DPTCH_WR_EN;
+#ifndef RD_ABORT_ERROR
+      v|=CFG_SLI_RD_EN;
+#endif
+      pciWriteLong(pTDFX->PciTag[i], CFG_SLI_LFB_CTRL, v);
+
+#ifdef H3VDD
+      pTDFX->writeChipLong(pTDFX, i, SST_3D_SLICTRL,
+			   (sli_renderMask << SLICTL_3D_RENDERMASK_SHIFT) |
+			   (sli_compareMask << SLICTL_3D_COMPAREMASK_SHIFT) |
+			   (sli_scanMask << SLICTL_3D_SCANMASK_SHIFT) |
+			   (nChipsLog2 << SLICTL_3D_NUMCHIPS_LOG2_SHIFT) |
+			   SLICTL_3D_EN);
+#endif
+    } else if (!sliEnable && aaSamples) {
+      /* SLI is off and AA is on */
+      sli_renderMask = 0;
+      sli_compareMask = 0;
+      sli_scanMask = 0;
+      pciWriteLong(pTDFX->PciTag[i], CFG_SLI_LFB_CTRL,
+		   (sli_renderMask << CFG_SLI_LFB_RENDERMASK_SHIFT) |
+		   (sli_compareMask << CFG_SLI_LFB_COMPAREMASK_SHIFT) |
+		   (sli_scanMask << CFG_SLI_LFB_SCANMASK_SHIFT) |
+		   (0x0 << CFG_SLI_LFB_NUMCHIPS_LOG2_SHIFT));
+#ifdef H3VDD
+      pTDFX->writeChipLong(pTDFX, i, SST_3D_SLICTRL,
+			   (sli_renderMask << SLICTL_3D_RENDERMASK_SHIFT) |
+			   (sli_compareMask << SLICTL_3D_COMPAREMASK_SHIFT) |
+			   (sli_scanMask << SLICTL_3D_SCANMASK_SHIFT) |
+			   (0 << SLICTL_3D_NUMCHIPS_LOG2_SHIFT));
+#endif
+    } else {
+      /* SLI is on && aaSamples=4 */
+      sli_renderMask = ((pTDFX->numChips>>1)-1) << sliLinesLog2;
+      sli_compareMask = (i>>1) << sliLinesLog2;
+      sli_scanMask = sliLines - 1;
+      v = (sli_renderMask << CFG_SLI_LFB_RENDERMASK_SHIFT) |
+	(sli_compareMask << CFG_SLI_LFB_COMPAREMASK_SHIFT) |
+	(sli_scanMask << CFG_SLI_LFB_SCANMASK_SHIFT) |
+	((nChipsLog2-1) << CFG_SLI_LFB_NUMCHIPS_LOG2_SHIFT) |
+	CFG_SLI_LFB_CPU_WR_EN | CFG_SLI_LFB_DPTCH_WR_EN;
+#ifndef RD_ABORT_ERROR
+      v|=CFG_SLI_RD_EN;
+#endif
+      pciWriteLong(pTDFX->PciTag[i], CFG_SLI_LFB_CTRL, v);
+#ifdef H3VDD
+      pTDFX->writeChipLong(pTDFX, i, SST_3D_SLICTRL,
+			   (sli_renderMask << SLICTL_3D_RENDERMASK_SHIFT) |
+			   (sli_compareMask << SLICTL_3D_COMPAREMASK_SHIFT) |
+			   (sli_scanMask << SLICTL_3D_SCANMASK_SHIFT) |
+			   ((nChipsLog2-1) << SLICTL_3D_NUMCHIPS_LOG2_SHIFT) |
+			   SLICTL_3D_EN);
+#endif
+    }
+
+    /* We'll do memory layout elsewhere LDBMEMORYCONFIG */
+    /* CFG_AA_LFB_CTRL, CFG_AA_ZBUFF_APERATURE */
+
+    if (pTDFX->numChips>1 && i && (aaSamples || sliEnable)) {
+      int vsyncOffsetPixels, vsyncOffsetChars, vsyncOffsetHXtra;
+
+      if (aaSamples || (pTDFX->numChips==4 && sliEnable && aaSamples==4 &&
+			sliAnalog && i==3)) {
+	vsyncOffsetPixels=7;
+	vsyncOffsetChars=4;
+	vsyncOffsetHXtra=0;
+      } else {
+	vsyncOffsetPixels=7;
+	vsyncOffsetChars=5;
+	vsyncOffsetHXtra=0;
+      }
+      v=pciReadLong(pTDFX->PciTag[i], CFG_SLI_AA_MISC);
+      pciWriteLong(pTDFX->PciTag[i], CFG_SLI_AA_MISC, 
+		   (v&~CFG_VGA_VSYNC_OFFSET) |
+		   (vsyncOffsetPixels << CFG_VGA_VSYNC_OFFSET_PIXELS_SHIFT) |
+		   (vsyncOffsetChars << CFG_VGA_VSYNC_OFFSET_CHARS_SHIFT) |
+		   (vsyncOffsetHXtra << CFG_VGA_VSYNC_OFFSET_HXTRA_SHIFT));
+    } else if (pTDFX->numChips==2 && !sliEnable && aaSamples==4 && !sliAnalog) {
+      if (!i) {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN | 
+		     CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE_PLUS_AAFIFO <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_4);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     (0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      } else {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     (CFG_ENHANCED_VIDEO_EN |
+		      CFG_ENHANCED_VIDEO_SLV |
+		      CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
+		      (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		       CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		      CFG_DIVIDE_VIDEO_BY_1));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     (0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     (0xff << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      }
+    } else if (pTDFX->numChips==2 && !sliEnable && aaSamples==4 && sliAnalog) {
+      if (!i) {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     (CFG_ENHANCED_VIDEO_EN |
+		      CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
+		      (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		       CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		      CFG_DIVIDE_VIDEO_BY_4));
+      } else {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     CFG_ENHANCED_VIDEO_SLV |
+		     CFG_DAC_HSYNC_TRISTATE |
+		     CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_4);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     (0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      }
+    } else if (pTDFX->numChips==2 && sliEnable && !aaSamples && !sliAnalog) {
+      if (!i) {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     (CFG_ENHANCED_VIDEO_EN |
+		      (CFG_VIDEO_OTHERMUX_SEL_AAFIFO <<
+		       CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		      (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		       CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
+		      CFG_DIVIDE_VIDEO_BY_1));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     ((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     ((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     ((0x1<<sliLinesLog2) << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      } else {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     CFG_ENHANCED_VIDEO_SLV |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_1);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     (((pTDFX->numChips-1)<<sliLinesLog2) <<
+		      CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     ((i<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     (0xff << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (((pTDFX->numChips-1)<<sliLinesLog2) <<
+		      CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     ((i<<sliLinesLog2) <<
+		      CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      }
+    } else if (pTDFX->numChips>=2 && sliEnable && !aaSamples && sliAnalog) {
+      if (!i) {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_1);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     (((pTDFX->numChips-1)<<sliLinesLog2) <<
+		      CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     (((pTDFX->numChips-1)<<sliLinesLog2) << 
+		      CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     (0xff << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      } else {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     CFG_ENHANCED_VIDEO_SLV |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_1);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     (((pTDFX->numChips-1)<<sliLinesLog2) <<
+		      CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     ((i<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     (((pTDFX->numChips-1)<<sliLinesLog2) << 
+		      CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     ((i<<sliLinesLog2) <<
+		      CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     (0xff << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      }
+    } else if (pTDFX->numChips==2 && sliEnable && aaSamples==2 && !sliAnalog) {
+      if (!i) {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
+		     (CFG_VIDEO_OTHERMUX_SEL_AAFIFO <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_2);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     ((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     ((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     ((0x1<<sliLinesLog2) <<
+		      CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      } else {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     CFG_ENHANCED_VIDEO_SLV |
+		     CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_1);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     (((pTDFX->numChips-1)<<sliLinesLog2) <<
+		      CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     ((i<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     (0xff << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (((pTDFX->numChips-1)<<sliLinesLog2) <<
+		      CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     ((i<<sliLinesLog2) <<
+		      CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      }
+    } else if (pTDFX->numChips==2 && !sliEnable && aaSamples==2 && !sliAnalog) {
+      if (!i) {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE_PLUS_AAFIFO <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_2);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     (0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      } else {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     CFG_ENHANCED_VIDEO_SLV |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_1);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     (0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     (0xff << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      }
+    } else if (pTDFX->numChips==2 && !sliEnable && aaSamples==2 && sliAnalog) {
+      if (!i) {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_2);
+      } else {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     CFG_ENHANCED_VIDEO_SLV |
+		     CFG_DAC_HSYNC_TRISTATE |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_2);
+      }
+      pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		   (0x0 << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		   (0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		   (0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		   (0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+      pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		   (0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		   (0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+    } else if (pTDFX->numChips>=2 && sliEnable && aaSamples==2 && sliAnalog) {
+      if (!i) {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_2);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     (((pTDFX->numChips-1)<<sliLinesLog2) <<
+		      CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     (((pTDFX->numChips-1)<<sliLinesLog2) << 
+		      CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     (0xff << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      } else {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     CFG_ENHANCED_VIDEO_SLV |
+		     CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_2);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     (((pTDFX->numChips-1)<<sliLinesLog2) <<
+		      CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     ((i<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     (((pTDFX->numChips-1)<<sliLinesLog2) << 
+		      CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     ((i<<sliLinesLog2) << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     (0xff << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      }
+    } else if (pTDFX->numChips==4 && sliEnable && !aaSamples && !sliAnalog) {
+      if (!i) {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     (CFG_VIDEO_OTHERMUX_SEL_AAFIFO <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
+		     CFG_SLI_AAFIFO_COMPARE_INV |
+		     CFG_DIVIDE_VIDEO_BY_1);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     (((pTDFX->numChips-1)<<sliLinesLog2) <<
+		      CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (((pTDFX->numChips-1)<<sliLinesLog2) <<
+		      CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     ((0x0<<sliLinesLog2) <<
+		      CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      } else {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     CFG_ENHANCED_VIDEO_SLV |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_1);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     (((pTDFX->numChips-1)<<sliLinesLog2) <<
+		      CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     ((i<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     (0xff << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (((pTDFX->numChips-1)<<sliLinesLog2) <<
+		      CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     ((i<<sliLinesLog2) << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      }
+    } else if (pTDFX->numChips==4 && sliEnable && aaSamples==2 && !sliAnalog) {
+      if (!i) {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
+		     (CFG_VIDEO_OTHERMUX_SEL_AAFIFO <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
+		     CFG_SLI_AAFIFO_COMPARE_INV |
+		     CFG_DIVIDE_VIDEO_BY_2);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     (((pTDFX->numChips-1)<<sliLinesLog2) <<
+		      CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (((pTDFX->numChips-1)<<sliLinesLog2) <<
+		      CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     ((0x0<<sliLinesLog2) << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      } else {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     CFG_ENHANCED_VIDEO_SLV |
+		     CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_1);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     (((pTDFX->numChips-1)<<sliLinesLog2) <<
+		      CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     ((i<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     (0x0 << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     (0xff << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (((pTDFX->numChips-1)<<sliLinesLog2) <<
+		      CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     ((i<<sliLinesLog2) << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      }
+    } else if (pTDFX->numChips==4 && sliEnable && aaSamples==4 && !sliAnalog) {
+      if (!i) {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE_PLUS_AAFIFO <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_4);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     ((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     ((0x0<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     ((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     ((0x0<<sliLinesLog2) << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      } else if (i==1 || i==3) {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     CFG_ENHANCED_VIDEO_SLV |
+		     CFG_DAC_HSYNC_TRISTATE |
+		     CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_1);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     ((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     ((((i+1)>>2)<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     ((0x0<<sliLinesLog2) << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     ((0xff<<sliLinesLog2) << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      } else {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     CFG_ENHANCED_VIDEO_SLV |
+		     CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE_PLUS_AAFIFO <<
+		      CFG_VIDEO_OTHERMUX_SEL_FALSE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_4);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     ((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     ((0x1<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     ((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     ((0x1<<sliLinesLog2) << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     (0xff << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      }
+    } else if (pTDFX->numChips==4 && sliEnable && aaSamples==4 && sliAnalog) {
+      if (!i) {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_4);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     ((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     ((0x0<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     ((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     ((0x0<<sliLinesLog2) << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      } else if (i==1 || i==3) {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     CFG_ENHANCED_VIDEO_SLV |
+		     CFG_DAC_HSYNC_TRISTATE |
+		     CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_4);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     ((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     ((((i+1)>>2)<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     ((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     ((((i+1)>>2)<<sliLinesLog2) << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      } else {
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		     CFG_ENHANCED_VIDEO_EN |
+		     CFG_ENHANCED_VIDEO_SLV |
+		     CFG_VIDEO_LOCALMUX_DESKTOP_PLUS_OVERLAY |
+		     (CFG_VIDEO_OTHERMUX_SEL_PIPE <<
+		      CFG_VIDEO_OTHERMUX_SEL_TRUE_SHIFT) |
+		     CFG_DIVIDE_VIDEO_BY_4);
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL1,
+		     ((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_FETCH_SHIFT) |
+		     ((0x1<<sliLinesLog2) << CFG_SLI_COMPAREMASK_FETCH_SHIFT) |
+		     ((0x1<<sliLinesLog2) << CFG_SLI_RENDERMASK_CRT_SHIFT) |
+		     ((0x1<<sliLinesLog2) << CFG_SLI_COMPAREMASK_CRT_SHIFT));
+	pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL2,
+		     (0x0 << CFG_SLI_RENDERMASK_AAFIFO_SHIFT) |
+		     (0x0 << CFG_SLI_COMPAREMASK_AAFIFO_SHIFT));
+      }
+    }
+    if (pTDFX->numChips==4 && sliEnable && aaSamples==4 && i==3) {
+      v=pciReadLong(pTDFX->PciTag[i], CFG_SLI_AA_MISC);
+      pciWriteLong(pTDFX->PciTag[i], CFG_SLI_AA_MISC, 
+		   v | CFG_AA_LFB_RD_SLV_WAIT);
+    }
+    if (i) {
+      v=pciReadLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0);
+      pciWriteLong(pTDFX->PciTag[i], CFG_VIDEO_CTRL0,
+		   v|CFG_VIDPLL_SEL);
+      v=pTDFX->readChipLong(pTDFX, i, MISCINIT1);
+      pTDFX->writeChipLong(pTDFX, i, MISCINIT1, v|SST_POWERDOWN_DAC);
+    }
+  }
+  return TRUE;
+}
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfxdefs.h b/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfxdefs.h
index c482ec57a..c6224d78f 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfxdefs.h
+++ b/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfxdefs.h
@@ -183,6 +183,8 @@
 #define SST_3D_CHIPMASK			SST_3D_OFFSET+0x214
 
 /* NAPALM REGISTERS */
+#define CFG_MEM0BASE			16
+#define CFG_MEM1BASE			20
 #define CFG_INIT_ENABLE        		64
 #define CFG_PCI_DECODE         		72
 #define CFG_VIDEO_CTRL0        		128