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path: root/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c
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Diffstat (limited to 'xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c')
-rw-r--r--xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c63
1 files changed, 60 insertions, 3 deletions
diff --git a/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c b/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c
index dfdf2d368..ced6256d1 100644
--- a/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c
+++ b/xc/programs/Xserver/hw/xfree86/drivers/tdfx/tdfx_driver.c
@@ -515,8 +515,6 @@ TDFXCountRam(ScrnInfoPtr pScrn) {
partSize=1<<((dramInit0_strap&0x38000000)>>28);
banks=((dramInit0_strap&BIT(30))==0) ? 2 : 4;
memSize=nChips*partSize*banks;
- ErrorF("reg=%x nChips=%d partSize=%d banks=%d memSize=%d\n",
- dramInit0_strap, nChips, partSize, banks, memSize);
}
TDFXTRACEREG("dramInit0 = %x dramInit1 = %x\n", dramInit0_strap, dramInit1_strap);
TDFXTRACEREG("MemConfig %d chips %d size %d total\n", nChips, partSize, memSize);
@@ -548,6 +546,29 @@ TDFXProbeDDC(ScrnInfoPtr pScrn, int index)
}
}
+static int TDFXCfgToSize(int cfg)
+{
+ if (cfg<4) return 0x8000000<<cfg;
+ return 0x4000000>>(cfg-4);
+}
+
+static int TDFXSizeToCfg(int size)
+{
+ switch (size) {
+ case 0x40000000: return 3;
+ case 0x20000000: return 2;
+ case 0x10000000: return 1;
+ case 0x08000000: return 0;
+ case 0x04000000: return 4;
+ case 0x02000000: return 5;
+ case 0x01000000: return 6;
+ case 0x00800000: return 7;
+ case 0x00400000: return 8;
+ default:
+ return -1;
+ }
+}
+
static void
TDFXFindChips(ScrnInfoPtr pScrn, pciVideoPtr match)
{
@@ -570,6 +591,39 @@ TDFXFindChips(ScrnInfoPtr pScrn, pciVideoPtr match)
}
}
+static void
+TDFXInitChips(ScrnInfoPtr pScrn)
+{
+ TDFXPtr pTDFX;
+ int i, cfgbits, initbits;
+ int mem0base, mem1base, mem0size, mem0bits, mem1size, mem1bits;
+
+ pTDFX=TDFXPTR(pScrn);
+ if (pTDFX->numChips==1) return;
+ /* Chip0 allocates all the space for all the boards. We have to
+ reassign it correctly. */
+ cfgbits=pciReadLong(pTDFX->PciTag[0], CFG_PCI_DECODE);
+ mem0base=pciReadLong(pTDFX->PciTag[0], CFG_MEM0BASE);
+ mem1base=pciReadLong(pTDFX->PciTag[0], CFG_MEM1BASE);
+ mem0size=32*1024*1024; /* Registers are always 32MB */
+ mem1size=pScrn->videoRam*1024*4; /* Linear mapping is 4x memory */
+ mem0bits=TDFXSizeToCfg(mem0size);
+ mem1bits=TDFXSizeToCfg(mem1size)<<4;
+ cfgbits=(cfgbits&~(0xFF))|mem0bits|mem1bits;
+ for (i=0; i<pTDFX->numChips; i++) {
+ initbits=pciReadLong(pTDFX->PciTag[i], CFG_INIT_ENABLE);
+ initbits|=BIT(10);
+ pciWriteLong(pTDFX->PciTag[i], CFG_INIT_ENABLE, initbits);
+ pciWriteLong(pTDFX->PciTag[i], CFG_MEM0BASE, 0xFFFFFFFF);
+ pciWriteLong(pTDFX->PciTag[i], CFG_MEM0BASE, mem0base+i*mem0size);
+ pciWriteLong(pTDFX->PciTag[i], CFG_MEM1BASE, 0xFFFFFFFF);
+ pciWriteLong(pTDFX->PciTag[i], CFG_MEM1BASE, mem1base+i*mem1size);
+ pciWriteLong(pTDFX->PciTag[i], CFG_PCI_DECODE, cfgbits);
+ initbits&=~BIT(10);
+ pciWriteLong(pTDFX->PciTag[i], CFG_INIT_ENABLE, initbits);
+ }
+}
+
/*
* TDFXPreInit --
*
@@ -771,6 +825,8 @@ TDFXPreInit(ScrnInfoPtr pScrn, int flags)
from = X_CONFIG;
}
+ TDFXInitChips(pScrn);
+
/* Multiple by two because tiled access requires more address space */
pTDFX->FbMapSize = pScrn->videoRam*1024*2;
xf86DrvMsg(pScrn->scrnIndex, from, "VideoRAM: %d kByte Mapping %d kByte\n",
@@ -1653,7 +1709,8 @@ TDFXScreenInit(int scrnIndex, ScreenPtr pScreen, int argc, char **argv) {
tmp=pTDFX->numChips;
pTDFX->numChips=1;
- /* TDFXSetupSLI(pScrn, (pTDFX->numChips>1)?TRUE:FALSE, 0); */
+ if (pTDFX->numChips>1)
+ TDFXSetupSLI(pScrn, TRUE, 0);
pTDFX->numChips=tmp;
allocateMemory(pScrn);