summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/lpc32xx.dtsi
AgeCommit message (Expand)AuthorFilesLines
2019-04-19ARM: dts: lpc32xx: use SPDX license identifierVladimir Zapolskiy1-7/+1
2019-04-19ARM: dts: lpc32xx: add address and size cell values to SPI controller nodesVladimir Zapolskiy1-0/+8
2019-04-19ARM: dts: lpc32xx: disable MAC controller by defaultVladimir Zapolskiy1-0/+1
2019-04-19ARM: dts: lpc32xx: disable I2S controllers by defaultVladimir Zapolskiy1-0/+2
2019-04-19ARM: dts: lpc32xx: change hexadecimal values to lower caseVladimir Zapolskiy1-9/+10
2019-02-15Merge tag 'lpc32xx-dt-for-5.1' of https://github.com/vzapolskiy/linux-lpc32xx...Arnd Bergmann1-13/+15
2019-02-03ARM: dts: lpc32xx: fix ARM PrimeCell LCD controller clocks propertyVladimir Zapolskiy1-2/+2
2019-02-03ARM: dts: lpc32xx: fix ARM PrimeCell LCD controller variantVladimir Zapolskiy1-1/+1
2019-02-03ARM: dts: lpc32xx: reparent keypad controller to SIC1Vladimir Zapolskiy1-1/+2
2019-02-03ARM: dts: lpc32xx: add required clocks property to keypad device nodeVladimir Zapolskiy1-0/+1
2019-02-03ARM: dts: lpc32xx: Remove leading 0x and 0s from bindings notationMathieu Malaterre1-9/+9
2019-01-30ARM: dts: Kill off skeleton{64}.dtsiRob Herring1-2/+2
2018-09-28ARM: dts: lpc32xx: Fix SPI controller node namesRob Herring1-2/+2
2017-10-20arm: dts: fix unit-address leading 0sRob Herring1-1/+1
2016-10-25ARM: dts: lpc32xx: set default parent clock for pwm1 & pwm2Sylvain Lemieux1-0/+4
2016-10-02ARM: dts: lpc32xx: add device node for IRAM on-chip memoryVladimir Zapolskiy1-1/+11
2016-04-28ARM: dts: lpc32xx: reparent SIC1 and SIC2 interrupts from MICVladimir Zapolskiy1-18/+42
2016-04-21ARM: dts: lpc32xx: disabled ssp0/spi1 & ssp1/spi2 by defaultSylvain Lemieux1-0/+12
2016-04-21ARM: dts: lpc32xx: add clock properties to spi nodesSylvain Lemieux1-0/+2
2016-04-18ARM: dts: lpc32xx: set default clock rate of HCLK PLLVladimir Zapolskiy1-0/+3
2016-02-11arm: dts: lpc32xx: assign interrupt typesVladimir Zapolskiy1-29/+34
2016-02-11arm: dts: lpc32xx: remove clock frequency property from UART device nodesVladimir Zapolskiy1-4/+0
2016-02-11arm: dts: lpc32xx: add USB clock controllerVladimir Zapolskiy1-0/+9
2016-02-11arm: dts: lpc32xx: add clock properties to device nodesVladimir Zapolskiy1-0/+41
2016-02-11arm: dts: lpc32xx: add clock controller device nodeVladimir Zapolskiy1-0/+17
2016-02-11arm: dts: lpc32xx: add device nodes for external oscillatorsVladimir Zapolskiy1-0/+16
2015-11-18arm: dts: lpc32xx: move USB controller subdevices into own device nodeVladimir Zapolskiy1-23/+30
2015-11-18arm: dts: lpc32xx: add device nodes for standard timersVladimir Zapolskiy1-0/+40
2015-11-18arm: dts: lpc32xx: add external memory controller device nodeVladimir Zapolskiy1-1/+15
2015-11-18arm: dts: lpc32xx: add device node for the second pwm controllerVladimir Zapolskiy1-2/+8
2015-11-18arm: dts: lpc32xx: add reg property to cpu device nodeVladimir Zapolskiy1-2/+3
2015-11-18arm: dts: lpc32xx: add labels to all defined peripheral nodesVladimir Zapolskiy1-10/+10
2015-11-18arm: dts: lpc32xx: change include syntax to be C preprocessor friendlyVladimir Zapolskiy1-1/+1
2013-05-23ARM: dts: lpc32xx: cpus/cpu nodes dts updatesLorenzo Pieralisi1-2/+6
2012-11-14ARM: LPC32xx: Add the motor PWM to base dts fileAlban Bedel1-0/+7
2012-07-20ARM: LPC32xx: Add PWM to base dts fileAlexandre Pereira da Silva1-0/+5
2012-06-14ARM: LPC32xx: Fix lpc32xx.dtsi status property: "disable" -> "disabled"Roland Stigge1-7/+7
2012-06-14ARM: LPC32xx: High Speed UART configuration via DTRoland Stigge1-5/+11
2012-06-14ARM: LPC32xx: DT conversion of Standard UARTsRoland Stigge1-8/+26
2012-06-14ARM: LPC32xx: DTS adjustment for using pl18x primecellRoland Stigge1-1/+2
2012-06-14ARM: LPC32xx: DTS adjustment for key matrix controllerRoland Stigge1-0/+2
2012-06-14ARM: LPC32xx: Adjust dtsi file for MLC controller configurationRoland Stigge1-2/+3
2012-05-30ARM: LPC32xx: Adjust dts files to gpio dt bindingRoland Stigge1-39/+2
2012-04-22ARM: LPC32xx: DTS files for device tree conversionRoland Stigge1-0/+292
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-15 21:28:06 +0000