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path: root/arch/powerpc/kernel/head_8xx.S
AgeCommit message (Expand)AuthorFilesLines
2016-03-11powerpc/8xx: rewrite set_context() in CChristophe Leroy1-44/+0
2016-03-11powerpc/8xx: remove special handling of CPU6 errata in set_dec()Christophe Leroy1-18/+0
2016-03-11powerpc/8xx: Map linear kernel RAM with 8M pagesChristophe Leroy1-2/+33
2016-03-11powerpc/8xx: Save r3 all the time in DTLB miss handlerChristophe Leroy1-9/+4
2016-03-09powerpc/8xx: CONFIG_DEBUG_PAGEALLOC requires ITLBmiss for kernel addressesChristophe Leroy1-1/+1
2015-06-02powerpc/8xx: Implementation of PAGE_EXECLEROY Christophe1-3/+9
2015-06-02powerpc/8xx: Handle PAGE_USER via APG bitsLEROY Christophe1-9/+12
2015-06-02powerpc/8xx: Add support for TASK_SIZE greater than 0x80000000LEROY Christophe1-6/+19
2015-06-02powerpc/8xx: Use SPRG2 instead of DAR for saving r3LEROY Christophe1-5/+4
2015-06-02powerpc/8xx: dont save CR in SCRATCH registersLEROY Christophe1-14/+15
2015-06-02powerpc/8xx: Handle CR out of exception PROLOG/EPILOGLEROY Christophe1-3/+7
2015-06-02powerpc/8xx: macro for handling CPU15 errataLEROY Christophe1-6/+12
2015-01-29powerpc/8xx: Remove duplicated code in set_context()LEROY Christophe1-6/+4
2015-01-29powerpc/8xx: Optimise access to swapper_pg_dirLEROY Christophe1-16/+19
2015-01-29powerpc/8xx: Take benefit of aligned PGDIRLEROY Christophe1-19/+15
2015-01-29powerpc/8xx: remove tests on PGDIR entry validityLEROY Christophe1-33/+8
2015-01-29powerpc/8xx: remove remaining unnecessary code in FixupDARLEROY Christophe1-6/+0
2015-01-29powerpc/8xx: use _PAGE_RO instead of _PAGE_RWLEROY Christophe1-3/+0
2014-11-07powerpc/8xx: Invalidate non present TLB as early as possibleLEROY Christophe1-5/+10
2014-11-07powerpc/8xx: Use DAR to save r3 for CPU6 ERRATALEROY Christophe1-18/+15
2014-11-07powerpc/8xx: Don't restore regs to save them again.LEROY Christophe1-3/+5
2014-11-07powerpc/8xx: _PMD_PRESENT already set in level 1 entriesLEROY Christophe1-2/+0
2014-11-07powerpc/8xx: set PTE bit 22 off TLBmissLEROY Christophe1-8/+2
2014-11-07powerpc/8xx: Better readibility of ERRATA CPU6 handlingLEROY Christophe1-13/+16
2014-11-07powerpc/8xx: Implement 16k pagesLEROY Christophe1-0/+4
2014-11-07powerpc/8xx: Const for TLB RPN forced valueLEROY Christophe1-6/+13
2014-11-07powerpc/8xx: Use PAGE size related constsLEROY Christophe1-12/+18
2014-11-07powerpc/8xx: Don't use MD_TWC for walkLEROY Christophe1-16/+12
2014-11-07powerpc/8xx: Use M_TW instead of M_TWBLEROY Christophe1-22/+26
2014-11-07powerpc/8xx: No need to restore registers and save them again.LEROY Christophe1-2/+2
2014-11-07powerpc/8xx: DataAccess exception not generated by MPC8xxLEROY Christophe1-11/+10
2014-11-07powerpc/8xx: exception InstructionAccess does not exist on MPC8xxLEROY Christophe1-8/+7
2014-09-04powerpc/8xx: Duplicate two insns instead of branchingLEROY Christophe1-2/+4
2014-09-04powerpc/8xx: Optimize verification in FixupDARLEROY Christophe1-4/+2
2014-09-04powerpc/8xx: No need to save r10 and r3 when not calling FixupDARLEROY Christophe1-14/+13
2014-09-04powerpc/8xx: Fix comment about DIRTY updateLEROY Christophe1-6/+2
2014-09-04powerpc/8xx: Remove loading of r10 at end of FixupDARLEROY Christophe1-4/+3
2014-09-04powerpc/8xx: Use SCRATCH0 and SCRATCH1 also for TLB handlersLEROY Christophe1-68/+36
2014-09-04powerpc/8xx: Declare SPRG2 as a SCRATCH registerLEROY Christophe1-5/+5
2013-10-28powerpc/8xx: Fixing issue with CONFIG_PIN_TLBLEROY Christophe1-0/+3
2013-08-14powerpc: Remove the empty giveup_fpu() function on 32bit kernelKevin Hao1-4/+0
2012-03-09powerpc: Call do_page_fault() with interrupts offBenjamin Herrenschmidt1-2/+2
2011-09-20powerpc/32: Pass device tree address as u64 to machine_initScott Wood1-10/+3
2010-11-29powerpc: Remove second definition of STACK_FRAME_OVERHEADStephen Rothwell1-0/+1
2010-04-07powerpc/8xx: Use SPRG2 and DAR registers to stash r11 and cr.Joakim Tjernlund1-13/+36
2010-04-07powerpc/8xx: Don't touch ACCESSED when no SWAP.Joakim Tjernlund1-2/+4
2010-04-07powerpc/8xx: Avoid testing for kernel space in ITLB Miss.Joakim Tjernlund1-0/+4
2010-04-07powerpc/8xx: Optimze TLB Miss handlersJoakim Tjernlund1-8/+3
2010-01-15powerpc/8xx: Fix user space TLB walk in dcbX fixupJoakim Tjernlund1-2/+2
2010-01-15powerpc/8xx: Always pin kernel instruction TLBJoakim Tjernlund1-4/+4
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