summaryrefslogtreecommitdiff
path: root/arch/powerpc/kernel/head_8xx.S
diff options
context:
space:
mode:
authorLEROY Christophe <christophe.leroy@c-s.fr>2014-08-29 11:14:37 +0200
committerScott Wood <scottwood@freescale.com>2014-09-04 19:02:11 -0500
commitae466bde19752f8638fd458225fb65ded5db5e16 (patch)
tree4ff4c6754c6d2a16ae61cfd8364a18891460b5ce /arch/powerpc/kernel/head_8xx.S
parentc822e73731fce3b49a4887140878d084d8a44c08 (diff)
powerpc/8xx: Declare SPRG2 as a SCRATCH register
Since commit 469d62be9263b92f2c3329540cbb1c076111f4f3, SPRG2 is used as a scratch register just like SPRG0 and SPRG1. So Declare it as such and fix the comment which is not valid anymore since that commit. Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr> Signed-off-by: Scott Wood <scottwood@freescale.com>
Diffstat (limited to 'arch/powerpc/kernel/head_8xx.S')
-rw-r--r--arch/powerpc/kernel/head_8xx.S10
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 7ee876d2adb5..9db2e4491922 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -301,7 +301,7 @@ InstructionTLBMiss:
stw r11, 4(r0)
#else
mtspr SPRN_DAR, r10
- mtspr SPRN_SPRG2, r11
+ mtspr SPRN_SPRG_SCRATCH2, r11
#endif
mfspr r10, SPRN_SRR0 /* Get effective address of fault */
#ifdef CONFIG_8xx_CPU15
@@ -363,7 +363,7 @@ InstructionTLBMiss:
mfspr r10, SPRN_DAR
mtcr r10
mtspr SPRN_DAR, r11 /* Tag DAR */
- mfspr r11, SPRN_SPRG2
+ mfspr r11, SPRN_SPRG_SCRATCH2
#else
lwz r11, 0(r0)
mtcr r11
@@ -386,7 +386,7 @@ InstructionTLBMiss:
mtcr r10
li r11, 0x00f0
mtspr SPRN_DAR, r11 /* Tag DAR */
- mfspr r11, SPRN_SPRG2
+ mfspr r11, SPRN_SPRG_SCRATCH2
#else
lwz r11, 0(r0)
mtcr r11
@@ -409,7 +409,7 @@ DataStoreTLBMiss:
stw r11, 4(r0)
#else
mtspr SPRN_DAR, r10
- mtspr SPRN_SPRG2, r11
+ mtspr SPRN_SPRG_SCRATCH2, r11
#endif
mfspr r10, SPRN_M_TWB /* Get level 1 table entry address */
@@ -487,7 +487,7 @@ DataStoreTLBMiss:
mfspr r10, SPRN_DAR
mtcr r10
mtspr SPRN_DAR, r11 /* Tag DAR */
- mfspr r11, SPRN_SPRG2
+ mfspr r11, SPRN_SPRG_SCRATCH2
#else
mtspr SPRN_DAR, r11 /* Tag DAR */
lwz r11, 0(r0)