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authortstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8>2012-10-19 21:10:12 +0000
committertstellar <tstellar@91177308-0d34-0410-b5e6-96231b3b80d8>2012-10-19 21:10:12 +0000
commit7f178423ac9203e443a29ba8a4c376d113601bf9 (patch)
treef1d63d62367c5ca40673fa795b6997a6112bfa32
parent7ccfc25abbbbaa4082b06f8cf9b3899ffd4153ac (diff)
R600: Add support for the AMDGPU::BREAK instruction
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/R600/@166332 91177308-0d34-0410-b5e6-96231b3b80d8
-rw-r--r--lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp18
1 files changed, 17 insertions, 1 deletions
diff --git a/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp b/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
index b3cee40176..cd012d4884 100644
--- a/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
+++ b/lib/Target/AMDGPU/R600ExpandSpecialInstrs.cpp
@@ -208,7 +208,23 @@ bool R600ExpandSpecialInstrsPass::runOnMachineFunction(MachineFunction &MF) {
MI.eraseFromParent();
continue;
}
- }
+ case AMDGPU::BREAK:
+ MachineInstr *PredSet = TII->buildDefaultInstruction(MBB, I,
+ AMDGPU::PRED_SETE_INT,
+ AMDGPU::PREDICATE_BIT,
+ AMDGPU::ZERO,
+ AMDGPU::ZERO);
+ TII->addFlag(PredSet, 0, MO_FLAG_MASK);
+ PredSet->getOperand(
+ TII->getOperandIdx(
+ *PredSet, R600Operands::UPDATE_EXEC_MASK)).setImm(1);
+
+ BuildMI(MBB, I, MBB.findDebugLoc(I),
+ TII->get(AMDGPU::BREAK_LOGICALNZ_i32))
+ .addReg(AMDGPU::PREDICATE_BIT);
+ MI.eraseFromParent();
+ continue;
+ }
if (ExpandInputPerspective(MI))
continue;