diff options
| author | root <airlied@linux.ie> | 2006-12-31 14:34:28 +1100 |
|---|---|---|
| committer | Dave Airlie <airlied@linux.ie> | 2006-12-31 14:34:28 +1100 |
| commit | d4c7395417f97c57232d4d05ec0a8f7e1f0f8cd2 (patch) | |
| tree | 84e223a0d2601f5e87f2b663ad660f8320be5a2e | |
| parent | faa42876486fbf22d49fe1455880e2b8c0aac5ff (diff) | |
add more nouveau regs
| -rw-r--r-- | nouveau_reg.h | 14 | ||||
| -rw-r--r-- | radeontool.c | 16 |
2 files changed, 28 insertions, 2 deletions
diff --git a/nouveau_reg.h b/nouveau_reg.h index d7f3b09..8fba2fa 100644 --- a/nouveau_reg.h +++ b/nouveau_reg.h @@ -260,11 +260,22 @@ #define NV_VGA_CRTCX_FP_VTIMING 0x54 #define NV_CRTC_START 0x800 +#define NV_CRTC_CURSOR_CONFIG 0x810 +#define NV_CRTC_081C 0x81c +#define NV_CRTC_0830 0x830 +#define NV_CRTC_0834 0x834 #define NV_CRTC_HEAD_CONFIG 0x860 +#define NV_RAMDAC_CURSOR_POS 0x300 +#define NV_RAMDAC_CURSOR_CTRL 0x320 +#define NV_RAMDAC_CURSOR_DATA_LO 0x324 +#define NV_RAMDAC_CURSOR_DATA_HI 0x328 + #define NV_RAMDAC_GENERAL_CONTROL 0x600 +#define NV_RAMDAC_0404 0x404 + #define NV_RAMDAC_NVPLL 0x500 #define NV_RAMDAC_MPLL 0x504 # define NV_RAMDAC_PLL_COEFF_MDIV 0x000000FF @@ -283,3 +294,6 @@ #define NV_RAMDAC_VPLL2_B 0x57c #define NV_RAMDAC_FP_CONTROL 0x848 + +#define NV_RAMDAC_FP_TMDS_DATA 0x8b0 +#define NV_RAMDAC_FP_TMDS_LVDS 0x8b4 diff --git a/radeontool.c b/radeontool.c index 6af3751..d2eeac8 100644 --- a/radeontool.c +++ b/radeontool.c @@ -190,7 +190,7 @@ int dump_vga_regs(int crtc) printf("CRTC%2d %02X\t%02X %02X %02X %02X\n", crtc, i, get_vga_crtc_reg(crtc, i), get_vga_crtc_reg(crtc, i+1), get_vga_crtc_reg(crtc, i+2), get_vga_crtc_reg(crtc, i+3)); -#define SHOW_VGA_CRTC_REG(r) printf("%s\t%02x\n", #r, get_vga_crtc_reg(crtc, r)) +#define SHOW_VGA_CRTC_REG(r) printf("%s%d\t%02x\n", #r, crtc, get_vga_crtc_reg(crtc, r)) SHOW_VGA_CRTC_REG(NV_VGA_CRTCX_CURCTL0); SHOW_VGA_CRTC_REG(NV_VGA_CRTCX_CURCTL1); SHOW_VGA_CRTC_REG(NV_VGA_CRTCX_CURCTL2); @@ -205,6 +205,8 @@ int dump_vga_regs(int crtc) SHOW_VGA_CRTC_REG(NV_VGA_CRTCX_PIXEL); SHOW_VGA_CRTC_REG(NV_VGA_CRTCX_HEB); SHOW_VGA_CRTC_REG(NV_VGA_CRTCX_FIFO_LWM); + SHOW_VGA_CRTC_REG(NV_VGA_CRTCX_BUFFER); + SHOW_VGA_CRTC_REG(NV_VGA_CRTCX_OWNER); SHOW_VGA_CRTC_REG(NV_VGA_CRTCX_FIFO_LWM_NV30); } @@ -221,13 +223,23 @@ void radeon_cmd_regs(void) #define SHOW_CRTC1_REG(r) printf("%s\t%08x\n", #r, radeon_get32(NV_PCRTC0_OFFSET+0x2000+r, #r)) SHOW_CRTC0_REG(NV_CRTC_START); + SHOW_CRTC0_REG(NV_CRTC_CURSOR_CONFIG); SHOW_CRTC0_REG(NV_CRTC_HEAD_CONFIG); - + SHOW_CRTC0_REG(NV_CRTC_081C); + SHOW_CRTC0_REG(NV_CRTC_0830); + SHOW_CRTC0_REG(NV_CRTC_0834); + SHOW_CRTC1_REG(NV_CRTC_START); + SHOW_CRTC1_REG(NV_CRTC_CURSOR_CONFIG); SHOW_CRTC1_REG(NV_CRTC_HEAD_CONFIG); #define SHOW_RAMDAC0_REG(r) printf("%s\t%08x\n", #r, radeon_get32(NV_PRAMDAC0_OFFSET+r, #r)) + SHOW_RAMDAC0_REG(NV_RAMDAC_CURSOR_POS); + SHOW_RAMDAC0_REG(NV_RAMDAC_CURSOR_CTRL); + SHOW_RAMDAC0_REG(NV_RAMDAC_CURSOR_DATA_LO); + SHOW_RAMDAC0_REG(NV_RAMDAC_CURSOR_DATA_HI); + SHOW_RAMDAC0_REG(NV_RAMDAC_FP_CONTROL); SHOW_RAMDAC0_REG(NV_RAMDAC_GENERAL_CONTROL); SHOW_RAMDAC0_REG(NV_RAMDAC_NVPLL); |