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2016-08-05decoder/h264: don't assert on invalid parameterHEADmasterfdo-masterXiang, Haihao1-12/+4
Remove redundant checking on input parameters as well. This avoids assertion failure in https://bugs.freedesktop.org/show_bug.cgi?id=94007, but the upper library should check why are the invalid paramters passed to libva. Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-by: Sean V Kelley <seanvk@posteo.de>
2016-08-04Set cost for modes used for VP8 encodingXiang, Haihao1-0/+11
This is similar to what commit 1cd6795 does Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Tested-by: Wang, Fei W <fei.w.wang@intel.com> Reviewed-by: Sean V Kelley <seanvk@posteo.de>
2016-07-29Encode: Set cost for MODE_CHROMA_INTRA/MODE_REFID_COSTXiang, Haihao1-0/+5
This fixes the remaining issues mentioned in https://bugs.freedesktop.org/show_bug.cgi?id=96703 after applying commit 3699c14 On GEN75+, driver copies vme_context->vme_state_message to VME kernel curbe buffer and VME kernel uses the data in curbe buffer to initialize VME message payload. vme_context->vme_state_message is set up in intel_vme_update_mbmv_cost(), which doesn't set all costs for used modes in VME kernels. The uninitialized mode cost will result in difference in VME output. Thanks for Elaine's finding that the issue disappears after initializing VME state message buffer with zeros. Signed-off-by: Elaine Wang <elaine.wang@intel.com> Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-by: Sean V Kelley <seanvk@posteo.de> Tested-by: Mingruo Sun <mingruo.sun@intel.com>
2016-07-29Encode: Clear right and bottom border of NV12 surface to avoid run2run issueXuGuangxin3-2/+58
This fixes some issues mentioned in https://bugs.freedesktop.org/show_bug.cgi?id=96703 Signed-off-by: Xu Guangxin <guangxin.xu@intel.com> Reviewed-by: Sean V Kelley <seanvk@posteo.de> Tested-by: Mingruo Sun <mingruo.sun@intel.com>
2016-07-29i965_encoder: return a failing statusDaniel Charles1-2/+4
VAStatus when calling vme_pipeline was silently failing Signed-off-by: Daniel Charles <daniel.charles@intel.com> Reviewed-by: Sean V Kelley <seanvk@posteo.de>
2016-07-27Missing 'do' in "do ...while" in macro ALLOC_VDENC_BUFFER_RESOURCELim Siew Hoon1-1/+1
Signed-off-by: Lim Siew Hoon <siew.hoon.lim@intel.com> Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
2016-07-27dri: return error for unimplemented surface formatsScott D Phillips1-0/+3
Previously packed YUV422 surface were allowed to be renderd but got rendered improperly. Signed-off-by: Scott D Phillips <scott.d.phillips@intel.com>
2016-07-27Fix to use source and output regions size instead of the input output ↵Ung, Teng En1-5/+5
surfaces original size. This fixes https://bugs.freedesktop.org/show_bug.cgi?id=96739 Signed-off-by: Ung, Teng En <teng.en.ung@intel.com> Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
2016-07-22Fix the condition used in 'else if()'Xiang, Haihao1-2/+2
This 'else if()' is used to check output surface format, not input surface format. Tested-by: Xu, Guangxin <Guangxin.Xu@intel.com> Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
2016-07-22encode: h264, h265: Remove unnecessary warningSreerenj Balachandran2-7/+0
The warning "Input ref list is Wrong" is generating based on assumption that reference frames provided in VAEncPictureParameterBuffer are in align with ref_pic_list included in VAEncSliceParameterBuffer. There shoudn't be such constraints, as per VA specification pic_param->reference_frames can have any order based on dpb manipulation. Signed-off-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
2016-07-22Export the P010 surface attribute for HEVC/VP9 10-bits decodingZhao Yakui1-0/+9
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
2016-07-22shaders/gen9: fix build when no intel-gen4asm availableU. Artie Eoff1-0/+2
If intel-gen4asm version is < 1.9 or not installed then we shouldn't run the associated make rules. This fixes 'make dist' failure. Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com> Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
2016-07-22i965_drv: fix cb_cr_height for YUV422 formatsScott D Phillips1-1/+1
YUV422 has full vertical chroma resolution, not half. Signed-off-by: Scott D Phillips <scott.d.phillips@intel.com>
2016-06-28Downgrade the alignment requirement for linear surface on BDW+Zhao Yakui2-5/+9
When sharing the YUY2/UYVY buffer with other driver, the current alignment is too strict, which causes that it is not handled correctly by other driver.(The current alignment is considered based on I420/YV12) https://bugs.freedesktop.org/show_bug.cgi?id=96689 Tested-by: Cheah, Vincent Beng Keat<vincent.beng.keat.cheah@intel.com> Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
2016-06-24Update PCI IDs for KabylakeXiang, Haihao1-5/+3
Remove unused PCI IDs and add new PCI IDs for KBL, the IDs are taken directly from intel-gfx patches, which are under review: https://lists.freedesktop.org/archives/intel-gfx/2016-June/099263.html https://lists.freedesktop.org/archives/intel-gfx/2016-June/099264.html Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2016-06-22Make sure a right VEBOX_IECP_STATE is used on BDW+Xiang, Haihao1-0/+2
Some features of IECP aren't enabled, and the corresponding fields must be set to 0 in VEBOX_IECP_STATE. Thanks for Peng's finding: The issue disappear when disable libdrm cache This fixes https://bugs.freedesktop.org/show_bug.cgi?id=95349 Cc: peng.chen <peng.c.chen@intel.com> Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Tested-by: Lim Siew Hoon <siew.hoon.lim@intel.com> Tested-by: peng.chen <peng.c.chen@intel.com> Tested-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
2016-06-13check the result of hsw_veb_post_format_convert()Víctor Manuel Jáquez Leal1-21/+13
This commit is related to previous commit e4996019, which is a simpler approach of this commit, by adding more supported color formats. For example, VA_FOURCC_BGRX should be added too, to avoid an assert with this gstreamer pipeline: gst-play-1.0 burosch1.mpg --videosink=ximagesink http://samples.mplayerhq.hu/MPEG2/interlaced/burosch1.mpg Nonetheless, instead of just adding already supported color formats conversion, it is better to rely on what vpp_surface_convert() already checks, by verifying the result operation, and avoid the assert. This patch does it for hsw_veb_post_format_convert(). Signed-off-by: Víctor Manuel Jáquez Leal <vjaquez@igalia.com>
2016-06-13Follow the HW spec to set the surface cache attribute for Gen9+Qu, PengFei3-0/+28
Currently it will use the unoptimized cache attribute for the surface on Gen9+. This is to follow the HW spec to optimize the cache attribute of the surface for gen9+. Signed-off-by: Qu, Pengfei <pengfei.qu@intel.com> Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
2016-06-13Encoding: H264 uses the GPU to construct the PAK obj command on Gen8+Zhao Yakui6-203/+481
This is helpful to reduce the waiting time when preparing the command buffer of PAK object. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
2016-06-13Encoding: Encoding reuses aux_batchbuffer instead of allocate new bufferZhao Yakui1-16/+7
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
2016-06-08jpeg enc/dec gen9: Allow up to 8K JPEG max resolution on gen9U. Artie Eoff2-6/+24
Allow up to 8K * 8K resolution for JPEG encode and decode on gen9 HW (SKL,BXT,KBL). Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
2016-06-08i965_drv: add support for per-codec max resolutionU. Artie Eoff2-5/+36
Add a functor to hw_codec_info to allow each hw instance to report maximum resolution on a per-codec basis. Signed-off-by: U. Artie Eoff <ullysses.a.eoff@intel.com>
2016-06-07Fix the potential NULL issueZhao Yakui2-10/+90
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
2016-06-07Restrict the VP9 HW encoding for Profile0Zhao Yakui1-1/+1
Fix the issue that VP9 HW encoding is reported incorrectly for VP9 Profile2. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com>
2016-06-06Fix the alpha mask at getting derive imagesVíctor Manuel Jáquez Leal1-2/+2
The alpha mask is set to 0x0 when getting derived images, regardless the alpha channel in the RGB format. But, When RGBx, the x means an alpha mask of 0x00000000 When RGBA, the A means an alpha mask of 0xff000000 This patch set the alpha mask correctly. Signed-off-by: Víctor Manuel Jáquez Leal <vjaquez@igalia.com>
2016-06-031.7.2.pre1 for developmentXiang, Haihao1-1/+1
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2016-06-03libdrm 2.4.52 is required to avoid the compiler errorXiang, Haihao1-1/+1
CC i965_drv_video_la-intel_batchbuffer.lo intel_batchbuffer.c: In function 'intel_batchbuffer_emit_reloc64': intel_batchbuffer.c:183:24: error: 'drm_intel_bo' has no member named 'offset64' uint64_t offset = bo->offset64 + delta; ^ make[3]: *** [i965_drv_video_la-intel_batchbuffer.lo] Error 1 Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
2016-06-03Don't check WAYLAND_SCANNER if wayland isn't used or foundXiang, Haihao4-38/+16
checking for WAYLAND... no checking for LIBVA_WAYLAND_DEPS... no checking for pkg-config... (cached) /usr/bin/pkg-config checking pkg-config is at least version 0.9.0... yes checking for WAYLAND_SCANNER... no configure: error: Package requirements (wayland-scanner) were not met: No package 'wayland-scanner' found Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
2016-06-01Remove extraneous OUT_BATCH in gen8_gpe_state_base_addressScott D Phillips1-2/+0
Line accidentally left behind in: a82f0be Fix the 48-bit address issue for gpe_util functions on Signed-off-by: Scott D Phillips <scott.d.phillips@intel.com> Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
2016-05-27Update the dependency on VA-API versionXiang, Haihao1-1/+1
VA-API 0.39.2 is required for VP9 encode Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2016-05-27Export the VBR bit rate-control for VP9 encoding on KBLZhao Yakui1-0/+4
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
2016-05-27Add the support of CBR/VBR for Vp9 EncodingZhao Yakui2-13/+165
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
2016-05-27Release the corresponding buffers for VP9 encodingZhao Yakui1-0/+7
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
2016-05-27Export the Vp9 encoding profile/entrypoint for KBLZhao Yakui4-6/+135
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
2016-05-27Add the low-level implementation of VP9 encodingZhao Yakui11-0/+14859
The following are includes: a. The definition of data structure related with VP9 encoding b. VME/PAK pipeline related with VP9 encoding c. The required helper function Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
2016-05-27Add some utility functions for i965_gpe_resourcesZhao Yakui5-0/+573
This is to add the wrapper function required by vp9 encoding. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
2016-05-26Add the VAEncMacroblockMapBufferType buffer for encodingZhao Yakui2-0/+10
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
2016-05-26Fix the 48-bit address issue for gpe_util functions on gen8+Zhao Yakui1-26/+37
Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
2016-05-26Use the buffer allocated externally to configure dynamic state for ↵Zhao Yakui2-0/+33
gpe_context on Gen8+ Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
2016-05-26Add one field to keep the specific priv_state for encodingZhao Yakui2-0/+6
It will be better that it is allocated/initialized in calling the XXX_vme_context_init callback function. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
2016-05-26Add common helper functions for VP9 Hw encodingZhao Yakui2-2/+539
Some are to initialize/update the frame_context related with VP9. The second is to initialize the uncompressed_header, which can be used when the user doesn't pass the uncompressed_header. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
2016-05-26Refine vp9_probs.h so that the prob table can be used for encodingZhao Yakui3-462/+552
Otherwise the prob definition will be defined twice if it is included in two files. Signed-off-by: Zhao Yakui <yakui.zhao@intel.com> Reviewed-by: Sean V Kelley <sean.v.kelley@intel.com>
2016-05-24Avoid potential NULL pointer accessXiang, Haihao2-1/+9
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
2016-05-11Update the dependency on VA-API versionXiang, Haihao1-1/+1
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
2016-05-09Export Low power encoding for H.264 on SKLXiang, Haihao1-0/+3
Only CQP mode is supported by now Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>
2016-05-09Implement low power mode on SKLXiang, Haihao8-6/+4808
VDEnc is one of the fixed function pipelines in VDBox which is a dedicated engine for low power mode Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>
2016-05-09Add support for VAEntrypointEncSliceLPXiang, Haihao4-19/+85
VAEntrypointEncSliceLP is used to expose low power variant of slice level encoding entrypoint and we will implement low power encoding on SKL Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>
2016-05-09Add a path to fetch encoder status from the underlying contextXiang, Haihao4-52/+94
We can use it to get the coded buffer size if the underlying context support status query Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>
2016-05-09Make intel_avc_find_skipemulcnt() a public functionXiang, Haihao3-52/+56
In addition, move intel_avc_find_skipemulcnt() to i965_encoder_utils.c Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>
2016-05-09Add some utility functions for MI commands for GEN9Xiang, Haihao3-0/+268
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-By: Sean V Kelley <sean.v.kelley@intel.com>
generated by cgit v1.2.3 (git 2.39.1) at 2024-05-14 17:08:24 +0000