diff options
| author | Sreerenj Balachandran <sreerenj.balachandran@intel.com> | 2016-07-15 17:38:20 +0300 |
|---|---|---|
| committer | Xiang, Haihao <haihao.xiang@intel.com> | 2016-07-22 14:37:33 +0800 |
| commit | b21b187c8146f7840bf176f94a3ad62a4c922add (patch) | |
| tree | 631f6caf7225c3e69f20c128cd052729111b8d34 | |
| parent | 62c3a0d75434e76c228247786817336430862b29 (diff) | |
encode: h264, h265: Remove unnecessary warning
The warning "Input ref list is Wrong" is generating
based on assumption that reference frames provided in
VAEncPictureParameterBuffer are in align with
ref_pic_list included in VAEncSliceParameterBuffer.
There shoudn't be such constraints, as per VA specification
pic_param->reference_frames can have any order based on
dpb manipulation.
Signed-off-by: Sreerenj Balachandran <sreerenj.balachandran@intel.com>
| -rw-r--r-- | src/gen6_mfc_common.c | 3 | ||||
| -rw-r--r-- | src/gen9_mfc_hevc.c | 4 |
2 files changed, 0 insertions, 7 deletions
diff --git a/src/gen6_mfc_common.c b/src/gen6_mfc_common.c index f961ecd..2f9f761 100644 --- a/src/gen6_mfc_common.c +++ b/src/gen6_mfc_common.c @@ -1176,9 +1176,6 @@ intel_mfc_avc_ref_idx_state(VADriverContextP ctx, fref_entry &= ~(0xFF << ref_idx_l0_shift); fref_entry += (intel_get_ref_idx_state_1(vme_context->used_references[0], frame_index) << ref_idx_l0_shift); } - if(frame_index == 1){ - WARN_ONCE("Input ref list is Wrong !\n"); - } } if (slice_type == SLICE_TYPE_B) { diff --git a/src/gen9_mfc_hevc.c b/src/gen9_mfc_hevc.c index ad5e936..7435d2a 100644 --- a/src/gen9_mfc_hevc.c +++ b/src/gen9_mfc_hevc.c @@ -714,10 +714,6 @@ gen9_hcpe_ref_idx_state_1(struct intel_batchbuffer *batch, WARN_ONCE("RefPicList 0 or 1 is not found in DPB!\n"); } - if(num_ref_minus1 == 0 && frame_index == 1 && list == 0){ - WARN_ONCE("Input ref list is Wrong !\n"); - } - BEGIN_BCS_BATCH(batch, 18); OUT_BCS_BATCH(batch, HCP_REF_IDX_STATE | (18 - 2)); |