diff options
| author | Xiang, Haihao <haihao.xiang@intel.com> | 2016-11-11 00:48:02 +0800 |
|---|---|---|
| committer | Xiang, Haihao <haihao.xiang@intel.com> | 2016-11-18 16:27:10 +0800 |
| commit | b821935859c7549cb68c02c211a5055f241d4d42 (patch) | |
| tree | 2a6cefa1e0937e6cf1b832b3c6fe066f9ee6fd0b | |
| parent | ee39bc5f0b5cf4c0a7e495a5e61a942e1bb184e1 (diff) | |
Rename gen9_gpe_mi_store_data_imm() to gen8_gpe_mi_store_data_imm()
This function can be used on GEN8 too
Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com>
Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
| -rw-r--r-- | src/gen9_vdenc.c | 4 | ||||
| -rw-r--r-- | src/gen9_vp9_encoder.c | 4 | ||||
| -rw-r--r-- | src/i965_gpe_utils.c | 2 | ||||
| -rw-r--r-- | src/i965_gpe_utils.h | 2 |
4 files changed, 6 insertions, 6 deletions
diff --git a/src/gen9_vdenc.c b/src/gen9_vdenc.c index 87e587a..8cddc41 100644 --- a/src/gen9_vdenc.c +++ b/src/gen9_vdenc.c @@ -1501,7 +1501,7 @@ gen9_vdenc_huc_store_huc_status2(VADriverContextP ctx, mi_store_data_imm_params.bo = vdenc_context->huc_status2_res.bo; mi_store_data_imm_params.offset = 0; mi_store_data_imm_params.dw0 = (1 << 6); - gen9_gpe_mi_store_data_imm(ctx, batch, &mi_store_data_imm_params); + gen8_gpe_mi_store_data_imm(ctx, batch, &mi_store_data_imm_params); /* Store HUC_STATUS2 */ memset(&mi_store_register_mem_params, 0, sizeof(mi_store_register_mem_params)); @@ -2363,7 +2363,7 @@ gen9_vdenc_huc_brc_update(VADriverContextP ctx, mi_store_data_imm_params.bo = vdenc_context->huc_status_res.bo; mi_store_data_imm_params.offset = 4; mi_store_data_imm_params.dw0 = (1 << 31); - gen9_gpe_mi_store_data_imm(ctx, batch, &mi_store_data_imm_params); + gen8_gpe_mi_store_data_imm(ctx, batch, &mi_store_data_imm_params); } static void diff --git a/src/gen9_vp9_encoder.c b/src/gen9_vp9_encoder.c index a617eb0..4b80716 100644 --- a/src/gen9_vp9_encoder.c +++ b/src/gen9_vp9_encoder.c @@ -1087,7 +1087,7 @@ gen9_run_kernel_media_object(VADriverContextP ctx, mi_store_data_imm.bo = status_buffer->bo; mi_store_data_imm.offset = status_buffer->media_index_offset; mi_store_data_imm.dw0 = media_function; - gen9_gpe_mi_store_data_imm(ctx, batch, &mi_store_data_imm); + gen8_gpe_mi_store_data_imm(ctx, batch, &mi_store_data_imm); intel_batchbuffer_emit_mi_flush(batch); gen9_gpe_pipeline_setup(ctx, gpe_context, batch); @@ -1126,7 +1126,7 @@ gen9_run_kernel_media_object_walker(VADriverContextP ctx, mi_store_data_imm.bo = status_buffer->bo; mi_store_data_imm.offset = status_buffer->media_index_offset; mi_store_data_imm.dw0 = media_function; - gen9_gpe_mi_store_data_imm(ctx, batch, &mi_store_data_imm); + gen8_gpe_mi_store_data_imm(ctx, batch, &mi_store_data_imm); gen9_gpe_pipeline_setup(ctx, gpe_context, batch); gen8_gpe_media_object_walker(ctx, gpe_context, batch, param); diff --git a/src/i965_gpe_utils.c b/src/i965_gpe_utils.c index 9ca4196..85cdd50 100644 --- a/src/i965_gpe_utils.c +++ b/src/i965_gpe_utils.c @@ -1512,7 +1512,7 @@ gen9_gpe_mi_flush_dw(VADriverContextP ctx, } void -gen9_gpe_mi_store_data_imm(VADriverContextP ctx, +gen8_gpe_mi_store_data_imm(VADriverContextP ctx, struct intel_batchbuffer *batch, struct gpe_mi_store_data_imm_parameter *params) { diff --git a/src/i965_gpe_utils.h b/src/i965_gpe_utils.h index 323af74..e6cc3dc 100644 --- a/src/i965_gpe_utils.h +++ b/src/i965_gpe_utils.h @@ -366,7 +366,7 @@ void gen9_gpe_mi_flush_dw(VADriverContextP ctx, struct intel_batchbuffer *batch, struct gpe_mi_flush_dw_parameter *params); -void gen9_gpe_mi_store_data_imm(VADriverContextP ctx, +void gen8_gpe_mi_store_data_imm(VADriverContextP ctx, struct intel_batchbuffer *batch, struct gpe_mi_store_data_imm_parameter *params); |