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authorXiang, Haihao <haihao.xiang@intel.com>2016-11-11 00:16:06 +0800
committerXiang, Haihao <haihao.xiang@intel.com>2016-11-18 16:27:05 +0800
commitee39bc5f0b5cf4c0a7e495a5e61a942e1bb184e1 (patch)
treeb2c17f635de8888744230b167ef7bb5e6e73f890
parent0e0da9f6361fddf099f46823b444ed4f5420962d (diff)
Rename gen9_gpe_mi_batch_buffer_start() to gen8_gpe_mi_batch_buffer_start()
This function can be used on GEN8 too Signed-off-by: Xiang, Haihao <haihao.xiang@intel.com> Reviewed-by: Zhao Yakui <yakui.zhao@intel.com>
-rw-r--r--src/gen9_vdenc.c2
-rw-r--r--src/gen9_vp9_encoder.c6
-rw-r--r--src/i965_gpe_utils.c2
-rw-r--r--src/i965_gpe_utils.h2
4 files changed, 6 insertions, 6 deletions
diff --git a/src/gen9_vdenc.c b/src/gen9_vdenc.c
index 2bc15b7..87e587a 100644
--- a/src/gen9_vdenc.c
+++ b/src/gen9_vdenc.c
@@ -3459,7 +3459,7 @@ gen9_vdenc_mfx_vdenc_pipeline(VADriverContextP ctx,
memset(&mi_batch_buffer_start_params, 0, sizeof(mi_batch_buffer_start_params));
mi_batch_buffer_start_params.is_second_level = 1; /* Must be the second level batch buffer */
mi_batch_buffer_start_params.bo = vdenc_context->second_level_batch_res.bo;
- gen9_gpe_mi_batch_buffer_start(ctx, batch, &mi_batch_buffer_start_params);
+ gen8_gpe_mi_batch_buffer_start(ctx, batch, &mi_batch_buffer_start_params);
}
gen9_vdenc_mfx_avc_qm_state(ctx, encoder_context);
diff --git a/src/gen9_vp9_encoder.c b/src/gen9_vp9_encoder.c
index 34d09a6..a617eb0 100644
--- a/src/gen9_vp9_encoder.c
+++ b/src/gen9_vp9_encoder.c
@@ -5622,7 +5622,7 @@ gen9_vp9_pak_picture_level(VADriverContextP ctx,
second_level_batch.is_second_level = 1;
second_level_batch.bo = pak_context->res_pic_state_brc_write_hfw_read_buffer.bo;
- gen9_gpe_mi_batch_buffer_start(ctx, batch, &second_level_batch);
+ gen8_gpe_mi_batch_buffer_start(ctx, batch, &second_level_batch);
if (pic_param->pic_flags.bits.segmentation_enabled &&
seg_param)
@@ -5644,13 +5644,13 @@ gen9_vp9_pak_picture_level(VADriverContextP ctx,
second_level_batch.offset = 0;
second_level_batch.bo = pak_context->res_pak_uncompressed_input_buffer.bo;
- gen9_gpe_mi_batch_buffer_start(ctx, batch, &second_level_batch);
+ gen8_gpe_mi_batch_buffer_start(ctx, batch, &second_level_batch);
/* PAK_OBJECT */
second_level_batch.is_second_level = 1;
second_level_batch.offset = 0;
second_level_batch.bo = pak_context->res_mb_code_surface.bo;
- gen9_gpe_mi_batch_buffer_start(ctx, batch, &second_level_batch);
+ gen8_gpe_mi_batch_buffer_start(ctx, batch, &second_level_batch);
return;
}
diff --git a/src/i965_gpe_utils.c b/src/i965_gpe_utils.c
index c2d06b2..9ca4196 100644
--- a/src/i965_gpe_utils.c
+++ b/src/i965_gpe_utils.c
@@ -1611,7 +1611,7 @@ gen9_gpe_mi_conditional_batch_buffer_end(VADriverContextP ctx,
}
void
-gen9_gpe_mi_batch_buffer_start(VADriverContextP ctx,
+gen8_gpe_mi_batch_buffer_start(VADriverContextP ctx,
struct intel_batchbuffer *batch,
struct gpe_mi_batch_buffer_start_parameter *params)
{
diff --git a/src/i965_gpe_utils.h b/src/i965_gpe_utils.h
index b58a02c..323af74 100644
--- a/src/i965_gpe_utils.h
+++ b/src/i965_gpe_utils.h
@@ -394,7 +394,7 @@ void gen9_gpe_mi_conditional_batch_buffer_end(VADriverContextP ctx,
struct intel_batchbuffer *batch,
struct gpe_mi_conditional_batch_buffer_end_parameter *params);
-void gen9_gpe_mi_batch_buffer_start(VADriverContextP ctx,
+void gen8_gpe_mi_batch_buffer_start(VADriverContextP ctx,
struct intel_batchbuffer *batch,
struct gpe_mi_batch_buffer_start_parameter *params);