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authorJunyan He <junyan.he@linux.intel.com>2015-12-10 15:04:25 +0800
committerYang Rong <rong.r.yang@intel.com>2015-12-14 15:11:44 +0800
commit1f030e70ae8123b388076974aa2501bd98eb6b4b (patch)
tree7d29b0f2a0fcb2f9fa2a2c0fe70a19ee741dee22
parent99f968ddd378e2c957c37d99c2b9f408ceb7ce38 (diff)
Backend: Add state register into schedule consideration.
Because the workgroup OP has forwarding msg and wait functions, it needs all the threads to sync with each other. It has very similar behavior as BARRIER, so we add it into schedule consideration accordingly. Signed-off-by: Junyan He <junyan.he@linux.intel.com> Reviewed-by: Yang Rong <rong.r.yang@intel.com>
-rw-r--r--backend/src/backend/gen_insn_scheduling.cpp16
1 files changed, 12 insertions, 4 deletions
diff --git a/backend/src/backend/gen_insn_scheduling.cpp b/backend/src/backend/gen_insn_scheduling.cpp
index c413bac0..245d17a5 100644
--- a/backend/src/backend/gen_insn_scheduling.cpp
+++ b/backend/src/backend/gen_insn_scheduling.cpp
@@ -199,8 +199,10 @@ namespace gbe
static const uint32_t MAX_ACC_REGISTER = 1u;
/*! Maximum number of *physical* tm registers */
static const uint32_t MAX_TM_REGISTER = 1u;
+ /*! Maximum number of state registers */
+ static const uint32_t MAX_ST_REGISTER = 2u;
/*! Maximum number of *physical* arf registers */
- static const uint32_t MAX_ARF_REGISTER = MAX_FLAG_REGISTER + MAX_ACC_REGISTER + MAX_TM_REGISTER;
+ static const uint32_t MAX_ARF_REGISTER = MAX_FLAG_REGISTER + MAX_ACC_REGISTER + MAX_TM_REGISTER + MAX_ST_REGISTER;
/*! Stores the last node that wrote to a register / memory ... */
vector<ScheduleDAGNode*> nodes;
/*! store nodes each node depends on */
@@ -343,6 +345,9 @@ namespace gbe
return grfNum + MAX_FLAG_REGISTER + nr;
} else if (file == GEN_ARF_TM) {
return grfNum + MAX_FLAG_REGISTER + MAX_ACC_REGISTER;
+ } else if (file == GEN_ARF_STATE) {
+ GBE_ASSERT(nr < MAX_ST_REGISTER);
+ return grfNum + MAX_FLAG_REGISTER + MAX_ACC_REGISTER + MAX_TM_REGISTER + nr;
} else {
NOT_SUPPORTED;
return 0;
@@ -510,7 +515,8 @@ namespace gbe
// Consider barriers and wait are reading memory (local and global)
if (insn.opcode == SEL_OP_BARRIER ||
insn.opcode == SEL_OP_FENCE ||
- insn.opcode == SEL_OP_WAIT) {
+ insn.opcode == SEL_OP_WAIT ||
+ insn.opcode == SEL_OP_WORKGROUP_OP) {
const uint32_t memIndex = tracker.getMemoryIndex();
tracker.addDependency(node, memIndex, READ_AFTER_WRITE);
}
@@ -572,7 +578,8 @@ namespace gbe
// Consider barriers and wait are reading memory (local and global)
if (insn.opcode == SEL_OP_BARRIER ||
insn.opcode == SEL_OP_FENCE ||
- insn.opcode == SEL_OP_WAIT) {
+ insn.opcode == SEL_OP_WAIT ||
+ insn.opcode == SEL_OP_WORKGROUP_OP) {
const uint32_t memIndex = tracker.getMemoryIndex();
tracker.addDependency(memIndex, node, WRITE_AFTER_READ);
}
@@ -602,7 +609,8 @@ namespace gbe
|| node->insn.opcode == SEL_OP_BARRIER
|| node->insn.opcode == SEL_OP_CALC_TIMESTAMP
|| node->insn.opcode == SEL_OP_STORE_PROFILING
- || node->insn.opcode == SEL_OP_WAIT)
+ || node->insn.opcode == SEL_OP_WAIT
+ || node->insn.opcode == SEL_OP_WORKGROUP_OP)
tracker.makeBarrier(insnID, insnNum);
}