diff options
| author | Jerome Glisse <jglisse@redhat.com> | 2012-08-08 16:42:06 -0400 |
|---|---|---|
| committer | Jerome Glisse <jglisse@redhat.com> | 2012-08-08 16:42:06 -0400 |
| commit | 38f3ccea3a764425f8d63b2b7df7221c1da840a8 (patch) | |
| tree | 249a02e324350abca844550fb4718fbed3f87dc7 | |
| parent | ba590cc8984b6e7b06f02f1e26404e4eb0e6edcd (diff) | |
add hd5xxx compute register and fields
| -rw-r--r-- | hd5xxx.rdb | 44 |
1 files changed, 44 insertions, 0 deletions
@@ -35,6 +35,8 @@ DOM 0x0000010c TEX_RESOURCE DOM 0x0000010d UNKNOWN DOM 0x0000010e VTX_RESOURCE IT 0x00000010 NOP +IT 0x00000015 DISPATCH_DIRECT +IT 0x00000016 DISPATCH_INDIRECT IT 0x00000017 INDIRECT_BUFFER_END IT 0x00000020 SET_PREDICATION IT 0x00000021 REG_RMW @@ -283,6 +285,14 @@ REG 0x00008968 0x00000103 0x00000010 32 0 1 0 VGT_STRMOUT_BUFFER_FILLED REG 0x0000896c 0x00000103 0x00000010 32 0 1 0 VGT_STRMOUT_BUFFER_FILLED_SIZE_3 REG 0x00008970 0x00000103 0x00000010 32 0 1 0 VGT_NUM_INDICES REG 0x00008974 0x00000103 0x00000010 32 0 1 0 VGT_NUM_INSTANCES +REG 0x0000899c 0x00000103 0x00000010 32 0 1 0 VGT_COMPUTE_START_X +FLD 0 0xffffffff 0x00000000 0 START +REG 0x000089a0 0x00000103 0x00000010 32 0 1 0 VGT_COMPUTE_START_Y +FLD 0 0xffffffff 0x00000000 0 START +REG 0x000089a4 0x00000103 0x00000010 32 0 1 0 VGT_COMPUTE_START_Z +FLD 0 0xffffffff 0x00000000 0 START +REG 0x000089ac 0x00000103 0x00000010 32 0 1 0 VGT_COMPUTE_THREAD_GROUP_SIZE +FLD 0 0x00000fff 0x00000000 0 SIZE REG 0x00008a10 0x00000103 0x00000006 32 0 1 0 PA_CL_CNTL_STATUS FLD 31 0x00000001 0x00000000 0 CL_BUSY REG 0x00008a14 0x00000103 0x00000006 32 0 1 0 PA_CL_ENHANCE @@ -1736,6 +1746,8 @@ REG 0x00008e14 0x00000103 0x00000000 32 0 1 0 SQ_LSTMP_RING_SIZE REG 0x00008e18 0x00000103 0x00000000 32 0 1 0 SQ_HSTMP_RING_BASE REG 0x00008e1c 0x00000103 0x00000000 32 0 1 0 SQ_HSTMP_RING_SIZE REG 0x00008e2c 0x00000103 0x00000000 32 0 1 0 SQ_LDS_RESOURCE_MGMT +FLD 0 0x0000ffff 0x00000000 0 NUM_PS_LDS +FLD 16 0x0000ffff 0x00000000 0 NUM_LS_LDS REG 0x00028000 0x00000104 0x00000003 32 0 1 0 DB_RENDER_CONTROL FLD 0 0x00000001 0x00000000 0 DEPTH_CLEAR_ENABLE FLD 1 0x00000001 0x00000000 0 STENCIL_CLEAR_ENABLE @@ -1952,6 +1964,8 @@ REG 0x000282d0 0x00000104 0x00000006 32 0 16 8 PA_SC_VPORT_ZMIN REG 0x000282d4 0x00000104 0x00000006 32 0 16 8 PA_SC_VPORT_ZMAX REG 0x00028350 0x00000104 0x0000000d 32 0 1 0 SX_MISC FLD 0 0x00000001 0x00000000 0 MULTIPASS +REG 0x00028358 0x00000104 0x0000000d 32 0 1 0 SX_SCATTER_EXPORT_BASE +REG 0x0002835c 0x00000104 0x0000000d 32 0 1 0 SX_SCATTER_EXPORT_SIZE REG 0x00028380 0x00000104 0x00000000 32 0 32 4 SQ_VTX_SEMANTIC FLD 0 0x000000ff 0x00000000 0 SEMANTIC_ID REG 0x00028400 0x00000104 0x00000010 32 0 1 0 VGT_MAX_VTX_INDX @@ -2085,6 +2099,20 @@ VAL 0x00000000 X_OFF REG 0x000286e4 0x00000104 0x00000000 32 0 1 0 SPI_PS_IN_CONTROL_2 FLD 0 0x000000ff 0x00000000 0 LINE_STIPPLE_TEX_ADDR FLD 8 0x00000001 0x00000000 0 LINE_STIPPLE_TEX_ENA +REG 0x000286e8 0x00000104 0x00000000 32 0 1 0 SPI_COMPUTE_INPUT_CNTL +FLD 0 0x00000001 0x00000000 0 TID_IN_GROUP_ENA +FLD 1 0x00000001 0x00000000 0 TGID_ENA +FLD 2 0x00000001 0x00000000 0 DISABLE_INDEX_PACK +REG 0x000286ec 0x00000104 0x00000000 32 0 1 0 SPI_COMPUTE_NUM_THREAD_X +FLD 0 0x0000ffff 0x00000000 0 NUM_THREAD +REG 0x000286f0 0x00000104 0x00000000 32 0 1 0 SPI_COMPUTE_NUM_THREAD_Y +FLD 0 0x0000ffff 0x00000000 0 NUM_THREAD +REG 0x000286f4 0x00000104 0x00000000 32 0 1 0 SPI_COMPUTE_NUM_THREAD_Z +FLD 0 0x0000ffff 0x00000000 0 NUM_THREAD +REG 0x00028720 0x00000104 0x00000000 32 0 1 0 GDS_ADDR_BASE +REG 0x00028724 0x00000104 0x00000000 32 0 1 0 GDS_ADDR_SIZE +REG 0x00028728 0x00000104 0x00000000 32 0 1 0 GDS_ORDERED_WAVE_PER_SE +FLD 0 0x000003ff 0x00000000 0 COUNT REG 0x00028780 0x00000104 0x00000001 32 0 8 4 CB_BLEND_CONTROL FLD 0 0x0000001f 0x00000000 0 COLOR_SRCBLEND VAL 0x00000000 BLEND_ZERO @@ -2445,6 +2473,12 @@ FLD 0 0x00007fff 0x00000000 0 ITEMSIZE REG 0x00028834 0x00000104 0x00000000 32 0 1 0 SQ_HSTMP_RING_ITEMSIZE FLD 0 0x00007fff 0x00000000 0 ITEMSIZE REG 0x00028838 0x00000104 0x00000000 32 0 1 0 SQ_DYN_GPR_RESOURCE_LIMIT_1 +FLD 0 0x0000001f 0x00000000 0 PS_GPRS +FLD 5 0x0000001f 0x00000000 0 VS_GPRS +FLD 10 0x0000001f 0x00000000 0 GS_GPRS +FLD 15 0x0000001f 0x00000000 0 ES_GPRS +FLD 20 0x0000001f 0x00000000 0 HS_GPRS +FLD 25 0x0000001f 0x00000000 0 LS_GPRS REG 0x00028840 0x00000104 0x00000000 32 0 1 0 SQ_PGM_START_PS REG 0x00028844 0x00000104 0x00000000 32 0 1 0 SQ_PGM_RESOURCES_PS FLD 0 0x000000ff 0x00000000 0 NUM_GPRS @@ -2579,6 +2613,9 @@ FLD 4 0x00000001 0x00000000 0 ALLOW_SINGLE_DENORM_IN FLD 5 0x00000001 0x00000000 0 ALLOW_SINGLE_DENORM_OUT FLD 6 0x00000001 0x00000000 0 ALLOW_DOUBLE_DENORM_IN FLD 7 0x00000001 0x00000000 0 ALLOW_DOUBLE_DENORM_OUT +REG 0x000288e8 0x00000104 0x00000000 32 0 1 0 SQ_LDS_ALLOC +FLD 0 0x00003fff 0x00000000 0 SIZE +FLD 14 0x000000ff 0x00000000 0 HS_NUM_WAVES REG 0x000288ec 0x00000104 0x00000000 32 0 1 0 SQ_LDS_ALLOC_PS REG 0x000288f0 0x00000104 0x00000000 32 0 1 0 SQ_VTX_SEMANTIC_CLEAR REG 0x00028900 0x00000104 0x00000000 32 0 1 0 SQ_ESGS_RING_ITEMSIZE @@ -2787,6 +2824,11 @@ VAL 0x00000001 GS_CUT_512 VAL 0x00000002 GS_CUT_256 VAL 0x00000003 GS_CUT_128 FLD 8 0x00000001 0x00000000 0 MODE_HI +FLD 14 0x00000001 0x00000000 0 COMPUTE_MODE +FLD 15 0x00000001 0x00000000 0 FAST_COMPUTE_MODE +FLD 16 0x00000001 0x00000000 0 ELEMENT_INFO_EN +FLD 17 0x00000001 0x00000000 0 PARTIAL_THD_AT_EOI +FLD 18 0x00000001 0x00000000 0 SUPPRESS_CUTS REG 0x00028a48 0x00000104 0x00000006 32 0 1 0 PA_SC_MODE_CNTL_0 FLD 0 0x00000001 0x00000000 0 MSAA_ENABLE FLD 1 0x00000001 0x00000000 0 VPORT_SCISSOR_ENABLE @@ -2986,6 +3028,8 @@ FLD 10 0x00000003 0x00000000 0 ALPHA_TO_MASK_OFFSET1 FLD 12 0x00000003 0x00000000 0 ALPHA_TO_MASK_OFFSET2 FLD 14 0x00000003 0x00000000 0 ALPHA_TO_MASK_OFFSET3 FLD 16 0x00000001 0x00000000 0 OFFSET_ROUND +REG 0x00028b74 0x00000104 0x00000010 32 0 1 0 VGT_DISPATCH_INITIATOR +FLD 0 0x00000001 0x00000000 0 COMPUTE_SHADER_EN REG 0x00028b78 0x00000104 0x00000006 32 0 1 0 PA_SU_POLY_OFFSET_DB_FMT_CNTL FLD 0 0x000000ff 0x00000000 0 POLY_OFFSET_NEG_NUM_DB_BITS FLD 8 0x00000001 0x00000000 0 POLY_OFFSET_DB_IS_FLOAT_FMT |