rdb: register database

21 files changed, 16835 insertions, 0 deletions

diff --git a/Makefile b/Makefile
new file mode 100644
index 0000000..ba4dccb
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,86 @@
+CC = gcc
+CFLAGS = -I . -g -O0 -Wall -std=c99 -D_BSD_SOURCE
+
+SAN_C = rdb_sanitize.c rdb.c
+SAN_O = $(SAN_C:.c=.o)
+
+RD_C = rdb_read.c rdb.c
+RD_O = $(RD_C:.c=.o)
+
+RH_C = rdb_header.c rdb.c
+RH_O = $(RH_C:.c=.o)
+
+RDB_C = rdb_build.c rdb.c
+RDB_O = $(RDB_C:.c=.o)
+
+RDB2_C = rdb_build2.c rdb.c
+RDB2_O = $(RDB2_C:.c=.o)
+
+PRG_C = rdb_preg.c rdb.c
+PRG_O = $(PRG_C:.c=.o)
+
+RUP_C = rdb_update.c rdb.c
+RUP_O = $(RUP_C:.c=.o)
+
+ANN_C = rdb_anotate.c rdb.c
+ANN_O = $(ANN_C:.c=.o)
+
+ANN2_C = rdb_annotateib.c rdb.c
+ANN2_O = $(ANN2_C:.c=.o)
+
+ANN3_C = rdb_annotateib2.c rdb.c
+ANN3_O = $(ANN3_C:.c=.o)
+
+ICM_C = rdb_cmpib.c rdb.c
+ICM_O = $(ICM_C:.c=.o)
+
+TARGETS = rdb_sanitize rdb_read rdb_preg rdb_build rdb_anotate rdb_build2 \
+	rdb_update rdb_annotateib rdb_cmpib rdb_annotateib2 rdb_header
+
+##### RULES #####
+.SUFFIXES:
+.SUFFIXES: .c .o
+
+.c.o:
+	$(CC) -c $(CFLAGS) $<
+
+##### TARGETS #####
+
+all: $(TARGETS)
+
+rdb_sanitize: $(SAN_O)
+	$(CC) -o $@ $(SAN_O)
+
+rdb_read: $(RD_O)
+	$(CC) -o $@ $(RD_O)
+
+rdb_header: $(RH_O)
+	$(CC) -o $@ $(RH_O)
+
+rdb_preg: $(PRG_O)
+	$(CC) -o $@ $(PRG_O)
+
+rdb_build: $(RDB_O)
+	$(CC) -o $@ $(RDB_O)
+
+rdb_build2: $(RDB2_O)
+	$(CC) -o $@ $(RDB2_O)
+
+rdb_anotate: $(ANN_O)
+	$(CC) -o $@ $(ANN_O)
+
+rdb_annotateib: $(ANN2_O)
+	$(CC) -o $@ $(ANN2_O)
+
+rdb_annotateib2: $(ANN3_O)
+	$(CC) -o $@ $(ANN3_O)
+
+rdb_update: $(RUP_O)
+	$(CC) -o $@ $(RUP_O)
+
+rdb_cmpib: $(ICM_O)
+	$(CC) -o $@ $(ICM_O)
+
+clean:
+	rm -f $(TARGETS)
+	rm -f *.o
diff --git a/hd2xxx.rdb b/hd2xxx.rdb
new file mode 100644
index 0000000..81adf6f
--- /dev/null
+++ b/hd2xxx.rdb
@@ -0,0 +1,4046 @@
+BLK 0x00000000 GENERAL
+BLK 0x00000001 CB
+BLK 0x00000002 CP
+BLK 0x00000003 DB
+BLK 0x00000004 IH
+BLK 0x00000005 MC
+BLK 0x00000006 PA
+BLK 0x00000007 PCIE
+BLK 0x00000008 PWR
+BLK 0x00000009 RLC
+BLK 0x0000000a SAMPLER
+BLK 0x0000000b SC
+BLK 0x0000000c SHADER
+BLK 0x0000000d SMX
+BLK 0x0000000e SPI
+BLK 0x0000000f TEXTURE_UNIT
+BLK 0x00000010 VGT
+BLK 0x00000011 VM
+DOM 0x00000000 MMIO
+DOM 0x00000001 PIO
+DOM 0x00000002 PCI
+DOM 0x00000003 PCIE
+DOM 0x00000101 ALU_CONST
+DOM 0x00000102 BOOL_CONST
+DOM 0x00000103 CONFIG
+DOM 0x00000104 CONTEXT
+DOM 0x00000105 CTL_CONST
+DOM 0x00000106 LOOP_CONST
+DOM 0x00000107 MC
+DOM 0x00000108 GPU_PCIE
+DOM 0x00000109 SAMPLER
+DOM 0x0000010a SHADER
+DOM 0x0000010b TEX_RESOURCE
+DOM 0x0000010c VTX_RESOURCE
+IT  0x00000010 NOP
+IT  0x00000017 INDIRECT_BUFFER_END
+IT  0x00000020 SET_PREDICATION
+IT  0x00000021 REG_RMW
+IT  0x00000022 COND_EXEC
+IT  0x00000023 PRED_EXEC
+IT  0x00000024 START_3D_CMDBUF
+IT  0x00000027 DRAW_INDEX_2
+IT  0x00000028 CONTEXT_CONTROL
+IT  0x00000029 DRAW_INDEX_IMMD_BE
+IT  0x0000002a INDEX_TYPE
+IT  0x0000002b DRAW_INDEX
+IT  0x0000002d DRAW_INDEX_AUTO
+IT  0x0000002e DRAW_INDEX_IMMD
+IT  0x0000002f NUM_INSTANCES
+IT  0x00000032 INDIRECT_BUFFER
+IT  0x00000034 STRMOUT_BUFFER_UPDATE
+IT  0x00000038 INDIRECT_BUFFER_MP
+IT  0x00000039 MEM_SEMAPHORE
+IT  0x0000003a MPEG_INDEX
+IT  0x0000003c WAIT_REG_MEM
+IT  0x0000003d MEM_WRITE
+IT  0x00000040 CP_INTERRUPT
+IT  0x00000043 SURFACE_SYNC
+IT  0x00000044 ME_INITIALIZE
+IT  0x00000045 COND_WRITE
+IT  0x00000046 EVENT_WRITE
+IT  0x00000047 EVENT_WRITE_EOP
+IT  0x00000057 ONE_REG_WRITE
+IT  0x00000068 SET_CONFIG_REG
+IT  0x00000069 SET_CONTEXT_REG
+IT  0x0000006a SET_ALU_CONST
+IT  0x0000006b SET_BOOL_CONST
+IT  0x0000006c SET_LOOP_CONST
+IT  0x0000006d SET_RESOURCE
+IT  0x0000006e SET_SAMPLER
+IT  0x0000006f SET_CTL_CONST
+IT  0x00000073 SURFACE_BASE_UPDATE
+RNG 0x00000103 0x00008000 0x0000ac00 CONFIG
+RNG 0x00000104 0x00028000 0x00029000 CONTEXT
+RNG 0x00000101 0x00030000 0x00032000 ALU_CONST
+RNG 0x0000010b 0x00038000 0x0003c000 TEX_RESOURCE
+RNG 0x0000010c 0x00038000 0x0003c000 VTX_RESOURCE
+RNG 0x00000109 0x0003c000 0x0003cff0 SAMPLER
+RNG 0x00000105 0x0003cff0 0x0003e200 CTL_CONST
+RNG 0x00000106 0x0003e200 0x0003e380 LOOP_CONST
+RNG 0x00000102 0x0003e380 0x0003e38c BOOL_CONST
+REG 0x00000038 0x00000000 0x00000007 32    0    1    0 PCIE_PORT_INDEX
+REG 0x0000003c 0x00000000 0x00000007 32    0    1    0 PCIE_PORT_DATA
+REG 0x00000600 0x00000000 0x00000008 32    0    1    0 CG_SPLL_FUNC_CNTL
+FLD  3 0x00000001 0x00000000 3 SPLL_BYPASS_EN
+REG 0x0000060c 0x00000000 0x00000008 32    0    1    0 CG_SPLL_STATUS
+FLD  1 0x00000001 0x00000000 3 SPLL_CHG_STATUS
+REG 0x00000618 0x00000000 0x00000008 32    0    1    0 GENERAL_PWRMGT
+FLD 11 0x00000001 0x00000000 3 OPEN_DRAIN_PADS
+REG 0x00000710 0x00000000 0x00000000 32    0    1    0 LOWER_GPIO_ENABLE
+REG 0x00000718 0x00000000 0x00000000 32    0    1    0 CTXSW_VID_LOWER_GPIO_CNTL
+REG 0x0000071c 0x00000000 0x00000000 32    0    1    0 HIGH_VID_LOWER_GPIO_CNTL
+REG 0x00000720 0x00000000 0x00000000 32    0    1    0 MEDIUM_VID_LOWER_GPIO_CNTL
+REG 0x00000724 0x00000000 0x00000000 32    0    1    0 LOW_VID_LOWER_GPIO_CNTL
+REG 0x000007f4 0x00000000 0x00000000 32    0    1    0 CG_THERMAL_STATUS
+FLD  0 0x000001ff 0x00000000 3 ASIC_T
+REG 0x00000e50 0x00000000 0x00000000 32    0    1    0 SRBM_STATUS
+FLD  3 0x00000001 0x00000000 3 RLC_RQ_PENDING
+FLD  4 0x00000001 0x00000000 3 RCU_RQ_PENDING
+FLD  5 0x00000001 0x00000000 3 GRBM_RQ_PENDING
+FLD  6 0x00000001 0x00000000 3 HI_RQ_PENDING
+FLD  7 0x00000001 0x00000000 3 IO_EXTERN_SIGNAL
+FLD  8 0x00000001 0x00000000 3 VMC_BUSY
+FLD  9 0x00000001 0x00000000 3 MCB_BUSY
+FLD 10 0x00000001 0x00000000 3 MCDZ_BUSY
+FLD 11 0x00000001 0x00000000 3 MCDY_BUSY
+FLD 12 0x00000001 0x00000000 3 MCDX_BUSY
+FLD 13 0x00000001 0x00000000 3 MCDW_BUSY
+FLD 14 0x00000001 0x00000000 3 SEM_BUSY
+FLD 15 0x00000001 0x00000000 3 SRBM_STATUS__RLC_BUSY
+FLD 16 0x00000001 0x00000000 3 PDMA_BUSY
+FLD 17 0x00000001 0x00000000 3 IH_BUSY
+FLD 20 0x00000001 0x00000000 3 CSC_BUSY
+FLD 21 0x00000001 0x00000000 3 CMC7_BUSY
+FLD 22 0x00000001 0x00000000 3 CMC6_BUSY
+FLD 23 0x00000001 0x00000000 3 CMC5_BUSY
+FLD 24 0x00000001 0x00000000 3 CMC4_BUSY
+FLD 25 0x00000001 0x00000000 3 CMC3_BUSY
+FLD 26 0x00000001 0x00000000 3 CMC2_BUSY
+FLD 27 0x00000001 0x00000000 3 CMC1_BUSY
+FLD 28 0x00000001 0x00000000 3 CMC0_BUSY
+FLD 29 0x00000001 0x00000000 3 BIF_BUSY
+FLD 30 0x00000001 0x00000000 3 IDCT_BUSY
+REG 0x00000e60 0x00000000 0x00000000 32    0    1    0 SRBM_SOFT_RESET
+FLD  1 0x00000001 0x00000000 3 SOFT_RESET_BIF
+FLD  2 0x00000001 0x00000000 3 SOFT_RESET_CG
+FLD  3 0x00000001 0x00000000 3 SOFT_RESET_CMC
+FLD  4 0x00000001 0x00000000 3 SOFT_RESET_CSC
+FLD  5 0x00000001 0x00000000 3 SOFT_RESET_DC
+FLD  8 0x00000001 0x00000000 3 SOFT_RESET_GRBM
+FLD  9 0x00000001 0x00000000 3 SOFT_RESET_HDP
+FLD 10 0x00000001 0x00000000 3 SOFT_RESET_IH
+FLD 11 0x00000001 0x00000000 3 SOFT_RESET_MC
+FLD 13 0x00000001 0x00000000 3 SOFT_RESET_RLC
+FLD 14 0x00000001 0x00000000 3 SOFT_RESET_ROM
+FLD 15 0x00000001 0x00000000 3 SOFT_RESET_SEM
+FLD 16 0x00000001 0x00000000 3 SOFT_RESET_TSC
+FLD 17 0x00000001 0x00000000 3 SOFT_RESET_VMC
+REG 0x00000e98 0x00000000 0x00000000 32    0    1    0 SRBM_READ_ERROR
+FLD  2 0x0000ffff 0x00000000 3 READ_ADDRESS
+FLD 24 0x00000001 0x00000000 3 READ_REQUESTER_HI
+FLD 25 0x00000001 0x00000000 3 READ_REQUESTER_GRBM
+FLD 26 0x00000001 0x00000000 3 READ_REQUESTER_RCU
+FLD 27 0x00000001 0x00000000 3 READ_REQUESTER_RLC
+FLD 31 0x00000001 0x00000000 3 READ_ERROR
+REG 0x00000ea4 0x00000000 0x00000000 32    0    1    0 SRBM_INT_STATUS
+FLD  0 0x00000001 0x00000000 3 RDERR_INT_STAT
+FLD  1 0x00000001 0x00000000 3 GFX_CNTX_SWITCH_INT_STAT
+REG 0x00000ea8 0x00000000 0x00000000 32    0    1    0 SRBM_INT_ACK
+FLD  0 0x00000001 0x00000000 3 RDERR_INT_ACK
+FLD  1 0x00000001 0x00000000 3 GFX_CNTX_SWITCH_INT_ACK
+REG 0x00001400 0x00000000 0x00000011 32    0    1    0 VM_L2_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L2_CACHE
+FLD  1 0x00000001 0x00000000 3 ENABLE_L2_FRAGMENT_PROCESSING
+FLD  9 0x00000001 0x00000000 3 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE
+FLD 13 0x00000007 0x00000000 3 EFFECTIVE_L2_QUEUE_SIZE
+REG 0x00001404 0x00000000 0x00000011 32    0    1    0 VM_L2_CNTL2
+FLD  0 0x00000001 0x00000000 3 INVALIDATE_ALL_L1_TLBS
+FLD  1 0x00000001 0x00000000 3 INVALIDATE_L2_CACHE
+REG 0x00001408 0x00000000 0x00000011 32    0    1    0 VM_L2_CNTL3
+FLD  0 0x0000001f 0x00000000 3 BANK_SELECT_0
+FLD  5 0x0000001f 0x00000000 3 BANK_SELECT_1
+FLD 10 0x00000003 0x00000000 3 L2_CACHE_UPDATE_MODE
+REG 0x0000140c 0x00000000 0x00000011 32    0    1    0 VM_L2_STATUS
+FLD  0 0x00000001 0x00000000 3 L2_BUSY
+REG 0x00001410 0x00000000 0x00000011 32    0    1    0 VM_CONTEXT0_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_CONTEXT
+FLD  1 0x00000003 0x00000000 3 PAGE_TABLE_DEPTH
+FLD  4 0x00000001 0x00000000 3 RANGE_PROTECTION_FAULT_ENABLE_DEFAULT
+REG 0x00001470 0x00000000 0x00000011 32    0    1    0 VM_CONTEXT0_REQUEST_RESPONSE
+FLD  0 0x0000000f 0x00000000 3 REQUEST_TYPE
+FLD  4 0x0000000f 0x00000000 3 RESPONSE_TYPE
+REG 0x00001490 0x00000000 0x00000011 32    0    1    0 VM_CONTEXT0_INVALIDATION_LOW_ADDR
+REG 0x000014b0 0x00000000 0x00000011 32    0    1    0 VM_CONTEXT0_INVALIDATION_HIGH_ADDR
+REG 0x00001554 0x00000000 0x00000011 32    0    1    0 VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR
+REG 0x00001574 0x00000000 0x00000011 32    0    1    0 VM_CONTEXT0_PAGE_TABLE_BASE_ADDR
+REG 0x00001594 0x00000000 0x00000011 32    0    1    0 VM_CONTEXT0_PAGE_TABLE_START_ADDR
+REG 0x000015b4 0x00000000 0x00000011 32    0    1    0 VM_CONTEXT0_PAGE_TABLE_END_ADDR
+REG 0x00001600 0x00000000 0x00000000 32    0    1    0 ROM_CNTL
+FLD  1 0x00000001 0x00000000 3 SCK_OVERWRITE
+FLD 28 0x0000000f 0x00000000 3 SCK_PRESCALE_CRYSTAL_CLK
+REG 0x00001724 0x00000000 0x00000000 32    0    1    0 BIOS_0_SCRATCH
+REG 0x00001728 0x00000000 0x00000000 32    0    1    0 BIOS_1_SCRATCH
+REG 0x0000172c 0x00000000 0x00000000 32    0    1    0 BIOS_2_SCRATCH
+REG 0x00001730 0x00000000 0x00000000 32    0    1    0 BIOS_3_SCRATCH
+REG 0x00001734 0x00000000 0x00000000 32    0    1    0 BIOS_4_SCRATCH
+REG 0x00001738 0x00000000 0x00000000 32    0    1    0 BIOS_5_SCRATCH
+REG 0x0000173c 0x00000000 0x00000000 32    0    1    0 BIOS_6_SCRATCH
+REG 0x00001740 0x00000000 0x00000000 32    0    1    0 BIOS_7_SCRATCH
+REG 0x00002004 0x00000000 0x00000000 32    0    1    0 CHMAP
+FLD 12 0x00000003 0x00000000 3 NOOFCHAN
+REG 0x00002180 0x00000000 0x00000005 32    0    1    0 MC_VM_FB_LOCATION
+REG 0x00002184 0x00000000 0x00000005 32    0    1    0 MC_VM_AGP_TOP
+FLD  0 0x0003ffff 0x00000000 3 MC_AGP_TOP
+REG 0x00002188 0x00000000 0x00000005 32    0    1    0 MC_VM_AGP_BOT
+FLD  0 0x0003ffff 0x00000000 3 MC_AGP_BOT
+REG 0x0000218c 0x00000000 0x00000005 32    0    1    0 MC_VM_AGP_BASE
+REG 0x00002190 0x00000000 0x00000005 32    0    1    0 MC_VM_SYSTEM_APERTURE_LOW_ADDR
+FLD  0 0x000fffff 0x00000000 3 LOGICAL_PAGE_NUMBER
+REG 0x00002194 0x00000000 0x00000005 32    0    1    0 MC_VM_SYSTEM_APERTURE_HIGH_ADDR
+REG 0x00002198 0x00000000 0x00000005 32    0    1    0 MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR
+REG 0x0000219c 0x00000000 0x00000005 32    0    1    0 MC_VM_L1_TLB_MCD_RD_A_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  2 0x00000001 0x00000000 3 ENABLE_L1_STRICT_ORDERING
+FLD  6 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  8 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 10 0x00000001 0x00000000 3 ENABLE_SEMAPHORE_MODE
+FLD 11 0x00000001 0x00000000 3 ENABLE_WAIT_L2_QUERY
+FLD 12 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x000021a0 0x00000000 0x00000011 32    0    1    0 MC_VM_L1_TLB_MCD_RD_B_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  2 0x00000001 0x00000000 3 ENABLE_L1_STRICT_ORDERING
+FLD  6 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  8 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 10 0x00000001 0x00000000 3 ENABLE_SEMAPHORE_MODE
+FLD 11 0x00000001 0x00000000 3 ENABLE_WAIT_L2_QUERY
+FLD 12 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x000021a4 0x00000000 0x00000011 32    0    1    0 MC_VM_L1_TLB_MCD_WR_A_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  2 0x00000001 0x00000000 3 ENABLE_L1_STRICT_ORDERING
+FLD  6 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  8 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 10 0x00000001 0x00000000 3 ENABLE_SEMAPHORE_MODE
+FLD 11 0x00000001 0x00000000 3 ENABLE_WAIT_L2_QUERY
+FLD 12 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x000021a8 0x00000000 0x00000011 32    0    1    0 MC_VM_L1_TLB_MCD_WR_B_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  2 0x00000001 0x00000000 3 ENABLE_L1_STRICT_ORDERING
+FLD  6 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  8 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 10 0x00000001 0x00000000 3 ENABLE_SEMAPHORE_MODE
+FLD 11 0x00000001 0x00000000 3 ENABLE_WAIT_L2_QUERY
+FLD 12 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x000021fc 0x00000000 0x00000011 32    0    1    0 MC_VM_L1_TLB_MCB_RD_GFX_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  2 0x00000001 0x00000000 3 ENABLE_L1_STRICT_ORDERING
+FLD  6 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  8 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 10 0x00000001 0x00000000 3 ENABLE_SEMAPHORE_MODE
+FLD 11 0x00000001 0x00000000 3 ENABLE_WAIT_L2_QUERY
+FLD 12 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x00002200 0x00000000 0x00000011 32    0    1    0 MC_VM_L1_TLB_MCB_RD_SYS_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  2 0x00000001 0x00000000 3 ENABLE_L1_STRICT_ORDERING
+FLD  6 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  8 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 10 0x00000001 0x00000000 3 ENABLE_SEMAPHORE_MODE
+FLD 11 0x00000001 0x00000000 3 ENABLE_WAIT_L2_QUERY
+FLD 12 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x00002204 0x00000000 0x00000011 32    0    1    0 MC_VM_L1_TLB_MCB_RD_HDP_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  2 0x00000001 0x00000000 3 ENABLE_L1_STRICT_ORDERING
+FLD  6 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  8 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 10 0x00000001 0x00000000 3 ENABLE_SEMAPHORE_MODE
+FLD 11 0x00000001 0x00000000 3 ENABLE_WAIT_L2_QUERY
+FLD 12 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x00002208 0x00000000 0x00000011 32    0    1    0 MC_VM_L1_TLB_MCB_RD_PDMA_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  2 0x00000001 0x00000000 3 ENABLE_L1_STRICT_ORDERING
+FLD  6 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  8 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 10 0x00000001 0x00000000 3 ENABLE_SEMAPHORE_MODE
+FLD 11 0x00000001 0x00000000 3 ENABLE_WAIT_L2_QUERY
+FLD 12 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x0000220c 0x00000000 0x00000011 32    0    1    0 MC_VM_L1_TLB_MCB_RD_SEM_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  2 0x00000001 0x00000000 3 ENABLE_L1_STRICT_ORDERING
+FLD  6 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  8 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 10 0x00000001 0x00000000 3 ENABLE_SEMAPHORE_MODE
+FLD 11 0x00000001 0x00000000 3 ENABLE_WAIT_L2_QUERY
+FLD 12 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x00002210 0x00000000 0x00000011 32    0    1    0 MC_VM_L1_TLB_MCB_WR_GFX_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  2 0x00000001 0x00000000 3 ENABLE_L1_STRICT_ORDERING
+FLD  6 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  8 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 10 0x00000001 0x00000000 3 ENABLE_SEMAPHORE_MODE
+FLD 11 0x00000001 0x00000000 3 ENABLE_WAIT_L2_QUERY
+FLD 12 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x00002214 0x00000000 0x00000011 32    0    1    0 MC_VM_L1_TLB_MCB_WR_SYS_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  2 0x00000001 0x00000000 3 ENABLE_L1_STRICT_ORDERING
+FLD  6 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  8 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 10 0x00000001 0x00000000 3 ENABLE_SEMAPHORE_MODE
+FLD 11 0x00000001 0x00000000 3 ENABLE_WAIT_L2_QUERY
+FLD 12 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x00002218 0x00000000 0x00000011 32    0    1    0 MC_VM_L1_TLB_MCB_WR_HDP_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  2 0x00000001 0x00000000 3 ENABLE_L1_STRICT_ORDERING
+FLD  6 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  8 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 10 0x00000001 0x00000000 3 ENABLE_SEMAPHORE_MODE
+FLD 11 0x00000001 0x00000000 3 ENABLE_WAIT_L2_QUERY
+FLD 12 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x0000221c 0x00000000 0x00000011 32    0    1    0 MC_VM_L1_TLB_MCB_WR_PDMA_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  2 0x00000001 0x00000000 3 ENABLE_L1_STRICT_ORDERING
+FLD  6 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  8 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 10 0x00000001 0x00000000 3 ENABLE_SEMAPHORE_MODE
+FLD 11 0x00000001 0x00000000 3 ENABLE_WAIT_L2_QUERY
+FLD 12 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x00002220 0x00000000 0x00000011 32    0    1    0 MC_VM_L1_TLB_MCB_WR_SEM_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  2 0x00000001 0x00000000 3 ENABLE_L1_STRICT_ORDERING
+FLD  6 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  8 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 10 0x00000001 0x00000000 3 ENABLE_SEMAPHORE_MODE
+FLD 11 0x00000001 0x00000000 3 ENABLE_WAIT_L2_QUERY
+FLD 12 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x00002408 0x00000000 0x00000000 32    0    1    0 RAMCFG
+FLD  0 0x00000001 0x00000000 3 NOOFBANK
+FLD  1 0x00000001 0x00000000 3 NOOFRANK
+FLD  2 0x00000007 0x00000000 3 NOOFROWS
+FLD  5 0x00000003 0x00000000 3 NOOFCOLS
+FLD  7 0x00000001 0x00000000 3 CHANSIZE
+FLD  8 0x00000001 0x00000000 3 BURSTLENGTH
+FLD 10 0x00000001 0x00000000 3 CHANSIZE_OVERRIDE
+REG 0x00002418 0x00000000 0x00000000 32    0    1    0 ARB_POP
+FLD 30 0x00000001 0x00000000 3 ENABLE_TC128
+REG 0x0000246c 0x00000000 0x00000000 32    0    1    0 ARB_GDEC_RD_CNTL
+REG 0x00002c00 0x00000000 0x00000000 32    0    1    0 HDP_HOST_PATH_CNTL
+REG 0x00002c04 0x00000000 0x00000000 32    0    1    0 HDP_NONSURFACE_BASE
+REG 0x00002c08 0x00000000 0x00000000 32    0    1    0 HDP_NONSURFACE_INFO
+REG 0x00002c0c 0x00000000 0x00000000 32    0    1    0 HDP_NONSURFACE_SIZE
+REG 0x00002f34 0x00000000 0x00000000 32    0    1    0 HDP_DEBUG1
+REG 0x00002f3c 0x00000000 0x00000000 32    0    1    0 HDP_TILING_CONFIG
+FLD  1 0x00000007 0x00000000 3 PIPE_TILING
+FLD  4 0x00000003 0x00000000 3 BANK_TILING
+FLD  6 0x00000003 0x00000000 3 GROUP_SIZE
+FLD  8 0x00000007 0x00000000 3 ROW_TILING
+FLD 11 0x00000007 0x00000000 3 BANK_SWAPS
+FLD 14 0x00000003 0x00000000 3 SAMPLE_SPLIT
+FLD 16 0x0000ffff 0x00000000 3 BACKEND_MAP
+REG 0x00003e00 0x00000000 0x00000004 32    0    1    0 IH_RB_CNTL
+FLD  0 0x00000001 0x00000000 3 IH_RB_ENABLE
+FLD  1 0x0000001f 0x00000000 3 IH_IB_SIZE
+FLD  6 0x00000001 0x00000000 3 IH_RB_FULL_DRAIN_ENABLE
+FLD  8 0x00000001 0x00000000 3 IH_WPTR_WRITEBACK_ENABLE
+FLD  9 0x0000001f 0x00000000 3 IH_WPTR_WRITEBACK_TIMER
+FLD 16 0x00000001 0x00000000 3 IH_WPTR_OVERFLOW_ENABLE
+FLD 31 0x00000001 0x00000000 3 IH_WPTR_OVERFLOW_CLEAR
+REG 0x00003e04 0x00000000 0x00000004 32    0    1    0 IH_RB_BASE
+REG 0x00003e08 0x00000000 0x00000004 32    0    1    0 IH_RB_RPTR
+REG 0x00003e0c 0x00000000 0x00000004 32    0    1    0 IH_RB_WPTR
+FLD  0 0x00000001 0x00000000 3 RB_OVERFLOW
+FLD  2 0x0000ffff 0x00000000 3 WPTR_OFFSET
+REG 0x00003e10 0x00000000 0x00000004 32    0    1    0 IH_RB_WPTR_ADDR_HI
+REG 0x00003e14 0x00000000 0x00000004 32    0    1    0 IH_RB_WPTR_ADDR_LO
+REG 0x00003e18 0x00000000 0x00000004 32    0    1    0 IH_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_INTR
+FLD  1 0x00000003 0x00000000 3 IH_MC_SWAP
+VAL 0x00000000 SWAP_NONE
+VAL 0x00000001 SWAP_16BIT
+VAL 0x00000002 SWAP_32BIT
+VAL 0x00000003 SWAP_64BIT
+FLD  4 0x00000001 0x00000000 3 RPTR_REARM
+FLD 15 0x0000001f 0x00000000 3 MC_WRREQ_CREDIT
+FLD 20 0x0000001f 0x00000000 3 MC_WR_CLEAN_CNT
+REG 0x00003f00 0x00000000 0x00000009 32    0    1    0 RLC_CNTL
+FLD  0 0x00000001 0x00000000 3 RLC_ENABLE
+REG 0x00003f0c 0x00000000 0x00000009 32    0    1    0 RLC_HB_CNTL
+REG 0x00003f10 0x00000000 0x00000009 32    0    1    0 RLC_HB_BASE
+REG 0x00003f10 0x00000000 0x00000009 32    0    1    0 TN_RLC_SAVE_AND_RESTORE_BASE
+REG 0x00003f14 0x00000000 0x00000009 32    0    1    0 RLC_HB_WPTR_LSB_ADDR
+REG 0x00003f18 0x00000000 0x00000009 32    0    1    0 RLC_HB_WPTR_MSB_ADDR
+REG 0x00003f1c 0x00000000 0x00000009 32    0    1    0 RLC_HB_WPTR
+REG 0x00003f20 0x00000000 0x00000009 32    0    1    0 RLC_HB_RPTR
+REG 0x00003f20 0x00000000 0x00000009 32    0    1    0 TN_RLC_CLEAR_STATE_RESTORE_BASE
+REG 0x00003f2c 0x00000000 0x00000009 32    0    1    0 RLC_UCODE_ADDR
+REG 0x00003f30 0x00000000 0x00000009 32    0    1    0 RLC_UCODE_DATA
+REG 0x00003f44 0x00000000 0x00000009 32    0    1    0 RLC_MC_CNTL
+REG 0x00003f48 0x00000000 0x00000009 32    0    1    0 RLC_UCODE_CNTL
+REG 0x00004000 0x00000000 0x00000000 32    0    1    0 VENDOR_DEVICE_ID
+REG 0x00005420 0x00000000 0x00000000 32    0    1    0 BUS_CNTL
+FLD  1 0x00000001 0x00000000 3 BIOS_ROM_DIS
+REG 0x00005424 0x00000000 0x00000000 32    0    1    0 CONFIG_CNTL
+REG 0x00005428 0x00000000 0x00000000 32    0    1    0 CONFIG_MEMSIZE
+REG 0x0000542c 0x00000000 0x00000000 32    0    1    0 CONFIG_F0_BASE
+REG 0x00005430 0x00000000 0x00000000 32    0    1    0 CONFIG_APER_SIZE
+REG 0x0000544c 0x00000000 0x00000000 32    0    1    0 MM_CFGREGS_CNTL
+FLD  3 0x00000001 0x00000000 3 MM_WR_TO_CFG_EN
+REG 0x00005468 0x00000000 0x00000004 32    0    1    0 INTERRUPT_CNTL
+FLD  0 0x00000001 0x00000000 3 IH_DUMMY_RD_OVERRIDE
+FLD  1 0x00000001 0x00000000 3 IH_DUMMY_RD_EN
+FLD  3 0x00000001 0x00000000 3 IH_REQ_NONSNOOP_EN
+FLD  8 0x00000001 0x00000000 3 GEN_IH_INT_EN
+REG 0x0000546c 0x00000000 0x00000004 32    0    1    0 INTERRUPT_CNTL2
+REG 0x00005480 0x00000000 0x00000000 32    0    1    0 HDP_MEM_COHERENCY_FLUSH_CNTL
+REG 0x000054a0 0x00000000 0x00000000 32    0    1    0 HDP_REG_COHERENCY_FLUSH_CNTL
+REG 0x00006ca0 0x00000000 0x00000000 32    0    1    0 DCP_TILING_CONFIG
+FLD  1 0x00000007 0x00000000 3 PIPE_TILING
+FLD  4 0x00000003 0x00000000 3 BANK_TILING
+FLD  6 0x00000003 0x00000000 3 GROUP_SIZE
+FLD  8 0x00000007 0x00000000 3 ROW_TILING
+FLD 11 0x00000007 0x00000000 3 BANK_SWAPS
+FLD 14 0x00000003 0x00000000 3 SAMPLE_SPLIT
+FLD 16 0x0000ffff 0x00000000 3 BACKEND_MAP
+REG 0x00008000 0x00000000 0x00000000 32    0    1    0 GRBM_CNTL
+REG 0x00008010 0x00000000 0x00000000 32    0    1    0 GRBM_STATUS
+FLD  0 0x0000001f 0x00000000 3 CMDFIFO_AVAIL
+FLD  5 0x00000001 0x00000000 3 SRBM_RQ_PENDING
+FLD  6 0x00000001 0x00000000 3 CP_RQ_PENDING
+FLD  7 0x00000001 0x00000000 3 CF_RQ_PENDING
+FLD  8 0x00000001 0x00000000 3 PF_RQ_PENDING
+FLD 10 0x00000001 0x00000000 3 GRBM_EE_BUSY
+FLD 11 0x00000001 0x00000000 3 GRBM_STATUS__VC_BUSY
+FLD 12 0x00000001 0x00000000 3 DB03_CLEAN
+FLD 13 0x00000001 0x00000000 3 CB03_CLEAN
+FLD 16 0x00000001 0x00000000 3 VGT_BUSY_NO_DMA
+FLD 17 0x00000001 0x00000000 3 GRBM_STATUS__VGT_BUSY
+FLD 18 0x00000001 0x00000000 3 TA03_BUSY
+FLD 19 0x00000001 0x00000000 3 GRBM_STATUS__TC_BUSY
+FLD 20 0x00000001 0x00000000 3 SX_BUSY
+FLD 21 0x00000001 0x00000000 3 SH_BUSY
+FLD 22 0x00000001 0x00000000 3 SPI03_BUSY
+FLD 23 0x00000001 0x00000000 3 SMX_BUSY
+FLD 24 0x00000001 0x00000000 3 SC_BUSY
+FLD 25 0x00000001 0x00000000 3 PA_BUSY
+FLD 26 0x00000001 0x00000000 3 DB03_BUSY
+FLD 27 0x00000001 0x00000000 3 CR_BUSY
+FLD 28 0x00000001 0x00000000 3 CP_COHERENCY_BUSY
+FLD 29 0x00000001 0x00000000 3 GRBM_STATUS__CP_BUSY
+FLD 30 0x00000001 0x00000000 3 CB03_BUSY
+FLD 31 0x00000001 0x00000000 3 GUI_ACTIVE
+REG 0x00008014 0x00000000 0x00000000 32    0    1    0 GRBM_STATUS2
+FLD  0 0x00000001 0x00000000 3 CR_CLEAN
+FLD  1 0x00000001 0x00000000 3 SMX_CLEAN
+FLD  8 0x00000001 0x00000000 3 SPI0_BUSY
+FLD  9 0x00000001 0x00000000 3 SPI1_BUSY
+FLD 10 0x00000001 0x00000000 3 SPI2_BUSY
+FLD 11 0x00000001 0x00000000 3 SPI3_BUSY
+FLD 12 0x00000001 0x00000000 3 TA0_BUSY
+FLD 13 0x00000001 0x00000000 3 TA1_BUSY
+FLD 14 0x00000001 0x00000000 3 TA2_BUSY
+FLD 15 0x00000001 0x00000000 3 TA3_BUSY
+FLD 16 0x00000001 0x00000000 3 DB0_BUSY
+FLD 17 0x00000001 0x00000000 3 DB1_BUSY
+FLD 18 0x00000001 0x00000000 3 DB2_BUSY
+FLD 19 0x00000001 0x00000000 3 DB3_BUSY
+FLD 20 0x00000001 0x00000000 3 CB0_BUSY
+FLD 21 0x00000001 0x00000000 3 CB1_BUSY
+FLD 22 0x00000001 0x00000000 3 CB2_BUSY
+FLD 23 0x00000001 0x00000000 3 CB3_BUSY
+REG 0x00008020 0x00000000 0x00000000 32    0    1    0 GRBM_SOFT_RESET
+FLD  0 0x00000001 0x00000000 3 SOFT_RESET_CP
+FLD  1 0x00000001 0x00000000 3 SOFT_RESET_CB
+FLD  2 0x00000001 0x00000000 3 SOFT_RESET_CR
+FLD  3 0x00000001 0x00000000 3 SOFT_RESET_DB
+FLD  5 0x00000001 0x00000000 3 SOFT_RESET_PA
+FLD  6 0x00000001 0x00000000 3 SOFT_RESET_SC
+FLD  7 0x00000001 0x00000000 3 SOFT_RESET_SMX
+FLD  8 0x00000001 0x00000000 3 SOFT_RESET_SPI
+FLD  9 0x00000001 0x00000000 3 SOFT_RESET_SH
+FLD 10 0x00000001 0x00000000 3 SOFT_RESET_SX
+FLD 11 0x00000001 0x00000000 3 SOFT_RESET_TC
+FLD 12 0x00000001 0x00000000 3 SOFT_RESET_TA
+FLD 13 0x00000001 0x00000000 3 SOFT_RESET_VC
+FLD 14 0x00000001 0x00000000 3 SOFT_RESET_VGT
+FLD 15 0x00000001 0x00000000 3 SOFT_RESET_GRBM_GCA
+REG 0x00008040 0x00000000 0x00000000 32    0    1    0 WAIT_UNTIL
+FLD  8 0x00000001 0x00000000 3 WAIT_CP_DMA_IDLE
+FLD 10 0x00000001 0x00000000 3 WAIT_CMDFIFO
+FLD 14 0x00000001 0x00000000 3 WAIT_2D_IDLE
+FLD 15 0x00000001 0x00000000 3 WAIT_3D_IDLE
+FLD 16 0x00000001 0x00000000 3 WAIT_2D_IDLECLEAN
+FLD 17 0x00000001 0x00000000 3 WAIT_3D_IDLECLEAN
+FLD 19 0x00000001 0x00000000 3 WAIT_EXTERN_SIG
+FLD 20 0x0000001f 0x00000000 3 CMDFIFO_ENTRIES
+REG 0x00008058 0x00000000 0x00000000 32    0    1    0 GRBM_READ_ERROR
+FLD  2 0x0000ffff 0x00000000 3 READ_ADDRESS
+FLD 28 0x00000001 0x00000000 3 READ_REQUESTER_SRBM
+FLD 29 0x00000001 0x00000000 3 READ_REQUESTER_CP
+FLD 30 0x00000001 0x00000000 3 READ_REQUESTER_WU_POLL
+FLD 31 0x00000001 0x00000000 3 READ_ERROR
+REG 0x00008060 0x00000000 0x00000000 32    0    1    0 GRBM_INT_CNTL
+FLD  0 0x00000001 0x00000000 3 RDERR_INT_ENABLE
+FLD  1 0x00000001 0x00000000 3 WAIT_COUNT_TIMEOUT_INT_ENABLE
+FLD 19 0x00000001 0x00000000 3 GUI_IDLE_INT_ENABLE
+REG 0x00008500 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG0
+REG 0x00008504 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG1
+REG 0x00008508 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG2
+REG 0x0000850c 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG3
+REG 0x00008510 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG4
+REG 0x00008514 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG5
+REG 0x00008518 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG6
+REG 0x0000851c 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG7
+REG 0x00008540 0x00000000 0x00000000 32    0    1    0 SCRATCH_UMSK
+REG 0x00008544 0x00000000 0x00000000 32    0    1    0 SCRATCH_ADDR
+REG 0x000085bc 0x00000000 0x00000002 32    0    1    0 CP_SEM_WAIT_TIMER
+REG 0x000085f0 0x00000000 0x00000002 32    0    1    0 CP_COHER_CNTL
+FLD  0 0x00000001 0x00000000 3 DEST_BASE_0_ENA
+FLD  1 0x00000001 0x00000000 3 DEST_BASE_1_ENA
+FLD  2 0x00000001 0x00000000 3 SO0_DEST_BASE_ENA
+FLD  3 0x00000001 0x00000000 3 SO1_DEST_BASE_ENA
+FLD  4 0x00000001 0x00000000 3 SO2_DEST_BASE_ENA
+FLD  5 0x00000001 0x00000000 3 SO3_DEST_BASE_ENA
+FLD  6 0x00000001 0x00000000 3 CB0_DEST_BASE_ENA
+FLD  7 0x00000001 0x00000000 3 CB1_DEST_BASE_ENA
+FLD  8 0x00000001 0x00000000 3 CB2_DEST_BASE_ENA
+FLD  9 0x00000001 0x00000000 3 CB3_DEST_BASE_ENA
+FLD 10 0x00000001 0x00000000 3 CB4_DEST_BASE_ENA
+FLD 11 0x00000001 0x00000000 3 CB5_DEST_BASE_ENA
+FLD 12 0x00000001 0x00000000 3 CB6_DEST_BASE_ENA
+FLD 13 0x00000001 0x00000000 3 CB7_DEST_BASE_ENA
+FLD 14 0x00000001 0x00000000 3 DB_DEST_BASE_ENA
+FLD 15 0x00000001 0x00000000 3 CR_DEST_BASE_ENA
+FLD 23 0x00000001 0x00000000 3 TC_ACTION_ENA
+FLD 24 0x00000001 0x00000000 3 VC_ACTION_ENA
+FLD 25 0x00000001 0x00000000 3 CB_ACTION_ENA
+FLD 26 0x00000001 0x00000000 3 DB_ACTION_ENA
+FLD 27 0x00000001 0x00000000 3 SH_ACTION_ENA
+FLD 28 0x00000001 0x00000000 3 SMX_ACTION_ENA
+FLD 29 0x00000001 0x00000000 3 CR0_ACTION_ENA
+FLD 30 0x00000001 0x00000000 3 CR1_ACTION_ENA
+FLD 31 0x00000001 0x00000000 3 CR2_ACTION_ENA
+REG 0x000085f4 0x00000000 0x00000002 32    0    1    0 CP_COHER_SIZE
+REG 0x000085f8 0x00000000 0x00000002 32    0    1    0 CP_COHER_BASE
+REG 0x000085fc 0x00000000 0x00000002 32    0    1    0 CP_COHER_STATUS
+FLD  0 0x000000ff 0x00000000 3 MATCHING_GFX_CNTX
+FLD  8 0x0000ffff 0x00000000 3 MATCHING_CR_CNTX
+FLD 31 0x00000001 0x00000000 3 STATUS
+REG 0x00008674 0x00000000 0x00000002 32    0    1    0 CP_STALLED_STAT1
+FLD  0 0x00000001 0x00000000 3 RBIU_TO_DMA_NOT_RDY_TO_RCV
+FLD  1 0x00000001 0x00000000 3 RBIU_TO_IBS_NOT_RDY_TO_RCV
+FLD  2 0x00000001 0x00000000 3 RBIU_TO_SEM_NOT_RDY_TO_RCV
+FLD  3 0x00000001 0x00000000 3 RBIU_TO_2DREGS_NOT_RDY_TO_RCV
+FLD  4 0x00000001 0x00000000 3 RBIU_TO_MEMWR_NOT_RDY_TO_RCV
+FLD  5 0x00000001 0x00000000 3 RBIU_TO_MEMRD_NOT_RDY_TO_RCV
+FLD  6 0x00000001 0x00000000 3 RBIU_TO_EOPD_NOT_RDY_TO_RCV
+FLD  7 0x00000001 0x00000000 3 RBIU_TO_RECT_NOT_RDY_TO_RCV
+FLD  8 0x00000001 0x00000000 3 RBIU_TO_STRMO_NOT_RDY_TO_RCV
+FLD  9 0x00000001 0x00000000 3 RBIU_TO_PSTAT_NOT_RDY_TO_RCV
+FLD 16 0x00000001 0x00000000 3 MIU_WAITING_ON_RDREQ_FREE
+FLD 17 0x00000001 0x00000000 3 MIU_WAITING_ON_WRREQ_FREE
+FLD 18 0x00000001 0x00000000 3 MIU_NEEDS_AVAIL_WRREQ_PHASE
+FLD 24 0x00000001 0x00000000 3 RCIU_WAITING_ON_GRBM_FREE
+FLD 25 0x00000001 0x00000000 3 RCIU_WAITING_ON_VGT_FREE
+FLD 26 0x00000001 0x00000000 3 RCIU_STALLED_ON_ME_READ
+FLD 27 0x00000001 0x00000000 3 RCIU_STALLED_ON_DMA_READ
+FLD 28 0x00000001 0x00000000 3 RCIU_HALTED_BY_REG_VIOLATION
+REG 0x00008678 0x00000000 0x00000002 32    0    1    0 CP_STALLED_STAT2
+FLD  0 0x00000001 0x00000000 3 PFP_TO_CSF_NOT_RDY_TO_RCV
+FLD  1 0x00000001 0x00000000 3 PFP_TO_MEQ_NOT_RDY_TO_RCV
+FLD  2 0x00000001 0x00000000 3 PFP_TO_VGT_NOT_RDY_TO_RCV
+FLD  3 0x00000001 0x00000000 3 PFP_HALTED_BY_INSTR_VIOLATION
+FLD  4 0x00000001 0x00000000 3 MULTIPASS_IB_PENDING_IN_PFP
+FLD  8 0x00000001 0x00000000 3 ME_BRUSH_WC_NOT_RDY_TO_RCV
+FLD  9 0x00000001 0x00000000 3 ME_STALLED_ON_BRUSH_LOGIC
+FLD 10 0x00000001 0x00000000 3 CR_CNTX_NOT_AVAIL_TO_ME
+FLD 11 0x00000001 0x00000000 3 GFX_CNTX_NOT_AVAIL_TO_ME
+FLD 12 0x00000001 0x00000000 3 ME_RCIU_NOT_RDY_TO_RCV
+FLD 13 0x00000001 0x00000000 3 ME_TO_CONST_NOT_RDY_TO_RCV
+FLD 14 0x00000001 0x00000000 3 ME_WAITING_DATA_FROM_PFP
+FLD 15 0x00000001 0x00000000 3 ME_WAITING_ON_PARTIAL_FLUSH
+FLD 16 0x00000001 0x00000000 3 RECT_FIFO_NEEDS_CR_RECT_DONE
+FLD 17 0x00000001 0x00000000 3 RECT_FIFO_NEEDS_WR_CONFIRM
+FLD 18 0x00000001 0x00000000 3 EOPD_FIFO_NEEDS_SC_EOP_DONE
+FLD 19 0x00000001 0x00000000 3 EOPD_FIFO_NEEDS_SMX_EOP_DONE
+FLD 20 0x00000001 0x00000000 3 EOPD_FIFO_NEEDS_WR_CONFIRM
+FLD 21 0x00000001 0x00000000 3 EOPD_FIFO_NEEDS_SIGNAL_SEM
+FLD 22 0x00000001 0x00000000 3 SO_NUMPRIM_FIFO_NEEDS_SOADDR
+FLD 23 0x00000001 0x00000000 3 SO_NUMPRIM_FIFO_NEEDS_NUMPRIM
+FLD 24 0x00000001 0x00000000 3 PIPE_STATS_FIFO_NEEDS_SAMPLE
+FLD 30 0x00000001 0x00000000 3 SURF_SYNC_NEEDS_IDLE_CNTXS
+FLD 31 0x00000001 0x00000000 3 SURF_SYNC_NEEDS_ALL_CLEAN
+REG 0x0000867c 0x00000000 0x00000002 32    0    1    0 CP_BUSY_STAT
+FLD  0 0x00000001 0x00000000 3 REG_BUS_FIFO_BUSY
+FLD  1 0x00000001 0x00000000 3 RING_FETCHING_DATA
+FLD  2 0x00000001 0x00000000 3 INDR1_FETCHING_DATA
+FLD  3 0x00000001 0x00000000 3 INDR2_FETCHING_DATA
+FLD  4 0x00000001 0x00000000 3 STATE_FETCHING_DATA
+FLD  5 0x00000001 0x00000000 3 PRED_FETCHING_DATA
+FLD  6 0x00000001 0x00000000 3 COHER_CNTR_NEQ_ZERO
+FLD  7 0x00000001 0x00000000 3 PFP_PARSING_PACKETS
+FLD  8 0x00000001 0x00000000 3 ME_PARSING_PACKETS
+FLD  9 0x00000001 0x00000000 3 RCIU_PFP_BUSY
+FLD 10 0x00000001 0x00000000 3 RCIU_ME_BUSY
+FLD 11 0x00000001 0x00000000 3 OUTSTANDING_READ_TAGS
+FLD 12 0x00000001 0x00000000 3 SEM_CMDFIFO_NOT_EMPTY
+FLD 13 0x00000001 0x00000000 3 SEM_FAILED_AND_HOLDING
+FLD 14 0x00000001 0x00000000 3 SEM_POLLING_FOR_PASS
+FLD 15 0x00000001 0x00000000 3 3D_BUSY
+FLD 16 0x00000001 0x00000000 3 2D_BUSY
+REG 0x00008680 0x00000000 0x00000002 32    0    1    0 CP_STAT
+FLD  0 0x00000001 0x00000000 3 CSF_RING_BUSY
+FLD  1 0x00000001 0x00000000 3 CSF_WPTR_POLL_BUSY
+FLD  2 0x00000001 0x00000000 3 CSF_INDIRECT1_BUSY
+FLD  3 0x00000001 0x00000000 3 CSF_INDIRECT2_BUSY
+FLD  4 0x00000001 0x00000000 3 CSF_STATE_BUSY
+FLD  5 0x00000001 0x00000000 3 CSF_PREDICATE_BUSY
+FLD  6 0x00000001 0x00000000 3 CSF_BUSY
+FLD  7 0x00000001 0x00000000 3 MIU_RDREQ_BUSY
+FLD  8 0x00000001 0x00000000 3 MIU_WRREQ_BUSY
+FLD  9 0x00000001 0x00000000 3 ROQ_RING_BUSY
+FLD 10 0x00000001 0x00000000 3 ROQ_INDIRECT1_BUSY
+FLD 11 0x00000001 0x00000000 3 ROQ_INDIRECT2_BUSY
+FLD 12 0x00000001 0x00000000 3 ROQ_STATE_BUSY
+FLD 13 0x00000001 0x00000000 3 ROQ_PREDICATE_BUSY
+FLD 14 0x00000001 0x00000000 3 ROQ_ALIGN_BUSY
+FLD 15 0x00000001 0x00000000 3 PFP_BUSY
+FLD 16 0x00000001 0x00000000 3 MEQ_BUSY
+FLD 17 0x00000001 0x00000000 3 ME_BUSY
+FLD 18 0x00000001 0x00000000 3 QUERY_BUSY
+FLD 19 0x00000001 0x00000000 3 SEMAPHORE_BUSY
+FLD 20 0x00000001 0x00000000 3 INTERRUPT_BUSY
+FLD 21 0x00000001 0x00000000 3 SURFACE_SYNC_BUSY
+FLD 22 0x00000001 0x00000000 3 DMA_BUSY
+FLD 23 0x00000001 0x00000000 3 RCIU_BUSY
+FLD 31 0x00000001 0x00000000 3 CP_BUSY
+REG 0x000086d8 0x00000000 0x00000002 32    0    1    0 CP_ME_CNTL
+FLD  0 0x000000ff 0x00000000 3 ME_STATMUX
+FLD 28 0x00000001 0x00000000 3 ME_HALT
+REG 0x000086dc 0x00000000 0x00000002 32    0    1    0 CP_ME_STATUS
+REG 0x00008700 0x00000000 0x00000002 32    0    1    0 CP_RB_RPTR
+FLD  0 0x000fffff 0x00000000 3 RB_RPTR
+REG 0x00008704 0x00000000 0x00000002 32    0    1    0 CP_RB_WPTR_DELAY
+FLD  0 0x0fffffff 0x00000000 3 PRE_WRITE_TIMER
+FLD 28 0x0000000f 0x00000000 3 PRE_WRITE_LIMIT
+REG 0x00008760 0x00000000 0x00000002 32    0    1    0 CP_QUEUE_THRESHOLDS
+FLD  0 0x0000003f 0x00000000 3 ROQ_IB1_START
+FLD  8 0x0000003f 0x00000000 3 ROQ_IB2_START
+REG 0x00008764 0x00000000 0x00000002 32    0    1    0 CP_MEQ_THRESHOLDS
+FLD 16 0x0000007f 0x00000000 3 MEQ_END
+FLD 24 0x0000007f 0x00000000 3 ROQ_END
+REG 0x00008780 0x00000000 0x00000002 32    0    1    0 CP_ROQ_RB_STAT
+FLD  0 0x000003ff 0x00000000 3 ROQ_RPTR_PRIMARY
+FLD 16 0x000003ff 0x00000000 3 ROQ_WPTR_PRIMARY
+REG 0x00008784 0x00000000 0x00000002 32    0    1    0 CP_ROQ_IB1_STAT
+FLD  0 0x000003ff 0x00000000 3 ROQ_RPTR_INDIRECT1
+FLD 16 0x000003ff 0x00000000 3 ROQ_WPTR_INDIRECT1
+REG 0x00008788 0x00000000 0x00000002 32    0    1    0 CP_ROQ_IB2_STAT
+FLD  0 0x000003ff 0x00000000 3 ROQ_RPTR_INDIRECT2
+FLD 16 0x000003ff 0x00000000 3 ROQ_WPTR_INDIRECT2
+REG 0x00008794 0x00000000 0x00000002 32    0    1    0 CP_MEQ_STAT
+FLD  0 0x000003ff 0x00000000 3 MEQ_RPTR
+FLD 16 0x000003ff 0x00000000 3 MEQ_WPTR
+REG 0x000087fc 0x00000000 0x00000002 32    0    1    0 CP_PERFMON_CNTL
+REG 0x000088b0 0x00000000 0x00000010 32    0    1    0 VGT_VTX_VECT_EJECT_REG
+FLD  0 0x000003ff 0x00000000 3 PRIM_COUNT
+REG 0x000088c0 0x00000000 0x00000010 32    0    1    0 VGT_LAST_COPY_STATE
+FLD  0 0x00000007 0x00000000 3 SRC_STATE_ID
+FLD 16 0x00000007 0x00000000 3 DST_STATE_ID
+REG 0x000088c4 0x00000000 0x00000010 32    0    1    0 VGT_CACHE_INVALIDATION
+FLD  0 0x00000003 0x00000000 3 CACHE_INVALIDATION
+VAL 0x00000000 VC_ONLY
+VAL 0x00000001 TC_ONLY
+VAL 0x00000002 VC_AND_TC
+FLD  5 0x00000001 0x00000000 3 VS_NO_EXTRA_BUFFER
+REG 0x000088c8 0x00000000 0x00000010 32    0    1    0 VGT_GS_PER_ES
+REG 0x000088cc 0x00000000 0x00000010 32    0    1    0 VGT_ES_PER_GS
+REG 0x000088d4 0x00000000 0x00000010 32    0    1    0 VGT_GS_VERTEX_REUSE
+FLD  0 0x0000001f 0x00000000 3 VERT_REUSE
+REG 0x000088d8 0x00000000 0x00000010 32    0    1    0 VGT_MC_LAT_CNTL
+FLD  0 0x00000003 0x00000000 3 MC_TIME_STAMP_RES
+VAL 0x00000000 X_0_992_MAX_LATENCY
+VAL 0x00000001 X_0_496_MAX_LATENCY
+VAL 0x00000002 X_0_248_MAX_LATENCY
+VAL 0x00000003 X_0_124_MAX_LATENCY
+REG 0x000088e8 0x00000000 0x00000010 32    0    1    0 VGT_GS_PER_VS
+FLD  0 0x0000000f 0x00000000 3 GS_PER_VS
+REG 0x000088f0 0x00000000 0x00000010 32    0    1    0 VGT_CNTL_STATUS
+FLD  0 0x00000001 0x00000000 3 VGT_OUT_INDX_BUSY
+FLD  1 0x00000001 0x00000000 3 VGT_OUT_BUSY
+FLD  2 0x00000001 0x00000000 3 VGT_PT_BUSY
+FLD  3 0x00000001 0x00000000 3 VGT_TE_BUSY
+FLD  4 0x00000001 0x00000000 3 VGT_VR_BUSY
+FLD  5 0x00000001 0x00000000 3 VGT_GRP_BUSY
+FLD  6 0x00000001 0x00000000 3 VGT_DMA_REQ_BUSY
+FLD  7 0x00000001 0x00000000 3 VGT_DMA_BUSY
+FLD  8 0x00000001 0x00000000 3 VGT_GS_BUSY
+FLD  9 0x00000001 0x00000000 3 VGT_BUSY
+REG 0x00008950 0x00000000 0x00000000 32    0    1    0 CC_GC_SHADER_PIPE_CONFIG
+REG 0x00008954 0x00000000 0x00000000 32    0    1    0 GC_USER_SHADER_PIPE_CONFIG
+FLD  8 0x000000ff 0x00000000 3 INACTIVE_QD_PIPES
+FLD 16 0x000000ff 0x00000000 3 INACTIVE_SIMDS
+REG 0x00008958 0x00000000 0x00000010 32    0    1    0 VGT_PRIMITIVE_TYPE
+FLD  0 0x0000003f 0x00000000 3 PRIM_TYPE
+VAL 0x00000000 DI_PT_NONE
+VAL 0x00000001 DI_PT_POINTLIST
+VAL 0x00000002 DI_PT_LINELIST
+VAL 0x00000003 DI_PT_LINESTRIP
+VAL 0x00000004 DI_PT_TRILIST
+VAL 0x00000005 DI_PT_TRIFAN
+VAL 0x00000006 DI_PT_TRISTRIP
+VAL 0x00000007 DI_PT_UNUSED_0
+VAL 0x00000008 DI_PT_UNUSED_1
+VAL 0x00000009 DI_PT_UNUSED_2
+VAL 0x0000000a DI_PT_LINELIST_ADJ
+VAL 0x0000000b DI_PT_LINESTRIP_ADJ
+VAL 0x0000000c DI_PT_TRILIST_ADJ
+VAL 0x0000000d DI_PT_TRISTRIP_ADJ
+VAL 0x0000000e DI_PT_UNUSED_3
+VAL 0x0000000f DI_PT_UNUSED_4
+VAL 0x00000010 DI_PT_TRI_WITH_WFLAGS
+VAL 0x00000011 DI_PT_RECTLIST
+VAL 0x00000012 DI_PT_LINELOOP
+VAL 0x00000013 DI_PT_QUADLIST
+VAL 0x00000014 DI_PT_QUADSTRIP
+VAL 0x00000015 DI_PT_POLYGON
+VAL 0x00000016 DI_PT_2D_COPY_RECT_LIST_V0
+VAL 0x00000017 DI_PT_2D_COPY_RECT_LIST_V1
+VAL 0x00000018 DI_PT_2D_COPY_RECT_LIST_V2
+VAL 0x00000019 DI_PT_2D_COPY_RECT_LIST_V3
+VAL 0x0000001a DI_PT_2D_FILL_RECT_LIST
+VAL 0x0000001b DI_PT_2D_LINE_STRIP
+VAL 0x0000001c DI_PT_2D_TRI_STRIP
+REG 0x0000895c 0x00000000 0x00000010 32    0    1    0 VGT_INDEX_TYPE
+FLD  0 0x00000003 0x00000000 3 INDEX_TYPE
+VAL 0x00000000 DI_INDEX_SIZE_16_BIT
+VAL 0x00000001 DI_INDEX_SIZE_32_BIT
+REG 0x00008960 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_FILLED_SIZE_0
+REG 0x00008964 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_FILLED_SIZE_1
+REG 0x00008968 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_FILLED_SIZE_2
+REG 0x0000896c 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_FILLED_SIZE_3
+REG 0x00008970 0x00000000 0x00000010 32    0    1    0 VGT_NUM_INDICES
+REG 0x00008974 0x00000000 0x00000010 32    0    1    0 VGT_NUM_INSTANCES
+REG 0x00008a10 0x00000000 0x00000006 32    0    1    0 PA_CL_CNTL_STATUS
+FLD 31 0x00000001 0x00000000 3 CL_BUSY
+REG 0x00008a14 0x00000000 0x00000006 32    0    1    0 PA_CL_ENHANCE
+FLD  0 0x00000001 0x00000000 3 CLIP_VTX_REORDER_ENA
+FLD  1 0x00000003 0x00000000 3 NUM_CLIP_SEQ
+FLD  3 0x00000001 0x00000000 3 CLIPPED_PRIM_SEQ_STALL
+FLD  4 0x00000001 0x00000000 3 VE_NAN_PROC_DISABLE
+REG 0x00008a50 0x00000000 0x00000006 32    0    1    0 PA_SU_CNTL_STATUS
+FLD 31 0x00000001 0x00000000 3 SU_BUSY
+REG 0x00008b10 0x00000000 0x00000006 32    0    1    0 PA_SC_LINE_STIPPLE_STATE
+FLD  0 0x0000000f 0x00000000 3 CURRENT_PTR
+FLD  8 0x000000ff 0x00000000 3 CURRENT_COUNT
+REG 0x00008b20 0x00000000 0x00000006 32    0    1    0 PA_SC_MULTI_CHIP_CNTL
+FLD  0 0x00000007 0x00000000 3 LOG2_NUM_CHIPS
+FLD  3 0x00000003 0x00000000 3 MULTI_CHIP_TILE_SIZE
+VAL 0x00000000 X_16_X_16_PIXEL_TILE_PER_CHIP
+VAL 0x00000001 X_32_X_32_PIXEL_TILE_PER_CHIP
+VAL 0x00000002 X_64_X_64_PIXEL_TILE_PER_CHIP
+VAL 0x00000003 X_128X128_PIXEL_TILE_PER_CHIP
+FLD  5 0x00000007 0x00000000 3 CHIP_TILE_X_LOC
+FLD  8 0x00000007 0x00000000 3 CHIP_TILE_Y_LOC
+FLD 11 0x00000001 0x00000000 3 CHIP_SUPER_TILE_B
+REG 0x00008b40 0x00000000 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_2S
+FLD  0 0x0000000f 0x00000000 3 S0_X
+FLD  4 0x0000000f 0x00000000 3 S0_Y
+FLD  8 0x0000000f 0x00000000 3 S1_X
+FLD 12 0x0000000f 0x00000000 3 S1_Y
+REG 0x00008b44 0x00000000 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_4S
+FLD  0 0x0000000f 0x00000000 3 S0_X
+FLD  4 0x0000000f 0x00000000 3 S0_Y
+FLD  8 0x0000000f 0x00000000 3 S1_X
+FLD 12 0x0000000f 0x00000000 3 S1_Y
+FLD 16 0x0000000f 0x00000000 3 S2_X
+FLD 20 0x0000000f 0x00000000 3 S2_Y
+FLD 24 0x0000000f 0x00000000 3 S3_X
+FLD 28 0x0000000f 0x00000000 3 S3_Y
+REG 0x00008b48 0x00000000 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_8S_WD0
+FLD  0 0x0000000f 0x00000000 3 S0_X
+FLD  4 0x0000000f 0x00000000 3 S0_Y
+FLD  8 0x0000000f 0x00000000 3 S1_X
+FLD 12 0x0000000f 0x00000000 3 S1_Y
+FLD 16 0x0000000f 0x00000000 3 S2_X
+FLD 20 0x0000000f 0x00000000 3 S2_Y
+FLD 24 0x0000000f 0x00000000 3 S3_X
+FLD 28 0x0000000f 0x00000000 3 S3_Y
+REG 0x00008b4c 0x00000000 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_8S_WD1
+FLD  0 0x0000000f 0x00000000 3 S4_X
+FLD  4 0x0000000f 0x00000000 3 S4_Y
+FLD  8 0x0000000f 0x00000000 3 S5_X
+FLD 12 0x0000000f 0x00000000 3 S5_Y
+FLD 16 0x0000000f 0x00000000 3 S6_X
+FLD 20 0x0000000f 0x00000000 3 S6_Y
+FLD 24 0x0000000f 0x00000000 3 S7_X
+FLD 28 0x0000000f 0x00000000 3 S7_Y
+REG 0x00008be0 0x00000000 0x00000006 32    0    1    0 PA_SC_CNTL_STATUS
+FLD 30 0x00000001 0x00000000 3 MPASS_OVERFLOW
+REG 0x00008bf0 0x00000000 0x00000006 32    0    1    0 PA_SC_ENHANCE
+FLD  0 0x00000fff 0x00000000 3 FORCE_EOV_MAX_CLK_CNT
+FLD 12 0x00000fff 0x00000000 3 FORCE_EOV_MAX_TILE_CNT
+REG 0x00008c00 0x00000000 0x0000000c 32    0    1    0 SQ_CONFIG
+FLD  0 0x00000001 0x00000000 3 VC_ENABLE
+FLD  1 0x00000001 0x00000000 3 EXPORT_SRC_C
+FLD  2 0x00000001 0x00000000 3 DX9_CONSTS
+FLD  3 0x00000001 0x00000000 3 ALU_INST_PREFER_VECTOR
+FLD  4 0x00000001 0x00000000 3 DX10_CLAMP
+FLD  5 0x00000001 0x00000000 3 ALU_PREFER_ONE_WATERFALL
+FLD  6 0x00000001 0x00000000 3 ALU_MAX_ONE_WATERFALL
+FLD  8 0x00000003 0x00000000 3 CLAUSE_SEQ_PRIO
+FLD 24 0x00000003 0x00000000 3 PS_PRIO
+FLD 24 0x00000003 0x00000000 3 PS_PRIO
+FLD 26 0x00000003 0x00000000 3 VS_PRIO
+FLD 26 0x00000003 0x00000000 3 VS_PRIO
+FLD 28 0x00000003 0x00000000 3 GS_PRIO
+FLD 28 0x00000003 0x00000000 3 GS_PRIO
+FLD 30 0x00000003 0x00000000 3 ES_PRIO
+VAL 0x00000000 SQ_CL_PRIO_RND_ROBIN
+VAL 0x00000001 SQ_CL_PRIO_MACRO_SEQ
+VAL 0x00000002 SQ_CL_PRIO_NONE
+FLD 30 0x00000003 0x00000000 3 ES_PRIO
+REG 0x00008c04 0x00000000 0x0000000c 32    0    1    0 SQ_GPR_RESOURCE_MGMT_1
+FLD  0 0x000000ff 0x00000000 3 NUM_PS_GPRS
+FLD 16 0x000000ff 0x00000000 3 NUM_VS_GPRS
+FLD 28 0x0000000f 0x00000000 3 NUM_CLAUSE_TEMP_GPRS
+REG 0x00008c08 0x00000000 0x0000000c 32    0    1    0 SQ_GPR_RESOURCE_MGMT_2
+FLD  0 0x000000ff 0x00000000 3 NUM_GS_GPRS
+FLD 16 0x000000ff 0x00000000 3 NUM_ES_GPRS
+REG 0x00008c0c 0x00000000 0x0000000c 32    0    1    0 SQ_THREAD_RESOURCE_MGMT
+FLD  0 0x000000ff 0x00000000 3 NUM_PS_THREADS
+FLD  8 0x000000ff 0x00000000 3 NUM_VS_THREADS
+FLD 16 0x000000ff 0x00000000 3 NUM_GS_THREADS
+FLD 24 0x000000ff 0x00000000 3 NUM_ES_THREADS
+REG 0x00008c10 0x00000000 0x0000000c 32    0    1    0 SQ_STACK_RESOURCE_MGMT_1
+FLD  0 0x00000fff 0x00000000 3 NUM_PS_STACK_ENTRIES
+FLD 16 0x00000fff 0x00000000 3 NUM_VS_STACK_ENTRIES
+REG 0x00008c14 0x00000000 0x0000000c 32    0    1    0 SQ_STACK_RESOURCE_MGMT_2
+FLD  0 0x00000fff 0x00000000 3 NUM_GS_STACK_ENTRIES
+FLD 16 0x00000fff 0x00000000 3 NUM_ES_STACK_ENTRIES
+REG 0x00008c40 0x00000000 0x0000000c 32    0    1    0 SQ_ESGS_RING_BASE
+REG 0x00008c44 0x00000000 0x0000000c 32    0    1    0 SQ_ESGS_RING_SIZE
+REG 0x00008c48 0x00000000 0x0000000c 32    0    1    0 SQ_GSVS_RING_BASE
+REG 0x00008c4c 0x00000000 0x0000000c 32    0    1    0 SQ_GSVS_RING_SIZE
+REG 0x00008c50 0x00000000 0x0000000c 32    0    1    0 SQ_ESTMP_RING_BASE
+REG 0x00008c54 0x00000000 0x0000000c 32    0    1    0 SQ_ESTMP_RING_SIZE
+REG 0x00008c58 0x00000000 0x0000000c 32    0    1    0 SQ_GSTMP_RING_BASE
+REG 0x00008c5c 0x00000000 0x0000000c 32    0    1    0 SQ_GSTMP_RING_SIZE
+REG 0x00008c60 0x00000000 0x0000000c 32    0    1    0 SQ_VSTMP_RING_BASE
+REG 0x00008c64 0x00000000 0x0000000c 32    0    1    0 SQ_VSTMP_RING_SIZE
+REG 0x00008c68 0x00000000 0x0000000c 32    0    1    0 SQ_PSTMP_RING_BASE
+REG 0x00008c6c 0x00000000 0x0000000c 32    0    1    0 SQ_PSTMP_RING_SIZE
+REG 0x00008c70 0x00000000 0x0000000c 32    0    1    0 SQ_FBUF_RING_BASE
+REG 0x00008c74 0x00000000 0x0000000c 32    0    1    0 SQ_FBUF_RING_SIZE
+REG 0x00008c78 0x00000000 0x0000000c 32    0    1    0 SQ_REDUC_RING_BASE
+REG 0x00008c7c 0x00000000 0x0000000c 32    0    1    0 SQ_REDUC_RING_SIZE
+REG 0x00008cf0 0x00000000 0x00000000 32    0    1    0 SQ_MS_FIFO_SIZES
+FLD  0 0x000000ff 0x00000000 3 CACHE_FIFO_SIZE
+FLD  8 0x0000001f 0x00000000 3 FETCH_FIFO_HIWATER
+FLD 16 0x000000ff 0x00000000 3 DONE_FIFO_HIWATER
+FLD 24 0x0000000f 0x00000000 3 ALU_UPDATE_FIFO_HIWATER
+REG 0x0000900c 0x00000000 0x0000000d 32    0    1    0 SX_EXPORT_BUFFER_SIZES
+FLD  0 0x000000ff 0x00000000 3 COLOR_BUFFER_SIZE
+FLD  8 0x000000ff 0x00000000 3 POSITION_BUFFER_SIZE
+FLD 16 0x000000ff 0x00000000 3 SMX_BUFFER_SIZE
+REG 0x00009010 0x00000000 0x0000000d 32    0    1    0 SX_MEMORY_EXPORT_BASE
+REG 0x00009014 0x00000000 0x0000000d 32    0    1    0 SX_MEMORY_EXPORT_SIZE
+REG 0x00009054 0x00000000 0x00000000 32    0    1    0 SX_DEBUG_1
+FLD  0 0x00000001 0x00000000 3 SMX_EVENT_RELEASE
+FLD 16 0x00000001 0x00000000 3 ENABLE_NEW_SMX_ADDRESS
+REG 0x00009100 0x00000000 0x0000000e 32    0    1    0 SPI_CONFIG_CNTL
+FLD  0 0x0000001f 0x00000000 3 GPR_WRITE_PRIORITY
+VAL 0x00000000 X_PRIORITY_ORDER
+VAL 0x00000001 X_PRIORITY_ORDER_VS
+FLD  5 0x00000001 0x00000000 3 DISABLE_INTERP_1
+FLD  6 0x00000003 0x00000000 3 DEBUG_THREAD_TYPE_SEL
+FLD  8 0x0000001f 0x00000000 3 DEBUG_GROUP_SEL
+FLD 13 0x00000001 0x00000000 3 DEBUG_GRBM_OVERRIDE
+REG 0x0000913c 0x00000000 0x0000000e 32    0    1    0 SPI_CONFIG_CNTL_1
+FLD  0 0x0000000f 0x00000000 3 VTX_DONE_DELAY
+FLD  4 0x00000001 0x00000000 3 INTERP_ONE_PRIM_PER_ROW
+VAL 0x00000000 X_DELAY_10_CLKS
+VAL 0x00000001 X_DELAY_11_CLKS
+VAL 0x00000002 X_DELAY_12_CLKS
+VAL 0x00000003 X_DELAY_13_CLKS
+VAL 0x00000004 X_DELAY_14_CLKS
+VAL 0x00000005 X_DELAY_15_CLKS
+VAL 0x00000006 X_DELAY_16_CLKS
+VAL 0x00000007 X_DELAY_17_CLKS
+VAL 0x00000008 X_DELAY_2_CLKS
+VAL 0x00000009 X_DELAY_3_CLKS
+VAL 0x0000000a X_DELAY_4_CLKS
+VAL 0x0000000b X_DELAY_5_CLKS
+VAL 0x0000000c X_DELAY_6_CLKS
+VAL 0x0000000d X_DELAY_7_CLKS
+VAL 0x0000000e X_DELAY_8_CLKS
+VAL 0x0000000f X_DELAY_9_CLKS
+FLD  4 0x00000001 0x00000000 3 INTERP_ONE_PRIM_PER_ROW
+REG 0x00009400 0x00000000 0x0000000f 32    0    1    0 TD_FILTER4
+FLD  0 0x000007ff 0x00000000 3 WEIGHT_1
+FLD 11 0x000007ff 0x00000000 3 WEIGHT_0
+FLD 22 0x00000001 0x00000000 3 WEIGHT_PAIR
+FLD 23 0x0000000f 0x00000000 3 PHASE
+FLD 27 0x00000001 0x00000000 3 DIRECTION
+REG 0x00009404 0x00000000 0x0000000f 32    0    1    0 TD_FILTER4_1
+FLD  0 0x000007ff 0x00000000 3 WEIGHT_1
+FLD 11 0x000007ff 0x00000000 3 WEIGHT_0
+REG 0x00009490 0x00000000 0x0000000f 32    0    1    0 TD_CNTL
+FLD  0 0x00000003 0x00000000 3 SYNC_PHASE_SH
+FLD  4 0x00000003 0x00000000 3 SYNC_PHASE_VC_SMX
+REG 0x00009494 0x00000000 0x0000000f 32    0    1    0 TD0_CNTL
+FLD 28 0x00000003 0x00000000 3 ID_OVERRIDE
+REG 0x000094a4 0x00000000 0x0000000f 32    0    1    0 TD0_STATUS
+FLD 31 0x00000001 0x00000000 3 BUSY
+REG 0x00009504 0x00000000 0x0000000f 32    0    1    0 TA_CNTL
+FLD  0 0x0000001f 0x00000000 3 GRADIENT_CREDIT
+FLD  8 0x0000001f 0x00000000 3 WALKER_CREDIT
+FLD 16 0x0000001f 0x00000000 3 ALIGNER_CREDIT
+FLD 22 0x000003ff 0x00000000 3 TD_FIFO_CREDIT
+REG 0x00009508 0x00000000 0x0000000f 32    0    1    0 TA_CNTL_AUX
+FLD  0 0x00000001 0x00000000 3 DISABLE_CUBE_WRAP
+FLD 24 0x00000001 0x00000000 3 SYNC_GRADIENT
+FLD 25 0x00000001 0x00000000 3 SYNC_WALKER
+FLD 26 0x00000001 0x00000000 3 SYNC_ALIGNER
+FLD 31 0x00000001 0x00000000 3 BILINEAR_PRECISION
+REG 0x00009510 0x00000000 0x0000000f 32    0    1    0 TA0_CNTL
+FLD 28 0x00000003 0x00000000 3 ID_OVERRIDE
+REG 0x00009514 0x00000000 0x0000000f 32    0    1    0 TA1_CNTL
+FLD 28 0x00000003 0x00000000 3 ID_OVERRIDE
+REG 0x00009518 0x00000000 0x0000000f 32    0    1    0 TA2_CNTL
+FLD 28 0x00000003 0x00000000 3 ID_OVERRIDE
+REG 0x0000951c 0x00000000 0x0000000f 32    0    1    0 TA3_CNTL
+FLD 28 0x00000003 0x00000000 3 ID_OVERRIDE
+REG 0x00009520 0x00000000 0x0000000f 32    0    1    0 TA0_STATUS
+FLD 12 0x00000001 0x00000000 3 FG_PFIFO_EMPTYB
+FLD 13 0x00000001 0x00000000 3 FG_LFIFO_EMPTYB
+FLD 14 0x00000001 0x00000000 3 FG_SFIFO_EMPTYB
+FLD 16 0x00000001 0x00000000 3 FL_PFIFO_EMPTYB
+FLD 17 0x00000001 0x00000000 3 FL_LFIFO_EMPTYB
+FLD 18 0x00000001 0x00000000 3 FL_SFIFO_EMPTYB
+FLD 20 0x00000001 0x00000000 3 FA_PFIFO_EMPTYB
+FLD 21 0x00000001 0x00000000 3 FA_LFIFO_EMPTYB
+FLD 22 0x00000001 0x00000000 3 FA_SFIFO_EMPTYB
+FLD 24 0x00000001 0x00000000 3 IN_BUSY
+FLD 25 0x00000001 0x00000000 3 FG_BUSY
+FLD 27 0x00000001 0x00000000 3 FL_BUSY
+FLD 28 0x00000001 0x00000000 3 TA_BUSY
+FLD 29 0x00000001 0x00000000 3 FA_BUSY
+FLD 30 0x00000001 0x00000000 3 AL_BUSY
+FLD 31 0x00000001 0x00000000 3 BUSY
+REG 0x00009524 0x00000000 0x0000000f 32    0    1    0 TA1_STATUS
+FLD 12 0x00000001 0x00000000 3 FG_PFIFO_EMPTYB
+FLD 13 0x00000001 0x00000000 3 FG_LFIFO_EMPTYB
+FLD 14 0x00000001 0x00000000 3 FG_SFIFO_EMPTYB
+FLD 16 0x00000001 0x00000000 3 FL_PFIFO_EMPTYB
+FLD 17 0x00000001 0x00000000 3 FL_LFIFO_EMPTYB
+FLD 18 0x00000001 0x00000000 3 FL_SFIFO_EMPTYB
+FLD 20 0x00000001 0x00000000 3 FA_PFIFO_EMPTYB
+FLD 21 0x00000001 0x00000000 3 FA_LFIFO_EMPTYB
+FLD 22 0x00000001 0x00000000 3 FA_SFIFO_EMPTYB
+FLD 24 0x00000001 0x00000000 3 IN_BUSY
+FLD 25 0x00000001 0x00000000 3 FG_BUSY
+FLD 27 0x00000001 0x00000000 3 FL_BUSY
+FLD 28 0x00000001 0x00000000 3 TA_BUSY
+FLD 29 0x00000001 0x00000000 3 FA_BUSY
+FLD 30 0x00000001 0x00000000 3 AL_BUSY
+FLD 31 0x00000001 0x00000000 3 BUSY
+REG 0x00009528 0x00000000 0x0000000f 32    0    1    0 TA2_STATUS
+FLD 12 0x00000001 0x00000000 3 FG_PFIFO_EMPTYB
+FLD 13 0x00000001 0x00000000 3 FG_LFIFO_EMPTYB
+FLD 14 0x00000001 0x00000000 3 FG_SFIFO_EMPTYB
+FLD 16 0x00000001 0x00000000 3 FL_PFIFO_EMPTYB
+FLD 17 0x00000001 0x00000000 3 FL_LFIFO_EMPTYB
+FLD 18 0x00000001 0x00000000 3 FL_SFIFO_EMPTYB
+FLD 20 0x00000001 0x00000000 3 FA_PFIFO_EMPTYB
+FLD 21 0x00000001 0x00000000 3 FA_LFIFO_EMPTYB
+FLD 22 0x00000001 0x00000000 3 FA_SFIFO_EMPTYB
+FLD 24 0x00000001 0x00000000 3 IN_BUSY
+FLD 25 0x00000001 0x00000000 3 FG_BUSY
+FLD 27 0x00000001 0x00000000 3 FL_BUSY
+FLD 28 0x00000001 0x00000000 3 TA_BUSY
+FLD 29 0x00000001 0x00000000 3 FA_BUSY
+FLD 30 0x00000001 0x00000000 3 AL_BUSY
+FLD 31 0x00000001 0x00000000 3 BUSY
+REG 0x0000952c 0x00000000 0x0000000f 32    0    1    0 TA3_STATUS
+FLD 12 0x00000001 0x00000000 3 FG_PFIFO_EMPTYB
+FLD 13 0x00000001 0x00000000 3 FG_LFIFO_EMPTYB
+FLD 14 0x00000001 0x00000000 3 FG_SFIFO_EMPTYB
+FLD 16 0x00000001 0x00000000 3 FL_PFIFO_EMPTYB
+FLD 17 0x00000001 0x00000000 3 FL_LFIFO_EMPTYB
+FLD 18 0x00000001 0x00000000 3 FL_SFIFO_EMPTYB
+FLD 20 0x00000001 0x00000000 3 FA_PFIFO_EMPTYB
+FLD 21 0x00000001 0x00000000 3 FA_LFIFO_EMPTYB
+FLD 22 0x00000001 0x00000000 3 FA_SFIFO_EMPTYB
+FLD 24 0x00000001 0x00000000 3 IN_BUSY
+FLD 25 0x00000001 0x00000000 3 FG_BUSY
+FLD 27 0x00000001 0x00000000 3 FL_BUSY
+FLD 28 0x00000001 0x00000000 3 TA_BUSY
+FLD 29 0x00000001 0x00000000 3 FA_BUSY
+FLD 30 0x00000001 0x00000000 3 AL_BUSY
+FLD 31 0x00000001 0x00000000 3 BUSY
+REG 0x00009600 0x00000000 0x0000000f 32    0    1    0 TC_STATUS
+FLD  0 0x00000001 0x00000000 3 TC_BUSY
+REG 0x00009604 0x00000000 0x0000000f 32    0    1    0 TC_INVALIDATE
+FLD  0 0x00000001 0x00000000 3 START
+REG 0x00009608 0x00000000 0x0000000f 32    0    1    0 TC_CNTL
+FLD  0 0x00000001 0x00000000 3 FORCE_HIT
+FLD  1 0x00000001 0x00000000 3 FORCE_MISS
+FLD  5 0x0000000f 0x00000000 3 L2_SIZE
+VAL 0x00000000 L2_256K
+VAL 0x00000001 L2_224K
+VAL 0x00000002 L2_192K
+VAL 0x00000003 L2_160K
+VAL 0x00000004 L2_128K
+VAL 0x00000005 L2_96K
+VAL 0x00000006 L2_64K
+VAL 0x00000007 L2_32K
+FLD  9 0x00000001 0x00000000 3 L2_DISABLE_LATE_HIT
+FLD 10 0x00000001 0x00000000 3 DISABLE_VERT_PERF
+FLD 11 0x00000001 0x00000000 3 DISABLE_INVAL_BUSY
+FLD 12 0x00000001 0x00000000 3 DISABLE_INVAL_SAME_SURFACE
+FLD 13 0x00000003 0x00000000 3 PARTITION_MODE
+VAL 0x00000000 X_VERTEX
+FLD 15 0x00000001 0x00000000 3 MISS_ARB_MODE
+FLD 16 0x00000001 0x00000000 3 HIT_ARB_MODE
+FLD 17 0x00000001 0x00000000 3 DISABLE_WRITE_DELAY
+FLD 18 0x00000001 0x00000000 3 HIT_FIFO_DEPTH
+REG 0x00009700 0x00000000 0x0000000f 32    0    1    0 VC_CNTL
+FLD  0 0x00000001 0x00000000 3 L2_INVALIDATE
+FLD  1 0x00000001 0x00000000 3 RESERVED
+FLD  2 0x00000001 0x00000000 3 CC_FORCE_MISS
+FLD  3 0x00000003 0x00000000 3 MI_CHAN_SEL
+VAL 0x00000000 X_MC0_USES_CH_0_1
+VAL 0x00000001 X_MC0_USES_CH_0_3
+VAL 0x00000002 X_VC_MC0_IS_ACTIVE
+VAL 0x00000003 X_VC_MC1_IS_DISABLED
+FLD  5 0x00000001 0x00000000 3 MI_STEER_DISABLE
+FLD  6 0x0000000f 0x00000000 3 MI_CREDIT_CTR
+FLD 10 0x00000001 0x00000000 3 MI_CREDIT_WE
+FLD 11 0x00000007 0x00000000 3 MI_REQ_STALL_THLD
+VAL 0x00000000 X_LATENCY_EXCEEDS_399_CLOCKS
+VAL 0x00000001 X_LATENCY_EXCEEDS_415_CLOCKS
+VAL 0x00000002 X_LATENCY_EXCEEDS_431_CLOCKS
+VAL 0x00000003 X_LATENCY_EXCEEDS_447_CLOCKS
+VAL 0x00000004 X_LATENCY_EXCEEDS_463_CLOCKS
+VAL 0x00000005 X_LATENCY_EXCEEDS_479_CLOCKS
+VAL 0x00000006 X_LATENCY_EXCEEDS_495_CLOCKS
+VAL 0x00000007 X_LATENCY_EXCEEDS_511_CLOCKS
+FLD 14 0x0000001f 0x00000000 3 MI_TIMESTAMP_RES
+VAL 0x00000000 X_1X_SYSTEM_CLOCK
+VAL 0x00000001 X_2X_SYSTEM_CLOCK
+VAL 0x00000002 X_4X_SYSTEM_CLOCK
+VAL 0x00000003 X_8X_SYSTEM_CLOCK
+VAL 0x00000004 X_16X_SYSTEM_CLOCK
+VAL 0x00000005 X_32X_SYSTEM_CLOCK
+VAL 0x00000006 X_64X_SYSTEM_CLOCK
+VAL 0x00000007 X_128X_SYSTEM_CLOCK
+VAL 0x00000008 X_256X_SYSTEM_CLOCK
+VAL 0x00000009 X_512X_SYSTEM_CLOCK
+VAL 0x0000000a X_1024X_SYSTEM_CLOCK
+VAL 0x0000000b X_2048X_SYSTEM_CLOCK
+VAL 0x0000000c X_4092X_SYSTEM_CLOCK
+VAL 0x0000000d X_8192X_SYSTEM_CLOCK
+VAL 0x0000000e X_16384X_SYSTEM_CLOCK
+VAL 0x0000000f X_32768X_SYSTEM_CLOCK
+REG 0x00009704 0x00000000 0x0000000f 32    0    1    0 VC_CNTL_STATUS
+FLD  0 0x00000001 0x00000000 3 RP_BUSY
+FLD  1 0x00000001 0x00000000 3 RG_BUSY
+FLD  2 0x00000001 0x00000000 3 VC_BUSY
+FLD  3 0x00000001 0x00000000 3 CLAMP_DETECT
+REG 0x00009714 0x00000000 0x0000000f 32    0    1    0 VC_ENHANCE
+REG 0x00009718 0x00000000 0x0000000f 32    0    1    0 VC_CONFIG
+FLD  0 0x00000001 0x00000000 3 WRITE_DIS
+FLD  1 0x00000007 0x00000000 3 GPR_DATA_PHASE_ADJ
+VAL 0x00000000 X_LATENCY_BASE_0_CYCLES
+VAL 0x00000001 X_LATENCY_BASE_1_CYCLES
+VAL 0x00000002 X_LATENCY_BASE_2_CYCLES
+VAL 0x00000003 X_LATENCY_BASE_3_CYCLES
+FLD  4 0x00000007 0x00000000 3 TD_SIMD_SYNC_ADJ
+VAL 0x00000000 X_0_CYCLES_DELAY
+VAL 0x00000001 X_1_CYCLES_DELAY
+VAL 0x00000002 X_2_CYCLES_DELAY
+VAL 0x00000003 X_3_CYCLES_DELAY
+VAL 0x00000004 X_4_CYCLES_DELAY
+VAL 0x00000005 X_5_CYCLES_DELAY
+VAL 0x00000006 X_6_CYCLES_DELAY
+VAL 0x00000007 X_7_CYCLES_DELAY
+REG 0x00009830 0x00000000 0x00000003 32    0    1    0 DB_DEBUG
+REG 0x00009838 0x00000000 0x00000003 32    0    1    0 DB_WATERMARKS
+FLD  0 0x0000001f 0x00000000 3 DEPTH_FREE
+FLD  5 0x0000003f 0x00000000 3 DEPTH_FLUSH
+FLD 11 0x0000000f 0x00000000 3 FORCE_SUMMARIZE
+FLD 15 0x0000001f 0x00000000 3 DEPTH_PENDING_FREE
+FLD 20 0x0000001f 0x00000000 3 DEPTH_CACHELINE_FREE
+FLD 25 0x00000001 0x00000000 3 EARLY_Z_PANIC_DISABLE
+FLD 26 0x00000001 0x00000000 3 LATE_Z_PANIC_DISABLE
+FLD 27 0x00000001 0x00000000 3 RE_Z_PANIC_DISABLE
+FLD 28 0x0000000f 0x00000000 3 DB_EXTRA_DEBUG
+REG 0x000098f0 0x00000000 0x00000000 32    0    1    0 GB_TILING_CONFIG
+FLD  1 0x00000007 0x00000000 3 PIPE_TILING
+FLD  4 0x00000003 0x00000000 3 BANK_TILING
+FLD  6 0x00000003 0x00000000 3 GROUP_SIZE
+FLD  8 0x00000007 0x00000000 3 ROW_TILING
+FLD 11 0x00000007 0x00000000 3 BANK_SWAPS
+FLD 14 0x00000003 0x00000000 3 SAMPLE_SPLIT
+FLD 16 0x0000ffff 0x00000000 3 BACKEND_MAP
+REG 0x000098f4 0x00000000 0x00000000 32    0    1    0 CC_RB_BACKEND_DISABLE
+FLD 16 0x000000ff 0x00000000 0 BACKEND_DISABLE
+REG 0x0000a020 0x00000000 0x0000000d 32    0    1    0 SMX_DC_CTL0
+FLD  0 0x00000001 0x00000000 3 WR_GATHER_STREAM0
+FLD  1 0x00000001 0x00000000 3 WR_GATHER_STREAM1
+FLD  2 0x00000001 0x00000000 3 WR_GATHER_STREAM2
+FLD  3 0x00000001 0x00000000 3 WR_GATHER_STREAM3
+FLD  4 0x00000001 0x00000000 3 WR_GATHER_SCRATCH
+FLD  5 0x00000001 0x00000000 3 WR_GATHER_REDUC_BUF
+FLD  6 0x00000001 0x00000000 3 WR_GATHER_RING_BUF
+FLD  7 0x00000001 0x00000000 3 WR_GATHER_F_BUF
+FLD  8 0x00000001 0x00000000 3 DISABLE_CACHES
+FLD 10 0x00000001 0x00000000 3 AUTO_FLUSH_INVAL_EN
+FLD 11 0x00000001 0x00000000 3 AUTO_FLUSH_EN
+FLD 12 0x0000ffff 0x00000000 3 AUTO_FLUSH_CNT
+FLD 28 0x00000003 0x00000000 3 MC_RD_STALL_FACTOR
+FLD 30 0x00000003 0x00000000 3 MC_WR_STALL_FACTOR
+REG 0x0000a024 0x00000000 0x0000000d 32    0    1    0 SMX_DC_CTL1
+FLD  0 0x0000007f 0x00000000 3 OP_FIFO_SKID
+FLD  8 0x00000001 0x00000000 3 CACHE_LINE_SIZE
+FLD  9 0x00000001 0x00000000 3 MULTI_FLUSH_MODE
+FLD 10 0x0000000f 0x00000000 3 MULTI_FLUSH_REQ_ABORT_IDX_FIFO_SKID
+FLD 16 0x00000001 0x00000000 3 DISABLE_WR_GATHER_RD_HIT_FORCE_EVICT
+FLD 17 0x00000001 0x00000000 3 DISABLE_WR_GATHER_RD_HIT_COMP_VLDS_CHECK
+FLD 18 0x00000001 0x00000000 3 DISABLE_FLUSH_ES_ALSO_INVALS
+FLD 19 0x00000001 0x00000000 3 DISABLE_FLUSH_GS_ALSO_INVALS
+REG 0x0000a028 0x00000000 0x0000000d 32    0    1    0 SMX_DC_CTL2
+FLD  0 0x00000001 0x00000000 3 INVALIDATE_CACHES
+FLD  1 0x00000001 0x00000000 3 CACHES_INVALID
+FLD  2 0x00000001 0x00000000 3 CACHES_DIRTY
+FLD  4 0x00000001 0x00000000 3 FLUSH_ALL
+FLD  8 0x00000001 0x00000000 3 FLUSH_GS_THREADS
+FLD  9 0x00000001 0x00000000 3 FLUSH_ES_THREADS
+REG 0x0000a02c 0x00000000 0x0000000d 32    0    1    0 SMX_DC_MC_INTF_CTL
+FLD  0 0x000000ff 0x00000000 3 MC_RD_REQ_CRED
+FLD 16 0x000000ff 0x00000000 3 MC_WR_REQ_CRED
+REG 0x0000a400 0x00000000 0x0000000f 32    0    1    0 TD_PS_SAMPLER0_BORDER_RED
+REG 0x0000a404 0x00000000 0x0000000f 32    0    1    0 TD_PS_SAMPLER0_BORDER_GREEN
+REG 0x0000a408 0x00000000 0x0000000f 32    0    1    0 TD_PS_SAMPLER0_BORDER_BLUE
+REG 0x0000a40c 0x00000000 0x0000000f 32    0    1    0 TD_PS_SAMPLER0_BORDER_ALPHA
+REG 0x0000a600 0x00000000 0x0000000f 32    0    1    0 TD_VS_SAMPLER0_BORDER_RED
+REG 0x0000a604 0x00000000 0x0000000f 32    0    1    0 TD_VS_SAMPLER0_BORDER_GREEN
+REG 0x0000a608 0x00000000 0x0000000f 32    0    1    0 TD_VS_SAMPLER0_BORDER_BLUE
+REG 0x0000a60c 0x00000000 0x0000000f 32    0    1    0 TD_VS_SAMPLER0_BORDER_ALPHA
+REG 0x0000a800 0x00000000 0x0000000f 32    0    1    0 TD_GS_SAMPLER0_BORDER_RED
+REG 0x0000a804 0x00000000 0x0000000f 32    0    1    0 TD_GS_SAMPLER0_BORDER_GREEN
+REG 0x0000a808 0x00000000 0x0000000f 32    0    1    0 TD_GS_SAMPLER0_BORDER_BLUE
+REG 0x0000a80c 0x00000000 0x0000000f 32    0    1    0 TD_GS_SAMPLER0_BORDER_ALPHA
+REG 0x0000aa00 0x00000000 0x0000000f 32    0    1    0 TD_PS_SAMPLER0_CLEARTYPE_KERNEL
+FLD  0 0x00000007 0x00000000 3 WIDTH
+FLD  3 0x00000007 0x00000000 3 HEIGHT
+REG 0x0000c100 0x00000000 0x00000002 32    0    1    0 CP_RB_BASE
+REG 0x0000c104 0x00000000 0x00000002 32    0    1    0 CP_RB_CNTL
+FLD  0 0x0000003f 0x00000000 3 RB_BUFSZ
+FLD  8 0x0000003f 0x00000000 3 RB_BLKSZ
+FLD 16 0x00000003 0x00000000 3 BUF_SWAP
+VAL 0x00000000 SWAP_NONE
+VAL 0x00000001 SWAP_16_BIT
+VAL 0x00000002 SWAP_32_BIT
+VAL 0x00000003 SWAP_WORD
+FLD 27 0x00000001 0x00000000 3 RB_NO_UPDATE
+FLD 31 0x00000001 0x00000000 3 RB_RPTR_WR_ENA
+REG 0x0000c108 0x00000000 0x00000002 32    0    1    0 CP_RB_RPTR_WR
+FLD  0 0x000fffff 0x00000000 3 RB_RPTR_WR
+REG 0x0000c10c 0x00000000 0x00000002 32    0    1    0 CP_RB_RPTR_ADDR
+FLD  0 0x00000003 0x00000000 3 RB_RPTR_SWAP
+VAL 0x00000000 SWAP_NONE
+VAL 0x00000001 SWAP_16_BIT
+VAL 0x00000002 SWAP_32_BIT
+VAL 0x00000003 SWAP_WORD
+REG 0x0000c110 0x00000000 0x00000002 32    0    1    0 CP_RB_RPTR_ADDR_HI
+REG 0x0000c114 0x00000000 0x00000002 32    0    1    0 CP_RB_WPTR
+FLD  0 0x000fffff 0x00000000 3 RB_WPTR
+REG 0x0000c118 0x00000000 0x00000002 32    0    1    0 CP_RB_WPTR_POLL_ADDR
+REG 0x0000c11c 0x00000000 0x00000002 32    0    1    0 CP_RB_WPTR_POLL_ADDR_HI
+REG 0x0000c124 0x00000000 0x00000002 32    0    1    0 CP_INT_CNTL
+FLD 19 0x00000001 0x00000000 3 CNTX_BUSY_INT_ENABLE
+FLD 20 0x00000001 0x00000000 3 CNTX_EMPTY_INT_ENABLE
+FLD 25 0x00000001 0x00000000 3 SCRATCH_INT_ENABLE
+FLD 26 0x00000001 0x00000000 3 TIME_STAMP_INT_ENABLE
+FLD 29 0x00000001 0x00000000 3 IB2_INT_ENABLE
+FLD 30 0x00000001 0x00000000 3 IB1_INT_ENABLE
+FLD 31 0x00000001 0x00000000 3 RB_INT_ENABLE
+REG 0x0000c128 0x00000000 0x00000002 32    0    1    0 CP_INT_STATUS
+FLD  0 0x00000001 0x00000000 3 DISABLE_CNTX_SWITCH_INT_STAT
+FLD  1 0x00000001 0x00000000 3 ENABLE_CNTX_SWITCH_INT_STAT
+FLD 18 0x00000001 0x00000000 3 SEM_SIGNAL_INT_STAT
+FLD 19 0x00000001 0x00000000 3 CNTX_BUSY_INT_STAT
+FLD 20 0x00000001 0x00000000 3 CNTX_EMPTY_INT_STAT
+FLD 21 0x00000001 0x00000000 3 WAITMEM_SEM_INT_STAT
+FLD 22 0x00000001 0x00000000 3 PRIV_INSTR_INT_STAT
+FLD 23 0x00000001 0x00000000 3 PRIV_REG_INT_STAT
+FLD 24 0x00000001 0x00000000 3 OPCODE_ERROR_INT_STAT
+FLD 25 0x00000001 0x00000000 3 SCRATCH_INT_STAT
+FLD 26 0x00000001 0x00000000 3 TIME_STAMP_INT_STAT
+FLD 27 0x00000001 0x00000000 3 RESERVED_BIT_ERROR_INT_STAT
+FLD 28 0x00000001 0x00000000 3 DMA_INT_STAT
+FLD 29 0x00000001 0x00000000 3 IB2_INT_STAT
+FLD 30 0x00000001 0x00000000 3 IB1_INT_STAT
+FLD 31 0x00000001 0x00000000 3 RB_INT_STAT
+REG 0x0000c150 0x00000000 0x00000002 32    0    1    0 CP_PFP_UCODE_ADDR
+REG 0x0000c154 0x00000000 0x00000002 32    0    1    0 CP_PFP_UCODE_DATA
+REG 0x0000c158 0x00000000 0x00000002 32    0    1    0 CP_ME_RAM_RADDR
+REG 0x0000c15c 0x00000000 0x00000002 32    0    1    0 CP_ME_RAM_WADDR
+REG 0x0000c160 0x00000000 0x00000002 32    0    1    0 CP_ME_RAM_DATA
+REG 0x0000c1fc 0x00000000 0x00000002 32    0    1    0 CP_DEBUG
+REG 0x00028000 0x00000000 0x00000003 32    0    1    0 DB_DEPTH_SIZE
+FLD  0 0x000003ff 0x00000000 3 PITCH_TILE_MAX
+FLD 10 0x000fffff 0x00000000 3 SLICE_TILE_MAX
+REG 0x00028004 0x00000000 0x00000003 32    0    1    0 DB_DEPTH_VIEW
+FLD  0 0x000007ff 0x00000000 3 SLICE_START
+FLD 13 0x000007ff 0x00000000 3 SLICE_MAX
+REG 0x0002800c 0x00000000 0x00000003 32    0    1    0 DB_DEPTH_BASE
+REG 0x00028010 0x00000000 0x00000003 32    0    1    0 DB_DEPTH_INFO
+FLD  0 0x00000007 0x00000000 3 FORMAT
+VAL 0x00000000 DEPTH_INVALID
+VAL 0x00000001 DEPTH_16
+VAL 0x00000002 DEPTH_X8_24
+VAL 0x00000003 DEPTH_8_24
+VAL 0x00000004 DEPTH_X8_24_FLOAT
+VAL 0x00000005 DEPTH_8_24_FLOAT
+VAL 0x00000006 DEPTH_32_FLOAT
+VAL 0x00000007 DEPTH_X24_8_32_FLOAT
+FLD  3 0x00000001 0x00000000 3 READ_SIZE
+FLD 15 0x0000000f 0x00000000 3 ARRAY_MODE
+VAL 0x00000002 ARRAY_1D_TILED_THIN1
+VAL 0x00000004 ARRAY_2D_TILED_THIN1
+FLD 25 0x00000001 0x00000000 3 TILE_SURFACE_ENABLE
+FLD 26 0x00000001 0x00000000 3 TILE_COMPACT
+FLD 31 0x00000001 0x00000000 3 ZRANGE_PRECISION
+REG 0x00028014 0x00000000 0x00000003 32    0    1    0 DB_HTILE_DATA_BASE
+REG 0x00028028 0x00000000 0x00000003 32    0    1    0 DB_STENCIL_CLEAR
+FLD  0 0x000000ff 0x00000000 3 CLEAR
+FLD 16 0x000000ff 0x00000000 3 MIN
+REG 0x0002802c 0x00000000 0x00000003 32    0    1    0 DB_DEPTH_CLEAR
+REG 0x00028030 0x00000000 0x00000006 32    0    1    0 PA_SC_SCREEN_SCISSOR_TL
+FLD  0 0x00007fff 0x00000000 3 TL_X
+FLD 16 0x00007fff 0x00000000 3 TL_Y
+REG 0x00028034 0x00000000 0x00000006 32    0    1    0 PA_SC_SCREEN_SCISSOR_BR
+FLD  0 0x00007fff 0x00000000 3 BR_X
+FLD 16 0x00007fff 0x00000000 3 BR_Y
+REG 0x00028040 0x00000000 0x00000001 32    0    8    4 CB_COLOR_BASE
+REG 0x00028060 0x00000000 0x00000001 32    0    8    4 CB_COLOR_SIZE
+FLD  0 0x000003ff 0x00000000 3 PITCH_TILE_MAX
+FLD 10 0x000fffff 0x00000000 3 SLICE_TILE_MAX
+REG 0x00028080 0x00000000 0x00000001 32    0    8    4 CB_COLOR_VIEW
+FLD  0 0x000007ff 0x00000000 3 SLICE_START
+FLD 13 0x000007ff 0x00000000 3 SLICE_MAX
+REG 0x000280a0 0x00000000 0x00000001 32    0    8    4 CB_COLOR_INFO
+FLD  0 0x00000003 0x00000000 3 ENDIAN
+VAL 0x00000000 ENDIAN_NONE
+VAL 0x00000001 ENDIAN_8IN16
+VAL 0x00000002 ENDIAN_8IN32
+VAL 0x00000003 ENDIAN_8IN64
+FLD  2 0x0000003f 0x00000000 3 FORMAT
+VAL 0x00000000 COLOR_INVALID
+VAL 0x00000001 COLOR_8
+VAL 0x00000002 COLOR_4_4
+VAL 0x00000003 COLOR_3_3_2
+VAL 0x00000005 COLOR_16
+VAL 0x00000006 COLOR_16_FLOAT
+VAL 0x00000007 COLOR_8_8
+VAL 0x00000008 COLOR_5_6_5
+VAL 0x00000009 COLOR_6_5_5
+VAL 0x0000000a COLOR_1_5_5_5
+VAL 0x0000000b COLOR_4_4_4_4
+VAL 0x0000000c COLOR_5_5_5_1
+VAL 0x0000000d COLOR_32
+VAL 0x0000000e COLOR_32_FLOAT
+VAL 0x0000000f COLOR_16_16
+VAL 0x00000010 COLOR_16_16_FLOAT
+VAL 0x00000011 COLOR_8_24
+VAL 0x00000012 COLOR_8_24_FLOAT
+VAL 0x00000013 COLOR_24_8
+VAL 0x00000014 COLOR_24_8_FLOAT
+VAL 0x00000015 COLOR_10_11_11
+VAL 0x00000016 COLOR_10_11_11_FLOAT
+VAL 0x00000017 COLOR_11_11_10
+VAL 0x00000018 COLOR_11_11_10_FLOAT
+VAL 0x00000019 COLOR_2_10_10_10
+VAL 0x0000001a COLOR_8_8_8_8
+VAL 0x0000001b COLOR_10_10_10_2
+VAL 0x0000001c COLOR_X24_8_32_FLOAT
+VAL 0x0000001d COLOR_32_32
+VAL 0x0000001e COLOR_32_32_FLOAT
+VAL 0x0000001f COLOR_16_16_16_16
+VAL 0x00000020 COLOR_16_16_16_16_FLOAT
+VAL 0x00000022 COLOR_32_32_32_32
+VAL 0x00000023 COLOR_32_32_32_32_FLOAT
+FLD  8 0x0000000f 0x00000000 3 ARRAY_MODE
+VAL 0x00000000 ARRAY_LINEAR_GENERAL
+VAL 0x00000001 ARRAY_LINEAR_ALIGNED
+VAL 0x00000004 ARRAY_2D_TILED_THIN1
+FLD 12 0x00000007 0x00000000 3 NUMBER_TYPE
+VAL 0x00000000 NUMBER_UNORM
+VAL 0x00000001 NUMBER_SNORM
+VAL 0x00000002 NUMBER_USCALED
+VAL 0x00000003 NUMBER_SSCALED
+VAL 0x00000004 NUMBER_UINT
+VAL 0x00000005 NUMBER_SINT
+VAL 0x00000006 NUMBER_SRGB
+VAL 0x00000007 NUMBER_FLOAT
+FLD 15 0x00000001 0x00000000 3 READ_SIZE
+FLD 16 0x00000003 0x00000000 3 COMP_SWAP
+VAL 0x00000000 SWAP_STD
+VAL 0x00000001 SWAP_ALT
+VAL 0x00000002 SWAP_STD_REV
+VAL 0x00000003 SWAP_ALT_REV
+FLD 18 0x00000003 0x00000000 3 TILE_MODE
+VAL 0x00000000 TILE_DISABLE
+VAL 0x00000001 TILE_CLEAR_ENABLE
+VAL 0x00000002 TILE_FRAG_ENABLE
+FLD 20 0x00000001 0x00000000 3 BLEND_CLAMP
+FLD 21 0x00000001 0x00000000 3 CLEAR_COLOR
+FLD 22 0x00000001 0x00000000 3 BLEND_BYPASS
+FLD 23 0x00000001 0x00000000 3 BLEND_FLOAT32
+FLD 24 0x00000001 0x00000000 3 SIMPLE_FLOAT
+FLD 25 0x00000001 0x00000000 3 ROUND_MODE
+FLD 26 0x00000001 0x00000000 3 TILE_COMPACT
+FLD 27 0x00000001 0x00000000 3 SOURCE_FORMAT
+REG 0x000280c0 0x00000000 0x00000001 32    0    8    4 CB_COLOR_TILE
+REG 0x000280e0 0x00000000 0x00000001 32    0    8    4 CB_COLOR_FRAG
+REG 0x00028100 0x00000000 0x00000001 32    0    8    4 CB_COLOR_MASK
+FLD  0 0x00000fff 0x00000000 3 CMASK_BLOCK_MAX
+FLD 12 0x000fffff 0x00000000 3 FMASK_TILE_MAX
+REG 0x00028120 0x00000000 0x00000001 32    0    1    0 CB_CLEAR_RED
+REG 0x00028124 0x00000000 0x00000001 32    0    1    0 CB_CLEAR_GREEN
+REG 0x00028128 0x00000000 0x00000001 32    0    1    0 CB_CLEAR_BLUE
+REG 0x0002812c 0x00000000 0x00000001 32    0    1    0 CB_CLEAR_ALPHA
+REG 0x00028140 0x00000000 0x0000000c 32    0   16    4 SQ_ALU_CONST_BUFFER_SIZE_PS
+FLD  0 0x000001ff 0x00000000 3 DATA
+REG 0x00028180 0x00000000 0x0000000c 32    0   16    4 SQ_ALU_CONST_BUFFER_SIZE_VS
+FLD  0 0x000001ff 0x00000000 3 DATA
+REG 0x000281c0 0x00000000 0x0000000c 32    0   16    4 SQ_ALU_CONST_BUFFER_SIZE_GS
+FLD  0 0x000001ff 0x00000000 3 DATA
+REG 0x00028200 0x00000000 0x00000006 32    0    1    0 PA_SC_WINDOW_OFFSET
+FLD  0 0x00007fff 0x00000000 3 WINDOW_X_OFFSET
+FLD 16 0x00007fff 0x00000000 3 WINDOW_Y_OFFSET
+REG 0x00028204 0x00000000 0x00000006 32    0    1    0 PA_SC_WINDOW_SCISSOR_TL
+FLD  0 0x00003fff 0x00000000 3 TL_X
+FLD 16 0x00003fff 0x00000000 3 TL_Y
+FLD 31 0x00000001 0x00000000 3 WINDOW_OFFSET_DISABLE
+REG 0x00028208 0x00000000 0x00000006 32    0    1    0 PA_SC_WINDOW_SCISSOR_BR
+FLD  0 0x00003fff 0x00000000 3 BR_X
+FLD 16 0x00003fff 0x00000000 3 BR_Y
+REG 0x0002820c 0x00000000 0x00000006 32    0    1    0 PA_SC_CLIPRECT_RULE
+FLD  0 0x0000ffff 0x00000000 3 CLIP_RULE
+REG 0x00028210 0x00000000 0x00000006 32    0    4    8 PA_SC_CLIPRECT_TL
+FLD  0 0x00003fff 0x00000000 3 TL_X
+FLD 16 0x00003fff 0x00000000 3 TL_Y
+REG 0x00028214 0x00000000 0x00000006 32    0    4    8 PA_SC_CLIPRECT_BR
+FLD  0 0x00003fff 0x00000000 3 BR_X
+FLD 16 0x00003fff 0x00000000 3 BR_Y
+REG 0x00028238 0x00000000 0x00000001 32    0    1    0 CB_TARGET_MASK
+FLD  0 0x0000000f 0x00000000 3 TARGET0_ENABLE
+FLD  4 0x0000000f 0x00000000 3 TARGET1_ENABLE
+FLD  8 0x0000000f 0x00000000 3 TARGET2_ENABLE
+FLD 12 0x0000000f 0x00000000 3 TARGET3_ENABLE
+FLD 16 0x0000000f 0x00000000 3 TARGET4_ENABLE
+FLD 20 0x0000000f 0x00000000 3 TARGET5_ENABLE
+FLD 24 0x0000000f 0x00000000 3 TARGET6_ENABLE
+FLD 28 0x0000000f 0x00000000 3 TARGET7_ENABLE
+REG 0x0002823c 0x00000000 0x00000001 32    0    1    0 CB_SHADER_MASK
+FLD  0 0x0000000f 0x00000000 3 OUTPUT0_ENABLE
+FLD  4 0x0000000f 0x00000000 3 OUTPUT1_ENABLE
+FLD  8 0x0000000f 0x00000000 3 OUTPUT2_ENABLE
+FLD 12 0x0000000f 0x00000000 3 OUTPUT3_ENABLE
+FLD 16 0x0000000f 0x00000000 3 OUTPUT4_ENABLE
+FLD 20 0x0000000f 0x00000000 3 OUTPUT5_ENABLE
+FLD 24 0x0000000f 0x00000000 3 OUTPUT6_ENABLE
+FLD 28 0x0000000f 0x00000000 3 OUTPUT7_ENABLE
+REG 0x00028240 0x00000000 0x00000006 32    0    1    0 PA_SC_GENERIC_SCISSOR_TL
+FLD  0 0x00003fff 0x00000000 3 TL_X
+FLD 16 0x00003fff 0x00000000 3 TL_Y
+FLD 31 0x00000001 0x00000000 3 WINDOW_OFFSET_DISABLE
+REG 0x00028244 0x00000000 0x00000006 32    0    1    0 PA_SC_GENERIC_SCISSOR_BR
+FLD  0 0x00003fff 0x00000000 3 BR_X
+FLD 16 0x00003fff 0x00000000 3 BR_Y
+REG 0x00028250 0x00000000 0x00000006 32    0   16    8 PA_SC_VPORT_SCISSOR_TL
+FLD  0 0x00003fff 0x00000000 3 TL_X
+FLD 16 0x00003fff 0x00000000 3 TL_Y
+FLD 31 0x00000001 0x00000000 3 WINDOW_OFFSET_DISABLE
+REG 0x00028254 0x00000000 0x00000006 32    0   16    8 PA_SC_VPORT_SCISSOR_BR
+FLD  0 0x00003fff 0x00000000 3 BR_X
+FLD 16 0x00003fff 0x00000000 3 BR_Y
+REG 0x000282d0 0x00000000 0x00000006 32    0   16    8 PA_SC_VPORT_ZMIN
+REG 0x000282d4 0x00000000 0x00000006 32    0   16    8 PA_SC_VPORT_ZMAX
+REG 0x00028350 0x00000000 0x0000000d 32    0    1    0 SX_MISC
+FLD  0 0x00000001 0x00000000 3 MULTIPASS
+REG 0x00028380 0x00000000 0x0000000c 32    0   32    4 SQ_VTX_SEMANTIC
+FLD  0 0x000000ff 0x00000000 3 SEMANTIC_ID
+REG 0x00028400 0x00000000 0x00000010 32    0    1    0 VGT_MAX_VTX_INDX
+REG 0x00028404 0x00000000 0x00000010 32    0    1    0 VGT_MIN_VTX_INDX
+REG 0x00028408 0x00000000 0x00000010 32    0    1    0 VGT_INDX_OFFSET
+REG 0x0002840c 0x00000000 0x00000010 32    0    1    0 VGT_MULTI_PRIM_IB_RESET_INDX
+REG 0x00028410 0x00000000 0x0000000d 32    0    1    0 SX_ALPHA_TEST_CONTROL
+FLD  0 0x00000007 0x00000000 3 ALPHA_FUNC
+VAL 0x00000000 REF_NEVER
+VAL 0x00000001 REF_LESS
+VAL 0x00000002 REF_EQUAL
+VAL 0x00000003 REF_LEQUAL
+VAL 0x00000004 REF_GREATER
+VAL 0x00000005 REF_NOTEQUAL
+VAL 0x00000006 REF_GEQUAL
+VAL 0x00000007 REF_ALWAYS
+FLD  3 0x00000001 0x00000000 3 ALPHA_TEST_ENABLE
+FLD  8 0x00000001 0x00000000 3 ALPHA_TEST_BYPASS
+REG 0x00028414 0x00000000 0x00000001 32    0    1    0 CB_BLEND_RED
+REG 0x00028418 0x00000000 0x00000001 32    0    1    0 CB_BLEND_GREEN
+REG 0x0002841c 0x00000000 0x00000001 32    0    1    0 CB_BLEND_BLUE
+REG 0x00028420 0x00000000 0x00000001 32    0    1    0 CB_BLEND_ALPHA
+REG 0x00028424 0x00000000 0x00000001 32    0    1    0 CB_FOG_RED
+REG 0x00028428 0x00000000 0x00000001 32    0    1    0 CB_FOG_GREEN
+REG 0x0002842c 0x00000000 0x00000001 32    0    1    0 CB_FOG_BLUE
+REG 0x00028430 0x00000000 0x00000003 32    0    1    0 DB_STENCILREFMASK
+FLD  0 0x000000ff 0x00000000 3 STENCILREF
+FLD  8 0x000000ff 0x00000000 3 STENCILMASK
+FLD 16 0x000000ff 0x00000000 3 STENCILWRITEMASK
+REG 0x00028434 0x00000000 0x00000003 32    0    1    0 DB_STENCILREFMASK_BF
+FLD  0 0x000000ff 0x00000000 3 STENCILREF_BF
+FLD  8 0x000000ff 0x00000000 3 STENCILMASK_BF
+FLD 16 0x000000ff 0x00000000 3 STENCILWRITEMASK_BF
+REG 0x00028438 0x00000000 0x0000000d 32    0    1    0 SX_ALPHA_REF
+REG 0x0002843c 0x00000000 0x00000006 32    0   16   24 PA_CL_VPORT_XSCALE
+REG 0x00028440 0x00000000 0x00000006 32    0   16   24 PA_CL_VPORT_XOFFSET
+REG 0x00028444 0x00000000 0x00000006 32    0   16   24 PA_CL_VPORT_YSCALE
+REG 0x00028448 0x00000000 0x00000006 32    0   16   24 PA_CL_VPORT_YOFFSET
+REG 0x0002844c 0x00000000 0x00000006 32    0   16   24 PA_CL_VPORT_ZSCALE
+REG 0x00028450 0x00000000 0x00000006 32    0   16   24 PA_CL_VPORT_ZOFFSET
+REG 0x00028614 0x00000000 0x0000000e 32    0   10    4 SPI_VS_OUT_ID
+FLD  0 0x000000ff 0x00000000 3 SEMANTIC_0
+FLD  8 0x000000ff 0x00000000 3 SEMANTIC_1
+FLD 16 0x000000ff 0x00000000 3 SEMANTIC_2
+FLD 24 0x000000ff 0x00000000 3 SEMANTIC_3
+REG 0x00028644 0x00000000 0x0000000e 32    0   32    4 SPI_PS_INPUT_CNTL
+FLD  0 0x000000ff 0x00000000 3 SEMANTIC
+FLD  8 0x00000003 0x00000000 3 DEFAULT_VAL
+VAL 0x00000000 X_0_0F
+FLD 10 0x00000001 0x00000000 3 FLAT_SHADE
+FLD 11 0x00000001 0x00000000 3 SEL_CENTROID
+FLD 12 0x00000001 0x00000000 3 SEL_LINEAR
+FLD 13 0x0000000f 0x00000000 3 CYL_WRAP
+FLD 17 0x00000001 0x00000000 3 PT_SPRITE_TEX
+FLD 18 0x00000001 0x00000000 3 SEL_SAMPLE
+REG 0x000286c4 0x00000000 0x0000000e 32    0    1    0 SPI_VS_OUT_CONFIG
+FLD  0 0x00000001 0x00000000 3 VS_PER_COMPONENT
+FLD  1 0x0000001f 0x00000000 3 VS_EXPORT_COUNT
+FLD  8 0x00000001 0x00000000 3 VS_EXPORTS_FOG
+FLD  9 0x0000001f 0x00000000 3 VS_OUT_FOG_VEC_ADDR
+REG 0x000286cc 0x00000000 0x0000000e 32    0    1    0 SPI_PS_IN_CONTROL_0
+FLD  0 0x0000003f 0x00000000 3 NUM_INTERP
+FLD  8 0x00000001 0x00000000 3 POSITION_ENA
+FLD  9 0x00000001 0x00000000 3 POSITION_CENTROID
+FLD 10 0x0000001f 0x00000000 3 POSITION_ADDR
+FLD 15 0x0000000f 0x00000000 3 PARAM_GEN
+FLD 19 0x0000007f 0x00000000 3 PARAM_GEN_ADDR
+FLD 26 0x00000003 0x00000000 3 BARYC_SAMPLE_CNTL
+VAL 0x00000000 CENTROIDS_ONLY
+VAL 0x00000001 CENTERS_ONLY
+VAL 0x00000002 CENTROIDS_AND_CENTERS
+VAL 0x00000003 UNDEF
+FLD 28 0x00000001 0x00000000 3 PERSP_GRADIENT_ENA
+FLD 29 0x00000001 0x00000000 3 LINEAR_GRADIENT_ENA
+FLD 30 0x00000001 0x00000000 3 POSITION_SAMPLE
+FLD 31 0x00000001 0x00000000 3 BARYC_AT_SAMPLE_ENA
+REG 0x000286d0 0x00000000 0x0000000e 32    0    1    0 SPI_PS_IN_CONTROL_1
+FLD  0 0x00000001 0x00000000 3 GEN_INDEX_PIX
+FLD  1 0x0000007f 0x00000000 3 GEN_INDEX_PIX_ADDR
+FLD  8 0x00000001 0x00000000 3 FRONT_FACE_ENA
+FLD  9 0x00000003 0x00000000 3 FRONT_FACE_CHAN
+FLD 11 0x00000001 0x00000000 3 FRONT_FACE_ALL_BITS
+FLD 12 0x0000001f 0x00000000 3 FRONT_FACE_ADDR
+FLD 17 0x0000007f 0x00000000 3 FOG_ADDR
+FLD 24 0x00000001 0x00000000 3 FIXED_PT_POSITION_ENA
+FLD 25 0x0000001f 0x00000000 3 FIXED_PT_POSITION_ADDR
+REG 0x000286d4 0x00000000 0x0000000e 32    0    1    0 SPI_INTERP_CONTROL_0
+FLD  0 0x00000001 0x00000000 3 FLAT_SHADE_ENA
+FLD  1 0x00000001 0x00000000 3 PNT_SPRITE_ENA
+FLD  2 0x00000007 0x00000000 3 PNT_SPRITE_OVRD_X
+VAL 0x00000000 SPI_PNT_SPRITE_SEL_0
+VAL 0x00000001 SPI_PNT_SPRITE_SEL_1
+VAL 0x00000002 SPI_PNT_SPRITE_SEL_S
+VAL 0x00000003 SPI_PNT_SPRITE_SEL_T
+VAL 0x00000004 SPI_PNT_SPRITE_SEL_NONE
+FLD  5 0x00000007 0x00000000 3 PNT_SPRITE_OVRD_Y
+VAL 0x00000000 SPI_PNT_SPRITE_SEL_0
+VAL 0x00000001 SPI_PNT_SPRITE_SEL_1
+VAL 0x00000002 SPI_PNT_SPRITE_SEL_S
+VAL 0x00000003 SPI_PNT_SPRITE_SEL_T
+VAL 0x00000004 SPI_PNT_SPRITE_SEL_NONE
+FLD  8 0x00000007 0x00000000 3 PNT_SPRITE_OVRD_Z
+VAL 0x00000000 SPI_PNT_SPRITE_SEL_0
+VAL 0x00000001 SPI_PNT_SPRITE_SEL_1
+VAL 0x00000002 SPI_PNT_SPRITE_SEL_S
+VAL 0x00000003 SPI_PNT_SPRITE_SEL_T
+VAL 0x00000004 SPI_PNT_SPRITE_SEL_NONE
+FLD 11 0x00000007 0x00000000 3 PNT_SPRITE_OVRD_W
+VAL 0x00000000 SPI_PNT_SPRITE_SEL_0
+VAL 0x00000001 SPI_PNT_SPRITE_SEL_1
+VAL 0x00000002 SPI_PNT_SPRITE_SEL_S
+VAL 0x00000003 SPI_PNT_SPRITE_SEL_T
+VAL 0x00000004 SPI_PNT_SPRITE_SEL_NONE
+FLD 14 0x00000001 0x00000000 3 PNT_SPRITE_TOP_1
+REG 0x000286d8 0x00000000 0x0000000e 32    0    1    0 SPI_INPUT_Z
+FLD  0 0x00000001 0x00000000 3 PROVIDE_Z_TO_SPI
+REG 0x000286dc 0x00000000 0x0000000e 32    0    1    0 SPI_FOG_CNTL
+FLD  0 0x00000001 0x00000000 3 PASS_FOG_THROUGH_PS
+FLD  1 0x00000003 0x00000000 3 PIXEL_FOG_FUNC
+VAL 0x00000000 SPI_FOG_NONE
+VAL 0x00000001 SPI_FOG_EXP
+VAL 0x00000002 SPI_FOG_EXP2
+VAL 0x00000003 SPI_FOG_LINEAR
+FLD  3 0x00000001 0x00000000 3 PIXEL_FOG_SRC_SEL
+FLD  4 0x00000001 0x00000000 3 VS_FOG_CLAMP_DISABLE
+REG 0x000286e0 0x00000000 0x0000000e 32    0    1    0 SPI_FOG_FUNC_SCALE
+REG 0x000286e4 0x00000000 0x0000000e 32    0    1    0 SPI_FOG_FUNC_BIAS
+REG 0x00028780 0x00000000 0x00000001 32    0    8    4 CB_BLEND_CONTROL
+FLD  0 0x0000001f 0x00000000 3 COLOR_SRCBLEND
+FLD  5 0x00000007 0x00000000 3 COLOR_COMB_FCN
+FLD  8 0x0000001f 0x00000000 3 COLOR_DESTBLEND
+FLD 13 0x00000001 0x00000000 3 OPACITY_WEIGHT
+FLD 16 0x0000001f 0x00000000 3 ALPHA_SRCBLEND
+FLD 21 0x00000007 0x00000000 3 ALPHA_COMB_FCN
+FLD 24 0x0000001f 0x00000000 3 ALPHA_DESTBLEND
+FLD 29 0x00000001 0x00000000 3 SEPARATE_ALPHA_BLEND
+REG 0x000287e4 0x00000000 0x00000010 32    0    1    0 VGT_DMA_BASE_HI
+FLD  0 0x000000ff 0x00000000 3 BASE_ADDR
+REG 0x000287e8 0x00000000 0x00000010 32    0    1    0 VGT_DMA_BASE
+REG 0x000287f0 0x00000000 0x00000010 32    0    1    0 VGT_DRAW_INITIATOR
+FLD  0 0x00000003 0x00000000 3 SOURCE_SELECT
+VAL 0x00000000 DI_SRC_SEL_DMA
+VAL 0x00000001 DI_SRC_SEL_IMMEDIATE
+VAL 0x00000002 DI_SRC_SEL_AUTO_INDEX
+VAL 0x00000003 DI_SRC_SEL_RESERVED
+FLD  2 0x00000003 0x00000000 3 MAJOR_MODE
+VAL 0x00000000 DI_MAJOR_MODE_0
+VAL 0x00000001 DI_MAJOR_MODE_1
+FLD  4 0x00000001 0x00000000 3 SPRITE_EN
+FLD  5 0x00000001 0x00000000 3 NOT_EOP
+FLD  6 0x00000001 0x00000000 3 USE_OPAQUE
+REG 0x000287f4 0x00000000 0x00000010 32    0    1    0 VGT_IMMED_DATA
+REG 0x000287f8 0x00000000 0x00000010 32    0    1    0 VGT_EVENT_ADDRESS_REG
+FLD  0 0x0fffffff 0x00000000 3 ADDRESS_LOW
+REG 0x00028800 0x00000000 0x00000003 32    0    1    0 DB_DEPTH_CONTROL
+FLD  0 0x00000001 0x00000000 3 STENCIL_ENABLE
+FLD  1 0x00000001 0x00000000 3 Z_ENABLE
+FLD  2 0x00000001 0x00000000 3 Z_WRITE_ENABLE
+FLD  4 0x00000007 0x00000000 3 ZFUNC
+VAL 0x00000000 FRAG_NEVER
+VAL 0x00000001 FRAG_LESS
+VAL 0x00000002 FRAG_EQUAL
+VAL 0x00000003 FRAG_LEQUAL
+VAL 0x00000004 FRAG_GREATER
+VAL 0x00000005 FRAG_NOTEQUAL
+VAL 0x00000006 FRAG_GEQUAL
+VAL 0x00000007 FRAG_ALWAYS
+FLD  7 0x00000001 0x00000000 3 BACKFACE_ENABLE
+FLD  8 0x00000007 0x00000000 3 STENCILFUNC
+VAL 0x00000000 REF_NEVER
+VAL 0x00000001 REF_LESS
+VAL 0x00000002 REF_EQUAL
+VAL 0x00000003 REF_LEQUAL
+VAL 0x00000004 REF_GREATER
+VAL 0x00000005 REF_NOTEQUAL
+VAL 0x00000006 REF_GEQUAL
+VAL 0x00000007 REF_ALWAYS
+FLD 11 0x00000007 0x00000000 3 STENCILFAIL
+VAL 0x00000000 STENCIL_KEEP
+VAL 0x00000001 STENCIL_ZERO
+VAL 0x00000002 STENCIL_REPLACE
+VAL 0x00000003 STENCIL_INCR_CLAMP
+VAL 0x00000004 STENCIL_DECR_CLAMP
+VAL 0x00000005 STENCIL_INVERT
+VAL 0x00000006 STENCIL_INCR_WRAP
+VAL 0x00000007 STENCIL_DECR_WRAP
+FLD 14 0x00000007 0x00000000 3 STENCILZPASS
+VAL 0x00000000 STENCIL_KEEP
+VAL 0x00000001 STENCIL_ZERO
+VAL 0x00000002 STENCIL_REPLACE
+VAL 0x00000003 STENCIL_INCR_CLAMP
+VAL 0x00000004 STENCIL_DECR_CLAMP
+VAL 0x00000005 STENCIL_INVERT
+VAL 0x00000006 STENCIL_INCR_WRAP
+VAL 0x00000007 STENCIL_DECR_WRAP
+FLD 17 0x00000007 0x00000000 3 STENCILZFAIL
+VAL 0x00000000 STENCIL_KEEP
+VAL 0x00000001 STENCIL_ZERO
+VAL 0x00000002 STENCIL_REPLACE
+VAL 0x00000003 STENCIL_INCR_CLAMP
+VAL 0x00000004 STENCIL_DECR_CLAMP
+VAL 0x00000005 STENCIL_INVERT
+VAL 0x00000006 STENCIL_INCR_WRAP
+VAL 0x00000007 STENCIL_DECR_WRAP
+FLD 20 0x00000007 0x00000000 3 STENCILFUNC_BF
+VAL 0x00000000 REF_NEVER
+VAL 0x00000001 REF_LESS
+VAL 0x00000002 REF_EQUAL
+VAL 0x00000003 REF_LEQUAL
+VAL 0x00000004 REF_GREATER
+VAL 0x00000005 REF_NOTEQUAL
+VAL 0x00000006 REF_GEQUAL
+VAL 0x00000007 REF_ALWAYS
+FLD 23 0x00000007 0x00000000 3 STENCILFAIL_BF
+VAL 0x00000000 STENCIL_KEEP
+VAL 0x00000001 STENCIL_ZERO
+VAL 0x00000002 STENCIL_REPLACE
+VAL 0x00000003 STENCIL_INCR_CLAMP
+VAL 0x00000004 STENCIL_DECR_CLAMP
+VAL 0x00000005 STENCIL_INVERT
+VAL 0x00000006 STENCIL_INCR_WRAP
+VAL 0x00000007 STENCIL_DECR_WRAP
+FLD 26 0x00000007 0x00000000 3 STENCILZPASS_BF
+VAL 0x00000000 STENCIL_KEEP
+VAL 0x00000001 STENCIL_ZERO
+VAL 0x00000002 STENCIL_REPLACE
+VAL 0x00000003 STENCIL_INCR_CLAMP
+VAL 0x00000004 STENCIL_DECR_CLAMP
+VAL 0x00000005 STENCIL_INVERT
+VAL 0x00000006 STENCIL_INCR_WRAP
+VAL 0x00000007 STENCIL_DECR_WRAP
+FLD 29 0x00000007 0x00000000 3 STENCILZFAIL_BF
+VAL 0x00000000 STENCIL_KEEP
+VAL 0x00000001 STENCIL_ZERO
+VAL 0x00000002 STENCIL_REPLACE
+VAL 0x00000003 STENCIL_INCR_CLAMP
+VAL 0x00000004 STENCIL_DECR_CLAMP
+VAL 0x00000005 STENCIL_INVERT
+VAL 0x00000006 STENCIL_INCR_WRAP
+VAL 0x00000007 STENCIL_DECR_WRAP
+REG 0x00028804 0x00000000 0x00000001 32    0    1    0 CB_BLEND_CONTROL
+FLD  0 0x0000001f 0x00000000 3 COLOR_SRCBLEND
+VAL 0x00000000 BLEND_ZERO
+VAL 0x00000001 BLEND_ONE
+VAL 0x00000002 BLEND_SRC_COLOR
+VAL 0x00000003 BLEND_ONE_MINUS_SRC_COLOR
+VAL 0x00000004 BLEND_SRC_ALPHA
+VAL 0x00000005 BLEND_ONE_MINUS_SRC_ALPHA
+VAL 0x00000006 BLEND_DST_ALPHA
+VAL 0x00000007 BLEND_ONE_MINUS_DST_ALPHA
+VAL 0x00000008 BLEND_DST_COLOR
+VAL 0x00000009 BLEND_ONE_MINUS_DST_COLOR
+VAL 0x0000000a BLEND_SRC_ALPHA_SATURATE
+VAL 0x0000000b BLEND_BOTH_SRC_ALPHA
+VAL 0x0000000c BLEND_BOTH_INV_SRC_ALPHA
+VAL 0x0000000d BLEND_CONSTANT_COLOR
+VAL 0x0000000e BLEND_ONE_MINUS_CONSTANT_COLOR
+VAL 0x0000000f BLEND_SRC1_COLOR
+VAL 0x00000010 BLEND_INV_SRC1_COLOR
+VAL 0x00000011 BLEND_SRC1_ALPHA
+VAL 0x00000012 BLEND_INV_SRC1_ALPHA
+VAL 0x00000013 BLEND_CONSTANT_ALPHA
+VAL 0x00000014 BLEND_ONE_MINUS_CONSTANT_ALPHA
+FLD  5 0x00000007 0x00000000 3 COLOR_COMB_FCN
+VAL 0x00000000 COMB_DST_PLUS_SRC
+VAL 0x00000001 COMB_SRC_MINUS_DST
+VAL 0x00000002 COMB_MIN_DST_SRC
+VAL 0x00000003 COMB_MAX_DST_SRC
+VAL 0x00000004 COMB_DST_MINUS_SRC
+FLD  8 0x0000001f 0x00000000 3 COLOR_DESTBLEND
+VAL 0x00000000 BLEND_ZERO
+VAL 0x00000001 BLEND_ONE
+VAL 0x00000002 BLEND_SRC_COLOR
+VAL 0x00000003 BLEND_ONE_MINUS_SRC_COLOR
+VAL 0x00000004 BLEND_SRC_ALPHA
+VAL 0x00000005 BLEND_ONE_MINUS_SRC_ALPHA
+VAL 0x00000006 BLEND_DST_ALPHA
+VAL 0x00000007 BLEND_ONE_MINUS_DST_ALPHA
+VAL 0x00000008 BLEND_DST_COLOR
+VAL 0x00000009 BLEND_ONE_MINUS_DST_COLOR
+VAL 0x0000000a BLEND_SRC_ALPHA_SATURATE
+VAL 0x0000000b BLEND_BOTH_SRC_ALPHA
+VAL 0x0000000c BLEND_BOTH_INV_SRC_ALPHA
+VAL 0x0000000d BLEND_CONSTANT_COLOR
+VAL 0x0000000e BLEND_ONE_MINUS_CONSTANT_COLOR
+VAL 0x0000000f BLEND_SRC1_COLOR
+VAL 0x00000010 BLEND_INV_SRC1_COLOR
+VAL 0x00000011 BLEND_SRC1_ALPHA
+VAL 0x00000012 BLEND_INV_SRC1_ALPHA
+VAL 0x00000013 BLEND_CONSTANT_ALPHA
+VAL 0x00000014 BLEND_ONE_MINUS_CONSTANT_ALPHA
+FLD 13 0x00000001 0x00000000 3 OPACITY_WEIGHT
+FLD 16 0x0000001f 0x00000000 3 ALPHA_SRCBLEND
+VAL 0x00000000 BLEND_ZERO
+VAL 0x00000001 BLEND_ONE
+VAL 0x00000002 BLEND_SRC_COLOR
+VAL 0x00000003 BLEND_ONE_MINUS_SRC_COLOR
+VAL 0x00000004 BLEND_SRC_ALPHA
+VAL 0x00000005 BLEND_ONE_MINUS_SRC_ALPHA
+VAL 0x00000006 BLEND_DST_ALPHA
+VAL 0x00000007 BLEND_ONE_MINUS_DST_ALPHA
+VAL 0x00000008 BLEND_DST_COLOR
+VAL 0x00000009 BLEND_ONE_MINUS_DST_COLOR
+VAL 0x0000000a BLEND_SRC_ALPHA_SATURATE
+VAL 0x0000000b BLEND_BOTH_SRC_ALPHA
+VAL 0x0000000c BLEND_BOTH_INV_SRC_ALPHA
+VAL 0x0000000d BLEND_CONSTANT_COLOR
+VAL 0x0000000e BLEND_ONE_MINUS_CONSTANT_COLOR
+VAL 0x0000000f BLEND_SRC1_COLOR
+VAL 0x00000010 BLEND_INV_SRC1_COLOR
+VAL 0x00000011 BLEND_SRC1_ALPHA
+VAL 0x00000012 BLEND_INV_SRC1_ALPHA
+VAL 0x00000013 BLEND_CONSTANT_ALPHA
+VAL 0x00000014 BLEND_ONE_MINUS_CONSTANT_ALPHA
+FLD 21 0x00000007 0x00000000 3 ALPHA_COMB_FCN
+VAL 0x00000000 COMB_DST_PLUS_SRC
+VAL 0x00000001 COMB_SRC_MINUS_DST
+VAL 0x00000002 COMB_MIN_DST_SRC
+VAL 0x00000003 COMB_MAX_DST_SRC
+VAL 0x00000004 COMB_DST_MINUS_SRC
+FLD 24 0x0000001f 0x00000000 3 ALPHA_DESTBLEND
+VAL 0x00000000 BLEND_ZERO
+VAL 0x00000001 BLEND_ONE
+VAL 0x00000002 BLEND_SRC_COLOR
+VAL 0x00000003 BLEND_ONE_MINUS_SRC_COLOR
+VAL 0x00000004 BLEND_SRC_ALPHA
+VAL 0x00000005 BLEND_ONE_MINUS_SRC_ALPHA
+VAL 0x00000006 BLEND_DST_ALPHA
+VAL 0x00000007 BLEND_ONE_MINUS_DST_ALPHA
+VAL 0x00000008 BLEND_DST_COLOR
+VAL 0x00000009 BLEND_ONE_MINUS_DST_COLOR
+VAL 0x0000000a BLEND_SRC_ALPHA_SATURATE
+VAL 0x0000000b BLEND_BOTH_SRC_ALPHA
+VAL 0x0000000c BLEND_BOTH_INV_SRC_ALPHA
+VAL 0x0000000d BLEND_CONSTANT_COLOR
+VAL 0x0000000e BLEND_ONE_MINUS_CONSTANT_COLOR
+VAL 0x0000000f BLEND_SRC1_COLOR
+VAL 0x00000010 BLEND_INV_SRC1_COLOR
+VAL 0x00000011 BLEND_SRC1_ALPHA
+VAL 0x00000012 BLEND_INV_SRC1_ALPHA
+VAL 0x00000013 BLEND_CONSTANT_ALPHA
+VAL 0x00000014 BLEND_ONE_MINUS_CONSTANT_ALPHA
+FLD 29 0x00000001 0x00000000 3 SEPARATE_ALPHA_BLEND
+REG 0x00028808 0x00000000 0x00000001 32    0    1    0 CB_COLOR_CONTROL
+FLD  0 0x00000001 0x00000000 3 FOG_ENABLE
+FLD  1 0x00000001 0x00000000 3 MULTIWRITE_ENABLE
+FLD  2 0x00000001 0x00000000 3 DITHER_ENABLE
+FLD  3 0x00000001 0x00000000 3 DEGAMMA_ENABLE
+FLD  4 0x00000007 0x00000000 3 SPECIAL_OP
+VAL 0x00000000 SPECIAL_NORMAL
+VAL 0x00000001 SPECIAL_DISABLE
+VAL 0x00000002 SPECIAL_FAST_CLEAR
+VAL 0x00000003 SPECIAL_FORCE_CLEAR
+VAL 0x00000004 SPECIAL_EXPAND_COLOR
+VAL 0x00000005 SPECIAL_EXPAND_TEXTURE
+VAL 0x00000006 SPECIAL_EXPAND_SAMPLES
+VAL 0x00000007 SPECIAL_RESOLVE_BOX
+FLD  7 0x00000001 0x00000000 3 PER_MRT_BLEND
+FLD  8 0x000000ff 0x00000000 3 TARGET_BLEND_ENABLE
+FLD 16 0x000000ff 0x00000000 3 ROP3
+VAL 0x00000000 ROP3_ZERO
+VAL 0x00000011 ROP3_NOR
+VAL 0x00000025 ROP3_AND_INVERTED
+VAL 0x00000033 ROP3_COPY_INVERTED
+VAL 0x00000044 ROP3_AND_REVERSE
+VAL 0x00000055 ROP3_INVERT
+VAL 0x00000066 ROP3_XOR
+VAL 0x00000077 ROP3_NAND
+VAL 0x00000088 ROP3_AND
+VAL 0x00000099 ROP3_EQUIV
+VAL 0x000000aa ROP3_NOOP
+VAL 0x000000bb ROP3_OR_INVERTED
+VAL 0x000000cc ROP3_COPY
+VAL 0x000000dd ROP3_OR_REVERSE
+VAL 0x000000ee ROP3_OR
+VAL 0x000000ff ROP3_ONE
+REG 0x0002880c 0x00000000 0x00000003 32    0    1    0 DB_SHADER_CONTROL
+FLD  0 0x00000001 0x00000000 3 Z_EXPORT_ENABLE
+FLD  1 0x00000001 0x00000000 3 STENCIL_REF_EXPORT_ENABLE
+FLD  4 0x00000003 0x00000000 3 Z_ORDER
+VAL 0x00000000 LATE_Z
+VAL 0x00000001 EARLY_Z_THEN_LATE_Z
+VAL 0x00000002 RE_Z
+VAL 0x00000003 EARLY_Z_THEN_RE_Z
+FLD  6 0x00000001 0x00000000 3 KILL_ENABLE
+FLD  7 0x00000001 0x00000000 3 COVERAGE_TO_MASK_ENABLE
+FLD  8 0x00000001 0x00000000 3 MASK_EXPORT_ENABLE
+FLD  9 0x00000001 0x00000000 3 DUAL_EXPORT_ENABLE
+FLD 10 0x00000001 0x00000000 3 EXEC_ON_HIER_FAIL
+FLD 11 0x00000001 0x00000000 3 EXEC_ON_NOOP
+REG 0x00028810 0x00000000 0x00000006 32    0    1    0 PA_CL_CLIP_CNTL
+FLD  0 0x00000001 0x00000000 3 UCP_ENA_0
+FLD  1 0x00000001 0x00000000 3 UCP_ENA_1
+FLD  2 0x00000001 0x00000000 3 UCP_ENA_2
+FLD  3 0x00000001 0x00000000 3 UCP_ENA_3
+FLD  4 0x00000001 0x00000000 3 UCP_ENA_4
+FLD  5 0x00000001 0x00000000 3 UCP_ENA_5
+FLD 13 0x00000001 0x00000000 3 PS_UCP_Y_SCALE_NEG
+FLD 14 0x00000003 0x00000000 3 PS_UCP_MODE
+FLD 16 0x00000001 0x00000000 3 CLIP_DISABLE
+FLD 17 0x00000001 0x00000000 3 UCP_CULL_ONLY_ENA
+FLD 18 0x00000001 0x00000000 3 BOUNDARY_EDGE_FLAG_ENA
+FLD 19 0x00000001 0x00000000 3 DX_CLIP_SPACE_DEF
+FLD 20 0x00000001 0x00000000 3 DIS_CLIP_ERR_DETECT
+FLD 21 0x00000001 0x00000000 3 VTX_KILL_OR
+FLD 24 0x00000001 0x00000000 3 DX_LINEAR_ATTR_CLIP_ENA
+FLD 25 0x00000001 0x00000000 3 VTE_VPORT_PROVOKE_DISABLE
+FLD 26 0x00000001 0x00000000 3 ZCLIP_NEAR_DISABLE
+FLD 27 0x00000001 0x00000000 3 ZCLIP_FAR_DISABLE
+REG 0x00028814 0x00000000 0x00000006 32    0    1    0 PA_SU_SC_MODE_CNTL
+FLD  0 0x00000001 0x00000000 3 CULL_FRONT
+FLD  1 0x00000001 0x00000000 3 CULL_BACK
+FLD  2 0x00000001 0x00000000 3 FACE
+FLD  3 0x00000003 0x00000000 3 POLY_MODE
+VAL 0x00000000 X_DISABLE_POLY_MODE
+VAL 0x00000001 X_DUAL_MODE
+FLD  5 0x00000007 0x00000000 3 POLYMODE_FRONT_PTYPE
+VAL 0x00000000 X_DRAW_POINTS
+VAL 0x00000001 X_DRAW_LINES
+VAL 0x00000002 X_DRAW_TRIANGLES
+FLD  8 0x00000007 0x00000000 3 POLYMODE_BACK_PTYPE
+VAL 0x00000000 X_DRAW_POINTS
+VAL 0x00000001 X_DRAW_LINES
+VAL 0x00000002 X_DRAW_TRIANGLES
+FLD 11 0x00000001 0x00000000 3 POLY_OFFSET_FRONT_ENABLE
+FLD 12 0x00000001 0x00000000 3 POLY_OFFSET_BACK_ENABLE
+FLD 13 0x00000001 0x00000000 3 POLY_OFFSET_PARA_ENABLE
+FLD 16 0x00000001 0x00000000 3 VTX_WINDOW_OFFSET_ENABLE
+FLD 19 0x00000001 0x00000000 3 PROVOKING_VTX_LAST
+FLD 20 0x00000001 0x00000000 3 PERSP_CORR_DIS
+FLD 21 0x00000001 0x00000000 3 MULTI_PRIM_IB_ENA
+REG 0x00028818 0x00000000 0x00000006 32    0    1    0 PA_CL_VTE_CNTL
+FLD  0 0x00000001 0x00000000 3 VPORT_X_SCALE_ENA
+FLD  1 0x00000001 0x00000000 3 VPORT_X_OFFSET_ENA
+FLD  2 0x00000001 0x00000000 3 VPORT_Y_SCALE_ENA
+FLD  3 0x00000001 0x00000000 3 VPORT_Y_OFFSET_ENA
+FLD  4 0x00000001 0x00000000 3 VPORT_Z_SCALE_ENA
+FLD  5 0x00000001 0x00000000 3 VPORT_Z_OFFSET_ENA
+FLD  8 0x00000001 0x00000000 3 VTX_XY_FMT
+FLD  9 0x00000001 0x00000000 3 VTX_Z_FMT
+FLD 10 0x00000001 0x00000000 3 VTX_W0_FMT
+FLD 11 0x00000001 0x00000000 3 PERFCOUNTER_REF
+REG 0x0002881c 0x00000000 0x00000006 32    0    1    0 PA_CL_VS_OUT_CNTL
+FLD  0 0x00000001 0x00000000 3 CLIP_DIST_ENA_0
+FLD  1 0x00000001 0x00000000 3 CLIP_DIST_ENA_1
+FLD  2 0x00000001 0x00000000 3 CLIP_DIST_ENA_2
+FLD  3 0x00000001 0x00000000 3 CLIP_DIST_ENA_3
+FLD  4 0x00000001 0x00000000 3 CLIP_DIST_ENA_4
+FLD  5 0x00000001 0x00000000 3 CLIP_DIST_ENA_5
+FLD  6 0x00000001 0x00000000 3 CLIP_DIST_ENA_6
+FLD  7 0x00000001 0x00000000 3 CLIP_DIST_ENA_7
+FLD  8 0x00000001 0x00000000 3 CULL_DIST_ENA_0
+FLD  9 0x00000001 0x00000000 3 CULL_DIST_ENA_1
+FLD 10 0x00000001 0x00000000 3 CULL_DIST_ENA_2
+FLD 11 0x00000001 0x00000000 3 CULL_DIST_ENA_3
+FLD 12 0x00000001 0x00000000 3 CULL_DIST_ENA_4
+FLD 13 0x00000001 0x00000000 3 CULL_DIST_ENA_5
+FLD 14 0x00000001 0x00000000 3 CULL_DIST_ENA_6
+FLD 15 0x00000001 0x00000000 3 CULL_DIST_ENA_7
+FLD 16 0x00000001 0x00000000 3 USE_VTX_POINT_SIZE
+FLD 17 0x00000001 0x00000000 3 USE_VTX_EDGE_FLAG
+FLD 18 0x00000001 0x00000000 3 USE_VTX_RENDER_TARGET_INDX
+FLD 19 0x00000001 0x00000000 3 USE_VTX_VIEWPORT_INDX
+FLD 20 0x00000001 0x00000000 3 USE_VTX_KILL_FLAG
+FLD 21 0x00000001 0x00000000 3 VS_OUT_MISC_VEC_ENA
+FLD 22 0x00000001 0x00000000 3 VS_OUT_CCDIST0_VEC_ENA
+FLD 23 0x00000001 0x00000000 3 VS_OUT_CCDIST1_VEC_ENA
+REG 0x00028820 0x00000000 0x00000006 32    0    1    0 PA_CL_NANINF_CNTL
+FLD  0 0x00000001 0x00000000 3 VTE_XY_INF_DISCARD
+FLD  1 0x00000001 0x00000000 3 VTE_Z_INF_DISCARD
+FLD  2 0x00000001 0x00000000 3 VTE_W_INF_DISCARD
+FLD  3 0x00000001 0x00000000 3 VTE_0XNANINF_IS_0
+FLD  4 0x00000001 0x00000000 3 VTE_XY_NAN_RETAIN
+FLD  5 0x00000001 0x00000000 3 VTE_Z_NAN_RETAIN
+FLD  6 0x00000001 0x00000000 3 VTE_W_NAN_RETAIN
+FLD  7 0x00000001 0x00000000 3 VTE_W_RECIP_NAN_IS_0
+FLD  8 0x00000001 0x00000000 3 VS_XY_NAN_TO_INF
+FLD  9 0x00000001 0x00000000 3 VS_XY_INF_RETAIN
+FLD 10 0x00000001 0x00000000 3 VS_Z_NAN_TO_INF
+FLD 11 0x00000001 0x00000000 3 VS_Z_INF_RETAIN
+FLD 12 0x00000001 0x00000000 3 VS_W_NAN_TO_INF
+FLD 13 0x00000001 0x00000000 3 VS_W_INF_RETAIN
+FLD 14 0x00000001 0x00000000 3 VS_CLIP_DIST_INF_DISCARD
+FLD 20 0x00000001 0x00000000 3 VTE_NO_OUTPUT_NEG_0
+REG 0x00028840 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_START_PS
+REG 0x00028850 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_RESOURCES_PS
+FLD  0 0x000000ff 0x00000000 3 NUM_GPRS
+FLD  8 0x000000ff 0x00000000 3 STACK_SIZE
+FLD 21 0x00000001 0x00000000 3 DX10_CLAMP
+FLD 24 0x00000007 0x00000000 3 FETCH_CACHE_LINES
+FLD 28 0x00000001 0x00000000 3 UNCACHED_FIRST_INST
+FLD 31 0x00000001 0x00000000 3 CLAMP_CONSTS
+REG 0x00028854 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_EXPORTS_PS
+FLD  0 0x0000001f 0x00000000 3 EXPORT_MODE
+REG 0x00028858 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_START_VS
+REG 0x00028868 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_RESOURCES_VS
+FLD  0 0x000000ff 0x00000000 3 NUM_GPRS
+FLD  8 0x000000ff 0x00000000 3 STACK_SIZE
+FLD 21 0x00000001 0x00000000 3 DX10_CLAMP
+FLD 24 0x00000007 0x00000000 3 FETCH_CACHE_LINES
+FLD 28 0x00000001 0x00000000 3 UNCACHED_FIRST_INST
+REG 0x0002886c 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_START_GS
+REG 0x0002887c 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_RESOURCES_GS
+FLD  0 0x000000ff 0x00000000 3 NUM_GPRS
+FLD  8 0x000000ff 0x00000000 3 STACK_SIZE
+FLD 21 0x00000001 0x00000000 3 DX10_CLAMP
+FLD 24 0x00000007 0x00000000 3 FETCH_CACHE_LINES
+FLD 28 0x00000001 0x00000000 3 UNCACHED_FIRST_INST
+REG 0x00028880 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_START_ES
+REG 0x00028890 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_RESOURCES_ES
+FLD  0 0x000000ff 0x00000000 3 NUM_GPRS
+FLD  8 0x000000ff 0x00000000 3 STACK_SIZE
+FLD 21 0x00000001 0x00000000 3 DX10_CLAMP
+FLD 24 0x00000007 0x00000000 3 FETCH_CACHE_LINES
+FLD 28 0x00000001 0x00000000 3 UNCACHED_FIRST_INST
+REG 0x00028894 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_START_FS
+REG 0x000288a4 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_RESOURCES_FS
+FLD  0 0x000000ff 0x00000000 3 NUM_GPRS
+FLD  8 0x000000ff 0x00000000 3 STACK_SIZE
+FLD 21 0x00000001 0x00000000 3 DX10_CLAMP
+REG 0x000288a8 0x00000000 0x0000000c 32    0    1    0 SQ_ESGS_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 3 ITEMSIZE
+REG 0x000288ac 0x00000000 0x0000000c 32    0    1    0 SQ_GSVS_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 3 ITEMSIZE
+REG 0x000288b0 0x00000000 0x0000000c 32    0    1    0 SQ_ESTMP_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 3 ITEMSIZE
+REG 0x000288b4 0x00000000 0x0000000c 32    0    1    0 SQ_GSTMP_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 3 ITEMSIZE
+REG 0x000288b8 0x00000000 0x0000000c 32    0    1    0 SQ_VSTMP_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 3 ITEMSIZE
+REG 0x000288bc 0x00000000 0x0000000c 32    0    1    0 SQ_PSTMP_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 3 ITEMSIZE
+REG 0x000288c0 0x00000000 0x0000000c 32    0    1    0 SQ_FBUF_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 3 ITEMSIZE
+REG 0x000288c4 0x00000000 0x0000000c 32    0    1    0 SQ_REDUC_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 3 ITEMSIZE
+REG 0x000288c8 0x00000000 0x0000000c 32    0    1    0 SQ_GS_VERT_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 3 ITEMSIZE
+REG 0x000288cc 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_CF_OFFSET_PS
+FLD  0 0x000fffff 0x00000000 3 PGM_CF_OFFSET
+REG 0x000288d0 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_CF_OFFSET_VS
+FLD  0 0x000fffff 0x00000000 3 PGM_CF_OFFSET
+REG 0x000288d4 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_CF_OFFSET_GS
+FLD  0 0x000fffff 0x00000000 3 PGM_CF_OFFSET
+REG 0x000288d8 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_CF_OFFSET_ES
+FLD  0 0x000fffff 0x00000000 3 PGM_CF_OFFSET
+REG 0x000288dc 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_CF_OFFSET_FS
+FLD  0 0x000fffff 0x00000000 3 PGM_CF_OFFSET
+REG 0x000288e0 0x00000000 0x0000000c 32    0    1    0 SQ_VTX_SEMANTIC_CLEAR
+REG 0x00028940 0x00000000 0x0000000c 32    0   16    4 SQ_ALU_CONST_CACHE_PS
+REG 0x00028980 0x00000000 0x0000000c 32    0   16    4 SQ_ALU_CONST_CACHE_VS
+REG 0x000289c0 0x00000000 0x0000000c 32    0   16    4 SQ_ALU_CONST_CACHE_GS
+REG 0x00028a00 0x00000000 0x00000006 32    0    1    0 PA_SU_POINT_SIZE
+FLD  0 0x0000ffff 0x00000000 3 HEIGHT
+FLD 16 0x0000ffff 0x00000000 3 WIDTH
+REG 0x00028a04 0x00000000 0x00000006 32    0    1    0 PA_SU_POINT_MINMAX
+FLD  0 0x0000ffff 0x00000000 3 MIN_SIZE
+FLD 16 0x0000ffff 0x00000000 3 MAX_SIZE
+REG 0x00028a08 0x00000000 0x00000006 32    0    1    0 PA_SU_LINE_CNTL
+FLD  0 0x0000ffff 0x00000000 3 WIDTH
+REG 0x00028a0c 0x00000000 0x00000006 32    0    1    0 PA_SC_LINE_STIPPLE
+FLD  0 0x0000ffff 0x00000000 3 LINE_PATTERN
+FLD 16 0x000000ff 0x00000000 3 REPEAT_COUNT
+FLD 28 0x00000001 0x00000000 3 PATTERN_BIT_ORDER
+FLD 29 0x00000003 0x00000000 3 AUTO_RESET_CNTL
+REG 0x00028a10 0x00000000 0x00000010 32    0    1    0 VGT_OUTPUT_PATH_CNTL
+FLD  0 0x00000003 0x00000000 3 PATH_SELECT
+VAL 0x00000000 VGT_OUTPATH_VTX_REUSE
+VAL 0x00000001 VGT_OUTPATH_TESS_EN
+VAL 0x00000002 VGT_OUTPATH_PASSTHRU
+VAL 0x00000003 VGT_OUTPATH_GS_BLOCK
+REG 0x00028a14 0x00000000 0x00000010 32    0    1    0 VGT_HOS_CNTL
+FLD  0 0x00000003 0x00000000 3 TESS_MODE
+REG 0x00028a18 0x00000000 0x00000010 32    0    1    0 VGT_HOS_MAX_TESS_LEVEL
+REG 0x00028a1c 0x00000000 0x00000010 32    0    1    0 VGT_HOS_MIN_TESS_LEVEL
+REG 0x00028a20 0x00000000 0x00000010 32    0    1    0 VGT_HOS_REUSE_DEPTH
+FLD  0 0x000000ff 0x00000000 3 REUSE_DEPTH
+REG 0x00028a24 0x00000000 0x00000010 32    0    1    0 VGT_GROUP_PRIM_TYPE
+FLD  0 0x0000001f 0x00000000 3 PRIM_TYPE
+VAL 0x00000000 VGT_GRP_3D_POINT
+VAL 0x00000001 VGT_GRP_3D_LINE
+VAL 0x00000002 VGT_GRP_3D_TRI
+VAL 0x00000003 VGT_GRP_3D_RECT
+VAL 0x00000004 VGT_GRP_3D_QUAD
+VAL 0x00000005 VGT_GRP_2D_COPY_RECT_V0
+VAL 0x00000006 VGT_GRP_2D_COPY_RECT_V1
+VAL 0x00000007 VGT_GRP_2D_COPY_RECT_V2
+VAL 0x00000008 VGT_GRP_2D_COPY_RECT_V3
+VAL 0x00000009 VGT_GRP_2D_FILL_RECT
+VAL 0x0000000a VGT_GRP_2D_LINE
+VAL 0x0000000b VGT_GRP_2D_TRI
+VAL 0x0000000c VGT_GRP_PRIM_INDEX_LINE
+VAL 0x0000000d VGT_GRP_PRIM_INDEX_TRI
+VAL 0x0000000e VGT_GRP_PRIM_INDEX_QUAD
+VAL 0x0000000f VGT_GRP_3D_LINE_ADJ
+VAL 0x00000010 VGT_GRP_3D_TRI_ADJ
+FLD 14 0x00000001 0x00000000 3 RETAIN_ORDER
+FLD 15 0x00000001 0x00000000 3 RETAIN_QUADS
+FLD 16 0x00000007 0x00000000 3 PRIM_ORDER
+VAL 0x00000000 VGT_GRP_LIST
+VAL 0x00000001 VGT_GRP_STRIP
+VAL 0x00000002 VGT_GRP_FAN
+VAL 0x00000003 VGT_GRP_LOOP
+VAL 0x00000004 VGT_GRP_POLYGON
+REG 0x00028a28 0x00000000 0x00000010 32    0    1    0 VGT_GROUP_FIRST_DECR
+FLD  0 0x0000000f 0x00000000 3 FIRST_DECR
+REG 0x00028a2c 0x00000000 0x00000010 32    0    1    0 VGT_GROUP_DECR
+FLD  0 0x0000000f 0x00000000 3 DECR
+REG 0x00028a30 0x00000000 0x00000010 32    0    1    0 VGT_GROUP_VECT_0_CNTL
+FLD  0 0x00000001 0x00000000 3 COMP_X_EN
+FLD  1 0x00000001 0x00000000 3 COMP_Y_EN
+FLD  2 0x00000001 0x00000000 3 COMP_Z_EN
+FLD  3 0x00000001 0x00000000 3 COMP_W_EN
+FLD  8 0x000000ff 0x00000000 3 STRIDE
+FLD 16 0x000000ff 0x00000000 3 SHIFT
+REG 0x00028a34 0x00000000 0x00000010 32    0    1    0 VGT_GROUP_VECT_1_CNTL
+FLD  0 0x00000001 0x00000000 3 COMP_X_EN
+FLD  1 0x00000001 0x00000000 3 COMP_Y_EN
+FLD  2 0x00000001 0x00000000 3 COMP_Z_EN
+FLD  3 0x00000001 0x00000000 3 COMP_W_EN
+FLD  8 0x000000ff 0x00000000 3 STRIDE
+FLD 16 0x000000ff 0x00000000 3 SHIFT
+REG 0x00028a38 0x00000000 0x00000010 32    0    1    0 VGT_GROUP_VECT_0_FMT_CNTL
+FLD  0 0x0000000f 0x00000000 3 X_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD  4 0x0000000f 0x00000000 3 X_OFFSET
+FLD  8 0x0000000f 0x00000000 3 Y_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD 12 0x0000000f 0x00000000 3 Y_OFFSET
+FLD 16 0x0000000f 0x00000000 3 Z_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD 20 0x0000000f 0x00000000 3 Z_OFFSET
+FLD 24 0x0000000f 0x00000000 3 W_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD 28 0x0000000f 0x00000000 3 W_OFFSET
+REG 0x00028a3c 0x00000000 0x00000010 32    0    1    0 VGT_GROUP_VECT_1_FMT_CNTL
+FLD  0 0x0000000f 0x00000000 3 X_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD  4 0x0000000f 0x00000000 3 X_OFFSET
+FLD  8 0x0000000f 0x00000000 3 Y_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD 12 0x0000000f 0x00000000 3 Y_OFFSET
+FLD 16 0x0000000f 0x00000000 3 Z_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD 20 0x0000000f 0x00000000 3 Z_OFFSET
+FLD 24 0x0000000f 0x00000000 3 W_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD 28 0x0000000f 0x00000000 3 W_OFFSET
+REG 0x00028a40 0x00000000 0x00000010 32    0    1    0 VGT_GS_MODE
+FLD  0 0x00000003 0x00000000 3 MODE
+VAL 0x00000000 GS_OFF
+VAL 0x00000001 GS_SCENARIO_A
+VAL 0x00000002 GS_SCENARIO_B
+VAL 0x00000003 GS_SCENARIO_G
+FLD  2 0x00000001 0x00000000 3 ES_PASSTHRU
+FLD  3 0x00000003 0x00000000 3 CUT_MODE
+VAL 0x00000000 GS_CUT_1024
+VAL 0x00000001 GS_CUT_512
+VAL 0x00000002 GS_CUT_256
+VAL 0x00000003 GS_CUT_128
+REG 0x00028a48 0x00000000 0x00000006 32    0    1    0 PA_SC_MPASS_PS_CNTL
+FLD  0 0x000fffff 0x00000000 3 MPASS_PIX_VEC_PER_PASS
+FLD 31 0x00000001 0x00000000 3 MPASS_PS_ENA
+REG 0x00028a4c 0x00000000 0x00000006 32    0    1    0 PA_SC_MODE_CNTL
+FLD  0 0x00000001 0x00000000 3 MSAA_ENABLE
+FLD  1 0x00000001 0x00000000 3 CLIPRECT_ENABLE
+FLD  2 0x00000001 0x00000000 3 LINE_STIPPLE_ENABLE
+FLD  3 0x00000001 0x00000000 3 MULTI_CHIP_PRIM_DISCARD_ENAB
+FLD  4 0x00000001 0x00000000 3 WALK_ORDER_ENABLE
+FLD  5 0x00000001 0x00000000 3 HALVE_DETAIL_SAMPLE_PERF
+FLD  6 0x00000001 0x00000000 3 WALK_SIZE
+FLD  7 0x00000001 0x00000000 3 WALK_ALIGNMENT
+FLD  8 0x00000001 0x00000000 3 WALK_ALIGN8_PRIM_FITS_ST
+FLD  9 0x00000001 0x00000000 3 TILE_COVER_NO_SCISSOR
+FLD 10 0x00000001 0x00000000 3 KILL_PIX_POST_HI_Z
+FLD 11 0x00000001 0x00000000 3 KILL_PIX_POST_DETAIL_MASK
+FLD 12 0x00000001 0x00000000 3 MULTI_CHIP_SUPERTILE_ENABLE
+FLD 13 0x00000001 0x00000000 3 TILE_COVER_DISABLE
+FLD 14 0x00000001 0x00000000 3 FORCE_EOV_CNTDWN_ENABLE
+FLD 15 0x00000001 0x00000000 3 FORCE_EOV_TILE_ENABLE
+FLD 16 0x00000001 0x00000000 3 FORCE_EOV_REZ_ENABLE
+FLD 17 0x00000001 0x00000000 3 PS_ITER_SAMPLE
+REG 0x00028a50 0x00000000 0x00000010 32    0    1    0 VGT_ENHANCE
+FLD  0 0x00000003 0x00000000 3 MI_TIMESTAMP_RES
+VAL 0x00000000 X_0_992_CLOCKS_LATENCY_RANGE_IN_STEPS_OF_32
+VAL 0x00000001 X_0_496_CLOCKS_LATENCY_RANGE_IN_STEPS_OF_16
+VAL 0x00000002 X_0_248_CLOCKS_LATENCY_RANGE_IN_STEPS_OF_8
+VAL 0x00000003 X_0_124_CLOCKS_LATENCY_RANGE_IN_STEPS_OF_4
+FLD  2 0x3fffffff 0x00000000 3 MISC
+REG 0x00028a6c 0x00000000 0x00000010 32    0    1    0 VGT_GS_OUT_PRIM_TYPE
+FLD  0 0x0000003f 0x00000000 3 OUTPRIM_TYPE
+VAL 0x00000000 POINTLIST
+VAL 0x00000001 LINESTRIP
+VAL 0x00000002 TRISTRIP
+REG 0x00028a74 0x00000000 0x00000010 32    0    1    0 VGT_DMA_SIZE
+REG 0x00028a7c 0x00000000 0x00000010 32    0    1    0 VGT_DMA_INDEX_TYPE
+FLD  0 0x00000003 0x00000000 3 INDEX_TYPE
+VAL 0x00000000 VGT_INDEX_16
+VAL 0x00000001 VGT_INDEX_32
+FLD  2 0x00000003 0x00000000 3 SWAP_MODE
+VAL 0x00000000 VGT_DMA_SWAP_NONE
+VAL 0x00000001 VGT_DMA_SWAP_16_BIT
+VAL 0x00000002 VGT_DMA_SWAP_32_BIT
+VAL 0x00000003 VGT_DMA_SWAP_WORD
+REG 0x00028a84 0x00000000 0x00000010 32    0    1    0 VGT_PRIMITIVEID_EN
+FLD  0 0x00000001 0x00000000 3 PRIMITIVEID_EN
+REG 0x00028a88 0x00000000 0x00000010 32    0    1    0 VGT_DMA_NUM_INSTANCES
+REG 0x00028a90 0x00000000 0x00000010 32    0    1    0 VGT_EVENT_INITIATOR
+FLD  0 0x0000003f 0x00000000 3 EVENT_TYPE
+VAL 0x00000004 CACHE_FLUSH_TS
+VAL 0x00000005 CONTEXT_DONE
+VAL 0x00000006 CACHE_FLUSH
+VAL 0x00000007 VIZQUERY_START
+VAL 0x00000008 VIZQUERY_END
+VAL 0x00000009 SC_WAIT_WC
+VAL 0x0000000a MPASS_PS_CP_REFETCH
+VAL 0x0000000b MPASS_PS_RST_START
+VAL 0x0000000c MPASS_PS_INCR_START
+VAL 0x0000000d RST_PIX_CNT
+VAL 0x0000000e RST_VTX_CNT
+VAL 0x0000000f VS_PARTIAL_FLUSH
+VAL 0x00000010 PS_PARTIAL_FLUSH
+VAL 0x00000014 CACHE_FLUSH_AND_INV_TS_EVENT
+VAL 0x00000015 ZPASS_DONE
+VAL 0x00000016 CACHE_FLUSH_AND_INV_EVENT
+VAL 0x00000017 PERFCOUNTER_START
+VAL 0x00000018 PERFCOUNTER_STOP
+VAL 0x00000019 PIPELINESTAT_START
+VAL 0x0000001a PIPELINESTAT_STOP
+VAL 0x0000001b PERFCOUNTER_SAMPLE
+VAL 0x0000001c FLUSH_ES_OUTPUT
+VAL 0x0000001d FLUSH_GS_OUTPUT
+VAL 0x0000001e SAMPLE_PIPELINESTAT
+VAL 0x0000001f SO_VGTSTREAMOUT_FLUSH
+VAL 0x00000020 SAMPLE_STREAMOUTSTATS
+VAL 0x00000021 RESET_VTX_CNT
+VAL 0x00000022 BLOCK_CONTEXT_DONE
+VAL 0x00000023 CR_CONTEXT_DONE
+VAL 0x00000024 VGT_FLUSH
+VAL 0x00000025 CR_DONE_TS
+VAL 0x00000026 SQ_NON_EVENT
+VAL 0x00000027 SC_SEND_DB_VPZ
+VAL 0x00000028 BOTTOM_OF_PIPE_TS
+VAL 0x0000002a DB_CACHE_FLUSH_AND_INV
+FLD 19 0x000000ff 0x00000000 3 ADDRESS_HI
+FLD 27 0x00000001 0x00000000 3 EXTENDED_EVENT
+REG 0x00028a94 0x00000000 0x00000010 32    0    1    0 VGT_MULTI_PRIM_IB_RESET_EN
+FLD  0 0x00000001 0x00000000 3 RESET_EN
+REG 0x00028aa0 0x00000000 0x00000010 32    0    1    0 VGT_INSTANCE_STEP_RATE_0
+REG 0x00028aa4 0x00000000 0x00000010 32    0    1    0 VGT_INSTANCE_STEP_RATE_1
+REG 0x00028ab0 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_EN
+FLD  0 0x00000001 0x00000000 3 STREAMOUT
+REG 0x00028ab4 0x00000000 0x00000010 32    0    1    0 VGT_REUSE_OFF
+FLD  0 0x00000001 0x00000000 3 REUSE_OFF
+REG 0x00028ab8 0x00000000 0x00000010 32    0    1    0 VGT_VTX_CNT_EN
+FLD  0 0x00000001 0x00000000 3 VTX_CNT_EN
+REG 0x00028ad0 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_SIZE_0
+REG 0x00028ad4 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_VTX_STRIDE_0
+FLD  0 0x000003ff 0x00000000 3 STRIDE
+REG 0x00028ad8 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_BASE_0
+REG 0x00028adc 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_OFFSET_0
+REG 0x00028ae0 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_SIZE_1
+REG 0x00028ae4 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_VTX_STRIDE_1
+FLD  0 0x000003ff 0x00000000 3 STRIDE
+REG 0x00028ae8 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_BASE_1
+REG 0x00028aec 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_OFFSET_1
+REG 0x00028af0 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_SIZE_2
+REG 0x00028af4 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_VTX_STRIDE_2
+FLD  0 0x000003ff 0x00000000 3 STRIDE
+REG 0x00028af8 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_BASE_2
+REG 0x00028afc 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_OFFSET_2
+REG 0x00028b00 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_SIZE_3
+REG 0x00028b04 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_VTX_STRIDE_3
+FLD  0 0x000003ff 0x00000000 3 STRIDE
+REG 0x00028b08 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_BASE_3
+REG 0x00028b0c 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_OFFSET_3
+REG 0x00028b10 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_0
+REG 0x00028b14 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_1
+REG 0x00028b18 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_2
+REG 0x00028b1c 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_3
+REG 0x00028b20 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_EN
+FLD  0 0x00000001 0x00000000 3 BUFFER_0_EN
+FLD  1 0x00000001 0x00000000 3 BUFFER_1_EN
+FLD  2 0x00000001 0x00000000 3 BUFFER_2_EN
+FLD  3 0x00000001 0x00000000 3 BUFFER_3_EN
+REG 0x00028b28 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_DRAW_OPAQUE_OFFSET
+REG 0x00028b2c 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE
+REG 0x00028b30 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE
+REG 0x00028b44 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_HI_0
+FLD  0 0x0000003f 0x00000000 3 BASE_OFFSET
+REG 0x00028b48 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_HI_1
+FLD  0 0x0000003f 0x00000000 3 BASE_OFFSET
+REG 0x00028b4c 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_HI_2
+FLD  0 0x0000003f 0x00000000 3 BASE_OFFSET
+REG 0x00028b50 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_HI_3
+FLD  0 0x0000003f 0x00000000 3 BASE_OFFSET
+REG 0x00028c00 0x00000000 0x00000006 32    0    1    0 PA_SC_LINE_CNTL
+FLD  0 0x000000ff 0x00000000 3 BRES_CNTL
+FLD  8 0x00000001 0x00000000 3 USE_BRES_CNTL
+FLD  9 0x00000001 0x00000000 3 EXPAND_LINE_WIDTH
+FLD 10 0x00000001 0x00000000 3 LAST_PIXEL
+REG 0x00028c04 0x00000000 0x00000006 32    0    1    0 PA_SC_AA_CONFIG
+FLD  0 0x00000003 0x00000000 3 MSAA_NUM_SAMPLES
+FLD  4 0x00000001 0x00000000 3 AA_MASK_CENTROID_DTMN
+FLD 13 0x0000000f 0x00000000 3 MAX_SAMPLE_DIST
+REG 0x00028c08 0x00000000 0x00000006 32    0    1    0 PA_SU_VTX_CNTL
+FLD  0 0x00000001 0x00000000 3 PIX_CENTER
+FLD  1 0x00000003 0x00000000 3 ROUND_MODE
+VAL 0x00000000 X_TRUNCATE
+VAL 0x00000001 X_ROUND
+VAL 0x00000002 X_ROUND_TO_EVEN
+VAL 0x00000003 X_ROUND_TO_ODD
+FLD  3 0x00000007 0x00000000 3 QUANT_MODE
+VAL 0x00000000 X_1_16TH
+VAL 0x00000001 X_1_8TH
+VAL 0x00000002 X_1_4TH
+VAL 0x00000003 X_1_2
+VAL 0x00000004 X_1
+VAL 0x00000005 X_1_256TH
+REG 0x00028c0c 0x00000000 0x00000006 32    0    1    0 PA_CL_GB_VERT_CLIP_ADJ
+REG 0x00028c10 0x00000000 0x00000006 32    0    1    0 PA_CL_GB_VERT_DISC_ADJ
+REG 0x00028c14 0x00000000 0x00000006 32    0    1    0 PA_CL_GB_HORZ_CLIP_ADJ
+REG 0x00028c18 0x00000000 0x00000006 32    0    1    0 PA_CL_GB_HORZ_DISC_ADJ
+REG 0x00028c1c 0x00000000 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_MCTX
+FLD  0 0x0000000f 0x00000000 3 S0_X
+FLD  4 0x0000000f 0x00000000 3 S0_Y
+FLD  8 0x0000000f 0x00000000 3 S1_X
+FLD 12 0x0000000f 0x00000000 3 S1_Y
+FLD 16 0x0000000f 0x00000000 3 S2_X
+FLD 20 0x0000000f 0x00000000 3 S2_Y
+FLD 24 0x0000000f 0x00000000 3 S3_X
+FLD 28 0x0000000f 0x00000000 3 S3_Y
+REG 0x00028c20 0x00000000 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_8S_WD1_MCTX
+FLD  0 0x0000000f 0x00000000 3 S4_X
+FLD  4 0x0000000f 0x00000000 3 S4_Y
+FLD  8 0x0000000f 0x00000000 3 S5_X
+FLD 12 0x0000000f 0x00000000 3 S5_Y
+FLD 16 0x0000000f 0x00000000 3 S6_X
+FLD 20 0x0000000f 0x00000000 3 S6_Y
+FLD 24 0x0000000f 0x00000000 3 S7_X
+FLD 28 0x0000000f 0x00000000 3 S7_Y
+REG 0x00028c30 0x00000000 0x00000001 32    0    1    0 CB_CLRCMP_CONTROL
+FLD  0 0x00000007 0x00000000 3 CLRCMP_FCN_SRC
+VAL 0x00000000 CLRCMP_DRAW_ALWAYS
+VAL 0x00000001 CLRCMP_DRAW_NEVER
+VAL 0x00000004 CLRCMP_DRAW_ON_NEQ
+VAL 0x00000005 CLRCMP_DRAW_ON_EQ
+FLD  8 0x00000007 0x00000000 3 CLRCMP_FCN_DST
+VAL 0x00000000 CLRCMP_DRAW_ALWAYS
+VAL 0x00000001 CLRCMP_DRAW_NEVER
+VAL 0x00000004 CLRCMP_DRAW_ON_NEQ
+VAL 0x00000005 CLRCMP_DRAW_ON_EQ
+FLD 24 0x00000003 0x00000000 3 CLRCMP_FCN_SEL
+VAL 0x00000000 CLRCMP_SEL_DST
+VAL 0x00000001 CLRCMP_SEL_SRC
+VAL 0x00000002 CLRCMP_SEL_AND
+REG 0x00028c34 0x00000000 0x00000001 32    0    1    0 CB_CLRCMP_SRC
+REG 0x00028c38 0x00000000 0x00000001 32    0    1    0 CB_CLRCMP_DST
+REG 0x00028c3c 0x00000000 0x00000001 32    0    1    0 CB_CLRCMP_MSK
+REG 0x00028c48 0x00000000 0x00000006 32    0    1    0 PA_SC_AA_MASK
+REG 0x00028c58 0x00000000 0x00000010 32    0    1    0 VGT_VERTEX_REUSE_BLOCK_CNTL
+FLD  0 0x000000ff 0x00000000 3 VTX_REUSE_DEPTH
+REG 0x00028c5c 0x00000000 0x00000010 32    0    1    0 VGT_OUT_DEALLOC_CNTL
+FLD  0 0x0000007f 0x00000000 3 DEALLOC_DIST
+REG 0x00028d0c 0x00000000 0x00000003 32    0    1    0 DB_RENDER_CONTROL
+FLD  0 0x00000001 0x00000000 3 DEPTH_CLEAR_ENABLE
+FLD  1 0x00000001 0x00000000 3 STENCIL_CLEAR_ENABLE
+FLD  2 0x00000001 0x00000000 3 DEPTH_COPY
+FLD  3 0x00000001 0x00000000 3 STENCIL_COPY
+FLD  4 0x00000001 0x00000000 3 RESUMMARIZE_ENABLE
+FLD  5 0x00000001 0x00000000 3 STENCIL_COMPRESS_DISABLE
+FLD  6 0x00000001 0x00000000 3 DEPTH_COMPRESS_DISABLE
+FLD  7 0x00000001 0x00000000 3 COPY_CENTROID
+FLD  8 0x00000007 0x00000000 3 COPY_SAMPLE
+FLD 11 0x00000001 0x00000000 3 ZPASS_INCREMENT_DISABLE
+REG 0x00028d10 0x00000000 0x00000003 32    0    1    0 DB_RENDER_OVERRIDE
+FLD  0 0x00000003 0x00000000 3 FORCE_HIZ_ENABLE
+VAL 0x00000000 FORCE_OFF
+VAL 0x00000001 FORCE_ENABLE
+VAL 0x00000002 FORCE_DISABLE
+VAL 0x00000003 FORCE_RESERVED
+FLD  2 0x00000003 0x00000000 3 FORCE_HIS_ENABLE0
+VAL 0x00000000 FORCE_OFF
+VAL 0x00000001 FORCE_ENABLE
+VAL 0x00000002 FORCE_DISABLE
+VAL 0x00000003 FORCE_RESERVED
+FLD  4 0x00000003 0x00000000 3 FORCE_HIS_ENABLE1
+VAL 0x00000000 FORCE_OFF
+VAL 0x00000001 FORCE_ENABLE
+VAL 0x00000002 FORCE_DISABLE
+VAL 0x00000003 FORCE_RESERVED
+FLD  6 0x00000001 0x00000000 3 FORCE_SHADER_Z_ORDER
+FLD  7 0x00000001 0x00000000 3 FAST_Z_DISABLE
+FLD  8 0x00000001 0x00000000 3 FAST_STENCIL_DISABLE
+FLD  9 0x00000001 0x00000000 3 NOOP_CULL_DISABLE
+FLD 10 0x00000001 0x00000000 3 FORCE_COLOR_KILL
+FLD 11 0x00000001 0x00000000 3 FORCE_Z_READ
+FLD 12 0x00000001 0x00000000 3 FORCE_STENCIL_READ
+FLD 13 0x00000003 0x00000000 3 FORCE_FULL_Z_RANGE
+VAL 0x00000000 FORCE_OFF
+VAL 0x00000001 FORCE_ENABLE
+VAL 0x00000002 FORCE_DISABLE
+VAL 0x00000003 FORCE_RESERVED
+FLD 15 0x00000001 0x00000000 3 FORCE_QC_SMASK_CONFLICT
+FLD 16 0x00000001 0x00000000 3 DISABLE_VIEWPORT_CLAMP
+FLD 17 0x00000001 0x00000000 3 IGNORE_SC_ZRANGE
+REG 0x00028d24 0x00000000 0x00000003 32    0    1    0 DB_HTILE_SURFACE
+FLD  0 0x00000001 0x00000000 3 HTILE_WIDTH
+FLD  1 0x00000001 0x00000000 3 HTILE_HEIGHT
+FLD  2 0x00000001 0x00000000 3 LINEAR
+FLD  3 0x00000001 0x00000000 3 FULL_CACHE
+FLD  4 0x00000001 0x00000000 3 HTILE_USES_PRELOAD_WIN
+FLD  5 0x00000001 0x00000000 3 PRELOAD
+FLD  6 0x0000003f 0x00000000 3 PREFETCH_WIDTH
+FLD 12 0x0000003f 0x00000000 3 PREFETCH_HEIGHT
+REG 0x00028d28 0x00000000 0x00000003 32    0    1    0 DB_SRESULTS_COMPARE_STATE0
+FLD  0 0x00000007 0x00000000 3 COMPAREFUNC0
+VAL 0x00000000 REF_NEVER
+VAL 0x00000001 REF_LESS
+VAL 0x00000002 REF_EQUAL
+VAL 0x00000003 REF_LEQUAL
+VAL 0x00000004 REF_GREATER
+VAL 0x00000005 REF_NOTEQUAL
+VAL 0x00000006 REF_GEQUAL
+VAL 0x00000007 REF_ALWAYS
+FLD  4 0x000000ff 0x00000000 3 COMPAREVALUE0
+FLD 12 0x000000ff 0x00000000 3 COMPAREMASK0
+FLD 24 0x00000001 0x00000000 3 ENABLE0
+REG 0x00028d2c 0x00000000 0x00000003 32    0    1    0 DB_SRESULTS_COMPARE_STATE1
+FLD  0 0x00000007 0x00000000 3 COMPAREFUNC1
+VAL 0x00000000 REF_NEVER
+VAL 0x00000001 REF_LESS
+VAL 0x00000002 REF_EQUAL
+VAL 0x00000003 REF_LEQUAL
+VAL 0x00000004 REF_GREATER
+VAL 0x00000005 REF_NOTEQUAL
+VAL 0x00000006 REF_GEQUAL
+VAL 0x00000007 REF_ALWAYS
+FLD  4 0x000000ff 0x00000000 3 COMPAREVALUE1
+FLD 12 0x000000ff 0x00000000 3 COMPAREMASK1
+FLD 24 0x00000001 0x00000000 3 ENABLE1
+REG 0x00028d30 0x00000000 0x00000003 32    0    1    0 DB_PRELOAD_CONTROL
+FLD  0 0x000000ff 0x00000000 3 START_X
+FLD  8 0x000000ff 0x00000000 3 START_Y
+FLD 16 0x000000ff 0x00000000 3 MAX_X
+FLD 24 0x000000ff 0x00000000 3 MAX_Y
+REG 0x00028d34 0x00000000 0x00000003 32    0    1    0 DB_PREFETCH_LIMIT
+FLD  0 0x000003ff 0x00000000 3 DEPTH_HEIGHT_TILE_MAX
+REG 0x00028d44 0x00000000 0x00000003 32    0    1    0 DB_ALPHA_TO_MASK
+FLD  8 0x00000003 0x00000000 3 ALPHA_TO_MASK_OFFSET0
+FLD 10 0x00000003 0x00000000 3 ALPHA_TO_MASK_OFFSET1
+FLD 12 0x00000003 0x00000000 3 ALPHA_TO_MASK_OFFSET2
+FLD 14 0x00000003 0x00000000 3 ALPHA_TO_MASK_OFFSET3
+REG 0x00028df8 0x00000000 0x00000006 32    0    1    0 PA_SU_POLY_OFFSET_DB_FMT_CNTL
+FLD  0 0x000000ff 0x00000000 3 NEG_NUM_DB_BITS
+FLD  8 0x00000001 0x00000000 3 DB_IS_FLOAT_FMT
+REG 0x00028dfc 0x00000000 0x00000006 32    0    1    0 PA_SU_POLY_OFFSET_CLAMP
+REG 0x00028e00 0x00000000 0x00000006 32    0    1    0 PA_SU_POLY_OFFSET_FRONT_SCALE
+REG 0x00028e04 0x00000000 0x00000006 32    0    1    0 PA_SU_POLY_OFFSET_FRONT_OFFSET
+REG 0x00028e08 0x00000000 0x00000006 32    0    1    0 PA_SU_POLY_OFFSET_BACK_SCALE
+REG 0x00028e0c 0x00000000 0x00000006 32    0    1    0 PA_SU_POLY_OFFSET_BACK_OFFSET
+REG 0x00028e10 0x00000000 0x00000006 32    0    1    0 PA_CL_POINT_X_RAD
+REG 0x00028e14 0x00000000 0x00000006 32    0    1    0 PA_CL_POINT_Y_RAD
+REG 0x00028e18 0x00000000 0x00000006 32    0    1    0 PA_CL_POINT_SIZE
+REG 0x00028e1c 0x00000000 0x00000006 32    0    1    0 PA_CL_POINT_CULL_RAD
+REG 0x00028e20 0x00000000 0x00000006 32    0    6   16 PA_CL_UCP_X
+REG 0x00028e24 0x00000000 0x00000006 32    0    6   16 PA_CL_UCP_Y
+REG 0x00028e28 0x00000000 0x00000006 32    0    6   16 PA_CL_UCP_Z
+REG 0x00028e2c 0x00000000 0x00000006 32    0    6   16 PA_CL_UCP_W
+REG 0x0003cff0 0x00000000 0x0000000c 32    0    1    0 SQ_VTX_BASE_VTX_LOC
+REG 0x0003cff4 0x00000000 0x0000000c 32    0    1    0 SQ_VTX_START_INST_LOC
+REG 0x0003e200 0x00000000 0x0000000c 32    0   32    4 SQ_LOOP_CONST_DX10_PS
+REG 0x0003e200 0x00000000 0x0000000c 32    0   32    4 SQ_LOOP_CONST_PS
+REG 0x0003e280 0x00000000 0x0000000c 32    0   32    4 SQ_LOOP_CONST_DX10_VS
+REG 0x0003e280 0x00000000 0x0000000c 32    0   32    4 SQ_LOOP_CONST_VS
+REG 0x0003e300 0x00000000 0x0000000c 32    0   32    4 SQ_LOOP_CONST_DX10_GS
+REG 0x0003e300 0x00000000 0x0000000c 32    0   32    4 SQ_LOOP_CONST_GS
+FLD  0 0x00000fff 0x00000000 3 COUNT
+FLD 12 0x00000fff 0x00000000 3 INIT
+FLD 24 0x000000ff 0x00000000 3 INC
+REG 0x0003e380 0x00000000 0x0000000c 32    0    1    0 SQ_BOOL_CONST_PS
+REG 0x0003e384 0x00000000 0x0000000c 32    0    1    0 SQ_BOOL_CONST_VS
+REG 0x0003e388 0x00000000 0x0000000c 32    0    1    0 SQ_BOOL_CONST_GS
+REG 0x00030000 0x00000101 0x0000000c 32    0  256   16 SQ_ALU_PS_CONSTANT0
+REG 0x00030004 0x00000101 0x0000000c 32    0  256   16 SQ_ALU_PS_CONSTANT1
+REG 0x00030008 0x00000101 0x0000000c 32    0  256   16 SQ_ALU_PS_CONSTANT2
+REG 0x0003000c 0x00000101 0x0000000c 32    0  256   16 SQ_ALU_PS_CONSTANT3
+REG 0x00031000 0x00000101 0x0000000c 32    0  256   16 SQ_ALU_VS_CONSTANT0
+REG 0x00031004 0x00000101 0x0000000c 32    0  256   16 SQ_ALU_VS_CONSTANT1
+REG 0x00031008 0x00000101 0x0000000c 32    0  256   16 SQ_ALU_VS_CONSTANT2
+REG 0x0003100c 0x00000101 0x0000000c 32    0  256   16 SQ_ALU_VS_CONSTANT3
+REG 0x000000a1 0x00000108 0x00000007 32    0    1    0 PCIE_LC_TRAINING_CNTL
+FLD  6 0x00000001 0x00000000 3 LC_POINT_7_PLUS_EN
+REG 0x000000a2 0x00000108 0x00000007 32    0    1    0 PCIE_LC_LINK_WIDTH_CNTL
+FLD  0 0x00000007 0x00000000 3 LC_LINK_WIDTH
+VAL 0x00000000 LC_LINK_WIDTH_X0
+VAL 0x00000001 LC_LINK_WIDTH_X1
+VAL 0x00000002 LC_LINK_WIDTH_X2
+VAL 0x00000003 LC_LINK_WIDTH_X4
+VAL 0x00000004 LC_LINK_WIDTH_X8
+VAL 0x00000006 LC_LINK_WIDTH_X16
+FLD  4 0x00000007 0x00000000 3 LC_LINK_WIDTH_RD
+FLD  7 0x00000001 0x00000000 3 LC_RECONFIG_ARC_MISSING_ESCAPE
+FLD  8 0x00000001 0x00000000 3 LC_RECONFIG_NOW
+FLD  9 0x00000001 0x00000000 3 LC_RENEGOTIATION_SUPPORT
+FLD 10 0x00000001 0x00000000 3 LC_RENEGOTIATE_EN
+FLD 11 0x00000001 0x00000000 3 LC_SHORT_RECONFIG_EN
+FLD 12 0x00000001 0x00000000 3 LC_UPCONFIGURE_SUPPORT
+FLD 13 0x00000001 0x00000000 3 LC_UPCONFIGURE_DIS
+REG 0x000000a4 0x00000108 0x00000007 32    0    1    0 PCIE_LC_SPEED_CNTL
+FLD  0 0x00000001 0x00000000 3 LC_GEN2_EN_STRAP
+FLD  1 0x00000001 0x00000000 3 LC_TARGET_LINK_SPEED_OVERRIDE_EN
+FLD  5 0x00000001 0x00000000 3 LC_FORCE_EN_HW_SPEED_CHANGE
+FLD  6 0x00000001 0x00000000 3 LC_FORCE_DIS_HW_SPEED_CHANGE
+FLD  8 0x00000003 0x00000000 3 LC_SPEED_CHANGE_ATTEMPTS_ALLOWED
+FLD 11 0x00000001 0x00000000 3 LC_CURRENT_DATA_RATE
+FLD 14 0x0000000f 0x00000000 3 LC_VOLTAGE_TIMER_SEL
+FLD 21 0x00000001 0x00000000 3 LC_CLR_FAILED_SPD_CHANGE_CNT
+FLD 23 0x00000001 0x00000000 3 LC_OTHER_SIDE_EVER_SENT_GEN2
+FLD 24 0x00000001 0x00000000 3 LC_OTHER_SIDE_SUPPORTS_GEN2
+REG 0x0003c000 0x00000109 0x0000000c 32    0   18   12 SQ_TEX_SAMPLER_PS_WORD0
+FLD  0 0x00000007 0x00000000 3 CLAMP_X
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  3 0x00000007 0x00000000 3 CLAMP_Y
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  6 0x00000007 0x00000000 3 CLAMP_Z
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  9 0x00000007 0x00000000 3 XY_MAG_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+VAL 0x00000002 SQ_TEX_XY_FILTER_BICUBIC
+FLD 12 0x00000007 0x00000000 3 XY_MIN_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+VAL 0x00000002 SQ_TEX_XY_FILTER_BICUBIC
+FLD 15 0x00000003 0x00000000 3 Z_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 17 0x00000003 0x00000000 3 MIP_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 22 0x00000003 0x00000000 3 BORDER_COLOR_TYPE
+VAL 0x00000000 SQ_TEX_BORDER_COLOR_TRANS_BLACK
+VAL 0x00000001 SQ_TEX_BORDER_COLOR_OPAQUE_BLACK
+VAL 0x00000002 SQ_TEX_BORDER_COLOR_OPAQUE_WHITE
+VAL 0x00000003 SQ_TEX_BORDER_COLOR_REGISTER
+FLD 24 0x00000001 0x00000000 3 POINT_SAMPLING_CLAMP
+FLD 25 0x00000001 0x00000000 3 TEX_ARRAY_OVERRIDE
+FLD 26 0x00000007 0x00000000 3 DEPTH_COMPARE_FUNCTION
+VAL 0x00000000 SQ_TEX_DEPTH_COMPARE_NEVER
+VAL 0x00000001 SQ_TEX_DEPTH_COMPARE_LESS
+VAL 0x00000002 SQ_TEX_DEPTH_COMPARE_EQUAL
+VAL 0x00000003 SQ_TEX_DEPTH_COMPARE_LESSEQUAL
+VAL 0x00000004 SQ_TEX_DEPTH_COMPARE_GREATER
+VAL 0x00000005 SQ_TEX_DEPTH_COMPARE_NOTEQUAL
+VAL 0x00000006 SQ_TEX_DEPTH_COMPARE_GREATEREQUAL
+VAL 0x00000007 SQ_TEX_DEPTH_COMPARE_ALWAYS
+FLD 29 0x00000003 0x00000000 3 CHROMA_KEY
+VAL 0x00000000 SQ_TEX_CHROMA_KEY_DISABLED
+VAL 0x00000001 SQ_TEX_CHROMA_KEY_KILL
+VAL 0x00000002 SQ_TEX_CHROMA_KEY_BLEND
+FLD 31 0x00000001 0x00000000 3 LOD_USES_MINOR_AXIS
+REG 0x0003c004 0x00000109 0x0000000c 32    0   18   12 SQ_TEX_SAMPLER_PS_WORD1
+FLD  0 0x000003ff 0x00000000 3 MIN_LOD
+FLD 10 0x000003ff 0x00000000 3 MAX_LOD
+FLD 20 0x00000fff 0x00000000 3 LOD_BIAS
+REG 0x0003c008 0x00000109 0x0000000c 32    0   18   12 SQ_TEX_SAMPLER_PS_WORD2
+FLD  0 0x00000fff 0x00000000 3 LOD_BIAS_SEC
+FLD 12 0x00000001 0x00000000 3 MC_COORD_TRUNCATE
+FLD 13 0x00000001 0x00000000 3 FORCE_DEGAMMA
+FLD 14 0x00000001 0x00000000 3 HIGH_PRECISION_FILTER
+FLD 15 0x00000007 0x00000000 3 PERF_MIP
+FLD 18 0x00000003 0x00000000 3 PERF_Z
+FLD 26 0x00000001 0x00000000 3 FETCH_4
+FLD 27 0x00000001 0x00000000 3 SAMPLE_IS_PCF
+FLD 31 0x00000001 0x00000000 3 TYPE
+REG 0x0003c0b0 0x00000109 0x0000000c 32    0   18   12 SQ_TEX_SAMPLER_GS_WORD0
+FLD  0 0x00000007 0x00000000 3 CLAMP_X
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  3 0x00000007 0x00000000 3 CLAMP_Y
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  6 0x00000007 0x00000000 3 CLAMP_Z
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  9 0x00000007 0x00000000 3 XY_MAG_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+VAL 0x00000002 SQ_TEX_XY_FILTER_BICUBIC
+FLD 12 0x00000007 0x00000000 3 XY_MIN_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+VAL 0x00000002 SQ_TEX_XY_FILTER_BICUBIC
+FLD 15 0x00000003 0x00000000 3 Z_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 17 0x00000003 0x00000000 3 MIP_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 22 0x00000003 0x00000000 3 BORDER_COLOR_TYPE
+VAL 0x00000000 SQ_TEX_BORDER_COLOR_TRANS_BLACK
+VAL 0x00000001 SQ_TEX_BORDER_COLOR_OPAQUE_BLACK
+VAL 0x00000002 SQ_TEX_BORDER_COLOR_OPAQUE_WHITE
+VAL 0x00000003 SQ_TEX_BORDER_COLOR_REGISTER
+FLD 24 0x00000001 0x00000000 3 POINT_SAMPLING_CLAMP
+FLD 25 0x00000001 0x00000000 3 TEX_ARRAY_OVERRIDE
+FLD 26 0x00000007 0x00000000 3 DEPTH_COMPARE_FUNCTION
+VAL 0x00000000 SQ_TEX_DEPTH_COMPARE_NEVER
+VAL 0x00000001 SQ_TEX_DEPTH_COMPARE_LESS
+VAL 0x00000002 SQ_TEX_DEPTH_COMPARE_EQUAL
+VAL 0x00000003 SQ_TEX_DEPTH_COMPARE_LESSEQUAL
+VAL 0x00000004 SQ_TEX_DEPTH_COMPARE_GREATER
+VAL 0x00000005 SQ_TEX_DEPTH_COMPARE_NOTEQUAL
+VAL 0x00000006 SQ_TEX_DEPTH_COMPARE_GREATEREQUAL
+VAL 0x00000007 SQ_TEX_DEPTH_COMPARE_ALWAYS
+FLD 29 0x00000003 0x00000000 3 CHROMA_KEY
+VAL 0x00000000 SQ_TEX_CHROMA_KEY_DISABLED
+VAL 0x00000001 SQ_TEX_CHROMA_KEY_KILL
+VAL 0x00000002 SQ_TEX_CHROMA_KEY_BLEND
+FLD 31 0x00000001 0x00000000 3 LOD_USES_MINOR_AXIS
+REG 0x0003c0b4 0x00000109 0x0000000c 32    0   18   12 SQ_TEX_SAMPLER_GS_WORD1
+FLD  0 0x000003ff 0x00000000 3 MIN_LOD
+FLD 10 0x000003ff 0x00000000 3 MAX_LOD
+FLD 20 0x00000fff 0x00000000 3 LOD_BIAS
+REG 0x0003c0b8 0x00000109 0x0000000c 32    0   18   12 SQ_TEX_SAMPLER_GS_WORD2
+FLD  0 0x00000fff 0x00000000 3 LOD_BIAS_SEC
+FLD 12 0x00000001 0x00000000 3 MC_COORD_TRUNCATE
+FLD 13 0x00000001 0x00000000 3 FORCE_DEGAMMA
+FLD 14 0x00000001 0x00000000 3 HIGH_PRECISION_FILTER
+FLD 15 0x00000007 0x00000000 3 PERF_MIP
+FLD 18 0x00000003 0x00000000 3 PERF_Z
+FLD 26 0x00000001 0x00000000 3 FETCH_4
+FLD 27 0x00000001 0x00000000 3 SAMPLE_IS_PCF
+FLD 31 0x00000001 0x00000000 3 TYPE
+REG 0x0003c0d8 0x00000109 0x0000000c 32    0   18   12 SQ_TEX_SAMPLER_VS_WORD0
+FLD  0 0x00000007 0x00000000 3 CLAMP_X
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  3 0x00000007 0x00000000 3 CLAMP_Y
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  6 0x00000007 0x00000000 3 CLAMP_Z
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  9 0x00000007 0x00000000 3 XY_MAG_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+VAL 0x00000002 SQ_TEX_XY_FILTER_BICUBIC
+FLD 12 0x00000007 0x00000000 3 XY_MIN_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+VAL 0x00000002 SQ_TEX_XY_FILTER_BICUBIC
+FLD 15 0x00000003 0x00000000 3 Z_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 17 0x00000003 0x00000000 3 MIP_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 22 0x00000003 0x00000000 3 BORDER_COLOR_TYPE
+VAL 0x00000000 SQ_TEX_BORDER_COLOR_TRANS_BLACK
+VAL 0x00000001 SQ_TEX_BORDER_COLOR_OPAQUE_BLACK
+VAL 0x00000002 SQ_TEX_BORDER_COLOR_OPAQUE_WHITE
+VAL 0x00000003 SQ_TEX_BORDER_COLOR_REGISTER
+FLD 24 0x00000001 0x00000000 3 POINT_SAMPLING_CLAMP
+FLD 25 0x00000001 0x00000000 3 TEX_ARRAY_OVERRIDE
+FLD 26 0x00000007 0x00000000 3 DEPTH_COMPARE_FUNCTION
+VAL 0x00000000 SQ_TEX_DEPTH_COMPARE_NEVER
+VAL 0x00000001 SQ_TEX_DEPTH_COMPARE_LESS
+VAL 0x00000002 SQ_TEX_DEPTH_COMPARE_EQUAL
+VAL 0x00000003 SQ_TEX_DEPTH_COMPARE_LESSEQUAL
+VAL 0x00000004 SQ_TEX_DEPTH_COMPARE_GREATER
+VAL 0x00000005 SQ_TEX_DEPTH_COMPARE_NOTEQUAL
+VAL 0x00000006 SQ_TEX_DEPTH_COMPARE_GREATEREQUAL
+VAL 0x00000007 SQ_TEX_DEPTH_COMPARE_ALWAYS
+FLD 29 0x00000003 0x00000000 3 CHROMA_KEY
+VAL 0x00000000 SQ_TEX_CHROMA_KEY_DISABLED
+VAL 0x00000001 SQ_TEX_CHROMA_KEY_KILL
+VAL 0x00000002 SQ_TEX_CHROMA_KEY_BLEND
+FLD 31 0x00000001 0x00000000 3 LOD_USES_MINOR_AXIS
+REG 0x0003c0dc 0x00000109 0x0000000c 32    0   18   12 SQ_TEX_SAMPLER_VS_WORD1
+FLD  0 0x000003ff 0x00000000 3 MIN_LOD
+FLD 10 0x000003ff 0x00000000 3 MAX_LOD
+FLD 20 0x00000fff 0x00000000 3 LOD_BIAS
+REG 0x0003c0e0 0x00000109 0x0000000c 32    0   18   12 SQ_TEX_SAMPLER_VS_WORD2
+FLD  0 0x00000fff 0x00000000 3 LOD_BIAS_SEC
+FLD 12 0x00000001 0x00000000 3 MC_COORD_TRUNCATE
+FLD 13 0x00000001 0x00000000 3 FORCE_DEGAMMA
+FLD 14 0x00000001 0x00000000 3 HIGH_PRECISION_FILTER
+FLD 15 0x00000007 0x00000000 3 PERF_MIP
+FLD 18 0x00000003 0x00000000 3 PERF_Z
+FLD 26 0x00000001 0x00000000 3 FETCH_4
+FLD 27 0x00000001 0x00000000 3 SAMPLE_IS_PCF
+FLD 31 0x00000001 0x00000000 3 TYPE
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_CF_WORD0
+FLD  0 0xffffffff 0x00000000 3 ADDR
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_CF_WORD1
+FLD  0 0x00000007 0x00000000 3 POP_COUNT
+FLD  3 0x0000001f 0x00000000 3 CF_CONST
+FLD  8 0x00000003 0x00000000 3 COND
+VAL 0x00000000 SQ_CF_COND_ACTIVE
+VAL 0x00000001 SQ_CF_COND_FALSE
+VAL 0x00000002 SQ_CF_COND_BOOL
+VAL 0x00000003 SQ_CF_COND_NOT_BOOL
+FLD 10 0x00000007 0x00000000 3 COUNT
+FLD 13 0x0000003f 0x00000000 3 CALL_COUNT
+FLD 19 0x00000001 0x00000000 3 COUNT_3
+FLD 21 0x00000001 0x00000000 3 END_OF_PROGRAM
+FLD 22 0x00000001 0x00000000 3 VALID_PIXEL_MODE
+FLD 23 0x0000007f 0x00000000 3 CF_INST
+VAL 0x00000000 SQ_CF_INST_NOP
+VAL 0x00000001 SQ_CF_INST_TEX
+VAL 0x00000002 SQ_CF_INST_VTX
+VAL 0x00000003 SQ_CF_INST_VTX_TC
+VAL 0x00000004 SQ_CF_INST_LOOP_START
+VAL 0x00000005 SQ_CF_INST_LOOP_END
+VAL 0x00000006 SQ_CF_INST_LOOP_START_DX10
+VAL 0x00000007 SQ_CF_INST_LOOP_START_NO_AL
+VAL 0x00000008 SQ_CF_INST_LOOP_CONTINUE
+VAL 0x00000009 SQ_CF_INST_LOOP_BREAK
+VAL 0x0000000a SQ_CF_INST_JUMP
+VAL 0x0000000b SQ_CF_INST_PUSH
+VAL 0x0000000c SQ_CF_INST_PUSH_ELSE
+VAL 0x0000000d SQ_CF_INST_ELSE
+VAL 0x0000000e SQ_CF_INST_POP
+VAL 0x0000000f SQ_CF_INST_POP_JUMP
+VAL 0x00000010 SQ_CF_INST_POP_PUSH
+VAL 0x00000011 SQ_CF_INST_POP_PUSH_ELSE
+VAL 0x00000012 SQ_CF_INST_CALL
+VAL 0x00000013 SQ_CF_INST_CALL_FS
+VAL 0x00000014 SQ_CF_INST_RETURN
+VAL 0x00000015 SQ_CF_INST_EMIT_VERTEX
+VAL 0x00000016 SQ_CF_INST_EMIT_CUT_VERTEX
+VAL 0x00000017 SQ_CF_INST_CUT_VERTEX
+VAL 0x00000018 SQ_CF_INST_KILL
+FLD 30 0x00000001 0x00000000 3 WHOLE_QUAD_MODE
+FLD 31 0x00000001 0x00000000 3 BARRIER
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_CF_ALU_WORD0
+FLD  0 0x003fffff 0x00000000 3 ADDR
+FLD 22 0x0000000f 0x00000000 3 KCACHE_BANK0
+FLD 26 0x0000000f 0x00000000 3 KCACHE_BANK1
+FLD 30 0x00000003 0x00000000 3 KCACHE_MODE0
+VAL 0x00000000 SQ_CF_KCACHE_NOP
+VAL 0x00000001 SQ_CF_KCACHE_LOCK_1
+VAL 0x00000002 SQ_CF_KCACHE_LOCK_2
+VAL 0x00000003 SQ_CF_KCACHE_LOCK_LOOP_INDEX
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_CF_ALU_WORD1
+FLD  0 0x00000003 0x00000000 3 KCACHE_MODE1
+VAL 0x00000000 SQ_CF_KCACHE_NOP
+VAL 0x00000001 SQ_CF_KCACHE_LOCK_1
+VAL 0x00000002 SQ_CF_KCACHE_LOCK_2
+VAL 0x00000003 SQ_CF_KCACHE_LOCK_LOOP_INDEX
+FLD  2 0x000000ff 0x00000000 3 KCACHE_ADDR0
+FLD 10 0x000000ff 0x00000000 3 KCACHE_ADDR1
+FLD 18 0x0000007f 0x00000000 3 COUNT
+FLD 25 0x00000001 0x00000000 3 ALT_CONST
+FLD 26 0x0000000f 0x00000000 3 CF_INST
+VAL 0x00000008 SQ_CF_INST_ALU
+VAL 0x00000009 SQ_CF_INST_ALU_PUSH_BEFORE
+VAL 0x0000000a SQ_CF_INST_ALU_POP_AFTER
+VAL 0x0000000b SQ_CF_INST_ALU_POP2_AFTER
+VAL 0x0000000d SQ_CF_INST_ALU_CONTINUE
+VAL 0x0000000e SQ_CF_INST_ALU_BREAK
+VAL 0x0000000f SQ_CF_INST_ALU_ELSE_AFTER
+FLD 30 0x00000001 0x00000000 3 WHOLE_QUAD_MODE
+FLD 31 0x00000001 0x00000000 3 BARRIER
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_CF_ALLOC_EXPORT_WORD0
+FLD  0 0x00001fff 0x00000000 3 ARRAY_BASE
+VAL 0x00000000 SQ_EXPORT_PARAM0
+VAL 0x00000000 SQ_EXPORT_CB0
+VAL 0x00000001 SQ_EXPORT_CB1
+VAL 0x00000002 SQ_EXPORT_CB2
+VAL 0x00000003 SQ_EXPORT_CB3
+VAL 0x00000004 SQ_EXPORT_CB4
+VAL 0x00000005 SQ_EXPORT_CB5
+VAL 0x00000006 SQ_EXPORT_CB6
+VAL 0x00000007 SQ_EXPORT_CB7
+VAL 0x0000001f SQ_EXPORT_PARAM31
+VAL 0x0000003c SQ_EXPORT_POS0
+VAL 0x0000003d SQ_EXPORT_Z
+VAL 0x0000003d SQ_EXPORT_POS1
+VAL 0x0000003e SQ_EXPORT_POS2
+VAL 0x0000003f SQ_EXPORT_POS3
+FLD 13 0x00000003 0x00000000 3 TYPE
+VAL 0x00000000 SQ_EXPORT_PIXEL
+VAL 0x00000001 SQ_EXPORT_POS
+VAL 0x00000002 SQ_EXPORT_PARAM
+VAL 0x00000003 X_UNUSED_FOR_SX_EXPORTS
+FLD 15 0x0000007f 0x00000000 3 RW_GPR
+FLD 22 0x00000001 0x00000000 3 RW_REL
+FLD 23 0x0000007f 0x00000000 3 INDEX_GPR
+FLD 30 0x00000003 0x00000000 3 ELEM_SIZE
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_CF_ALLOC_EXPORT_WORD1
+FLD 17 0x0000000f 0x00000000 3 BURST_COUNT
+FLD 21 0x00000001 0x00000000 3 END_OF_PROGRAM
+FLD 22 0x00000001 0x00000000 3 VALID_PIXEL_MODE
+FLD 23 0x0000007f 0x00000000 3 CF_INST
+VAL 0x00000020 SQ_CF_INST_MEM_STREAM0
+VAL 0x00000021 SQ_CF_INST_MEM_STREAM1
+VAL 0x00000022 SQ_CF_INST_MEM_STREAM2
+VAL 0x00000023 SQ_CF_INST_MEM_STREAM3
+VAL 0x00000024 SQ_CF_INST_MEM_SCRATCH
+VAL 0x00000025 SQ_CF_INST_MEM_REDUCTION
+VAL 0x00000026 SQ_CF_INST_MEM_RING
+VAL 0x00000027 SQ_CF_INST_EXPORT
+VAL 0x00000028 SQ_CF_INST_EXPORT_DONE
+FLD 30 0x00000001 0x00000000 3 WHOLE_QUAD_MODE
+FLD 31 0x00000001 0x00000000 3 BARRIER
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_CF_ALLOC_EXPORT_WORD1_BUF
+FLD  0 0x00000fff 0x00000000 3 ARRAY_SIZE
+FLD 12 0x0000000f 0x00000000 3 COMP_MASK
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_CF_ALLOC_EXPORT_WORD1_SWIZ
+FLD  0 0x00000007 0x00000000 3 SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD  3 0x00000007 0x00000000 3 SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD  6 0x00000007 0x00000000 3 SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD  9 0x00000007 0x00000000 3 SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_ALU_WORD1
+FLD 15 0x00000007 0x00000000 3 ENCODING
+FLD 18 0x00000007 0x00000000 3 BANK_SWIZZLE
+VAL 0x00000000 SQ_ALU_VEC_012
+VAL 0x00000000 SQ_ALU_SCL_210
+VAL 0x00000001 SQ_ALU_VEC_021
+VAL 0x00000001 SQ_ALU_SCL_122
+VAL 0x00000002 SQ_ALU_VEC_120
+VAL 0x00000002 SQ_ALU_SCL_212
+VAL 0x00000003 SQ_ALU_VEC_102
+VAL 0x00000003 SQ_ALU_SCL_221
+VAL 0x00000004 SQ_ALU_VEC_201
+VAL 0x00000005 SQ_ALU_VEC_210
+FLD 21 0x0000007f 0x00000000 3 DST_GPR
+FLD 28 0x00000001 0x00000000 3 DST_REL
+FLD 29 0x00000003 0x00000000 3 DST_CHAN
+VAL 0x00000000 CHAN_X
+VAL 0x00000001 CHAN_Y
+VAL 0x00000002 CHAN_Z
+VAL 0x00000003 CHAN_W
+FLD 31 0x00000001 0x00000000 3 CLAMP
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_ALU_WORD1_OP2_V2
+FLD  0 0x00000001 0x00000000 3 SRC0_ABS
+FLD  1 0x00000001 0x00000000 3 SRC1_ABS
+FLD  2 0x00000001 0x00000000 3 UPDATE_EXECUTE_MASK
+FLD  3 0x00000001 0x00000000 3 UPDATE_PRED
+FLD  4 0x00000001 0x00000000 3 WRITE_MASK
+FLD  5 0x00000003 0x00000000 3 OMOD
+VAL 0x00000000 SQ_ALU_OMOD_OFF
+VAL 0x00000001 SQ_ALU_OMOD_M2
+VAL 0x00000002 SQ_ALU_OMOD_M4
+VAL 0x00000003 SQ_ALU_OMOD_D2
+FLD  7 0x000007ff 0x00000000 3 ALU_INST
+VAL 0x00000000 SQ_OP2_INST_ADD
+VAL 0x00000001 SQ_OP2_INST_MUL
+VAL 0x00000002 SQ_OP2_INST_MUL_IEEE
+VAL 0x00000003 SQ_OP2_INST_MAX
+VAL 0x00000004 SQ_OP2_INST_MIN
+VAL 0x00000005 SQ_OP2_INST_MAX_DX10
+VAL 0x00000006 SQ_OP2_INST_MIN_DX10
+VAL 0x00000008 SQ_OP2_INST_SETE
+VAL 0x00000009 SQ_OP2_INST_SETGT
+VAL 0x0000000a SQ_OP2_INST_SETGE
+VAL 0x0000000b SQ_OP2_INST_SETNE
+VAL 0x0000000c SQ_OP2_INST_SETE_DX10
+VAL 0x0000000d SQ_OP2_INST_SETGT_DX10
+VAL 0x0000000e SQ_OP2_INST_SETGE_DX10
+VAL 0x0000000f SQ_OP2_INST_SETNE_DX10
+VAL 0x00000010 SQ_OP2_INST_FRACT
+VAL 0x00000011 SQ_OP2_INST_TRUNC
+VAL 0x00000012 SQ_OP2_INST_CEIL
+VAL 0x00000013 SQ_OP2_INST_RNDNE
+VAL 0x00000014 SQ_OP2_INST_FLOOR
+VAL 0x00000015 SQ_OP2_INST_MOVA
+VAL 0x00000016 SQ_OP2_INST_MOVA_FLOOR
+VAL 0x00000018 SQ_OP2_INST_MOVA_INT
+VAL 0x00000019 SQ_OP2_INST_MOV
+VAL 0x0000001a SQ_OP2_INST_NOP
+VAL 0x0000001e SQ_OP2_INST_PRED_SETGT_UINT
+VAL 0x0000001f SQ_OP2_INST_PRED_SETGE_UINT
+VAL 0x00000020 SQ_OP2_INST_PRED_SETE
+VAL 0x00000021 SQ_OP2_INST_PRED_SETGT
+VAL 0x00000022 SQ_OP2_INST_PRED_SETGE
+VAL 0x00000023 SQ_OP2_INST_PRED_SETNE
+VAL 0x00000024 SQ_OP2_INST_PRED_SET_INV
+VAL 0x00000025 SQ_OP2_INST_PRED_SET_POP
+VAL 0x00000026 SQ_OP2_INST_PRED_SET_CLR
+VAL 0x00000027 SQ_OP2_INST_PRED_SET_RESTORE
+VAL 0x00000028 SQ_OP2_INST_PRED_SETE_PUSH
+VAL 0x00000029 SQ_OP2_INST_PRED_SETGT_PUSH
+VAL 0x0000002a SQ_OP2_INST_PRED_SETGE_PUSH
+VAL 0x0000002b SQ_OP2_INST_PRED_SETNE_PUSH
+VAL 0x0000002c SQ_OP2_INST_KILLE
+VAL 0x0000002d SQ_OP2_INST_KILLGT
+VAL 0x0000002e SQ_OP2_INST_KILLGE
+VAL 0x0000002f SQ_OP2_INST_KILLNE
+VAL 0x00000030 SQ_OP2_INST_AND_INT
+VAL 0x00000031 SQ_OP2_INST_OR_INT
+VAL 0x00000032 SQ_OP2_INST_XOR_INT
+VAL 0x00000033 SQ_OP2_INST_NOT_INT
+VAL 0x00000034 SQ_OP2_INST_ADD_INT
+VAL 0x00000035 SQ_OP2_INST_SUB_INT
+VAL 0x00000036 SQ_OP2_INST_MAX_INT
+VAL 0x00000037 SQ_OP2_INST_MIN_INT
+VAL 0x00000038 SQ_OP2_INST_MAX_UINT
+VAL 0x00000039 SQ_OP2_INST_MIN_UINT
+VAL 0x0000003a SQ_OP2_INST_SETE_INT
+VAL 0x0000003b SQ_OP2_INST_SETGT_INT
+VAL 0x0000003c SQ_OP2_INST_SETGE_INT
+VAL 0x0000003d SQ_OP2_INST_SETNE_INT
+VAL 0x0000003e SQ_OP2_INST_SETGT_UINT
+VAL 0x0000003f SQ_OP2_INST_SETGE_UINT
+VAL 0x00000040 SQ_OP2_INST_KILLGT_UINT
+VAL 0x00000041 SQ_OP2_INST_KILLGE_UINT
+VAL 0x00000042 SQ_OP2_INST_PRED_SETE_INT
+VAL 0x00000043 SQ_OP2_INST_PRED_SETGT_INT
+VAL 0x00000044 SQ_OP2_INST_PRED_SETGE_INT
+VAL 0x00000045 SQ_OP2_INST_PRED_SETNE_INT
+VAL 0x00000046 SQ_OP2_INST_KILLE_INT
+VAL 0x00000047 SQ_OP2_INST_KILLGT_INT
+VAL 0x00000048 SQ_OP2_INST_KILLGE_INT
+VAL 0x00000049 SQ_OP2_INST_KILLNE_INT
+VAL 0x0000004a SQ_OP2_INST_PRED_SETE_PUSH_INT
+VAL 0x0000004b SQ_OP2_INST_PRED_SETGT_PUSH_INT
+VAL 0x0000004c SQ_OP2_INST_PRED_SETGE_PUSH_INT
+VAL 0x0000004d SQ_OP2_INST_PRED_SETNE_PUSH_INT
+VAL 0x0000004e SQ_OP2_INST_PRED_SETLT_PUSH_INT
+VAL 0x0000004f SQ_OP2_INST_PRED_SETLE_PUSH_INT
+VAL 0x00000050 SQ_OP2_INST_DOT4
+VAL 0x00000051 SQ_OP2_INST_DOT4_IEEE
+VAL 0x00000052 SQ_OP2_INST_CUBE
+VAL 0x00000053 SQ_OP2_INST_MAX4
+VAL 0x00000060 SQ_OP2_INST_MOVA_GPR_INT
+VAL 0x00000061 SQ_OP2_INST_EXP_IEEE
+VAL 0x00000062 SQ_OP2_INST_LOG_CLAMPED
+VAL 0x00000063 SQ_OP2_INST_LOG_IEEE
+VAL 0x00000064 SQ_OP2_INST_RECIP_CLAMPED
+VAL 0x00000065 SQ_OP2_INST_RECIP_FF
+VAL 0x00000066 SQ_OP2_INST_RECIP_IEEE
+VAL 0x00000067 SQ_OP2_INST_RECIPSQRT_CLAMPED
+VAL 0x00000068 SQ_OP2_INST_RECIPSQRT_FF
+VAL 0x00000069 SQ_OP2_INST_RECIPSQRT_IEEE
+VAL 0x0000006a SQ_OP2_INST_SQRT_IEEE
+VAL 0x0000006b SQ_OP2_INST_FLT_TO_INT
+VAL 0x0000006c SQ_OP2_INST_INT_TO_FLT
+VAL 0x0000006d SQ_OP2_INST_UINT_TO_FLT
+VAL 0x0000006e SQ_OP2_INST_SIN
+VAL 0x0000006f SQ_OP2_INST_COS
+VAL 0x00000070 SQ_OP2_INST_ASHR_INT
+VAL 0x00000071 SQ_OP2_INST_LSHR_INT
+VAL 0x00000072 SQ_OP2_INST_LSHL_INT
+VAL 0x00000073 SQ_OP2_INST_MULLO_INT
+VAL 0x00000074 SQ_OP2_INST_MULHI_INT
+VAL 0x00000075 SQ_OP2_INST_MULLO_UINT
+VAL 0x00000076 SQ_OP2_INST_MULHI_UINT
+VAL 0x00000077 SQ_OP2_INST_RECIP_INT
+VAL 0x00000078 SQ_OP2_INST_RECIP_UINT
+VAL 0x00000079 SQ_OP2_INST_FLT_TO_UINT
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_ALU_WORD1_OP3
+FLD  0 0x000001ff 0x00000000 3 SRC2_SEL
+VAL 0x00000080 SQ_ALU_KCACHE0_0
+VAL 0x0000009f SQ_ALU_KCACHE0_31
+VAL 0x000000a0 SQ_ALU_KCACHE1_0
+VAL 0x000000bf SQ_ALU_KCACHE1_31
+VAL 0x000000f8 SQ_ALU_SRC_0
+VAL 0x000000f9 SQ_ALU_SRC_1
+VAL 0x000000fa SQ_ALU_SRC_1_INT
+VAL 0x000000fb SQ_ALU_SRC_M_1_INT
+VAL 0x000000fc SQ_ALU_SRC_0_5
+VAL 0x000000fd SQ_ALU_SRC_LITERAL
+VAL 0x000000fe SQ_ALU_SRC_PV
+VAL 0x000000ff SQ_ALU_SRC_PS
+VAL 0x00000100 SQ_ALU_CFILE_0
+VAL 0x000001ff SQ_ALU_CFILE_255
+FLD  9 0x00000001 0x00000000 3 SRC2_REL
+FLD 10 0x00000003 0x00000000 3 SRC2_CHAN
+VAL 0x00000000 SQ_CHAN_X
+VAL 0x00000001 SQ_CHAN_Y
+VAL 0x00000002 SQ_CHAN_Z
+VAL 0x00000003 SQ_CHAN_W
+FLD 12 0x00000001 0x00000000 3 SRC2_NEG
+FLD 13 0x0000001f 0x00000000 3 ALU_INST
+VAL 0x0000000c SQ_OP3_INST_MUL_LIT
+VAL 0x0000000d SQ_OP3_INST_MUL_LIT_M2
+VAL 0x0000000e SQ_OP3_INST_MUL_LIT_M4
+VAL 0x0000000f SQ_OP3_INST_MUL_LIT_D2
+VAL 0x00000010 SQ_OP3_INST_MULADD
+VAL 0x00000011 SQ_OP3_INST_MULADD_M2
+VAL 0x00000012 SQ_OP3_INST_MULADD_M4
+VAL 0x00000013 SQ_OP3_INST_MULADD_D2
+VAL 0x00000014 SQ_OP3_INST_MULADD_IEEE
+VAL 0x00000015 SQ_OP3_INST_MULADD_IEEE_M2
+VAL 0x00000016 SQ_OP3_INST_MULADD_IEEE_M4
+VAL 0x00000017 SQ_OP3_INST_MULADD_IEEE_D2
+VAL 0x00000018 SQ_OP3_INST_CNDE
+VAL 0x00000019 SQ_OP3_INST_CNDGT
+VAL 0x0000001a SQ_OP3_INST_CNDGE
+VAL 0x0000001c SQ_OP3_INST_CNDE_INT
+VAL 0x0000001d SQ_OP3_INST_CNDGT_INT
+VAL 0x0000001e SQ_OP3_INST_CNDGE_INT
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_VTX_WORD1
+FLD  9 0x00000007 0x00000000 3 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 12 0x00000007 0x00000000 3 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 15 0x00000007 0x00000000 3 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 18 0x00000007 0x00000000 3 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 21 0x00000001 0x00000000 3 USE_CONST_FIELDS
+FLD 22 0x0000003f 0x00000000 3 DATA_FORMAT
+VAL 0x00000000 FMT_INVALID
+VAL 0x00000001 FMT_8
+VAL 0x00000002 FMT_4_4
+VAL 0x00000003 FMT_3_3_2
+VAL 0x00000005 FMT_16
+VAL 0x00000006 FMT_16_FLOAT
+VAL 0x00000007 FMT_8_8
+VAL 0x00000008 FMT_5_6_5
+VAL 0x00000009 FMT_6_5_5
+VAL 0x0000000a FMT_1_5_5_5
+VAL 0x0000000b FMT_4_4_4_4
+VAL 0x0000000c FMT_5_5_5_1
+VAL 0x0000000d FMT_32
+VAL 0x0000000e FMT_32_FLOAT
+VAL 0x0000000f FMT_16_16
+VAL 0x00000010 FMT_16_16_FLOAT
+VAL 0x00000011 FMT_8_24
+VAL 0x00000012 FMT_8_24_FLOAT
+VAL 0x00000013 FMT_24_8
+VAL 0x00000014 FMT_24_8_FLOAT
+VAL 0x00000015 FMT_10_11_11
+VAL 0x00000016 FMT_10_11_11_FLOAT
+VAL 0x00000017 FMT_11_11_10
+VAL 0x00000018 FMT_11_11_10_FLOAT
+VAL 0x00000019 FMT_2_10_10_10
+VAL 0x0000001a FMT_8_8_8_8
+VAL 0x0000001b FMT_10_10_10_2
+VAL 0x0000001c FMT_X24_8_32_FLOAT
+VAL 0x0000001d FMT_32_32
+VAL 0x0000001e FMT_32_32_FLOAT
+VAL 0x0000001f FMT_16_16_16_16
+VAL 0x00000020 FMT_16_16_16_16_FLOAT
+VAL 0x00000022 FMT_32_32_32_32
+VAL 0x00000023 FMT_32_32_32_32_FLOAT
+VAL 0x00000025 FMT_1
+VAL 0x00000027 FMT_GB_GR
+VAL 0x00000028 FMT_BG_RG
+VAL 0x00000029 FMT_32_AS_8
+VAL 0x0000002a FMT_32_AS_8_8
+VAL 0x0000002b FMT_5_9_9_9_SHAREDEXP
+VAL 0x0000002c FMT_8_8_8
+VAL 0x0000002d FMT_16_16_16
+VAL 0x0000002e FMT_16_16_16_FLOAT
+VAL 0x0000002f FMT_32_32_32
+VAL 0x00000030 FMT_32_32_32_FLOAT
+FLD 28 0x00000003 0x00000000 3 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 30 0x00000001 0x00000000 3 FORMAT_COMP_ALL
+VAL 0x00000000 FORMAT_COMP_UNSIGNED
+VAL 0x00000001 FORMAT_COMP_SIGNED
+FLD 31 0x00000001 0x00000000 3 SRF_MODE_ALL
+VAL 0x00000000 SRF_MODE_ZERO_CLAMP_MINUS_ONE
+VAL 0x00000001 SRF_MODE_NO_ZERO
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_VTX_WORD1_GPR
+FLD  0 0x0000007f 0x00000000 3 DST_GPR
+FLD  7 0x00000001 0x00000000 3 DST_REL
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_VTX_WORD1_SEM
+FLD  0 0x000000ff 0x00000000 3 SEMANTIC_ID
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_VTX_WORD2
+FLD  0 0x0000ffff 0x00000000 3 OFFSET
+FLD 16 0x00000003 0x00000000 3 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+FLD 18 0x00000001 0x00000000 3 CONST_BUF_NO_STRIDE
+FLD 19 0x00000001 0x00000000 3 MEGA_FETCH
+FLD 20 0x00000001 0x00000000 3 ALT_CONST
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_TEX_WORD0
+FLD  0 0x0000001f 0x00000000 3 TEX_INST
+VAL 0x00000000 SQ_TEX_INST_VTX_FETCH
+VAL 0x00000001 SQ_TEX_INST_VTX_SEMANTIC
+VAL 0x00000003 SQ_TEX_INST_LD
+VAL 0x00000004 SQ_TEX_INST_GET_TEXTURE_RESINFO
+VAL 0x00000005 SQ_TEX_INST_GET_NUMBER_OF_SAMPLES
+VAL 0x00000006 SQ_TEX_INST_GET_LOD
+VAL 0x00000007 SQ_TEX_INST_GET_GRADIENTS_H
+VAL 0x00000008 SQ_TEX_INST_GET_GRADIENTS_V
+VAL 0x00000009 SQ_TEX_INST_GET_LERP
+VAL 0x0000000a SQ_TEX_INST_RESERVED_10
+VAL 0x0000000b SQ_TEX_INST_SET_GRADIENTS_H
+VAL 0x0000000c SQ_TEX_INST_SET_GRADIENTS_V
+VAL 0x0000000d SQ_TEX_INST_PASS
+VAL 0x0000000e X_Z_SET_INDEX_FOR_ARRAY_OF_CUBEMAPS
+VAL 0x00000010 SQ_TEX_INST_SAMPLE
+VAL 0x00000011 SQ_TEX_INST_SAMPLE_L
+VAL 0x00000012 SQ_TEX_INST_SAMPLE_LB
+VAL 0x00000013 SQ_TEX_INST_SAMPLE_LZ
+VAL 0x00000014 SQ_TEX_INST_SAMPLE_G
+VAL 0x00000015 SQ_TEX_INST_SAMPLE_G_L
+VAL 0x00000016 SQ_TEX_INST_SAMPLE_G_LB
+VAL 0x00000017 SQ_TEX_INST_SAMPLE_G_LZ
+VAL 0x00000018 SQ_TEX_INST_SAMPLE_C
+VAL 0x00000019 SQ_TEX_INST_SAMPLE_C_L
+VAL 0x0000001a SQ_TEX_INST_SAMPLE_C_LB
+VAL 0x0000001b SQ_TEX_INST_SAMPLE_C_LZ
+VAL 0x0000001c SQ_TEX_INST_SAMPLE_C_G
+VAL 0x0000001d SQ_TEX_INST_SAMPLE_C_G_L
+VAL 0x0000001e SQ_TEX_INST_SAMPLE_C_G_LB
+VAL 0x0000001f SQ_TEX_INST_SAMPLE_C_G_LZ
+FLD  5 0x00000001 0x00000000 3 BC_FRAC_MODE
+FLD  7 0x00000001 0x00000000 3 FETCH_WHOLE_QUAD
+FLD  8 0x000000ff 0x00000000 3 RESOURCE_ID
+FLD 16 0x0000007f 0x00000000 3 SRC_GPR
+FLD 23 0x00000001 0x00000000 3 SRC_REL
+FLD 24 0x00000001 0x00000000 3 ALT_CONST
+REG 0x00008dfc 0x0000010a 0x0000000c 32    0    1    0 SQ_ALU_WORD0
+FLD  0 0x000001ff 0x00000000 3 SRC0_SEL
+VAL 0x00000080 SQ_ALU_KCACHE0_0
+VAL 0x0000009f SQ_ALU_KCACHE0_31
+VAL 0x000000a0 SQ_ALU_KCACHE1_0
+VAL 0x000000bf SQ_ALU_KCACHE1_31
+VAL 0x000000f8 SQ_ALU_SRC_0
+VAL 0x000000f9 SQ_ALU_SRC_1
+VAL 0x000000fa SQ_ALU_SRC_1_INT
+VAL 0x000000fb SQ_ALU_SRC_M_1_INT
+VAL 0x000000fc SQ_ALU_SRC_0_5
+VAL 0x000000fd SQ_ALU_SRC_LITERAL
+VAL 0x000000fe SQ_ALU_SRC_PV
+VAL 0x000000ff SQ_ALU_SRC_PS
+VAL 0x00000100 SQ_ALU_CFILE_0
+VAL 0x000001ff SQ_ALU_CFILE_255
+FLD  9 0x00000001 0x00000000 3 SRC0_REL
+FLD 10 0x00000003 0x00000000 3 SRC0_CHAN
+VAL 0x00000000 SQ_CHAN_X
+VAL 0x00000001 SQ_CHAN_Y
+VAL 0x00000002 SQ_CHAN_Z
+VAL 0x00000003 SQ_CHAN_W
+FLD 12 0x00000001 0x00000000 3 SRC0_NEG
+FLD 13 0x000001ff 0x00000000 3 SRC1_SEL
+VAL 0x00000080 SQ_ALU_KCACHE0_0
+VAL 0x0000009f SQ_ALU_KCACHE0_31
+VAL 0x000000a0 SQ_ALU_KCACHE1_0
+VAL 0x000000bf SQ_ALU_KCACHE1_31
+VAL 0x000000f8 SQ_ALU_SRC_0
+VAL 0x000000f9 SQ_ALU_SRC_1
+VAL 0x000000fa SQ_ALU_SRC_1_INT
+VAL 0x000000fb SQ_ALU_SRC_M_1_INT
+VAL 0x000000fc SQ_ALU_SRC_0_5
+VAL 0x000000fd SQ_ALU_SRC_LITERAL
+VAL 0x000000fe SQ_ALU_SRC_PV
+VAL 0x000000ff SQ_ALU_SRC_PS
+VAL 0x00000100 SQ_ALU_CFILE_0
+VAL 0x000001ff SQ_ALU_CFILE_255
+FLD 22 0x00000001 0x00000000 3 SRC1_REL
+FLD 23 0x00000003 0x00000000 3 SRC1_CHAN
+VAL 0x00000000 SQ_CHAN_X
+VAL 0x00000001 SQ_CHAN_Y
+VAL 0x00000002 SQ_CHAN_Z
+VAL 0x00000003 SQ_CHAN_W
+FLD 25 0x00000001 0x00000000 3 SRC1_NEG
+FLD 26 0x00000007 0x00000000 3 INDEX_MODE
+VAL 0x00000000 SQ_INDEX_AR_X
+VAL 0x00000001 SQ_INDEX_AR_Y
+VAL 0x00000002 SQ_INDEX_AR_Z
+VAL 0x00000003 SQ_INDEX_AR_W
+VAL 0x00000004 SQ_INDEX_LOOP
+FLD 29 0x00000003 0x00000000 3 PRED_SEL
+VAL 0x00000000 SQ_PRED_SEL_OFF
+VAL 0x00000002 SQ_PRED_SEL_ZERO
+VAL 0x00000003 SQ_PRED_SEL_ONE
+FLD 31 0x00000001 0x00000000 3 LAST
+REG 0x00008dfc 0x0000010a 0x0000000c 32    0    1    0 SQ_ALU_WORD1_OP2
+FLD  0 0x00000001 0x00000000 3 SRC0_ABS
+FLD  1 0x00000001 0x00000000 3 SRC1_ABS
+FLD  2 0x00000001 0x00000000 3 UPDATE_EXECUTE_MASK
+FLD  3 0x00000001 0x00000000 3 UPDATE_PRED
+FLD  4 0x00000001 0x00000000 3 WRITE_MASK
+FLD  5 0x00000001 0x00000000 3 FOG_MERGE
+FLD  6 0x00000003 0x00000000 3 OMOD
+VAL 0x00000000 SQ_ALU_OMOD_OFF
+VAL 0x00000001 SQ_ALU_OMOD_M2
+VAL 0x00000002 SQ_ALU_OMOD_M4
+VAL 0x00000003 SQ_ALU_OMOD_D2
+FLD  8 0x000003ff 0x00000000 3 ALU_INST
+VAL 0x00000000 SQ_OP2_INST_ADD
+VAL 0x00000001 SQ_OP2_INST_MUL
+VAL 0x00000002 SQ_OP2_INST_MUL_IEEE
+VAL 0x00000003 SQ_OP2_INST_MAX
+VAL 0x00000004 SQ_OP2_INST_MIN
+VAL 0x00000005 SQ_OP2_INST_MAX_DX10
+VAL 0x00000006 SQ_OP2_INST_MIN_DX10
+VAL 0x00000008 SQ_OP2_INST_SETE
+VAL 0x00000009 SQ_OP2_INST_SETGT
+VAL 0x0000000a SQ_OP2_INST_SETGE
+VAL 0x0000000b SQ_OP2_INST_SETNE
+VAL 0x0000000c SQ_OP2_INST_SETE_DX10
+VAL 0x0000000d SQ_OP2_INST_SETGT_DX10
+VAL 0x0000000e SQ_OP2_INST_SETGE_DX10
+VAL 0x0000000f SQ_OP2_INST_SETNE_DX10
+VAL 0x00000010 SQ_OP2_INST_FRACT
+VAL 0x00000011 SQ_OP2_INST_TRUNC
+VAL 0x00000012 SQ_OP2_INST_CEIL
+VAL 0x00000013 SQ_OP2_INST_RNDNE
+VAL 0x00000014 SQ_OP2_INST_FLOOR
+VAL 0x00000015 SQ_OP2_INST_MOVA
+VAL 0x00000016 SQ_OP2_INST_MOVA_FLOOR
+VAL 0x00000018 SQ_OP2_INST_MOVA_INT
+VAL 0x00000019 SQ_OP2_INST_MOV
+VAL 0x0000001a SQ_OP2_INST_NOP
+VAL 0x0000001e SQ_OP2_INST_PRED_SETGT_UINT
+VAL 0x0000001f SQ_OP2_INST_PRED_SETGE_UINT
+VAL 0x00000020 SQ_OP2_INST_PRED_SETE
+VAL 0x00000021 SQ_OP2_INST_PRED_SETGT
+VAL 0x00000022 SQ_OP2_INST_PRED_SETGE
+VAL 0x00000023 SQ_OP2_INST_PRED_SETNE
+VAL 0x00000024 SQ_OP2_INST_PRED_SET_INV
+VAL 0x00000025 SQ_OP2_INST_PRED_SET_POP
+VAL 0x00000026 SQ_OP2_INST_PRED_SET_CLR
+VAL 0x00000027 SQ_OP2_INST_PRED_SET_RESTORE
+VAL 0x00000028 SQ_OP2_INST_PRED_SETE_PUSH
+VAL 0x00000029 SQ_OP2_INST_PRED_SETGT_PUSH
+VAL 0x0000002a SQ_OP2_INST_PRED_SETGE_PUSH
+VAL 0x0000002b SQ_OP2_INST_PRED_SETNE_PUSH
+VAL 0x0000002c SQ_OP2_INST_KILLE
+VAL 0x0000002d SQ_OP2_INST_KILLGT
+VAL 0x0000002e SQ_OP2_INST_KILLGE
+VAL 0x0000002f SQ_OP2_INST_KILLNE
+VAL 0x00000030 SQ_OP2_INST_AND_INT
+VAL 0x00000031 SQ_OP2_INST_OR_INT
+VAL 0x00000032 SQ_OP2_INST_XOR_INT
+VAL 0x00000033 SQ_OP2_INST_NOT_INT
+VAL 0x00000034 SQ_OP2_INST_ADD_INT
+VAL 0x00000035 SQ_OP2_INST_SUB_INT
+VAL 0x00000036 SQ_OP2_INST_MAX_INT
+VAL 0x00000037 SQ_OP2_INST_MIN_INT
+VAL 0x00000038 SQ_OP2_INST_MAX_UINT
+VAL 0x00000039 SQ_OP2_INST_MIN_UINT
+VAL 0x0000003a SQ_OP2_INST_SETE_INT
+VAL 0x0000003b SQ_OP2_INST_SETGT_INT
+VAL 0x0000003c SQ_OP2_INST_SETGE_INT
+VAL 0x0000003d SQ_OP2_INST_SETNE_INT
+VAL 0x0000003e SQ_OP2_INST_SETGT_UINT
+VAL 0x0000003f SQ_OP2_INST_SETGE_UINT
+VAL 0x00000040 SQ_OP2_INST_KILLGT_UINT
+VAL 0x00000041 SQ_OP2_INST_KILLGE_UINT
+VAL 0x00000042 SQ_OP2_INST_PRED_SETE_INT
+VAL 0x00000043 SQ_OP2_INST_PRED_SETGT_INT
+VAL 0x00000044 SQ_OP2_INST_PRED_SETGE_INT
+VAL 0x00000045 SQ_OP2_INST_PRED_SETNE_INT
+VAL 0x00000046 SQ_OP2_INST_KILLE_INT
+VAL 0x00000047 SQ_OP2_INST_KILLGT_INT
+VAL 0x00000048 SQ_OP2_INST_KILLGE_INT
+VAL 0x00000049 SQ_OP2_INST_KILLNE_INT
+VAL 0x0000004a SQ_OP2_INST_PRED_SETE_PUSH_INT
+VAL 0x0000004b SQ_OP2_INST_PRED_SETGT_PUSH_INT
+VAL 0x0000004c SQ_OP2_INST_PRED_SETGE_PUSH_INT
+VAL 0x0000004d SQ_OP2_INST_PRED_SETNE_PUSH_INT
+VAL 0x0000004e SQ_OP2_INST_PRED_SETLT_PUSH_INT
+VAL 0x0000004f SQ_OP2_INST_PRED_SETLE_PUSH_INT
+VAL 0x00000050 SQ_OP2_INST_DOT4
+VAL 0x00000051 SQ_OP2_INST_DOT4_IEEE
+VAL 0x00000052 SQ_OP2_INST_CUBE
+VAL 0x00000053 SQ_OP2_INST_MAX4
+VAL 0x00000060 SQ_OP2_INST_MOVA_GPR_INT
+VAL 0x00000061 SQ_OP2_INST_EXP_IEEE
+VAL 0x00000062 SQ_OP2_INST_LOG_CLAMPED
+VAL 0x00000063 SQ_OP2_INST_LOG_IEEE
+VAL 0x00000064 SQ_OP2_INST_RECIP_CLAMPED
+VAL 0x00000065 SQ_OP2_INST_RECIP_FF
+VAL 0x00000066 SQ_OP2_INST_RECIP_IEEE
+VAL 0x00000067 SQ_OP2_INST_RECIPSQRT_CLAMPED
+VAL 0x00000068 SQ_OP2_INST_RECIPSQRT_FF
+VAL 0x00000069 SQ_OP2_INST_RECIPSQRT_IEEE
+VAL 0x0000006a SQ_OP2_INST_SQRT_IEEE
+VAL 0x0000006b SQ_OP2_INST_FLT_TO_INT
+VAL 0x0000006c SQ_OP2_INST_INT_TO_FLT
+VAL 0x0000006d SQ_OP2_INST_UINT_TO_FLT
+VAL 0x0000006e SQ_OP2_INST_SIN
+VAL 0x0000006f SQ_OP2_INST_COS
+VAL 0x00000070 SQ_OP2_INST_ASHR_INT
+VAL 0x00000071 SQ_OP2_INST_LSHR_INT
+VAL 0x00000072 SQ_OP2_INST_LSHL_INT
+VAL 0x00000073 SQ_OP2_INST_MULLO_INT
+VAL 0x00000074 SQ_OP2_INST_MULHI_INT
+VAL 0x00000075 SQ_OP2_INST_MULLO_UINT
+VAL 0x00000076 SQ_OP2_INST_MULHI_UINT
+VAL 0x00000077 SQ_OP2_INST_RECIP_INT
+VAL 0x00000078 SQ_OP2_INST_RECIP_UINT
+VAL 0x00000079 SQ_OP2_INST_FLT_TO_UINT
+REG 0x00008dfc 0x0000010a 0x0000000c 32    0    1    0 SQ_VTX_WORD0
+FLD  0 0x0000001f 0x00000000 3 VTX_INST
+VAL 0x00000000 SQ_VTX_INST_FETCH
+VAL 0x00000001 SQ_VTX_INST_SEMANTIC
+FLD  5 0x00000003 0x00000000 3 FETCH_TYPE
+VAL 0x00000000 SQ_VTX_FETCH_VERTEX_DATA
+VAL 0x00000001 SQ_VTX_FETCH_INSTANCE_DATA
+VAL 0x00000002 SQ_VTX_FETCH_NO_INDEX_OFFSET
+FLD  7 0x00000001 0x00000000 3 FETCH_WHOLE_QUAD
+FLD  8 0x000000ff 0x00000000 3 BUFFER_ID
+FLD 16 0x0000007f 0x00000000 3 SRC_GPR
+FLD 23 0x00000001 0x00000000 3 SRC_REL
+FLD 24 0x00000003 0x00000000 3 SRC_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+FLD 26 0x0000003f 0x00000000 3 MEGA_FETCH_COUNT
+REG 0x00008dfc 0x0000010a 0x0000000c 32    0    1    0 SQ_TEX_WORD1
+FLD  0 0x0000007f 0x00000000 3 DST_GPR
+FLD  7 0x00000001 0x00000000 3 DST_REL
+FLD  9 0x00000007 0x00000000 3 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 12 0x00000007 0x00000000 3 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 15 0x00000007 0x00000000 3 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 18 0x00000007 0x00000000 3 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 21 0x0000007f 0x00000000 3 LOD_BIAS
+FLD 28 0x00000001 0x00000000 3 COORD_TYPE_X
+VAL 0x00000000 COORD_UNNORMALIZED
+VAL 0x00000001 COORD_NORMALIZED
+FLD 29 0x00000001 0x00000000 3 COORD_TYPE_Y
+VAL 0x00000000 COORD_UNNORMALIZED
+VAL 0x00000001 COORD_NORMALIZED
+FLD 30 0x00000001 0x00000000 3 COORD_TYPE_Z
+VAL 0x00000000 COORD_UNNORMALIZED
+VAL 0x00000001 COORD_NORMALIZED
+FLD 31 0x00000001 0x00000000 3 COORD_TYPE_W
+VAL 0x00000000 COORD_UNNORMALIZED
+VAL 0x00000001 COORD_NORMALIZED
+REG 0x00008dfc 0x0000010a 0x0000000c 32    0    1    0 SQ_TEX_WORD2
+FLD  0 0x0000001f 0x00000000 3 OFFSET_X
+FLD  5 0x0000001f 0x00000000 3 OFFSET_Y
+FLD 10 0x0000001f 0x00000000 3 OFFSET_Z
+FLD 15 0x0000001f 0x00000000 3 SAMPLER_ID
+FLD 20 0x00000007 0x00000000 3 SRC_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 23 0x00000007 0x00000000 3 SRC_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 26 0x00000007 0x00000000 3 SRC_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 29 0x00000007 0x00000000 3 SRC_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+REG 0x00038000 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_PS_WORD0
+FLD  0 0x00000007 0x00000000 3 DIM
+VAL 0x00000000 SQ_TEX_DIM_1D
+VAL 0x00000001 SQ_TEX_DIM_2D
+VAL 0x00000002 SQ_TEX_DIM_3D
+VAL 0x00000003 SQ_TEX_DIM_CUBEMAP
+VAL 0x00000004 SQ_TEX_DIM_1D_ARRAY
+VAL 0x00000005 SQ_TEX_DIM_2D_ARRAY
+VAL 0x00000006 SQ_TEX_DIM_2D_MSAA
+VAL 0x00000007 SQ_TEX_DIM_2D_ARRAY_MSAA
+FLD  3 0x0000000f 0x00000000 3 TILE_MODE
+FLD  7 0x00000001 0x00000000 3 TILE_TYPE
+FLD  8 0x000007ff 0x00000000 3 PITCH
+FLD 19 0x00001fff 0x00000000 3 TEX_WIDTH
+REG 0x00038004 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_PS_WORD1
+FLD  0 0x00001fff 0x00000000 3 TEX_HEIGHT
+FLD 13 0x00001fff 0x00000000 3 TEX_DEPTH
+FLD 26 0x0000003f 0x00000000 3 DATA_FORMAT
+REG 0x00038008 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_PS_WORD2
+REG 0x0003800c 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_PS_WORD3
+REG 0x00038010 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_PS_WORD4
+FLD  0 0x00000003 0x00000000 3 FORMAT_COMP_X
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  2 0x00000003 0x00000000 3 FORMAT_COMP_Y
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  4 0x00000003 0x00000000 3 FORMAT_COMP_Z
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  6 0x00000003 0x00000000 3 FORMAT_COMP_W
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  8 0x00000003 0x00000000 3 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 10 0x00000001 0x00000000 3 SRF_MODE_ALL
+VAL 0x00000000 SRF_MODE_ZERO_CLAMP_MINUS_ONE
+VAL 0x00000001 SRF_MODE_NO_ZERO
+FLD 11 0x00000001 0x00000000 3 FORCE_DEGAMMA
+FLD 12 0x00000003 0x00000000 3 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+FLD 14 0x00000003 0x00000000 3 REQUEST_SIZE
+FLD 16 0x00000007 0x00000000 3 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 19 0x00000007 0x00000000 3 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 22 0x00000007 0x00000000 3 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 25 0x00000007 0x00000000 3 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 28 0x0000000f 0x00000000 3 BASE_LEVEL
+REG 0x00038014 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_PS_WORD5
+FLD  0 0x0000000f 0x00000000 3 LAST_LEVEL
+FLD  4 0x00001fff 0x00000000 3 BASE_ARRAY
+FLD 17 0x00001fff 0x00000000 3 LAST_ARRAY
+REG 0x00038018 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_PS_WORD6
+FLD  0 0x00000003 0x00000000 3 MPEG_CLAMP
+VAL 0x00000000 SQ_TEX_MPEG_CLAMP_OFF
+VAL 0x00000001 SQ_TEX_MPEG_9
+VAL 0x00000002 SQ_TEX_MPEG_10
+FLD  5 0x00000007 0x00000000 3 PERF_MODULATION
+FLD  8 0x00000001 0x00000000 3 INTERLACED
+FLD 30 0x00000003 0x00000000 3 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x00039180 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_VS_WORD0
+FLD  0 0x00000007 0x00000000 3 DIM
+VAL 0x00000000 SQ_TEX_DIM_1D
+VAL 0x00000001 SQ_TEX_DIM_2D
+VAL 0x00000002 SQ_TEX_DIM_3D
+VAL 0x00000003 SQ_TEX_DIM_CUBEMAP
+VAL 0x00000004 SQ_TEX_DIM_1D_ARRAY
+VAL 0x00000005 SQ_TEX_DIM_2D_ARRAY
+VAL 0x00000006 SQ_TEX_DIM_2D_MSAA
+VAL 0x00000007 SQ_TEX_DIM_2D_ARRAY_MSAA
+FLD  3 0x0000000f 0x00000000 3 TILE_MODE
+FLD  7 0x00000001 0x00000000 3 TILE_TYPE
+FLD  8 0x000007ff 0x00000000 3 PITCH
+FLD 19 0x00001fff 0x00000000 3 TEX_WIDTH
+REG 0x00039184 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_VS_WORD1
+FLD  0 0x00001fff 0x00000000 3 TEX_HEIGHT
+FLD 13 0x00001fff 0x00000000 3 TEX_DEPTH
+FLD 26 0x0000003f 0x00000000 3 DATA_FORMAT
+REG 0x00039188 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_VS_WORD2
+REG 0x0003918c 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_VS_WORD3
+REG 0x00039190 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_VS_WORD4
+FLD  0 0x00000003 0x00000000 3 FORMAT_COMP_X
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  2 0x00000003 0x00000000 3 FORMAT_COMP_Y
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  4 0x00000003 0x00000000 3 FORMAT_COMP_Z
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  6 0x00000003 0x00000000 3 FORMAT_COMP_W
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  8 0x00000003 0x00000000 3 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 10 0x00000001 0x00000000 3 SRF_MODE_ALL
+VAL 0x00000000 SRF_MODE_ZERO_CLAMP_MINUS_ONE
+VAL 0x00000001 SRF_MODE_NO_ZERO
+FLD 11 0x00000001 0x00000000 3 FORCE_DEGAMMA
+FLD 12 0x00000003 0x00000000 3 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+FLD 14 0x00000003 0x00000000 3 REQUEST_SIZE
+FLD 16 0x00000007 0x00000000 3 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 19 0x00000007 0x00000000 3 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 22 0x00000007 0x00000000 3 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 25 0x00000007 0x00000000 3 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 28 0x0000000f 0x00000000 3 BASE_LEVEL
+REG 0x00039194 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_VS_WORD5
+FLD  0 0x0000000f 0x00000000 3 LAST_LEVEL
+FLD  4 0x00001fff 0x00000000 3 BASE_ARRAY
+FLD 17 0x00001fff 0x00000000 3 LAST_ARRAY
+REG 0x00039198 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_VS_WORD6
+FLD  0 0x00000003 0x00000000 3 MPEG_CLAMP
+VAL 0x00000000 SQ_TEX_MPEG_CLAMP_OFF
+VAL 0x00000001 SQ_TEX_MPEG_9
+VAL 0x00000002 SQ_TEX_MPEG_10
+FLD  5 0x00000007 0x00000000 3 PERF_MODULATION
+FLD  8 0x00000001 0x00000000 3 INTERLACED
+FLD 30 0x00000003 0x00000000 3 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x0003a300 0x0000010b 0x0000000c 32    0   16   28 SQ_TEX_RESOURCE_FS_WORD0
+FLD  0 0x00000007 0x00000000 3 DIM
+VAL 0x00000000 SQ_TEX_DIM_1D
+VAL 0x00000001 SQ_TEX_DIM_2D
+VAL 0x00000002 SQ_TEX_DIM_3D
+VAL 0x00000003 SQ_TEX_DIM_CUBEMAP
+VAL 0x00000004 SQ_TEX_DIM_1D_ARRAY
+VAL 0x00000005 SQ_TEX_DIM_2D_ARRAY
+VAL 0x00000006 SQ_TEX_DIM_2D_MSAA
+VAL 0x00000007 SQ_TEX_DIM_2D_ARRAY_MSAA
+FLD  3 0x0000000f 0x00000000 3 TILE_MODE
+FLD  7 0x00000001 0x00000000 3 TILE_TYPE
+FLD  8 0x000007ff 0x00000000 3 PITCH
+FLD 19 0x00001fff 0x00000000 3 TEX_WIDTH
+REG 0x0003a304 0x0000010b 0x0000000c 32    0   16   28 SQ_TEX_RESOURCE_FS_WORD1
+FLD  0 0x00001fff 0x00000000 3 TEX_HEIGHT
+FLD 13 0x00001fff 0x00000000 3 TEX_DEPTH
+FLD 26 0x0000003f 0x00000000 3 DATA_FORMAT
+REG 0x0003a308 0x0000010b 0x0000000c 32    0   16   28 SQ_TEX_RESOURCE_FS_WORD2
+REG 0x0003a30c 0x0000010b 0x0000000c 32    0   16   28 SQ_TEX_RESOURCE_FS_WORD3
+REG 0x0003a310 0x0000010b 0x0000000c 32    0   16   28 SQ_TEX_RESOURCE_FS_WORD4
+FLD  0 0x00000003 0x00000000 3 FORMAT_COMP_X
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  2 0x00000003 0x00000000 3 FORMAT_COMP_Y
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  4 0x00000003 0x00000000 3 FORMAT_COMP_Z
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  6 0x00000003 0x00000000 3 FORMAT_COMP_W
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  8 0x00000003 0x00000000 3 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 10 0x00000001 0x00000000 3 SRF_MODE_ALL
+VAL 0x00000000 SRF_MODE_ZERO_CLAMP_MINUS_ONE
+VAL 0x00000001 SRF_MODE_NO_ZERO
+FLD 11 0x00000001 0x00000000 3 FORCE_DEGAMMA
+FLD 12 0x00000003 0x00000000 3 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+FLD 14 0x00000003 0x00000000 3 REQUEST_SIZE
+FLD 16 0x00000007 0x00000000 3 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 19 0x00000007 0x00000000 3 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 22 0x00000007 0x00000000 3 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 25 0x00000007 0x00000000 3 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 28 0x0000000f 0x00000000 3 BASE_LEVEL
+REG 0x0003a314 0x0000010b 0x0000000c 32    0   16   28 SQ_TEX_RESOURCE_FS_WORD5
+FLD  0 0x0000000f 0x00000000 3 LAST_LEVEL
+FLD  4 0x00001fff 0x00000000 3 BASE_ARRAY
+FLD 17 0x00001fff 0x00000000 3 LAST_ARRAY
+REG 0x0003a318 0x0000010b 0x0000000c 32    0   16   28 SQ_TEX_RESOURCE_FS_WORD6
+FLD  0 0x00000003 0x00000000 3 MPEG_CLAMP
+VAL 0x00000000 SQ_TEX_MPEG_CLAMP_OFF
+VAL 0x00000001 SQ_TEX_MPEG_9
+VAL 0x00000002 SQ_TEX_MPEG_10
+FLD  5 0x00000007 0x00000000 3 PERF_MODULATION
+FLD  8 0x00000001 0x00000000 3 INTERLACED
+FLD 30 0x00000003 0x00000000 3 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x0003a4c0 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_GS_WORD0
+FLD  0 0x00000007 0x00000000 3 DIM
+VAL 0x00000000 SQ_TEX_DIM_1D
+VAL 0x00000001 SQ_TEX_DIM_2D
+VAL 0x00000002 SQ_TEX_DIM_3D
+VAL 0x00000003 SQ_TEX_DIM_CUBEMAP
+VAL 0x00000004 SQ_TEX_DIM_1D_ARRAY
+VAL 0x00000005 SQ_TEX_DIM_2D_ARRAY
+VAL 0x00000006 SQ_TEX_DIM_2D_MSAA
+VAL 0x00000007 SQ_TEX_DIM_2D_ARRAY_MSAA
+FLD  3 0x0000000f 0x00000000 3 TILE_MODE
+FLD  7 0x00000001 0x00000000 3 TILE_TYPE
+FLD  8 0x000007ff 0x00000000 3 PITCH
+FLD 19 0x00001fff 0x00000000 3 TEX_WIDTH
+REG 0x0003a4c4 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_GS_WORD1
+FLD  0 0x00001fff 0x00000000 3 TEX_HEIGHT
+FLD 13 0x00001fff 0x00000000 3 TEX_DEPTH
+FLD 26 0x0000003f 0x00000000 3 DATA_FORMAT
+REG 0x0003a4c8 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_GS_WORD2
+REG 0x0003a4cc 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_GS_WORD3
+REG 0x0003a4d0 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_GS_WORD4
+FLD  0 0x00000003 0x00000000 3 FORMAT_COMP_X
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  2 0x00000003 0x00000000 3 FORMAT_COMP_Y
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  4 0x00000003 0x00000000 3 FORMAT_COMP_Z
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  6 0x00000003 0x00000000 3 FORMAT_COMP_W
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  8 0x00000003 0x00000000 3 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 10 0x00000001 0x00000000 3 SRF_MODE_ALL
+VAL 0x00000000 SRF_MODE_ZERO_CLAMP_MINUS_ONE
+VAL 0x00000001 SRF_MODE_NO_ZERO
+FLD 11 0x00000001 0x00000000 3 FORCE_DEGAMMA
+FLD 12 0x00000003 0x00000000 3 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+FLD 14 0x00000003 0x00000000 3 REQUEST_SIZE
+FLD 16 0x00000007 0x00000000 3 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 19 0x00000007 0x00000000 3 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 22 0x00000007 0x00000000 3 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 25 0x00000007 0x00000000 3 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 28 0x0000000f 0x00000000 3 BASE_LEVEL
+REG 0x0003a4d4 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_GS_WORD5
+FLD  0 0x0000000f 0x00000000 3 LAST_LEVEL
+FLD  4 0x00001fff 0x00000000 3 BASE_ARRAY
+FLD 17 0x00001fff 0x00000000 3 LAST_ARRAY
+REG 0x0003a4d8 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_GS_WORD6
+FLD  0 0x00000003 0x00000000 3 MPEG_CLAMP
+VAL 0x00000000 SQ_TEX_MPEG_CLAMP_OFF
+VAL 0x00000001 SQ_TEX_MPEG_9
+VAL 0x00000002 SQ_TEX_MPEG_10
+FLD  5 0x00000007 0x00000000 3 PERF_MODULATION
+FLD  8 0x00000001 0x00000000 3 INTERLACED
+FLD 30 0x00000003 0x00000000 3 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x00038000 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_PS_WORD0
+REG 0x00038004 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_PS_WORD1
+REG 0x00038008 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_PS_WORD2
+FLD  0 0x000000ff 0x00000000 3 BASE_ADDRESS_HI
+FLD  8 0x000007ff 0x00000000 3 STRIDE
+FLD 19 0x00000001 0x00000000 3 CLAMP_X
+FLD 20 0x0000003f 0x00000000 3 DATA_FORMAT
+FLD 26 0x00000003 0x00000000 3 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 28 0x00000001 0x00000000 3 FORMAT_COMP_ALL
+VAL 0x00000000 FORMAT_COMP_UNSIGNED
+VAL 0x00000001 FORMAT_COMP_SIGNED
+FLD 29 0x00000001 0x00000000 3 SRF_MODE_ALL
+VAL 0x00000000 SRF_MODE_ZERO_CLAMP_MINUS_ONE
+VAL 0x00000001 SRF_MODE_NO_ZERO
+FLD 30 0x00000003 0x00000000 3 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+REG 0x0003800c 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_PS_WORD3
+FLD  0 0x00000003 0x00000000 3 MEM_REQUEST_SIZE
+REG 0x00038018 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_PS_WORD6
+FLD 30 0x00000003 0x00000000 3 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x00039180 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_VS_WORD0
+REG 0x00039184 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_VS_WORD1
+REG 0x00039188 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_VS_WORD2
+FLD  0 0x000000ff 0x00000000 3 BASE_ADDRESS_HI
+FLD  8 0x000007ff 0x00000000 3 STRIDE
+FLD 19 0x00000001 0x00000000 3 CLAMP_X
+FLD 20 0x0000003f 0x00000000 3 DATA_FORMAT
+FLD 26 0x00000003 0x00000000 3 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 28 0x00000001 0x00000000 3 FORMAT_COMP_ALL
+VAL 0x00000000 FORMAT_COMP_UNSIGNED
+VAL 0x00000001 FORMAT_COMP_SIGNED
+FLD 29 0x00000001 0x00000000 3 SRF_MODE_ALL
+VAL 0x00000000 SRF_MODE_ZERO_CLAMP_MINUS_ONE
+VAL 0x00000001 SRF_MODE_NO_ZERO
+FLD 30 0x00000003 0x00000000 3 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+REG 0x0003918c 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_VS_WORD3
+FLD  0 0x00000003 0x00000000 3 MEM_REQUEST_SIZE
+REG 0x00039198 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_VS_WORD6
+FLD 30 0x00000003 0x00000000 3 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x0003a300 0x0000010c 0x0000000c 32    0   16   28 SQ_VTX_CONSTANT_FS_WORD0
+REG 0x0003a304 0x0000010c 0x0000000c 32    0   16   28 SQ_VTX_CONSTANT_FS_WORD1
+REG 0x0003a308 0x0000010c 0x0000000c 32    0   16   28 SQ_VTX_CONSTANT_FS_WORD2
+FLD  0 0x000000ff 0x00000000 3 BASE_ADDRESS_HI
+FLD  8 0x000007ff 0x00000000 3 STRIDE
+FLD 19 0x00000001 0x00000000 3 CLAMP_X
+FLD 20 0x0000003f 0x00000000 3 DATA_FORMAT
+FLD 26 0x00000003 0x00000000 3 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 28 0x00000001 0x00000000 3 FORMAT_COMP_ALL
+VAL 0x00000000 FORMAT_COMP_UNSIGNED
+VAL 0x00000001 FORMAT_COMP_SIGNED
+FLD 29 0x00000001 0x00000000 3 SRF_MODE_ALL
+VAL 0x00000000 SRF_MODE_ZERO_CLAMP_MINUS_ONE
+VAL 0x00000001 SRF_MODE_NO_ZERO
+FLD 30 0x00000003 0x00000000 3 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+REG 0x0003a30c 0x0000010c 0x0000000c 32    0   16   28 SQ_VTX_CONSTANT_FS_WORD3
+FLD  0 0x00000003 0x00000000 3 MEM_REQUEST_SIZE
+REG 0x0003a318 0x0000010c 0x0000000c 32    0   16   28 SQ_VTX_CONSTANT_FS_WORD6
+FLD 30 0x00000003 0x00000000 3 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x0003a4c0 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_GS_WORD0
+REG 0x0003a4c4 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_GS_WORD1
+REG 0x0003a4c8 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_GS_WORD2
+FLD  0 0x000000ff 0x00000000 3 BASE_ADDRESS_HI
+FLD  8 0x000007ff 0x00000000 3 STRIDE
+FLD 19 0x00000001 0x00000000 3 CLAMP_X
+FLD 20 0x0000003f 0x00000000 3 DATA_FORMAT
+FLD 26 0x00000003 0x00000000 3 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 28 0x00000001 0x00000000 3 FORMAT_COMP_ALL
+VAL 0x00000000 FORMAT_COMP_UNSIGNED
+VAL 0x00000001 FORMAT_COMP_SIGNED
+FLD 29 0x00000001 0x00000000 3 SRF_MODE_ALL
+VAL 0x00000000 SRF_MODE_ZERO_CLAMP_MINUS_ONE
+VAL 0x00000001 SRF_MODE_NO_ZERO
+FLD 30 0x00000003 0x00000000 3 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+REG 0x0003a4cc 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_GS_WORD3
+FLD  0 0x00000003 0x00000000 3 MEM_REQUEST_SIZE
+REG 0x0003a4d8 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_GS_WORD6
+FLD 30 0x00000003 0x00000000 3 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
diff --git a/hd4xxx.rdb b/hd4xxx.rdb
new file mode 100644
index 0000000..6e13ba2
--- /dev/null
+++ b/hd4xxx.rdb
@@ -0,0 +1,3850 @@
+BLK 0x00000000 GENERAL
+BLK 0x00000001 CB
+BLK 0x00000002 CP
+BLK 0x00000003 DB
+BLK 0x00000004 IH
+BLK 0x00000005 MC
+BLK 0x00000006 PA
+BLK 0x00000007 PCIE
+BLK 0x00000008 PWR
+BLK 0x00000009 RLC
+BLK 0x0000000a SAMPLER
+BLK 0x0000000b SC
+BLK 0x0000000c SHADER
+BLK 0x0000000d SMX
+BLK 0x0000000e SPI
+BLK 0x0000000f TEXTURE_UNIT
+BLK 0x00000010 VGT
+BLK 0x00000011 VM
+DOM 0x00000000 MMIO
+DOM 0x00000001 PIO
+DOM 0x00000002 PCI
+DOM 0x00000003 PCIE
+DOM 0x00000101 ALU_CONST
+DOM 0x00000102 BOOL_CONST
+DOM 0x00000103 CONFIG
+DOM 0x00000104 CONTEXT
+DOM 0x00000105 CTL_CONST
+DOM 0x00000106 LOOP_CONST
+DOM 0x00000107 MC
+DOM 0x00000108 GPU_PCIE
+DOM 0x00000109 SAMPLER
+DOM 0x0000010a SHADER
+DOM 0x0000010b TEX_RESOURCE
+DOM 0x0000010c VTX_RESOURCE
+IT  0x00000010 NOP
+IT  0x00000017 INDIRECT_BUFFER_END
+IT  0x00000020 SET_PREDICATION
+IT  0x00000021 REG_RMW
+IT  0x00000022 COND_EXEC
+IT  0x00000023 PRED_EXEC
+IT  0x00000024 START_3D_CMDBUF
+IT  0x00000027 DRAW_INDEX_2
+IT  0x00000028 CONTEXT_CONTROL
+IT  0x00000029 DRAW_INDEX_IMMD_BE
+IT  0x0000002a INDEX_TYPE
+IT  0x0000002b DRAW_INDEX
+IT  0x0000002d DRAW_INDEX_AUTO
+IT  0x0000002e DRAW_INDEX_IMMD
+IT  0x0000002f NUM_INSTANCES
+IT  0x00000032 INDIRECT_BUFFER
+IT  0x00000034 STRMOUT_BUFFER_UPDATE
+IT  0x00000038 INDIRECT_BUFFER_MP
+IT  0x00000039 MEM_SEMAPHORE
+IT  0x0000003a MPEG_INDEX
+IT  0x0000003c WAIT_REG_MEM
+IT  0x0000003d MEM_WRITE
+IT  0x00000040 CP_INTERRUPT
+IT  0x00000043 SURFACE_SYNC
+IT  0x00000044 ME_INITIALIZE
+IT  0x00000045 COND_WRITE
+IT  0x00000046 EVENT_WRITE
+IT  0x00000047 EVENT_WRITE_EOP
+IT  0x00000057 ONE_REG_WRITE
+IT  0x00000068 SET_CONFIG_REG
+IT  0x00000069 SET_CONTEXT_REG
+IT  0x0000006a SET_ALU_CONST
+IT  0x0000006b SET_BOOL_CONST
+IT  0x0000006c SET_LOOP_CONST
+IT  0x0000006d SET_RESOURCE
+IT  0x0000006e SET_SAMPLER
+IT  0x0000006f SET_CTL_CONST
+IT  0x00000073 SURFACE_BASE_UPDATE
+RNG 0x00000103 0x00008000 0x0000ac00 CONFIG
+RNG 0x00000104 0x00028000 0x00029000 CONTEXT
+RNG 0x00000101 0x00030000 0x00032000 ALU_CONST
+RNG 0x0000010b 0x00038000 0x0003c000 TEX_RESOURCE
+RNG 0x0000010c 0x00038000 0x0003c000 VTX_RESOURCE
+RNG 0x00000109 0x0003c000 0x0003cff0 SAMPLER
+RNG 0x00000105 0x0003cff0 0x0003e200 CTL_CONST
+RNG 0x00000106 0x0003e200 0x0003e380 LOOP_CONST
+RNG 0x00000102 0x0003e380 0x0003e38c BOOL_CONST
+REG 0x00000740 0x00000000 0x00000000 32    0    1    0 CG_MULT_THERMAL_STATUS
+FLD 16 0x000003ff 0x00000000 3 ASIC_T
+REG 0x00000e50 0x00000000 0x00000000 32    0    1    0 SRBM_STATUS
+FLD  3 0x00000001 0x00000000 3 RLC_RQ_PENDING
+FLD  4 0x00000001 0x00000000 3 RCU_RQ_PENDING
+FLD  5 0x00000001 0x00000000 3 GRBM_RQ_PENDING
+FLD  6 0x00000001 0x00000000 3 HI_RQ_PENDING
+FLD  7 0x00000001 0x00000000 3 IO_EXTERN_SIGNAL
+FLD  8 0x00000001 0x00000000 3 VMC_BUSY
+FLD  9 0x00000001 0x00000000 3 MCB_BUSY
+FLD 10 0x00000001 0x00000000 3 MCDZ_BUSY
+FLD 11 0x00000001 0x00000000 3 MCDY_BUSY
+FLD 12 0x00000001 0x00000000 3 MCDX_BUSY
+FLD 13 0x00000001 0x00000000 3 MCDW_BUSY
+FLD 14 0x00000001 0x00000000 3 SEM_BUSY
+FLD 15 0x00000001 0x00000000 3 SRBM_STATUS__RLC_BUSY
+FLD 16 0x00000001 0x00000000 3 PDMA_BUSY
+FLD 17 0x00000001 0x00000000 3 IH_BUSY
+FLD 20 0x00000001 0x00000000 3 CSC_BUSY
+FLD 21 0x00000001 0x00000000 3 CMC7_BUSY
+FLD 22 0x00000001 0x00000000 3 CMC6_BUSY
+FLD 23 0x00000001 0x00000000 3 CMC5_BUSY
+FLD 24 0x00000001 0x00000000 3 CMC4_BUSY
+FLD 25 0x00000001 0x00000000 3 CMC3_BUSY
+FLD 26 0x00000001 0x00000000 3 CMC2_BUSY
+FLD 27 0x00000001 0x00000000 3 CMC1_BUSY
+FLD 28 0x00000001 0x00000000 3 CMC0_BUSY
+FLD 29 0x00000001 0x00000000 3 BIF_BUSY
+FLD 30 0x00000001 0x00000000 3 IDCT_BUSY
+REG 0x00000e60 0x00000000 0x00000000 32    0    1    0 SRBM_SOFT_RESET
+FLD  1 0x00000001 0x00000000 3 SOFT_RESET_BIF
+FLD  2 0x00000001 0x00000000 3 SOFT_RESET_CG
+FLD  3 0x00000001 0x00000000 3 SOFT_RESET_CMC
+FLD  4 0x00000001 0x00000000 3 SOFT_RESET_CSC
+FLD  5 0x00000001 0x00000000 3 SOFT_RESET_DC
+FLD  8 0x00000001 0x00000000 3 SOFT_RESET_GRBM
+FLD  9 0x00000001 0x00000000 3 SOFT_RESET_HDP
+FLD 10 0x00000001 0x00000000 3 SOFT_RESET_IH
+FLD 11 0x00000001 0x00000000 3 SOFT_RESET_MC
+FLD 13 0x00000001 0x00000000 3 SOFT_RESET_RLC
+FLD 14 0x00000001 0x00000000 3 SOFT_RESET_ROM
+FLD 15 0x00000001 0x00000000 3 SOFT_RESET_SEM
+FLD 16 0x00000001 0x00000000 3 SOFT_RESET_TSC
+FLD 17 0x00000001 0x00000000 3 SOFT_RESET_VMC
+REG 0x00000e98 0x00000000 0x00000000 32    0    1    0 SRBM_READ_ERROR
+FLD  2 0x0000ffff 0x00000000 3 READ_ADDRESS
+FLD 24 0x00000001 0x00000000 3 READ_REQUESTER_HI
+FLD 25 0x00000001 0x00000000 3 READ_REQUESTER_GRBM
+FLD 26 0x00000001 0x00000000 3 READ_REQUESTER_RCU
+FLD 27 0x00000001 0x00000000 3 READ_REQUESTER_RLC
+FLD 31 0x00000001 0x00000000 3 READ_ERROR
+REG 0x00000ea4 0x00000000 0x00000000 32    0    1    0 SRBM_INT_STATUS
+FLD  0 0x00000001 0x00000000 3 RDERR_INT_STAT
+FLD  1 0x00000001 0x00000000 3 GFX_CNTX_SWITCH_INT_STAT
+REG 0x00000ea8 0x00000000 0x00000000 32    0    1    0 SRBM_INT_ACK
+FLD  0 0x00000001 0x00000000 3 RDERR_INT_ACK
+FLD  1 0x00000001 0x00000000 3 GFX_CNTX_SWITCH_INT_ACK
+REG 0x00001400 0x00000000 0x00000000 32    0    1    0 VM_L2_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L2_CACHE
+FLD  1 0x00000001 0x00000000 3 ENABLE_L2_FRAGMENT_PROCESSING
+FLD  9 0x00000001 0x00000000 3 ENABLE_L2_PTE_CACHE_LRU_UPDATE_BY_WRITE
+FLD 13 0x00000007 0x00000000 3 EFFECTIVE_L2_QUEUE_SIZE
+REG 0x00001404 0x00000000 0x00000000 32    0    1    0 VM_L2_CNTL2
+FLD  0 0x00000001 0x00000000 3 INVALIDATE_ALL_L1_TLBS
+FLD  1 0x00000001 0x00000000 3 INVALIDATE_L2_CACHE
+REG 0x00001408 0x00000000 0x00000000 32    0    1    0 VM_L2_CNTL3
+FLD  0 0x0000001f 0x00000000 3 BANK_SELECT
+FLD  6 0x00000003 0x00000000 3 CACHE_UPDATE_MODE
+REG 0x0000140c 0x00000000 0x00000000 32    0    1    0 VM_L2_STATUS
+FLD  0 0x00000001 0x00000000 3 L2_BUSY
+REG 0x00001410 0x00000000 0x00000000 32    0    1    0 VM_CONTEXT0_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_CONTEXT
+FLD  1 0x00000003 0x00000000 3 PAGE_TABLE_DEPTH
+FLD  4 0x00000001 0x00000000 3 RANGE_PROTECTION_FAULT_ENABLE_DEFAULT
+REG 0x00001518 0x00000000 0x00000000 32    0    1    0 VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR
+REG 0x0000153c 0x00000000 0x00000000 32    0    1    0 VM_CONTEXT0_PAGE_TABLE_BASE_ADDR
+REG 0x0000155c 0x00000000 0x00000000 32    0    1    0 VM_CONTEXT0_PAGE_TABLE_START_ADDR
+REG 0x0000157c 0x00000000 0x00000000 32    0    1    0 VM_CONTEXT0_PAGE_TABLE_END_ADDR
+REG 0x00002004 0x00000000 0x00000000 32    0    1    0 MC_SHARED_CHMAP
+FLD 12 0x00000003 0x00000000 3 NOOFCHAN
+REG 0x00002008 0x00000000 0x00000000 32    0    1    0 MC_SHARED_CHREMAP
+REG 0x00002024 0x00000000 0x00000000 32    0    1    0 MC_VM_FB_LOCATION
+REG 0x00002024 0x00000000 0x00000000 32    0    1    0 MC_VM_FB_LOCATION
+REG 0x00002028 0x00000000 0x00000000 32    0    1    0 MC_VM_AGP_TOP
+REG 0x0000202c 0x00000000 0x00000000 32    0    1    0 MC_VM_AGP_BOT
+REG 0x00002030 0x00000000 0x00000000 32    0    1    0 MC_VM_AGP_BASE
+REG 0x00002034 0x00000000 0x00000000 32    0    1    0 MC_VM_SYSTEM_APERTURE_LOW_ADDR
+REG 0x00002038 0x00000000 0x00000000 32    0    1    0 MC_VM_SYSTEM_APERTURE_HIGH_ADDR
+REG 0x0000203c 0x00000000 0x00000000 32    0    1    0 MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR
+REG 0x00002234 0x00000000 0x00000000 32    0    1    0 MC_VM_MB_L1_TLB0_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  3 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  5 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 18 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x00002238 0x00000000 0x00000000 32    0    1    0 MC_VM_MB_L1_TLB1_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  3 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  5 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 18 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x0000223c 0x00000000 0x00000000 32    0    1    0 MC_VM_MB_L1_TLB2_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  3 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  5 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 18 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x00002240 0x00000000 0x00000000 32    0    1    0 MC_VM_MB_L1_TLB3_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  3 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  5 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 18 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x00002654 0x00000000 0x00000000 32    0    1    0 MC_VM_MD_L1_TLB0_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  3 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  5 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 18 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x00002658 0x00000000 0x00000000 32    0    1    0 MC_VM_MD_L1_TLB1_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  3 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  5 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 18 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x0000265c 0x00000000 0x00000000 32    0    1    0 MC_VM_MD_L1_TLB2_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  3 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  5 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 18 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x00002698 0x00000000 0x00000000 32    0    1    0 MC_VM_MD_L1_TLB3_CNTL
+FLD  0 0x00000001 0x00000000 3 ENABLE_L1_TLB
+FLD  1 0x00000001 0x00000000 3 ENABLE_L1_FRAGMENT_PROCESSING
+FLD  3 0x00000003 0x00000000 3 SYSTEM_ACCESS_MODE
+VAL 0x00000000 SYSTEM_ACCESS_MODE_PA_ONLY
+VAL 0x00000001 SYSTEM_ACCESS_MODE_USE_SYS_MAP
+VAL 0x00000002 SYSTEM_ACCESS_MODE_IN_SYS
+VAL 0x00000003 SYSTEM_ACCESS_MODE_NOT_IN_SYS
+FLD  5 0x00000001 0x00000000 3 SYSTEM_APERTURE_UNMAPPED_ACCESS
+VAL 0x00000000 PASS_THRU
+VAL 0x00000001 DEFAULT_PAGE
+FLD 15 0x00000007 0x00000000 3 EFFECTIVE_L1_TLB_SIZE
+FLD 18 0x00000007 0x00000000 3 EFFECTIVE_L1_QUEUE_SIZE
+REG 0x00002760 0x00000000 0x00000000 32    0    1    0 MC_ARB_RAMCFG
+FLD  0 0x00000003 0x00000000 3 NOOFBANK
+FLD  2 0x00000001 0x00000000 3 NOOFRANK
+FLD  3 0x00000007 0x00000000 3 NOOFROWS
+FLD  6 0x00000003 0x00000000 3 NOOFCOLS
+FLD  8 0x00000001 0x00000000 3 CHANSIZE
+FLD  9 0x00000001 0x00000000 3 BURSTLENGTH
+FLD 11 0x00000001 0x00000000 3 CHANSIZE_OVERRIDE
+REG 0x00003f88 0x00000000 0x00000000 32    0    1    0 CC_SYS_RB_BACKEND_DISABLE
+REG 0x00003f90 0x00000000 0x00000000 32    0    1    0 CGTS_SYS_TCC_DISABLE
+REG 0x00003f94 0x00000000 0x00000000 32    0    1    0 CGTS_USER_SYS_TCC_DISABLE
+REG 0x00004000 0x00000000 0x00000000 32    0    1    0 VENDOR_DEVICE_ID
+REG 0x00005428 0x00000000 0x00000000 32    0    1    0 CONFIG_MEMSIZE
+REG 0x0000544c 0x00000000 0x00000000 32    0    1    0 MM_CFGREGS_CNTL
+FLD  3 0x00000001 0x00000000 3 MM_WR_TO_CFG_EN
+REG 0x00005480 0x00000000 0x00000000 32    0    1    0 HDP_MEM_COHERENCY_FLUSH_CNTL
+REG 0x00006ca0 0x00000000 0x00000000 32    0    1    0 DCP_TILING_CONFIG
+FLD  1 0x00000007 0x00000000 3 PIPE_TILING
+FLD  4 0x00000003 0x00000000 3 BANK_TILING
+FLD  6 0x00000003 0x00000000 3 GROUP_SIZE
+FLD  8 0x00000007 0x00000000 3 ROW_TILING
+FLD 11 0x00000007 0x00000000 3 BANK_SWAPS
+FLD 14 0x00000003 0x00000000 3 SAMPLE_SPLIT
+FLD 16 0x0000ffff 0x00000000 3 BACKEND_MAP
+REG 0x00008000 0x00000000 0x00000000 32    0    1    0 GRBM_CNTL
+FLD  0 0x000000ff 0x00000000 3 GRBM_READ_TIMEOUT
+REG 0x00008010 0x00000000 0x00000000 32    0    1    0 GRBM_STATUS
+FLD  0 0x0000001f 0x00000000 3 CMDFIFO_AVAIL
+FLD  5 0x00000001 0x00000000 3 SRBM_RQ_PENDING
+FLD  6 0x00000001 0x00000000 3 CP_RQ_PENDING
+FLD  7 0x00000001 0x00000000 3 CF_RQ_PENDING
+FLD  8 0x00000001 0x00000000 3 PF_RQ_PENDING
+FLD 10 0x00000001 0x00000000 3 GRBM_EE_BUSY
+FLD 11 0x00000001 0x00000000 3 GRBM_STATUS__VC_BUSY
+FLD 12 0x00000001 0x00000000 3 DB03_CLEAN
+FLD 13 0x00000001 0x00000000 3 CB03_CLEAN
+FLD 14 0x00000001 0x00000000 3 TA03_BUSY
+FLD 16 0x00000001 0x00000000 3 VGT_BUSY_NO_DMA
+FLD 17 0x00000001 0x00000000 3 GRBM_STATUS__VGT_BUSY
+FLD 19 0x00000001 0x00000000 3 GRBM_STATUS__TC_BUSY
+FLD 20 0x00000001 0x00000000 3 SX_BUSY
+FLD 21 0x00000001 0x00000000 3 SH_BUSY
+FLD 22 0x00000001 0x00000000 3 SPI03_BUSY
+FLD 23 0x00000001 0x00000000 3 SMX_BUSY
+FLD 24 0x00000001 0x00000000 3 SC_BUSY
+FLD 25 0x00000001 0x00000000 3 PA_BUSY
+FLD 26 0x00000001 0x00000000 3 DB03_BUSY
+FLD 27 0x00000001 0x00000000 3 CR_BUSY
+FLD 28 0x00000001 0x00000000 3 CP_COHERENCY_BUSY
+FLD 29 0x00000001 0x00000000 3 GRBM_STATUS__CP_BUSY
+FLD 30 0x00000001 0x00000000 3 CB03_BUSY
+FLD 31 0x00000001 0x00000000 3 GUI_ACTIVE
+REG 0x00008014 0x00000000 0x00000000 32    0    1    0 GRBM_STATUS2
+FLD  0 0x00000001 0x00000000 3 CR_CLEAN
+FLD  1 0x00000001 0x00000000 3 SMX_CLEAN
+FLD  8 0x00000001 0x00000000 3 SPI0_BUSY
+FLD  9 0x00000001 0x00000000 3 SPI1_BUSY
+FLD 10 0x00000001 0x00000000 3 SPI2_BUSY
+FLD 11 0x00000001 0x00000000 3 SPI3_BUSY
+FLD 12 0x00000001 0x00000000 3 TA0_BUSY
+FLD 13 0x00000001 0x00000000 3 TA1_BUSY
+FLD 14 0x00000001 0x00000000 3 TA2_BUSY
+FLD 15 0x00000001 0x00000000 3 TA3_BUSY
+FLD 16 0x00000001 0x00000000 3 DB0_BUSY
+FLD 17 0x00000001 0x00000000 3 DB1_BUSY
+FLD 18 0x00000001 0x00000000 3 DB2_BUSY
+FLD 19 0x00000001 0x00000000 3 DB3_BUSY
+FLD 20 0x00000001 0x00000000 3 CB0_BUSY
+FLD 21 0x00000001 0x00000000 3 CB1_BUSY
+FLD 22 0x00000001 0x00000000 3 CB2_BUSY
+FLD 23 0x00000001 0x00000000 3 CB3_BUSY
+REG 0x00008020 0x00000000 0x00000000 32    0    1    0 GRBM_SOFT_RESET
+FLD  0 0x00000001 0x00000000 3 SOFT_RESET_CP
+FLD  1 0x00000001 0x00000000 3 SOFT_RESET_CB
+FLD  2 0x00000001 0x00000000 3 SOFT_RESET_CR
+FLD  3 0x00000001 0x00000000 3 SOFT_RESET_DB
+FLD  5 0x00000001 0x00000000 3 SOFT_RESET_PA
+FLD  6 0x00000001 0x00000000 3 SOFT_RESET_SC
+FLD  7 0x00000001 0x00000000 3 SOFT_RESET_SMX
+FLD  8 0x00000001 0x00000000 3 SOFT_RESET_SPI
+FLD  9 0x00000001 0x00000000 3 SOFT_RESET_SH
+FLD 10 0x00000001 0x00000000 3 SOFT_RESET_SX
+FLD 11 0x00000001 0x00000000 3 SOFT_RESET_TC
+FLD 12 0x00000001 0x00000000 3 SOFT_RESET_TA
+FLD 13 0x00000001 0x00000000 3 SOFT_RESET_VC
+FLD 14 0x00000001 0x00000000 3 SOFT_RESET_VGT
+FLD 15 0x00000001 0x00000000 3 SOFT_RESET_GRBM_GCA
+REG 0x00008040 0x00000000 0x00000000 32    0    1    0 WAIT_UNTIL
+FLD  8 0x00000001 0x00000000 3 WAIT_CP_DMA_IDLE
+FLD 10 0x00000001 0x00000000 3 WAIT_CMDFIFO
+FLD 14 0x00000001 0x00000000 3 WAIT_2D_IDLE
+FLD 15 0x00000001 0x00000000 3 WAIT_3D_IDLE
+FLD 16 0x00000001 0x00000000 3 WAIT_2D_IDLECLEAN
+FLD 17 0x00000001 0x00000000 3 WAIT_3D_IDLECLEAN
+FLD 19 0x00000001 0x00000000 3 WAIT_EXTERN_SIG
+FLD 20 0x0000001f 0x00000000 3 CMDFIFO_ENTRIES
+REG 0x00008058 0x00000000 0x00000000 32    0    1    0 GRBM_READ_ERROR
+FLD  2 0x0000ffff 0x00000000 3 READ_ADDRESS
+FLD 28 0x00000001 0x00000000 3 READ_REQUESTER_SRBM
+FLD 29 0x00000001 0x00000000 3 READ_REQUESTER_CP
+FLD 30 0x00000001 0x00000000 3 READ_REQUESTER_WU_POLL
+FLD 31 0x00000001 0x00000000 3 READ_ERROR
+REG 0x00008500 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG0
+REG 0x00008500 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG0
+REG 0x00008504 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG1
+REG 0x00008504 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG1
+REG 0x00008508 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG2
+REG 0x00008508 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG2
+REG 0x0000850c 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG3
+REG 0x0000850c 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG3
+REG 0x00008510 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG4
+REG 0x00008510 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG4
+REG 0x00008514 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG5
+REG 0x00008514 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG5
+REG 0x00008518 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG6
+REG 0x00008518 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG6
+REG 0x0000851c 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG7
+REG 0x0000851c 0x00000000 0x00000000 32    0    1    0 SCRATCH_REG7
+REG 0x00008540 0x00000000 0x00000000 32    0    1    0 SCRATCH_UMSK
+REG 0x00008540 0x00000000 0x00000000 32    0    1    0 SCRATCH_UMSK
+REG 0x00008544 0x00000000 0x00000000 32    0    1    0 SCRATCH_ADDR
+REG 0x00008544 0x00000000 0x00000000 32    0    1    0 SCRATCH_ADDR
+REG 0x000085bc 0x00000000 0x00000000 32    0    1    0 CP_SEM_WAIT_TIMER
+REG 0x000085f0 0x00000000 0x00000000 32    0    1    0 CP_COHER_CNTL
+FLD  0 0x00000001 0x00000000 3 DEST_BASE_0_ENA
+FLD  1 0x00000001 0x00000000 3 DEST_BASE_1_ENA
+FLD  2 0x00000001 0x00000000 3 SO0_DEST_BASE_ENA
+FLD  3 0x00000001 0x00000000 3 SO1_DEST_BASE_ENA
+FLD  4 0x00000001 0x00000000 3 SO2_DEST_BASE_ENA
+FLD  5 0x00000001 0x00000000 3 SO3_DEST_BASE_ENA
+FLD  6 0x00000001 0x00000000 3 CB0_DEST_BASE_ENA
+FLD  7 0x00000001 0x00000000 3 CB1_DEST_BASE_ENA
+FLD  8 0x00000001 0x00000000 3 CB2_DEST_BASE_ENA
+FLD  9 0x00000001 0x00000000 3 CB3_DEST_BASE_ENA
+FLD 10 0x00000001 0x00000000 3 CB4_DEST_BASE_ENA
+FLD 11 0x00000001 0x00000000 3 CB5_DEST_BASE_ENA
+FLD 12 0x00000001 0x00000000 3 CB6_DEST_BASE_ENA
+FLD 13 0x00000001 0x00000000 3 CB7_DEST_BASE_ENA
+FLD 14 0x00000001 0x00000000 3 DB_DEST_BASE_ENA
+FLD 15 0x00000001 0x00000000 3 CR_DEST_BASE_ENA
+FLD 23 0x00000001 0x00000000 3 TC_ACTION_ENA
+FLD 24 0x00000001 0x00000000 3 VC_ACTION_ENA
+FLD 25 0x00000001 0x00000000 3 CB_ACTION_ENA
+FLD 26 0x00000001 0x00000000 3 DB_ACTION_ENA
+FLD 27 0x00000001 0x00000000 3 SH_ACTION_ENA
+FLD 28 0x00000001 0x00000000 3 SMX_ACTION_ENA
+FLD 29 0x00000001 0x00000000 3 CR0_ACTION_ENA
+FLD 30 0x00000001 0x00000000 3 CR1_ACTION_ENA
+FLD 31 0x00000001 0x00000000 3 CR2_ACTION_ENA
+REG 0x000085f4 0x00000000 0x00000000 32    0    1    0 CP_COHER_SIZE
+REG 0x000085f8 0x00000000 0x00000000 32    0    1    0 CP_COHER_BASE
+REG 0x000085fc 0x00000000 0x00000000 32    0    1    0 CP_COHER_STATUS
+FLD  0 0x000000ff 0x00000000 3 MATCHING_GFX_CNTX
+FLD  8 0x0000ffff 0x00000000 3 MATCHING_CR_CNTX
+FLD 31 0x00000001 0x00000000 3 STATUS
+REG 0x00008674 0x00000000 0x00000000 32    0    1    0 CP_STALLED_STAT1
+FLD  0 0x00000001 0x00000000 3 RBIU_TO_DMA_NOT_RDY_TO_RCV
+FLD  1 0x00000001 0x00000000 3 RBIU_TO_IBS_NOT_RDY_TO_RCV
+FLD  2 0x00000001 0x00000000 3 RBIU_TO_SEM_NOT_RDY_TO_RCV
+FLD  3 0x00000001 0x00000000 3 RBIU_TO_2DREGS_NOT_RDY_TO_RCV
+FLD  4 0x00000001 0x00000000 3 RBIU_TO_MEMWR_NOT_RDY_TO_RCV
+FLD  5 0x00000001 0x00000000 3 RBIU_TO_MEMRD_NOT_RDY_TO_RCV
+FLD  6 0x00000001 0x00000000 3 RBIU_TO_EOPD_NOT_RDY_TO_RCV
+FLD  7 0x00000001 0x00000000 3 RBIU_TO_RECT_NOT_RDY_TO_RCV
+FLD  8 0x00000001 0x00000000 3 RBIU_TO_STRMO_NOT_RDY_TO_RCV
+FLD  9 0x00000001 0x00000000 3 RBIU_TO_PSTAT_NOT_RDY_TO_RCV
+FLD 16 0x00000001 0x00000000 3 MIU_WAITING_ON_RDREQ_FREE
+FLD 17 0x00000001 0x00000000 3 MIU_WAITING_ON_WRREQ_FREE
+FLD 18 0x00000001 0x00000000 3 MIU_NEEDS_AVAIL_WRREQ_PHASE
+FLD 24 0x00000001 0x00000000 3 RCIU_WAITING_ON_GRBM_FREE
+FLD 25 0x00000001 0x00000000 3 RCIU_WAITING_ON_VGT_FREE
+FLD 26 0x00000001 0x00000000 3 RCIU_STALLED_ON_ME_READ
+FLD 27 0x00000001 0x00000000 3 RCIU_STALLED_ON_DMA_READ
+FLD 28 0x00000001 0x00000000 3 RCIU_HALTED_BY_REG_VIOLATION
+REG 0x00008678 0x00000000 0x00000000 32    0    1    0 CP_STALLED_STAT2
+FLD  0 0x00000001 0x00000000 3 PFP_TO_CSF_NOT_RDY_TO_RCV
+FLD  1 0x00000001 0x00000000 3 PFP_TO_MEQ_NOT_RDY_TO_RCV
+FLD  2 0x00000001 0x00000000 3 PFP_TO_VGT_NOT_RDY_TO_RCV
+FLD  3 0x00000001 0x00000000 3 PFP_HALTED_BY_INSTR_VIOLATION
+FLD  4 0x00000001 0x00000000 3 MULTIPASS_IB_PENDING_IN_PFP
+FLD  8 0x00000001 0x00000000 3 ME_BRUSH_WC_NOT_RDY_TO_RCV
+FLD  9 0x00000001 0x00000000 3 ME_STALLED_ON_BRUSH_LOGIC
+FLD 10 0x00000001 0x00000000 3 CR_CNTX_NOT_AVAIL_TO_ME
+FLD 11 0x00000001 0x00000000 3 GFX_CNTX_NOT_AVAIL_TO_ME
+FLD 12 0x00000001 0x00000000 3 ME_RCIU_NOT_RDY_TO_RCV
+FLD 13 0x00000001 0x00000000 3 ME_TO_CONST_NOT_RDY_TO_RCV
+FLD 14 0x00000001 0x00000000 3 ME_WAITING_DATA_FROM_PFP
+FLD 15 0x00000001 0x00000000 3 ME_WAITING_ON_PARTIAL_FLUSH
+FLD 16 0x00000001 0x00000000 3 RECT_FIFO_NEEDS_CR_RECT_DONE
+FLD 17 0x00000001 0x00000000 3 RECT_FIFO_NEEDS_WR_CONFIRM
+FLD 18 0x00000001 0x00000000 3 EOPD_FIFO_NEEDS_SC_EOP_DONE
+FLD 19 0x00000001 0x00000000 3 EOPD_FIFO_NEEDS_SMX_EOP_DONE
+FLD 20 0x00000001 0x00000000 3 EOPD_FIFO_NEEDS_WR_CONFIRM
+FLD 21 0x00000001 0x00000000 3 EOPD_FIFO_NEEDS_SIGNAL_SEM
+FLD 22 0x00000001 0x00000000 3 SO_NUMPRIM_FIFO_NEEDS_SOADDR
+FLD 23 0x00000001 0x00000000 3 SO_NUMPRIM_FIFO_NEEDS_NUMPRIM
+FLD 24 0x00000001 0x00000000 3 PIPE_STATS_FIFO_NEEDS_SAMPLE
+FLD 30 0x00000001 0x00000000 3 SURF_SYNC_NEEDS_IDLE_CNTXS
+FLD 31 0x00000001 0x00000000 3 SURF_SYNC_NEEDS_ALL_CLEAN
+REG 0x0000867c 0x00000000 0x00000000 32    0    1    0 CP_BUSY_STAT
+FLD  0 0x00000001 0x00000000 3 REG_BUS_FIFO_BUSY
+FLD  1 0x00000001 0x00000000 3 RING_FETCHING_DATA
+FLD  2 0x00000001 0x00000000 3 INDR1_FETCHING_DATA
+FLD  3 0x00000001 0x00000000 3 INDR2_FETCHING_DATA
+FLD  4 0x00000001 0x00000000 3 STATE_FETCHING_DATA
+FLD  5 0x00000001 0x00000000 3 PRED_FETCHING_DATA
+FLD  6 0x00000001 0x00000000 3 COHER_CNTR_NEQ_ZERO
+FLD  7 0x00000001 0x00000000 3 PFP_PARSING_PACKETS
+FLD  8 0x00000001 0x00000000 3 ME_PARSING_PACKETS
+FLD  9 0x00000001 0x00000000 3 RCIU_PFP_BUSY
+FLD 10 0x00000001 0x00000000 3 RCIU_ME_BUSY
+FLD 11 0x00000001 0x00000000 3 OUTSTANDING_READ_TAGS
+FLD 12 0x00000001 0x00000000 3 SEM_CMDFIFO_NOT_EMPTY
+FLD 13 0x00000001 0x00000000 3 SEM_FAILED_AND_HOLDING
+FLD 14 0x00000001 0x00000000 3 SEM_POLLING_FOR_PASS
+FLD 15 0x00000001 0x00000000 3 X_3D_BUSY
+FLD 16 0x00000001 0x00000000 3 X_2D_BUSY
+REG 0x00008680 0x00000000 0x00000000 32    0    1    0 CP_STAT
+FLD  0 0x00000001 0x00000000 3 CSF_RING_BUSY
+FLD  1 0x00000001 0x00000000 3 CSF_WPTR_POLL_BUSY
+FLD  2 0x00000001 0x00000000 3 CSF_INDIRECT1_BUSY
+FLD  3 0x00000001 0x00000000 3 CSF_INDIRECT2_BUSY
+FLD  4 0x00000001 0x00000000 3 CSF_STATE_BUSY
+FLD  5 0x00000001 0x00000000 3 CSF_PREDICATE_BUSY
+FLD  6 0x00000001 0x00000000 3 CSF_BUSY
+FLD  7 0x00000001 0x00000000 3 MIU_RDREQ_BUSY
+FLD  8 0x00000001 0x00000000 3 MIU_WRREQ_BUSY
+FLD  9 0x00000001 0x00000000 3 ROQ_RING_BUSY
+FLD 10 0x00000001 0x00000000 3 ROQ_INDIRECT1_BUSY
+FLD 11 0x00000001 0x00000000 3 ROQ_INDIRECT2_BUSY
+FLD 12 0x00000001 0x00000000 3 ROQ_STATE_BUSY
+FLD 13 0x00000001 0x00000000 3 ROQ_PREDICATE_BUSY
+FLD 14 0x00000001 0x00000000 3 ROQ_ALIGN_BUSY
+FLD 15 0x00000001 0x00000000 3 PFP_BUSY
+FLD 16 0x00000001 0x00000000 3 MEQ_BUSY
+FLD 17 0x00000001 0x00000000 3 ME_BUSY
+FLD 18 0x00000001 0x00000000 3 QUERY_BUSY
+FLD 19 0x00000001 0x00000000 3 SEMAPHORE_BUSY
+FLD 20 0x00000001 0x00000000 3 INTERRUPT_BUSY
+FLD 21 0x00000001 0x00000000 3 SURFACE_SYNC_BUSY
+FLD 22 0x00000001 0x00000000 3 DMA_BUSY
+FLD 23 0x00000001 0x00000000 3 RCIU_BUSY
+FLD 31 0x00000001 0x00000000 3 CP_STAT__CP_BUSY
+REG 0x000086d8 0x00000000 0x00000000 32    0    1    0 CP_ME_CNTL
+FLD  0 0x000000ff 0x00000000 3 ME_STATMUX
+FLD 26 0x00000001 0x00000000 3 CP_PFP_HALT
+FLD 28 0x00000001 0x00000000 3 ME_HALT
+REG 0x000086dc 0x00000000 0x00000000 32    0    1    0 CP_ME_STATUS
+REG 0x00008700 0x00000000 0x00000000 32    0    1    0 CP_RB_RPTR
+FLD  0 0x000fffff 0x00000000 3 RB_RPTR
+REG 0x00008704 0x00000000 0x00000000 32    0    1    0 CP_RB_WPTR_DELAY
+FLD  0 0x0fffffff 0x00000000 3 PRE_WRITE_TIMER
+FLD 28 0x0000000f 0x00000000 3 PRE_WRITE_LIMIT
+REG 0x00008760 0x00000000 0x00000000 32    0    1    0 CP_QUEUE_THRESHOLDS
+FLD  0 0x0000003f 0x00000000 3 ROQ_IB1_START
+FLD  8 0x0000003f 0x00000000 3 ROQ_IB2_START
+REG 0x00008764 0x00000000 0x00000000 32    0    1    0 CP_MEQ_THRESHOLDS
+FLD  0 0x0000007f 0x00000000 3 STQ_SPILT
+REG 0x00008780 0x00000000 0x00000000 32    0    1    0 CP_ROQ_RB_STAT
+FLD  0 0x000003ff 0x00000000 3 ROQ_RPTR_PRIMARY
+FLD 16 0x000003ff 0x00000000 3 ROQ_WPTR_PRIMARY
+REG 0x00008784 0x00000000 0x00000000 32    0    1    0 CP_ROQ_IB1_STAT
+FLD  0 0x000003ff 0x00000000 3 ROQ_RPTR_INDIRECT1
+FLD 16 0x000003ff 0x00000000 3 ROQ_WPTR_INDIRECT1
+REG 0x00008788 0x00000000 0x00000000 32    0    1    0 CP_ROQ_IB2_STAT
+FLD  0 0x000003ff 0x00000000 3 ROQ_RPTR_INDIRECT2
+FLD 16 0x000003ff 0x00000000 3 ROQ_WPTR_INDIRECT2
+REG 0x00008794 0x00000000 0x00000000 32    0    1    0 CP_MEQ_STAT
+FLD  0 0x000003ff 0x00000000 3 MEQ_RPTR
+FLD 16 0x000003ff 0x00000000 3 MEQ_WPTR
+REG 0x000087fc 0x00000000 0x00000000 32    0    1    0 CP_PERFMON_CNTL
+REG 0x000088b0 0x00000000 0x00000010 32    0    1    0 VGT_VTX_VECT_EJECT_REG
+FLD  0 0x000003ff 0x00000000 3 PRIM_COUNT
+REG 0x000088c0 0x00000000 0x00000010 32    0    1    0 VGT_LAST_COPY_STATE
+FLD  0 0x00000007 0x00000000 3 SRC_STATE_ID
+FLD 16 0x00000007 0x00000000 3 DST_STATE_ID
+REG 0x000088c4 0x00000000 0x00000010 32    0    1    0 VGT_CACHE_INVALIDATION
+FLD  0 0x00000003 0x00000000 3 CACHE_INVALIDATION
+VAL 0x00000000 VC_ONLY
+VAL 0x00000001 TC_ONLY
+VAL 0x00000002 VC_AND_TC
+FLD  5 0x00000001 0x00000000 3 VS_NO_EXTRA_BUFFER
+FLD  6 0x00000003 0x00000000 3 AUTO_INVLD_EN
+VAL 0x00000000 NO_AUTO
+VAL 0x00000001 ES_AUTO
+VAL 0x00000002 GS_AUTO
+VAL 0x00000003 ES_AND_GS_AUTO
+REG 0x000088c8 0x00000000 0x00000010 32    0    1    0 VGT_GS_PER_ES
+REG 0x000088cc 0x00000000 0x00000010 32    0    1    0 VGT_ES_PER_GS
+REG 0x000088d4 0x00000000 0x00000010 32    0    1    0 VGT_GS_VERTEX_REUSE
+FLD  0 0x0000001f 0x00000000 3 VERT_REUSE
+REG 0x000088d8 0x00000000 0x00000010 32    0    1    0 VGT_MC_LAT_CNTL
+FLD  0 0x00000003 0x00000000 3 MC_TIME_STAMP_RES
+VAL 0x00000000 X_0_992_MAX_LATENCY
+VAL 0x00000001 X_0_496_MAX_LATENCY
+VAL 0x00000002 X_0_248_MAX_LATENCY
+VAL 0x00000003 X_0_124_MAX_LATENCY
+REG 0x000088e8 0x00000000 0x00000010 32    0    1    0 VGT_GS_PER_VS
+FLD  0 0x0000000f 0x00000000 3 GS_PER_VS
+REG 0x000088f0 0x00000000 0x00000010 32    0    1    0 VGT_CNTL_STATUS
+FLD  0 0x00000001 0x00000000 3 VGT_OUT_INDX_BUSY
+FLD  1 0x00000001 0x00000000 3 VGT_OUT_BUSY
+FLD  2 0x00000001 0x00000000 3 VGT_PT_BUSY
+FLD  3 0x00000001 0x00000000 3 VGT_TE_BUSY
+FLD  4 0x00000001 0x00000000 3 VGT_VR_BUSY
+FLD  5 0x00000001 0x00000000 3 VGT_GRP_BUSY
+FLD  6 0x00000001 0x00000000 3 VGT_DMA_REQ_BUSY
+FLD  7 0x00000001 0x00000000 3 VGT_DMA_BUSY
+FLD  8 0x00000001 0x00000000 3 VGT_GS_BUSY
+FLD  9 0x00000001 0x00000000 3 VGT_BUSY
+REG 0x00008950 0x00000000 0x00000000 32    0    1    0 CC_GC_SHADER_PIPE_CONFIG
+REG 0x00008954 0x00000000 0x00000000 32    0    1    0 GC_USER_SHADER_PIPE_CONFIG
+FLD  8 0x000000ff 0x00000000 3 INACTIVE_QD_PIPES
+FLD 16 0x000000ff 0x00000000 3 INACTIVE_SIMDS
+REG 0x00008958 0x00000000 0x00000010 32    0    1    0 VGT_PRIMITIVE_TYPE
+FLD  0 0x0000003f 0x00000000 3 PRIM_TYPE
+VAL 0x00000000 DI_PT_NONE
+VAL 0x00000001 DI_PT_POINTLIST
+VAL 0x00000002 DI_PT_LINELIST
+VAL 0x00000003 DI_PT_LINESTRIP
+VAL 0x00000004 DI_PT_TRILIST
+VAL 0x00000005 DI_PT_TRIFAN
+VAL 0x00000006 DI_PT_TRISTRIP
+VAL 0x00000007 DI_PT_UNUSED_0
+VAL 0x00000008 DI_PT_UNUSED_1
+VAL 0x00000009 DI_PT_UNUSED_2
+VAL 0x0000000a DI_PT_LINELIST_ADJ
+VAL 0x0000000b DI_PT_LINESTRIP_ADJ
+VAL 0x0000000c DI_PT_TRILIST_ADJ
+VAL 0x0000000d DI_PT_TRISTRIP_ADJ
+VAL 0x0000000e DI_PT_UNUSED_3
+VAL 0x0000000f DI_PT_UNUSED_4
+VAL 0x00000010 DI_PT_TRI_WITH_WFLAGS
+VAL 0x00000011 DI_PT_RECTLIST
+VAL 0x00000012 DI_PT_LINELOOP
+VAL 0x00000013 DI_PT_QUADLIST
+VAL 0x00000014 DI_PT_QUADSTRIP
+VAL 0x00000015 DI_PT_POLYGON
+VAL 0x00000016 DI_PT_2D_COPY_RECT_LIST_V0
+VAL 0x00000017 DI_PT_2D_COPY_RECT_LIST_V1
+VAL 0x00000018 DI_PT_2D_COPY_RECT_LIST_V2
+VAL 0x00000019 DI_PT_2D_COPY_RECT_LIST_V3
+VAL 0x0000001a DI_PT_2D_FILL_RECT_LIST
+VAL 0x0000001b DI_PT_2D_LINE_STRIP
+VAL 0x0000001c DI_PT_2D_TRI_STRIP
+REG 0x0000895c 0x00000000 0x00000010 32    0    1    0 VGT_INDEX_TYPE
+FLD  0 0x00000003 0x00000000 3 INDEX_TYPE
+VAL 0x00000000 DI_INDEX_SIZE_16_BIT
+VAL 0x00000001 DI_INDEX_SIZE_32_BIT
+REG 0x00008960 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_FILLED_SIZE_0
+REG 0x00008964 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_FILLED_SIZE_1
+REG 0x00008968 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_FILLED_SIZE_2
+REG 0x0000896c 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_FILLED_SIZE_3
+REG 0x00008970 0x00000000 0x00000010 32    0    1    0 VGT_NUM_INDICES
+REG 0x00008974 0x00000000 0x00000010 32    0    1    0 VGT_NUM_INSTANCES
+REG 0x00008a10 0x00000000 0x00000006 32    0    1    0 PA_CL_CNTL_STATUS
+FLD 31 0x00000001 0x00000000 3 CL_BUSY
+REG 0x00008a14 0x00000000 0x00000006 32    0    1    0 PA_CL_ENHANCE
+FLD  0 0x00000001 0x00000000 3 CLIP_VTX_REORDER_ENA
+FLD  1 0x00000003 0x00000000 3 NUM_CLIP_SEQ
+FLD  3 0x00000001 0x00000000 3 CLIPPED_PRIM_SEQ_STALL
+FLD  4 0x00000001 0x00000000 3 VE_NAN_PROC_DISABLE
+REG 0x00008a50 0x00000000 0x00000006 32    0    1    0 PA_SU_CNTL_STATUS
+FLD 31 0x00000001 0x00000000 3 SU_BUSY
+REG 0x00008b10 0x00000000 0x00000006 32    0    1    0 PA_SC_LINE_STIPPLE_STATE
+FLD  0 0x0000000f 0x00000000 3 CURRENT_PTR
+FLD  8 0x000000ff 0x00000000 3 CURRENT_COUNT
+REG 0x00008b20 0x00000000 0x00000006 32    0    1    0 PA_SC_MULTI_CHIP_CNTL
+FLD  0 0x00000007 0x00000000 3 LOG2_NUM_CHIPS
+FLD  3 0x00000003 0x00000000 3 MULTI_CHIP_TILE_SIZE
+VAL 0x00000000 X_16_X_16_PIXEL_TILE_PER_CHIP
+VAL 0x00000001 X_32_X_32_PIXEL_TILE_PER_CHIP
+VAL 0x00000002 X_64_X_64_PIXEL_TILE_PER_CHIP
+VAL 0x00000003 X_128X128_PIXEL_TILE_PER_CHIP
+FLD  5 0x00000007 0x00000000 3 CHIP_TILE_X_LOC
+FLD  8 0x00000007 0x00000000 3 CHIP_TILE_Y_LOC
+FLD 11 0x00000001 0x00000000 3 CHIP_SUPER_TILE_B
+REG 0x00008b24 0x00000000 0x00000000 32    0    1    0 PA_SC_FORCE_EOV_MAX_CNTS
+FLD  0 0x00000fff 0x00000000 3 FORCE_EOV_MAX_CLK_CNT
+FLD 16 0x000000ff 0x00000000 3 FORCE_EOV_MAX_REZ_CNT
+REG 0x00008b40 0x00000000 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_2S
+FLD  0 0x0000000f 0x00000000 3 S0_X
+FLD  4 0x0000000f 0x00000000 3 S0_Y
+FLD  8 0x0000000f 0x00000000 3 S1_X
+FLD 12 0x0000000f 0x00000000 3 S1_Y
+REG 0x00008b44 0x00000000 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_4S
+FLD  0 0x0000000f 0x00000000 3 S0_X
+FLD  4 0x0000000f 0x00000000 3 S0_Y
+FLD  8 0x0000000f 0x00000000 3 S1_X
+FLD 12 0x0000000f 0x00000000 3 S1_Y
+FLD 16 0x0000000f 0x00000000 3 S2_X
+FLD 20 0x0000000f 0x00000000 3 S2_Y
+FLD 24 0x0000000f 0x00000000 3 S3_X
+FLD 28 0x0000000f 0x00000000 3 S3_Y
+REG 0x00008b48 0x00000000 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_8S_WD0
+FLD  0 0x0000000f 0x00000000 3 S0_X
+FLD  4 0x0000000f 0x00000000 3 S0_Y
+FLD  8 0x0000000f 0x00000000 3 S1_X
+FLD 12 0x0000000f 0x00000000 3 S1_Y
+FLD 16 0x0000000f 0x00000000 3 S2_X
+FLD 20 0x0000000f 0x00000000 3 S2_Y
+FLD 24 0x0000000f 0x00000000 3 S3_X
+FLD 28 0x0000000f 0x00000000 3 S3_Y
+REG 0x00008b4c 0x00000000 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_8S_WD1
+FLD  0 0x0000000f 0x00000000 3 S4_X
+FLD  4 0x0000000f 0x00000000 3 S4_Y
+FLD  8 0x0000000f 0x00000000 3 S5_X
+FLD 12 0x0000000f 0x00000000 3 S5_Y
+FLD 16 0x0000000f 0x00000000 3 S6_X
+FLD 20 0x0000000f 0x00000000 3 S6_Y
+FLD 24 0x0000000f 0x00000000 3 S7_X
+FLD 28 0x0000000f 0x00000000 3 S7_Y
+REG 0x00008bcc 0x00000000 0x00000000 32    0    1    0 PA_SC_FIFO_SIZE
+FLD  0 0x000001ff 0x00000000 3 SC_PRIM_FIFO_SIZE
+FLD 12 0x000000ff 0x00000000 3 SC_HIZ_TILE_FIFO_SIZE
+FLD 20 0x000001ff 0x00000000 3 SC_EARLYZ_TILE_FIFO_SIZE
+REG 0x00008be0 0x00000000 0x00000006 32    0    1    0 PA_SC_CNTL_STATUS
+FLD 30 0x00000001 0x00000000 3 MPASS_OVERFLOW
+REG 0x00008bf0 0x00000000 0x00000006 32    0    1    0 PA_SC_ENHANCE
+FLD  0 0x00000fff 0x00000000 3 FORCE_EOV_MAX_CLK_CNT
+FLD 12 0x00000fff 0x00000000 3 FORCE_EOV_MAX_TILE_CNT
+REG 0x00008c00 0x00000000 0x0000000c 32    0    1    0 SQ_CONFIG
+FLD  0 0x00000001 0x00000000 3 VC_ENABLE
+FLD  1 0x00000001 0x00000000 3 EXPORT_SRC_C
+FLD  2 0x00000001 0x00000000 3 DX9_CONSTS
+FLD  3 0x00000001 0x00000000 3 ALU_INST_PREFER_VECTOR
+FLD  4 0x00000001 0x00000000 3 DX10_CLAMP
+FLD  5 0x00000001 0x00000000 3 ALU_PREFER_ONE_WATERFALL
+FLD  6 0x00000001 0x00000000 3 ALU_MAX_ONE_WATERFALL
+FLD  8 0x00000003 0x00000000 3 CLAUSE_SEQ_PRIO
+FLD 24 0x00000003 0x00000000 3 PS_PRIO
+FLD 24 0x00000003 0x00000000 3 PS_PRIO
+FLD 26 0x00000003 0x00000000 3 VS_PRIO
+FLD 26 0x00000003 0x00000000 3 VS_PRIO
+FLD 28 0x00000003 0x00000000 3 GS_PRIO
+FLD 28 0x00000003 0x00000000 3 GS_PRIO
+FLD 30 0x00000003 0x00000000 3 ES_PRIO
+VAL 0x00000000 SQ_CL_PRIO_RND_ROBIN
+VAL 0x00000001 SQ_CL_PRIO_MACRO_SEQ
+VAL 0x00000002 SQ_CL_PRIO_NONE
+FLD 30 0x00000003 0x00000000 3 ES_PRIO
+REG 0x00008c04 0x00000000 0x0000000c 32    0    1    0 SQ_GPR_RESOURCE_MGMT_1
+FLD  0 0x000000ff 0x00000000 3 NUM_PS_GPRS
+FLD 16 0x000000ff 0x00000000 3 NUM_VS_GPRS
+FLD 28 0x0000000f 0x00000000 3 NUM_CLAUSE_TEMP_GPRS
+REG 0x00008c08 0x00000000 0x0000000c 32    0    1    0 SQ_GPR_RESOURCE_MGMT_2
+FLD  0 0x000000ff 0x00000000 3 NUM_GS_GPRS
+FLD 16 0x000000ff 0x00000000 3 NUM_ES_GPRS
+REG 0x00008c0c 0x00000000 0x0000000c 32    0    1    0 SQ_THREAD_RESOURCE_MGMT
+FLD  0 0x000000ff 0x00000000 3 NUM_PS_THREADS
+FLD  8 0x000000ff 0x00000000 3 NUM_VS_THREADS
+FLD 16 0x000000ff 0x00000000 3 NUM_GS_THREADS
+FLD 24 0x000000ff 0x00000000 3 NUM_ES_THREADS
+REG 0x00008c10 0x00000000 0x0000000c 32    0    1    0 SQ_STACK_RESOURCE_MGMT_1
+FLD  0 0x00000fff 0x00000000 3 NUM_PS_STACK_ENTRIES
+FLD 16 0x00000fff 0x00000000 3 NUM_VS_STACK_ENTRIES
+REG 0x00008c14 0x00000000 0x0000000c 32    0    1    0 SQ_STACK_RESOURCE_MGMT_2
+FLD  0 0x00000fff 0x00000000 3 NUM_GS_STACK_ENTRIES
+FLD 16 0x00000fff 0x00000000 3 NUM_ES_STACK_ENTRIES
+REG 0x00008c40 0x00000000 0x0000000c 32    0    1    0 SQ_ESGS_RING_BASE
+REG 0x00008c44 0x00000000 0x0000000c 32    0    1    0 SQ_ESGS_RING_SIZE
+REG 0x00008c48 0x00000000 0x0000000c 32    0    1    0 SQ_GSVS_RING_BASE
+REG 0x00008c4c 0x00000000 0x0000000c 32    0    1    0 SQ_GSVS_RING_SIZE
+REG 0x00008c50 0x00000000 0x0000000c 32    0    1    0 SQ_ESTMP_RING_BASE
+REG 0x00008c54 0x00000000 0x0000000c 32    0    1    0 SQ_ESTMP_RING_SIZE
+REG 0x00008c58 0x00000000 0x0000000c 32    0    1    0 SQ_GSTMP_RING_BASE
+REG 0x00008c5c 0x00000000 0x0000000c 32    0    1    0 SQ_GSTMP_RING_SIZE
+REG 0x00008c60 0x00000000 0x0000000c 32    0    1    0 SQ_VSTMP_RING_BASE
+REG 0x00008c64 0x00000000 0x0000000c 32    0    1    0 SQ_VSTMP_RING_SIZE
+REG 0x00008c68 0x00000000 0x0000000c 32    0    1    0 SQ_PSTMP_RING_BASE
+REG 0x00008c6c 0x00000000 0x0000000c 32    0    1    0 SQ_PSTMP_RING_SIZE
+REG 0x00008c70 0x00000000 0x0000000c 32    0    1    0 SQ_FBUF_RING_BASE
+REG 0x00008c74 0x00000000 0x0000000c 32    0    1    0 SQ_FBUF_RING_SIZE
+REG 0x00008c78 0x00000000 0x0000000c 32    0    1    0 SQ_REDUC_RING_BASE
+REG 0x00008c7c 0x00000000 0x0000000c 32    0    1    0 SQ_REDUC_RING_SIZE
+REG 0x00008cf0 0x00000000 0x00000000 32    0    1    0 SQ_MS_FIFO_SIZES
+FLD  0 0x000000ff 0x00000000 3 CACHE_FIFO_SIZE
+FLD  8 0x0000001f 0x00000000 3 FETCH_FIFO_HIWATER
+FLD 16 0x000000ff 0x00000000 3 DONE_FIFO_HIWATER
+FLD 24 0x0000000f 0x00000000 3 ALU_UPDATE_FIFO_HIWATER
+REG 0x00008d8c 0x00000000 0x0000000c 32    0    1    0 SQ_DYN_GPR_CNTL_PS_FLUSH_REQ
+FLD  0 0x000000ff 0x00000000 3 RING0_OFFSET
+FLD 12 0x00000001 0x00000000 3 ISOLATE_ES_ENABLE
+FLD 13 0x00000001 0x00000000 3 ISOLATE_GS_ENABLE
+FLD 14 0x00000001 0x00000000 3 VS_PC_LIMIT_ENABLE
+REG 0x00008db0 0x00000000 0x00000000 32    0    1    0 SQ_DYN_GPR_SIZE_SIMD_AB_0
+FLD  0 0x000000ff 0x00000000 3 SIMDA_RING0
+FLD  8 0x000000ff 0x00000000 3 SIMDA_RING1
+FLD 16 0x000000ff 0x00000000 3 SIMDB_RING0
+FLD 24 0x000000ff 0x00000000 3 SIMDB_RING1
+REG 0x00008db4 0x00000000 0x00000000 32    0    1    0 SQ_DYN_GPR_SIZE_SIMD_AB_1
+FLD  0 0x000000ff 0x00000000 3 SIMDA_RING0
+FLD  8 0x000000ff 0x00000000 3 SIMDA_RING1
+FLD 16 0x000000ff 0x00000000 3 SIMDB_RING0
+FLD 24 0x000000ff 0x00000000 3 SIMDB_RING1
+REG 0x00008db8 0x00000000 0x00000000 32    0    1    0 SQ_DYN_GPR_SIZE_SIMD_AB_2
+FLD  0 0x000000ff 0x00000000 3 SIMDA_RING0
+FLD  8 0x000000ff 0x00000000 3 SIMDA_RING1
+FLD 16 0x000000ff 0x00000000 3 SIMDB_RING0
+FLD 24 0x000000ff 0x00000000 3 SIMDB_RING1
+REG 0x00008dbc 0x00000000 0x00000000 32    0    1    0 SQ_DYN_GPR_SIZE_SIMD_AB_3
+FLD  0 0x000000ff 0x00000000 3 SIMDA_RING0
+FLD  8 0x000000ff 0x00000000 3 SIMDA_RING1
+FLD 16 0x000000ff 0x00000000 3 SIMDB_RING0
+FLD 24 0x000000ff 0x00000000 3 SIMDB_RING1
+REG 0x00008dc0 0x00000000 0x00000000 32    0    1    0 SQ_DYN_GPR_SIZE_SIMD_AB_4
+FLD  0 0x000000ff 0x00000000 3 SIMDA_RING0
+FLD  8 0x000000ff 0x00000000 3 SIMDA_RING1
+FLD 16 0x000000ff 0x00000000 3 SIMDB_RING0
+FLD 24 0x000000ff 0x00000000 3 SIMDB_RING1
+REG 0x00008dc4 0x00000000 0x00000000 32    0    1    0 SQ_DYN_GPR_SIZE_SIMD_AB_5
+FLD  0 0x000000ff 0x00000000 3 SIMDA_RING0
+FLD  8 0x000000ff 0x00000000 3 SIMDA_RING1
+FLD 16 0x000000ff 0x00000000 3 SIMDB_RING0
+FLD 24 0x000000ff 0x00000000 3 SIMDB_RING1
+REG 0x00008dc8 0x00000000 0x00000000 32    0    1    0 SQ_DYN_GPR_SIZE_SIMD_AB_6
+FLD  0 0x000000ff 0x00000000 3 SIMDA_RING0
+FLD  8 0x000000ff 0x00000000 3 SIMDA_RING1
+FLD 16 0x000000ff 0x00000000 3 SIMDB_RING0
+FLD 24 0x000000ff 0x00000000 3 SIMDB_RING1
+REG 0x00008dcc 0x00000000 0x00000000 32    0    1    0 SQ_DYN_GPR_SIZE_SIMD_AB_7
+FLD  0 0x000000ff 0x00000000 3 SIMDA_RING0
+FLD  8 0x000000ff 0x00000000 3 SIMDA_RING1
+FLD 16 0x000000ff 0x00000000 3 SIMDB_RING0
+FLD 24 0x000000ff 0x00000000 3 SIMDB_RING1
+REG 0x0000900c 0x00000000 0x0000000d 32    0    1    0 SX_EXPORT_BUFFER_SIZES
+FLD  0 0x000000ff 0x00000000 3 COLOR_BUFFER_SIZE
+FLD  8 0x000000ff 0x00000000 3 POSITION_BUFFER_SIZE
+FLD 16 0x000000ff 0x00000000 3 SMX_BUFFER_SIZE
+REG 0x00009010 0x00000000 0x0000000d 32    0    1    0 SX_MEMORY_EXPORT_BASE
+REG 0x00009014 0x00000000 0x0000000d 32    0    1    0 SX_MEMORY_EXPORT_SIZE
+REG 0x00009058 0x00000000 0x00000000 32    0    1    0 SX_DEBUG_1
+FLD 16 0x00000001 0x00000000 3 ENABLE_NEW_SMX_ADDRESS
+REG 0x00009100 0x00000000 0x0000000e 32    0    1    0 SPI_CONFIG_CNTL
+FLD  0 0x0000001f 0x00000000 3 GPR_WRITE_PRIORITY
+VAL 0x00000000 X_PRIORITY_ORDER
+VAL 0x00000001 X_PRIORITY_ORDER_VS
+FLD  5 0x00000001 0x00000000 3 DISABLE_INTERP_1
+FLD  6 0x00000003 0x00000000 3 DEBUG_THREAD_TYPE_SEL
+FLD  8 0x0000001f 0x00000000 3 DEBUG_GROUP_SEL
+FLD 13 0x00000001 0x00000000 3 DEBUG_GRBM_OVERRIDE
+REG 0x0000913c 0x00000000 0x0000000e 32    0    1    0 SPI_CONFIG_CNTL_1
+FLD  0 0x0000000f 0x00000000 3 VTX_DONE_DELAY
+FLD  4 0x00000001 0x00000000 3 INTERP_ONE_PRIM_PER_ROW
+VAL 0x00000000 X_DELAY_10_CLKS
+VAL 0x00000001 X_DELAY_11_CLKS
+VAL 0x00000002 X_DELAY_12_CLKS
+VAL 0x00000003 X_DELAY_13_CLKS
+VAL 0x00000004 X_DELAY_14_CLKS
+VAL 0x00000005 X_DELAY_15_CLKS
+VAL 0x00000006 X_DELAY_16_CLKS
+VAL 0x00000007 X_DELAY_17_CLKS
+VAL 0x00000008 X_DELAY_2_CLKS
+VAL 0x00000009 X_DELAY_3_CLKS
+VAL 0x0000000a X_DELAY_4_CLKS
+VAL 0x0000000b X_DELAY_5_CLKS
+VAL 0x0000000c X_DELAY_6_CLKS
+VAL 0x0000000d X_DELAY_7_CLKS
+VAL 0x0000000e X_DELAY_8_CLKS
+VAL 0x0000000f X_DELAY_9_CLKS
+FLD  4 0x00000001 0x00000000 3 INTERP_ONE_PRIM_PER_ROW
+REG 0x00009148 0x00000000 0x00000000 32    0    1    0 CGTS_TCC_DISABLE
+REG 0x0000914c 0x00000000 0x00000000 32    0    1    0 CGTS_USER_TCC_DISABLE
+REG 0x00009400 0x00000000 0x0000000f 32    0    1    0 TD_FILTER4
+FLD  0 0x000007ff 0x00000000 3 WEIGHT_1
+FLD 11 0x000007ff 0x00000000 3 WEIGHT_0
+FLD 22 0x00000001 0x00000000 3 WEIGHT_PAIR
+FLD 23 0x0000000f 0x00000000 3 PHASE
+FLD 27 0x00000001 0x00000000 3 DIRECTION
+REG 0x00009404 0x00000000 0x0000000f 32    0    1    0 TD_FILTER4_1
+FLD  0 0x000007ff 0x00000000 3 WEIGHT_1
+FLD 11 0x000007ff 0x00000000 3 WEIGHT_0
+REG 0x00009490 0x00000000 0x0000000f 32    0    1    0 TD_CNTL
+FLD  0 0x00000003 0x00000000 3 SYNC_PHASE_SH
+FLD  4 0x00000003 0x00000000 3 SYNC_PHASE_VC_SMX
+REG 0x00009494 0x00000000 0x0000000f 32    0    1    0 TD0_CNTL
+FLD 28 0x00000003 0x00000000 3 ID_OVERRIDE
+REG 0x000094a4 0x00000000 0x0000000f 32    0    1    0 TD0_STATUS
+FLD 31 0x00000001 0x00000000 3 BUSY
+REG 0x00009504 0x00000000 0x0000000f 32    0    1    0 TA_CNTL
+FLD  0 0x0000001f 0x00000000 3 GRADIENT_CREDIT
+FLD  8 0x0000001f 0x00000000 3 WALKER_CREDIT
+FLD 16 0x0000001f 0x00000000 3 ALIGNER_CREDIT
+FLD 22 0x000003ff 0x00000000 3 TD_FIFO_CREDIT
+REG 0x00009508 0x00000000 0x0000000f 32    0    1    0 TA_CNTL_AUX
+FLD  0 0x00000001 0x00000000 3 DISABLE_CUBE_WRAP
+FLD  1 0x00000001 0x00000000 3 DISABLE_CUBE_ANISO
+FLD 24 0x00000001 0x00000000 3 SYNC_GRADIENT
+FLD 25 0x00000001 0x00000000 3 SYNC_WALKER
+FLD 26 0x00000001 0x00000000 3 SYNC_ALIGNER
+FLD 31 0x00000001 0x00000000 3 BILINEAR_PRECISION
+REG 0x00009510 0x00000000 0x0000000f 32    0    1    0 TA0_CNTL
+FLD 28 0x00000003 0x00000000 3 ID_OVERRIDE
+REG 0x00009514 0x00000000 0x0000000f 32    0    1    0 TA1_CNTL
+FLD 28 0x00000003 0x00000000 3 ID_OVERRIDE
+REG 0x00009518 0x00000000 0x0000000f 32    0    1    0 TA2_CNTL
+FLD 28 0x00000003 0x00000000 3 ID_OVERRIDE
+REG 0x0000951c 0x00000000 0x0000000f 32    0    1    0 TA3_CNTL
+FLD 28 0x00000003 0x00000000 3 ID_OVERRIDE
+REG 0x00009520 0x00000000 0x0000000f 32    0    1    0 TA0_STATUS
+FLD 12 0x00000001 0x00000000 3 FG_PFIFO_EMPTYB
+FLD 13 0x00000001 0x00000000 3 FG_LFIFO_EMPTYB
+FLD 14 0x00000001 0x00000000 3 FG_SFIFO_EMPTYB
+FLD 16 0x00000001 0x00000000 3 FL_PFIFO_EMPTYB
+FLD 17 0x00000001 0x00000000 3 FL_LFIFO_EMPTYB
+FLD 18 0x00000001 0x00000000 3 FL_SFIFO_EMPTYB
+FLD 20 0x00000001 0x00000000 3 FA_PFIFO_EMPTYB
+FLD 21 0x00000001 0x00000000 3 FA_LFIFO_EMPTYB
+FLD 22 0x00000001 0x00000000 3 FA_SFIFO_EMPTYB
+FLD 24 0x00000001 0x00000000 3 IN_BUSY
+FLD 25 0x00000001 0x00000000 3 FG_BUSY
+FLD 27 0x00000001 0x00000000 3 FL_BUSY
+FLD 28 0x00000001 0x00000000 3 TA_BUSY
+FLD 29 0x00000001 0x00000000 3 FA_BUSY
+FLD 30 0x00000001 0x00000000 3 AL_BUSY
+FLD 31 0x00000001 0x00000000 3 BUSY
+REG 0x00009524 0x00000000 0x0000000f 32    0    1    0 TA1_STATUS
+FLD 12 0x00000001 0x00000000 3 FG_PFIFO_EMPTYB
+FLD 13 0x00000001 0x00000000 3 FG_LFIFO_EMPTYB
+FLD 14 0x00000001 0x00000000 3 FG_SFIFO_EMPTYB
+FLD 16 0x00000001 0x00000000 3 FL_PFIFO_EMPTYB
+FLD 17 0x00000001 0x00000000 3 FL_LFIFO_EMPTYB
+FLD 18 0x00000001 0x00000000 3 FL_SFIFO_EMPTYB
+FLD 20 0x00000001 0x00000000 3 FA_PFIFO_EMPTYB
+FLD 21 0x00000001 0x00000000 3 FA_LFIFO_EMPTYB
+FLD 22 0x00000001 0x00000000 3 FA_SFIFO_EMPTYB
+FLD 24 0x00000001 0x00000000 3 IN_BUSY
+FLD 25 0x00000001 0x00000000 3 FG_BUSY
+FLD 27 0x00000001 0x00000000 3 FL_BUSY
+FLD 28 0x00000001 0x00000000 3 TA_BUSY
+FLD 29 0x00000001 0x00000000 3 FA_BUSY
+FLD 30 0x00000001 0x00000000 3 AL_BUSY
+FLD 31 0x00000001 0x00000000 3 BUSY
+REG 0x00009528 0x00000000 0x0000000f 32    0    1    0 TA2_STATUS
+FLD 12 0x00000001 0x00000000 3 FG_PFIFO_EMPTYB
+FLD 13 0x00000001 0x00000000 3 FG_LFIFO_EMPTYB
+FLD 14 0x00000001 0x00000000 3 FG_SFIFO_EMPTYB
+FLD 16 0x00000001 0x00000000 3 FL_PFIFO_EMPTYB
+FLD 17 0x00000001 0x00000000 3 FL_LFIFO_EMPTYB
+FLD 18 0x00000001 0x00000000 3 FL_SFIFO_EMPTYB
+FLD 20 0x00000001 0x00000000 3 FA_PFIFO_EMPTYB
+FLD 21 0x00000001 0x00000000 3 FA_LFIFO_EMPTYB
+FLD 22 0x00000001 0x00000000 3 FA_SFIFO_EMPTYB
+FLD 24 0x00000001 0x00000000 3 IN_BUSY
+FLD 25 0x00000001 0x00000000 3 FG_BUSY
+FLD 27 0x00000001 0x00000000 3 FL_BUSY
+FLD 28 0x00000001 0x00000000 3 TA_BUSY
+FLD 29 0x00000001 0x00000000 3 FA_BUSY
+FLD 30 0x00000001 0x00000000 3 AL_BUSY
+FLD 31 0x00000001 0x00000000 3 BUSY
+REG 0x0000952c 0x00000000 0x0000000f 32    0    1    0 TA3_STATUS
+FLD 12 0x00000001 0x00000000 3 FG_PFIFO_EMPTYB
+FLD 13 0x00000001 0x00000000 3 FG_LFIFO_EMPTYB
+FLD 14 0x00000001 0x00000000 3 FG_SFIFO_EMPTYB
+FLD 16 0x00000001 0x00000000 3 FL_PFIFO_EMPTYB
+FLD 17 0x00000001 0x00000000 3 FL_LFIFO_EMPTYB
+FLD 18 0x00000001 0x00000000 3 FL_SFIFO_EMPTYB
+FLD 20 0x00000001 0x00000000 3 FA_PFIFO_EMPTYB
+FLD 21 0x00000001 0x00000000 3 FA_LFIFO_EMPTYB
+FLD 22 0x00000001 0x00000000 3 FA_SFIFO_EMPTYB
+FLD 24 0x00000001 0x00000000 3 IN_BUSY
+FLD 25 0x00000001 0x00000000 3 FG_BUSY
+FLD 27 0x00000001 0x00000000 3 FL_BUSY
+FLD 28 0x00000001 0x00000000 3 TA_BUSY
+FLD 29 0x00000001 0x00000000 3 FA_BUSY
+FLD 30 0x00000001 0x00000000 3 AL_BUSY
+FLD 31 0x00000001 0x00000000 3 BUSY
+REG 0x00009600 0x00000000 0x0000000f 32    0    1    0 TC_STATUS
+FLD  0 0x00000001 0x00000000 3 TC_BUSY
+REG 0x00009604 0x00000000 0x0000000f 32    0    1    0 TC_INVALIDATE
+FLD  0 0x00000001 0x00000000 3 START
+REG 0x00009608 0x00000000 0x0000000f 32    0    1    0 TC_CNTL
+FLD  0 0x00000001 0x00000000 3 FORCE_HIT
+FLD  1 0x00000001 0x00000000 3 FORCE_MISS
+FLD  5 0x0000000f 0x00000000 3 L2_SIZE
+VAL 0x00000000 L2_256K
+VAL 0x00000001 L2_224K
+VAL 0x00000002 L2_192K
+VAL 0x00000003 L2_160K
+VAL 0x00000004 L2_128K
+VAL 0x00000005 L2_96K
+VAL 0x00000006 L2_64K
+VAL 0x00000007 L2_32K
+FLD  9 0x00000001 0x00000000 3 L2_DISABLE_LATE_HIT
+FLD 10 0x00000001 0x00000000 3 DISABLE_VERT_PERF
+FLD 11 0x00000001 0x00000000 3 DISABLE_INVAL_BUSY
+FLD 12 0x00000001 0x00000000 3 DISABLE_INVAL_SAME_SURFACE
+FLD 13 0x00000003 0x00000000 3 PARTITION_MODE
+VAL 0x00000000 X_VERTEX
+FLD 15 0x00000001 0x00000000 3 MISS_ARB_MODE
+FLD 16 0x00000001 0x00000000 3 HIT_ARB_MODE
+FLD 17 0x00000001 0x00000000 3 DISABLE_WRITE_DELAY
+FLD 18 0x00000001 0x00000000 3 HIT_FIFO_DEPTH
+REG 0x00009610 0x00000000 0x00000000 32    0    1    0 TCP_CNTL
+REG 0x00009614 0x00000000 0x00000000 32    0    1    0 TCP_CHAN_STEER
+REG 0x00009700 0x00000000 0x0000000f 32    0    1    0 VC_CNTL
+FLD  0 0x00000001 0x00000000 3 L2_INVALIDATE
+FLD  1 0x00000001 0x00000000 3 RESERVED
+FLD  2 0x00000001 0x00000000 3 CC_FORCE_MISS
+FLD  3 0x00000003 0x00000000 3 MI_CHAN_SEL
+VAL 0x00000000 X_MC0_USES_CH_0_1
+VAL 0x00000001 X_MC0_USES_CH_0_3
+VAL 0x00000002 X_VC_MC0_IS_ACTIVE
+VAL 0x00000003 X_VC_MC1_IS_DISABLED
+FLD  5 0x00000001 0x00000000 3 MI_STEER_DISABLE
+FLD  6 0x0000000f 0x00000000 3 MI_CREDIT_CTR
+FLD 10 0x00000001 0x00000000 3 MI_CREDIT_WE
+FLD 11 0x00000007 0x00000000 3 MI_REQ_STALL_THLD
+VAL 0x00000000 X_LATENCY_EXCEEDS_399_CLOCKS
+VAL 0x00000001 X_LATENCY_EXCEEDS_415_CLOCKS
+VAL 0x00000002 X_LATENCY_EXCEEDS_431_CLOCKS
+VAL 0x00000003 X_LATENCY_EXCEEDS_447_CLOCKS
+VAL 0x00000004 X_LATENCY_EXCEEDS_463_CLOCKS
+VAL 0x00000005 X_LATENCY_EXCEEDS_479_CLOCKS
+VAL 0x00000006 X_LATENCY_EXCEEDS_495_CLOCKS
+VAL 0x00000007 X_LATENCY_EXCEEDS_511_CLOCKS
+FLD 14 0x0000001f 0x00000000 3 MI_TIMESTAMP_RES
+VAL 0x00000000 X_1X_SYSTEM_CLOCK
+VAL 0x00000001 X_2X_SYSTEM_CLOCK
+VAL 0x00000002 X_4X_SYSTEM_CLOCK
+VAL 0x00000003 X_8X_SYSTEM_CLOCK
+VAL 0x00000004 X_16X_SYSTEM_CLOCK
+VAL 0x00000005 X_32X_SYSTEM_CLOCK
+VAL 0x00000006 X_64X_SYSTEM_CLOCK
+VAL 0x00000007 X_128X_SYSTEM_CLOCK
+VAL 0x00000008 X_256X_SYSTEM_CLOCK
+VAL 0x00000009 X_512X_SYSTEM_CLOCK
+VAL 0x0000000a X_1024X_SYSTEM_CLOCK
+VAL 0x0000000b X_2048X_SYSTEM_CLOCK
+VAL 0x0000000c X_4092X_SYSTEM_CLOCK
+VAL 0x0000000d X_8192X_SYSTEM_CLOCK
+VAL 0x0000000e X_16384X_SYSTEM_CLOCK
+VAL 0x0000000f X_32768X_SYSTEM_CLOCK
+REG 0x00009704 0x00000000 0x0000000f 32    0    1    0 VC_CNTL_STATUS
+FLD  0 0x00000001 0x00000000 3 RP_BUSY
+FLD  1 0x00000001 0x00000000 3 RG_BUSY
+FLD  2 0x00000001 0x00000000 3 VC_BUSY
+FLD  3 0x00000001 0x00000000 3 CLAMP_DETECT
+REG 0x00009714 0x00000000 0x0000000f 32    0    1    0 VC_ENHANCE
+REG 0x00009718 0x00000000 0x0000000f 32    0    1    0 VC_CONFIG
+FLD  0 0x00000001 0x00000000 3 WRITE_DIS
+FLD  1 0x00000007 0x00000000 3 GPR_DATA_PHASE_ADJ
+VAL 0x00000000 X_LATENCY_BASE_0_CYCLES
+VAL 0x00000001 X_LATENCY_BASE_1_CYCLES
+VAL 0x00000002 X_LATENCY_BASE_2_CYCLES
+VAL 0x00000003 X_LATENCY_BASE_3_CYCLES
+FLD  4 0x00000007 0x00000000 3 TD_SIMD_SYNC_ADJ
+VAL 0x00000000 X_0_CYCLES_DELAY
+VAL 0x00000001 X_1_CYCLES_DELAY
+VAL 0x00000002 X_2_CYCLES_DELAY
+VAL 0x00000003 X_3_CYCLES_DELAY
+VAL 0x00000004 X_4_CYCLES_DELAY
+VAL 0x00000005 X_5_CYCLES_DELAY
+VAL 0x00000006 X_6_CYCLES_DELAY
+VAL 0x00000007 X_7_CYCLES_DELAY
+REG 0x00009830 0x00000000 0x00000003 32    0    1    0 DB_DEBUG
+REG 0x00009838 0x00000000 0x00000003 32    0    1    0 DB_WATERMARKS
+FLD  0 0x0000001f 0x00000000 3 DEPTH_FREE
+FLD  5 0x0000003f 0x00000000 3 DEPTH_FLUSH
+FLD 11 0x0000000f 0x00000000 3 FORCE_SUMMARIZE
+FLD 15 0x0000001f 0x00000000 3 DEPTH_PENDING_FREE
+FLD 20 0x0000001f 0x00000000 3 DEPTH_CACHELINE_FREE
+FLD 25 0x00000001 0x00000000 3 EARLY_Z_PANIC_DISABLE
+FLD 26 0x00000001 0x00000000 3 LATE_Z_PANIC_DISABLE
+FLD 27 0x00000001 0x00000000 3 RE_Z_PANIC_DISABLE
+FLD 28 0x0000000f 0x00000000 3 DB_EXTRA_DEBUG
+REG 0x000098b0 0x00000000 0x00000000 32    0    1    0 DB_DEBUG3
+FLD 11 0x0000001f 0x00000000 3 DB_CLK_OFF_DELAY
+REG 0x000098f0 0x00000000 0x00000000 32    0    1    0 GB_TILING_CONFIG
+FLD  1 0x00000007 0x00000000 3 PIPE_TILING
+FLD  4 0x00000003 0x00000000 3 BANK_TILING
+FLD  6 0x00000003 0x00000000 3 GROUP_SIZE
+FLD  8 0x00000007 0x00000000 3 ROW_TILING
+FLD 11 0x00000007 0x00000000 3 BANK_SWAPS
+FLD 14 0x00000003 0x00000000 3 SAMPLE_SPLIT
+FLD 16 0x0000ffff 0x00000000 3 BACKEND_MAP
+REG 0x000098f4 0x00000000 0x00000000 32    0    1    0 CC_RB_BACKEND_DISABLE
+FLD 16 0x000000ff 0x00000000 3 BACKEND_DISABLE
+REG 0x00009b8c 0x00000000 0x00000000 32    0    1    0 DB_DEBUG4
+FLD  6 0x00000001 0x00000000 3 DISABLE_TILE_COVERED_FOR_PS_ITER
+REG 0x0000a020 0x00000000 0x00000000 32    0    1    0 SMX_DC_CTL0
+FLD  0 0x00000001 0x00000000 3 USE_HASH_FUNCTION
+FLD  1 0x000001ff 0x00000000 3 CACHE_DEPTH
+FLD 10 0x00000001 0x00000000 3 FLUSH_ALL_ON_EVENT
+FLD 11 0x00000001 0x00000000 3 STALL_ON_EVENT
+REG 0x0000a020 0x00000000 0x0000000d 32    0    1    0 SMX_DC_CTL0
+FLD  0 0x00000001 0x00000000 3 WR_GATHER_STREAM0
+FLD  1 0x00000001 0x00000000 3 WR_GATHER_STREAM1
+FLD  2 0x00000001 0x00000000 3 WR_GATHER_STREAM2
+FLD  3 0x00000001 0x00000000 3 WR_GATHER_STREAM3
+FLD  4 0x00000001 0x00000000 3 WR_GATHER_SCRATCH
+FLD  5 0x00000001 0x00000000 3 WR_GATHER_REDUC_BUF
+FLD  6 0x00000001 0x00000000 3 WR_GATHER_RING_BUF
+FLD  7 0x00000001 0x00000000 3 WR_GATHER_F_BUF
+FLD  8 0x00000001 0x00000000 3 DISABLE_CACHES
+FLD 10 0x00000001 0x00000000 3 AUTO_FLUSH_INVAL_EN
+FLD 11 0x00000001 0x00000000 3 AUTO_FLUSH_EN
+FLD 12 0x0000ffff 0x00000000 3 AUTO_FLUSH_CNT
+FLD 28 0x00000003 0x00000000 3 MC_RD_STALL_FACTOR
+FLD 30 0x00000003 0x00000000 3 MC_WR_STALL_FACTOR
+REG 0x0000a024 0x00000000 0x0000000d 32    0    1    0 SMX_DC_CTL1
+FLD  0 0x0000007f 0x00000000 3 OP_FIFO_SKID
+FLD  8 0x00000001 0x00000000 3 CACHE_LINE_SIZE
+FLD  9 0x00000001 0x00000000 3 MULTI_FLUSH_MODE
+FLD 10 0x0000000f 0x00000000 3 MULTI_FLUSH_REQ_ABORT_IDX_FIFO_SKID
+FLD 16 0x00000001 0x00000000 3 DISABLE_WR_GATHER_RD_HIT_FORCE_EVICT
+FLD 17 0x00000001 0x00000000 3 DISABLE_WR_GATHER_RD_HIT_COMP_VLDS_CHECK
+FLD 18 0x00000001 0x00000000 3 DISABLE_FLUSH_ES_ALSO_INVALS
+FLD 19 0x00000001 0x00000000 3 DISABLE_FLUSH_GS_ALSO_INVALS
+REG 0x0000a028 0x00000000 0x0000000d 32    0    1    0 SMX_DC_CTL2
+FLD  0 0x00000001 0x00000000 3 INVALIDATE_CACHES
+FLD  1 0x00000001 0x00000000 3 CACHES_INVALID
+FLD  2 0x00000001 0x00000000 3 CACHES_DIRTY
+FLD  4 0x00000001 0x00000000 3 FLUSH_ALL
+FLD  8 0x00000001 0x00000000 3 FLUSH_GS_THREADS
+FLD  9 0x00000001 0x00000000 3 FLUSH_ES_THREADS
+REG 0x0000a02c 0x00000000 0x00000000 32    0    1    0 SMX_EVENT_CTL
+FLD  0 0x00000007 0x00000000 3 ES_FLUSH_CTL
+FLD  3 0x00000007 0x00000000 3 GS_FLUSH_CTL
+FLD  6 0x00000003 0x00000000 3 ACK_FLUSH_CTL
+FLD  8 0x00000001 0x00000000 3 SYNC_FLUSH_CTL
+REG 0x0000a02c 0x00000000 0x0000000d 32    0    1    0 SMX_DC_MC_INTF_CTL
+FLD  0 0x000000ff 0x00000000 3 MC_RD_REQ_CRED
+FLD 16 0x000000ff 0x00000000 3 MC_WR_REQ_CRED
+REG 0x0000a400 0x00000000 0x0000000f 32    0    1    0 TD_PS_SAMPLER0_BORDER_RED
+REG 0x0000a404 0x00000000 0x0000000f 32    0    1    0 TD_PS_SAMPLER0_BORDER_GREEN
+REG 0x0000a408 0x00000000 0x0000000f 32    0    1    0 TD_PS_SAMPLER0_BORDER_BLUE
+REG 0x0000a40c 0x00000000 0x0000000f 32    0    1    0 TD_PS_SAMPLER0_BORDER_ALPHA
+REG 0x0000a600 0x00000000 0x0000000f 32    0    1    0 TD_VS_SAMPLER0_BORDER_RED
+REG 0x0000a604 0x00000000 0x0000000f 32    0    1    0 TD_VS_SAMPLER0_BORDER_GREEN
+REG 0x0000a608 0x00000000 0x0000000f 32    0    1    0 TD_VS_SAMPLER0_BORDER_BLUE
+REG 0x0000a60c 0x00000000 0x0000000f 32    0    1    0 TD_VS_SAMPLER0_BORDER_ALPHA
+REG 0x0000a800 0x00000000 0x0000000f 32    0    1    0 TD_GS_SAMPLER0_BORDER_RED
+REG 0x0000a804 0x00000000 0x0000000f 32    0    1    0 TD_GS_SAMPLER0_BORDER_GREEN
+REG 0x0000a808 0x00000000 0x0000000f 32    0    1    0 TD_GS_SAMPLER0_BORDER_BLUE
+REG 0x0000a80c 0x00000000 0x0000000f 32    0    1    0 TD_GS_SAMPLER0_BORDER_ALPHA
+REG 0x0000aa00 0x00000000 0x0000000f 32    0    1    0 TD_PS_SAMPLER0_CLEARTYPE_KERNEL
+FLD  0 0x00000007 0x00000000 3 WIDTH
+FLD  3 0x00000007 0x00000000 3 HEIGHT
+REG 0x0000c100 0x00000000 0x00000000 32    0    1    0 CP_RB_BASE
+REG 0x0000c104 0x00000000 0x00000000 32    0    1    0 CP_RB_CNTL
+FLD  0 0x0000003f 0x00000000 3 RB_BUFSZ
+FLD  8 0x0000003f 0x00000000 3 RB_BLKSZ
+FLD 16 0x00000003 0x00000000 3 BUF_SWAP
+VAL 0x00000000 SWAP_NONE
+VAL 0x00000001 SWAP_16_BIT
+VAL 0x00000002 SWAP_32_BIT
+VAL 0x00000003 SWAP_WORD
+FLD 27 0x00000001 0x00000000 3 RB_NO_UPDATE
+FLD 31 0x00000001 0x00000000 3 RB_RPTR_WR_ENA
+REG 0x0000c108 0x00000000 0x00000000 32    0    1    0 CP_RB_RPTR_WR
+FLD  0 0x000fffff 0x00000000 3 RB_RPTR_WR
+REG 0x0000c10c 0x00000000 0x00000000 32    0    1    0 CP_RB_RPTR_ADDR
+FLD  0 0x00000003 0x00000000 3 RB_RPTR_SWAP
+VAL 0x00000000 SWAP_NONE
+VAL 0x00000001 SWAP_16_BIT
+VAL 0x00000002 SWAP_32_BIT
+VAL 0x00000003 SWAP_WORD
+REG 0x0000c110 0x00000000 0x00000000 32    0    1    0 CP_RB_RPTR_ADDR_HI
+REG 0x0000c114 0x00000000 0x00000000 32    0    1    0 CP_RB_WPTR
+FLD  0 0x000fffff 0x00000000 3 RB_WPTR
+REG 0x0000c118 0x00000000 0x00000000 32    0    1    0 CP_RB_WPTR_POLL_ADDR
+REG 0x0000c11c 0x00000000 0x00000000 32    0    1    0 CP_RB_WPTR_POLL_ADDR_HI
+REG 0x0000c128 0x00000000 0x00000000 32    0    1    0 CP_INT_STATUS
+FLD  0 0x00000001 0x00000000 3 DISABLE_CNTX_SWITCH_INT_STAT
+FLD  1 0x00000001 0x00000000 3 ENABLE_CNTX_SWITCH_INT_STAT
+FLD 18 0x00000001 0x00000000 3 SEM_SIGNAL_INT_STAT
+FLD 19 0x00000001 0x00000000 3 CNTX_BUSY_INT_STAT
+FLD 20 0x00000001 0x00000000 3 CNTX_EMPTY_INT_STAT
+FLD 21 0x00000001 0x00000000 3 WAITMEM_SEM_INT_STAT
+FLD 22 0x00000001 0x00000000 3 PRIV_INSTR_INT_STAT
+FLD 23 0x00000001 0x00000000 3 PRIV_REG_INT_STAT
+FLD 24 0x00000001 0x00000000 3 OPCODE_ERROR_INT_STAT
+FLD 25 0x00000001 0x00000000 3 SCRATCH_INT_STAT
+FLD 26 0x00000001 0x00000000 3 TIME_STAMP_INT_STAT
+FLD 27 0x00000001 0x00000000 3 RESERVED_BIT_ERROR_INT_STAT
+FLD 28 0x00000001 0x00000000 3 DMA_INT_STAT
+FLD 29 0x00000001 0x00000000 3 IB2_INT_STAT
+FLD 30 0x00000001 0x00000000 3 IB1_INT_STAT
+FLD 31 0x00000001 0x00000000 3 RB_INT_STAT
+REG 0x0000c150 0x00000000 0x00000000 32    0    1    0 CP_PFP_UCODE_ADDR
+REG 0x0000c154 0x00000000 0x00000000 32    0    1    0 CP_PFP_UCODE_DATA
+REG 0x0000c158 0x00000000 0x00000000 32    0    1    0 CP_ME_RAM_RADDR
+REG 0x0000c15c 0x00000000 0x00000000 32    0    1    0 CP_ME_RAM_WADDR
+REG 0x0000c160 0x00000000 0x00000000 32    0    1    0 CP_ME_RAM_DATA
+REG 0x00028000 0x00000000 0x00000003 32    0    1    0 DB_DEPTH_SIZE
+FLD  0 0x000003ff 0x00000000 3 PITCH_TILE_MAX
+FLD 10 0x000fffff 0x00000000 3 SLICE_TILE_MAX
+REG 0x00028004 0x00000000 0x00000003 32    0    1    0 DB_DEPTH_VIEW
+FLD  0 0x000007ff 0x00000000 3 SLICE_START
+FLD 13 0x000007ff 0x00000000 3 SLICE_MAX
+REG 0x0002800c 0x00000000 0x00000003 32    0    1    0 DB_DEPTH_BASE
+REG 0x00028010 0x00000000 0x00000003 32    0    1    0 DB_DEPTH_INFO
+FLD  0 0x00000007 0x00000000 3 FORMAT
+VAL 0x00000000 DEPTH_INVALID
+VAL 0x00000001 DEPTH_16
+VAL 0x00000002 DEPTH_X8_24
+VAL 0x00000003 DEPTH_8_24
+VAL 0x00000004 DEPTH_X8_24_FLOAT
+VAL 0x00000005 DEPTH_8_24_FLOAT
+VAL 0x00000006 DEPTH_32_FLOAT
+VAL 0x00000007 DEPTH_X24_8_32_FLOAT
+FLD  3 0x00000001 0x00000000 3 READ_SIZE
+FLD 15 0x0000000f 0x00000000 3 ARRAY_MODE
+VAL 0x00000002 ARRAY_1D_TILED_THIN1
+VAL 0x00000004 ARRAY_2D_TILED_THIN1
+FLD 25 0x00000001 0x00000000 3 TILE_SURFACE_ENABLE
+FLD 26 0x00000001 0x00000000 3 TILE_COMPACT
+FLD 31 0x00000001 0x00000000 3 ZRANGE_PRECISION
+REG 0x00028014 0x00000000 0x00000003 32    0    1    0 DB_HTILE_DATA_BASE
+REG 0x00028028 0x00000000 0x00000003 32    0    1    0 DB_STENCIL_CLEAR
+FLD  0 0x000000ff 0x00000000 3 CLEAR
+FLD 16 0x000000ff 0x00000000 3 MIN
+REG 0x0002802c 0x00000000 0x00000003 32    0    1    0 DB_DEPTH_CLEAR
+REG 0x00028030 0x00000000 0x00000006 32    0    1    0 PA_SC_SCREEN_SCISSOR_TL
+FLD  0 0x00007fff 0x00000000 3 TL_X
+FLD 16 0x00007fff 0x00000000 3 TL_Y
+REG 0x00028034 0x00000000 0x00000006 32    0    1    0 PA_SC_SCREEN_SCISSOR_BR
+FLD  0 0x00007fff 0x00000000 3 BR_X
+FLD 16 0x00007fff 0x00000000 3 BR_Y
+REG 0x00028040 0x00000000 0x00000001 32    0    8    4 CB_COLOR_BASE
+REG 0x00028060 0x00000000 0x00000001 32    0    8    4 CB_COLOR_SIZE
+FLD  0 0x000003ff 0x00000000 3 PITCH_TILE_MAX
+FLD 10 0x000fffff 0x00000000 3 SLICE_TILE_MAX
+REG 0x00028080 0x00000000 0x00000001 32    0    8    4 CB_COLOR_VIEW
+FLD  0 0x000007ff 0x00000000 3 SLICE_START
+FLD 13 0x000007ff 0x00000000 3 SLICE_MAX
+REG 0x000280a0 0x00000000 0x00000001 32    0    8    4 CB_COLOR_INFO
+FLD  0 0x00000003 0x00000000 3 ENDIAN
+VAL 0x00000000 ENDIAN_NONE
+VAL 0x00000001 ENDIAN_8IN16
+VAL 0x00000002 ENDIAN_8IN32
+VAL 0x00000003 ENDIAN_8IN64
+FLD  2 0x0000003f 0x00000000 3 FORMAT
+VAL 0x00000000 COLOR_INVALID
+VAL 0x00000001 COLOR_8
+VAL 0x00000002 COLOR_4_4
+VAL 0x00000003 COLOR_3_3_2
+VAL 0x00000005 COLOR_16
+VAL 0x00000006 COLOR_16_FLOAT
+VAL 0x00000007 COLOR_8_8
+VAL 0x00000008 COLOR_5_6_5
+VAL 0x00000009 COLOR_6_5_5
+VAL 0x0000000a COLOR_1_5_5_5
+VAL 0x0000000b COLOR_4_4_4_4
+VAL 0x0000000c COLOR_5_5_5_1
+VAL 0x0000000d COLOR_32
+VAL 0x0000000e COLOR_32_FLOAT
+VAL 0x0000000f COLOR_16_16
+VAL 0x00000010 COLOR_16_16_FLOAT
+VAL 0x00000011 COLOR_8_24
+VAL 0x00000012 COLOR_8_24_FLOAT
+VAL 0x00000013 COLOR_24_8
+VAL 0x00000014 COLOR_24_8_FLOAT
+VAL 0x00000015 COLOR_10_11_11
+VAL 0x00000016 COLOR_10_11_11_FLOAT
+VAL 0x00000017 COLOR_11_11_10
+VAL 0x00000018 COLOR_11_11_10_FLOAT
+VAL 0x00000019 COLOR_2_10_10_10
+VAL 0x0000001a COLOR_8_8_8_8
+VAL 0x0000001b COLOR_10_10_10_2
+VAL 0x0000001c COLOR_X24_8_32_FLOAT
+VAL 0x0000001d COLOR_32_32
+VAL 0x0000001e COLOR_32_32_FLOAT
+VAL 0x0000001f COLOR_16_16_16_16
+VAL 0x00000020 COLOR_16_16_16_16_FLOAT
+VAL 0x00000022 COLOR_32_32_32_32
+VAL 0x00000023 COLOR_32_32_32_32_FLOAT
+FLD  8 0x0000000f 0x00000000 3 ARRAY_MODE
+VAL 0x00000000 ARRAY_LINEAR_GENERAL
+VAL 0x00000001 ARRAY_LINEAR_ALIGNED
+VAL 0x00000004 ARRAY_2D_TILED_THIN1
+FLD 12 0x00000007 0x00000000 3 NUMBER_TYPE
+VAL 0x00000000 NUMBER_UNORM
+VAL 0x00000001 NUMBER_SNORM
+VAL 0x00000002 NUMBER_USCALED
+VAL 0x00000003 NUMBER_SSCALED
+VAL 0x00000004 NUMBER_UINT
+VAL 0x00000005 NUMBER_SINT
+VAL 0x00000006 NUMBER_SRGB
+VAL 0x00000007 NUMBER_FLOAT
+FLD 15 0x00000001 0x00000000 3 READ_SIZE
+FLD 16 0x00000003 0x00000000 3 COMP_SWAP
+VAL 0x00000000 SWAP_STD
+VAL 0x00000001 SWAP_ALT
+VAL 0x00000002 SWAP_STD_REV
+VAL 0x00000003 SWAP_ALT_REV
+FLD 18 0x00000003 0x00000000 3 TILE_MODE
+VAL 0x00000000 TILE_DISABLE
+VAL 0x00000001 TILE_CLEAR_ENABLE
+VAL 0x00000002 TILE_FRAG_ENABLE
+FLD 20 0x00000001 0x00000000 3 BLEND_CLAMP
+FLD 21 0x00000001 0x00000000 3 CLEAR_COLOR
+FLD 22 0x00000001 0x00000000 3 BLEND_BYPASS
+FLD 23 0x00000001 0x00000000 3 BLEND_FLOAT32
+FLD 24 0x00000001 0x00000000 3 SIMPLE_FLOAT
+FLD 25 0x00000001 0x00000000 3 ROUND_MODE
+FLD 26 0x00000001 0x00000000 3 TILE_COMPACT
+FLD 27 0x00000001 0x00000000 3 SOURCE_FORMAT
+REG 0x000280c0 0x00000000 0x00000001 32    0    8    4 CB_COLOR_TILE
+REG 0x000280e0 0x00000000 0x00000001 32    0    8    4 CB_COLOR_FRAG
+REG 0x00028100 0x00000000 0x00000001 32    0    8    4 CB_COLOR_MASK
+FLD  0 0x00000fff 0x00000000 3 CMASK_BLOCK_MAX
+FLD 12 0x000fffff 0x00000000 3 FMASK_TILE_MAX
+REG 0x00028120 0x00000000 0x00000001 32    0    1    0 CB_CLEAR_RED
+REG 0x00028124 0x00000000 0x00000001 32    0    1    0 CB_CLEAR_GREEN
+REG 0x00028128 0x00000000 0x00000001 32    0    1    0 CB_CLEAR_BLUE
+REG 0x0002812c 0x00000000 0x00000001 32    0    1    0 CB_CLEAR_ALPHA
+REG 0x00028140 0x00000000 0x0000000c 32    0   16    4 SQ_ALU_CONST_BUFFER_SIZE_PS
+FLD  0 0x000001ff 0x00000000 3 DATA
+REG 0x00028180 0x00000000 0x0000000c 32    0   16    4 SQ_ALU_CONST_BUFFER_SIZE_VS
+FLD  0 0x000001ff 0x00000000 3 DATA
+REG 0x000281c0 0x00000000 0x0000000c 32    0   16    4 SQ_ALU_CONST_BUFFER_SIZE_GS
+FLD  0 0x000001ff 0x00000000 3 DATA
+REG 0x00028200 0x00000000 0x00000006 32    0    1    0 PA_SC_WINDOW_OFFSET
+FLD  0 0x00007fff 0x00000000 3 WINDOW_X_OFFSET
+FLD 16 0x00007fff 0x00000000 3 WINDOW_Y_OFFSET
+REG 0x00028204 0x00000000 0x00000006 32    0    1    0 PA_SC_WINDOW_SCISSOR_TL
+FLD  0 0x00003fff 0x00000000 3 TL_X
+FLD 16 0x00003fff 0x00000000 3 TL_Y
+FLD 31 0x00000001 0x00000000 3 WINDOW_OFFSET_DISABLE
+REG 0x00028208 0x00000000 0x00000006 32    0    1    0 PA_SC_WINDOW_SCISSOR_BR
+FLD  0 0x00003fff 0x00000000 3 BR_X
+FLD 16 0x00003fff 0x00000000 3 BR_Y
+REG 0x0002820c 0x00000000 0x00000006 32    0    1    0 PA_SC_CLIPRECT_RULE
+FLD  0 0x0000ffff 0x00000000 3 CLIP_RULE
+REG 0x00028210 0x00000000 0x00000006 32    0    4    8 PA_SC_CLIPRECT_TL
+FLD  0 0x00003fff 0x00000000 3 TL_X
+FLD 16 0x00003fff 0x00000000 3 TL_Y
+REG 0x00028214 0x00000000 0x00000006 32    0    4    8 PA_SC_CLIPRECT_BR
+FLD  0 0x00003fff 0x00000000 3 BR_X
+FLD 16 0x00003fff 0x00000000 3 BR_Y
+REG 0x00028230 0x00000000 0x00000006 32    0    1    0 PA_SC_EDGERULE
+REG 0x00028238 0x00000000 0x00000001 32    0    1    0 CB_TARGET_MASK
+FLD  0 0x0000000f 0x00000000 3 TARGET0_ENABLE
+FLD  4 0x0000000f 0x00000000 3 TARGET1_ENABLE
+FLD  8 0x0000000f 0x00000000 3 TARGET2_ENABLE
+FLD 12 0x0000000f 0x00000000 3 TARGET3_ENABLE
+FLD 16 0x0000000f 0x00000000 3 TARGET4_ENABLE
+FLD 20 0x0000000f 0x00000000 3 TARGET5_ENABLE
+FLD 24 0x0000000f 0x00000000 3 TARGET6_ENABLE
+FLD 28 0x0000000f 0x00000000 3 TARGET7_ENABLE
+REG 0x0002823c 0x00000000 0x00000001 32    0    1    0 CB_SHADER_MASK
+FLD  0 0x0000000f 0x00000000 3 OUTPUT0_ENABLE
+FLD  4 0x0000000f 0x00000000 3 OUTPUT1_ENABLE
+FLD  8 0x0000000f 0x00000000 3 OUTPUT2_ENABLE
+FLD 12 0x0000000f 0x00000000 3 OUTPUT3_ENABLE
+FLD 16 0x0000000f 0x00000000 3 OUTPUT4_ENABLE
+FLD 20 0x0000000f 0x00000000 3 OUTPUT5_ENABLE
+FLD 24 0x0000000f 0x00000000 3 OUTPUT6_ENABLE
+FLD 28 0x0000000f 0x00000000 3 OUTPUT7_ENABLE
+REG 0x00028240 0x00000000 0x00000006 32    0    1    0 PA_SC_GENERIC_SCISSOR_TL
+FLD  0 0x00003fff 0x00000000 3 TL_X
+FLD 16 0x00003fff 0x00000000 3 TL_Y
+FLD 31 0x00000001 0x00000000 3 WINDOW_OFFSET_DISABLE
+REG 0x00028244 0x00000000 0x00000006 32    0    1    0 PA_SC_GENERIC_SCISSOR_BR
+FLD  0 0x00003fff 0x00000000 3 BR_X
+FLD 16 0x00003fff 0x00000000 3 BR_Y
+REG 0x00028250 0x00000000 0x00000006 32    0   16    8 PA_SC_VPORT_SCISSOR_TL
+FLD  0 0x00003fff 0x00000000 3 TL_X
+FLD 16 0x00003fff 0x00000000 3 TL_Y
+FLD 31 0x00000001 0x00000000 3 WINDOW_OFFSET_DISABLE
+REG 0x00028254 0x00000000 0x00000006 32    0   16    8 PA_SC_VPORT_SCISSOR_BR
+FLD  0 0x00003fff 0x00000000 3 BR_X
+FLD 16 0x00003fff 0x00000000 3 BR_Y
+REG 0x000282d0 0x00000000 0x00000006 32    0   16    8 PA_SC_VPORT_ZMIN
+REG 0x000282d4 0x00000000 0x00000006 32    0   16    8 PA_SC_VPORT_ZMAX
+REG 0x00028350 0x00000000 0x0000000d 32    0    1    0 SX_MISC
+FLD  0 0x00000001 0x00000000 3 MULTIPASS
+REG 0x00028380 0x00000000 0x0000000c 32    0   32    4 SQ_VTX_SEMANTIC
+FLD  0 0x000000ff 0x00000000 3 SEMANTIC_ID
+REG 0x00028400 0x00000000 0x00000010 32    0    1    0 VGT_MAX_VTX_INDX
+REG 0x00028404 0x00000000 0x00000010 32    0    1    0 VGT_MIN_VTX_INDX
+REG 0x00028408 0x00000000 0x00000010 32    0    1    0 VGT_INDX_OFFSET
+REG 0x0002840c 0x00000000 0x00000010 32    0    1    0 VGT_MULTI_PRIM_IB_RESET_INDX
+REG 0x00028410 0x00000000 0x0000000d 32    0    1    0 SX_ALPHA_TEST_CONTROL
+FLD  0 0x00000007 0x00000000 3 ALPHA_FUNC
+VAL 0x00000000 REF_NEVER
+VAL 0x00000001 REF_LESS
+VAL 0x00000002 REF_EQUAL
+VAL 0x00000003 REF_LEQUAL
+VAL 0x00000004 REF_GREATER
+VAL 0x00000005 REF_NOTEQUAL
+VAL 0x00000006 REF_GEQUAL
+VAL 0x00000007 REF_ALWAYS
+FLD  3 0x00000001 0x00000000 3 ALPHA_TEST_ENABLE
+FLD  8 0x00000001 0x00000000 3 ALPHA_TEST_BYPASS
+REG 0x00028414 0x00000000 0x00000001 32    0    1    0 CB_BLEND_RED
+REG 0x00028418 0x00000000 0x00000001 32    0    1    0 CB_BLEND_GREEN
+REG 0x0002841c 0x00000000 0x00000001 32    0    1    0 CB_BLEND_BLUE
+REG 0x00028420 0x00000000 0x00000001 32    0    1    0 CB_BLEND_ALPHA
+REG 0x00028424 0x00000000 0x00000001 32    0    1    0 CB_FOG_RED
+REG 0x00028428 0x00000000 0x00000001 32    0    1    0 CB_FOG_GREEN
+REG 0x0002842c 0x00000000 0x00000001 32    0    1    0 CB_FOG_BLUE
+REG 0x00028430 0x00000000 0x00000003 32    0    1    0 DB_STENCILREFMASK
+FLD  0 0x000000ff 0x00000000 3 STENCILREF
+FLD  8 0x000000ff 0x00000000 3 STENCILMASK
+FLD 16 0x000000ff 0x00000000 3 STENCILWRITEMASK
+REG 0x00028434 0x00000000 0x00000003 32    0    1    0 DB_STENCILREFMASK_BF
+FLD  0 0x000000ff 0x00000000 3 STENCILREF_BF
+FLD  8 0x000000ff 0x00000000 3 STENCILMASK_BF
+FLD 16 0x000000ff 0x00000000 3 STENCILWRITEMASK_BF
+REG 0x00028438 0x00000000 0x0000000d 32    0    1    0 SX_ALPHA_REF
+REG 0x0002843c 0x00000000 0x00000006 32    0   16   24 PA_CL_VPORT_XSCALE
+REG 0x00028440 0x00000000 0x00000006 32    0   16   24 PA_CL_VPORT_XOFFSET
+REG 0x00028444 0x00000000 0x00000006 32    0   16   24 PA_CL_VPORT_YSCALE
+REG 0x00028448 0x00000000 0x00000006 32    0   16   24 PA_CL_VPORT_YOFFSET
+REG 0x0002844c 0x00000000 0x00000006 32    0   16   24 PA_CL_VPORT_ZSCALE
+REG 0x00028450 0x00000000 0x00000006 32    0   16   24 PA_CL_VPORT_ZOFFSET
+REG 0x00028614 0x00000000 0x0000000e 32    0   10    4 SPI_VS_OUT_ID
+FLD  0 0x000000ff 0x00000000 3 SEMANTIC_0
+FLD  8 0x000000ff 0x00000000 3 SEMANTIC_1
+FLD 16 0x000000ff 0x00000000 3 SEMANTIC_2
+FLD 24 0x000000ff 0x00000000 3 SEMANTIC_3
+REG 0x00028644 0x00000000 0x0000000e 32    0   32    4 SPI_PS_INPUT_CNTL
+FLD  0 0x000000ff 0x00000000 3 SEMANTIC
+FLD  8 0x00000003 0x00000000 3 DEFAULT_VAL
+VAL 0x00000000 X_0_0F
+FLD 10 0x00000001 0x00000000 3 FLAT_SHADE
+FLD 11 0x00000001 0x00000000 3 SEL_CENTROID
+FLD 12 0x00000001 0x00000000 3 SEL_LINEAR
+FLD 13 0x0000000f 0x00000000 3 CYL_WRAP
+FLD 17 0x00000001 0x00000000 3 PT_SPRITE_TEX
+FLD 18 0x00000001 0x00000000 3 SEL_SAMPLE
+REG 0x000286c4 0x00000000 0x0000000e 32    0    1    0 SPI_VS_OUT_CONFIG
+FLD  0 0x00000001 0x00000000 3 VS_PER_COMPONENT
+FLD  1 0x0000001f 0x00000000 3 VS_EXPORT_COUNT
+FLD  8 0x00000001 0x00000000 3 VS_EXPORTS_FOG
+FLD  9 0x0000001f 0x00000000 3 VS_OUT_FOG_VEC_ADDR
+REG 0x000286c8 0x00000000 0x0000000e 32    0    1    0 SPI_THREAD_GROUPING
+FLD  0 0x0000001f 0x00000000 3 PS_GROUPING
+FLD  8 0x0000001f 0x00000000 3 VS_GROUPING
+FLD 16 0x0000001f 0x00000000 3 GS_GROUPING
+FLD 24 0x0000001f 0x00000000 3 ES_GROUPING
+REG 0x000286cc 0x00000000 0x0000000e 32    0    1    0 SPI_PS_IN_CONTROL_0
+FLD  0 0x0000003f 0x00000000 3 NUM_INTERP
+FLD  8 0x00000001 0x00000000 3 POSITION_ENA
+FLD  9 0x00000001 0x00000000 3 POSITION_CENTROID
+FLD 10 0x0000001f 0x00000000 3 POSITION_ADDR
+FLD 15 0x0000000f 0x00000000 3 PARAM_GEN
+FLD 19 0x0000007f 0x00000000 3 PARAM_GEN_ADDR
+FLD 26 0x00000003 0x00000000 3 BARYC_SAMPLE_CNTL
+VAL 0x00000000 CENTROIDS_ONLY
+VAL 0x00000001 CENTERS_ONLY
+VAL 0x00000002 CENTROIDS_AND_CENTERS
+VAL 0x00000003 UNDEF
+FLD 28 0x00000001 0x00000000 3 PERSP_GRADIENT_ENA
+FLD 29 0x00000001 0x00000000 3 LINEAR_GRADIENT_ENA
+FLD 30 0x00000001 0x00000000 3 POSITION_SAMPLE
+FLD 31 0x00000001 0x00000000 3 BARYC_AT_SAMPLE_ENA
+REG 0x000286d0 0x00000000 0x0000000e 32    0    1    0 SPI_PS_IN_CONTROL_1
+FLD  0 0x00000001 0x00000000 3 GEN_INDEX_PIX
+FLD  1 0x0000007f 0x00000000 3 GEN_INDEX_PIX_ADDR
+FLD  8 0x00000001 0x00000000 3 FRONT_FACE_ENA
+FLD  9 0x00000003 0x00000000 3 FRONT_FACE_CHAN
+FLD 11 0x00000001 0x00000000 3 FRONT_FACE_ALL_BITS
+FLD 12 0x0000001f 0x00000000 3 FRONT_FACE_ADDR
+FLD 17 0x0000007f 0x00000000 3 FOG_ADDR
+FLD 24 0x00000001 0x00000000 3 FIXED_PT_POSITION_ENA
+FLD 25 0x0000001f 0x00000000 3 FIXED_PT_POSITION_ADDR
+REG 0x000286d4 0x00000000 0x0000000e 32    0    1    0 SPI_INTERP_CONTROL_0
+FLD  0 0x00000001 0x00000000 3 FLAT_SHADE_ENA
+FLD  1 0x00000001 0x00000000 3 PNT_SPRITE_ENA
+FLD  2 0x00000007 0x00000000 3 PNT_SPRITE_OVRD_X
+VAL 0x00000000 SPI_PNT_SPRITE_SEL_0
+VAL 0x00000001 SPI_PNT_SPRITE_SEL_1
+VAL 0x00000002 SPI_PNT_SPRITE_SEL_S
+VAL 0x00000003 SPI_PNT_SPRITE_SEL_T
+VAL 0x00000004 SPI_PNT_SPRITE_SEL_NONE
+FLD  5 0x00000007 0x00000000 3 PNT_SPRITE_OVRD_Y
+VAL 0x00000000 SPI_PNT_SPRITE_SEL_0
+VAL 0x00000001 SPI_PNT_SPRITE_SEL_1
+VAL 0x00000002 SPI_PNT_SPRITE_SEL_S
+VAL 0x00000003 SPI_PNT_SPRITE_SEL_T
+VAL 0x00000004 SPI_PNT_SPRITE_SEL_NONE
+FLD  8 0x00000007 0x00000000 3 PNT_SPRITE_OVRD_Z
+VAL 0x00000000 SPI_PNT_SPRITE_SEL_0
+VAL 0x00000001 SPI_PNT_SPRITE_SEL_1
+VAL 0x00000002 SPI_PNT_SPRITE_SEL_S
+VAL 0x00000003 SPI_PNT_SPRITE_SEL_T
+VAL 0x00000004 SPI_PNT_SPRITE_SEL_NONE
+FLD 11 0x00000007 0x00000000 3 PNT_SPRITE_OVRD_W
+VAL 0x00000000 SPI_PNT_SPRITE_SEL_0
+VAL 0x00000001 SPI_PNT_SPRITE_SEL_1
+VAL 0x00000002 SPI_PNT_SPRITE_SEL_S
+VAL 0x00000003 SPI_PNT_SPRITE_SEL_T
+VAL 0x00000004 SPI_PNT_SPRITE_SEL_NONE
+FLD 14 0x00000001 0x00000000 3 PNT_SPRITE_TOP_1
+REG 0x000286d8 0x00000000 0x0000000e 32    0    1    0 SPI_INPUT_Z
+FLD  0 0x00000001 0x00000000 3 PROVIDE_Z_TO_SPI
+REG 0x000286dc 0x00000000 0x0000000e 32    0    1    0 SPI_FOG_CNTL
+FLD  0 0x00000001 0x00000000 3 PASS_FOG_THROUGH_PS
+FLD  1 0x00000003 0x00000000 3 PIXEL_FOG_FUNC
+VAL 0x00000000 SPI_FOG_NONE
+VAL 0x00000001 SPI_FOG_EXP
+VAL 0x00000002 SPI_FOG_EXP2
+VAL 0x00000003 SPI_FOG_LINEAR
+FLD  3 0x00000001 0x00000000 3 PIXEL_FOG_SRC_SEL
+FLD  4 0x00000001 0x00000000 3 VS_FOG_CLAMP_DISABLE
+REG 0x000286e0 0x00000000 0x0000000e 32    0    1    0 SPI_FOG_FUNC_SCALE
+REG 0x000286e4 0x00000000 0x0000000e 32    0    1    0 SPI_FOG_FUNC_BIAS
+REG 0x00028780 0x00000000 0x00000001 32    0    8    4 CB_BLEND_CONTROL
+FLD  0 0x0000001f 0x00000000 3 COLOR_SRCBLEND
+FLD  5 0x00000007 0x00000000 3 COLOR_COMB_FCN
+FLD  8 0x0000001f 0x00000000 3 COLOR_DESTBLEND
+FLD 13 0x00000001 0x00000000 3 OPACITY_WEIGHT
+FLD 16 0x0000001f 0x00000000 3 ALPHA_SRCBLEND
+FLD 21 0x00000007 0x00000000 3 ALPHA_COMB_FCN
+FLD 24 0x0000001f 0x00000000 3 ALPHA_DESTBLEND
+FLD 29 0x00000001 0x00000000 3 SEPARATE_ALPHA_BLEND
+REG 0x000287a0 0x00000000 0x00000001 32    0    1    0 CB_SHADER_CONTROL
+FLD  0 0x00000001 0x00000000 3 RT0_ENABLE
+FLD  1 0x00000001 0x00000000 3 RT1_ENABLE
+FLD  2 0x00000001 0x00000000 3 RT2_ENABLE
+FLD  3 0x00000001 0x00000000 3 RT3_ENABLE
+FLD  4 0x00000001 0x00000000 3 RT4_ENABLE
+FLD  5 0x00000001 0x00000000 3 RT5_ENABLE
+FLD  6 0x00000001 0x00000000 3 RT6_ENABLE
+FLD  7 0x00000001 0x00000000 3 RT7_ENABLE
+REG 0x000287e4 0x00000000 0x00000010 32    0    1    0 VGT_DMA_BASE_HI
+FLD  0 0x000000ff 0x00000000 3 BASE_ADDR
+REG 0x000287e8 0x00000000 0x00000010 32    0    1    0 VGT_DMA_BASE
+REG 0x000287f0 0x00000000 0x00000010 32    0    1    0 VGT_DRAW_INITIATOR
+FLD  0 0x00000003 0x00000000 3 SOURCE_SELECT
+VAL 0x00000000 DI_SRC_SEL_DMA
+VAL 0x00000001 DI_SRC_SEL_IMMEDIATE
+VAL 0x00000002 DI_SRC_SEL_AUTO_INDEX
+VAL 0x00000003 DI_SRC_SEL_RESERVED
+FLD  2 0x00000003 0x00000000 3 MAJOR_MODE
+VAL 0x00000000 DI_MAJOR_MODE_0
+VAL 0x00000001 DI_MAJOR_MODE_1
+FLD  4 0x00000001 0x00000000 3 SPRITE_EN
+FLD  5 0x00000001 0x00000000 3 NOT_EOP
+FLD  6 0x00000001 0x00000000 3 USE_OPAQUE
+REG 0x000287f4 0x00000000 0x00000010 32    0    1    0 VGT_IMMED_DATA
+REG 0x000287f8 0x00000000 0x00000010 32    0    1    0 VGT_EVENT_ADDRESS_REG
+FLD  0 0x0fffffff 0x00000000 3 ADDRESS_LOW
+REG 0x00028800 0x00000000 0x00000003 32    0    1    0 DB_DEPTH_CONTROL
+FLD  0 0x00000001 0x00000000 3 STENCIL_ENABLE
+FLD  1 0x00000001 0x00000000 3 Z_ENABLE
+FLD  2 0x00000001 0x00000000 3 Z_WRITE_ENABLE
+FLD  4 0x00000007 0x00000000 3 ZFUNC
+VAL 0x00000000 FRAG_NEVER
+VAL 0x00000001 FRAG_LESS
+VAL 0x00000002 FRAG_EQUAL
+VAL 0x00000003 FRAG_LEQUAL
+VAL 0x00000004 FRAG_GREATER
+VAL 0x00000005 FRAG_NOTEQUAL
+VAL 0x00000006 FRAG_GEQUAL
+VAL 0x00000007 FRAG_ALWAYS
+FLD  7 0x00000001 0x00000000 3 BACKFACE_ENABLE
+FLD  8 0x00000007 0x00000000 3 STENCILFUNC
+VAL 0x00000000 REF_NEVER
+VAL 0x00000001 REF_LESS
+VAL 0x00000002 REF_EQUAL
+VAL 0x00000003 REF_LEQUAL
+VAL 0x00000004 REF_GREATER
+VAL 0x00000005 REF_NOTEQUAL
+VAL 0x00000006 REF_GEQUAL
+VAL 0x00000007 REF_ALWAYS
+FLD 11 0x00000007 0x00000000 3 STENCILFAIL
+VAL 0x00000000 STENCIL_KEEP
+VAL 0x00000001 STENCIL_ZERO
+VAL 0x00000002 STENCIL_REPLACE
+VAL 0x00000003 STENCIL_INCR_CLAMP
+VAL 0x00000004 STENCIL_DECR_CLAMP
+VAL 0x00000005 STENCIL_INVERT
+VAL 0x00000006 STENCIL_INCR_WRAP
+VAL 0x00000007 STENCIL_DECR_WRAP
+FLD 14 0x00000007 0x00000000 3 STENCILZPASS
+VAL 0x00000000 STENCIL_KEEP
+VAL 0x00000001 STENCIL_ZERO
+VAL 0x00000002 STENCIL_REPLACE
+VAL 0x00000003 STENCIL_INCR_CLAMP
+VAL 0x00000004 STENCIL_DECR_CLAMP
+VAL 0x00000005 STENCIL_INVERT
+VAL 0x00000006 STENCIL_INCR_WRAP
+VAL 0x00000007 STENCIL_DECR_WRAP
+FLD 17 0x00000007 0x00000000 3 STENCILZFAIL
+VAL 0x00000000 STENCIL_KEEP
+VAL 0x00000001 STENCIL_ZERO
+VAL 0x00000002 STENCIL_REPLACE
+VAL 0x00000003 STENCIL_INCR_CLAMP
+VAL 0x00000004 STENCIL_DECR_CLAMP
+VAL 0x00000005 STENCIL_INVERT
+VAL 0x00000006 STENCIL_INCR_WRAP
+VAL 0x00000007 STENCIL_DECR_WRAP
+FLD 20 0x00000007 0x00000000 3 STENCILFUNC_BF
+VAL 0x00000000 REF_NEVER
+VAL 0x00000001 REF_LESS
+VAL 0x00000002 REF_EQUAL
+VAL 0x00000003 REF_LEQUAL
+VAL 0x00000004 REF_GREATER
+VAL 0x00000005 REF_NOTEQUAL
+VAL 0x00000006 REF_GEQUAL
+VAL 0x00000007 REF_ALWAYS
+FLD 23 0x00000007 0x00000000 3 STENCILFAIL_BF
+VAL 0x00000000 STENCIL_KEEP
+VAL 0x00000001 STENCIL_ZERO
+VAL 0x00000002 STENCIL_REPLACE
+VAL 0x00000003 STENCIL_INCR_CLAMP
+VAL 0x00000004 STENCIL_DECR_CLAMP
+VAL 0x00000005 STENCIL_INVERT
+VAL 0x00000006 STENCIL_INCR_WRAP
+VAL 0x00000007 STENCIL_DECR_WRAP
+FLD 26 0x00000007 0x00000000 3 STENCILZPASS_BF
+VAL 0x00000000 STENCIL_KEEP
+VAL 0x00000001 STENCIL_ZERO
+VAL 0x00000002 STENCIL_REPLACE
+VAL 0x00000003 STENCIL_INCR_CLAMP
+VAL 0x00000004 STENCIL_DECR_CLAMP
+VAL 0x00000005 STENCIL_INVERT
+VAL 0x00000006 STENCIL_INCR_WRAP
+VAL 0x00000007 STENCIL_DECR_WRAP
+FLD 29 0x00000007 0x00000000 3 STENCILZFAIL_BF
+VAL 0x00000000 STENCIL_KEEP
+VAL 0x00000001 STENCIL_ZERO
+VAL 0x00000002 STENCIL_REPLACE
+VAL 0x00000003 STENCIL_INCR_CLAMP
+VAL 0x00000004 STENCIL_DECR_CLAMP
+VAL 0x00000005 STENCIL_INVERT
+VAL 0x00000006 STENCIL_INCR_WRAP
+VAL 0x00000007 STENCIL_DECR_WRAP
+REG 0x00028804 0x00000000 0x00000001 32    0    1    0 CB_BLEND_CONTROL
+FLD  0 0x0000001f 0x00000000 3 COLOR_SRCBLEND
+VAL 0x00000000 BLEND_ZERO
+VAL 0x00000001 BLEND_ONE
+VAL 0x00000002 BLEND_SRC_COLOR
+VAL 0x00000003 BLEND_ONE_MINUS_SRC_COLOR
+VAL 0x00000004 BLEND_SRC_ALPHA
+VAL 0x00000005 BLEND_ONE_MINUS_SRC_ALPHA
+VAL 0x00000006 BLEND_DST_ALPHA
+VAL 0x00000007 BLEND_ONE_MINUS_DST_ALPHA
+VAL 0x00000008 BLEND_DST_COLOR
+VAL 0x00000009 BLEND_ONE_MINUS_DST_COLOR
+VAL 0x0000000a BLEND_SRC_ALPHA_SATURATE
+VAL 0x0000000b BLEND_BOTH_SRC_ALPHA
+VAL 0x0000000c BLEND_BOTH_INV_SRC_ALPHA
+VAL 0x0000000d BLEND_CONSTANT_COLOR
+VAL 0x0000000e BLEND_ONE_MINUS_CONSTANT_COLOR
+VAL 0x0000000f BLEND_SRC1_COLOR
+VAL 0x00000010 BLEND_INV_SRC1_COLOR
+VAL 0x00000011 BLEND_SRC1_ALPHA
+VAL 0x00000012 BLEND_INV_SRC1_ALPHA
+VAL 0x00000013 BLEND_CONSTANT_ALPHA
+VAL 0x00000014 BLEND_ONE_MINUS_CONSTANT_ALPHA
+FLD  5 0x00000007 0x00000000 3 COLOR_COMB_FCN
+VAL 0x00000000 COMB_DST_PLUS_SRC
+VAL 0x00000001 COMB_SRC_MINUS_DST
+VAL 0x00000002 COMB_MIN_DST_SRC
+VAL 0x00000003 COMB_MAX_DST_SRC
+VAL 0x00000004 COMB_DST_MINUS_SRC
+FLD  8 0x0000001f 0x00000000 3 COLOR_DESTBLEND
+VAL 0x00000000 BLEND_ZERO
+VAL 0x00000001 BLEND_ONE
+VAL 0x00000002 BLEND_SRC_COLOR
+VAL 0x00000003 BLEND_ONE_MINUS_SRC_COLOR
+VAL 0x00000004 BLEND_SRC_ALPHA
+VAL 0x00000005 BLEND_ONE_MINUS_SRC_ALPHA
+VAL 0x00000006 BLEND_DST_ALPHA
+VAL 0x00000007 BLEND_ONE_MINUS_DST_ALPHA
+VAL 0x00000008 BLEND_DST_COLOR
+VAL 0x00000009 BLEND_ONE_MINUS_DST_COLOR
+VAL 0x0000000a BLEND_SRC_ALPHA_SATURATE
+VAL 0x0000000b BLEND_BOTH_SRC_ALPHA
+VAL 0x0000000c BLEND_BOTH_INV_SRC_ALPHA
+VAL 0x0000000d BLEND_CONSTANT_COLOR
+VAL 0x0000000e BLEND_ONE_MINUS_CONSTANT_COLOR
+VAL 0x0000000f BLEND_SRC1_COLOR
+VAL 0x00000010 BLEND_INV_SRC1_COLOR
+VAL 0x00000011 BLEND_SRC1_ALPHA
+VAL 0x00000012 BLEND_INV_SRC1_ALPHA
+VAL 0x00000013 BLEND_CONSTANT_ALPHA
+VAL 0x00000014 BLEND_ONE_MINUS_CONSTANT_ALPHA
+FLD 13 0x00000001 0x00000000 3 OPACITY_WEIGHT
+FLD 16 0x0000001f 0x00000000 3 ALPHA_SRCBLEND
+VAL 0x00000000 BLEND_ZERO
+VAL 0x00000001 BLEND_ONE
+VAL 0x00000002 BLEND_SRC_COLOR
+VAL 0x00000003 BLEND_ONE_MINUS_SRC_COLOR
+VAL 0x00000004 BLEND_SRC_ALPHA
+VAL 0x00000005 BLEND_ONE_MINUS_SRC_ALPHA
+VAL 0x00000006 BLEND_DST_ALPHA
+VAL 0x00000007 BLEND_ONE_MINUS_DST_ALPHA
+VAL 0x00000008 BLEND_DST_COLOR
+VAL 0x00000009 BLEND_ONE_MINUS_DST_COLOR
+VAL 0x0000000a BLEND_SRC_ALPHA_SATURATE
+VAL 0x0000000b BLEND_BOTH_SRC_ALPHA
+VAL 0x0000000c BLEND_BOTH_INV_SRC_ALPHA
+VAL 0x0000000d BLEND_CONSTANT_COLOR
+VAL 0x0000000e BLEND_ONE_MINUS_CONSTANT_COLOR
+VAL 0x0000000f BLEND_SRC1_COLOR
+VAL 0x00000010 BLEND_INV_SRC1_COLOR
+VAL 0x00000011 BLEND_SRC1_ALPHA
+VAL 0x00000012 BLEND_INV_SRC1_ALPHA
+VAL 0x00000013 BLEND_CONSTANT_ALPHA
+VAL 0x00000014 BLEND_ONE_MINUS_CONSTANT_ALPHA
+FLD 21 0x00000007 0x00000000 3 ALPHA_COMB_FCN
+VAL 0x00000000 COMB_DST_PLUS_SRC
+VAL 0x00000001 COMB_SRC_MINUS_DST
+VAL 0x00000002 COMB_MIN_DST_SRC
+VAL 0x00000003 COMB_MAX_DST_SRC
+VAL 0x00000004 COMB_DST_MINUS_SRC
+FLD 24 0x0000001f 0x00000000 3 ALPHA_DESTBLEND
+VAL 0x00000000 BLEND_ZERO
+VAL 0x00000001 BLEND_ONE
+VAL 0x00000002 BLEND_SRC_COLOR
+VAL 0x00000003 BLEND_ONE_MINUS_SRC_COLOR
+VAL 0x00000004 BLEND_SRC_ALPHA
+VAL 0x00000005 BLEND_ONE_MINUS_SRC_ALPHA
+VAL 0x00000006 BLEND_DST_ALPHA
+VAL 0x00000007 BLEND_ONE_MINUS_DST_ALPHA
+VAL 0x00000008 BLEND_DST_COLOR
+VAL 0x00000009 BLEND_ONE_MINUS_DST_COLOR
+VAL 0x0000000a BLEND_SRC_ALPHA_SATURATE
+VAL 0x0000000b BLEND_BOTH_SRC_ALPHA
+VAL 0x0000000c BLEND_BOTH_INV_SRC_ALPHA
+VAL 0x0000000d BLEND_CONSTANT_COLOR
+VAL 0x0000000e BLEND_ONE_MINUS_CONSTANT_COLOR
+VAL 0x0000000f BLEND_SRC1_COLOR
+VAL 0x00000010 BLEND_INV_SRC1_COLOR
+VAL 0x00000011 BLEND_SRC1_ALPHA
+VAL 0x00000012 BLEND_INV_SRC1_ALPHA
+VAL 0x00000013 BLEND_CONSTANT_ALPHA
+VAL 0x00000014 BLEND_ONE_MINUS_CONSTANT_ALPHA
+FLD 29 0x00000001 0x00000000 3 SEPARATE_ALPHA_BLEND
+REG 0x00028808 0x00000000 0x00000001 32    0    1    0 CB_COLOR_CONTROL
+FLD  0 0x00000001 0x00000000 3 FOG_ENABLE
+FLD  1 0x00000001 0x00000000 3 MULTIWRITE_ENABLE
+FLD  2 0x00000001 0x00000000 3 DITHER_ENABLE
+FLD  3 0x00000001 0x00000000 3 DEGAMMA_ENABLE
+FLD  4 0x00000007 0x00000000 3 SPECIAL_OP
+VAL 0x00000000 SPECIAL_NORMAL
+VAL 0x00000001 SPECIAL_DISABLE
+VAL 0x00000002 SPECIAL_FAST_CLEAR
+VAL 0x00000003 SPECIAL_FORCE_CLEAR
+VAL 0x00000004 SPECIAL_EXPAND_COLOR
+VAL 0x00000005 SPECIAL_EXPAND_TEXTURE
+VAL 0x00000006 SPECIAL_EXPAND_SAMPLES
+VAL 0x00000007 SPECIAL_RESOLVE_BOX
+FLD  7 0x00000001 0x00000000 3 PER_MRT_BLEND
+FLD  8 0x000000ff 0x00000000 3 TARGET_BLEND_ENABLE
+FLD 16 0x000000ff 0x00000000 3 ROP3
+VAL 0x00000000 ROP3_ZERO
+VAL 0x00000011 ROP3_NOR
+VAL 0x00000025 ROP3_AND_INVERTED
+VAL 0x00000033 ROP3_COPY_INVERTED
+VAL 0x00000044 ROP3_AND_REVERSE
+VAL 0x00000055 ROP3_INVERT
+VAL 0x00000066 ROP3_XOR
+VAL 0x00000077 ROP3_NAND
+VAL 0x00000088 ROP3_AND
+VAL 0x00000099 ROP3_EQUIV
+VAL 0x000000aa ROP3_NOOP
+VAL 0x000000bb ROP3_OR_INVERTED
+VAL 0x000000cc ROP3_COPY
+VAL 0x000000dd ROP3_OR_REVERSE
+VAL 0x000000ee ROP3_OR
+VAL 0x000000ff ROP3_ONE
+REG 0x0002880c 0x00000000 0x00000003 32    0    1    0 DB_SHADER_CONTROL
+FLD  0 0x00000001 0x00000000 3 Z_EXPORT_ENABLE
+FLD  1 0x00000001 0x00000000 3 STENCIL_REF_EXPORT_ENABLE
+FLD  4 0x00000003 0x00000000 3 Z_ORDER
+VAL 0x00000000 LATE_Z
+VAL 0x00000001 EARLY_Z_THEN_LATE_Z
+VAL 0x00000002 RE_Z
+VAL 0x00000003 EARLY_Z_THEN_RE_Z
+FLD  6 0x00000001 0x00000000 3 KILL_ENABLE
+FLD  7 0x00000001 0x00000000 3 COVERAGE_TO_MASK_ENABLE
+FLD  8 0x00000001 0x00000000 3 MASK_EXPORT_ENABLE
+FLD  9 0x00000001 0x00000000 3 DUAL_EXPORT_ENABLE
+FLD 10 0x00000001 0x00000000 3 EXEC_ON_HIER_FAIL
+FLD 11 0x00000001 0x00000000 3 EXEC_ON_NOOP
+REG 0x00028810 0x00000000 0x00000006 32    0    1    0 PA_CL_CLIP_CNTL
+FLD  0 0x00000001 0x00000000 3 UCP_ENA_0
+FLD  1 0x00000001 0x00000000 3 UCP_ENA_1
+FLD  2 0x00000001 0x00000000 3 UCP_ENA_2
+FLD  3 0x00000001 0x00000000 3 UCP_ENA_3
+FLD  4 0x00000001 0x00000000 3 UCP_ENA_4
+FLD  5 0x00000001 0x00000000 3 UCP_ENA_5
+FLD 13 0x00000001 0x00000000 3 PS_UCP_Y_SCALE_NEG
+FLD 14 0x00000003 0x00000000 3 PS_UCP_MODE
+FLD 16 0x00000001 0x00000000 3 CLIP_DISABLE
+FLD 17 0x00000001 0x00000000 3 UCP_CULL_ONLY_ENA
+FLD 18 0x00000001 0x00000000 3 BOUNDARY_EDGE_FLAG_ENA
+FLD 19 0x00000001 0x00000000 3 DX_CLIP_SPACE_DEF
+FLD 20 0x00000001 0x00000000 3 DIS_CLIP_ERR_DETECT
+FLD 21 0x00000001 0x00000000 3 VTX_KILL_OR
+FLD 24 0x00000001 0x00000000 3 DX_LINEAR_ATTR_CLIP_ENA
+FLD 25 0x00000001 0x00000000 3 VTE_VPORT_PROVOKE_DISABLE
+FLD 26 0x00000001 0x00000000 3 ZCLIP_NEAR_DISABLE
+FLD 27 0x00000001 0x00000000 3 ZCLIP_FAR_DISABLE
+REG 0x00028814 0x00000000 0x00000006 32    0    1    0 PA_SU_SC_MODE_CNTL
+FLD  0 0x00000001 0x00000000 3 CULL_FRONT
+FLD  1 0x00000001 0x00000000 3 CULL_BACK
+FLD  2 0x00000001 0x00000000 3 FACE
+FLD  3 0x00000003 0x00000000 3 POLY_MODE
+VAL 0x00000000 X_DISABLE_POLY_MODE
+VAL 0x00000001 X_DUAL_MODE
+FLD  5 0x00000007 0x00000000 3 POLYMODE_FRONT_PTYPE
+VAL 0x00000000 X_DRAW_POINTS
+VAL 0x00000001 X_DRAW_LINES
+VAL 0x00000002 X_DRAW_TRIANGLES
+FLD  8 0x00000007 0x00000000 3 POLYMODE_BACK_PTYPE
+VAL 0x00000000 X_DRAW_POINTS
+VAL 0x00000001 X_DRAW_LINES
+VAL 0x00000002 X_DRAW_TRIANGLES
+FLD 11 0x00000001 0x00000000 3 POLY_OFFSET_FRONT_ENABLE
+FLD 12 0x00000001 0x00000000 3 POLY_OFFSET_BACK_ENABLE
+FLD 13 0x00000001 0x00000000 3 POLY_OFFSET_PARA_ENABLE
+FLD 16 0x00000001 0x00000000 3 VTX_WINDOW_OFFSET_ENABLE
+FLD 19 0x00000001 0x00000000 3 PROVOKING_VTX_LAST
+FLD 20 0x00000001 0x00000000 3 PERSP_CORR_DIS
+FLD 21 0x00000001 0x00000000 3 MULTI_PRIM_IB_ENA
+REG 0x00028818 0x00000000 0x00000006 32    0    1    0 PA_CL_VTE_CNTL
+FLD  0 0x00000001 0x00000000 3 VPORT_X_SCALE_ENA
+FLD  1 0x00000001 0x00000000 3 VPORT_X_OFFSET_ENA
+FLD  2 0x00000001 0x00000000 3 VPORT_Y_SCALE_ENA
+FLD  3 0x00000001 0x00000000 3 VPORT_Y_OFFSET_ENA
+FLD  4 0x00000001 0x00000000 3 VPORT_Z_SCALE_ENA
+FLD  5 0x00000001 0x00000000 3 VPORT_Z_OFFSET_ENA
+FLD  8 0x00000001 0x00000000 3 VTX_XY_FMT
+FLD  9 0x00000001 0x00000000 3 VTX_Z_FMT
+FLD 10 0x00000001 0x00000000 3 VTX_W0_FMT
+FLD 11 0x00000001 0x00000000 3 PERFCOUNTER_REF
+REG 0x0002881c 0x00000000 0x00000006 32    0    1    0 PA_CL_VS_OUT_CNTL
+FLD  0 0x00000001 0x00000000 3 CLIP_DIST_ENA_0
+FLD  1 0x00000001 0x00000000 3 CLIP_DIST_ENA_1
+FLD  2 0x00000001 0x00000000 3 CLIP_DIST_ENA_2
+FLD  3 0x00000001 0x00000000 3 CLIP_DIST_ENA_3
+FLD  4 0x00000001 0x00000000 3 CLIP_DIST_ENA_4
+FLD  5 0x00000001 0x00000000 3 CLIP_DIST_ENA_5
+FLD  6 0x00000001 0x00000000 3 CLIP_DIST_ENA_6
+FLD  7 0x00000001 0x00000000 3 CLIP_DIST_ENA_7
+FLD  8 0x00000001 0x00000000 3 CULL_DIST_ENA_0
+FLD  9 0x00000001 0x00000000 3 CULL_DIST_ENA_1
+FLD 10 0x00000001 0x00000000 3 CULL_DIST_ENA_2
+FLD 11 0x00000001 0x00000000 3 CULL_DIST_ENA_3
+FLD 12 0x00000001 0x00000000 3 CULL_DIST_ENA_4
+FLD 13 0x00000001 0x00000000 3 CULL_DIST_ENA_5
+FLD 14 0x00000001 0x00000000 3 CULL_DIST_ENA_6
+FLD 15 0x00000001 0x00000000 3 CULL_DIST_ENA_7
+FLD 16 0x00000001 0x00000000 3 USE_VTX_POINT_SIZE
+FLD 17 0x00000001 0x00000000 3 USE_VTX_EDGE_FLAG
+FLD 18 0x00000001 0x00000000 3 USE_VTX_RENDER_TARGET_INDX
+FLD 19 0x00000001 0x00000000 3 USE_VTX_VIEWPORT_INDX
+FLD 20 0x00000001 0x00000000 3 USE_VTX_KILL_FLAG
+FLD 21 0x00000001 0x00000000 3 VS_OUT_MISC_VEC_ENA
+FLD 22 0x00000001 0x00000000 3 VS_OUT_CCDIST0_VEC_ENA
+FLD 23 0x00000001 0x00000000 3 VS_OUT_CCDIST1_VEC_ENA
+REG 0x00028820 0x00000000 0x00000006 32    0    1    0 PA_CL_NANINF_CNTL
+FLD  0 0x00000001 0x00000000 3 VTE_XY_INF_DISCARD
+FLD  1 0x00000001 0x00000000 3 VTE_Z_INF_DISCARD
+FLD  2 0x00000001 0x00000000 3 VTE_W_INF_DISCARD
+FLD  3 0x00000001 0x00000000 3 VTE_0XNANINF_IS_0
+FLD  4 0x00000001 0x00000000 3 VTE_XY_NAN_RETAIN
+FLD  5 0x00000001 0x00000000 3 VTE_Z_NAN_RETAIN
+FLD  6 0x00000001 0x00000000 3 VTE_W_NAN_RETAIN
+FLD  7 0x00000001 0x00000000 3 VTE_W_RECIP_NAN_IS_0
+FLD  8 0x00000001 0x00000000 3 VS_XY_NAN_TO_INF
+FLD  9 0x00000001 0x00000000 3 VS_XY_INF_RETAIN
+FLD 10 0x00000001 0x00000000 3 VS_Z_NAN_TO_INF
+FLD 11 0x00000001 0x00000000 3 VS_Z_INF_RETAIN
+FLD 12 0x00000001 0x00000000 3 VS_W_NAN_TO_INF
+FLD 13 0x00000001 0x00000000 3 VS_W_INF_RETAIN
+FLD 14 0x00000001 0x00000000 3 VS_CLIP_DIST_INF_DISCARD
+FLD 20 0x00000001 0x00000000 3 VTE_NO_OUTPUT_NEG_0
+REG 0x00028840 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_START_PS
+REG 0x00028850 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_RESOURCES_PS
+FLD  0 0x000000ff 0x00000000 3 NUM_GPRS
+FLD  8 0x000000ff 0x00000000 3 STACK_SIZE
+FLD 21 0x00000001 0x00000000 3 DX10_CLAMP
+FLD 24 0x00000007 0x00000000 3 FETCH_CACHE_LINES
+FLD 28 0x00000001 0x00000000 3 UNCACHED_FIRST_INST
+FLD 31 0x00000001 0x00000000 3 CLAMP_CONSTS
+REG 0x00028854 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_EXPORTS_PS
+FLD  0 0x0000001f 0x00000000 3 EXPORT_MODE
+REG 0x00028858 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_START_VS
+REG 0x00028868 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_RESOURCES_VS
+FLD  0 0x000000ff 0x00000000 3 NUM_GPRS
+FLD  8 0x000000ff 0x00000000 3 STACK_SIZE
+FLD 21 0x00000001 0x00000000 3 DX10_CLAMP
+FLD 24 0x00000007 0x00000000 3 FETCH_CACHE_LINES
+FLD 28 0x00000001 0x00000000 3 UNCACHED_FIRST_INST
+REG 0x0002886c 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_START_GS
+REG 0x0002887c 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_RESOURCES_GS
+FLD  0 0x000000ff 0x00000000 3 NUM_GPRS
+FLD  8 0x000000ff 0x00000000 3 STACK_SIZE
+FLD 21 0x00000001 0x00000000 3 DX10_CLAMP
+FLD 24 0x00000007 0x00000000 3 FETCH_CACHE_LINES
+FLD 28 0x00000001 0x00000000 3 UNCACHED_FIRST_INST
+REG 0x00028880 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_START_ES
+REG 0x00028890 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_RESOURCES_ES
+FLD  0 0x000000ff 0x00000000 3 NUM_GPRS
+FLD  8 0x000000ff 0x00000000 3 STACK_SIZE
+FLD 21 0x00000001 0x00000000 3 DX10_CLAMP
+FLD 24 0x00000007 0x00000000 3 FETCH_CACHE_LINES
+FLD 28 0x00000001 0x00000000 3 UNCACHED_FIRST_INST
+REG 0x00028894 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_START_FS
+REG 0x000288a4 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_RESOURCES_FS
+FLD  0 0x000000ff 0x00000000 3 NUM_GPRS
+FLD  8 0x000000ff 0x00000000 3 STACK_SIZE
+FLD 21 0x00000001 0x00000000 3 DX10_CLAMP
+REG 0x000288a8 0x00000000 0x0000000c 32    0    1    0 SQ_ESGS_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 3 ITEMSIZE
+REG 0x000288ac 0x00000000 0x0000000c 32    0    1    0 SQ_GSVS_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 3 ITEMSIZE
+REG 0x000288b0 0x00000000 0x0000000c 32    0    1    0 SQ_ESTMP_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 3 ITEMSIZE
+REG 0x000288b4 0x00000000 0x0000000c 32    0    1    0 SQ_GSTMP_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 3 ITEMSIZE
+REG 0x000288b8 0x00000000 0x0000000c 32    0    1    0 SQ_VSTMP_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 3 ITEMSIZE
+REG 0x000288bc 0x00000000 0x0000000c 32    0    1    0 SQ_PSTMP_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 3 ITEMSIZE
+REG 0x000288c0 0x00000000 0x0000000c 32    0    1    0 SQ_FBUF_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 3 ITEMSIZE
+REG 0x000288c4 0x00000000 0x0000000c 32    0    1    0 SQ_REDUC_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 3 ITEMSIZE
+REG 0x000288c8 0x00000000 0x0000000c 32    0    1    0 SQ_GS_VERT_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 3 ITEMSIZE
+REG 0x000288cc 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_CF_OFFSET_PS
+FLD  0 0x000fffff 0x00000000 3 PGM_CF_OFFSET
+REG 0x000288d0 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_CF_OFFSET_VS
+FLD  0 0x000fffff 0x00000000 3 PGM_CF_OFFSET
+REG 0x000288d4 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_CF_OFFSET_GS
+FLD  0 0x000fffff 0x00000000 3 PGM_CF_OFFSET
+REG 0x000288d8 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_CF_OFFSET_ES
+FLD  0 0x000fffff 0x00000000 3 PGM_CF_OFFSET
+REG 0x000288dc 0x00000000 0x0000000c 32    0    1    0 SQ_PGM_CF_OFFSET_FS
+FLD  0 0x000fffff 0x00000000 3 PGM_CF_OFFSET
+REG 0x000288e0 0x00000000 0x0000000c 32    0    1    0 SQ_VTX_SEMANTIC_CLEAR
+REG 0x00028940 0x00000000 0x0000000c 32    0   16    4 SQ_ALU_CONST_CACHE_PS
+REG 0x00028980 0x00000000 0x0000000c 32    0   16    4 SQ_ALU_CONST_CACHE_VS
+REG 0x000289c0 0x00000000 0x0000000c 32    0   16    4 SQ_ALU_CONST_CACHE_GS
+REG 0x00028a00 0x00000000 0x00000006 32    0    1    0 PA_SU_POINT_SIZE
+FLD  0 0x0000ffff 0x00000000 3 HEIGHT
+FLD 16 0x0000ffff 0x00000000 3 WIDTH
+REG 0x00028a04 0x00000000 0x00000006 32    0    1    0 PA_SU_POINT_MINMAX
+FLD  0 0x0000ffff 0x00000000 3 MIN_SIZE
+FLD 16 0x0000ffff 0x00000000 3 MAX_SIZE
+REG 0x00028a08 0x00000000 0x00000006 32    0    1    0 PA_SU_LINE_CNTL
+FLD  0 0x0000ffff 0x00000000 3 WIDTH
+REG 0x00028a0c 0x00000000 0x00000006 32    0    1    0 PA_SC_LINE_STIPPLE
+FLD  0 0x0000ffff 0x00000000 3 LINE_PATTERN
+FLD 16 0x000000ff 0x00000000 3 REPEAT_COUNT
+FLD 28 0x00000001 0x00000000 3 PATTERN_BIT_ORDER
+FLD 29 0x00000003 0x00000000 3 AUTO_RESET_CNTL
+REG 0x00028a10 0x00000000 0x00000010 32    0    1    0 VGT_OUTPUT_PATH_CNTL
+FLD  0 0x00000003 0x00000000 3 PATH_SELECT
+VAL 0x00000000 VGT_OUTPATH_VTX_REUSE
+VAL 0x00000001 VGT_OUTPATH_TESS_EN
+VAL 0x00000002 VGT_OUTPATH_PASSTHRU
+VAL 0x00000003 VGT_OUTPATH_GS_BLOCK
+REG 0x00028a14 0x00000000 0x00000010 32    0    1    0 VGT_HOS_CNTL
+FLD  0 0x00000003 0x00000000 3 TESS_MODE
+REG 0x00028a18 0x00000000 0x00000010 32    0    1    0 VGT_HOS_MAX_TESS_LEVEL
+REG 0x00028a1c 0x00000000 0x00000010 32    0    1    0 VGT_HOS_MIN_TESS_LEVEL
+REG 0x00028a20 0x00000000 0x00000010 32    0    1    0 VGT_HOS_REUSE_DEPTH
+FLD  0 0x000000ff 0x00000000 3 REUSE_DEPTH
+REG 0x00028a24 0x00000000 0x00000010 32    0    1    0 VGT_GROUP_PRIM_TYPE
+FLD  0 0x0000001f 0x00000000 3 PRIM_TYPE
+VAL 0x00000000 VGT_GRP_3D_POINT
+VAL 0x00000001 VGT_GRP_3D_LINE
+VAL 0x00000002 VGT_GRP_3D_TRI
+VAL 0x00000003 VGT_GRP_3D_RECT
+VAL 0x00000004 VGT_GRP_3D_QUAD
+VAL 0x00000005 VGT_GRP_2D_COPY_RECT_V0
+VAL 0x00000006 VGT_GRP_2D_COPY_RECT_V1
+VAL 0x00000007 VGT_GRP_2D_COPY_RECT_V2
+VAL 0x00000008 VGT_GRP_2D_COPY_RECT_V3
+VAL 0x00000009 VGT_GRP_2D_FILL_RECT
+VAL 0x0000000a VGT_GRP_2D_LINE
+VAL 0x0000000b VGT_GRP_2D_TRI
+VAL 0x0000000c VGT_GRP_PRIM_INDEX_LINE
+VAL 0x0000000d VGT_GRP_PRIM_INDEX_TRI
+VAL 0x0000000e VGT_GRP_PRIM_INDEX_QUAD
+VAL 0x0000000f VGT_GRP_3D_LINE_ADJ
+VAL 0x00000010 VGT_GRP_3D_TRI_ADJ
+FLD 14 0x00000001 0x00000000 3 RETAIN_ORDER
+FLD 15 0x00000001 0x00000000 3 RETAIN_QUADS
+FLD 16 0x00000007 0x00000000 3 PRIM_ORDER
+VAL 0x00000000 VGT_GRP_LIST
+VAL 0x00000001 VGT_GRP_STRIP
+VAL 0x00000002 VGT_GRP_FAN
+VAL 0x00000003 VGT_GRP_LOOP
+VAL 0x00000004 VGT_GRP_POLYGON
+REG 0x00028a28 0x00000000 0x00000010 32    0    1    0 VGT_GROUP_FIRST_DECR
+FLD  0 0x0000000f 0x00000000 3 FIRST_DECR
+REG 0x00028a2c 0x00000000 0x00000010 32    0    1    0 VGT_GROUP_DECR
+FLD  0 0x0000000f 0x00000000 3 DECR
+REG 0x00028a30 0x00000000 0x00000010 32    0    1    0 VGT_GROUP_VECT_0_CNTL
+FLD  0 0x00000001 0x00000000 3 COMP_X_EN
+FLD  1 0x00000001 0x00000000 3 COMP_Y_EN
+FLD  2 0x00000001 0x00000000 3 COMP_Z_EN
+FLD  3 0x00000001 0x00000000 3 COMP_W_EN
+FLD  8 0x000000ff 0x00000000 3 STRIDE
+FLD 16 0x000000ff 0x00000000 3 SHIFT
+REG 0x00028a34 0x00000000 0x00000010 32    0    1    0 VGT_GROUP_VECT_1_CNTL
+FLD  0 0x00000001 0x00000000 3 COMP_X_EN
+FLD  1 0x00000001 0x00000000 3 COMP_Y_EN
+FLD  2 0x00000001 0x00000000 3 COMP_Z_EN
+FLD  3 0x00000001 0x00000000 3 COMP_W_EN
+FLD  8 0x000000ff 0x00000000 3 STRIDE
+FLD 16 0x000000ff 0x00000000 3 SHIFT
+REG 0x00028a38 0x00000000 0x00000010 32    0    1    0 VGT_GROUP_VECT_0_FMT_CNTL
+FLD  0 0x0000000f 0x00000000 3 X_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD  4 0x0000000f 0x00000000 3 X_OFFSET
+FLD  8 0x0000000f 0x00000000 3 Y_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD 12 0x0000000f 0x00000000 3 Y_OFFSET
+FLD 16 0x0000000f 0x00000000 3 Z_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD 20 0x0000000f 0x00000000 3 Z_OFFSET
+FLD 24 0x0000000f 0x00000000 3 W_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD 28 0x0000000f 0x00000000 3 W_OFFSET
+REG 0x00028a3c 0x00000000 0x00000010 32    0    1    0 VGT_GROUP_VECT_1_FMT_CNTL
+FLD  0 0x0000000f 0x00000000 3 X_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD  4 0x0000000f 0x00000000 3 X_OFFSET
+FLD  8 0x0000000f 0x00000000 3 Y_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD 12 0x0000000f 0x00000000 3 Y_OFFSET
+FLD 16 0x0000000f 0x00000000 3 Z_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD 20 0x0000000f 0x00000000 3 Z_OFFSET
+FLD 24 0x0000000f 0x00000000 3 W_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD 28 0x0000000f 0x00000000 3 W_OFFSET
+REG 0x00028a40 0x00000000 0x00000010 32    0    1    0 VGT_GS_MODE
+FLD  0 0x00000003 0x00000000 3 MODE
+VAL 0x00000000 GS_OFF
+VAL 0x00000001 GS_SCENARIO_A
+VAL 0x00000002 GS_SCENARIO_B
+VAL 0x00000003 GS_SCENARIO_G
+FLD  2 0x00000001 0x00000000 3 ES_PASSTHRU
+FLD  3 0x00000003 0x00000000 3 CUT_MODE
+VAL 0x00000000 GS_CUT_1024
+VAL 0x00000001 GS_CUT_512
+VAL 0x00000002 GS_CUT_256
+VAL 0x00000003 GS_CUT_128
+REG 0x00028a48 0x00000000 0x00000006 32    0    1    0 PA_SC_MPASS_PS_CNTL
+FLD  0 0x000fffff 0x00000000 3 MPASS_PIX_VEC_PER_PASS
+FLD 31 0x00000001 0x00000000 3 MPASS_PS_ENA
+REG 0x00028a4c 0x00000000 0x00000006 32    0    1    0 PA_SC_MODE_CNTL
+FLD  0 0x00000001 0x00000000 3 MSAA_ENABLE
+FLD  1 0x00000001 0x00000000 3 CLIPRECT_ENABLE
+FLD  2 0x00000001 0x00000000 3 LINE_STIPPLE_ENABLE
+FLD  3 0x00000001 0x00000000 3 MULTI_CHIP_PRIM_DISCARD_ENAB
+FLD  4 0x00000001 0x00000000 3 WALK_ORDER_ENABLE
+FLD  5 0x00000001 0x00000000 3 HALVE_DETAIL_SAMPLE_PERF
+FLD  6 0x00000001 0x00000000 3 WALK_SIZE
+FLD  7 0x00000001 0x00000000 3 WALK_ALIGNMENT
+FLD  8 0x00000001 0x00000000 3 WALK_ALIGN8_PRIM_FITS_ST
+FLD  9 0x00000001 0x00000000 3 TILE_COVER_NO_SCISSOR
+FLD 10 0x00000001 0x00000000 3 KILL_PIX_POST_HI_Z
+FLD 11 0x00000001 0x00000000 3 KILL_PIX_POST_DETAIL_MASK
+FLD 12 0x00000001 0x00000000 3 MULTI_CHIP_SUPERTILE_ENABLE
+FLD 13 0x00000001 0x00000000 3 TILE_COVER_DISABLE
+FLD 14 0x00000001 0x00000000 3 FORCE_EOV_CNTDWN_ENABLE
+FLD 15 0x00000001 0x00000000 3 FORCE_EOV_TILE_ENABLE
+FLD 16 0x00000001 0x00000000 3 FORCE_EOV_REZ_ENABLE
+FLD 17 0x00000001 0x00000000 3 PS_ITER_SAMPLE
+REG 0x00028a50 0x00000000 0x00000010 32    0    1    0 VGT_ENHANCE
+FLD  0 0x00000003 0x00000000 3 MI_TIMESTAMP_RES
+VAL 0x00000000 X_0_992_CLOCKS_LATENCY_RANGE_IN_STEPS_OF_32
+VAL 0x00000001 X_0_496_CLOCKS_LATENCY_RANGE_IN_STEPS_OF_16
+VAL 0x00000002 X_0_248_CLOCKS_LATENCY_RANGE_IN_STEPS_OF_8
+VAL 0x00000003 X_0_124_CLOCKS_LATENCY_RANGE_IN_STEPS_OF_4
+FLD  2 0x3fffffff 0x00000000 3 MISC
+REG 0x00028a6c 0x00000000 0x00000010 32    0    1    0 VGT_GS_OUT_PRIM_TYPE
+FLD  0 0x0000003f 0x00000000 3 OUTPRIM_TYPE
+VAL 0x00000000 POINTLIST
+VAL 0x00000001 LINESTRIP
+VAL 0x00000002 TRISTRIP
+REG 0x00028a74 0x00000000 0x00000010 32    0    1    0 VGT_DMA_SIZE
+REG 0x00028a7c 0x00000000 0x00000010 32    0    1    0 VGT_DMA_INDEX_TYPE
+FLD  0 0x00000003 0x00000000 3 INDEX_TYPE
+VAL 0x00000000 VGT_INDEX_16
+VAL 0x00000001 VGT_INDEX_32
+FLD  2 0x00000003 0x00000000 3 SWAP_MODE
+VAL 0x00000000 VGT_DMA_SWAP_NONE
+VAL 0x00000001 VGT_DMA_SWAP_16_BIT
+VAL 0x00000002 VGT_DMA_SWAP_32_BIT
+VAL 0x00000003 VGT_DMA_SWAP_WORD
+REG 0x00028a84 0x00000000 0x00000010 32    0    1    0 VGT_PRIMITIVEID_EN
+FLD  0 0x00000001 0x00000000 3 PRIMITIVEID_EN
+REG 0x00028a88 0x00000000 0x00000010 32    0    1    0 VGT_DMA_NUM_INSTANCES
+REG 0x00028a90 0x00000000 0x00000010 32    0    1    0 VGT_EVENT_INITIATOR
+FLD  0 0x0000003f 0x00000000 3 EVENT_TYPE
+VAL 0x00000004 CACHE_FLUSH_TS
+VAL 0x00000005 CONTEXT_DONE
+VAL 0x00000006 CACHE_FLUSH
+VAL 0x00000007 VIZQUERY_START
+VAL 0x00000008 VIZQUERY_END
+VAL 0x00000009 SC_WAIT_WC
+VAL 0x0000000a MPASS_PS_CP_REFETCH
+VAL 0x0000000b MPASS_PS_RST_START
+VAL 0x0000000c MPASS_PS_INCR_START
+VAL 0x0000000d RST_PIX_CNT
+VAL 0x0000000e RST_VTX_CNT
+VAL 0x0000000f VS_PARTIAL_FLUSH
+VAL 0x00000010 PS_PARTIAL_FLUSH
+VAL 0x00000014 CACHE_FLUSH_AND_INV_TS_EVENT
+VAL 0x00000015 ZPASS_DONE
+VAL 0x00000016 CACHE_FLUSH_AND_INV_EVENT
+VAL 0x00000017 PERFCOUNTER_START
+VAL 0x00000018 PERFCOUNTER_STOP
+VAL 0x00000019 PIPELINESTAT_START
+VAL 0x0000001a PIPELINESTAT_STOP
+VAL 0x0000001b PERFCOUNTER_SAMPLE
+VAL 0x0000001c FLUSH_ES_OUTPUT
+VAL 0x0000001d FLUSH_GS_OUTPUT
+VAL 0x0000001e SAMPLE_PIPELINESTAT
+VAL 0x0000001f SO_VGTSTREAMOUT_FLUSH
+VAL 0x00000020 SAMPLE_STREAMOUTSTATS
+VAL 0x00000021 RESET_VTX_CNT
+VAL 0x00000022 BLOCK_CONTEXT_DONE
+VAL 0x00000023 CR_CONTEXT_DONE
+VAL 0x00000024 VGT_FLUSH
+VAL 0x00000025 CR_DONE_TS
+VAL 0x00000026 SQ_NON_EVENT
+VAL 0x00000027 SC_SEND_DB_VPZ
+VAL 0x00000028 BOTTOM_OF_PIPE_TS
+VAL 0x0000002a DB_CACHE_FLUSH_AND_INV
+FLD 19 0x000000ff 0x00000000 3 ADDRESS_HI
+FLD 27 0x00000001 0x00000000 3 EXTENDED_EVENT
+REG 0x00028a94 0x00000000 0x00000010 32    0    1    0 VGT_MULTI_PRIM_IB_RESET_EN
+FLD  0 0x00000001 0x00000000 3 RESET_EN
+REG 0x00028aa0 0x00000000 0x00000010 32    0    1    0 VGT_INSTANCE_STEP_RATE_0
+REG 0x00028aa4 0x00000000 0x00000010 32    0    1    0 VGT_INSTANCE_STEP_RATE_1
+REG 0x00028ab0 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_EN
+FLD  0 0x00000001 0x00000000 3 STREAMOUT
+REG 0x00028ab4 0x00000000 0x00000010 32    0    1    0 VGT_REUSE_OFF
+FLD  0 0x00000001 0x00000000 3 REUSE_OFF
+REG 0x00028ab8 0x00000000 0x00000010 32    0    1    0 VGT_VTX_CNT_EN
+FLD  0 0x00000001 0x00000000 3 VTX_CNT_EN
+REG 0x00028ad0 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_SIZE_0
+REG 0x00028ad4 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_VTX_STRIDE_0
+FLD  0 0x000003ff 0x00000000 3 STRIDE
+REG 0x00028ad8 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_BASE_0
+REG 0x00028adc 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_OFFSET_0
+REG 0x00028ae0 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_SIZE_1
+REG 0x00028ae4 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_VTX_STRIDE_1
+FLD  0 0x000003ff 0x00000000 3 STRIDE
+REG 0x00028ae8 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_BASE_1
+REG 0x00028aec 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_OFFSET_1
+REG 0x00028af0 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_SIZE_2
+REG 0x00028af4 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_VTX_STRIDE_2
+FLD  0 0x000003ff 0x00000000 3 STRIDE
+REG 0x00028af8 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_BASE_2
+REG 0x00028afc 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_OFFSET_2
+REG 0x00028b00 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_SIZE_3
+REG 0x00028b04 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_VTX_STRIDE_3
+FLD  0 0x000003ff 0x00000000 3 STRIDE
+REG 0x00028b08 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_BASE_3
+REG 0x00028b0c 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_OFFSET_3
+REG 0x00028b10 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_0
+REG 0x00028b14 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_1
+REG 0x00028b18 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_2
+REG 0x00028b1c 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_3
+REG 0x00028b20 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_EN
+FLD  0 0x00000001 0x00000000 3 BUFFER_0_EN
+FLD  1 0x00000001 0x00000000 3 BUFFER_1_EN
+FLD  2 0x00000001 0x00000000 3 BUFFER_2_EN
+FLD  3 0x00000001 0x00000000 3 BUFFER_3_EN
+REG 0x00028b28 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_DRAW_OPAQUE_OFFSET
+REG 0x00028b2c 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE
+REG 0x00028b30 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE
+REG 0x00028b44 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_HI_0
+FLD  0 0x0000003f 0x00000000 3 BASE_OFFSET
+REG 0x00028b48 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_HI_1
+FLD  0 0x0000003f 0x00000000 3 BASE_OFFSET
+REG 0x00028b4c 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_HI_2
+FLD  0 0x0000003f 0x00000000 3 BASE_OFFSET
+REG 0x00028b50 0x00000000 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_HI_3
+FLD  0 0x0000003f 0x00000000 3 BASE_OFFSET
+REG 0x00028c00 0x00000000 0x00000006 32    0    1    0 PA_SC_LINE_CNTL
+FLD  0 0x000000ff 0x00000000 3 BRES_CNTL
+FLD  8 0x00000001 0x00000000 3 USE_BRES_CNTL
+FLD  9 0x00000001 0x00000000 3 EXPAND_LINE_WIDTH
+FLD 10 0x00000001 0x00000000 3 LAST_PIXEL
+REG 0x00028c04 0x00000000 0x00000006 32    0    1    0 PA_SC_AA_CONFIG
+FLD  0 0x00000003 0x00000000 3 MSAA_NUM_SAMPLES
+FLD  4 0x00000001 0x00000000 3 AA_MASK_CENTROID_DTMN
+FLD 13 0x0000000f 0x00000000 3 MAX_SAMPLE_DIST
+REG 0x00028c08 0x00000000 0x00000006 32    0    1    0 PA_SU_VTX_CNTL
+FLD  0 0x00000001 0x00000000 3 PIX_CENTER
+FLD  1 0x00000003 0x00000000 3 ROUND_MODE
+VAL 0x00000000 X_TRUNCATE
+VAL 0x00000001 X_ROUND
+VAL 0x00000002 X_ROUND_TO_EVEN
+VAL 0x00000003 X_ROUND_TO_ODD
+FLD  3 0x00000007 0x00000000 3 QUANT_MODE
+VAL 0x00000000 X_1_16TH
+VAL 0x00000001 X_1_8TH
+VAL 0x00000002 X_1_4TH
+VAL 0x00000003 X_1_2
+VAL 0x00000004 X_1
+VAL 0x00000005 X_1_256TH
+REG 0x00028c0c 0x00000000 0x00000006 32    0    1    0 PA_CL_GB_VERT_CLIP_ADJ
+REG 0x00028c10 0x00000000 0x00000006 32    0    1    0 PA_CL_GB_VERT_DISC_ADJ
+REG 0x00028c14 0x00000000 0x00000006 32    0    1    0 PA_CL_GB_HORZ_CLIP_ADJ
+REG 0x00028c18 0x00000000 0x00000006 32    0    1    0 PA_CL_GB_HORZ_DISC_ADJ
+REG 0x00028c1c 0x00000000 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_MCTX
+FLD  0 0x0000000f 0x00000000 3 S0_X
+FLD  4 0x0000000f 0x00000000 3 S0_Y
+FLD  8 0x0000000f 0x00000000 3 S1_X
+FLD 12 0x0000000f 0x00000000 3 S1_Y
+FLD 16 0x0000000f 0x00000000 3 S2_X
+FLD 20 0x0000000f 0x00000000 3 S2_Y
+FLD 24 0x0000000f 0x00000000 3 S3_X
+FLD 28 0x0000000f 0x00000000 3 S3_Y
+REG 0x00028c20 0x00000000 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_8S_WD1_MCTX
+FLD  0 0x0000000f 0x00000000 3 S4_X
+FLD  4 0x0000000f 0x00000000 3 S4_Y
+FLD  8 0x0000000f 0x00000000 3 S5_X
+FLD 12 0x0000000f 0x00000000 3 S5_Y
+FLD 16 0x0000000f 0x00000000 3 S6_X
+FLD 20 0x0000000f 0x00000000 3 S6_Y
+FLD 24 0x0000000f 0x00000000 3 S7_X
+FLD 28 0x0000000f 0x00000000 3 S7_Y
+REG 0x00028c30 0x00000000 0x00000001 32    0    1    0 CB_CLRCMP_CONTROL
+FLD  0 0x00000007 0x00000000 3 CLRCMP_FCN_SRC
+VAL 0x00000000 CLRCMP_DRAW_ALWAYS
+VAL 0x00000001 CLRCMP_DRAW_NEVER
+VAL 0x00000004 CLRCMP_DRAW_ON_NEQ
+VAL 0x00000005 CLRCMP_DRAW_ON_EQ
+FLD  8 0x00000007 0x00000000 3 CLRCMP_FCN_DST
+VAL 0x00000000 CLRCMP_DRAW_ALWAYS
+VAL 0x00000001 CLRCMP_DRAW_NEVER
+VAL 0x00000004 CLRCMP_DRAW_ON_NEQ
+VAL 0x00000005 CLRCMP_DRAW_ON_EQ
+FLD 24 0x00000003 0x00000000 3 CLRCMP_FCN_SEL
+VAL 0x00000000 CLRCMP_SEL_DST
+VAL 0x00000001 CLRCMP_SEL_SRC
+VAL 0x00000002 CLRCMP_SEL_AND
+REG 0x00028c34 0x00000000 0x00000001 32    0    1    0 CB_CLRCMP_SRC
+REG 0x00028c38 0x00000000 0x00000001 32    0    1    0 CB_CLRCMP_DST
+REG 0x00028c3c 0x00000000 0x00000001 32    0    1    0 CB_CLRCMP_MSK
+REG 0x00028c48 0x00000000 0x00000006 32    0    1    0 PA_SC_AA_MASK
+REG 0x00028c58 0x00000000 0x00000000 32    0    1    0 VGT_VERTEX_REUSE_BLOCK_CNTL
+FLD  0 0x000000ff 0x00000000 3 VTX_REUSE_DEPTH
+REG 0x00028c58 0x00000000 0x00000010 32    0    1    0 VGT_VERTEX_REUSE_BLOCK_CNTL
+FLD  0 0x000000ff 0x00000000 3 VTX_REUSE_DEPTH
+REG 0x00028c5c 0x00000000 0x00000010 32    0    1    0 VGT_OUT_DEALLOC_CNTL
+FLD  0 0x0000007f 0x00000000 3 DEALLOC_DIST
+REG 0x00028d0c 0x00000000 0x00000003 32    0    1    0 DB_RENDER_CONTROL
+FLD  0 0x00000001 0x00000000 3 DEPTH_CLEAR_ENABLE
+FLD  1 0x00000001 0x00000000 3 STENCIL_CLEAR_ENABLE
+FLD  2 0x00000001 0x00000000 3 DEPTH_COPY
+FLD  3 0x00000001 0x00000000 3 STENCIL_COPY
+FLD  4 0x00000001 0x00000000 3 RESUMMARIZE_ENABLE
+FLD  5 0x00000001 0x00000000 3 STENCIL_COMPRESS_DISABLE
+FLD  6 0x00000001 0x00000000 3 DEPTH_COMPRESS_DISABLE
+FLD  7 0x00000001 0x00000000 3 COPY_CENTROID
+FLD  8 0x00000007 0x00000000 3 COPY_SAMPLE
+FLD 11 0x00000001 0x00000000 3 ZPASS_INCREMENT_DISABLE
+REG 0x00028d10 0x00000000 0x00000003 32    0    1    0 DB_RENDER_OVERRIDE
+FLD  0 0x00000003 0x00000000 3 FORCE_HIZ_ENABLE
+VAL 0x00000000 FORCE_OFF
+VAL 0x00000001 FORCE_ENABLE
+VAL 0x00000002 FORCE_DISABLE
+VAL 0x00000003 FORCE_RESERVED
+FLD  2 0x00000003 0x00000000 3 FORCE_HIS_ENABLE0
+VAL 0x00000000 FORCE_OFF
+VAL 0x00000001 FORCE_ENABLE
+VAL 0x00000002 FORCE_DISABLE
+VAL 0x00000003 FORCE_RESERVED
+FLD  4 0x00000003 0x00000000 3 FORCE_HIS_ENABLE1
+VAL 0x00000000 FORCE_OFF
+VAL 0x00000001 FORCE_ENABLE
+VAL 0x00000002 FORCE_DISABLE
+VAL 0x00000003 FORCE_RESERVED
+FLD  6 0x00000001 0x00000000 3 FORCE_SHADER_Z_ORDER
+FLD  7 0x00000001 0x00000000 3 FAST_Z_DISABLE
+FLD  8 0x00000001 0x00000000 3 FAST_STENCIL_DISABLE
+FLD  9 0x00000001 0x00000000 3 NOOP_CULL_DISABLE
+FLD 10 0x00000001 0x00000000 3 FORCE_COLOR_KILL
+FLD 11 0x00000001 0x00000000 3 FORCE_Z_READ
+FLD 12 0x00000001 0x00000000 3 FORCE_STENCIL_READ
+FLD 13 0x00000003 0x00000000 3 FORCE_FULL_Z_RANGE
+VAL 0x00000000 FORCE_OFF
+VAL 0x00000001 FORCE_ENABLE
+VAL 0x00000002 FORCE_DISABLE
+VAL 0x00000003 FORCE_RESERVED
+FLD 15 0x00000001 0x00000000 3 FORCE_QC_SMASK_CONFLICT
+FLD 16 0x00000001 0x00000000 3 DISABLE_VIEWPORT_CLAMP
+FLD 17 0x00000001 0x00000000 3 IGNORE_SC_ZRANGE
+REG 0x00028d24 0x00000000 0x00000003 32    0    1    0 DB_HTILE_SURFACE
+FLD  0 0x00000001 0x00000000 3 HTILE_WIDTH
+FLD  1 0x00000001 0x00000000 3 HTILE_HEIGHT
+FLD  2 0x00000001 0x00000000 3 LINEAR
+FLD  3 0x00000001 0x00000000 3 FULL_CACHE
+FLD  4 0x00000001 0x00000000 3 HTILE_USES_PRELOAD_WIN
+FLD  5 0x00000001 0x00000000 3 PRELOAD
+FLD  6 0x0000003f 0x00000000 3 PREFETCH_WIDTH
+FLD 12 0x0000003f 0x00000000 3 PREFETCH_HEIGHT
+REG 0x00028d28 0x00000000 0x00000003 32    0    1    0 DB_SRESULTS_COMPARE_STATE0
+FLD  0 0x00000007 0x00000000 3 COMPAREFUNC0
+VAL 0x00000000 REF_NEVER
+VAL 0x00000001 REF_LESS
+VAL 0x00000002 REF_EQUAL
+VAL 0x00000003 REF_LEQUAL
+VAL 0x00000004 REF_GREATER
+VAL 0x00000005 REF_NOTEQUAL
+VAL 0x00000006 REF_GEQUAL
+VAL 0x00000007 REF_ALWAYS
+FLD  4 0x000000ff 0x00000000 3 COMPAREVALUE0
+FLD 12 0x000000ff 0x00000000 3 COMPAREMASK0
+FLD 24 0x00000001 0x00000000 3 ENABLE0
+REG 0x00028d2c 0x00000000 0x00000003 32    0    1    0 DB_SRESULTS_COMPARE_STATE1
+FLD  0 0x00000007 0x00000000 3 COMPAREFUNC1
+VAL 0x00000000 REF_NEVER
+VAL 0x00000001 REF_LESS
+VAL 0x00000002 REF_EQUAL
+VAL 0x00000003 REF_LEQUAL
+VAL 0x00000004 REF_GREATER
+VAL 0x00000005 REF_NOTEQUAL
+VAL 0x00000006 REF_GEQUAL
+VAL 0x00000007 REF_ALWAYS
+FLD  4 0x000000ff 0x00000000 3 COMPAREVALUE1
+FLD 12 0x000000ff 0x00000000 3 COMPAREMASK1
+FLD 24 0x00000001 0x00000000 3 ENABLE1
+REG 0x00028d30 0x00000000 0x00000003 32    0    1    0 DB_PRELOAD_CONTROL
+FLD  0 0x000000ff 0x00000000 3 START_X
+FLD  8 0x000000ff 0x00000000 3 START_Y
+FLD 16 0x000000ff 0x00000000 3 MAX_X
+FLD 24 0x000000ff 0x00000000 3 MAX_Y
+REG 0x00028d34 0x00000000 0x00000003 32    0    1    0 DB_PREFETCH_LIMIT
+FLD  0 0x000003ff 0x00000000 3 DEPTH_HEIGHT_TILE_MAX
+REG 0x00028d44 0x00000000 0x00000003 32    0    1    0 DB_ALPHA_TO_MASK
+FLD  8 0x00000003 0x00000000 3 ALPHA_TO_MASK_OFFSET0
+FLD 10 0x00000003 0x00000000 3 ALPHA_TO_MASK_OFFSET1
+FLD 12 0x00000003 0x00000000 3 ALPHA_TO_MASK_OFFSET2
+FLD 14 0x00000003 0x00000000 3 ALPHA_TO_MASK_OFFSET3
+FLD 16 0x00000001 0x00000000 3 OFFSET_ROUND
+REG 0x00028df8 0x00000000 0x00000006 32    0    1    0 PA_SU_POLY_OFFSET_DB_FMT_CNTL
+FLD  0 0x000000ff 0x00000000 3 NEG_NUM_DB_BITS
+FLD  8 0x00000001 0x00000000 3 DB_IS_FLOAT_FMT
+REG 0x00028dfc 0x00000000 0x00000006 32    0    1    0 PA_SU_POLY_OFFSET_CLAMP
+REG 0x00028e00 0x00000000 0x00000006 32    0    1    0 PA_SU_POLY_OFFSET_FRONT_SCALE
+REG 0x00028e04 0x00000000 0x00000006 32    0    1    0 PA_SU_POLY_OFFSET_FRONT_OFFSET
+REG 0x00028e08 0x00000000 0x00000006 32    0    1    0 PA_SU_POLY_OFFSET_BACK_SCALE
+REG 0x00028e0c 0x00000000 0x00000006 32    0    1    0 PA_SU_POLY_OFFSET_BACK_OFFSET
+REG 0x00028e10 0x00000000 0x00000006 32    0    1    0 PA_CL_POINT_X_RAD
+REG 0x00028e14 0x00000000 0x00000006 32    0    1    0 PA_CL_POINT_Y_RAD
+REG 0x00028e18 0x00000000 0x00000006 32    0    1    0 PA_CL_POINT_SIZE
+REG 0x00028e1c 0x00000000 0x00000006 32    0    1    0 PA_CL_POINT_CULL_RAD
+REG 0x00028e20 0x00000000 0x00000006 32    0    6   16 PA_CL_UCP_X
+REG 0x00028e24 0x00000000 0x00000006 32    0    6   16 PA_CL_UCP_Y
+REG 0x00028e28 0x00000000 0x00000006 32    0    6   16 PA_CL_UCP_Z
+REG 0x00028e2c 0x00000000 0x00000006 32    0    6   16 PA_CL_UCP_W
+REG 0x0003cff0 0x00000000 0x0000000c 32    0    1    0 SQ_VTX_BASE_VTX_LOC
+REG 0x0003cff4 0x00000000 0x0000000c 32    0    1    0 SQ_VTX_START_INST_LOC
+REG 0x0003e200 0x00000000 0x0000000c 32    0   32    4 SQ_LOOP_CONST_DX10_PS
+REG 0x0003e200 0x00000000 0x0000000c 32    0   32    4 SQ_LOOP_CONST_PS
+REG 0x0003e280 0x00000000 0x0000000c 32    0   32    4 SQ_LOOP_CONST_DX10_VS
+REG 0x0003e280 0x00000000 0x0000000c 32    0   32    4 SQ_LOOP_CONST_VS
+REG 0x0003e300 0x00000000 0x0000000c 32    0   32    4 SQ_LOOP_CONST_DX10_GS
+REG 0x0003e300 0x00000000 0x0000000c 32    0   32    4 SQ_LOOP_CONST_GS
+FLD  0 0x00000fff 0x00000000 3 COUNT
+FLD 12 0x00000fff 0x00000000 3 INIT
+FLD 24 0x000000ff 0x00000000 3 INC
+REG 0x0003e380 0x00000000 0x0000000c 32    0    1    0 SQ_BOOL_CONST_PS
+REG 0x0003e384 0x00000000 0x0000000c 32    0    1    0 SQ_BOOL_CONST_VS
+REG 0x0003e388 0x00000000 0x0000000c 32    0    1    0 SQ_BOOL_CONST_GS
+REG 0x000000a1 0x00000002 0x00000000 32    0    1    0 PCIE_LC_TRAINING_CNTL
+FLD  6 0x00000001 0x00000000 3 LC_POINT_7_PLUS_EN
+REG 0x000000a2 0x00000002 0x00000000 32    0    1    0 PCIE_LC_LINK_WIDTH_CNTL
+FLD  0 0x00000007 0x00000000 3 LC_LINK_WIDTH
+VAL 0x00000000 LC_LINK_WIDTH_X0
+VAL 0x00000001 LC_LINK_WIDTH_X1
+VAL 0x00000002 LC_LINK_WIDTH_X2
+VAL 0x00000003 LC_LINK_WIDTH_X4
+VAL 0x00000004 LC_LINK_WIDTH_X8
+VAL 0x00000006 LC_LINK_WIDTH_X16
+FLD  4 0x00000007 0x00000000 3 LC_LINK_WIDTH_RD
+FLD  7 0x00000001 0x00000000 3 LC_RECONFIG_ARC_MISSING_ESCAPE
+FLD  8 0x00000001 0x00000000 3 LC_RECONFIG_NOW
+FLD  9 0x00000001 0x00000000 3 LC_RENEGOTIATION_SUPPORT
+FLD 10 0x00000001 0x00000000 3 LC_RENEGOTIATE_EN
+FLD 11 0x00000001 0x00000000 3 LC_SHORT_RECONFIG_EN
+FLD 12 0x00000001 0x00000000 3 LC_UPCONFIGURE_SUPPORT
+FLD 13 0x00000001 0x00000000 3 LC_UPCONFIGURE_DIS
+REG 0x000000a4 0x00000002 0x00000000 32    0    1    0 PCIE_LC_SPEED_CNTL
+FLD  0 0x00000001 0x00000000 3 LC_GEN2_EN_STRAP
+FLD  1 0x00000001 0x00000000 3 LC_TARGET_LINK_SPEED_OVERRIDE_EN
+FLD  5 0x00000001 0x00000000 3 LC_FORCE_EN_HW_SPEED_CHANGE
+FLD  6 0x00000001 0x00000000 3 LC_FORCE_DIS_HW_SPEED_CHANGE
+FLD  8 0x00000003 0x00000000 3 LC_SPEED_CHANGE_ATTEMPTS_ALLOWED
+FLD 11 0x00000001 0x00000000 3 LC_CURRENT_DATA_RATE
+FLD 14 0x0000000f 0x00000000 3 LC_VOLTAGE_TIMER_SEL
+FLD 21 0x00000001 0x00000000 3 LC_CLR_FAILED_SPD_CHANGE_CNT
+FLD 23 0x00000001 0x00000000 3 LC_OTHER_SIDE_EVER_SENT_GEN2
+FLD 24 0x00000001 0x00000000 3 LC_OTHER_SIDE_SUPPORTS_GEN2
+REG 0x00030000 0x00000101 0x0000000c 32    0  256   16 SQ_ALU_PS_CONSTANT0
+REG 0x00030004 0x00000101 0x0000000c 32    0  256   16 SQ_ALU_PS_CONSTANT1
+REG 0x00030008 0x00000101 0x0000000c 32    0  256   16 SQ_ALU_PS_CONSTANT2
+REG 0x0003000c 0x00000101 0x0000000c 32    0  256   16 SQ_ALU_PS_CONSTANT3
+REG 0x00031000 0x00000101 0x0000000c 32    0  256   16 SQ_ALU_VS_CONSTANT0
+REG 0x00031004 0x00000101 0x0000000c 32    0  256   16 SQ_ALU_VS_CONSTANT1
+REG 0x00031008 0x00000101 0x0000000c 32    0  256   16 SQ_ALU_VS_CONSTANT2
+REG 0x0003100c 0x00000101 0x0000000c 32    0  256   16 SQ_ALU_VS_CONSTANT3
+REG 0x0003c000 0x00000109 0x0000000c 32    0   18   12 SQ_TEX_SAMPLER_PS_WORD0
+FLD  0 0x00000007 0x00000000 3 CLAMP_X
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  3 0x00000007 0x00000000 3 CLAMP_Y
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  6 0x00000007 0x00000000 3 CLAMP_Z
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  9 0x00000007 0x00000000 3 XY_MAG_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+VAL 0x00000002 SQ_TEX_XY_FILTER_BICUBIC
+FLD 12 0x00000007 0x00000000 3 XY_MIN_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+VAL 0x00000002 SQ_TEX_XY_FILTER_BICUBIC
+FLD 15 0x00000003 0x00000000 3 Z_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 17 0x00000003 0x00000000 3 MIP_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 22 0x00000003 0x00000000 3 BORDER_COLOR_TYPE
+VAL 0x00000000 SQ_TEX_BORDER_COLOR_TRANS_BLACK
+VAL 0x00000001 SQ_TEX_BORDER_COLOR_OPAQUE_BLACK
+VAL 0x00000002 SQ_TEX_BORDER_COLOR_OPAQUE_WHITE
+VAL 0x00000003 SQ_TEX_BORDER_COLOR_REGISTER
+FLD 24 0x00000001 0x00000000 3 POINT_SAMPLING_CLAMP
+FLD 25 0x00000001 0x00000000 3 TEX_ARRAY_OVERRIDE
+FLD 26 0x00000007 0x00000000 3 DEPTH_COMPARE_FUNCTION
+VAL 0x00000000 SQ_TEX_DEPTH_COMPARE_NEVER
+VAL 0x00000001 SQ_TEX_DEPTH_COMPARE_LESS
+VAL 0x00000002 SQ_TEX_DEPTH_COMPARE_EQUAL
+VAL 0x00000003 SQ_TEX_DEPTH_COMPARE_LESSEQUAL
+VAL 0x00000004 SQ_TEX_DEPTH_COMPARE_GREATER
+VAL 0x00000005 SQ_TEX_DEPTH_COMPARE_NOTEQUAL
+VAL 0x00000006 SQ_TEX_DEPTH_COMPARE_GREATEREQUAL
+VAL 0x00000007 SQ_TEX_DEPTH_COMPARE_ALWAYS
+FLD 29 0x00000003 0x00000000 3 CHROMA_KEY
+VAL 0x00000000 SQ_TEX_CHROMA_KEY_DISABLED
+VAL 0x00000001 SQ_TEX_CHROMA_KEY_KILL
+VAL 0x00000002 SQ_TEX_CHROMA_KEY_BLEND
+FLD 31 0x00000001 0x00000000 3 LOD_USES_MINOR_AXIS
+REG 0x0003c004 0x00000109 0x0000000c 32    0   18   12 SQ_TEX_SAMPLER_PS_WORD1
+FLD  0 0x000003ff 0x00000000 3 MIN_LOD
+FLD 10 0x000003ff 0x00000000 3 MAX_LOD
+FLD 20 0x00000fff 0x00000000 3 LOD_BIAS
+REG 0x0003c008 0x00000109 0x0000000c 32    0   18   12 SQ_TEX_SAMPLER_PS_WORD2
+FLD  0 0x00000fff 0x00000000 3 LOD_BIAS_SEC
+FLD 12 0x00000001 0x00000000 3 MC_COORD_TRUNCATE
+FLD 13 0x00000001 0x00000000 3 FORCE_DEGAMMA
+FLD 14 0x00000001 0x00000000 3 HIGH_PRECISION_FILTER
+FLD 15 0x00000007 0x00000000 3 PERF_MIP
+FLD 18 0x00000003 0x00000000 3 PERF_Z
+FLD 26 0x00000001 0x00000000 3 FETCH_4
+FLD 27 0x00000001 0x00000000 3 SAMPLE_IS_PCF
+FLD 31 0x00000001 0x00000000 3 TYPE
+REG 0x0003c0b0 0x00000109 0x0000000c 32    0   18   12 SQ_TEX_SAMPLER_GS_WORD0
+FLD  0 0x00000007 0x00000000 3 CLAMP_X
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  3 0x00000007 0x00000000 3 CLAMP_Y
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  6 0x00000007 0x00000000 3 CLAMP_Z
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  9 0x00000007 0x00000000 3 XY_MAG_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+VAL 0x00000002 SQ_TEX_XY_FILTER_BICUBIC
+FLD 12 0x00000007 0x00000000 3 XY_MIN_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+VAL 0x00000002 SQ_TEX_XY_FILTER_BICUBIC
+FLD 15 0x00000003 0x00000000 3 Z_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 17 0x00000003 0x00000000 3 MIP_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 22 0x00000003 0x00000000 3 BORDER_COLOR_TYPE
+VAL 0x00000000 SQ_TEX_BORDER_COLOR_TRANS_BLACK
+VAL 0x00000001 SQ_TEX_BORDER_COLOR_OPAQUE_BLACK
+VAL 0x00000002 SQ_TEX_BORDER_COLOR_OPAQUE_WHITE
+VAL 0x00000003 SQ_TEX_BORDER_COLOR_REGISTER
+FLD 24 0x00000001 0x00000000 3 POINT_SAMPLING_CLAMP
+FLD 25 0x00000001 0x00000000 3 TEX_ARRAY_OVERRIDE
+FLD 26 0x00000007 0x00000000 3 DEPTH_COMPARE_FUNCTION
+VAL 0x00000000 SQ_TEX_DEPTH_COMPARE_NEVER
+VAL 0x00000001 SQ_TEX_DEPTH_COMPARE_LESS
+VAL 0x00000002 SQ_TEX_DEPTH_COMPARE_EQUAL
+VAL 0x00000003 SQ_TEX_DEPTH_COMPARE_LESSEQUAL
+VAL 0x00000004 SQ_TEX_DEPTH_COMPARE_GREATER
+VAL 0x00000005 SQ_TEX_DEPTH_COMPARE_NOTEQUAL
+VAL 0x00000006 SQ_TEX_DEPTH_COMPARE_GREATEREQUAL
+VAL 0x00000007 SQ_TEX_DEPTH_COMPARE_ALWAYS
+FLD 29 0x00000003 0x00000000 3 CHROMA_KEY
+VAL 0x00000000 SQ_TEX_CHROMA_KEY_DISABLED
+VAL 0x00000001 SQ_TEX_CHROMA_KEY_KILL
+VAL 0x00000002 SQ_TEX_CHROMA_KEY_BLEND
+FLD 31 0x00000001 0x00000000 3 LOD_USES_MINOR_AXIS
+REG 0x0003c0b4 0x00000109 0x0000000c 32    0   18   12 SQ_TEX_SAMPLER_GS_WORD1
+FLD  0 0x000003ff 0x00000000 3 MIN_LOD
+FLD 10 0x000003ff 0x00000000 3 MAX_LOD
+FLD 20 0x00000fff 0x00000000 3 LOD_BIAS
+REG 0x0003c0b8 0x00000109 0x0000000c 32    0   18   12 SQ_TEX_SAMPLER_GS_WORD2
+FLD  0 0x00000fff 0x00000000 3 LOD_BIAS_SEC
+FLD 12 0x00000001 0x00000000 3 MC_COORD_TRUNCATE
+FLD 13 0x00000001 0x00000000 3 FORCE_DEGAMMA
+FLD 14 0x00000001 0x00000000 3 HIGH_PRECISION_FILTER
+FLD 15 0x00000007 0x00000000 3 PERF_MIP
+FLD 18 0x00000003 0x00000000 3 PERF_Z
+FLD 26 0x00000001 0x00000000 3 FETCH_4
+FLD 27 0x00000001 0x00000000 3 SAMPLE_IS_PCF
+FLD 31 0x00000001 0x00000000 3 TYPE
+REG 0x0003c0d8 0x00000109 0x0000000c 32    0   18   12 SQ_TEX_SAMPLER_VS_WORD0
+FLD  0 0x00000007 0x00000000 3 CLAMP_X
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  3 0x00000007 0x00000000 3 CLAMP_Y
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  6 0x00000007 0x00000000 3 CLAMP_Z
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  9 0x00000007 0x00000000 3 XY_MAG_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+VAL 0x00000002 SQ_TEX_XY_FILTER_BICUBIC
+FLD 12 0x00000007 0x00000000 3 XY_MIN_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+VAL 0x00000002 SQ_TEX_XY_FILTER_BICUBIC
+FLD 15 0x00000003 0x00000000 3 Z_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 17 0x00000003 0x00000000 3 MIP_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 22 0x00000003 0x00000000 3 BORDER_COLOR_TYPE
+VAL 0x00000000 SQ_TEX_BORDER_COLOR_TRANS_BLACK
+VAL 0x00000001 SQ_TEX_BORDER_COLOR_OPAQUE_BLACK
+VAL 0x00000002 SQ_TEX_BORDER_COLOR_OPAQUE_WHITE
+VAL 0x00000003 SQ_TEX_BORDER_COLOR_REGISTER
+FLD 24 0x00000001 0x00000000 3 POINT_SAMPLING_CLAMP
+FLD 25 0x00000001 0x00000000 3 TEX_ARRAY_OVERRIDE
+FLD 26 0x00000007 0x00000000 3 DEPTH_COMPARE_FUNCTION
+VAL 0x00000000 SQ_TEX_DEPTH_COMPARE_NEVER
+VAL 0x00000001 SQ_TEX_DEPTH_COMPARE_LESS
+VAL 0x00000002 SQ_TEX_DEPTH_COMPARE_EQUAL
+VAL 0x00000003 SQ_TEX_DEPTH_COMPARE_LESSEQUAL
+VAL 0x00000004 SQ_TEX_DEPTH_COMPARE_GREATER
+VAL 0x00000005 SQ_TEX_DEPTH_COMPARE_NOTEQUAL
+VAL 0x00000006 SQ_TEX_DEPTH_COMPARE_GREATEREQUAL
+VAL 0x00000007 SQ_TEX_DEPTH_COMPARE_ALWAYS
+FLD 29 0x00000003 0x00000000 3 CHROMA_KEY
+VAL 0x00000000 SQ_TEX_CHROMA_KEY_DISABLED
+VAL 0x00000001 SQ_TEX_CHROMA_KEY_KILL
+VAL 0x00000002 SQ_TEX_CHROMA_KEY_BLEND
+FLD 31 0x00000001 0x00000000 3 LOD_USES_MINOR_AXIS
+REG 0x0003c0dc 0x00000109 0x0000000c 32    0   18   12 SQ_TEX_SAMPLER_VS_WORD1
+FLD  0 0x000003ff 0x00000000 3 MIN_LOD
+FLD 10 0x000003ff 0x00000000 3 MAX_LOD
+FLD 20 0x00000fff 0x00000000 3 LOD_BIAS
+REG 0x0003c0e0 0x00000109 0x0000000c 32    0   18   12 SQ_TEX_SAMPLER_VS_WORD2
+FLD  0 0x00000fff 0x00000000 3 LOD_BIAS_SEC
+FLD 12 0x00000001 0x00000000 3 MC_COORD_TRUNCATE
+FLD 13 0x00000001 0x00000000 3 FORCE_DEGAMMA
+FLD 14 0x00000001 0x00000000 3 HIGH_PRECISION_FILTER
+FLD 15 0x00000007 0x00000000 3 PERF_MIP
+FLD 18 0x00000003 0x00000000 3 PERF_Z
+FLD 26 0x00000001 0x00000000 3 FETCH_4
+FLD 27 0x00000001 0x00000000 3 SAMPLE_IS_PCF
+FLD 31 0x00000001 0x00000000 3 TYPE
+REG 0x0003d03c 0x00000109 0x0000000c 32    0   18    4 SQ_TEX_SAMPLER_MISC_PS
+FLD  9 0x00000001 0x00000000 3 TRUNCATE_COORD
+FLD 10 0x00000001 0x00000000 3 DISABLE_CUBE_WRAP
+REG 0x0003d084 0x00000109 0x0000000c 32    0   18    4 SQ_TEX_SAMPLER_MISC_VS
+FLD  9 0x00000001 0x00000000 3 TRUNCATE_COORD
+FLD 10 0x00000001 0x00000000 3 DISABLE_CUBE_WRAP
+REG 0x0003d0cc 0x00000109 0x0000000c 32    0   18    4 SQ_TEX_SAMPLER_MISC_GS
+FLD  9 0x00000001 0x00000000 3 TRUNCATE_COORD
+FLD 10 0x00000001 0x00000000 3 DISABLE_CUBE_WRAP
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_CF_WORD0
+FLD  0 0xffffffff 0x00000000 3 ADDR
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_CF_WORD1
+FLD  0 0x00000007 0x00000000 3 POP_COUNT
+FLD  3 0x0000001f 0x00000000 3 CF_CONST
+FLD  8 0x00000003 0x00000000 3 COND
+VAL 0x00000000 SQ_CF_COND_ACTIVE
+VAL 0x00000001 SQ_CF_COND_FALSE
+VAL 0x00000002 SQ_CF_COND_BOOL
+VAL 0x00000003 SQ_CF_COND_NOT_BOOL
+FLD 10 0x00000007 0x00000000 3 COUNT
+FLD 13 0x0000003f 0x00000000 3 CALL_COUNT
+FLD 19 0x00000001 0x00000000 3 COUNT_3
+FLD 21 0x00000001 0x00000000 3 END_OF_PROGRAM
+FLD 22 0x00000001 0x00000000 3 VALID_PIXEL_MODE
+FLD 23 0x0000007f 0x00000000 3 CF_INST
+VAL 0x00000000 SQ_CF_INST_NOP
+VAL 0x00000001 SQ_CF_INST_TEX
+VAL 0x00000002 SQ_CF_INST_VTX
+VAL 0x00000003 SQ_CF_INST_VTX_TC
+VAL 0x00000004 SQ_CF_INST_LOOP_START
+VAL 0x00000005 SQ_CF_INST_LOOP_END
+VAL 0x00000006 SQ_CF_INST_LOOP_START_DX10
+VAL 0x00000007 SQ_CF_INST_LOOP_START_NO_AL
+VAL 0x00000008 SQ_CF_INST_LOOP_CONTINUE
+VAL 0x00000009 SQ_CF_INST_LOOP_BREAK
+VAL 0x0000000a SQ_CF_INST_JUMP
+VAL 0x0000000b SQ_CF_INST_PUSH
+VAL 0x0000000c SQ_CF_INST_PUSH_ELSE
+VAL 0x0000000d SQ_CF_INST_ELSE
+VAL 0x0000000e SQ_CF_INST_POP
+VAL 0x0000000f SQ_CF_INST_POP_JUMP
+VAL 0x00000010 SQ_CF_INST_POP_PUSH
+VAL 0x00000011 SQ_CF_INST_POP_PUSH_ELSE
+VAL 0x00000012 SQ_CF_INST_CALL
+VAL 0x00000013 SQ_CF_INST_CALL_FS
+VAL 0x00000014 SQ_CF_INST_RETURN
+VAL 0x00000015 SQ_CF_INST_EMIT_VERTEX
+VAL 0x00000016 SQ_CF_INST_EMIT_CUT_VERTEX
+VAL 0x00000017 SQ_CF_INST_CUT_VERTEX
+VAL 0x00000018 SQ_CF_INST_KILL
+VAL 0x00000019 SQ_CF_INST_END_PROGRAM
+VAL 0x0000001a SQ_CF_INST_WAIT_ACK
+VAL 0x0000001b SQ_CF_INST_TEX_ACK
+VAL 0x0000001c SQ_CF_INST_VTX_ACK
+VAL 0x0000001d SQ_CF_INST_VTX_TC_ACK
+FLD 30 0x00000001 0x00000000 3 WHOLE_QUAD_MODE
+FLD 31 0x00000001 0x00000000 3 BARRIER
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_CF_ALU_WORD0
+FLD  0 0x003fffff 0x00000000 3 ADDR
+FLD 22 0x0000000f 0x00000000 3 KCACHE_BANK0
+FLD 26 0x0000000f 0x00000000 3 KCACHE_BANK1
+FLD 30 0x00000003 0x00000000 3 KCACHE_MODE0
+VAL 0x00000000 SQ_CF_KCACHE_NOP
+VAL 0x00000001 SQ_CF_KCACHE_LOCK_1
+VAL 0x00000002 SQ_CF_KCACHE_LOCK_2
+VAL 0x00000003 SQ_CF_KCACHE_LOCK_LOOP_INDEX
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_CF_ALU_WORD1
+FLD  0 0x00000003 0x00000000 3 KCACHE_MODE1
+VAL 0x00000000 SQ_CF_KCACHE_NOP
+VAL 0x00000001 SQ_CF_KCACHE_LOCK_1
+VAL 0x00000002 SQ_CF_KCACHE_LOCK_2
+VAL 0x00000003 SQ_CF_KCACHE_LOCK_LOOP_INDEX
+FLD  2 0x000000ff 0x00000000 3 KCACHE_ADDR0
+FLD 10 0x000000ff 0x00000000 3 KCACHE_ADDR1
+FLD 18 0x0000007f 0x00000000 3 COUNT
+FLD 25 0x00000001 0x00000000 3 ALT_CONST
+FLD 26 0x0000000f 0x00000000 3 CF_INST
+VAL 0x00000008 SQ_CF_INST_ALU
+VAL 0x00000009 SQ_CF_INST_ALU_PUSH_BEFORE
+VAL 0x0000000a SQ_CF_INST_ALU_POP_AFTER
+VAL 0x0000000b SQ_CF_INST_ALU_POP2_AFTER
+VAL 0x0000000d SQ_CF_INST_ALU_CONTINUE
+VAL 0x0000000e SQ_CF_INST_ALU_BREAK
+VAL 0x0000000f SQ_CF_INST_ALU_ELSE_AFTER
+FLD 30 0x00000001 0x00000000 3 WHOLE_QUAD_MODE
+FLD 31 0x00000001 0x00000000 3 BARRIER
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_CF_ALLOC_EXPORT_WORD0
+FLD  0 0x00001fff 0x00000000 3 ARRAY_BASE
+VAL 0x00000000 SQ_EXPORT_PARAM0
+VAL 0x00000000 SQ_EXPORT_CB0
+VAL 0x00000001 SQ_EXPORT_CB1
+VAL 0x00000002 SQ_EXPORT_CB2
+VAL 0x00000003 SQ_EXPORT_CB3
+VAL 0x00000004 SQ_EXPORT_CB4
+VAL 0x00000005 SQ_EXPORT_CB5
+VAL 0x00000006 SQ_EXPORT_CB6
+VAL 0x00000007 SQ_EXPORT_CB7
+VAL 0x0000001f SQ_EXPORT_PARAM31
+VAL 0x0000003c SQ_EXPORT_POS0
+VAL 0x0000003d SQ_EXPORT_Z
+VAL 0x0000003d SQ_EXPORT_POS1
+VAL 0x0000003e SQ_EXPORT_POS2
+VAL 0x0000003f SQ_EXPORT_POS3
+FLD 13 0x00000003 0x00000000 3 TYPE
+VAL 0x00000000 SQ_EXPORT_PIXEL
+VAL 0x00000001 SQ_EXPORT_POS
+VAL 0x00000002 SQ_EXPORT_PARAM
+VAL 0x00000003 X_UNUSED_FOR_SX_EXPORTS
+FLD 15 0x0000007f 0x00000000 3 RW_GPR
+FLD 22 0x00000001 0x00000000 3 RW_REL
+FLD 23 0x0000007f 0x00000000 3 INDEX_GPR
+FLD 30 0x00000003 0x00000000 3 ELEM_SIZE
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_CF_ALLOC_EXPORT_WORD1
+FLD 17 0x0000000f 0x00000000 3 BURST_COUNT
+FLD 21 0x00000001 0x00000000 3 END_OF_PROGRAM
+FLD 22 0x00000001 0x00000000 3 VALID_PIXEL_MODE
+FLD 23 0x0000003f 0x00000000 3 CF_INST
+VAL 0x00000020 SQ_CF_INST_MEM_STREAM0
+VAL 0x00000021 SQ_CF_INST_MEM_STREAM1
+VAL 0x00000022 SQ_CF_INST_MEM_STREAM2
+VAL 0x00000023 SQ_CF_INST_MEM_STREAM3
+VAL 0x00000024 SQ_CF_INST_MEM_SCRATCH
+VAL 0x00000025 SQ_CF_INST_MEM_REDUCTION
+VAL 0x00000026 SQ_CF_INST_MEM_RING
+VAL 0x00000027 SQ_CF_INST_EXPORT
+VAL 0x00000028 SQ_CF_INST_EXPORT_DONE
+VAL 0x0000003a SQ_CF_INST_MEM_EXPORT
+FLD 30 0x00000001 0x00000000 3 WHOLE_QUAD_MODE
+FLD 31 0x00000001 0x00000000 3 BARRIER
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_CF_ALLOC_EXPORT_WORD1_BUF
+FLD  0 0x00000fff 0x00000000 3 ARRAY_SIZE
+FLD 12 0x0000000f 0x00000000 3 COMP_MASK
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_CF_ALLOC_EXPORT_WORD1_SWIZ
+FLD  0 0x00000007 0x00000000 3 SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD  3 0x00000007 0x00000000 3 SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD  6 0x00000007 0x00000000 3 SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD  9 0x00000007 0x00000000 3 SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_ALU_WORD1
+FLD 15 0x00000007 0x00000000 3 ENCODING
+FLD 18 0x00000007 0x00000000 3 BANK_SWIZZLE
+VAL 0x00000000 SQ_ALU_VEC_012
+VAL 0x00000000 SQ_ALU_SCL_210
+VAL 0x00000001 SQ_ALU_VEC_021
+VAL 0x00000001 SQ_ALU_SCL_122
+VAL 0x00000002 SQ_ALU_VEC_120
+VAL 0x00000002 SQ_ALU_SCL_212
+VAL 0x00000003 SQ_ALU_VEC_102
+VAL 0x00000003 SQ_ALU_SCL_221
+VAL 0x00000004 SQ_ALU_VEC_201
+VAL 0x00000005 SQ_ALU_VEC_210
+FLD 21 0x0000007f 0x00000000 3 DST_GPR
+FLD 28 0x00000001 0x00000000 3 DST_REL
+FLD 29 0x00000003 0x00000000 3 DST_CHAN
+VAL 0x00000000 CHAN_X
+VAL 0x00000001 CHAN_Y
+VAL 0x00000002 CHAN_Z
+VAL 0x00000003 CHAN_W
+FLD 31 0x00000001 0x00000000 3 CLAMP
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_ALU_WORD1_OP2_V2
+FLD  0 0x00000001 0x00000000 3 SRC0_ABS
+FLD  1 0x00000001 0x00000000 3 SRC1_ABS
+FLD  2 0x00000001 0x00000000 3 UPDATE_EXECUTE_MASK
+FLD  3 0x00000001 0x00000000 3 UPDATE_PRED
+FLD  4 0x00000001 0x00000000 3 WRITE_MASK
+FLD  5 0x00000003 0x00000000 3 OMOD
+VAL 0x00000000 SQ_ALU_OMOD_OFF
+VAL 0x00000001 SQ_ALU_OMOD_M2
+VAL 0x00000002 SQ_ALU_OMOD_M4
+VAL 0x00000003 SQ_ALU_OMOD_D2
+FLD  7 0x000007ff 0x00000000 3 ALU_INST
+VAL 0x00000000 SQ_OP2_INST_ADD
+VAL 0x00000001 SQ_OP2_INST_MUL
+VAL 0x00000002 SQ_OP2_INST_MUL_IEEE
+VAL 0x00000003 SQ_OP2_INST_MAX
+VAL 0x00000004 SQ_OP2_INST_MIN
+VAL 0x00000005 SQ_OP2_INST_MAX_DX10
+VAL 0x00000006 SQ_OP2_INST_MIN_DX10
+VAL 0x00000007 SQ_OP2_INST_FREXP_64
+VAL 0x00000008 SQ_OP2_INST_SETE
+VAL 0x00000009 SQ_OP2_INST_SETGT
+VAL 0x0000000a SQ_OP2_INST_SETGE
+VAL 0x0000000b SQ_OP2_INST_SETNE
+VAL 0x0000000c SQ_OP2_INST_SETE_DX10
+VAL 0x0000000d SQ_OP2_INST_SETGT_DX10
+VAL 0x0000000e SQ_OP2_INST_SETGE_DX10
+VAL 0x0000000f SQ_OP2_INST_SETNE_DX10
+VAL 0x00000010 SQ_OP2_INST_FRACT
+VAL 0x00000011 SQ_OP2_INST_TRUNC
+VAL 0x00000012 SQ_OP2_INST_CEIL
+VAL 0x00000013 SQ_OP2_INST_RNDNE
+VAL 0x00000014 SQ_OP2_INST_FLOOR
+VAL 0x00000015 SQ_OP2_INST_MOVA
+VAL 0x00000016 SQ_OP2_INST_MOVA_FLOOR
+VAL 0x00000017 SQ_OP2_INST_ADD_64
+VAL 0x00000018 SQ_OP2_INST_MOVA_INT
+VAL 0x00000019 SQ_OP2_INST_MOV
+VAL 0x0000001a SQ_OP2_INST_NOP
+VAL 0x0000001b SQ_OP2_INST_MUL_64
+VAL 0x0000001c SQ_OP2_INST_FLT64_TO_FLT32
+VAL 0x0000001d SQ_OP2_INST_FLT32_TO_FLT64
+VAL 0x0000001e SQ_OP2_INST_PRED_SETGT_UINT
+VAL 0x0000001f SQ_OP2_INST_PRED_SETGE_UINT
+VAL 0x00000020 SQ_OP2_INST_PRED_SETE
+VAL 0x00000021 SQ_OP2_INST_PRED_SETGT
+VAL 0x00000022 SQ_OP2_INST_PRED_SETGE
+VAL 0x00000023 SQ_OP2_INST_PRED_SETNE
+VAL 0x00000024 SQ_OP2_INST_PRED_SET_INV
+VAL 0x00000025 SQ_OP2_INST_PRED_SET_POP
+VAL 0x00000026 SQ_OP2_INST_PRED_SET_CLR
+VAL 0x00000027 SQ_OP2_INST_PRED_SET_RESTORE
+VAL 0x00000028 SQ_OP2_INST_PRED_SETE_PUSH
+VAL 0x00000029 SQ_OP2_INST_PRED_SETGT_PUSH
+VAL 0x0000002a SQ_OP2_INST_PRED_SETGE_PUSH
+VAL 0x0000002b SQ_OP2_INST_PRED_SETNE_PUSH
+VAL 0x0000002c SQ_OP2_INST_KILLE
+VAL 0x0000002d SQ_OP2_INST_KILLGT
+VAL 0x0000002e SQ_OP2_INST_KILLGE
+VAL 0x0000002f SQ_OP2_INST_KILLNE
+VAL 0x00000030 SQ_OP2_INST_AND_INT
+VAL 0x00000031 SQ_OP2_INST_OR_INT
+VAL 0x00000032 SQ_OP2_INST_XOR_INT
+VAL 0x00000033 SQ_OP2_INST_NOT_INT
+VAL 0x00000034 SQ_OP2_INST_ADD_INT
+VAL 0x00000035 SQ_OP2_INST_SUB_INT
+VAL 0x00000036 SQ_OP2_INST_MAX_INT
+VAL 0x00000037 SQ_OP2_INST_MIN_INT
+VAL 0x00000038 SQ_OP2_INST_MAX_UINT
+VAL 0x00000039 SQ_OP2_INST_MIN_UINT
+VAL 0x0000003a SQ_OP2_INST_SETE_INT
+VAL 0x0000003b SQ_OP2_INST_SETGT_INT
+VAL 0x0000003c SQ_OP2_INST_SETGE_INT
+VAL 0x0000003d SQ_OP2_INST_SETNE_INT
+VAL 0x0000003e SQ_OP2_INST_SETGT_UINT
+VAL 0x0000003f SQ_OP2_INST_SETGE_UINT
+VAL 0x00000040 SQ_OP2_INST_KILLGT_UINT
+VAL 0x00000041 SQ_OP2_INST_KILLGE_UINT
+VAL 0x00000042 SQ_OP2_INST_PRED_SETE_INT
+VAL 0x00000043 SQ_OP2_INST_PRED_SETGT_INT
+VAL 0x00000044 SQ_OP2_INST_PRED_SETGE_INT
+VAL 0x00000045 SQ_OP2_INST_PRED_SETNE_INT
+VAL 0x00000046 SQ_OP2_INST_KILLE_INT
+VAL 0x00000047 SQ_OP2_INST_KILLGT_INT
+VAL 0x00000048 SQ_OP2_INST_KILLGE_INT
+VAL 0x00000049 SQ_OP2_INST_KILLNE_INT
+VAL 0x0000004a SQ_OP2_INST_PRED_SETE_PUSH_INT
+VAL 0x0000004b SQ_OP2_INST_PRED_SETGT_PUSH_INT
+VAL 0x0000004c SQ_OP2_INST_PRED_SETGE_PUSH_INT
+VAL 0x0000004d SQ_OP2_INST_PRED_SETNE_PUSH_INT
+VAL 0x0000004e SQ_OP2_INST_PRED_SETLT_PUSH_INT
+VAL 0x0000004f SQ_OP2_INST_PRED_SETLE_PUSH_INT
+VAL 0x00000050 SQ_OP2_INST_DOT4
+VAL 0x00000051 SQ_OP2_INST_DOT4_IEEE
+VAL 0x00000052 SQ_OP2_INST_CUBE
+VAL 0x00000053 SQ_OP2_INST_MAX4
+VAL 0x00000060 SQ_OP2_INST_MOVA_GPR_INT
+VAL 0x00000061 SQ_OP2_INST_EXP_IEEE
+VAL 0x00000062 SQ_OP2_INST_LOG_CLAMPED
+VAL 0x00000063 SQ_OP2_INST_LOG_IEEE
+VAL 0x00000064 SQ_OP2_INST_RECIP_CLAMPED
+VAL 0x00000065 SQ_OP2_INST_RECIP_FF
+VAL 0x00000066 SQ_OP2_INST_RECIP_IEEE
+VAL 0x00000067 SQ_OP2_INST_RECIPSQRT_CLAMPED
+VAL 0x00000068 SQ_OP2_INST_RECIPSQRT_FF
+VAL 0x00000069 SQ_OP2_INST_RECIPSQRT_IEEE
+VAL 0x0000006a SQ_OP2_INST_SQRT_IEEE
+VAL 0x0000006b SQ_OP2_INST_FLT_TO_INT
+VAL 0x0000006c SQ_OP2_INST_INT_TO_FLT
+VAL 0x0000006d SQ_OP2_INST_UINT_TO_FLT
+VAL 0x0000006e SQ_OP2_INST_SIN
+VAL 0x0000006f SQ_OP2_INST_COS
+VAL 0x00000070 SQ_OP2_INST_ASHR_INT
+VAL 0x00000071 SQ_OP2_INST_LSHR_INT
+VAL 0x00000072 SQ_OP2_INST_LSHL_INT
+VAL 0x00000073 SQ_OP2_INST_MULLO_INT
+VAL 0x00000074 SQ_OP2_INST_MULHI_INT
+VAL 0x00000075 SQ_OP2_INST_MULLO_UINT
+VAL 0x00000076 SQ_OP2_INST_MULHI_UINT
+VAL 0x00000077 SQ_OP2_INST_RECIP_INT
+VAL 0x00000078 SQ_OP2_INST_RECIP_UINT
+VAL 0x00000079 SQ_OP2_INST_FLT_TO_UINT
+VAL 0x0000007a SQ_OP2_INST_LDEXP_64
+VAL 0x0000007b SQ_OP2_INST_FRACT_64
+VAL 0x0000007c SQ_OP2_INST_PRED_SETGT_64
+VAL 0x0000007d SQ_OP2_INST_PRED_SETE_64
+VAL 0x0000007e SQ_OP2_INST_PRED_SETGE_64
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_ALU_WORD1_OP3
+FLD  0 0x000001ff 0x00000000 3 SRC2_SEL
+VAL 0x00000080 SQ_ALU_KCACHE0_0
+VAL 0x0000009f SQ_ALU_KCACHE0_31
+VAL 0x000000a0 SQ_ALU_KCACHE1_0
+VAL 0x000000bf SQ_ALU_KCACHE1_31
+VAL 0x000000f4 SQ_ALU_SRC_1_DBL_L
+VAL 0x000000f5 SQ_ALU_SRC_1_DBL_M
+VAL 0x000000f6 SQ_ALU_SRC_0_5_DBL_L
+VAL 0x000000f7 SQ_ALU_SRC_0_5_DBL_M
+VAL 0x000000f8 SQ_ALU_SRC_0
+VAL 0x000000f9 SQ_ALU_SRC_1
+VAL 0x000000fa SQ_ALU_SRC_1_INT
+VAL 0x000000fb SQ_ALU_SRC_M_1_INT
+VAL 0x000000fc SQ_ALU_SRC_0_5
+VAL 0x000000fd SQ_ALU_SRC_LITERAL
+VAL 0x000000fe SQ_ALU_SRC_PV
+VAL 0x000000ff SQ_ALU_SRC_PS
+VAL 0x00000100 SQ_ALU_CFILE_0
+VAL 0x000001ff SQ_ALU_CFILE_255
+FLD  9 0x00000001 0x00000000 3 SRC2_REL
+FLD 10 0x00000003 0x00000000 3 SRC2_CHAN
+VAL 0x00000000 SQ_CHAN_X
+VAL 0x00000001 SQ_CHAN_Y
+VAL 0x00000002 SQ_CHAN_Z
+VAL 0x00000003 SQ_CHAN_W
+FLD 12 0x00000001 0x00000000 3 SRC2_NEG
+FLD 13 0x0000001f 0x00000000 3 ALU_INST
+VAL 0x00000008 SQ_OP3_INST_MULADD_64
+VAL 0x00000009 SQ_OP3_INST_MULADD_64_M2
+VAL 0x0000000a SQ_OP3_INST_MULADD_64_M4
+VAL 0x0000000b SQ_OP3_INST_MULADD_64_D2
+VAL 0x0000000c SQ_OP3_INST_MUL_LIT
+VAL 0x0000000d SQ_OP3_INST_MUL_LIT_M2
+VAL 0x0000000e SQ_OP3_INST_MUL_LIT_M4
+VAL 0x0000000f SQ_OP3_INST_MUL_LIT_D2
+VAL 0x00000010 SQ_OP3_INST_MULADD
+VAL 0x00000011 SQ_OP3_INST_MULADD_M2
+VAL 0x00000012 SQ_OP3_INST_MULADD_M4
+VAL 0x00000013 SQ_OP3_INST_MULADD_D2
+VAL 0x00000014 SQ_OP3_INST_MULADD_IEEE
+VAL 0x00000015 SQ_OP3_INST_MULADD_IEEE_M2
+VAL 0x00000016 SQ_OP3_INST_MULADD_IEEE_M4
+VAL 0x00000017 SQ_OP3_INST_MULADD_IEEE_D2
+VAL 0x00000018 SQ_OP3_INST_CNDE
+VAL 0x00000019 SQ_OP3_INST_CNDGT
+VAL 0x0000001a SQ_OP3_INST_CNDGE
+VAL 0x0000001c SQ_OP3_INST_CNDE_INT
+VAL 0x0000001d SQ_OP3_INST_CNDGT_INT
+VAL 0x0000001e SQ_OP3_INST_CNDGE_INT
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_VTX_WORD1
+FLD  9 0x00000007 0x00000000 3 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 12 0x00000007 0x00000000 3 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 15 0x00000007 0x00000000 3 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 18 0x00000007 0x00000000 3 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 21 0x00000001 0x00000000 3 USE_CONST_FIELDS
+FLD 22 0x0000003f 0x00000000 3 DATA_FORMAT
+VAL 0x00000000 FMT_INVALID
+VAL 0x00000001 FMT_8
+VAL 0x00000002 FMT_4_4
+VAL 0x00000003 FMT_3_3_2
+VAL 0x00000005 FMT_16
+VAL 0x00000006 FMT_16_FLOAT
+VAL 0x00000007 FMT_8_8
+VAL 0x00000008 FMT_5_6_5
+VAL 0x00000009 FMT_6_5_5
+VAL 0x0000000a FMT_1_5_5_5
+VAL 0x0000000b FMT_4_4_4_4
+VAL 0x0000000c FMT_5_5_5_1
+VAL 0x0000000d FMT_32
+VAL 0x0000000e FMT_32_FLOAT
+VAL 0x0000000f FMT_16_16
+VAL 0x00000010 FMT_16_16_FLOAT
+VAL 0x00000011 FMT_8_24
+VAL 0x00000012 FMT_8_24_FLOAT
+VAL 0x00000013 FMT_24_8
+VAL 0x00000014 FMT_24_8_FLOAT
+VAL 0x00000015 FMT_10_11_11
+VAL 0x00000016 FMT_10_11_11_FLOAT
+VAL 0x00000017 FMT_11_11_10
+VAL 0x00000018 FMT_11_11_10_FLOAT
+VAL 0x00000019 FMT_2_10_10_10
+VAL 0x0000001a FMT_8_8_8_8
+VAL 0x0000001b FMT_10_10_10_2
+VAL 0x0000001c FMT_X24_8_32_FLOAT
+VAL 0x0000001d FMT_32_32
+VAL 0x0000001e FMT_32_32_FLOAT
+VAL 0x0000001f FMT_16_16_16_16
+VAL 0x00000020 FMT_16_16_16_16_FLOAT
+VAL 0x00000022 FMT_32_32_32_32
+VAL 0x00000023 FMT_32_32_32_32_FLOAT
+VAL 0x00000025 FMT_1
+VAL 0x00000027 FMT_GB_GR
+VAL 0x00000028 FMT_BG_RG
+VAL 0x00000029 FMT_32_AS_8
+VAL 0x0000002a FMT_32_AS_8_8
+VAL 0x0000002b FMT_5_9_9_9_SHAREDEXP
+VAL 0x0000002c FMT_8_8_8
+VAL 0x0000002d FMT_16_16_16
+VAL 0x0000002e FMT_16_16_16_FLOAT
+VAL 0x0000002f FMT_32_32_32
+VAL 0x00000030 FMT_32_32_32_FLOAT
+FLD 28 0x00000003 0x00000000 3 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 30 0x00000001 0x00000000 3 FORMAT_COMP_ALL
+VAL 0x00000000 FORMAT_COMP_UNSIGNED
+VAL 0x00000001 FORMAT_COMP_SIGNED
+FLD 31 0x00000001 0x00000000 3 SRF_MODE_ALL
+VAL 0x00000000 SRF_MODE_ZERO_CLAMP_MINUS_ONE
+VAL 0x00000001 SRF_MODE_NO_ZERO
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_VTX_WORD1_GPR
+FLD  0 0x0000007f 0x00000000 3 DST_GPR
+FLD  7 0x00000001 0x00000000 3 DST_REL
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_VTX_WORD1_SEM
+FLD  0 0x000000ff 0x00000000 3 SEMANTIC_ID
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_VTX_WORD2
+FLD  0 0x0000ffff 0x00000000 3 OFFSET
+FLD 16 0x00000003 0x00000000 3 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+FLD 18 0x00000001 0x00000000 3 CONST_BUF_NO_STRIDE
+FLD 19 0x00000001 0x00000000 3 MEGA_FETCH
+FLD 20 0x00000001 0x00000000 3 ALT_CONST
+REG 0x00000000 0x0000010a 0x0000000c 32    0    1    0 SQ_TEX_WORD0
+FLD  0 0x0000001f 0x00000000 3 TEX_INST
+VAL 0x00000000 SQ_TEX_INST_VTX_FETCH
+VAL 0x00000001 SQ_TEX_INST_VTX_SEMANTIC
+VAL 0x00000002 X_MEMORY_READ
+VAL 0x00000003 SQ_TEX_INST_LD
+VAL 0x00000004 SQ_TEX_INST_GET_TEXTURE_RESINFO
+VAL 0x00000005 SQ_TEX_INST_GET_NUMBER_OF_SAMPLES
+VAL 0x00000006 SQ_TEX_INST_GET_LOD
+VAL 0x00000007 SQ_TEX_INST_GET_GRADIENTS_H
+VAL 0x00000008 SQ_TEX_INST_GET_GRADIENTS_V
+VAL 0x00000009 SQ_TEX_INST_GET_LERP
+VAL 0x0000000a SQ_TEX_INST_KEEP_GRADIENTS
+VAL 0x0000000b SQ_TEX_INST_SET_GRADIENTS_H
+VAL 0x0000000c SQ_TEX_INST_SET_GRADIENTS_V
+VAL 0x0000000d SQ_TEX_INST_PASS
+VAL 0x0000000e X_Z_SET_INDEX_FOR_ARRAY_OF_CUBEMAPS
+VAL 0x0000000f X_FETCH4_LOAD4_INSTRUCTION_FOR_DX10_1
+VAL 0x00000010 SQ_TEX_INST_SAMPLE
+VAL 0x00000011 SQ_TEX_INST_SAMPLE_L
+VAL 0x00000012 SQ_TEX_INST_SAMPLE_LB
+VAL 0x00000013 SQ_TEX_INST_SAMPLE_LZ
+VAL 0x00000014 SQ_TEX_INST_SAMPLE_G
+VAL 0x00000015 SQ_TEX_INST_SAMPLE_G_L
+VAL 0x00000016 SQ_TEX_INST_SAMPLE_G_LB
+VAL 0x00000017 SQ_TEX_INST_SAMPLE_G_LZ
+VAL 0x00000018 SQ_TEX_INST_SAMPLE_C
+VAL 0x00000019 SQ_TEX_INST_SAMPLE_C_L
+VAL 0x0000001a SQ_TEX_INST_SAMPLE_C_LB
+VAL 0x0000001b SQ_TEX_INST_SAMPLE_C_LZ
+VAL 0x0000001c SQ_TEX_INST_SAMPLE_C_G
+VAL 0x0000001d SQ_TEX_INST_SAMPLE_C_G_L
+VAL 0x0000001e SQ_TEX_INST_SAMPLE_C_G_LB
+VAL 0x0000001f SQ_TEX_INST_SAMPLE_C_G_LZ
+FLD  5 0x00000001 0x00000000 3 BC_FRAC_MODE
+FLD  7 0x00000001 0x00000000 3 FETCH_WHOLE_QUAD
+FLD  8 0x000000ff 0x00000000 3 RESOURCE_ID
+FLD 16 0x0000007f 0x00000000 3 SRC_GPR
+FLD 23 0x00000001 0x00000000 3 SRC_REL
+FLD 24 0x00000001 0x00000000 3 ALT_CONST
+REG 0x00008dfc 0x0000010a 0x0000000c 32    0    1    0 SQ_ALU_WORD0
+FLD  0 0x000001ff 0x00000000 3 SRC0_SEL
+VAL 0x00000080 SQ_ALU_KCACHE0_0
+VAL 0x0000009f SQ_ALU_KCACHE0_31
+VAL 0x000000a0 SQ_ALU_KCACHE1_0
+VAL 0x000000bf SQ_ALU_KCACHE1_31
+VAL 0x000000f4 SQ_ALU_SRC_1_DBL_L
+VAL 0x000000f5 SQ_ALU_SRC_1_DBL_M
+VAL 0x000000f6 SQ_ALU_SRC_0_5_DBL_L
+VAL 0x000000f7 SQ_ALU_SRC_0_5_DBL_M
+VAL 0x000000f8 SQ_ALU_SRC_0
+VAL 0x000000f9 SQ_ALU_SRC_1
+VAL 0x000000fa SQ_ALU_SRC_1_INT
+VAL 0x000000fb SQ_ALU_SRC_M_1_INT
+VAL 0x000000fc SQ_ALU_SRC_0_5
+VAL 0x000000fd SQ_ALU_SRC_LITERAL
+VAL 0x000000fe SQ_ALU_SRC_PV
+VAL 0x000000ff SQ_ALU_SRC_PS
+VAL 0x00000100 SQ_ALU_CFILE_0
+VAL 0x000001ff SQ_ALU_CFILE_255
+FLD  9 0x00000001 0x00000000 3 SRC0_REL
+FLD 10 0x00000003 0x00000000 3 SRC0_CHAN
+VAL 0x00000000 SQ_CHAN_X
+VAL 0x00000001 SQ_CHAN_Y
+VAL 0x00000002 SQ_CHAN_Z
+VAL 0x00000003 SQ_CHAN_W
+FLD 12 0x00000001 0x00000000 3 SRC0_NEG
+FLD 13 0x000001ff 0x00000000 3 SRC1_SEL
+VAL 0x00000080 SQ_ALU_KCACHE0_0
+VAL 0x0000009f SQ_ALU_KCACHE0_31
+VAL 0x000000a0 SQ_ALU_KCACHE1_0
+VAL 0x000000bf SQ_ALU_KCACHE1_31
+VAL 0x000000f4 SQ_ALU_SRC_1_DBL_L
+VAL 0x000000f5 SQ_ALU_SRC_1_DBL_M
+VAL 0x000000f6 SQ_ALU_SRC_0_5_DBL_L
+VAL 0x000000f7 SQ_ALU_SRC_0_5_DBL_M
+VAL 0x000000f8 SQ_ALU_SRC_0
+VAL 0x000000f9 SQ_ALU_SRC_1
+VAL 0x000000fa SQ_ALU_SRC_1_INT
+VAL 0x000000fb SQ_ALU_SRC_M_1_INT
+VAL 0x000000fc SQ_ALU_SRC_0_5
+VAL 0x000000fd SQ_ALU_SRC_LITERAL
+VAL 0x000000fe SQ_ALU_SRC_PV
+VAL 0x000000ff SQ_ALU_SRC_PS
+VAL 0x00000100 SQ_ALU_CFILE_0
+VAL 0x000001ff SQ_ALU_CFILE_255
+FLD 22 0x00000001 0x00000000 3 SRC1_REL
+FLD 23 0x00000003 0x00000000 3 SRC1_CHAN
+VAL 0x00000000 SQ_CHAN_X
+VAL 0x00000001 SQ_CHAN_Y
+VAL 0x00000002 SQ_CHAN_Z
+VAL 0x00000003 SQ_CHAN_W
+FLD 25 0x00000001 0x00000000 3 SRC1_NEG
+FLD 26 0x00000007 0x00000000 3 INDEX_MODE
+VAL 0x00000000 SQ_INDEX_AR_X
+VAL 0x00000001 SQ_INDEX_AR_Y
+VAL 0x00000002 SQ_INDEX_AR_Z
+VAL 0x00000003 SQ_INDEX_AR_W
+VAL 0x00000004 SQ_INDEX_LOOP
+VAL 0x00000005 SQ_INDEX_GLOBAL
+VAL 0x00000006 SQ_INDEX_GLOBAL_AR_X
+FLD 29 0x00000003 0x00000000 3 PRED_SEL
+VAL 0x00000000 SQ_PRED_SEL_OFF
+VAL 0x00000002 SQ_PRED_SEL_ZERO
+VAL 0x00000003 SQ_PRED_SEL_ONE
+FLD 31 0x00000001 0x00000000 3 LAST
+REG 0x00008dfc 0x0000010a 0x0000000c 32    0    1    0 SQ_VTX_WORD0
+FLD  0 0x0000001f 0x00000000 3 VTX_INST
+VAL 0x00000000 SQ_VTX_INST_FETCH
+VAL 0x00000001 SQ_VTX_INST_SEMANTIC
+VAL 0x00000002 SQ_VTX_INST_MEM
+FLD  5 0x00000003 0x00000000 3 FETCH_TYPE
+VAL 0x00000000 SQ_VTX_FETCH_VERTEX_DATA
+VAL 0x00000001 SQ_VTX_FETCH_INSTANCE_DATA
+VAL 0x00000002 SQ_VTX_FETCH_NO_INDEX_OFFSET
+FLD  7 0x00000001 0x00000000 3 FETCH_WHOLE_QUAD
+FLD  8 0x000000ff 0x00000000 3 BUFFER_ID
+FLD 16 0x0000007f 0x00000000 3 SRC_GPR
+FLD 23 0x00000001 0x00000000 3 SRC_REL
+FLD 24 0x00000003 0x00000000 3 SRC_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+FLD 26 0x0000003f 0x00000000 3 MEGA_FETCH_COUNT
+REG 0x00008dfc 0x0000010a 0x0000000c 32    0    1    0 SQ_TEX_WORD1
+FLD  0 0x0000007f 0x00000000 3 DST_GPR
+FLD  7 0x00000001 0x00000000 3 DST_REL
+FLD  9 0x00000007 0x00000000 3 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 12 0x00000007 0x00000000 3 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 15 0x00000007 0x00000000 3 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 18 0x00000007 0x00000000 3 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 21 0x0000007f 0x00000000 3 LOD_BIAS
+FLD 28 0x00000001 0x00000000 3 COORD_TYPE_X
+VAL 0x00000000 COORD_UNNORMALIZED
+VAL 0x00000001 COORD_NORMALIZED
+FLD 29 0x00000001 0x00000000 3 COORD_TYPE_Y
+VAL 0x00000000 COORD_UNNORMALIZED
+VAL 0x00000001 COORD_NORMALIZED
+FLD 30 0x00000001 0x00000000 3 COORD_TYPE_Z
+VAL 0x00000000 COORD_UNNORMALIZED
+VAL 0x00000001 COORD_NORMALIZED
+FLD 31 0x00000001 0x00000000 3 COORD_TYPE_W
+VAL 0x00000000 COORD_UNNORMALIZED
+VAL 0x00000001 COORD_NORMALIZED
+REG 0x00008dfc 0x0000010a 0x0000000c 32    0    1    0 SQ_TEX_WORD2
+FLD  0 0x0000001f 0x00000000 3 OFFSET_X
+FLD  5 0x0000001f 0x00000000 3 OFFSET_Y
+FLD 10 0x0000001f 0x00000000 3 OFFSET_Z
+FLD 15 0x0000001f 0x00000000 3 SAMPLER_ID
+FLD 20 0x00000007 0x00000000 3 SRC_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 23 0x00000007 0x00000000 3 SRC_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 26 0x00000007 0x00000000 3 SRC_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 29 0x00000007 0x00000000 3 SRC_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+REG 0x00038000 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_PS_WORD0
+FLD  0 0x00000007 0x00000000 3 DIM
+VAL 0x00000000 SQ_TEX_DIM_1D
+VAL 0x00000001 SQ_TEX_DIM_2D
+VAL 0x00000002 SQ_TEX_DIM_3D
+VAL 0x00000003 SQ_TEX_DIM_CUBEMAP
+VAL 0x00000004 SQ_TEX_DIM_1D_ARRAY
+VAL 0x00000005 SQ_TEX_DIM_2D_ARRAY
+VAL 0x00000006 SQ_TEX_DIM_2D_MSAA
+VAL 0x00000007 SQ_TEX_DIM_2D_ARRAY_MSAA
+FLD  3 0x0000000f 0x00000000 3 TILE_MODE
+FLD  7 0x00000001 0x00000000 3 TILE_TYPE
+FLD  8 0x000007ff 0x00000000 3 PITCH
+FLD 19 0x00001fff 0x00000000 3 TEX_WIDTH
+REG 0x00038004 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_PS_WORD1
+FLD  0 0x00001fff 0x00000000 3 TEX_HEIGHT
+FLD 13 0x00001fff 0x00000000 3 TEX_DEPTH
+FLD 26 0x0000003f 0x00000000 3 DATA_FORMAT
+REG 0x00038008 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_PS_WORD2
+REG 0x0003800c 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_PS_WORD3
+REG 0x00038010 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_PS_WORD4
+FLD  0 0x00000003 0x00000000 3 FORMAT_COMP_X
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  2 0x00000003 0x00000000 3 FORMAT_COMP_Y
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  4 0x00000003 0x00000000 3 FORMAT_COMP_Z
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  6 0x00000003 0x00000000 3 FORMAT_COMP_W
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  8 0x00000003 0x00000000 3 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 10 0x00000001 0x00000000 3 SRF_MODE_ALL
+VAL 0x00000000 SRF_MODE_ZERO_CLAMP_MINUS_ONE
+VAL 0x00000001 SRF_MODE_NO_ZERO
+FLD 11 0x00000001 0x00000000 3 FORCE_DEGAMMA
+FLD 12 0x00000003 0x00000000 3 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+FLD 14 0x00000003 0x00000000 3 REQUEST_SIZE
+FLD 16 0x00000007 0x00000000 3 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 19 0x00000007 0x00000000 3 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 22 0x00000007 0x00000000 3 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 25 0x00000007 0x00000000 3 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 28 0x0000000f 0x00000000 3 BASE_LEVEL
+REG 0x00038014 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_PS_WORD5
+FLD  0 0x0000000f 0x00000000 3 LAST_LEVEL
+FLD  4 0x00001fff 0x00000000 3 BASE_ARRAY
+FLD 17 0x00001fff 0x00000000 3 LAST_ARRAY
+REG 0x00038018 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_PS_WORD6
+FLD  0 0x00000003 0x00000000 3 MPEG_CLAMP
+VAL 0x00000000 SQ_TEX_MPEG_CLAMP_OFF
+VAL 0x00000001 SQ_TEX_MPEG_9
+VAL 0x00000002 SQ_TEX_MPEG_10
+FLD  5 0x00000007 0x00000000 3 PERF_MODULATION
+FLD  8 0x00000001 0x00000000 3 INTERLACED
+FLD 30 0x00000003 0x00000000 3 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x00039180 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_VS_WORD0
+FLD  0 0x00000007 0x00000000 3 DIM
+VAL 0x00000000 SQ_TEX_DIM_1D
+VAL 0x00000001 SQ_TEX_DIM_2D
+VAL 0x00000002 SQ_TEX_DIM_3D
+VAL 0x00000003 SQ_TEX_DIM_CUBEMAP
+VAL 0x00000004 SQ_TEX_DIM_1D_ARRAY
+VAL 0x00000005 SQ_TEX_DIM_2D_ARRAY
+VAL 0x00000006 SQ_TEX_DIM_2D_MSAA
+VAL 0x00000007 SQ_TEX_DIM_2D_ARRAY_MSAA
+FLD  3 0x0000000f 0x00000000 3 TILE_MODE
+FLD  7 0x00000001 0x00000000 3 TILE_TYPE
+FLD  8 0x000007ff 0x00000000 3 PITCH
+FLD 19 0x00001fff 0x00000000 3 TEX_WIDTH
+REG 0x00039184 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_VS_WORD1
+FLD  0 0x00001fff 0x00000000 3 TEX_HEIGHT
+FLD 13 0x00001fff 0x00000000 3 TEX_DEPTH
+FLD 26 0x0000003f 0x00000000 3 DATA_FORMAT
+REG 0x00039188 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_VS_WORD2
+REG 0x0003918c 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_VS_WORD3
+REG 0x00039190 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_VS_WORD4
+FLD  0 0x00000003 0x00000000 3 FORMAT_COMP_X
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  2 0x00000003 0x00000000 3 FORMAT_COMP_Y
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  4 0x00000003 0x00000000 3 FORMAT_COMP_Z
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  6 0x00000003 0x00000000 3 FORMAT_COMP_W
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  8 0x00000003 0x00000000 3 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 10 0x00000001 0x00000000 3 SRF_MODE_ALL
+VAL 0x00000000 SRF_MODE_ZERO_CLAMP_MINUS_ONE
+VAL 0x00000001 SRF_MODE_NO_ZERO
+FLD 11 0x00000001 0x00000000 3 FORCE_DEGAMMA
+FLD 12 0x00000003 0x00000000 3 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+FLD 14 0x00000003 0x00000000 3 REQUEST_SIZE
+FLD 16 0x00000007 0x00000000 3 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 19 0x00000007 0x00000000 3 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 22 0x00000007 0x00000000 3 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 25 0x00000007 0x00000000 3 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 28 0x0000000f 0x00000000 3 BASE_LEVEL
+REG 0x00039194 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_VS_WORD5
+FLD  0 0x0000000f 0x00000000 3 LAST_LEVEL
+FLD  4 0x00001fff 0x00000000 3 BASE_ARRAY
+FLD 17 0x00001fff 0x00000000 3 LAST_ARRAY
+REG 0x00039198 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_VS_WORD6
+FLD  0 0x00000003 0x00000000 3 MPEG_CLAMP
+VAL 0x00000000 SQ_TEX_MPEG_CLAMP_OFF
+VAL 0x00000001 SQ_TEX_MPEG_9
+VAL 0x00000002 SQ_TEX_MPEG_10
+FLD  5 0x00000007 0x00000000 3 PERF_MODULATION
+FLD  8 0x00000001 0x00000000 3 INTERLACED
+FLD 30 0x00000003 0x00000000 3 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x0003a300 0x0000010b 0x0000000c 32    0   16   28 SQ_TEX_RESOURCE_FS_WORD0
+FLD  0 0x00000007 0x00000000 3 DIM
+VAL 0x00000000 SQ_TEX_DIM_1D
+VAL 0x00000001 SQ_TEX_DIM_2D
+VAL 0x00000002 SQ_TEX_DIM_3D
+VAL 0x00000003 SQ_TEX_DIM_CUBEMAP
+VAL 0x00000004 SQ_TEX_DIM_1D_ARRAY
+VAL 0x00000005 SQ_TEX_DIM_2D_ARRAY
+VAL 0x00000006 SQ_TEX_DIM_2D_MSAA
+VAL 0x00000007 SQ_TEX_DIM_2D_ARRAY_MSAA
+FLD  3 0x0000000f 0x00000000 3 TILE_MODE
+FLD  7 0x00000001 0x00000000 3 TILE_TYPE
+FLD  8 0x000007ff 0x00000000 3 PITCH
+FLD 19 0x00001fff 0x00000000 3 TEX_WIDTH
+REG 0x0003a304 0x0000010b 0x0000000c 32    0   16   28 SQ_TEX_RESOURCE_FS_WORD1
+FLD  0 0x00001fff 0x00000000 3 TEX_HEIGHT
+FLD 13 0x00001fff 0x00000000 3 TEX_DEPTH
+FLD 26 0x0000003f 0x00000000 3 DATA_FORMAT
+REG 0x0003a308 0x0000010b 0x0000000c 32    0   16   28 SQ_TEX_RESOURCE_FS_WORD2
+REG 0x0003a30c 0x0000010b 0x0000000c 32    0   16   28 SQ_TEX_RESOURCE_FS_WORD3
+REG 0x0003a310 0x0000010b 0x0000000c 32    0   16   28 SQ_TEX_RESOURCE_FS_WORD4
+FLD  0 0x00000003 0x00000000 3 FORMAT_COMP_X
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  2 0x00000003 0x00000000 3 FORMAT_COMP_Y
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  4 0x00000003 0x00000000 3 FORMAT_COMP_Z
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  6 0x00000003 0x00000000 3 FORMAT_COMP_W
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  8 0x00000003 0x00000000 3 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 10 0x00000001 0x00000000 3 SRF_MODE_ALL
+VAL 0x00000000 SRF_MODE_ZERO_CLAMP_MINUS_ONE
+VAL 0x00000001 SRF_MODE_NO_ZERO
+FLD 11 0x00000001 0x00000000 3 FORCE_DEGAMMA
+FLD 12 0x00000003 0x00000000 3 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+FLD 14 0x00000003 0x00000000 3 REQUEST_SIZE
+FLD 16 0x00000007 0x00000000 3 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 19 0x00000007 0x00000000 3 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 22 0x00000007 0x00000000 3 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 25 0x00000007 0x00000000 3 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 28 0x0000000f 0x00000000 3 BASE_LEVEL
+REG 0x0003a314 0x0000010b 0x0000000c 32    0   16   28 SQ_TEX_RESOURCE_FS_WORD5
+FLD  0 0x0000000f 0x00000000 3 LAST_LEVEL
+FLD  4 0x00001fff 0x00000000 3 BASE_ARRAY
+FLD 17 0x00001fff 0x00000000 3 LAST_ARRAY
+REG 0x0003a318 0x0000010b 0x0000000c 32    0   16   28 SQ_TEX_RESOURCE_FS_WORD6
+FLD  0 0x00000003 0x00000000 3 MPEG_CLAMP
+VAL 0x00000000 SQ_TEX_MPEG_CLAMP_OFF
+VAL 0x00000001 SQ_TEX_MPEG_9
+VAL 0x00000002 SQ_TEX_MPEG_10
+FLD  5 0x00000007 0x00000000 3 PERF_MODULATION
+FLD  8 0x00000001 0x00000000 3 INTERLACED
+FLD 30 0x00000003 0x00000000 3 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x0003a4c0 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_GS_WORD0
+FLD  0 0x00000007 0x00000000 3 DIM
+VAL 0x00000000 SQ_TEX_DIM_1D
+VAL 0x00000001 SQ_TEX_DIM_2D
+VAL 0x00000002 SQ_TEX_DIM_3D
+VAL 0x00000003 SQ_TEX_DIM_CUBEMAP
+VAL 0x00000004 SQ_TEX_DIM_1D_ARRAY
+VAL 0x00000005 SQ_TEX_DIM_2D_ARRAY
+VAL 0x00000006 SQ_TEX_DIM_2D_MSAA
+VAL 0x00000007 SQ_TEX_DIM_2D_ARRAY_MSAA
+FLD  3 0x0000000f 0x00000000 3 TILE_MODE
+FLD  7 0x00000001 0x00000000 3 TILE_TYPE
+FLD  8 0x000007ff 0x00000000 3 PITCH
+FLD 19 0x00001fff 0x00000000 3 TEX_WIDTH
+REG 0x0003a4c4 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_GS_WORD1
+FLD  0 0x00001fff 0x00000000 3 TEX_HEIGHT
+FLD 13 0x00001fff 0x00000000 3 TEX_DEPTH
+FLD 26 0x0000003f 0x00000000 3 DATA_FORMAT
+REG 0x0003a4c8 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_GS_WORD2
+REG 0x0003a4cc 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_GS_WORD3
+REG 0x0003a4d0 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_GS_WORD4
+FLD  0 0x00000003 0x00000000 3 FORMAT_COMP_X
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  2 0x00000003 0x00000000 3 FORMAT_COMP_Y
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  4 0x00000003 0x00000000 3 FORMAT_COMP_Z
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  6 0x00000003 0x00000000 3 FORMAT_COMP_W
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  8 0x00000003 0x00000000 3 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 10 0x00000001 0x00000000 3 SRF_MODE_ALL
+VAL 0x00000000 SRF_MODE_ZERO_CLAMP_MINUS_ONE
+VAL 0x00000001 SRF_MODE_NO_ZERO
+FLD 11 0x00000001 0x00000000 3 FORCE_DEGAMMA
+FLD 12 0x00000003 0x00000000 3 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+FLD 14 0x00000003 0x00000000 3 REQUEST_SIZE
+FLD 16 0x00000007 0x00000000 3 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 19 0x00000007 0x00000000 3 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 22 0x00000007 0x00000000 3 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 25 0x00000007 0x00000000 3 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 28 0x0000000f 0x00000000 3 BASE_LEVEL
+REG 0x0003a4d4 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_GS_WORD5
+FLD  0 0x0000000f 0x00000000 3 LAST_LEVEL
+FLD  4 0x00001fff 0x00000000 3 BASE_ARRAY
+FLD 17 0x00001fff 0x00000000 3 LAST_ARRAY
+REG 0x0003a4d8 0x0000010b 0x0000000c 32    0  160   28 SQ_TEX_RESOURCE_GS_WORD6
+FLD  0 0x00000003 0x00000000 3 MPEG_CLAMP
+VAL 0x00000000 SQ_TEX_MPEG_CLAMP_OFF
+VAL 0x00000001 SQ_TEX_MPEG_9
+VAL 0x00000002 SQ_TEX_MPEG_10
+FLD  5 0x00000007 0x00000000 3 PERF_MODULATION
+FLD  8 0x00000001 0x00000000 3 INTERLACED
+FLD 30 0x00000003 0x00000000 3 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x00038000 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_PS_WORD0
+REG 0x00038004 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_PS_WORD1
+REG 0x00038008 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_PS_WORD2
+FLD  0 0x000000ff 0x00000000 3 BASE_ADDRESS_HI
+FLD  8 0x000007ff 0x00000000 3 STRIDE
+FLD 19 0x00000001 0x00000000 3 CLAMP_X
+FLD 20 0x0000003f 0x00000000 3 DATA_FORMAT
+FLD 26 0x00000003 0x00000000 3 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 28 0x00000001 0x00000000 3 FORMAT_COMP_ALL
+VAL 0x00000000 FORMAT_COMP_UNSIGNED
+VAL 0x00000001 FORMAT_COMP_SIGNED
+FLD 29 0x00000001 0x00000000 3 SRF_MODE_ALL
+VAL 0x00000000 SRF_MODE_ZERO_CLAMP_MINUS_ONE
+VAL 0x00000001 SRF_MODE_NO_ZERO
+FLD 30 0x00000003 0x00000000 3 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+REG 0x0003800c 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_PS_WORD3
+FLD  0 0x00000003 0x00000000 3 MEM_REQUEST_SIZE
+REG 0x00038018 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_PS_WORD6
+FLD 30 0x00000003 0x00000000 3 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x00039180 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_VS_WORD0
+REG 0x00039184 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_VS_WORD1
+REG 0x00039188 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_VS_WORD2
+FLD  0 0x000000ff 0x00000000 3 BASE_ADDRESS_HI
+FLD  8 0x000007ff 0x00000000 3 STRIDE
+FLD 19 0x00000001 0x00000000 3 CLAMP_X
+FLD 20 0x0000003f 0x00000000 3 DATA_FORMAT
+FLD 26 0x00000003 0x00000000 3 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 28 0x00000001 0x00000000 3 FORMAT_COMP_ALL
+VAL 0x00000000 FORMAT_COMP_UNSIGNED
+VAL 0x00000001 FORMAT_COMP_SIGNED
+FLD 29 0x00000001 0x00000000 3 SRF_MODE_ALL
+VAL 0x00000000 SRF_MODE_ZERO_CLAMP_MINUS_ONE
+VAL 0x00000001 SRF_MODE_NO_ZERO
+FLD 30 0x00000003 0x00000000 3 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+REG 0x0003918c 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_VS_WORD3
+FLD  0 0x00000003 0x00000000 3 MEM_REQUEST_SIZE
+REG 0x00039198 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_VS_WORD6
+FLD 30 0x00000003 0x00000000 3 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x0003a300 0x0000010c 0x0000000c 32    0   16   28 SQ_VTX_CONSTANT_FS_WORD0
+REG 0x0003a304 0x0000010c 0x0000000c 32    0   16   28 SQ_VTX_CONSTANT_FS_WORD1
+REG 0x0003a308 0x0000010c 0x0000000c 32    0   16   28 SQ_VTX_CONSTANT_FS_WORD2
+FLD  0 0x000000ff 0x00000000 3 BASE_ADDRESS_HI
+FLD  8 0x000007ff 0x00000000 3 STRIDE
+FLD 19 0x00000001 0x00000000 3 CLAMP_X
+FLD 20 0x0000003f 0x00000000 3 DATA_FORMAT
+FLD 26 0x00000003 0x00000000 3 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 28 0x00000001 0x00000000 3 FORMAT_COMP_ALL
+VAL 0x00000000 FORMAT_COMP_UNSIGNED
+VAL 0x00000001 FORMAT_COMP_SIGNED
+FLD 29 0x00000001 0x00000000 3 SRF_MODE_ALL
+VAL 0x00000000 SRF_MODE_ZERO_CLAMP_MINUS_ONE
+VAL 0x00000001 SRF_MODE_NO_ZERO
+FLD 30 0x00000003 0x00000000 3 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+REG 0x0003a30c 0x0000010c 0x0000000c 32    0   16   28 SQ_VTX_CONSTANT_FS_WORD3
+FLD  0 0x00000003 0x00000000 3 MEM_REQUEST_SIZE
+REG 0x0003a318 0x0000010c 0x0000000c 32    0   16   28 SQ_VTX_CONSTANT_FS_WORD6
+FLD 30 0x00000003 0x00000000 3 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x0003a4c0 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_GS_WORD0
+REG 0x0003a4c4 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_GS_WORD1
+REG 0x0003a4c8 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_GS_WORD2
+FLD  0 0x000000ff 0x00000000 3 BASE_ADDRESS_HI
+FLD  8 0x000007ff 0x00000000 3 STRIDE
+FLD 19 0x00000001 0x00000000 3 CLAMP_X
+FLD 20 0x0000003f 0x00000000 3 DATA_FORMAT
+FLD 26 0x00000003 0x00000000 3 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 28 0x00000001 0x00000000 3 FORMAT_COMP_ALL
+VAL 0x00000000 FORMAT_COMP_UNSIGNED
+VAL 0x00000001 FORMAT_COMP_SIGNED
+FLD 29 0x00000001 0x00000000 3 SRF_MODE_ALL
+VAL 0x00000000 SRF_MODE_ZERO_CLAMP_MINUS_ONE
+VAL 0x00000001 SRF_MODE_NO_ZERO
+FLD 30 0x00000003 0x00000000 3 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+REG 0x0003a4cc 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_GS_WORD3
+FLD  0 0x00000003 0x00000000 3 MEM_REQUEST_SIZE
+REG 0x0003a4d8 0x0000010c 0x0000000c 32    0  160   28 SQ_VTX_CONSTANT_GS_WORD6
+FLD 30 0x00000003 0x00000000 3 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
diff --git a/hd5xxx.rdb b/hd5xxx.rdb
new file mode 100644
index 0000000..7f1c419
--- /dev/null
+++ b/hd5xxx.rdb
@@ -0,0 +1,5704 @@
+BLK 0x00000000 GENERAL
+BLK 0x00000001 CB
+BLK 0x00000002 CP
+BLK 0x00000003 DB
+BLK 0x00000004 IH
+BLK 0x00000005 MC
+BLK 0x00000006 PA
+BLK 0x00000007 PCIE
+BLK 0x00000008 PWR
+BLK 0x00000009 RLC
+BLK 0x0000000a SAMPLER
+BLK 0x0000000b SC
+BLK 0x0000000c SHADER
+BLK 0x0000000d SMX
+BLK 0x0000000e SPI
+BLK 0x0000000f TEXTURE_UNIT
+BLK 0x00000010 VGT
+BLK 0x00000011 VM
+DOM 0x00000000 MMIO
+DOM 0x00000001 PIO
+DOM 0x00000002 PCI
+DOM 0x00000003 PCIE
+DOM 0x00000101 ALU_CONST
+DOM 0x00000102 BOOL_CONST
+DOM 0x00000103 CONFIG
+DOM 0x00000104 CONTEXT
+DOM 0x00000105 CTL_CONST
+DOM 0x00000106 JUMPTABLE_CONST
+DOM 0x00000107 LOOP_CONST
+DOM 0x00000108 MC
+DOM 0x00000109 GPU_PCIE
+DOM 0x0000010a SAMPLER
+DOM 0x0000010b SHADER
+DOM 0x0000010c TEX_RESOURCE
+DOM 0x0000010d UNKNOWN
+DOM 0x0000010e VTX_RESOURCE
+IT  0x00000010 NOP
+IT  0x00000017 INDIRECT_BUFFER_END
+IT  0x00000020 SET_PREDICATION
+IT  0x00000021 REG_RMW
+IT  0x00000022 COND_EXEC
+IT  0x00000023 PRED_EXEC
+IT  0x00000027 DRAW_INDEX_2
+IT  0x00000028 CONTEXT_CONTROL
+IT  0x00000029 DRAW_INDEX_OFFSET
+IT  0x0000002a INDEX_TYPE
+IT  0x0000002b DRAW_INDEX
+IT  0x0000002d DRAW_INDEX_AUTO
+IT  0x0000002e DRAW_INDEX_IMMD
+IT  0x0000002f NUM_INSTANCES
+IT  0x00000032 INDIRECT_BUFFER
+IT  0x00000034 STRMOUT_BUFFER_UPDATE
+IT  0x00000038 INDIRECT_BUFFER_MP
+IT  0x00000039 MEM_SEMAPHORE
+IT  0x0000003a MPEG_INDEX
+IT  0x0000003c WAIT_REG_MEM
+IT  0x0000003d MEM_WRITE
+IT  0x00000040 CP_INTERRUPT
+IT  0x00000043 SURFACE_SYNC
+IT  0x00000044 ME_INITIALIZE
+IT  0x00000045 COND_WRITE
+IT  0x00000046 EVENT_WRITE
+IT  0x00000047 EVENT_WRITE_EOP
+IT  0x00000048 EVENT_WRITE_EOS
+IT  0x00000057 ONE_REG_WRITE
+IT  0x00000068 SET_CONFIG_REG
+IT  0x00000069 SET_CONTEXT_REG
+IT  0x0000006a SET_ALU_CONST
+IT  0x0000006b SET_BOOL_CONST
+IT  0x0000006c SET_LOOP_CONST
+IT  0x0000006d SET_RESOURCE
+IT  0x0000006e SET_SAMPLER
+IT  0x0000006f SET_CTL_CONST
+RNG 0x00000103 0x00008000 0x0000ac00 CONFIG
+RNG 0x00000104 0x00028000 0x00029000 CONTEXT
+RNG 0x00000101 0x00030000 0x00032000 ALU_CONST
+RNG 0x0000010c 0x00030000 0x00038000 TEX_RESOURCE
+RNG 0x0000010e 0x00030000 0x00038000 VTX_RESOURCE
+RNG 0x00000106 0x0003a200 0x0003a500 JUMPTABLE_CONST
+RNG 0x00000107 0x0003a200 0x0003a500 LOOP_CONST
+RNG 0x00000102 0x0003a500 0x0003a518 BOOL_CONST
+RNG 0x0000010a 0x0003c000 0x0003c600 SAMPLER
+RNG 0x00000105 0x0003cff0 0x0003ff0c CTL_CONST
+REG 0x0000900c 0x00000000 0x0000000d 32    0    1    0 SX_EXPORT_BUFFER_SIZES
+FLD  0 0x000000ff 0x00000000 0 COLOR_BUFFER_SIZE
+FLD  8 0x000000ff 0x00000000 0 POSITION_BUFFER_SIZE
+FLD 16 0x000000ff 0x00000000 0 SMX_BUFFER_SIZE
+REG 0x00009010 0x00000000 0x0000000d 32    0    1    0 SX_MEMORY_EXPORT_BASE
+REG 0x00009014 0x00000000 0x0000000d 32    0    1    0 SX_MEMORY_EXPORT_SIZE
+REG 0x00009100 0x00000000 0x00000000 32    0    1    0 SPI_CONFIG_CNTL
+FLD  0 0x0003ffff 0x00000000 0 GPR_WRITE_PRIORITY
+REG 0x0000913c 0x00000000 0x00000000 32    0    1    0 SPI_CONFIG_CNTL_1
+FLD  0 0x0000000f 0x00000000 0 VTX_DONE_DELAY
+VAL 0x00000000 X_DELAY_14_CLKS
+VAL 0x00000001 X_DELAY_16_CLKS
+VAL 0x00000002 X_DELAY_18_CLKS
+VAL 0x00000003 X_DELAY_20_CLKS
+VAL 0x00000004 X_DELAY_22_CLKS
+VAL 0x00000005 X_DELAY_24_CLKS
+VAL 0x00000006 X_DELAY_26_CLKS
+VAL 0x00000007 X_DELAY_28_CLKS
+VAL 0x00000008 X_DELAY_30_CLKS
+VAL 0x00000009 X_DELAY_32_CLKS
+VAL 0x0000000a X_DELAY_34_CLKS
+VAL 0x0000000b X_DELAY_4_CLKS
+VAL 0x0000000c X_DELAY_6_CLKS
+VAL 0x0000000d X_DELAY_8_CLKS
+VAL 0x0000000e X_DELAY_10_CLKS
+VAL 0x0000000f X_DELAY_12_CLKS
+FLD  4 0x00000001 0x00000000 0 INTERP_ONE_PRIM_PER_ROW
+FLD  5 0x00000001 0x00000000 0 BC_OPTIMIZE_DISABLE
+FLD  6 0x00000001 0x00000000 0 PC_LIMIT_ENABLE
+FLD  7 0x00000001 0x00000000 0 PC_LIMIT_STRICT
+FLD 16 0x0000ffff 0x00000000 0 PC_LIMIT_SIZE
+REG 0x00009494 0x00000000 0x00000000 32    0    1    0 TD_CNTL
+FLD  0 0x00000003 0x00000000 0 SYNC_PHASE_SH
+FLD  8 0x00000001 0x00000000 0 PAD_STALL_EN
+FLD 16 0x00000001 0x00000000 0 GATHER4_FLOAT_MODE
+REG 0x00009498 0x00000000 0x00000000 32    0    1    0 TD_STATUS
+FLD 31 0x00000001 0x00000000 0 BUSY
+REG 0x00009508 0x00000000 0x00000000 32    0    1    0 TA_CNTL_AUX
+FLD  0 0x00000001 0x00000000 0 DISABLE_CUBE_WRAP
+FLD  1 0x00000001 0x00000000 0 DISABLE_CUBE_ANISO
+FLD  2 0x00000003 0x00000000 0 GETLOD_SELECT
+VAL 0x00000000 X_SAMPLER_AND_RESOURCE_CLAMPED_LOD_IN_RESOURCE
+FLD  4 0x00000001 0x00000000 0 DISABLE_IDLE_STALL
+FLD 28 0x00000001 0x00000000 0 TEX_COORD_PRECISION
+FLD 29 0x00000001 0x00000000 0 LOD_LOG2_TRUNC
+REG 0x00009870 0x00000000 0x00000003 32    0    1    0 DB_ZPASS_COUNT_LOW
+REG 0x00009874 0x00000000 0x00000003 32    0    1    0 DB_ZPASS_COUNT_HI
+FLD  0 0x7fffffff 0x00000000 0 COUNT_HI
+REG 0x0000a400 0x00000000 0x00000000 32    0    1    0 TD_PS_BORDER_COLOR_INDEX
+FLD  0 0x0000001f 0x00000000 0 INDEX
+REG 0x0000a404 0x00000000 0x00000000 32    0    1    0 TD_PS_BORDER_COLOR_RED
+REG 0x0000a408 0x00000000 0x00000000 32    0    1    0 TD_PS_BORDER_COLOR_GREEN
+REG 0x0000a40c 0x00000000 0x00000000 32    0    1    0 TD_PS_BORDER_COLOR_BLUE
+REG 0x0000a410 0x00000000 0x00000000 32    0    1    0 TD_PS_BORDER_COLOR_ALPHA
+REG 0x0000a414 0x00000000 0x00000000 32    0    1    0 TD_VS_BORDER_COLOR_INDEX
+FLD  0 0x0000001f 0x00000000 0 INDEX
+REG 0x0000a418 0x00000000 0x00000000 32    0    1    0 TD_VS_BORDER_COLOR_RED
+REG 0x0000a41c 0x00000000 0x00000000 32    0    1    0 TD_VS_BORDER_COLOR_GREEN
+REG 0x0000a420 0x00000000 0x00000000 32    0    1    0 TD_VS_BORDER_COLOR_BLUE
+REG 0x0000a424 0x00000000 0x00000000 32    0    1    0 TD_VS_BORDER_COLOR_ALPHA
+REG 0x0000a428 0x00000000 0x00000000 32    0    1    0 TD_GS_BORDER_COLOR_INDEX
+FLD  0 0x0000001f 0x00000000 0 INDEX
+REG 0x0000a42c 0x00000000 0x00000000 32    0    1    0 TD_GS_BORDER_COLOR_RED
+REG 0x0000a430 0x00000000 0x00000000 32    0    1    0 TD_GS_BORDER_COLOR_GREEN
+REG 0x0000a434 0x00000000 0x00000000 32    0    1    0 TD_GS_BORDER_COLOR_BLUE
+REG 0x0000a438 0x00000000 0x00000000 32    0    1    0 TD_GS_BORDER_COLOR_ALPHA
+REG 0x0000a43c 0x00000000 0x00000000 32    0    1    0 TD_HS_BORDER_COLOR_INDEX
+FLD  0 0x0000001f 0x00000000 0 INDEX
+REG 0x0000a440 0x00000000 0x00000000 32    0    1    0 TD_HS_BORDER_COLOR_RED
+REG 0x0000a444 0x00000000 0x00000000 32    0    1    0 TD_HS_BORDER_COLOR_GREEN
+REG 0x0000a448 0x00000000 0x00000000 32    0    1    0 TD_HS_BORDER_COLOR_BLUE
+REG 0x0000a44c 0x00000000 0x00000000 32    0    1    0 TD_HS_BORDER_COLOR_ALPHA
+REG 0x0000a450 0x00000000 0x00000000 32    0    1    0 TD_LS_BORDER_COLOR_INDEX
+FLD  0 0x0000001f 0x00000000 0 INDEX
+REG 0x0000a454 0x00000000 0x00000000 32    0    1    0 TD_LS_BORDER_COLOR_RED
+REG 0x0000a458 0x00000000 0x00000000 32    0    1    0 TD_LS_BORDER_COLOR_GREEN
+REG 0x0000a45c 0x00000000 0x00000000 32    0    1    0 TD_LS_BORDER_COLOR_BLUE
+REG 0x0000a460 0x00000000 0x00000000 32    0    1    0 TD_LS_BORDER_COLOR_ALPHA
+REG 0x0000a464 0x00000000 0x00000000 32    0    1    0 TD_CS_BORDER_COLOR_INDEX
+FLD  0 0x0000001f 0x00000000 0 INDEX
+REG 0x0000a468 0x00000000 0x00000000 32    0    1    0 TD_CS_BORDER_COLOR_RED
+REG 0x0000a46c 0x00000000 0x00000000 32    0    1    0 TD_CS_BORDER_COLOR_GREEN
+REG 0x0000a470 0x00000000 0x00000000 32    0    1    0 TD_CS_BORDER_COLOR_BLUE
+REG 0x0000a474 0x00000000 0x00000000 32    0    1    0 TD_CS_BORDER_COLOR_ALPHA
+REG 0x0003cff0 0x00000000 0x00000000 32    0    1    0 SQ_VTX_BASE_VTX_LOC
+REG 0x0003cff4 0x00000000 0x00000000 32    0    1    0 SQ_VTX_START_INST_LOC
+REG 0x0003ff00 0x00000000 0x0000000a 32    0    1    0 SQ_TEX_SAMPLER_CLEAR
+REG 0x0003ff04 0x00000000 0x0000000f 32    0    1    0 SQ_TEX_RESOURCE_CLEAR
+REG 0x0003ff08 0x00000000 0x00000000 32    0    1    0 SQ_LOOP_BOOL_CLEAR
+REG 0x0003a500 0x00000102 0x00000000 32    0    6    4 SQ_BOOL_CONST_PS
+REG 0x0003a504 0x00000102 0x00000000 32    0    6    4 SQ_BOOL_CONST_VS
+REG 0x0003a508 0x00000102 0x00000000 32    0    6    4 SQ_BOOL_CONST_GS
+REG 0x0003a50c 0x00000102 0x00000000 32    0    6    4 SQ_BOOL_CONST_HS
+REG 0x0003a510 0x00000102 0x00000000 32    0    6    4 SQ_BOOL_CONST_LS
+REG 0x0003a514 0x00000102 0x00000000 32    0    6    4 SQ_BOOL_CONST_CS
+REG 0x00008040 0x00000103 0x00000000 32    0    1    0 WAIT_UNTIL
+FLD  8 0x00000001 0x00000000 0 WAIT_CP_DMA_IDLE
+FLD 10 0x00000001 0x00000000 0 WAIT_CMDFIFO
+FLD 15 0x00000001 0x00000000 0 WAIT_3D_IDLE
+FLD 17 0x00000001 0x00000000 0 WAIT_3D_IDLECLEAN
+FLD 19 0x00000001 0x00000000 0 WAIT_EXTERN_SIG
+FLD 20 0x0000000f 0x00000000 0 CMDFIFO_ENTRIES
+REG 0x000085f0 0x00000103 0x00000000 32    0    1    0 CP_COHER_CNTL
+FLD  0 0x00000001 0x00000000 0 DEST_BASE_0_ENA
+FLD  1 0x00000001 0x00000000 0 DEST_BASE_1_ENA
+FLD  2 0x00000001 0x00000000 0 SO0_DEST_BASE_ENA
+FLD  3 0x00000001 0x00000000 0 SO1_DEST_BASE_ENA
+FLD  4 0x00000001 0x00000000 0 SO2_DEST_BASE_ENA
+FLD  5 0x00000001 0x00000000 0 SO3_DEST_BASE_ENA
+FLD  6 0x00000001 0x00000000 0 CB0_DEST_BASE_ENA
+FLD  7 0x00000001 0x00000000 0 CB1_DEST_BASE_ENA
+FLD  8 0x00000001 0x00000000 0 CB2_DEST_BASE_ENA
+FLD  9 0x00000001 0x00000000 0 CB3_DEST_BASE_ENA
+FLD 10 0x00000001 0x00000000 0 CB4_DEST_BASE_ENA
+FLD 11 0x00000001 0x00000000 0 CB5_DEST_BASE_ENA
+FLD 12 0x00000001 0x00000000 0 CB6_DEST_BASE_ENA
+FLD 13 0x00000001 0x00000000 0 CB7_DEST_BASE_ENA
+FLD 14 0x00000001 0x00000000 0 DB_DEST_BASE_ENA
+FLD 15 0x00000001 0x00000000 0 CB8_DEST_BASE_ENA
+FLD 16 0x00000001 0x00000000 0 CB9_DEST_BASE_ENA
+FLD 17 0x00000001 0x00000000 0 CB10_DEST_BASE_ENA
+FLD 18 0x00000001 0x00000000 0 CB11_DEST_BASE_ENA
+FLD 20 0x00000001 0x00000000 0 FULL_CACHE_ENA
+FLD 23 0x00000001 0x00000000 0 TC_ACTION_ENA
+FLD 24 0x00000001 0x00000000 0 VC_ACTION_ENA
+FLD 25 0x00000001 0x00000000 0 CB_ACTION_ENA
+FLD 26 0x00000001 0x00000000 0 DB_ACTION_ENA
+FLD 27 0x00000001 0x00000000 0 SH_ACTION_ENA
+FLD 28 0x00000001 0x00000000 0 SX_ACTION_ENA
+REG 0x000085f4 0x00000103 0x00000000 32    0    1    0 CP_COHER_SIZE
+REG 0x000085f8 0x00000103 0x00000000 32    0    1    0 CP_COHER_BASE
+REG 0x000085fc 0x00000103 0x00000000 32    0    1    0 CP_COHER_STATUS
+FLD  0 0x000000ff 0x00000000 0 MATCHING_GFX_CNTX
+FLD 31 0x00000001 0x00000000 0 STATUS
+REG 0x000088b0 0x00000103 0x00000010 32    0    1    0 VGT_VTX_VECT_EJECT_REG
+FLD  0 0x000003ff 0x00000000 0 PRIM_COUNT
+REG 0x000088c0 0x00000103 0x00000010 32    0    1    0 VGT_LAST_COPY_STATE
+FLD  0 0x00000007 0x00000000 0 SRC_STATE_ID
+FLD 16 0x00000007 0x00000000 0 DST_STATE_ID
+REG 0x000088c4 0x00000103 0x00000010 32    0    1    0 VGT_CACHE_INVALIDATION
+FLD  0 0x00000003 0x00000000 0 CACHE_INVALIDATION
+VAL 0x00000000 VC_ONLY
+VAL 0x00000001 TC_ONLY
+VAL 0x00000002 VC_AND_TC
+FLD  5 0x00000001 0x00000000 0 VS_NO_EXTRA_BUFFER
+FLD  6 0x00000003 0x00000000 0 AUTO_INVLD_EN
+REG 0x000088d4 0x00000103 0x00000010 32    0    1    0 VGT_GS_VERTEX_REUSE
+FLD  0 0x0000001f 0x00000000 0 VERT_REUSE
+REG 0x000088f0 0x00000103 0x00000010 32    0    1    0 VGT_CNTL_STATUS
+FLD  0 0x00000001 0x00000000 0 VGT_OUT_INDX_BUSY
+FLD  1 0x00000001 0x00000000 0 VGT_OUT_BUSY
+FLD  2 0x00000001 0x00000000 0 VGT_PT_BUSY
+FLD  3 0x00000001 0x00000000 0 VGT_TE_BUSY
+FLD  4 0x00000001 0x00000000 0 VGT_VR_BUSY
+FLD  5 0x00000001 0x00000000 0 VGT_GRP_BUSY
+FLD  6 0x00000001 0x00000000 0 VGT_DMA_REQ_BUSY
+FLD  7 0x00000001 0x00000000 0 VGT_DMA_BUSY
+FLD  8 0x00000001 0x00000000 0 VGT_GS_BUSY
+FLD  9 0x00000001 0x00000000 0 VGT_HS_BUSY
+FLD 10 0x00000001 0x00000000 0 VGT_TE11_BUSY
+FLD 11 0x00000001 0x00000000 0 VGT_BUSY
+REG 0x00008958 0x00000103 0x00000010 32    0    1    0 VGT_PRIMITIVE_TYPE
+FLD  0 0x0000003f 0x00000000 0 PRIM_TYPE
+VAL 0x00000000 DI_PT_NONE
+VAL 0x00000001 DI_PT_POINTLIST
+VAL 0x00000002 DI_PT_LINELIST
+VAL 0x00000003 DI_PT_LINESTRIP
+VAL 0x00000004 DI_PT_TRILIST
+VAL 0x00000005 DI_PT_TRIFAN
+VAL 0x00000006 DI_PT_TRISTRIP
+VAL 0x00000007 DI_PT_UNUSED_0
+VAL 0x00000008 DI_PT_UNUSED_1
+VAL 0x00000009 DI_PT_PATCH
+VAL 0x0000000a DI_PT_LINELIST_ADJ
+VAL 0x0000000b DI_PT_LINESTRIP_ADJ
+VAL 0x0000000c DI_PT_TRILIST_ADJ
+VAL 0x0000000d DI_PT_TRISTRIP_ADJ
+VAL 0x0000000e DI_PT_UNUSED_3
+VAL 0x0000000f DI_PT_UNUSED_4
+VAL 0x00000010 DI_PT_TRI_WITH_WFLAGS
+VAL 0x00000011 DI_PT_RECTLIST
+VAL 0x00000012 DI_PT_LINELOOP
+VAL 0x00000013 DI_PT_QUADLIST
+VAL 0x00000014 DI_PT_QUADSTRIP
+VAL 0x00000015 DI_PT_POLYGON
+VAL 0x00000016 DI_PT_2D_COPY_RECT_LIST_V0
+VAL 0x00000017 DI_PT_2D_COPY_RECT_LIST_V1
+VAL 0x00000018 DI_PT_2D_COPY_RECT_LIST_V2
+VAL 0x00000019 DI_PT_2D_COPY_RECT_LIST_V3
+VAL 0x0000001a DI_PT_2D_FILL_RECT_LIST
+VAL 0x0000001b DI_PT_2D_LINE_STRIP
+VAL 0x0000001c DI_PT_2D_TRI_STRIP
+REG 0x0000895c 0x00000103 0x00000010 32    0    1    0 VGT_INDEX_TYPE
+FLD  0 0x00000003 0x00000000 0 INDEX_TYPE
+VAL 0x00000000 DI_INDEX_SIZE_16_BIT
+VAL 0x00000001 DI_INDEX_SIZE_32_BIT
+REG 0x00008960 0x00000103 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_FILLED_SIZE_0
+REG 0x00008964 0x00000103 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_FILLED_SIZE_1
+REG 0x00008968 0x00000103 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_FILLED_SIZE_2
+REG 0x0000896c 0x00000103 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_FILLED_SIZE_3
+REG 0x00008970 0x00000103 0x00000010 32    0    1    0 VGT_NUM_INDICES
+REG 0x00008974 0x00000103 0x00000010 32    0    1    0 VGT_NUM_INSTANCES
+REG 0x00008a10 0x00000103 0x00000006 32    0    1    0 PA_CL_CNTL_STATUS
+FLD 31 0x00000001 0x00000000 0 CL_BUSY
+REG 0x00008a14 0x00000103 0x00000006 32    0    1    0 PA_CL_ENHANCE
+FLD  0 0x00000001 0x00000000 0 CLIP_VTX_REORDER_ENA
+FLD  1 0x00000003 0x00000000 0 NUM_CLIP_SEQ
+FLD  3 0x00000001 0x00000000 0 CLIPPED_PRIM_SEQ_STALL
+FLD  4 0x00000001 0x00000000 0 VE_NAN_PROC_DISABLE
+REG 0x00008a50 0x00000103 0x00000006 32    0    1    0 PA_SU_CNTL_STATUS
+FLD 31 0x00000001 0x00000000 0 SU_BUSY
+REG 0x00008a60 0x00000103 0x00000006 32    0    1    0 PA_SU_LINE_STIPPLE_VALUE
+FLD  0 0x00ffffff 0x00000000 0 LINE_STIPPLE_VALUE
+REG 0x00008b10 0x00000103 0x00000006 32    0    1    0 PA_SC_LINE_STIPPLE_STATE
+FLD  0 0x0000000f 0x00000000 0 CURRENT_PTR
+FLD  8 0x000000ff 0x00000000 0 CURRENT_COUNT
+REG 0x00008c00 0x00000103 0x00000000 32    0    1    0 SQ_CONFIG
+FLD  0 0x00000001 0x00000000 0 VC_ENABLE
+FLD  1 0x00000001 0x00000000 0 EXPORT_SRC_C
+FLD 18 0x00000003 0x00000000 0 CS_PRIO
+FLD 20 0x00000003 0x00000000 0 LS_PRIO
+FLD 22 0x00000003 0x00000000 0 HS_PRIO
+FLD 24 0x00000003 0x00000000 0 PS_PRIO
+FLD 26 0x00000003 0x00000000 0 VS_PRIO
+FLD 28 0x00000003 0x00000000 0 GS_PRIO
+FLD 30 0x00000003 0x00000000 0 ES_PRIO
+REG 0x00008c04 0x00000103 0x00000000 32    0    1    0 SQ_GPR_RESOURCE_MGMT_1
+FLD  0 0x000000ff 0x00000000 0 NUM_PS_GPRS
+FLD 16 0x000000ff 0x00000000 0 NUM_VS_GPRS
+FLD 28 0x0000000f 0x00000000 0 NUM_CLAUSE_TEMP_GPRS
+REG 0x00008c08 0x00000103 0x00000000 32    0    1    0 SQ_GPR_RESOURCE_MGMT_2
+FLD  0 0x000000ff 0x00000000 0 NUM_GS_GPRS
+FLD 16 0x000000ff 0x00000000 0 NUM_ES_GPRS
+REG 0x00008c0c 0x00000103 0x00000000 32    0    1    0 SQ_GPR_RESOURCE_MGMT_3
+FLD  0 0x000000ff 0x00000000 0 NUM_HS_GPRS
+FLD 16 0x000000ff 0x00000000 0 NUM_LS_GPRS
+REG 0x00008c10 0x00000103 0x00000000 32    0    1    0 SQ_GLOBAL_GPR_RESOURCE_MGMT_1
+FLD  0 0x000000ff 0x00000000 0 PS_GGPR_BASE
+FLD  8 0x000000ff 0x00000000 0 VS_GGPR_BASE
+FLD 16 0x000000ff 0x00000000 0 GS_GGPR_BASE
+FLD 24 0x000000ff 0x00000000 0 ES_GGPR_BASE
+REG 0x00008c14 0x00000103 0x00000000 32    0    1    0 SQ_GLOBAL_GPR_RESOURCE_MGMT_2
+FLD  0 0x000000ff 0x00000000 0 HS_GGPR_BASE
+FLD  8 0x000000ff 0x00000000 0 LS_GGPR_BASE
+FLD 16 0x000000ff 0x00000000 0 CS_GGPR_BASE
+REG 0x00008c18 0x00000103 0x00000000 32    0    1    0 SQ_THREAD_RESOURCE_MGMT
+FLD  0 0x000000ff 0x00000000 0 NUM_PS_THREADS
+FLD  8 0x000000ff 0x00000000 0 NUM_VS_THREADS
+FLD 16 0x000000ff 0x00000000 0 NUM_GS_THREADS
+FLD 24 0x000000ff 0x00000000 0 NUM_ES_THREADS
+REG 0x00008c1c 0x00000103 0x00000000 32    0    1    0 SQ_THREAD_RESOURCE_MGMT_2
+FLD  0 0x000000ff 0x00000000 0 NUM_HS_THREADS
+FLD  8 0x000000ff 0x00000000 0 NUM_LS_THREADS
+REG 0x00008c20 0x00000103 0x00000000 32    0    1    0 SQ_STACK_RESOURCE_MGMT_1
+FLD  0 0x00000fff 0x00000000 0 NUM_PS_STACK_ENTRIES
+FLD 16 0x00000fff 0x00000000 0 NUM_VS_STACK_ENTRIES
+REG 0x00008c24 0x00000103 0x00000000 32    0    1    0 SQ_STACK_RESOURCE_MGMT_2
+FLD  0 0x00000fff 0x00000000 0 NUM_GS_STACK_ENTRIES
+FLD 16 0x00000fff 0x00000000 0 NUM_ES_STACK_ENTRIES
+REG 0x00008c28 0x00000103 0x00000000 32    0    1    0 SQ_STACK_RESOURCE_MGMT_3
+FLD  0 0x00000fff 0x00000000 0 NUM_HS_STACK_ENTRIES
+FLD 16 0x00000fff 0x00000000 0 NUM_LS_STACK_ENTRIES
+REG 0x00008c40 0x00000103 0x00000000 32    0    1    0 SQ_ESGS_RING_BASE
+REG 0x00008c44 0x00000103 0x00000000 32    0    1    0 SQ_ESGS_RING_SIZE
+REG 0x00008c48 0x00000103 0x00000000 32    0    1    0 SQ_GSVS_RING_BASE
+REG 0x00008c4c 0x00000103 0x00000000 32    0    1    0 SQ_GSVS_RING_SIZE
+REG 0x00008c50 0x00000103 0x00000000 32    0    1    0 SQ_ESTMP_RING_BASE
+REG 0x00008c54 0x00000103 0x00000000 32    0    1    0 SQ_ESTMP_RING_SIZE
+REG 0x00008c58 0x00000103 0x00000000 32    0    1    0 SQ_GSTMP_RING_BASE
+REG 0x00008c5c 0x00000103 0x00000000 32    0    1    0 SQ_GSTMP_RING_SIZE
+REG 0x00008c60 0x00000103 0x00000000 32    0    1    0 SQ_VSTMP_RING_BASE
+REG 0x00008c64 0x00000103 0x00000000 32    0    1    0 SQ_VSTMP_RING_SIZE
+REG 0x00008c68 0x00000103 0x00000000 32    0    1    0 SQ_PSTMP_RING_BASE
+REG 0x00008c6c 0x00000103 0x00000000 32    0    1    0 SQ_PSTMP_RING_SIZE
+REG 0x00008d8c 0x00000103 0x00000000 32    0    1    0 SQ_DYN_GPR_CNTL_PS_FLUSH_REQ
+REG 0x00008df8 0x00000103 0x00000000 32    0    1    0 SQ_CONST_MEM_BASE
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_ALU_WORD1_OP3
+FLD  0 0x000001ff 0x00000000 0 SRC2_SEL
+VAL 0x000000db SQ_ALU_SRC_LDS_OQ_A
+VAL 0x000000dc SQ_ALU_SRC_LDS_OQ_B
+VAL 0x000000dd SQ_ALU_SRC_LDS_OQ_A_POP
+VAL 0x000000de SQ_ALU_SRC_LDS_OQ_B_POP
+VAL 0x000000df SQ_ALU_SRC_LDS_DIRECT_A
+VAL 0x000000e0 SQ_ALU_SRC_LDS_DIRECT_B
+VAL 0x000000e3 SQ_ALU_SRC_TIME_HI
+VAL 0x000000e4 SQ_ALU_SRC_TIME_LO
+VAL 0x000000e5 SQ_ALU_SRC_MASK_HI
+VAL 0x000000e6 SQ_ALU_SRC_MASK_LO
+VAL 0x000000e7 SQ_ALU_SRC_HW_WAVE_ID
+VAL 0x000000e8 SQ_ALU_SRC_SIMD_ID
+VAL 0x000000e9 SQ_ALU_SRC_SE_ID
+VAL 0x000000ea SQ_ALU_SRC_HW_THREADGRP_ID
+VAL 0x000000eb SQ_ALU_SRC_WAVE_ID_IN_GRP
+VAL 0x000000ec SQ_ALU_SRC_NUM_THREADGRP_WAVES
+VAL 0x000000ed SQ_ALU_SRC_HW_ALU_ODD
+VAL 0x000000ee SQ_ALU_SRC_LOOP_IDX
+VAL 0x000000f0 SQ_ALU_SRC_PARAM_BASE_ADDR
+VAL 0x000000f1 SQ_ALU_SRC_NEW_PRIM_MASK
+VAL 0x000000f2 SQ_ALU_SRC_PRIM_MASK_HI
+VAL 0x000000f3 SQ_ALU_SRC_PRIM_MASK_LO
+VAL 0x000000f4 SQ_ALU_SRC_1_DBL_L
+VAL 0x000000f5 SQ_ALU_SRC_1_DBL_M
+VAL 0x000000f6 SQ_ALU_SRC_0_5_DBL_L
+VAL 0x000000f7 SQ_ALU_SRC_0_5_DBL_M
+VAL 0x000000f8 SQ_ALU_SRC_0
+VAL 0x000000f9 SQ_ALU_SRC_1
+VAL 0x000000fa SQ_ALU_SRC_1_INT
+VAL 0x000000fb SQ_ALU_SRC_M_1_INT
+VAL 0x000000fc SQ_ALU_SRC_0_5
+VAL 0x000000fd SQ_ALU_SRC_LITERAL
+VAL 0x000000fe SQ_ALU_SRC_PV
+VAL 0x000000ff SQ_ALU_SRC_PS
+FLD  9 0x00000001 0x00000000 0 SRC2_REL
+FLD 10 0x00000003 0x00000000 0 SRC2_CHAN
+VAL 0x00000000 SQ_CHAN_X
+VAL 0x00000001 SQ_CHAN_Y
+VAL 0x00000002 SQ_CHAN_Z
+VAL 0x00000003 SQ_CHAN_W
+FLD 12 0x00000001 0x00000000 0 SRC2_NEG
+FLD 13 0x0000001f 0x00000000 0 ALU_INST
+VAL 0x00000004 SQ_OP3_INST_BFE_UINT
+VAL 0x00000005 SQ_OP3_INST_BFE_INT
+VAL 0x00000006 SQ_OP3_INST_BFI_INT
+VAL 0x00000007 SQ_OP3_INST_FMA
+VAL 0x00000009 SQ_OP3_INST_CNDNE_64
+VAL 0x0000000a SQ_OP3_INST_FMA_64
+VAL 0x0000000b SQ_OP3_INST_LERP_UINT
+VAL 0x0000000c SQ_OP3_INST_BIT_ALIGN_INT
+VAL 0x0000000d SQ_OP3_INST_BYTE_ALIGN_INT
+VAL 0x0000000e SQ_OP3_INST_SAD_ACCUM_UINT
+VAL 0x0000000f SQ_OP3_INST_SAD_ACCUM_HI_UINT
+VAL 0x00000010 SQ_OP3_INST_MULADD_UINT24
+VAL 0x00000011 SQ_OP3_INST_LDS_IDX_OP
+VAL 0x00000014 SQ_OP3_INST_MULADD
+VAL 0x00000015 SQ_OP3_INST_MULADD_M2
+VAL 0x00000016 SQ_OP3_INST_MULADD_M4
+VAL 0x00000017 SQ_OP3_INST_MULADD_D2
+VAL 0x00000018 SQ_OP3_INST_MULADD_IEEE
+VAL 0x00000019 SQ_OP3_INST_CNDE
+VAL 0x0000001a SQ_OP3_INST_CNDGT
+VAL 0x0000001b SQ_OP3_INST_CNDGE
+VAL 0x0000001c SQ_OP3_INST_CNDE_INT
+VAL 0x0000001d SQ_OP3_INST_CNDGT_INT
+VAL 0x0000001e SQ_OP3_INST_CNDGE_INT
+VAL 0x0000001f SQ_OP3_INST_MUL_LIT
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_ALU_WORD1_LDS_DIRECT_LITERAL_LO
+FLD  0 0x00001fff 0x00000000 0 OFFSET_A
+FLD 13 0x0000007f 0x00000000 0 STRIDE_A
+FLD 22 0x00000001 0x00000000 0 THREAD_REL_A
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_TEX_WORD2
+FLD  0 0x0000001f 0x00000000 0 OFFSET_X
+FLD  5 0x0000001f 0x00000000 0 OFFSET_Y
+FLD 10 0x0000001f 0x00000000 0 OFFSET_Z
+FLD 15 0x0000001f 0x00000000 0 SAMPLER_ID
+FLD 20 0x00000007 0x00000000 0 SRC_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 23 0x00000007 0x00000000 0 SRC_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 26 0x00000007 0x00000000 0 SRC_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 29 0x00000007 0x00000000 0 SRC_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_CF_ALLOC_EXPORT_WORD1
+FLD 16 0x0000000f 0x00000000 0 BURST_COUNT
+FLD 20 0x00000001 0x00000000 0 VALID_PIXEL_MODE
+FLD 21 0x00000001 0x00000000 0 END_OF_PROGRAM
+FLD 22 0x000000ff 0x00000000 0 CF_INST
+VAL 0x00000040 SQ_CF_INST_MEM_STREAM0_BUF0
+VAL 0x00000041 SQ_CF_INST_MEM_STREAM0_BUF1
+VAL 0x00000042 SQ_CF_INST_MEM_STREAM0_BUF2
+VAL 0x00000043 SQ_CF_INST_MEM_STREAM0_BUF3
+VAL 0x00000044 SQ_CF_INST_MEM_STREAM1_BUF0
+VAL 0x00000045 SQ_CF_INST_MEM_STREAM1_BUF1
+VAL 0x00000046 SQ_CF_INST_MEM_STREAM1_BUF2
+VAL 0x00000047 SQ_CF_INST_MEM_STREAM1_BUF3
+VAL 0x00000048 SQ_CF_INST_MEM_STREAM2_BUF0
+VAL 0x00000049 SQ_CF_INST_MEM_STREAM2_BUF1
+VAL 0x0000004a SQ_CF_INST_MEM_STREAM2_BUF2
+VAL 0x0000004b SQ_CF_INST_MEM_STREAM2_BUF3
+VAL 0x0000004c SQ_CF_INST_MEM_STREAM3_BUF0
+VAL 0x0000004d SQ_CF_INST_MEM_STREAM3_BUF1
+VAL 0x0000004e SQ_CF_INST_MEM_STREAM3_BUF2
+VAL 0x0000004f SQ_CF_INST_MEM_STREAM3_BUF3
+VAL 0x00000050 SQ_CF_INST_MEM_SCRATCH
+VAL 0x00000052 SQ_CF_INST_MEM_RING
+VAL 0x00000053 SQ_CF_INST_EXPORT
+VAL 0x00000054 SQ_CF_INST_EXPORT_DONE
+VAL 0x00000055 SQ_CF_INST_MEM_EXPORT
+VAL 0x00000056 SQ_CF_INST_MEM_RAT
+VAL 0x00000057 SQ_CF_INST_MEM_RAT_CACHELESS
+VAL 0x00000058 SQ_CF_INST_MEM_RING1
+VAL 0x00000059 SQ_CF_INST_MEM_RING2
+VAL 0x0000005a SQ_CF_INST_MEM_RING3
+VAL 0x0000005b SQ_CF_INST_MEM_EXPORT_COMBINED
+VAL 0x0000005c SQ_CF_INST_MEM_RAT_COMBINED_CACHELESS
+FLD 30 0x00000001 0x00000000 0 MARK
+FLD 31 0x00000001 0x00000000 0 BARRIER
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_CF_ALU_WORD1
+FLD  0 0x00000003 0x00000000 0 KCACHE_MODE1
+VAL 0x00000000 SQ_CF_KCACHE_NOP
+VAL 0x00000001 SQ_CF_KCACHE_LOCK_1
+VAL 0x00000002 SQ_CF_KCACHE_LOCK_2
+VAL 0x00000003 SQ_CF_KCACHE_LOCK_LOOP_INDEX
+FLD  2 0x000000ff 0x00000000 0 KCACHE_ADDR0
+FLD 10 0x000000ff 0x00000000 0 KCACHE_ADDR1
+FLD 18 0x0000007f 0x00000000 0 COUNT
+FLD 25 0x00000001 0x00000000 0 ALT_CONST
+FLD 26 0x0000000f 0x00000000 0 CF_INST
+VAL 0x00000008 SQ_CF_INST_ALU
+VAL 0x00000009 SQ_CF_INST_ALU_PUSH_BEFORE
+VAL 0x0000000a SQ_CF_INST_ALU_POP_AFTER
+VAL 0x0000000b SQ_CF_INST_ALU_POP2_AFTER
+VAL 0x0000000c SQ_CF_INST_ALU_EXTENDED
+VAL 0x0000000d SQ_CF_INST_ALU_CONTINUE
+VAL 0x0000000e SQ_CF_INST_ALU_BREAK
+VAL 0x0000000f SQ_CF_INST_ALU_ELSE_AFTER
+FLD 30 0x00000001 0x00000000 0 WHOLE_QUAD_MODE
+FLD 31 0x00000001 0x00000000 0 BARRIER
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_TEX_WORD1
+FLD  0 0x0000007f 0x00000000 0 DST_GPR
+FLD  7 0x00000001 0x00000000 0 DST_REL
+FLD  9 0x00000007 0x00000000 0 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 12 0x00000007 0x00000000 0 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 15 0x00000007 0x00000000 0 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 18 0x00000007 0x00000000 0 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 21 0x0000007f 0x00000000 0 LOD_BIAS
+FLD 28 0x00000001 0x00000000 0 COORD_TYPE_X
+FLD 29 0x00000001 0x00000000 0 COORD_TYPE_Y
+FLD 30 0x00000001 0x00000000 0 COORD_TYPE_Z
+FLD 31 0x00000001 0x00000000 0 COORD_TYPE_W
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_VTX_WORD0
+FLD  0 0x0000001f 0x00000000 0 VTX_INST
+VAL 0x00000000 SQ_VTX_INST_FETCH
+VAL 0x00000001 SQ_VTX_INST_SEMANTIC
+VAL 0x0000000e SQ_VTX_INST_GET_BUFFER_RESINFO
+FLD  5 0x00000003 0x00000000 0 FETCH_TYPE
+VAL 0x00000000 SQ_VTX_FETCH_VERTEX_DATA
+VAL 0x00000001 SQ_VTX_FETCH_INSTANCE_DATA
+VAL 0x00000002 SQ_VTX_FETCH_NO_INDEX_OFFSET
+FLD  7 0x00000001 0x00000000 0 FETCH_WHOLE_QUAD
+FLD  8 0x000000ff 0x00000000 0 BUFFER_ID
+FLD 16 0x0000007f 0x00000000 0 SRC_GPR
+FLD 23 0x00000001 0x00000000 0 SRC_REL
+FLD 24 0x00000003 0x00000000 0 SRC_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+FLD 26 0x0000003f 0x00000000 0 MEGA_FETCH_COUNT
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_CF_ALLOC_EXPORT_WORD1_SWIZ
+FLD  0 0x00000007 0x00000000 0 SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD  3 0x00000007 0x00000000 0 SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD  6 0x00000007 0x00000000 0 SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD  9 0x00000007 0x00000000 0 SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_MEM_RD_WORD0
+FLD  0 0x0000001f 0x00000000 0 MEM_INST
+VAL 0x00000002 SQ_MEM_INST_MEM
+FLD  5 0x00000003 0x00000000 0 ELEM_SIZE
+FLD  7 0x00000001 0x00000000 0 FETCH_WHOLE_QUAD
+FLD  8 0x00000007 0x00000000 0 MEM_OP
+VAL 0x00000000 SQ_MEM_OP_RD_SCRATCH
+VAL 0x00000002 SQ_MEM_OP_RD_SCATTER
+VAL 0x00000004 SQ_MEM_OP_GDS
+VAL 0x00000005 SQ_MEM_OP_TF_WRITE
+FLD 11 0x00000001 0x00000000 0 UNCACHED
+FLD 12 0x00000001 0x00000000 0 INDEXED
+FLD 16 0x0000007f 0x00000000 0 SRC_GPR
+FLD 23 0x00000001 0x00000000 0 SRC_REL
+FLD 24 0x00000003 0x00000000 0 SRC_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+FLD 26 0x0000000f 0x00000000 0 BURST_CNT
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_ALU_WORD1
+FLD 15 0x00000007 0x00000000 0 ENCODING
+FLD 18 0x00000007 0x00000000 0 BANK_SWIZZLE
+VAL 0x00000000 SQ_ALU_VEC_012
+VAL 0x00000001 SQ_ALU_VEC_021
+VAL 0x00000002 SQ_ALU_VEC_120
+VAL 0x00000003 SQ_ALU_VEC_102
+VAL 0x00000004 SQ_ALU_VEC_201
+VAL 0x00000005 SQ_ALU_VEC_210
+FLD 21 0x0000007f 0x00000000 0 DST_GPR
+FLD 28 0x00000001 0x00000000 0 DST_REL
+FLD 29 0x00000003 0x00000000 0 DST_CHAN
+VAL 0x00000000 CHAN_X
+VAL 0x00000001 CHAN_Y
+VAL 0x00000002 CHAN_Z
+VAL 0x00000003 CHAN_W
+FLD 31 0x00000001 0x00000000 0 CLAMP
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_CF_ALU_WORD0_EXT
+FLD  4 0x00000003 0x00000000 0 KCACHE_BANK_INDEX_MODE0
+VAL 0x00000000 SQ_CF_INDEX_NONE
+VAL 0x00000001 SQ_CF_INDEX_0
+VAL 0x00000002 SQ_CF_INDEX_1
+VAL 0x00000003 SQ_CF_INVALID
+FLD  6 0x00000003 0x00000000 0 KCACHE_BANK_INDEX_MODE1
+VAL 0x00000000 SQ_CF_INDEX_NONE
+VAL 0x00000001 SQ_CF_INDEX_0
+VAL 0x00000002 SQ_CF_INDEX_1
+VAL 0x00000003 SQ_CF_INVALID
+FLD  8 0x00000003 0x00000000 0 KCACHE_BANK_INDEX_MODE2
+VAL 0x00000000 SQ_CF_INDEX_NONE
+VAL 0x00000001 SQ_CF_INDEX_0
+VAL 0x00000002 SQ_CF_INDEX_1
+VAL 0x00000003 SQ_CF_INVALID
+FLD 10 0x00000003 0x00000000 0 KCACHE_BANK_INDEX_MODE3
+VAL 0x00000000 SQ_CF_INDEX_NONE
+VAL 0x00000001 SQ_CF_INDEX_0
+VAL 0x00000002 SQ_CF_INDEX_1
+VAL 0x00000003 SQ_CF_INVALID
+FLD 22 0x0000000f 0x00000000 0 KCACHE_BANK2
+FLD 26 0x0000000f 0x00000000 0 KCACHE_BANK3
+FLD 30 0x00000003 0x00000000 0 KCACHE_MODE2
+VAL 0x00000000 SQ_CF_KCACHE_NOP
+VAL 0x00000001 SQ_CF_KCACHE_LOCK_1
+VAL 0x00000002 SQ_CF_KCACHE_LOCK_2
+VAL 0x00000003 SQ_CF_KCACHE_LOCK_LOOP_INDEX
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_ALU_WORD0_LDS_IDX_OP
+FLD  0 0x000001ff 0x00000000 0 SRC0_SEL
+VAL 0x000000db SQ_ALU_SRC_LDS_OQ_A
+VAL 0x000000dc SQ_ALU_SRC_LDS_OQ_B
+VAL 0x000000dd SQ_ALU_SRC_LDS_OQ_A_POP
+VAL 0x000000de SQ_ALU_SRC_LDS_OQ_B_POP
+VAL 0x000000df SQ_ALU_SRC_LDS_DIRECT_A
+VAL 0x000000e0 SQ_ALU_SRC_LDS_DIRECT_B
+VAL 0x000000e3 SQ_ALU_SRC_TIME_HI
+VAL 0x000000e4 SQ_ALU_SRC_TIME_LO
+VAL 0x000000e5 SQ_ALU_SRC_MASK_HI
+VAL 0x000000e6 SQ_ALU_SRC_MASK_LO
+VAL 0x000000e7 SQ_ALU_SRC_HW_WAVE_ID
+VAL 0x000000e8 SQ_ALU_SRC_SIMD_ID
+VAL 0x000000e9 SQ_ALU_SRC_SE_ID
+VAL 0x000000ea SQ_ALU_SRC_HW_THREADGRP_ID
+VAL 0x000000eb SQ_ALU_SRC_WAVE_ID_IN_GRP
+VAL 0x000000ec SQ_ALU_SRC_NUM_THREADGRP_WAVES
+VAL 0x000000ed SQ_ALU_SRC_HW_ALU_ODD
+VAL 0x000000ee SQ_ALU_SRC_LOOP_IDX
+VAL 0x000000f0 SQ_ALU_SRC_PARAM_BASE_ADDR
+VAL 0x000000f1 SQ_ALU_SRC_NEW_PRIM_MASK
+VAL 0x000000f2 SQ_ALU_SRC_PRIM_MASK_HI
+VAL 0x000000f3 SQ_ALU_SRC_PRIM_MASK_LO
+VAL 0x000000f4 SQ_ALU_SRC_1_DBL_L
+VAL 0x000000f5 SQ_ALU_SRC_1_DBL_M
+VAL 0x000000f6 SQ_ALU_SRC_0_5_DBL_L
+VAL 0x000000f7 SQ_ALU_SRC_0_5_DBL_M
+VAL 0x000000f8 SQ_ALU_SRC_0
+VAL 0x000000f9 SQ_ALU_SRC_1
+VAL 0x000000fa SQ_ALU_SRC_1_INT
+VAL 0x000000fb SQ_ALU_SRC_M_1_INT
+VAL 0x000000fc SQ_ALU_SRC_0_5
+VAL 0x000000fd SQ_ALU_SRC_LITERAL
+VAL 0x000000fe SQ_ALU_SRC_PV
+VAL 0x000000ff SQ_ALU_SRC_PS
+FLD  9 0x00000001 0x00000000 0 SRC0_REL
+FLD 10 0x00000003 0x00000000 0 SRC0_CHAN
+VAL 0x00000000 SQ_CHAN_X
+VAL 0x00000001 SQ_CHAN_Y
+VAL 0x00000002 SQ_CHAN_Z
+VAL 0x00000003 SQ_CHAN_W
+FLD 12 0x00000001 0x00000000 0 IDX_OFFSET_4
+FLD 13 0x000001ff 0x00000000 0 SRC1_SEL
+VAL 0x000000db SQ_ALU_SRC_LDS_OQ_A
+VAL 0x000000dc SQ_ALU_SRC_LDS_OQ_B
+VAL 0x000000dd SQ_ALU_SRC_LDS_OQ_A_POP
+VAL 0x000000de SQ_ALU_SRC_LDS_OQ_B_POP
+VAL 0x000000df SQ_ALU_SRC_LDS_DIRECT_A
+VAL 0x000000e0 SQ_ALU_SRC_LDS_DIRECT_B
+VAL 0x000000e3 SQ_ALU_SRC_TIME_HI
+VAL 0x000000e4 SQ_ALU_SRC_TIME_LO
+VAL 0x000000e5 SQ_ALU_SRC_MASK_HI
+VAL 0x000000e6 SQ_ALU_SRC_MASK_LO
+VAL 0x000000e7 SQ_ALU_SRC_HW_WAVE_ID
+VAL 0x000000e8 SQ_ALU_SRC_SIMD_ID
+VAL 0x000000e9 SQ_ALU_SRC_SE_ID
+VAL 0x000000ea SQ_ALU_SRC_HW_THREADGRP_ID
+VAL 0x000000eb SQ_ALU_SRC_WAVE_ID_IN_GRP
+VAL 0x000000ec SQ_ALU_SRC_NUM_THREADGRP_WAVES
+VAL 0x000000ed SQ_ALU_SRC_HW_ALU_ODD
+VAL 0x000000ee SQ_ALU_SRC_LOOP_IDX
+VAL 0x000000f0 SQ_ALU_SRC_PARAM_BASE_ADDR
+VAL 0x000000f1 SQ_ALU_SRC_NEW_PRIM_MASK
+VAL 0x000000f2 SQ_ALU_SRC_PRIM_MASK_HI
+VAL 0x000000f3 SQ_ALU_SRC_PRIM_MASK_LO
+VAL 0x000000f4 SQ_ALU_SRC_1_DBL_L
+VAL 0x000000f5 SQ_ALU_SRC_1_DBL_M
+VAL 0x000000f6 SQ_ALU_SRC_0_5_DBL_L
+VAL 0x000000f7 SQ_ALU_SRC_0_5_DBL_M
+VAL 0x000000f8 SQ_ALU_SRC_0
+VAL 0x000000f9 SQ_ALU_SRC_1
+VAL 0x000000fa SQ_ALU_SRC_1_INT
+VAL 0x000000fb SQ_ALU_SRC_M_1_INT
+VAL 0x000000fc SQ_ALU_SRC_0_5
+VAL 0x000000fd SQ_ALU_SRC_LITERAL
+VAL 0x000000fe SQ_ALU_SRC_PV
+VAL 0x000000ff SQ_ALU_SRC_PS
+FLD 22 0x00000001 0x00000000 0 SRC1_REL
+FLD 23 0x00000003 0x00000000 0 SRC1_CHAN
+VAL 0x00000000 SQ_CHAN_X
+VAL 0x00000001 SQ_CHAN_Y
+VAL 0x00000002 SQ_CHAN_Z
+VAL 0x00000003 SQ_CHAN_W
+FLD 25 0x00000001 0x00000000 0 IDX_OFFSET_5
+FLD 26 0x00000007 0x00000000 0 INDEX_MODE
+VAL 0x00000000 SQ_INDEX_AR_X
+VAL 0x00000004 SQ_INDEX_LOOP
+VAL 0x00000005 SQ_INDEX_GLOBAL
+VAL 0x00000006 SQ_INDEX_GLOBAL_AR_X
+FLD 29 0x00000003 0x00000000 0 PRED_SEL
+VAL 0x00000000 SQ_PRED_SEL_OFF
+VAL 0x00000002 SQ_PRED_SEL_ZERO
+VAL 0x00000003 SQ_PRED_SEL_ONE
+FLD 31 0x00000001 0x00000000 0 LAST
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_MEM_GDS_WORD2
+FLD  0 0x00000007 0x00000000 0 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD  3 0x00000007 0x00000000 0 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD  6 0x00000007 0x00000000 0 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD  9 0x00000007 0x00000000 0 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_CF_ALLOC_EXPORT_WORD0_RAT
+FLD  0 0x0000000f 0x00000000 0 RAT_ID
+FLD  4 0x0000003f 0x00000000 0 RAT_INST
+VAL 0x00000000 SQ_EXPORT_RAT_INST_NOP
+VAL 0x00000001 SQ_EXPORT_RAT_INST_STORE_TYPED
+VAL 0x00000002 SQ_EXPORT_RAT_INST_STORE_RAW
+VAL 0x00000003 SQ_EXPORT_RAT_INST_STORE_RAW_FDENORM
+VAL 0x00000004 SQ_EXPORT_RAT_INST_CMPXCHG_INT
+VAL 0x00000005 SQ_EXPORT_RAT_INST_CMPXCHG_FLT
+VAL 0x00000006 SQ_EXPORT_RAT_INST_CMPXCHG_FDENORM
+VAL 0x00000007 SQ_EXPORT_RAT_INST_ADD
+VAL 0x00000008 SQ_EXPORT_RAT_INST_SUB
+VAL 0x00000009 SQ_EXPORT_RAT_INST_RSUB
+VAL 0x0000000a SQ_EXPORT_RAT_INST_MIN_INT
+VAL 0x0000000b SQ_EXPORT_RAT_INST_MIN_UINT
+VAL 0x0000000c SQ_EXPORT_RAT_INST_MAX_INT
+VAL 0x0000000d SQ_EXPORT_RAT_INST_MAX_UINT
+VAL 0x0000000e SQ_EXPORT_RAT_INST_AND
+VAL 0x0000000f SQ_EXPORT_RAT_INST_OR
+VAL 0x00000010 SQ_EXPORT_RAT_INST_XOR
+VAL 0x00000011 SQ_EXPORT_RAT_INST_MSKOR
+VAL 0x00000012 SQ_EXPORT_RAT_INST_INC_UINT
+VAL 0x00000013 SQ_EXPORT_RAT_INST_DEC_UINT
+VAL 0x00000020 SQ_EXPORT_RAT_INST_NOP_RTN
+VAL 0x00000022 SQ_EXPORT_RAT_INST_XCHG_RTN
+VAL 0x00000023 SQ_EXPORT_RAT_INST_XCHG_FDENORM_RTN
+VAL 0x00000024 SQ_EXPORT_RAT_INST_CMPXCHG_INT_RTN
+VAL 0x00000025 SQ_EXPORT_RAT_INST_CMPXCHG_FLT_RTN
+VAL 0x00000026 SQ_EXPORT_RAT_INST_CMPXCHG_FDENORM_RTN
+VAL 0x00000027 SQ_EXPORT_RAT_INST_ADD_RTN
+VAL 0x00000028 SQ_EXPORT_RAT_INST_SUB_RTN
+VAL 0x00000029 SQ_EXPORT_RAT_INST_RSUB_RTN
+VAL 0x0000002a SQ_EXPORT_RAT_INST_MIN_INT_RTN
+VAL 0x0000002b SQ_EXPORT_RAT_INST_MIN_UINT_RTN
+VAL 0x0000002c SQ_EXPORT_RAT_INST_MAX_INT_RTN
+VAL 0x0000002d SQ_EXPORT_RAT_INST_MAX_UINT_RTN
+VAL 0x0000002e SQ_EXPORT_RAT_INST_AND_RTN
+VAL 0x0000002f SQ_EXPORT_RAT_INST_OR_RTN
+VAL 0x00000030 SQ_EXPORT_RAT_INST_XOR_RTN
+VAL 0x00000031 SQ_EXPORT_RAT_INST_MSKOR_RTN
+VAL 0x00000032 SQ_EXPORT_RAT_INST_INC_UINT_RTN
+VAL 0x00000033 SQ_EXPORT_RAT_INST_DEC_UINT_RTN
+FLD 11 0x00000003 0x00000000 0 RAT_INDEX_MODE
+VAL 0x00000000 SQ_CF_INDEX_NONE
+VAL 0x00000001 SQ_CF_INDEX_0
+VAL 0x00000002 SQ_CF_INDEX_1
+VAL 0x00000003 SQ_CF_INVALID
+FLD 13 0x00000003 0x00000000 0 TYPE
+VAL 0x00000000 SQ_EXPORT_PIXEL
+VAL 0x00000001 SQ_EXPORT_POS
+VAL 0x00000002 SQ_EXPORT_PARAM
+VAL 0x00000003 X_UNUSED_FOR_SX_EXPORTS
+FLD 15 0x0000007f 0x00000000 0 RW_GPR
+FLD 22 0x00000001 0x00000000 0 RW_REL
+FLD 23 0x0000007f 0x00000000 0 INDEX_GPR
+FLD 30 0x00000003 0x00000000 0 ELEM_SIZE
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_CF_ALU_WORD0
+FLD  0 0x003fffff 0x00000000 0 ADDR
+FLD 22 0x0000000f 0x00000000 0 KCACHE_BANK0
+FLD 26 0x0000000f 0x00000000 0 KCACHE_BANK1
+FLD 30 0x00000003 0x00000000 0 KCACHE_MODE0
+VAL 0x00000000 SQ_CF_KCACHE_NOP
+VAL 0x00000001 SQ_CF_KCACHE_LOCK_1
+VAL 0x00000002 SQ_CF_KCACHE_LOCK_2
+VAL 0x00000003 SQ_CF_KCACHE_LOCK_LOOP_INDEX
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_MEM_GDS_WORD1
+FLD  0 0x0000007f 0x00000000 0 DST_GPR
+FLD  7 0x00000003 0x00000000 0 DST_REL_MODE
+VAL 0x00000000 SQ_REL_NONE
+VAL 0x00000001 SQ_REL_LOOP
+VAL 0x00000002 SQ_REL_GLOBAL
+FLD  9 0x0000003f 0x00000000 0 GDS_OP
+VAL 0x00000000 SQ_DS_INST_ADD
+VAL 0x00000001 SQ_DS_INST_SUB
+VAL 0x00000002 SQ_DS_INST_RSUB
+VAL 0x00000003 SQ_DS_INST_INC
+VAL 0x00000004 SQ_DS_INST_DEC
+VAL 0x00000005 SQ_DS_INST_MIN_INT
+VAL 0x00000006 SQ_DS_INST_MAX_INT
+VAL 0x00000007 SQ_DS_INST_MIN_UINT
+VAL 0x00000008 SQ_DS_INST_MAX_UINT
+VAL 0x00000009 SQ_DS_INST_AND
+VAL 0x0000000a SQ_DS_INST_OR
+VAL 0x0000000b SQ_DS_INST_XOR
+VAL 0x0000000c SQ_DS_INST_MSKOR
+VAL 0x0000000d SQ_DS_INST_WRITE
+VAL 0x0000000e SQ_DS_INST_WRITE_REL
+VAL 0x0000000f SQ_DS_INST_WRITE2
+VAL 0x00000010 SQ_DS_INST_CMP_STORE
+VAL 0x00000011 SQ_DS_INST_CMP_STORE_SPF
+VAL 0x00000012 SQ_DS_INST_BYTE_WRITE
+VAL 0x00000013 SQ_DS_INST_SHORT_WRITE
+VAL 0x00000020 SQ_DS_INST_ADD_RET
+VAL 0x00000021 SQ_DS_INST_SUB_RET
+VAL 0x00000022 SQ_DS_INST_RSUB_RET
+VAL 0x00000023 SQ_DS_INST_INC_RET
+VAL 0x00000024 SQ_DS_INST_DEC_RET
+VAL 0x00000025 SQ_DS_INST_MIN_INT_RET
+VAL 0x00000026 SQ_DS_INST_MAX_INT_RET
+VAL 0x00000027 SQ_DS_INST_MIN_UINT_RET
+VAL 0x00000028 SQ_DS_INST_MAX_UINT_RET
+VAL 0x00000029 SQ_DS_INST_AND_RET
+VAL 0x0000002a SQ_DS_INST_OR_RET
+VAL 0x0000002b SQ_DS_INST_XOR_RET
+VAL 0x0000002c SQ_DS_INST_MSKOR_RET
+VAL 0x0000002d SQ_DS_INST_XCHG_RET
+VAL 0x0000002e SQ_DS_INST_XCHG_REL_RET
+VAL 0x0000002f SQ_DS_INST_XCHG2_RET
+VAL 0x00000030 SQ_DS_INST_CMP_XCHG_RET
+VAL 0x00000031 SQ_DS_INST_CMP_XCHG_SPF_RET
+VAL 0x00000032 SQ_DS_INST_READ_RET
+VAL 0x00000033 SQ_DS_INST_READ_REL_RET
+VAL 0x00000034 SQ_DS_INST_READ2_RET
+VAL 0x00000035 SQ_DS_INST_READWRITE_RET
+VAL 0x00000036 SQ_DS_INST_BYTE_READ_RET
+VAL 0x00000037 SQ_DS_INST_UBYTE_READ_RET
+VAL 0x00000038 SQ_DS_INST_SHORT_READ_RET
+VAL 0x00000039 SQ_DS_INST_USHORT_READ_RET
+VAL 0x0000003f SQ_DS_INST_ATOMIC_ORDERED_ALLOC_RET
+FLD 16 0x0000007f 0x00000000 0 DS_OFFSET
+FLD 24 0x00000003 0x00000000 0 UAV_INDEX_MODE
+VAL 0x00000000 SQ_CF_INDEX_NONE
+VAL 0x00000001 SQ_CF_INDEX_0
+VAL 0x00000002 SQ_CF_INDEX_1
+VAL 0x00000003 SQ_CF_INVALID
+FLD 26 0x0000000f 0x00000000 0 UAV_ID
+FLD 30 0x00000001 0x00000000 0 ALLOC_CONSUME
+FLD 31 0x00000001 0x00000000 0 BCAST_FIRST_REQ
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_MEM_RD_WORD2
+FLD  0 0x00001fff 0x00000000 0 ARRAY_BASE
+FLD 16 0x00000003 0x00000000 0 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+FLD 20 0x00000fff 0x00000000 0 ARRAY_SIZE
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_CF_ALU_WORD1_EXT
+FLD  0 0x00000003 0x00000000 0 KCACHE_MODE3
+VAL 0x00000000 SQ_CF_KCACHE_NOP
+VAL 0x00000001 SQ_CF_KCACHE_LOCK_1
+VAL 0x00000002 SQ_CF_KCACHE_LOCK_2
+VAL 0x00000003 SQ_CF_KCACHE_LOCK_LOOP_INDEX
+FLD  2 0x000000ff 0x00000000 0 KCACHE_ADDR2
+FLD 10 0x000000ff 0x00000000 0 KCACHE_ADDR3
+FLD 26 0x0000000f 0x00000000 0 CF_INST
+VAL 0x00000008 SQ_CF_INST_ALU
+VAL 0x00000009 SQ_CF_INST_ALU_PUSH_BEFORE
+VAL 0x0000000a SQ_CF_INST_ALU_POP_AFTER
+VAL 0x0000000b SQ_CF_INST_ALU_POP2_AFTER
+VAL 0x0000000c SQ_CF_INST_ALU_EXTENDED
+VAL 0x0000000d SQ_CF_INST_ALU_CONTINUE
+VAL 0x0000000e SQ_CF_INST_ALU_BREAK
+VAL 0x0000000f SQ_CF_INST_ALU_ELSE_AFTER
+FLD 31 0x00000001 0x00000000 0 BARRIER
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_CF_GWS_WORD0
+FLD  0 0x000003ff 0x00000000 0 VALUE
+FLD 16 0x0000001f 0x00000000 0 RESOURCE
+FLD 25 0x00000001 0x00000000 0 SIGN
+FLD 26 0x00000003 0x00000000 0 VAL_INDEX_MODE
+VAL 0x00000000 SQ_GWS_INDEX_NONE
+VAL 0x00000001 SQ_GWS_INDEX_0
+VAL 0x00000002 SQ_GWS_INDEX_1
+VAL 0x00000003 SQ_GWS_INDEX_MIX
+FLD 28 0x00000003 0x00000000 0 RSRC_INDEX_MODE
+VAL 0x00000000 SQ_CF_INDEX_NONE
+VAL 0x00000001 SQ_CF_INDEX_0
+VAL 0x00000002 SQ_CF_INDEX_1
+VAL 0x00000003 SQ_CF_INVALID
+FLD 30 0x00000003 0x00000000 0 GWS_OPCODE
+VAL 0x00000000 SQ_GWS_SEMA_V
+VAL 0x00000001 SQ_GWS_SEMA_P
+VAL 0x00000002 SQ_GWS_BARRIER
+VAL 0x00000003 SQ_GWS_INIT
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_VTX_WORD2
+FLD  0 0x0000ffff 0x00000000 0 OFFSET
+FLD 16 0x00000003 0x00000000 0 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+FLD 18 0x00000001 0x00000000 0 CONST_BUF_NO_STRIDE
+FLD 19 0x00000001 0x00000000 0 MEGA_FETCH
+FLD 20 0x00000001 0x00000000 0 ALT_CONST
+FLD 21 0x00000003 0x00000000 0 BUFFER_INDEX_MODE
+VAL 0x00000000 SQ_CF_INDEX_NONE
+VAL 0x00000001 SQ_CF_INDEX_0
+VAL 0x00000002 SQ_CF_INDEX_1
+VAL 0x00000003 SQ_CF_INVALID
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_CF_ALLOC_EXPORT_WORD1_BUF
+FLD  0 0x00000fff 0x00000000 0 ARRAY_SIZE
+FLD 12 0x0000000f 0x00000000 0 COMP_MASK
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_CF_WORD0
+FLD  0 0x00ffffff 0x00000000 0 ADDR
+FLD 24 0x00000007 0x00000000 0 JUMPTABLE_SEL
+VAL 0x00000000 SQ_CF_JUMPTABLE_SEL_CONST_A
+VAL 0x00000001 SQ_CF_JUMPTABLE_SEL_CONST_B
+VAL 0x00000002 SQ_CF_JUMPTABLE_SEL_CONST_C
+VAL 0x00000003 SQ_CF_JUMPTABLE_SEL_CONST_D
+VAL 0x00000004 SQ_CF_JUMPTABLE_SEL_INDEX_0
+VAL 0x00000005 SQ_CF_JUMPTABLE_SEL_INDEX_1
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_CF_ALLOC_EXPORT_WORD0
+FLD  0 0x00001fff 0x00000000 0 ARRAY_BASE
+FLD 13 0x00000003 0x00000000 0 TYPE
+VAL 0x00000000 SQ_EXPORT_PIXEL
+VAL 0x00000001 SQ_EXPORT_POS
+VAL 0x00000002 SQ_EXPORT_PARAM
+VAL 0x00000003 X_UNUSED_FOR_SX_EXPORTS
+FLD 15 0x0000007f 0x00000000 0 RW_GPR
+FLD 22 0x00000001 0x00000000 0 RW_REL
+FLD 23 0x0000007f 0x00000000 0 INDEX_GPR
+FLD 30 0x00000003 0x00000000 0 ELEM_SIZE
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_MEM_GDS_WORD0
+FLD  0 0x0000001f 0x00000000 0 MEM_INST
+VAL 0x00000002 SQ_MEM_INST_MEM
+FLD  8 0x00000007 0x00000000 0 MEM_OP
+VAL 0x00000000 SQ_MEM_OP_RD_SCRATCH
+VAL 0x00000002 SQ_MEM_OP_RD_SCATTER
+VAL 0x00000004 SQ_MEM_OP_GDS
+VAL 0x00000005 SQ_MEM_OP_TF_WRITE
+FLD 11 0x0000007f 0x00000000 0 SRC_GPR
+FLD 18 0x00000003 0x00000000 0 SRC_REL_MODE
+VAL 0x00000000 SQ_REL_NONE
+VAL 0x00000001 SQ_REL_LOOP
+VAL 0x00000002 SQ_REL_GLOBAL
+FLD 20 0x00000007 0x00000000 0 SRC_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 23 0x00000007 0x00000000 0 SRC_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 26 0x00000007 0x00000000 0 SRC_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_ALU_WORD1_LDS_DIRECT_LITERAL_HI
+FLD  0 0x00001fff 0x00000000 0 OFFSET_B
+FLD 13 0x0000007f 0x00000000 0 STRIDE_B
+FLD 22 0x00000001 0x00000000 0 THREAD_REL_B
+FLD 31 0x00000001 0x00000000 0 DIRECT_READ_32
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_VTX_WORD1
+FLD  9 0x00000007 0x00000000 0 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 12 0x00000007 0x00000000 0 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 15 0x00000007 0x00000000 0 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 18 0x00000007 0x00000000 0 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 21 0x00000001 0x00000000 0 USE_CONST_FIELDS
+FLD 22 0x0000003f 0x00000000 0 DATA_FORMAT
+VAL 0x00000000 FMT_INVALID
+VAL 0x00000001 FMT_8
+VAL 0x00000002 FMT_4_4
+VAL 0x00000003 FMT_3_3_2
+VAL 0x00000005 FMT_16
+VAL 0x00000006 FMT_16_FLOAT
+VAL 0x00000007 FMT_8_8
+VAL 0x00000008 FMT_5_6_5
+VAL 0x00000009 FMT_6_5_5
+VAL 0x0000000a FMT_1_5_5_5
+VAL 0x0000000b FMT_4_4_4_4
+VAL 0x0000000c FMT_5_5_5_1
+VAL 0x0000000d FMT_32
+VAL 0x0000000e FMT_32_FLOAT
+VAL 0x0000000f FMT_16_16
+VAL 0x00000010 FMT_16_16_FLOAT
+VAL 0x00000011 FMT_8_24
+VAL 0x00000012 FMT_8_24_FLOAT
+VAL 0x00000013 FMT_24_8
+VAL 0x00000014 FMT_24_8_FLOAT
+VAL 0x00000015 FMT_10_11_11
+VAL 0x00000016 FMT_10_11_11_FLOAT
+VAL 0x00000017 FMT_11_11_10
+VAL 0x00000018 FMT_11_11_10_FLOAT
+VAL 0x00000019 FMT_2_10_10_10
+VAL 0x0000001a FMT_8_8_8_8
+VAL 0x0000001b FMT_10_10_10_2
+VAL 0x0000001c FMT_X24_8_32_FLOAT
+VAL 0x0000001d FMT_32_32
+VAL 0x0000001e FMT_32_32_FLOAT
+VAL 0x0000001f FMT_16_16_16_16
+VAL 0x00000020 FMT_16_16_16_16_FLOAT
+VAL 0x00000022 FMT_32_32_32_32
+VAL 0x00000023 FMT_32_32_32_32_FLOAT
+VAL 0x00000025 FMT_1
+VAL 0x00000027 FMT_GB_GR
+VAL 0x00000028 FMT_BG_RG
+VAL 0x00000029 FMT_32_AS_8
+VAL 0x0000002a FMT_32_AS_8_8
+VAL 0x0000002b FMT_5_9_9_9_SHAREDEXP
+VAL 0x0000002c FMT_8_8_8
+VAL 0x0000002d FMT_16_16_16
+VAL 0x0000002e FMT_16_16_16_FLOAT
+VAL 0x0000002f FMT_32_32_32
+VAL 0x00000030 FMT_32_32_32_FLOAT
+FLD 28 0x00000003 0x00000000 0 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 30 0x00000001 0x00000000 0 FORMAT_COMP_ALL
+FLD 31 0x00000001 0x00000000 0 SRF_MODE_ALL
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_ALU_WORD1_OP2
+FLD  0 0x00000001 0x00000000 0 SRC0_ABS
+FLD  1 0x00000001 0x00000000 0 SRC1_ABS
+FLD  2 0x00000001 0x00000000 0 UPDATE_EXECUTE_MASK
+FLD  3 0x00000001 0x00000000 0 UPDATE_PRED
+FLD  4 0x00000001 0x00000000 0 WRITE_MASK
+FLD  5 0x00000003 0x00000000 0 OMOD
+VAL 0x00000000 SQ_ALU_OMOD_OFF
+VAL 0x00000001 SQ_ALU_OMOD_M2
+VAL 0x00000002 SQ_ALU_OMOD_M4
+VAL 0x00000003 SQ_ALU_OMOD_D2
+FLD  7 0x000007ff 0x00000000 0 ALU_INST
+VAL 0x00000000 SQ_OP2_INST_ADD
+VAL 0x00000001 SQ_OP2_INST_MUL
+VAL 0x00000002 SQ_OP2_INST_MUL_IEEE
+VAL 0x00000003 SQ_OP2_INST_MAX
+VAL 0x00000004 SQ_OP2_INST_MIN
+VAL 0x00000005 SQ_OP2_INST_MAX_DX10
+VAL 0x00000006 SQ_OP2_INST_MIN_DX10
+VAL 0x00000008 SQ_OP2_INST_SETE
+VAL 0x00000009 SQ_OP2_INST_SETGT
+VAL 0x0000000a SQ_OP2_INST_SETGE
+VAL 0x0000000b SQ_OP2_INST_SETNE
+VAL 0x0000000c SQ_OP2_INST_SETE_DX10
+VAL 0x0000000d SQ_OP2_INST_SETGT_DX10
+VAL 0x0000000e SQ_OP2_INST_SETGE_DX10
+VAL 0x0000000f SQ_OP2_INST_SETNE_DX10
+VAL 0x00000010 SQ_OP2_INST_FRACT
+VAL 0x00000011 SQ_OP2_INST_TRUNC
+VAL 0x00000012 SQ_OP2_INST_CEIL
+VAL 0x00000013 SQ_OP2_INST_RNDNE
+VAL 0x00000014 SQ_OP2_INST_FLOOR
+VAL 0x00000015 SQ_OP2_INST_ASHR_INT
+VAL 0x00000016 SQ_OP2_INST_LSHR_INT
+VAL 0x00000017 SQ_OP2_INST_LSHL_INT
+VAL 0x00000019 SQ_OP2_INST_MOV
+VAL 0x0000001a SQ_OP2_INST_NOP
+VAL 0x0000001e SQ_OP2_INST_PRED_SETGT_UINT
+VAL 0x0000001f SQ_OP2_INST_PRED_SETGE_UINT
+VAL 0x00000020 SQ_OP2_INST_PRED_SETE
+VAL 0x00000021 SQ_OP2_INST_PRED_SETGT
+VAL 0x00000022 SQ_OP2_INST_PRED_SETGE
+VAL 0x00000023 SQ_OP2_INST_PRED_SETNE
+VAL 0x00000024 SQ_OP2_INST_PRED_SET_INV
+VAL 0x00000025 SQ_OP2_INST_PRED_SET_POP
+VAL 0x00000026 SQ_OP2_INST_PRED_SET_CLR
+VAL 0x00000027 SQ_OP2_INST_PRED_SET_RESTORE
+VAL 0x00000028 SQ_OP2_INST_PRED_SETE_PUSH
+VAL 0x00000029 SQ_OP2_INST_PRED_SETGT_PUSH
+VAL 0x0000002a SQ_OP2_INST_PRED_SETGE_PUSH
+VAL 0x0000002b SQ_OP2_INST_PRED_SETNE_PUSH
+VAL 0x0000002c SQ_OP2_INST_KILLE
+VAL 0x0000002d SQ_OP2_INST_KILLGT
+VAL 0x0000002e SQ_OP2_INST_KILLGE
+VAL 0x0000002f SQ_OP2_INST_KILLNE
+VAL 0x00000030 SQ_OP2_INST_AND_INT
+VAL 0x00000031 SQ_OP2_INST_OR_INT
+VAL 0x00000032 SQ_OP2_INST_XOR_INT
+VAL 0x00000033 SQ_OP2_INST_NOT_INT
+VAL 0x00000034 SQ_OP2_INST_ADD_INT
+VAL 0x00000035 SQ_OP2_INST_SUB_INT
+VAL 0x00000036 SQ_OP2_INST_MAX_INT
+VAL 0x00000037 SQ_OP2_INST_MIN_INT
+VAL 0x00000038 SQ_OP2_INST_MAX_UINT
+VAL 0x00000039 SQ_OP2_INST_MIN_UINT
+VAL 0x0000003a SQ_OP2_INST_SETE_INT
+VAL 0x0000003b SQ_OP2_INST_SETGT_INT
+VAL 0x0000003c SQ_OP2_INST_SETGE_INT
+VAL 0x0000003d SQ_OP2_INST_SETNE_INT
+VAL 0x0000003e SQ_OP2_INST_SETGT_UINT
+VAL 0x0000003f SQ_OP2_INST_SETGE_UINT
+VAL 0x00000040 SQ_OP2_INST_KILLGT_UINT
+VAL 0x00000041 SQ_OP2_INST_KILLGE_UINT
+VAL 0x00000042 SQ_OP2_INST_PRED_SETE_INT
+VAL 0x00000043 SQ_OP2_INST_PRED_SETGT_INT
+VAL 0x00000044 SQ_OP2_INST_PRED_SETGE_INT
+VAL 0x00000045 SQ_OP2_INST_PRED_SETNE_INT
+VAL 0x00000046 SQ_OP2_INST_KILLE_INT
+VAL 0x00000047 SQ_OP2_INST_KILLGT_INT
+VAL 0x00000048 SQ_OP2_INST_KILLGE_INT
+VAL 0x00000049 SQ_OP2_INST_KILLNE_INT
+VAL 0x0000004a SQ_OP2_INST_PRED_SETE_PUSH_INT
+VAL 0x0000004b SQ_OP2_INST_PRED_SETGT_PUSH_INT
+VAL 0x0000004c SQ_OP2_INST_PRED_SETGE_PUSH_INT
+VAL 0x0000004d SQ_OP2_INST_PRED_SETNE_PUSH_INT
+VAL 0x0000004e SQ_OP2_INST_PRED_SETLT_PUSH_INT
+VAL 0x0000004f SQ_OP2_INST_PRED_SETLE_PUSH_INT
+VAL 0x00000050 SQ_OP2_INST_FLT_TO_INT
+VAL 0x00000051 SQ_OP2_INST_BFREV_INT
+VAL 0x00000052 SQ_OP2_INST_ADDC_UINT
+VAL 0x00000053 SQ_OP2_INST_SUBB_UINT
+VAL 0x00000054 SQ_OP2_INST_GROUP_BARRIER
+VAL 0x00000055 SQ_OP2_INST_GROUP_SEQ_BEGIN
+VAL 0x00000056 SQ_OP2_INST_GROUP_SEQ_END
+VAL 0x00000057 SQ_OP2_INST_SET_MODE
+VAL 0x00000058 SQ_OP2_INST_SET_CF_IDX0
+VAL 0x00000059 SQ_OP2_INST_SET_CF_IDX1
+VAL 0x0000005a SQ_OP2_INST_SET_LDS_SIZE
+VAL 0x00000081 SQ_OP2_INST_EXP_IEEE
+VAL 0x00000082 SQ_OP2_INST_LOG_CLAMPED
+VAL 0x00000083 SQ_OP2_INST_LOG_IEEE
+VAL 0x00000084 SQ_OP2_INST_RECIP_CLAMPED
+VAL 0x00000085 SQ_OP2_INST_RECIP_FF
+VAL 0x00000086 SQ_OP2_INST_RECIP_IEEE
+VAL 0x00000087 SQ_OP2_INST_RECIPSQRT_CLAMPED
+VAL 0x00000088 SQ_OP2_INST_RECIPSQRT_FF
+VAL 0x00000089 SQ_OP2_INST_RECIPSQRT_IEEE
+VAL 0x0000008a SQ_OP2_INST_SQRT_IEEE
+VAL 0x0000008d SQ_OP2_INST_SIN
+VAL 0x0000008e SQ_OP2_INST_COS
+VAL 0x0000008f SQ_OP2_INST_MULLO_INT
+VAL 0x00000090 SQ_OP2_INST_MULHI_INT
+VAL 0x00000091 SQ_OP2_INST_MULLO_UINT
+VAL 0x00000092 SQ_OP2_INST_MULHI_UINT
+VAL 0x00000093 SQ_OP2_INST_RECIP_INT
+VAL 0x00000094 SQ_OP2_INST_RECIP_UINT
+VAL 0x00000095 SQ_OP2_INST_RECIP_64
+VAL 0x00000096 SQ_OP2_INST_RECIP_CLAMPED_64
+VAL 0x00000097 SQ_OP2_INST_RECIPSQRT_64
+VAL 0x00000098 SQ_OP2_INST_RECIPSQRT_CLAMPED_64
+VAL 0x00000099 SQ_OP2_INST_SQRT_64
+VAL 0x0000009a SQ_OP2_INST_FLT_TO_UINT
+VAL 0x0000009b SQ_OP2_INST_INT_TO_FLT
+VAL 0x0000009c SQ_OP2_INST_UINT_TO_FLT
+VAL 0x000000a0 SQ_OP2_INST_BFM_INT
+VAL 0x000000a2 SQ_OP2_INST_FLT32_TO_FLT16
+VAL 0x000000a3 SQ_OP2_INST_FLT16_TO_FLT32
+VAL 0x000000a4 SQ_OP2_INST_UBYTE0_FLT
+VAL 0x000000a5 SQ_OP2_INST_UBYTE1_FLT
+VAL 0x000000a6 SQ_OP2_INST_UBYTE2_FLT
+VAL 0x000000a7 SQ_OP2_INST_UBYTE3_FLT
+VAL 0x000000aa SQ_OP2_INST_BCNT_INT
+VAL 0x000000ab SQ_OP2_INST_FFBH_UINT
+VAL 0x000000ac SQ_OP2_INST_FFBL_INT
+VAL 0x000000ad SQ_OP2_INST_FFBH_INT
+VAL 0x000000ae SQ_OP2_INST_FLT_TO_UINT4
+VAL 0x000000af SQ_OP2_INST_DOT_IEEE
+VAL 0x000000b0 SQ_OP2_INST_FLT_TO_INT_RPI
+VAL 0x000000b1 SQ_OP2_INST_FLT_TO_INT_FLOOR
+VAL 0x000000b2 SQ_OP2_INST_MULHI_UINT24
+VAL 0x000000b3 SQ_OP2_INST_MBCNT_32HI_INT
+VAL 0x000000b4 SQ_OP2_INST_OFFSET_TO_FLT
+VAL 0x000000b5 SQ_OP2_INST_MUL_UINT24
+VAL 0x000000b6 SQ_OP2_INST_BCNT_ACCUM_PREV_INT
+VAL 0x000000b7 SQ_OP2_INST_MBCNT_32LO_ACCUM_PREV_INT
+VAL 0x000000b8 SQ_OP2_INST_SETE_64
+VAL 0x000000b9 SQ_OP2_INST_SETNE_64
+VAL 0x000000ba SQ_OP2_INST_SETGT_64
+VAL 0x000000bb SQ_OP2_INST_SETGE_64
+VAL 0x000000bc SQ_OP2_INST_MIN_64
+VAL 0x000000bd SQ_OP2_INST_MAX_64
+VAL 0x000000be SQ_OP2_INST_DOT4
+VAL 0x000000bf SQ_OP2_INST_DOT4_IEEE
+VAL 0x000000c0 SQ_OP2_INST_CUBE
+VAL 0x000000c1 SQ_OP2_INST_MAX4
+VAL 0x000000c4 SQ_OP2_INST_FREXP_64
+VAL 0x000000c5 SQ_OP2_INST_LDEXP_64
+VAL 0x000000c6 SQ_OP2_INST_FRACT_64
+VAL 0x000000c7 SQ_OP2_INST_PRED_SETGT_64
+VAL 0x000000c8 SQ_OP2_INST_PRED_SETE_64
+VAL 0x000000c9 SQ_OP2_INST_PRED_SETGE_64
+VAL 0x000000ca SQ_OP2_INST_MUL_64
+VAL 0x000000cb SQ_OP2_INST_ADD_64
+VAL 0x000000cc SQ_OP2_INST_MOVA_INT
+VAL 0x000000cd SQ_OP2_INST_FLT64_TO_FLT32
+VAL 0x000000ce SQ_OP2_INST_FLT32_TO_FLT64
+VAL 0x000000cf SQ_OP2_INST_SAD_ACCUM_PREV_UINT
+VAL 0x000000d0 SQ_OP2_INST_DOT
+VAL 0x000000d1 SQ_OP2_INST_MUL_PREV
+VAL 0x000000d2 SQ_OP2_INST_MUL_IEEE_PREV
+VAL 0x000000d3 SQ_OP2_INST_ADD_PREV
+VAL 0x000000d4 SQ_OP2_INST_MULADD_PREV
+VAL 0x000000d5 SQ_OP2_INST_MULADD_IEEE_PREV
+VAL 0x000000d6 SQ_OP2_INST_INTERP_XY
+VAL 0x000000d7 SQ_OP2_INST_INTERP_ZW
+VAL 0x000000d8 SQ_OP2_INST_INTERP_X
+VAL 0x000000d9 SQ_OP2_INST_INTERP_Z
+VAL 0x000000da SQ_OP2_INST_STORE_FLAGS
+VAL 0x000000db SQ_OP2_INST_LOAD_STORE_FLAGS
+VAL 0x000000e0 SQ_OP2_INST_INTERP_LOAD_P0
+VAL 0x000000e1 SQ_OP2_INST_INTERP_LOAD_P10
+VAL 0x000000e2 SQ_OP2_INST_INTERP_LOAD_P20
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_CF_WORD1
+FLD  0 0x00000007 0x00000000 0 POP_COUNT
+FLD  3 0x0000001f 0x00000000 0 CF_CONST
+FLD  8 0x00000003 0x00000000 0 COND
+VAL 0x00000000 SQ_CF_COND_ACTIVE
+VAL 0x00000001 SQ_CF_COND_FALSE
+VAL 0x00000002 SQ_CF_COND_BOOL
+VAL 0x00000003 SQ_CF_COND_NOT_BOOL
+FLD 10 0x0000003f 0x00000000 0 COUNT
+FLD 20 0x00000001 0x00000000 0 VALID_PIXEL_MODE
+FLD 21 0x00000001 0x00000000 0 END_OF_PROGRAM
+FLD 22 0x000000ff 0x00000000 0 CF_INST
+VAL 0x00000000 SQ_CF_INST_NOP
+VAL 0x00000001 SQ_CF_INST_TC
+VAL 0x00000002 SQ_CF_INST_VC
+VAL 0x00000003 SQ_CF_INST_GDS
+VAL 0x00000004 SQ_CF_INST_LOOP_START
+VAL 0x00000005 SQ_CF_INST_LOOP_END
+VAL 0x00000006 SQ_CF_INST_LOOP_START_DX10
+VAL 0x00000007 SQ_CF_INST_LOOP_START_NO_AL
+VAL 0x00000008 SQ_CF_INST_LOOP_CONTINUE
+VAL 0x00000009 SQ_CF_INST_LOOP_BREAK
+VAL 0x0000000a SQ_CF_INST_JUMP
+VAL 0x0000000b SQ_CF_INST_PUSH
+VAL 0x0000000d SQ_CF_INST_ELSE
+VAL 0x0000000e SQ_CF_INST_POP
+VAL 0x00000012 SQ_CF_INST_CALL
+VAL 0x00000013 SQ_CF_INST_CALL_FS
+VAL 0x00000014 SQ_CF_INST_RETURN
+VAL 0x00000015 SQ_CF_INST_EMIT_VERTEX
+VAL 0x00000016 SQ_CF_INST_EMIT_CUT_VERTEX
+VAL 0x00000017 SQ_CF_INST_CUT_VERTEX
+VAL 0x00000018 SQ_CF_INST_KILL
+VAL 0x0000001a SQ_CF_INST_WAIT_ACK
+VAL 0x0000001b SQ_CF_INST_TC_ACK
+VAL 0x0000001c SQ_CF_INST_VC_ACK
+VAL 0x0000001d SQ_CF_INST_JUMPTABLE
+VAL 0x0000001e SQ_CF_INST_GLOBAL_WAVE_SYNC
+VAL 0x0000001f SQ_CF_INST_HALT
+FLD 30 0x00000001 0x00000000 0 WHOLE_QUAD_MODE
+FLD 31 0x00000001 0x00000000 0 BARRIER
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_VTX_WORD1_SEM
+FLD  0 0x000000ff 0x00000000 0 SEMANTIC_ID
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_TEX_WORD0
+FLD  0 0x0000001f 0x00000000 0 TEX_INST
+VAL 0x00000003 SQ_TEX_INST_LD
+VAL 0x00000004 SQ_TEX_INST_GET_TEXTURE_RESINFO
+VAL 0x00000005 SQ_TEX_INST_GET_NUMBER_OF_SAMPLES
+VAL 0x00000006 SQ_TEX_INST_GET_LOD
+VAL 0x00000007 SQ_TEX_INST_GET_GRADIENTS_H
+VAL 0x00000008 SQ_TEX_INST_GET_GRADIENTS_V
+VAL 0x00000009 SQ_TEX_INST_SET_TEXTURE_OFFSETS
+VAL 0x0000000a SQ_TEX_INST_KEEP_GRADIENTS
+VAL 0x0000000b SQ_TEX_INST_SET_GRADIENTS_H
+VAL 0x0000000c SQ_TEX_INST_SET_GRADIENTS_V
+VAL 0x0000000d SQ_TEX_INST_PASS
+VAL 0x00000010 SQ_TEX_INST_SAMPLE
+VAL 0x00000011 SQ_TEX_INST_SAMPLE_L
+VAL 0x00000012 SQ_TEX_INST_SAMPLE_LB
+VAL 0x00000013 SQ_TEX_INST_SAMPLE_LZ
+VAL 0x00000014 SQ_TEX_INST_SAMPLE_G
+VAL 0x00000015 SQ_TEX_INST_GATHER4
+VAL 0x00000016 SQ_TEX_INST_SAMPLE_G_LB
+VAL 0x00000017 SQ_TEX_INST_GATHER4_O
+VAL 0x00000018 SQ_TEX_INST_SAMPLE_C
+VAL 0x00000019 SQ_TEX_INST_SAMPLE_C_L
+VAL 0x0000001a SQ_TEX_INST_SAMPLE_C_LB
+VAL 0x0000001b SQ_TEX_INST_SAMPLE_C_LZ
+VAL 0x0000001c SQ_TEX_INST_SAMPLE_C_G
+VAL 0x0000001d SQ_TEX_INST_GATHER4_C
+VAL 0x0000001e SQ_TEX_INST_SAMPLE_C_G_LB
+VAL 0x0000001f SQ_TEX_INST_GATHER4_C_O
+FLD  5 0x00000003 0x00000000 0 INST_MOD
+FLD  7 0x00000001 0x00000000 0 FETCH_WHOLE_QUAD
+FLD  8 0x000000ff 0x00000000 0 RESOURCE_ID
+FLD 16 0x0000007f 0x00000000 0 SRC_GPR
+FLD 23 0x00000001 0x00000000 0 SRC_REL
+FLD 24 0x00000001 0x00000000 0 ALT_CONST
+FLD 25 0x00000003 0x00000000 0 RESOURCE_INDEX_MODE
+VAL 0x00000000 SQ_CF_INDEX_NONE
+VAL 0x00000001 SQ_CF_INDEX_0
+VAL 0x00000002 SQ_CF_INDEX_1
+VAL 0x00000003 SQ_CF_INVALID
+FLD 27 0x00000003 0x00000000 0 SAMPLER_INDEX_MODE
+VAL 0x00000000 SQ_CF_INDEX_NONE
+VAL 0x00000001 SQ_CF_INDEX_0
+VAL 0x00000002 SQ_CF_INDEX_1
+VAL 0x00000003 SQ_CF_INVALID
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_VTX_WORD1_GPR
+FLD  0 0x0000007f 0x00000000 0 DST_GPR
+FLD  7 0x00000001 0x00000000 0 DST_REL
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_ALU_WORD1_LDS_IDX_OP
+FLD  0 0x000001ff 0x00000000 0 SRC2_SEL
+VAL 0x000000db SQ_ALU_SRC_LDS_OQ_A
+VAL 0x000000dc SQ_ALU_SRC_LDS_OQ_B
+VAL 0x000000dd SQ_ALU_SRC_LDS_OQ_A_POP
+VAL 0x000000de SQ_ALU_SRC_LDS_OQ_B_POP
+VAL 0x000000df SQ_ALU_SRC_LDS_DIRECT_A
+VAL 0x000000e0 SQ_ALU_SRC_LDS_DIRECT_B
+VAL 0x000000e3 SQ_ALU_SRC_TIME_HI
+VAL 0x000000e4 SQ_ALU_SRC_TIME_LO
+VAL 0x000000e5 SQ_ALU_SRC_MASK_HI
+VAL 0x000000e6 SQ_ALU_SRC_MASK_LO
+VAL 0x000000e7 SQ_ALU_SRC_HW_WAVE_ID
+VAL 0x000000e8 SQ_ALU_SRC_SIMD_ID
+VAL 0x000000e9 SQ_ALU_SRC_SE_ID
+VAL 0x000000ea SQ_ALU_SRC_HW_THREADGRP_ID
+VAL 0x000000eb SQ_ALU_SRC_WAVE_ID_IN_GRP
+VAL 0x000000ec SQ_ALU_SRC_NUM_THREADGRP_WAVES
+VAL 0x000000ed SQ_ALU_SRC_HW_ALU_ODD
+VAL 0x000000ee SQ_ALU_SRC_LOOP_IDX
+VAL 0x000000f0 SQ_ALU_SRC_PARAM_BASE_ADDR
+VAL 0x000000f1 SQ_ALU_SRC_NEW_PRIM_MASK
+VAL 0x000000f2 SQ_ALU_SRC_PRIM_MASK_HI
+VAL 0x000000f3 SQ_ALU_SRC_PRIM_MASK_LO
+VAL 0x000000f4 SQ_ALU_SRC_1_DBL_L
+VAL 0x000000f5 SQ_ALU_SRC_1_DBL_M
+VAL 0x000000f6 SQ_ALU_SRC_0_5_DBL_L
+VAL 0x000000f7 SQ_ALU_SRC_0_5_DBL_M
+VAL 0x000000f8 SQ_ALU_SRC_0
+VAL 0x000000f9 SQ_ALU_SRC_1
+VAL 0x000000fa SQ_ALU_SRC_1_INT
+VAL 0x000000fb SQ_ALU_SRC_M_1_INT
+VAL 0x000000fc SQ_ALU_SRC_0_5
+VAL 0x000000fd SQ_ALU_SRC_LITERAL
+VAL 0x000000fe SQ_ALU_SRC_PV
+VAL 0x000000ff SQ_ALU_SRC_PS
+FLD  9 0x00000001 0x00000000 0 SRC2_REL
+FLD 10 0x00000003 0x00000000 0 SRC2_CHAN
+VAL 0x00000000 SQ_CHAN_X
+VAL 0x00000001 SQ_CHAN_Y
+VAL 0x00000002 SQ_CHAN_Z
+VAL 0x00000003 SQ_CHAN_W
+FLD 12 0x00000001 0x00000000 0 IDX_OFFSET_1
+FLD 13 0x0000001f 0x00000000 0 ALU_INST
+VAL 0x00000004 SQ_OP3_INST_BFE_UINT
+VAL 0x00000005 SQ_OP3_INST_BFE_INT
+VAL 0x00000006 SQ_OP3_INST_BFI_INT
+VAL 0x00000007 SQ_OP3_INST_FMA
+VAL 0x00000009 SQ_OP3_INST_CNDNE_64
+VAL 0x0000000a SQ_OP3_INST_FMA_64
+VAL 0x0000000b SQ_OP3_INST_LERP_UINT
+VAL 0x0000000c SQ_OP3_INST_BIT_ALIGN_INT
+VAL 0x0000000d SQ_OP3_INST_BYTE_ALIGN_INT
+VAL 0x0000000e SQ_OP3_INST_SAD_ACCUM_UINT
+VAL 0x0000000f SQ_OP3_INST_SAD_ACCUM_HI_UINT
+VAL 0x00000010 SQ_OP3_INST_MULADD_UINT24
+VAL 0x00000011 SQ_OP3_INST_LDS_IDX_OP
+VAL 0x00000014 SQ_OP3_INST_MULADD
+VAL 0x00000015 SQ_OP3_INST_MULADD_M2
+VAL 0x00000016 SQ_OP3_INST_MULADD_M4
+VAL 0x00000017 SQ_OP3_INST_MULADD_D2
+VAL 0x00000018 SQ_OP3_INST_MULADD_IEEE
+VAL 0x00000019 SQ_OP3_INST_CNDE
+VAL 0x0000001a SQ_OP3_INST_CNDGT
+VAL 0x0000001b SQ_OP3_INST_CNDGE
+VAL 0x0000001c SQ_OP3_INST_CNDE_INT
+VAL 0x0000001d SQ_OP3_INST_CNDGT_INT
+VAL 0x0000001e SQ_OP3_INST_CNDGE_INT
+VAL 0x0000001f SQ_OP3_INST_MUL_LIT
+FLD 18 0x00000007 0x00000000 0 BANK_SWIZZLE
+VAL 0x00000000 SQ_ALU_VEC_012
+VAL 0x00000001 SQ_ALU_VEC_021
+VAL 0x00000002 SQ_ALU_VEC_120
+VAL 0x00000003 SQ_ALU_VEC_102
+VAL 0x00000004 SQ_ALU_VEC_201
+VAL 0x00000005 SQ_ALU_VEC_210
+FLD 21 0x0000003f 0x00000000 0 LDS_OP
+VAL 0x00000000 SQ_DS_INST_ADD
+VAL 0x00000001 SQ_DS_INST_SUB
+VAL 0x00000002 SQ_DS_INST_RSUB
+VAL 0x00000003 SQ_DS_INST_INC
+VAL 0x00000004 SQ_DS_INST_DEC
+VAL 0x00000005 SQ_DS_INST_MIN_INT
+VAL 0x00000006 SQ_DS_INST_MAX_INT
+VAL 0x00000007 SQ_DS_INST_MIN_UINT
+VAL 0x00000008 SQ_DS_INST_MAX_UINT
+VAL 0x00000009 SQ_DS_INST_AND
+VAL 0x0000000a SQ_DS_INST_OR
+VAL 0x0000000b SQ_DS_INST_XOR
+VAL 0x0000000c SQ_DS_INST_MSKOR
+VAL 0x0000000d SQ_DS_INST_WRITE
+VAL 0x0000000e SQ_DS_INST_WRITE_REL
+VAL 0x0000000f SQ_DS_INST_WRITE2
+VAL 0x00000010 SQ_DS_INST_CMP_STORE
+VAL 0x00000011 SQ_DS_INST_CMP_STORE_SPF
+VAL 0x00000012 SQ_DS_INST_BYTE_WRITE
+VAL 0x00000013 SQ_DS_INST_SHORT_WRITE
+VAL 0x00000020 SQ_DS_INST_ADD_RET
+VAL 0x00000021 SQ_DS_INST_SUB_RET
+VAL 0x00000022 SQ_DS_INST_RSUB_RET
+VAL 0x00000023 SQ_DS_INST_INC_RET
+VAL 0x00000024 SQ_DS_INST_DEC_RET
+VAL 0x00000025 SQ_DS_INST_MIN_INT_RET
+VAL 0x00000026 SQ_DS_INST_MAX_INT_RET
+VAL 0x00000027 SQ_DS_INST_MIN_UINT_RET
+VAL 0x00000028 SQ_DS_INST_MAX_UINT_RET
+VAL 0x00000029 SQ_DS_INST_AND_RET
+VAL 0x0000002a SQ_DS_INST_OR_RET
+VAL 0x0000002b SQ_DS_INST_XOR_RET
+VAL 0x0000002c SQ_DS_INST_MSKOR_RET
+VAL 0x0000002d SQ_DS_INST_XCHG_RET
+VAL 0x0000002e SQ_DS_INST_XCHG_REL_RET
+VAL 0x0000002f SQ_DS_INST_XCHG2_RET
+VAL 0x00000030 SQ_DS_INST_CMP_XCHG_RET
+VAL 0x00000031 SQ_DS_INST_CMP_XCHG_SPF_RET
+VAL 0x00000032 SQ_DS_INST_READ_RET
+VAL 0x00000033 SQ_DS_INST_READ_REL_RET
+VAL 0x00000034 SQ_DS_INST_READ2_RET
+VAL 0x00000035 SQ_DS_INST_READWRITE_RET
+VAL 0x00000036 SQ_DS_INST_BYTE_READ_RET
+VAL 0x00000037 SQ_DS_INST_UBYTE_READ_RET
+VAL 0x00000038 SQ_DS_INST_SHORT_READ_RET
+VAL 0x00000039 SQ_DS_INST_USHORT_READ_RET
+VAL 0x0000003f SQ_DS_INST_ATOMIC_ORDERED_ALLOC_RET
+FLD 27 0x00000001 0x00000000 0 IDX_OFFSET_0
+FLD 28 0x00000001 0x00000000 0 IDX_OFFSET_2
+FLD 29 0x00000003 0x00000000 0 DST_CHAN
+VAL 0x00000000 CHAN_X
+VAL 0x00000001 CHAN_Y
+VAL 0x00000002 CHAN_Z
+VAL 0x00000003 CHAN_W
+FLD 31 0x00000001 0x00000000 0 IDX_OFFSET_3
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_CF_ENCODING_WORD1
+FLD 28 0x00000003 0x00000000 0 ENCODING
+VAL 0x00000000 SQ_CF_ENCODING_INST_CF
+VAL 0x00000001 SQ_CF_ENCODING_INST_ALLOC_EXPORT
+VAL 0x00000002 SQ_CF_ENCODING_INST_ALU0
+VAL 0x00000003 SQ_CF_ENCODING_INST_ALU1
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_ALU_WORD0
+FLD  0 0x000001ff 0x00000000 0 SRC0_SEL
+VAL 0x000000db SQ_ALU_SRC_LDS_OQ_A
+VAL 0x000000dc SQ_ALU_SRC_LDS_OQ_B
+VAL 0x000000dd SQ_ALU_SRC_LDS_OQ_A_POP
+VAL 0x000000de SQ_ALU_SRC_LDS_OQ_B_POP
+VAL 0x000000df SQ_ALU_SRC_LDS_DIRECT_A
+VAL 0x000000e0 SQ_ALU_SRC_LDS_DIRECT_B
+VAL 0x000000e3 SQ_ALU_SRC_TIME_HI
+VAL 0x000000e4 SQ_ALU_SRC_TIME_LO
+VAL 0x000000e5 SQ_ALU_SRC_MASK_HI
+VAL 0x000000e6 SQ_ALU_SRC_MASK_LO
+VAL 0x000000e7 SQ_ALU_SRC_HW_WAVE_ID
+VAL 0x000000e8 SQ_ALU_SRC_SIMD_ID
+VAL 0x000000e9 SQ_ALU_SRC_SE_ID
+VAL 0x000000ea SQ_ALU_SRC_HW_THREADGRP_ID
+VAL 0x000000eb SQ_ALU_SRC_WAVE_ID_IN_GRP
+VAL 0x000000ec SQ_ALU_SRC_NUM_THREADGRP_WAVES
+VAL 0x000000ed SQ_ALU_SRC_HW_ALU_ODD
+VAL 0x000000ee SQ_ALU_SRC_LOOP_IDX
+VAL 0x000000f0 SQ_ALU_SRC_PARAM_BASE_ADDR
+VAL 0x000000f1 SQ_ALU_SRC_NEW_PRIM_MASK
+VAL 0x000000f2 SQ_ALU_SRC_PRIM_MASK_HI
+VAL 0x000000f3 SQ_ALU_SRC_PRIM_MASK_LO
+VAL 0x000000f4 SQ_ALU_SRC_1_DBL_L
+VAL 0x000000f5 SQ_ALU_SRC_1_DBL_M
+VAL 0x000000f6 SQ_ALU_SRC_0_5_DBL_L
+VAL 0x000000f7 SQ_ALU_SRC_0_5_DBL_M
+VAL 0x000000f8 SQ_ALU_SRC_0
+VAL 0x000000f9 SQ_ALU_SRC_1
+VAL 0x000000fa SQ_ALU_SRC_1_INT
+VAL 0x000000fb SQ_ALU_SRC_M_1_INT
+VAL 0x000000fc SQ_ALU_SRC_0_5
+VAL 0x000000fd SQ_ALU_SRC_LITERAL
+VAL 0x000000fe SQ_ALU_SRC_PV
+VAL 0x000000ff SQ_ALU_SRC_PS
+FLD  9 0x00000001 0x00000000 0 SRC0_REL
+FLD 10 0x00000003 0x00000000 0 SRC0_CHAN
+VAL 0x00000000 SQ_CHAN_X
+VAL 0x00000001 SQ_CHAN_Y
+VAL 0x00000002 SQ_CHAN_Z
+VAL 0x00000003 SQ_CHAN_W
+FLD 12 0x00000001 0x00000000 0 SRC0_NEG
+FLD 13 0x000001ff 0x00000000 0 SRC1_SEL
+VAL 0x000000db SQ_ALU_SRC_LDS_OQ_A
+VAL 0x000000dc SQ_ALU_SRC_LDS_OQ_B
+VAL 0x000000dd SQ_ALU_SRC_LDS_OQ_A_POP
+VAL 0x000000de SQ_ALU_SRC_LDS_OQ_B_POP
+VAL 0x000000df SQ_ALU_SRC_LDS_DIRECT_A
+VAL 0x000000e0 SQ_ALU_SRC_LDS_DIRECT_B
+VAL 0x000000e3 SQ_ALU_SRC_TIME_HI
+VAL 0x000000e4 SQ_ALU_SRC_TIME_LO
+VAL 0x000000e5 SQ_ALU_SRC_MASK_HI
+VAL 0x000000e6 SQ_ALU_SRC_MASK_LO
+VAL 0x000000e7 SQ_ALU_SRC_HW_WAVE_ID
+VAL 0x000000e8 SQ_ALU_SRC_SIMD_ID
+VAL 0x000000e9 SQ_ALU_SRC_SE_ID
+VAL 0x000000ea SQ_ALU_SRC_HW_THREADGRP_ID
+VAL 0x000000eb SQ_ALU_SRC_WAVE_ID_IN_GRP
+VAL 0x000000ec SQ_ALU_SRC_NUM_THREADGRP_WAVES
+VAL 0x000000ed SQ_ALU_SRC_HW_ALU_ODD
+VAL 0x000000ee SQ_ALU_SRC_LOOP_IDX
+VAL 0x000000f0 SQ_ALU_SRC_PARAM_BASE_ADDR
+VAL 0x000000f1 SQ_ALU_SRC_NEW_PRIM_MASK
+VAL 0x000000f2 SQ_ALU_SRC_PRIM_MASK_HI
+VAL 0x000000f3 SQ_ALU_SRC_PRIM_MASK_LO
+VAL 0x000000f4 SQ_ALU_SRC_1_DBL_L
+VAL 0x000000f5 SQ_ALU_SRC_1_DBL_M
+VAL 0x000000f6 SQ_ALU_SRC_0_5_DBL_L
+VAL 0x000000f7 SQ_ALU_SRC_0_5_DBL_M
+VAL 0x000000f8 SQ_ALU_SRC_0
+VAL 0x000000f9 SQ_ALU_SRC_1
+VAL 0x000000fa SQ_ALU_SRC_1_INT
+VAL 0x000000fb SQ_ALU_SRC_M_1_INT
+VAL 0x000000fc SQ_ALU_SRC_0_5
+VAL 0x000000fd SQ_ALU_SRC_LITERAL
+VAL 0x000000fe SQ_ALU_SRC_PV
+VAL 0x000000ff SQ_ALU_SRC_PS
+FLD 22 0x00000001 0x00000000 0 SRC1_REL
+FLD 23 0x00000003 0x00000000 0 SRC1_CHAN
+VAL 0x00000000 SQ_CHAN_X
+VAL 0x00000001 SQ_CHAN_Y
+VAL 0x00000002 SQ_CHAN_Z
+VAL 0x00000003 SQ_CHAN_W
+FLD 25 0x00000001 0x00000000 0 SRC1_NEG
+FLD 26 0x00000007 0x00000000 0 INDEX_MODE
+VAL 0x00000000 SQ_INDEX_AR_X
+VAL 0x00000004 SQ_INDEX_LOOP
+VAL 0x00000005 SQ_INDEX_GLOBAL
+VAL 0x00000006 SQ_INDEX_GLOBAL_AR_X
+FLD 29 0x00000003 0x00000000 0 PRED_SEL
+VAL 0x00000000 SQ_PRED_SEL_OFF
+VAL 0x00000002 SQ_PRED_SEL_ZERO
+VAL 0x00000003 SQ_PRED_SEL_ONE
+FLD 31 0x00000001 0x00000000 0 LAST
+REG 0x00008dfc 0x00000103 0x00000000 32    0    1    0 SQ_MEM_RD_WORD1
+FLD  0 0x0000007f 0x00000000 0 DST_GPR
+FLD  7 0x00000001 0x00000000 0 DST_REL
+FLD  9 0x00000007 0x00000000 0 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 12 0x00000007 0x00000000 0 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 15 0x00000007 0x00000000 0 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 18 0x00000007 0x00000000 0 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+VAL 0x00000007 SQ_SEL_MASK
+FLD 22 0x0000003f 0x00000000 0 DATA_FORMAT
+VAL 0x00000000 FMT_INVALID
+VAL 0x00000001 FMT_8
+VAL 0x00000002 FMT_4_4
+VAL 0x00000003 FMT_3_3_2
+VAL 0x00000005 FMT_16
+VAL 0x00000006 FMT_16_FLOAT
+VAL 0x00000007 FMT_8_8
+VAL 0x00000008 FMT_5_6_5
+VAL 0x00000009 FMT_6_5_5
+VAL 0x0000000a FMT_1_5_5_5
+VAL 0x0000000b FMT_4_4_4_4
+VAL 0x0000000c FMT_5_5_5_1
+VAL 0x0000000d FMT_32
+VAL 0x0000000e FMT_32_FLOAT
+VAL 0x0000000f FMT_16_16
+VAL 0x00000010 FMT_16_16_FLOAT
+VAL 0x00000011 FMT_8_24
+VAL 0x00000012 FMT_8_24_FLOAT
+VAL 0x00000013 FMT_24_8
+VAL 0x00000014 FMT_24_8_FLOAT
+VAL 0x00000015 FMT_10_11_11
+VAL 0x00000016 FMT_10_11_11_FLOAT
+VAL 0x00000017 FMT_11_11_10
+VAL 0x00000018 FMT_11_11_10_FLOAT
+VAL 0x00000019 FMT_2_10_10_10
+VAL 0x0000001a FMT_8_8_8_8
+VAL 0x0000001b FMT_10_10_10_2
+VAL 0x0000001c FMT_X24_8_32_FLOAT
+VAL 0x0000001d FMT_32_32
+VAL 0x0000001e FMT_32_32_FLOAT
+VAL 0x0000001f FMT_16_16_16_16
+VAL 0x00000020 FMT_16_16_16_16_FLOAT
+VAL 0x00000022 FMT_32_32_32_32
+VAL 0x00000023 FMT_32_32_32_32_FLOAT
+VAL 0x00000025 FMT_1
+VAL 0x00000027 FMT_GB_GR
+VAL 0x00000028 FMT_BG_RG
+VAL 0x00000029 FMT_32_AS_8
+VAL 0x0000002a FMT_32_AS_8_8
+VAL 0x0000002b FMT_5_9_9_9_SHAREDEXP
+VAL 0x0000002c FMT_8_8_8
+VAL 0x0000002d FMT_16_16_16
+VAL 0x0000002e FMT_16_16_16_FLOAT
+VAL 0x0000002f FMT_32_32_32
+VAL 0x00000030 FMT_32_32_32_FLOAT
+FLD 28 0x00000003 0x00000000 0 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 30 0x00000001 0x00000000 0 FORMAT_COMP_ALL
+FLD 31 0x00000001 0x00000000 0 SRF_MODE_ALL
+REG 0x00008e10 0x00000103 0x00000000 32    0    1    0 SQ_LSTMP_RING_BASE
+REG 0x00008e14 0x00000103 0x00000000 32    0    1    0 SQ_LSTMP_RING_SIZE
+REG 0x00008e18 0x00000103 0x00000000 32    0    1    0 SQ_HSTMP_RING_BASE
+REG 0x00008e1c 0x00000103 0x00000000 32    0    1    0 SQ_HSTMP_RING_SIZE
+REG 0x00008e2c 0x00000103 0x00000000 32    0    1    0 SQ_LDS_RESOURCE_MGMT
+REG 0x00028000 0x00000104 0x00000003 32    0    1    0 DB_RENDER_CONTROL
+FLD  0 0x00000001 0x00000000 0 DEPTH_CLEAR_ENABLE
+FLD  1 0x00000001 0x00000000 0 STENCIL_CLEAR_ENABLE
+FLD  2 0x00000001 0x00000000 0 DEPTH_COPY
+FLD  3 0x00000001 0x00000000 0 STENCIL_COPY
+FLD  4 0x00000001 0x00000000 0 RESUMMARIZE_ENABLE
+FLD  5 0x00000001 0x00000000 0 STENCIL_COMPRESS_DISABLE
+FLD  6 0x00000001 0x00000000 0 DEPTH_COMPRESS_DISABLE
+FLD  7 0x00000001 0x00000000 0 COPY_CENTROID
+FLD  8 0x00000007 0x00000000 0 COPY_SAMPLE
+FLD 12 0x00000001 0x00000000 0 COLOR_DISABLE
+REG 0x00028004 0x00000104 0x00000003 32    0    1    0 DB_COUNT_CONTROL
+FLD  0 0x00000001 0x00000000 0 ZPASS_INCREMENT_DISABLE
+FLD  1 0x00000001 0x00000000 0 PERFECT_ZPASS_COUNTS
+REG 0x00028008 0x00000104 0x00000003 32    0    1    0 DB_DEPTH_VIEW
+FLD  0 0x000007ff 0x00000000 0 SLICE_START
+FLD 13 0x000007ff 0x00000000 0 SLICE_MAX
+FLD 24 0x00000001 0x00000000 0 Z_READ_ONLY
+FLD 25 0x00000001 0x00000000 0 STENCIL_READ_ONLY
+REG 0x0002800c 0x00000104 0x00000003 32    0    1    0 DB_RENDER_OVERRIDE
+FLD  0 0x00000003 0x00000000 0 FORCE_HIZ_ENABLE
+VAL 0x00000000 FORCE_OFF
+VAL 0x00000001 FORCE_ENABLE
+VAL 0x00000002 FORCE_DISABLE
+VAL 0x00000003 FORCE_RESERVED
+FLD  2 0x00000003 0x00000000 0 FORCE_HIS_ENABLE0
+VAL 0x00000000 FORCE_OFF
+VAL 0x00000001 FORCE_ENABLE
+VAL 0x00000002 FORCE_DISABLE
+VAL 0x00000003 FORCE_RESERVED
+FLD  4 0x00000003 0x00000000 0 FORCE_HIS_ENABLE1
+VAL 0x00000000 FORCE_OFF
+VAL 0x00000001 FORCE_ENABLE
+VAL 0x00000002 FORCE_DISABLE
+VAL 0x00000003 FORCE_RESERVED
+FLD  6 0x00000001 0x00000000 0 FORCE_SHADER_Z_ORDER
+FLD  7 0x00000001 0x00000000 0 FAST_Z_DISABLE
+FLD  8 0x00000001 0x00000000 0 FAST_STENCIL_DISABLE
+FLD  9 0x00000001 0x00000000 0 NOOP_CULL_DISABLE
+FLD 10 0x00000001 0x00000000 0 FORCE_COLOR_KILL
+FLD 11 0x00000001 0x00000000 0 FORCE_Z_READ
+FLD 12 0x00000001 0x00000000 0 FORCE_STENCIL_READ
+FLD 13 0x00000003 0x00000000 0 FORCE_FULL_Z_RANGE
+VAL 0x00000000 FORCE_OFF
+VAL 0x00000001 FORCE_ENABLE
+VAL 0x00000002 FORCE_DISABLE
+VAL 0x00000003 FORCE_RESERVED
+FLD 15 0x00000001 0x00000000 0 FORCE_QC_SMASK_CONFLICT
+FLD 16 0x00000001 0x00000000 0 DISABLE_VIEWPORT_CLAMP
+FLD 17 0x00000001 0x00000000 0 IGNORE_SC_ZRANGE
+FLD 18 0x00000001 0x00000000 0 DISABLE_FULLY_COVERED
+FLD 19 0x00000003 0x00000000 0 FORCE_Z_LIMIT_SUMM
+VAL 0x00000000 FORCE_SUMM_OFF
+VAL 0x00000001 FORCE_SUMM_MINZ
+VAL 0x00000002 FORCE_SUMM_MAXZ
+VAL 0x00000003 FORCE_SUMM_BOTH
+FLD 21 0x0000001f 0x00000000 0 MAX_TILES_IN_DTT
+FLD 26 0x00000001 0x00000000 0 DISABLE_PIXEL_RATE_TILES
+FLD 27 0x00000001 0x00000000 0 FORCE_Z_DIRTY
+FLD 28 0x00000001 0x00000000 0 FORCE_STENCIL_DIRTY
+FLD 29 0x00000001 0x00000000 0 FORCE_Z_VALID
+FLD 30 0x00000001 0x00000000 0 FORCE_STENCIL_VALID
+FLD 31 0x00000001 0x00000000 0 PRESERVE_COMPRESSION
+REG 0x00028010 0x00000104 0x00000003 32    0    1    0 DB_RENDER_OVERRIDE2
+FLD  0 0x00000003 0x00000000 0 PARTIAL_SQUAD_LAUNCH_CONTROL
+VAL 0x00000000 PSLC_AUTO
+VAL 0x00000001 PSLC_ON_HANG_ONLY
+VAL 0x00000002 PSLC_ASAP
+VAL 0x00000003 PSLC_COUNTDOWN
+FLD  2 0x00000007 0x00000000 0 PARTIAL_SQUAD_LAUNCH_COUNTDOWN
+FLD  5 0x00000001 0x00000000 0 DISABLE_ZMASK_EXPCLEAR_OPTIMIZATIO
+REG 0x00028014 0x00000104 0x00000003 32    0    1    0 DB_HTILE_DATA_BASE
+REG 0x00028028 0x00000104 0x00000003 32    0    1    0 DB_STENCIL_CLEAR
+FLD  0 0x000000ff 0x00000000 0 CLEAR
+FLD 16 0x000000ff 0x00000000 0 MIN
+REG 0x0002802c 0x00000104 0x00000003 32    0    1    0 DB_DEPTH_CLEAR
+REG 0x00028030 0x00000104 0x00000006 32    0    1    0 PA_SC_SCREEN_SCISSOR_TL
+FLD  0 0x0000ffff 0x00000000 0 TL_X
+FLD 16 0x0000ffff 0x00000000 0 TL_Y
+REG 0x00028034 0x00000104 0x00000006 32    0    1    0 PA_SC_SCREEN_SCISSOR_BR
+FLD  0 0x0000ffff 0x00000000 0 BR_X
+FLD 16 0x0000ffff 0x00000000 0 BR_Y
+REG 0x00028040 0x00000104 0x00000003 32    0    1    0 DB_Z_INFO
+FLD  0 0x00000003 0x00000000 0 FORMAT
+VAL 0x00000000 Z_INVALID
+VAL 0x00000001 Z_16
+VAL 0x00000002 Z_24
+VAL 0x00000003 Z_32_FLOAT
+FLD  4 0x0000000f 0x00000000 0 ARRAY_MODE
+VAL 0x00000000 ARRAY_LINEAR_GENERAL
+VAL 0x00000001 ARRAY_LINEAR_ALIGNED
+VAL 0x00000002 ARRAY_1D_TILED_THIN1
+VAL 0x00000004 ARRAY_2D_TILED_THIN1
+FLD  8 0x00000007 0x00000000 0 TILE_SPLIT
+VAL 0x00000000 ADDR_SURF_TILE_SPLIT_64B
+VAL 0x00000001 ADDR_SURF_TILE_SPLIT_128B
+VAL 0x00000002 ADDR_SURF_TILE_SPLIT_256B
+VAL 0x00000003 ADDR_SURF_TILE_SPLIT_512B
+VAL 0x00000004 ADDR_SURF_TILE_SPLIT_1KB
+VAL 0x00000005 ADDR_SURF_TILE_SPLIT_2KB
+VAL 0x00000006 ADDR_SURF_TILE_SPLIT_4KB
+FLD 12 0x00000003 0x00000000 0 NUM_BANKS
+VAL 0x00000000 ADDR_SURF_2_BANK
+VAL 0x00000001 ADDR_SURF_4_BANK
+VAL 0x00000002 ADDR_SURF_8_BANK
+VAL 0x00000003 ADDR_SURF_16_BANK
+FLD 16 0x00000003 0x00000000 0 BANK_WIDTH
+VAL 0x00000000 ADDR_SURF_BANK_WIDTH_1
+VAL 0x00000001 ADDR_SURF_BANK_WIDTH_2
+VAL 0x00000002 ADDR_SURF_BANK_WIDTH_4
+VAL 0x00000003 ADDR_SURF_BANK_WIDTH_8
+FLD 20 0x00000003 0x00000000 0 BANK_HEIGHT
+VAL 0x00000000 ADDR_SURF_BANK_HEIGHT_1
+VAL 0x00000001 ADDR_SURF_BANK_HEIGHT_2
+VAL 0x00000002 ADDR_SURF_BANK_HEIGHT_4
+VAL 0x00000003 ADDR_SURF_BANK_HEIGHT_8
+FLD 24 0x00000003 0x00000000 0 MACRO_TILE_ASPECT
+VAL 0x00000000 ADDR_SURF_MACRO_ASPECT_1
+VAL 0x00000001 ADDR_SURF_MACRO_ASPECT_2
+VAL 0x00000002 ADDR_SURF_MACRO_ASPECT_4
+VAL 0x00000003 ADDR_SURF_MACRO_ASPECT_8
+FLD 27 0x00000001 0x00000000 0 ALLOW_EXPCLEAR
+FLD 28 0x00000001 0x00000000 0 READ_SIZE
+FLD 29 0x00000001 0x00000000 0 TILE_SURFACE_ENABLE
+FLD 30 0x00000001 0x00000000 0 TILE_COMPACT
+FLD 31 0x00000001 0x00000000 0 ZRANGE_PRECISION
+REG 0x00028044 0x00000104 0x00000003 32    0    1    0 DB_STENCIL_INFO
+FLD  0 0x00000001 0x00000000 0 FORMAT
+FLD  8 0x00000007 0x00000000 0 TILE_SPLIT
+VAL 0x00000000 ADDR_SURF_TILE_SPLIT_64B
+VAL 0x00000001 ADDR_SURF_TILE_SPLIT_128B
+VAL 0x00000002 ADDR_SURF_TILE_SPLIT_256B
+VAL 0x00000003 ADDR_SURF_TILE_SPLIT_512B
+VAL 0x00000004 ADDR_SURF_TILE_SPLIT_1KB
+VAL 0x00000005 ADDR_SURF_TILE_SPLIT_2KB
+VAL 0x00000006 ADDR_SURF_TILE_SPLIT_4KB
+REG 0x00028048 0x00000104 0x00000003 32    0    1    0 DB_Z_READ_BASE
+REG 0x0002804c 0x00000104 0x00000003 32    0    1    0 DB_STENCIL_READ_BASE
+REG 0x00028050 0x00000104 0x00000003 32    0    1    0 DB_Z_WRITE_BASE
+REG 0x00028054 0x00000104 0x00000003 32    0    1    0 DB_STENCIL_WRITE_BASE
+REG 0x00028058 0x00000104 0x00000003 32    0    1    0 DB_DEPTH_SIZE
+FLD  0 0x000007ff 0x00000000 0 PITCH_TILE_MAX
+FLD 11 0x000007ff 0x00000000 0 HEIGHT_TILE_MAX
+REG 0x0002805c 0x00000104 0x00000003 32    0    1    0 DB_DEPTH_SLICE
+FLD  0 0x003fffff 0x00000000 0 SLICE_TILE_MAX
+REG 0x00028140 0x00000104 0x00000000 32    0   16    4 SQ_ALU_CONST_BUFFER_SIZE_PS
+FLD  0 0x000001ff 0x00000000 0 DATA
+REG 0x00028180 0x00000104 0x00000000 32    0   16    4 SQ_ALU_CONST_BUFFER_SIZE_VS
+FLD  0 0x000001ff 0x00000000 0 DATA
+REG 0x000281c0 0x00000104 0x00000000 32    0   16    4 SQ_ALU_CONST_BUFFER_SIZE_GS
+FLD  0 0x000001ff 0x00000000 0 DATA
+REG 0x00028200 0x00000104 0x00000006 32    0    1    0 PA_SC_WINDOW_OFFSET
+FLD  0 0x0000ffff 0x00000000 0 WINDOW_X_OFFSET
+FLD 16 0x0000ffff 0x00000000 0 WINDOW_Y_OFFSET
+REG 0x00028204 0x00000104 0x00000006 32    0    1    0 PA_SC_WINDOW_SCISSOR_TL
+FLD  0 0x00007fff 0x00000000 0 TL_X
+FLD 16 0x00007fff 0x00000000 0 TL_Y
+FLD 31 0x00000001 0x00000000 0 WINDOW_OFFSET_DISABLE
+REG 0x00028208 0x00000104 0x00000006 32    0    1    0 PA_SC_WINDOW_SCISSOR_BR
+FLD  0 0x00007fff 0x00000000 0 BR_X
+FLD 16 0x00007fff 0x00000000 0 BR_Y
+REG 0x0002820c 0x00000104 0x00000006 32    0    1    0 PA_SC_CLIPRECT_RULE
+FLD  0 0x0000ffff 0x00000000 0 CLIP_RULE
+REG 0x00028210 0x00000104 0x00000006 32    0    4    8 PA_SC_CLIPRECT_TL
+FLD  0 0x00007fff 0x00000000 0 TL_X
+FLD 16 0x00007fff 0x00000000 0 TL_Y
+REG 0x00028214 0x00000104 0x00000006 32    0    4    8 PA_SC_CLIPRECT_BR
+FLD  0 0x00007fff 0x00000000 0 BR_X
+FLD 16 0x00007fff 0x00000000 0 BR_Y
+REG 0x00028230 0x00000104 0x00000006 32    0    1    0 PA_SC_EDGERULE
+FLD  0 0x0000000f 0x00000000 0 ER_TRI
+FLD  4 0x0000000f 0x00000000 0 ER_POINT
+FLD  8 0x0000000f 0x00000000 0 ER_RECT
+FLD 12 0x0000003f 0x00000000 0 ER_LINE_LR
+FLD 18 0x0000003f 0x00000000 0 ER_LINE_RL
+FLD 24 0x0000000f 0x00000000 0 ER_LINE_TB
+FLD 28 0x0000000f 0x00000000 0 ER_LINE_BT
+REG 0x00028234 0x00000104 0x00000006 32    0    1    0 PA_SU_HARDWARE_SCREEN_OFFSET
+FLD  0 0x0000001f 0x00000000 0 HW_SCREEN_OFFSET_X
+FLD  8 0x0000001f 0x00000000 0 HW_SCREEN_OFFSET_Y
+REG 0x00028238 0x00000104 0x00000001 32    0    1    0 CB_TARGET_MASK
+FLD  0 0x0000000f 0x00000000 0 TARGET0_ENABLE
+FLD  4 0x0000000f 0x00000000 0 TARGET1_ENABLE
+FLD  8 0x0000000f 0x00000000 0 TARGET2_ENABLE
+FLD 12 0x0000000f 0x00000000 0 TARGET3_ENABLE
+FLD 16 0x0000000f 0x00000000 0 TARGET4_ENABLE
+FLD 20 0x0000000f 0x00000000 0 TARGET5_ENABLE
+FLD 24 0x0000000f 0x00000000 0 TARGET6_ENABLE
+FLD 28 0x0000000f 0x00000000 0 TARGET7_ENABLE
+REG 0x0002823c 0x00000104 0x00000001 32    0    1    0 CB_SHADER_MASK
+FLD  0 0x0000000f 0x00000000 0 OUTPUT0_ENABLE
+FLD  4 0x0000000f 0x00000000 0 OUTPUT1_ENABLE
+FLD  8 0x0000000f 0x00000000 0 OUTPUT2_ENABLE
+FLD 12 0x0000000f 0x00000000 0 OUTPUT3_ENABLE
+FLD 16 0x0000000f 0x00000000 0 OUTPUT4_ENABLE
+FLD 20 0x0000000f 0x00000000 0 OUTPUT5_ENABLE
+FLD 24 0x0000000f 0x00000000 0 OUTPUT6_ENABLE
+FLD 28 0x0000000f 0x00000000 0 OUTPUT7_ENABLE
+REG 0x00028240 0x00000104 0x00000006 32    0    1    0 PA_SC_GENERIC_SCISSOR_TL
+FLD  0 0x00007fff 0x00000000 0 TL_X
+FLD 16 0x00007fff 0x00000000 0 TL_Y
+FLD 31 0x00000001 0x00000000 0 WINDOW_OFFSET_DISABLE
+REG 0x00028244 0x00000104 0x00000006 32    0    1    0 PA_SC_GENERIC_SCISSOR_BR
+FLD  0 0x00007fff 0x00000000 0 BR_X
+FLD 16 0x00007fff 0x00000000 0 BR_Y
+REG 0x00028250 0x00000104 0x00000006 32    0   16    8 PA_SC_VPORT_SCISSOR_TL
+FLD  0 0x00007fff 0x00000000 0 TL_X
+FLD 16 0x00007fff 0x00000000 0 TL_Y
+FLD 31 0x00000001 0x00000000 0 WINDOW_OFFSET_DISABLE
+REG 0x00028254 0x00000104 0x00000006 32    0   16    8 PA_SC_VPORT_SCISSOR_BR
+FLD  0 0x00007fff 0x00000000 0 BR_X
+FLD 16 0x00007fff 0x00000000 0 BR_Y
+REG 0x000282d0 0x00000104 0x00000006 32    0   16    8 PA_SC_VPORT_ZMIN
+REG 0x000282d4 0x00000104 0x00000006 32    0   16    8 PA_SC_VPORT_ZMAX
+REG 0x00028350 0x00000104 0x0000000d 32    0    1    0 SX_MISC
+FLD  0 0x00000001 0x00000000 0 MULTIPASS
+REG 0x00028380 0x00000104 0x00000000 32    0   32    4 SQ_VTX_SEMANTIC
+FLD  0 0x000000ff 0x00000000 0 SEMANTIC_ID
+REG 0x00028400 0x00000104 0x00000010 32    0    1    0 VGT_MAX_VTX_INDX
+REG 0x00028404 0x00000104 0x00000010 32    0    1    0 VGT_MIN_VTX_INDX
+REG 0x00028408 0x00000104 0x00000010 32    0    1    0 VGT_INDX_OFFSET
+REG 0x0002840c 0x00000104 0x00000010 32    0    1    0 VGT_MULTI_PRIM_IB_RESET_INDX
+REG 0x00028410 0x00000104 0x0000000d 32    0    1    0 SX_ALPHA_TEST_CONTROL
+FLD  0 0x00000007 0x00000000 0 ALPHA_FUNC
+VAL 0x00000000 REF_NEVER
+VAL 0x00000001 REF_LESS
+VAL 0x00000002 REF_EQUAL
+VAL 0x00000003 REF_LEQUAL
+VAL 0x00000004 REF_GREATER
+VAL 0x00000005 REF_NOTEQUAL
+VAL 0x00000006 REF_GEQUAL
+VAL 0x00000007 REF_ALWAYS
+FLD  3 0x00000001 0x00000000 0 ALPHA_TEST_ENABLE
+FLD  8 0x00000001 0x00000000 0 ALPHA_TEST_BYPASS
+REG 0x00028414 0x00000104 0x00000001 32    0    1    0 CB_BLEND_RED
+REG 0x00028418 0x00000104 0x00000001 32    0    1    0 CB_BLEND_GREEN
+REG 0x0002841c 0x00000104 0x00000001 32    0    1    0 CB_BLEND_BLUE
+REG 0x00028420 0x00000104 0x00000001 32    0    1    0 CB_BLEND_ALPHA
+REG 0x00028430 0x00000104 0x00000003 32    0    1    0 DB_STENCILREFMASK
+FLD  0 0x000000ff 0x00000000 0 STENCILREF
+FLD  8 0x000000ff 0x00000000 0 STENCILMASK
+FLD 16 0x000000ff 0x00000000 0 STENCILWRITEMASK
+REG 0x00028434 0x00000104 0x00000003 32    0    1    0 DB_STENCILREFMASK_BF
+FLD  0 0x000000ff 0x00000000 0 STENCILREF_BF
+FLD  8 0x000000ff 0x00000000 0 STENCILMASK_BF
+FLD 16 0x000000ff 0x00000000 0 STENCILWRITEMASK_BF
+REG 0x00028438 0x00000104 0x0000000d 32    0    1    0 SX_ALPHA_REF
+REG 0x0002843c 0x00000104 0x00000006 32    0   16   24 PA_CL_VPORT_XSCALE
+REG 0x00028440 0x00000104 0x00000006 32    0   16   24 PA_CL_VPORT_XOFFSET
+REG 0x00028444 0x00000104 0x00000006 32    0   16   24 PA_CL_VPORT_YSCALE
+REG 0x00028448 0x00000104 0x00000006 32    0   16   24 PA_CL_VPORT_YOFFSET
+REG 0x0002844c 0x00000104 0x00000006 32    0   16   24 PA_CL_VPORT_ZSCALE
+REG 0x00028450 0x00000104 0x00000006 32    0   16   24 PA_CL_VPORT_ZOFFSET
+REG 0x000285bc 0x00000104 0x00000006 32    0    6   16 PA_CL_UCP_X
+REG 0x000285c0 0x00000104 0x00000006 32    0    6   16 PA_CL_UCP_Y
+REG 0x000285c4 0x00000104 0x00000006 32    0    6   16 PA_CL_UCP_Z
+REG 0x000285c8 0x00000104 0x00000006 32    0    6   16 PA_CL_UCP_W
+REG 0x0002861c 0x00000104 0x00000000 32    0   10    4 SPI_VS_OUT_ID
+FLD  0 0x000000ff 0x00000000 0 SEMANTIC_0
+FLD  8 0x000000ff 0x00000000 0 SEMANTIC_1
+FLD 16 0x000000ff 0x00000000 0 SEMANTIC_2
+FLD 24 0x000000ff 0x00000000 0 SEMANTIC_3
+REG 0x00028644 0x00000104 0x00000000 32    0   32    4 SPI_PS_INPUT_CNTL
+FLD  0 0x000000ff 0x00000000 0 SEMANTIC
+FLD  8 0x00000003 0x00000000 0 DEFAULT_VAL
+VAL 0x00000000 X_0_0F
+FLD 10 0x00000001 0x00000000 0 FLAT_SHADE
+FLD 13 0x0000000f 0x00000000 0 CYL_WRAP
+FLD 17 0x00000001 0x00000000 0 PT_SPRITE_TEX
+REG 0x000286c4 0x00000104 0x00000000 32    0    1    0 SPI_VS_OUT_CONFIG
+FLD  0 0x00000001 0x00000000 0 VS_PER_COMPONENT
+FLD  1 0x0000001f 0x00000000 0 VS_EXPORT_COUNT
+FLD  8 0x00000001 0x00000000 0 VS_EXPORTS_FOG
+FLD  9 0x0000001f 0x00000000 0 VS_OUT_FOG_VEC_ADDR
+REG 0x000286cc 0x00000104 0x00000000 32    0    1    0 SPI_PS_IN_CONTROL_0
+FLD  0 0x0000003f 0x00000000 0 NUM_INTERP
+FLD  8 0x00000001 0x00000000 0 POSITION_ENA
+FLD  9 0x00000001 0x00000000 0 POSITION_CENTROID
+FLD 10 0x0000001f 0x00000000 0 POSITION_ADDR
+FLD 15 0x0000000f 0x00000000 0 PARAM_GEN
+FLD 28 0x00000001 0x00000000 0 PERSP_GRADIENT_ENA
+FLD 29 0x00000001 0x00000000 0 LINEAR_GRADIENT_ENA
+FLD 30 0x00000001 0x00000000 0 POSITION_SAMPLE
+REG 0x000286d0 0x00000104 0x00000000 32    0    1    0 SPI_PS_IN_CONTROL_1
+FLD  8 0x00000001 0x00000000 0 FRONT_FACE_ENA
+FLD 11 0x00000001 0x00000000 0 FRONT_FACE_ALL_BITS
+FLD 12 0x0000001f 0x00000000 0 FRONT_FACE_ADDR
+FLD 17 0x0000007f 0x00000000 0 FOG_ADDR
+FLD 24 0x00000001 0x00000000 0 FIXED_PT_POSITION_ENA
+FLD 25 0x0000001f 0x00000000 0 FIXED_PT_POSITION_ADDR
+FLD 30 0x00000001 0x00000000 0 POSITION_ULC
+REG 0x000286d4 0x00000104 0x00000000 32    0    1    0 SPI_INTERP_CONTROL_0
+FLD  0 0x00000001 0x00000000 0 FLAT_SHADE_ENA
+FLD  1 0x00000001 0x00000000 0 PNT_SPRITE_ENA
+FLD  2 0x00000007 0x00000000 0 PNT_SPRITE_OVRD_X
+VAL 0x00000000 SPI_PNT_SPRITE_SEL_0
+VAL 0x00000001 SPI_PNT_SPRITE_SEL_1
+VAL 0x00000002 SPI_PNT_SPRITE_SEL_S
+VAL 0x00000003 SPI_PNT_SPRITE_SEL_T
+VAL 0x00000004 SPI_PNT_SPRITE_SEL_NONE
+FLD  5 0x00000007 0x00000000 0 PNT_SPRITE_OVRD_Y
+VAL 0x00000000 SPI_PNT_SPRITE_SEL_0
+VAL 0x00000001 SPI_PNT_SPRITE_SEL_1
+VAL 0x00000002 SPI_PNT_SPRITE_SEL_S
+VAL 0x00000003 SPI_PNT_SPRITE_SEL_T
+VAL 0x00000004 SPI_PNT_SPRITE_SEL_NONE
+FLD  8 0x00000007 0x00000000 0 PNT_SPRITE_OVRD_Z
+VAL 0x00000000 SPI_PNT_SPRITE_SEL_0
+VAL 0x00000001 SPI_PNT_SPRITE_SEL_1
+VAL 0x00000002 SPI_PNT_SPRITE_SEL_S
+VAL 0x00000003 SPI_PNT_SPRITE_SEL_T
+VAL 0x00000004 SPI_PNT_SPRITE_SEL_NONE
+FLD 11 0x00000007 0x00000000 0 PNT_SPRITE_OVRD_W
+VAL 0x00000000 SPI_PNT_SPRITE_SEL_0
+VAL 0x00000001 SPI_PNT_SPRITE_SEL_1
+VAL 0x00000002 SPI_PNT_SPRITE_SEL_S
+VAL 0x00000003 SPI_PNT_SPRITE_SEL_T
+VAL 0x00000004 SPI_PNT_SPRITE_SEL_NONE
+FLD 14 0x00000001 0x00000000 0 PNT_SPRITE_TOP_1
+REG 0x000286d8 0x00000104 0x00000000 32    0    1    0 SPI_INPUT_Z
+FLD  0 0x00000001 0x00000000 0 PROVIDE_Z_TO_SPI
+REG 0x000286dc 0x00000104 0x00000000 32    0    1    0 SPI_FOG_CNTL
+FLD  0 0x00000001 0x00000000 0 PASS_FOG_THROUGH_PS
+REG 0x000286e0 0x00000104 0x00000000 32    0    1    0 SPI_BARYC_CNTL
+FLD  0 0x00000003 0x00000000 0 PERSP_CENTER_ENA
+VAL 0x00000000 X_OFF
+VAL 0x00000001 X_ON_AT_CENTER
+VAL 0x00000002 X_ON_AT_CENTROID
+FLD  4 0x00000003 0x00000000 0 PERSP_CENTROID_ENA
+VAL 0x00000000 X_OFF
+VAL 0x00000001 X_ON_AT_CENTROID
+VAL 0x00000002 X_ON_AT_CENTER
+FLD  8 0x00000003 0x00000000 0 PERSP_SAMPLE_ENA
+VAL 0x00000000 X_OFF
+FLD 12 0x00000003 0x00000000 0 PERSP_PULL_MODEL_ENA
+VAL 0x00000000 X_OFF
+FLD 16 0x00000003 0x00000000 0 LINEAR_CENTER_ENA
+VAL 0x00000000 X_OFF
+VAL 0x00000001 X_ON_AT_CENTER
+VAL 0x00000002 X_ON_AT_CENTROID
+FLD 20 0x00000003 0x00000000 0 LINEAR_CENTROID_ENA
+VAL 0x00000000 X_OFF
+VAL 0x00000001 X_ON_AT_CENTROID
+VAL 0x00000002 X_ON_AT_CENTER
+FLD 24 0x00000003 0x00000000 0 LINEAR_SAMPLE_ENA
+VAL 0x00000000 X_OFF
+REG 0x000286e4 0x00000104 0x00000000 32    0    1    0 SPI_PS_IN_CONTROL_2
+FLD  0 0x000000ff 0x00000000 0 LINE_STIPPLE_TEX_ADDR
+FLD  8 0x00000001 0x00000000 0 LINE_STIPPLE_TEX_ENA
+REG 0x00028780 0x00000104 0x00000001 32    0    8    4 CB_BLEND_CONTROL
+FLD  0 0x0000001f 0x00000000 0 COLOR_SRCBLEND
+VAL 0x00000000 BLEND_ZERO
+VAL 0x00000001 BLEND_ONE
+VAL 0x00000002 BLEND_SRC_COLOR
+VAL 0x00000003 BLEND_ONE_MINUS_SRC_COLOR
+VAL 0x00000004 BLEND_SRC_ALPHA
+VAL 0x00000005 BLEND_ONE_MINUS_SRC_ALPHA
+VAL 0x00000006 BLEND_DST_ALPHA
+VAL 0x00000007 BLEND_ONE_MINUS_DST_ALPHA
+VAL 0x00000008 BLEND_DST_COLOR
+VAL 0x00000009 BLEND_ONE_MINUS_DST_COLOR
+VAL 0x0000000a BLEND_SRC_ALPHA_SATURATE
+VAL 0x0000000b BLEND_BOTH_SRC_ALPHA
+VAL 0x0000000c BLEND_BOTH_INV_SRC_ALPHA
+VAL 0x0000000d BLEND_CONSTANT_COLOR
+VAL 0x0000000e BLEND_ONE_MINUS_CONSTANT_COLOR
+VAL 0x0000000f BLEND_SRC1_COLOR
+VAL 0x00000010 BLEND_INV_SRC1_COLOR
+VAL 0x00000011 BLEND_SRC1_ALPHA
+VAL 0x00000012 BLEND_INV_SRC1_ALPHA
+VAL 0x00000013 BLEND_CONSTANT_ALPHA
+VAL 0x00000014 BLEND_ONE_MINUS_CONSTANT_ALPHA
+FLD  5 0x00000007 0x00000000 0 COLOR_COMB_FCN
+VAL 0x00000000 COMB_DST_PLUS_SRC
+VAL 0x00000001 COMB_SRC_MINUS_DST
+VAL 0x00000002 COMB_MIN_DST_SRC
+VAL 0x00000003 COMB_MAX_DST_SRC
+VAL 0x00000004 COMB_DST_MINUS_SRC
+FLD  8 0x0000001f 0x00000000 0 COLOR_DESTBLEND
+VAL 0x00000000 BLEND_ZERO
+VAL 0x00000001 BLEND_ONE
+VAL 0x00000002 BLEND_SRC_COLOR
+VAL 0x00000003 BLEND_ONE_MINUS_SRC_COLOR
+VAL 0x00000004 BLEND_SRC_ALPHA
+VAL 0x00000005 BLEND_ONE_MINUS_SRC_ALPHA
+VAL 0x00000006 BLEND_DST_ALPHA
+VAL 0x00000007 BLEND_ONE_MINUS_DST_ALPHA
+VAL 0x00000008 BLEND_DST_COLOR
+VAL 0x00000009 BLEND_ONE_MINUS_DST_COLOR
+VAL 0x0000000a BLEND_SRC_ALPHA_SATURATE
+VAL 0x0000000b BLEND_BOTH_SRC_ALPHA
+VAL 0x0000000c BLEND_BOTH_INV_SRC_ALPHA
+VAL 0x0000000d BLEND_CONSTANT_COLOR
+VAL 0x0000000e BLEND_ONE_MINUS_CONSTANT_COLOR
+VAL 0x0000000f BLEND_SRC1_COLOR
+VAL 0x00000010 BLEND_INV_SRC1_COLOR
+VAL 0x00000011 BLEND_SRC1_ALPHA
+VAL 0x00000012 BLEND_INV_SRC1_ALPHA
+VAL 0x00000013 BLEND_CONSTANT_ALPHA
+VAL 0x00000014 BLEND_ONE_MINUS_CONSTANT_ALPHA
+FLD 16 0x0000001f 0x00000000 0 ALPHA_SRCBLEND
+VAL 0x00000000 BLEND_ZERO
+VAL 0x00000001 BLEND_ONE
+VAL 0x00000002 BLEND_SRC_COLOR
+VAL 0x00000003 BLEND_ONE_MINUS_SRC_COLOR
+VAL 0x00000004 BLEND_SRC_ALPHA
+VAL 0x00000005 BLEND_ONE_MINUS_SRC_ALPHA
+VAL 0x00000006 BLEND_DST_ALPHA
+VAL 0x00000007 BLEND_ONE_MINUS_DST_ALPHA
+VAL 0x00000008 BLEND_DST_COLOR
+VAL 0x00000009 BLEND_ONE_MINUS_DST_COLOR
+VAL 0x0000000a BLEND_SRC_ALPHA_SATURATE
+VAL 0x0000000b BLEND_BOTH_SRC_ALPHA
+VAL 0x0000000c BLEND_BOTH_INV_SRC_ALPHA
+VAL 0x0000000d BLEND_CONSTANT_COLOR
+VAL 0x0000000e BLEND_ONE_MINUS_CONSTANT_COLOR
+VAL 0x0000000f BLEND_SRC1_COLOR
+VAL 0x00000010 BLEND_INV_SRC1_COLOR
+VAL 0x00000011 BLEND_SRC1_ALPHA
+VAL 0x00000012 BLEND_INV_SRC1_ALPHA
+VAL 0x00000013 BLEND_CONSTANT_ALPHA
+VAL 0x00000014 BLEND_ONE_MINUS_CONSTANT_ALPHA
+FLD 21 0x00000007 0x00000000 0 ALPHA_COMB_FCN
+VAL 0x00000000 COMB_DST_PLUS_SRC
+VAL 0x00000001 COMB_SRC_MINUS_DST
+VAL 0x00000002 COMB_MIN_DST_SRC
+VAL 0x00000003 COMB_MAX_DST_SRC
+VAL 0x00000004 COMB_DST_MINUS_SRC
+FLD 24 0x0000001f 0x00000000 0 ALPHA_DESTBLEND
+VAL 0x00000000 BLEND_ZERO
+VAL 0x00000001 BLEND_ONE
+VAL 0x00000002 BLEND_SRC_COLOR
+VAL 0x00000003 BLEND_ONE_MINUS_SRC_COLOR
+VAL 0x00000004 BLEND_SRC_ALPHA
+VAL 0x00000005 BLEND_ONE_MINUS_SRC_ALPHA
+VAL 0x00000006 BLEND_DST_ALPHA
+VAL 0x00000007 BLEND_ONE_MINUS_DST_ALPHA
+VAL 0x00000008 BLEND_DST_COLOR
+VAL 0x00000009 BLEND_ONE_MINUS_DST_COLOR
+VAL 0x0000000a BLEND_SRC_ALPHA_SATURATE
+VAL 0x0000000b BLEND_BOTH_SRC_ALPHA
+VAL 0x0000000c BLEND_BOTH_INV_SRC_ALPHA
+VAL 0x0000000d BLEND_CONSTANT_COLOR
+VAL 0x0000000e BLEND_ONE_MINUS_CONSTANT_COLOR
+VAL 0x0000000f BLEND_SRC1_COLOR
+VAL 0x00000010 BLEND_INV_SRC1_COLOR
+VAL 0x00000011 BLEND_SRC1_ALPHA
+VAL 0x00000012 BLEND_INV_SRC1_ALPHA
+VAL 0x00000013 BLEND_CONSTANT_ALPHA
+VAL 0x00000014 BLEND_ONE_MINUS_CONSTANT_ALPHA
+FLD 29 0x00000001 0x00000000 0 SEPARATE_ALPHA_BLEND
+FLD 30 0x00000001 0x00000000 0 ENABLE
+REG 0x000287d4 0x00000104 0x00000006 32    0    1    0 PA_CL_POINT_X_RAD
+REG 0x000287d8 0x00000104 0x00000006 32    0    1    0 PA_CL_POINT_Y_RAD
+REG 0x000287dc 0x00000104 0x00000006 32    0    1    0 PA_CL_POINT_SIZE
+REG 0x000287e0 0x00000104 0x00000006 32    0    1    0 PA_CL_POINT_CULL_RAD
+REG 0x000287e4 0x00000104 0x00000010 32    0    1    0 VGT_DMA_BASE_HI
+FLD  0 0x000000ff 0x00000000 0 BASE_ADDR
+REG 0x000287e8 0x00000104 0x00000010 32    0    1    0 VGT_DMA_BASE
+REG 0x000287f0 0x00000104 0x00000010 32    0    1    0 VGT_DRAW_INITIATOR
+FLD  0 0x00000003 0x00000000 0 SOURCE_SELECT
+VAL 0x00000000 DI_SRC_SEL_DMA
+VAL 0x00000001 DI_SRC_SEL_IMMEDIATE
+VAL 0x00000002 DI_SRC_SEL_AUTO_INDEX
+VAL 0x00000003 DI_SRC_SEL_RESERVED
+FLD  2 0x00000003 0x00000000 0 MAJOR_MODE
+VAL 0x00000000 DI_MAJOR_MODE_0
+VAL 0x00000001 DI_MAJOR_MODE_1
+FLD  5 0x00000001 0x00000000 0 NOT_EOP
+FLD  6 0x00000001 0x00000000 0 USE_OPAQUE
+REG 0x000287f4 0x00000104 0x00000010 32    0    1    0 VGT_IMMED_DATA
+REG 0x000287f8 0x00000104 0x00000010 32    0    1    0 VGT_EVENT_ADDRESS_REG
+FLD  0 0x0fffffff 0x00000000 0 ADDRESS_LOW
+REG 0x00028800 0x00000104 0x00000003 32    0    1    0 DB_DEPTH_CONTROL
+FLD  0 0x00000001 0x00000000 0 STENCIL_ENABLE
+FLD  1 0x00000001 0x00000000 0 Z_ENABLE
+FLD  2 0x00000001 0x00000000 0 Z_WRITE_ENABLE
+FLD  4 0x00000007 0x00000000 0 ZFUNC
+VAL 0x00000000 FRAG_NEVER
+VAL 0x00000001 FRAG_LESS
+VAL 0x00000002 FRAG_EQUAL
+VAL 0x00000003 FRAG_LEQUAL
+VAL 0x00000004 FRAG_GREATER
+VAL 0x00000005 FRAG_NOTEQUAL
+VAL 0x00000006 FRAG_GEQUAL
+VAL 0x00000007 FRAG_ALWAYS
+FLD  7 0x00000001 0x00000000 0 BACKFACE_ENABLE
+FLD  8 0x00000007 0x00000000 0 STENCILFUNC
+VAL 0x00000000 REF_NEVER
+VAL 0x00000001 REF_LESS
+VAL 0x00000002 REF_EQUAL
+VAL 0x00000003 REF_LEQUAL
+VAL 0x00000004 REF_GREATER
+VAL 0x00000005 REF_NOTEQUAL
+VAL 0x00000006 REF_GEQUAL
+VAL 0x00000007 REF_ALWAYS
+FLD 11 0x00000007 0x00000000 0 STENCILFAIL
+VAL 0x00000000 STENCIL_KEEP
+VAL 0x00000001 STENCIL_ZERO
+VAL 0x00000002 STENCIL_REPLACE
+VAL 0x00000003 STENCIL_INCR_CLAMP
+VAL 0x00000004 STENCIL_DECR_CLAMP
+VAL 0x00000005 STENCIL_INVERT
+VAL 0x00000006 STENCIL_INCR_WRAP
+VAL 0x00000007 STENCIL_DECR_WRAP
+FLD 14 0x00000007 0x00000000 0 STENCILZPASS
+VAL 0x00000000 STENCIL_KEEP
+VAL 0x00000001 STENCIL_ZERO
+VAL 0x00000002 STENCIL_REPLACE
+VAL 0x00000003 STENCIL_INCR_CLAMP
+VAL 0x00000004 STENCIL_DECR_CLAMP
+VAL 0x00000005 STENCIL_INVERT
+VAL 0x00000006 STENCIL_INCR_WRAP
+VAL 0x00000007 STENCIL_DECR_WRAP
+FLD 17 0x00000007 0x00000000 0 STENCILZFAIL
+VAL 0x00000000 STENCIL_KEEP
+VAL 0x00000001 STENCIL_ZERO
+VAL 0x00000002 STENCIL_REPLACE
+VAL 0x00000003 STENCIL_INCR_CLAMP
+VAL 0x00000004 STENCIL_DECR_CLAMP
+VAL 0x00000005 STENCIL_INVERT
+VAL 0x00000006 STENCIL_INCR_WRAP
+VAL 0x00000007 STENCIL_DECR_WRAP
+FLD 20 0x00000007 0x00000000 0 STENCILFUNC_BF
+VAL 0x00000000 REF_NEVER
+VAL 0x00000001 REF_LESS
+VAL 0x00000002 REF_EQUAL
+VAL 0x00000003 REF_LEQUAL
+VAL 0x00000004 REF_GREATER
+VAL 0x00000005 REF_NOTEQUAL
+VAL 0x00000006 REF_GEQUAL
+VAL 0x00000007 REF_ALWAYS
+FLD 23 0x00000007 0x00000000 0 STENCILFAIL_BF
+VAL 0x00000000 STENCIL_KEEP
+VAL 0x00000001 STENCIL_ZERO
+VAL 0x00000002 STENCIL_REPLACE
+VAL 0x00000003 STENCIL_INCR_CLAMP
+VAL 0x00000004 STENCIL_DECR_CLAMP
+VAL 0x00000005 STENCIL_INVERT
+VAL 0x00000006 STENCIL_INCR_WRAP
+VAL 0x00000007 STENCIL_DECR_WRAP
+FLD 26 0x00000007 0x00000000 0 STENCILZPASS_BF
+VAL 0x00000000 STENCIL_KEEP
+VAL 0x00000001 STENCIL_ZERO
+VAL 0x00000002 STENCIL_REPLACE
+VAL 0x00000003 STENCIL_INCR_CLAMP
+VAL 0x00000004 STENCIL_DECR_CLAMP
+VAL 0x00000005 STENCIL_INVERT
+VAL 0x00000006 STENCIL_INCR_WRAP
+VAL 0x00000007 STENCIL_DECR_WRAP
+FLD 29 0x00000007 0x00000000 0 STENCILZFAIL_BF
+VAL 0x00000000 STENCIL_KEEP
+VAL 0x00000001 STENCIL_ZERO
+VAL 0x00000002 STENCIL_REPLACE
+VAL 0x00000003 STENCIL_INCR_CLAMP
+VAL 0x00000004 STENCIL_DECR_CLAMP
+VAL 0x00000005 STENCIL_INVERT
+VAL 0x00000006 STENCIL_INCR_WRAP
+VAL 0x00000007 STENCIL_DECR_WRAP
+REG 0x00028808 0x00000104 0x00000001 32    0    1    0 CB_COLOR_CONTROL
+FLD  3 0x00000001 0x00000000 0 DEGAMMA_ENABLE
+FLD  4 0x00000007 0x00000000 0 MODE
+VAL 0x00000000 CB_DISABLE
+VAL 0x00000001 CB_NORMAL
+VAL 0x00000002 CB_ELIMINATE_FAST_CLEAR
+VAL 0x00000003 CB_RESOLVE
+VAL 0x00000004 CB_DECOMPRESS
+VAL 0x00000005 CB_FMASK_DECOMPRESS
+FLD 16 0x000000ff 0x00000000 0 ROP3
+REG 0x0002880c 0x00000104 0x00000003 32    0    1    0 DB_SHADER_CONTROL
+FLD  0 0x00000001 0x00000000 0 Z_EXPORT_ENABLE
+FLD  1 0x00000001 0x00000000 0 STENCIL_REF_EXPORT_ENABLE
+FLD  4 0x00000003 0x00000000 0 Z_ORDER
+VAL 0x00000000 LATE_Z
+VAL 0x00000001 EARLY_Z_THEN_LATE_Z
+VAL 0x00000002 RE_Z
+VAL 0x00000003 EARLY_Z_THEN_RE_Z
+FLD  6 0x00000001 0x00000000 0 KILL_ENABLE
+FLD  7 0x00000001 0x00000000 0 COVERAGE_TO_MASK_ENABLE
+FLD  8 0x00000001 0x00000000 0 MASK_EXPORT_ENABLE
+FLD  9 0x00000001 0x00000000 0 DUAL_EXPORT_ENABLE
+FLD 10 0x00000001 0x00000000 0 EXEC_ON_HIER_FAIL
+FLD 11 0x00000001 0x00000000 0 EXEC_ON_NOOP
+FLD 12 0x00000001 0x00000000 0 ALPHA_TO_MASK_DISABLE
+FLD 13 0x00000003 0x00000000 0 DB_SOURCE_FORMAT
+VAL 0x00000000 EXPORT_DB_FULL
+VAL 0x00000001 EXPORT_DB_FOUR16
+VAL 0x00000002 EXPORT_DB_TWO
+FLD 15 0x00000001 0x00000000 0 DEPTH_BEFORE_SHADER
+FLD 16 0x00000003 0x00000000 0 CONSERVATIVE_Z_EXPORT
+VAL 0x00000000 EXPORT_ANY_Z
+VAL 0x00000001 EXPORT_LESS_THAN_Z
+VAL 0x00000002 EXPORT_GREATER_THAN_Z
+VAL 0x00000003 EXPORT_RESERVED
+REG 0x00028810 0x00000104 0x00000006 32    0    1    0 PA_CL_CLIP_CNTL
+FLD  0 0x00000001 0x00000000 0 UCP_ENA_0
+FLD  1 0x00000001 0x00000000 0 UCP_ENA_1
+FLD  2 0x00000001 0x00000000 0 UCP_ENA_2
+FLD  3 0x00000001 0x00000000 0 UCP_ENA_3
+FLD  4 0x00000001 0x00000000 0 UCP_ENA_4
+FLD  5 0x00000001 0x00000000 0 UCP_ENA_5
+FLD 13 0x00000001 0x00000000 0 PS_UCP_Y_SCALE_NEG
+FLD 14 0x00000003 0x00000000 0 PS_UCP_MODE
+FLD 16 0x00000001 0x00000000 0 CLIP_DISABLE
+FLD 17 0x00000001 0x00000000 0 UCP_CULL_ONLY_ENA
+FLD 18 0x00000001 0x00000000 0 BOUNDARY_EDGE_FLAG_ENA
+FLD 19 0x00000001 0x00000000 0 DX_CLIP_SPACE_DEF
+FLD 20 0x00000001 0x00000000 0 DIS_CLIP_ERR_DETECT
+FLD 21 0x00000001 0x00000000 0 VTX_KILL_OR
+FLD 22 0x00000001 0x00000000 0 DX_RASTERIZATION_KILL
+FLD 24 0x00000001 0x00000000 0 DX_LINEAR_ATTR_CLIP_ENA
+FLD 25 0x00000001 0x00000000 0 VTE_VPORT_PROVOKE_DISABLE
+FLD 26 0x00000001 0x00000000 0 ZCLIP_NEAR_DISABLE
+FLD 27 0x00000001 0x00000000 0 ZCLIP_FAR_DISABLE
+REG 0x00028814 0x00000104 0x00000006 32    0    1    0 PA_SU_SC_MODE_CNTL
+FLD  0 0x00000001 0x00000000 0 CULL_FRONT
+FLD  1 0x00000001 0x00000000 0 CULL_BACK
+FLD  2 0x00000001 0x00000000 0 FACE
+FLD  3 0x00000003 0x00000000 0 POLY_MODE
+VAL 0x00000000 X_DISABLE_POLY_MODE
+VAL 0x00000001 X_DUAL_MODE
+FLD  5 0x00000007 0x00000000 0 POLYMODE_FRONT_PTYPE
+VAL 0x00000000 X_DRAW_POINTS
+VAL 0x00000001 X_DRAW_LINES
+VAL 0x00000002 X_DRAW_TRIANGLES
+FLD  8 0x00000007 0x00000000 0 POLYMODE_BACK_PTYPE
+VAL 0x00000000 X_DRAW_POINTS
+VAL 0x00000001 X_DRAW_LINES
+VAL 0x00000002 X_DRAW_TRIANGLES
+FLD 11 0x00000001 0x00000000 0 POLY_OFFSET_FRONT_ENABLE
+FLD 12 0x00000001 0x00000000 0 POLY_OFFSET_BACK_ENABLE
+FLD 13 0x00000001 0x00000000 0 POLY_OFFSET_PARA_ENABLE
+FLD 16 0x00000001 0x00000000 0 VTX_WINDOW_OFFSET_ENABLE
+FLD 19 0x00000001 0x00000000 0 PROVOKING_VTX_LAST
+FLD 20 0x00000001 0x00000000 0 PERSP_CORR_DIS
+FLD 21 0x00000001 0x00000000 0 MULTI_PRIM_IB_ENA
+REG 0x00028818 0x00000104 0x00000006 32    0    1    0 PA_CL_VTE_CNTL
+FLD  0 0x00000001 0x00000000 0 VPORT_X_SCALE_ENA
+FLD  1 0x00000001 0x00000000 0 VPORT_X_OFFSET_ENA
+FLD  2 0x00000001 0x00000000 0 VPORT_Y_SCALE_ENA
+FLD  3 0x00000001 0x00000000 0 VPORT_Y_OFFSET_ENA
+FLD  4 0x00000001 0x00000000 0 VPORT_Z_SCALE_ENA
+FLD  5 0x00000001 0x00000000 0 VPORT_Z_OFFSET_ENA
+FLD  8 0x00000001 0x00000000 0 VTX_XY_FMT
+FLD  9 0x00000001 0x00000000 0 VTX_Z_FMT
+FLD 10 0x00000001 0x00000000 0 VTX_W0_FMT
+REG 0x0002881c 0x00000104 0x00000006 32    0    1    0 PA_CL_VS_OUT_CNTL
+FLD  0 0x00000001 0x00000000 0 CLIP_DIST_ENA_0
+FLD  1 0x00000001 0x00000000 0 CLIP_DIST_ENA_1
+FLD  2 0x00000001 0x00000000 0 CLIP_DIST_ENA_2
+FLD  3 0x00000001 0x00000000 0 CLIP_DIST_ENA_3
+FLD  4 0x00000001 0x00000000 0 CLIP_DIST_ENA_4
+FLD  5 0x00000001 0x00000000 0 CLIP_DIST_ENA_5
+FLD  6 0x00000001 0x00000000 0 CLIP_DIST_ENA_6
+FLD  7 0x00000001 0x00000000 0 CLIP_DIST_ENA_7
+FLD  8 0x00000001 0x00000000 0 CULL_DIST_ENA_0
+FLD  9 0x00000001 0x00000000 0 CULL_DIST_ENA_1
+FLD 10 0x00000001 0x00000000 0 CULL_DIST_ENA_2
+FLD 11 0x00000001 0x00000000 0 CULL_DIST_ENA_3
+FLD 12 0x00000001 0x00000000 0 CULL_DIST_ENA_4
+FLD 13 0x00000001 0x00000000 0 CULL_DIST_ENA_5
+FLD 14 0x00000001 0x00000000 0 CULL_DIST_ENA_6
+FLD 15 0x00000001 0x00000000 0 CULL_DIST_ENA_7
+FLD 16 0x00000001 0x00000000 0 USE_VTX_POINT_SIZE
+FLD 17 0x00000001 0x00000000 0 USE_VTX_EDGE_FLAG
+FLD 18 0x00000001 0x00000000 0 USE_VTX_RENDER_TARGET_INDX
+FLD 19 0x00000001 0x00000000 0 USE_VTX_VIEWPORT_INDX
+FLD 20 0x00000001 0x00000000 0 USE_VTX_KILL_FLAG
+FLD 21 0x00000001 0x00000000 0 VS_OUT_MISC_VEC_ENA
+FLD 22 0x00000001 0x00000000 0 VS_OUT_CCDIST0_VEC_ENA
+FLD 23 0x00000001 0x00000000 0 VS_OUT_CCDIST1_VEC_ENA
+REG 0x00028820 0x00000104 0x00000006 32    0    1    0 PA_CL_NANINF_CNTL
+FLD  0 0x00000001 0x00000000 0 VTE_XY_INF_DISCARD
+FLD  1 0x00000001 0x00000000 0 VTE_Z_INF_DISCARD
+FLD  2 0x00000001 0x00000000 0 VTE_W_INF_DISCARD
+FLD  3 0x00000001 0x00000000 0 VTE_0XNANINF_IS_0
+FLD  4 0x00000001 0x00000000 0 VTE_XY_NAN_RETAIN
+FLD  5 0x00000001 0x00000000 0 VTE_Z_NAN_RETAIN
+FLD  6 0x00000001 0x00000000 0 VTE_W_NAN_RETAIN
+FLD  7 0x00000001 0x00000000 0 VTE_W_RECIP_NAN_IS_0
+FLD  8 0x00000001 0x00000000 0 VS_XY_NAN_TO_INF
+FLD  9 0x00000001 0x00000000 0 VS_XY_INF_RETAIN
+FLD 10 0x00000001 0x00000000 0 VS_Z_NAN_TO_INF
+FLD 11 0x00000001 0x00000000 0 VS_Z_INF_RETAIN
+FLD 12 0x00000001 0x00000000 0 VS_W_NAN_TO_INF
+FLD 13 0x00000001 0x00000000 0 VS_W_INF_RETAIN
+FLD 14 0x00000001 0x00000000 0 VS_CLIP_DIST_INF_DISCARD
+FLD 20 0x00000001 0x00000000 0 VTE_NO_OUTPUT_NEG_0
+REG 0x00028824 0x00000104 0x00000006 32    0    1    0 PA_SU_LINE_STIPPLE_CNTL
+FLD  0 0x00000003 0x00000000 0 LINE_STIPPLE_RESET
+FLD  2 0x00000001 0x00000000 0 EXPAND_FULL_LENGTH
+FLD  3 0x00000001 0x00000000 0 FRACTIONAL_ACCUM
+FLD  4 0x00000001 0x00000000 0 DIAMOND_ADJUST
+REG 0x00028828 0x00000104 0x00000006 32    0    1    0 PA_SU_LINE_STIPPLE_SCALE
+REG 0x0002882c 0x00000104 0x00000006 32    0    1    0 PA_SU_PRIM_FILTER_CNTL
+FLD  0 0x00000001 0x00000000 0 TRIANGLE_FILTER_DISABLE
+FLD  1 0x00000001 0x00000000 0 LINE_FILTER_DISABLE
+FLD  2 0x00000001 0x00000000 0 POINT_FILTER_DISABLE
+FLD  3 0x00000001 0x00000000 0 RECTANGLE_FILTER_DISABLE
+FLD  4 0x00000001 0x00000000 0 TRIANGLE_EXPAND_ENA
+FLD  5 0x00000001 0x00000000 0 LINE_EXPAND_ENA
+FLD  6 0x00000001 0x00000000 0 POINT_EXPAND_ENA
+FLD  7 0x00000001 0x00000000 0 RECTANGLE_EXPAND_ENA
+FLD  8 0x000000ff 0x00000000 0 PRIM_EXPAND_CONSTANT
+REG 0x00028830 0x00000104 0x00000000 32    0    1    0 SQ_LSTMP_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 0 ITEMSIZE
+REG 0x00028834 0x00000104 0x00000000 32    0    1    0 SQ_HSTMP_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 0 ITEMSIZE
+REG 0x00028838 0x00000104 0x00000000 32    0    1    0 SQ_DYN_GPR_RESOURCE_LIMIT_1
+REG 0x00028840 0x00000104 0x00000000 32    0    1    0 SQ_PGM_START_PS
+REG 0x00028844 0x00000104 0x00000000 32    0    1    0 SQ_PGM_RESOURCES_PS
+FLD  0 0x000000ff 0x00000000 0 NUM_GPRS
+FLD  8 0x000000ff 0x00000000 0 STACK_SIZE
+FLD 21 0x00000001 0x00000000 0 DX10_CLAMP
+FLD 28 0x00000001 0x00000000 0 UNCACHED_FIRST_INST
+FLD 31 0x00000001 0x00000000 0 CLAMP_CONSTS
+REG 0x00028848 0x00000104 0x00000000 32    0    1    0 SQ_PGM_RESOURCES_2_PS
+FLD  0 0x00000003 0x00000000 0 SINGLE_ROUND
+VAL 0x00000000 SQ_ROUND_NEAREST_EVEN
+VAL 0x00000001 SQ_ROUND_PLUS_INFINITY
+VAL 0x00000002 SQ_ROUND_MINUS_INFINITY
+VAL 0x00000003 SQ_ROUND_TO_ZERO
+FLD  2 0x00000003 0x00000000 0 DOUBLE_ROUND
+VAL 0x00000000 SQ_ROUND_NEAREST_EVEN
+VAL 0x00000001 SQ_ROUND_PLUS_INFINITY
+VAL 0x00000002 SQ_ROUND_MINUS_INFINITY
+VAL 0x00000003 SQ_ROUND_TO_ZERO
+FLD  4 0x00000001 0x00000000 0 ALLOW_SINGLE_DENORM_IN
+FLD  5 0x00000001 0x00000000 0 ALLOW_SINGLE_DENORM_OUT
+FLD  6 0x00000001 0x00000000 0 ALLOW_DOUBLE_DENORM_IN
+FLD  7 0x00000001 0x00000000 0 ALLOW_DOUBLE_DENORM_OUT
+REG 0x0002884c 0x00000104 0x00000000 32    0    1    0 SQ_PGM_EXPORTS_PS
+FLD  0 0x0000001f 0x00000000 0 EXPORT_MODE
+REG 0x0002885c 0x00000104 0x00000000 32    0    1    0 SQ_PGM_START_VS
+REG 0x00028860 0x00000104 0x00000000 32    0    1    0 SQ_PGM_RESOURCES_VS
+FLD  0 0x000000ff 0x00000000 0 NUM_GPRS
+FLD  8 0x000000ff 0x00000000 0 STACK_SIZE
+FLD 21 0x00000001 0x00000000 0 DX10_CLAMP
+FLD 28 0x00000001 0x00000000 0 UNCACHED_FIRST_INST
+REG 0x00028864 0x00000104 0x00000000 32    0    1    0 SQ_PGM_RESOURCES_2_VS
+FLD  0 0x00000003 0x00000000 0 SINGLE_ROUND
+VAL 0x00000000 SQ_ROUND_NEAREST_EVEN
+VAL 0x00000001 SQ_ROUND_PLUS_INFINITY
+VAL 0x00000002 SQ_ROUND_MINUS_INFINITY
+VAL 0x00000003 SQ_ROUND_TO_ZERO
+FLD  2 0x00000003 0x00000000 0 DOUBLE_ROUND
+VAL 0x00000000 SQ_ROUND_NEAREST_EVEN
+VAL 0x00000001 SQ_ROUND_PLUS_INFINITY
+VAL 0x00000002 SQ_ROUND_MINUS_INFINITY
+VAL 0x00000003 SQ_ROUND_TO_ZERO
+FLD  4 0x00000001 0x00000000 0 ALLOW_SINGLE_DENORM_IN
+FLD  5 0x00000001 0x00000000 0 ALLOW_SINGLE_DENORM_OUT
+FLD  6 0x00000001 0x00000000 0 ALLOW_DOUBLE_DENORM_IN
+FLD  7 0x00000001 0x00000000 0 ALLOW_DOUBLE_DENORM_OUT
+REG 0x00028874 0x00000104 0x00000000 32    0    1    0 SQ_PGM_START_GS
+REG 0x00028878 0x00000104 0x00000000 32    0    1    0 SQ_PGM_RESOURCES_GS
+FLD  0 0x000000ff 0x00000000 0 NUM_GPRS
+FLD  8 0x000000ff 0x00000000 0 STACK_SIZE
+FLD 21 0x00000001 0x00000000 0 DX10_CLAMP
+FLD 28 0x00000001 0x00000000 0 UNCACHED_FIRST_INST
+REG 0x0002887c 0x00000104 0x00000000 32    0    1    0 SQ_PGM_RESOURCES_2_GS
+FLD  0 0x00000003 0x00000000 0 SINGLE_ROUND
+VAL 0x00000000 SQ_ROUND_NEAREST_EVEN
+VAL 0x00000001 SQ_ROUND_PLUS_INFINITY
+VAL 0x00000002 SQ_ROUND_MINUS_INFINITY
+VAL 0x00000003 SQ_ROUND_TO_ZERO
+FLD  2 0x00000003 0x00000000 0 DOUBLE_ROUND
+VAL 0x00000000 SQ_ROUND_NEAREST_EVEN
+VAL 0x00000001 SQ_ROUND_PLUS_INFINITY
+VAL 0x00000002 SQ_ROUND_MINUS_INFINITY
+VAL 0x00000003 SQ_ROUND_TO_ZERO
+FLD  4 0x00000001 0x00000000 0 ALLOW_SINGLE_DENORM_IN
+FLD  5 0x00000001 0x00000000 0 ALLOW_SINGLE_DENORM_OUT
+FLD  6 0x00000001 0x00000000 0 ALLOW_DOUBLE_DENORM_IN
+FLD  7 0x00000001 0x00000000 0 ALLOW_DOUBLE_DENORM_OUT
+REG 0x0002888c 0x00000104 0x00000000 32    0    1    0 SQ_PGM_START_ES
+REG 0x00028890 0x00000104 0x00000000 32    0    1    0 SQ_PGM_RESOURCES_ES
+FLD  0 0x000000ff 0x00000000 0 NUM_GPRS
+FLD  8 0x000000ff 0x00000000 0 STACK_SIZE
+FLD 21 0x00000001 0x00000000 0 DX10_CLAMP
+FLD 28 0x00000001 0x00000000 0 UNCACHED_FIRST_INST
+REG 0x00028894 0x00000104 0x00000000 32    0    1    0 SQ_PGM_RESOURCES_2_ES
+FLD  0 0x00000003 0x00000000 0 SINGLE_ROUND
+VAL 0x00000000 SQ_ROUND_NEAREST_EVEN
+VAL 0x00000001 SQ_ROUND_PLUS_INFINITY
+VAL 0x00000002 SQ_ROUND_MINUS_INFINITY
+VAL 0x00000003 SQ_ROUND_TO_ZERO
+FLD  2 0x00000003 0x00000000 0 DOUBLE_ROUND
+VAL 0x00000000 SQ_ROUND_NEAREST_EVEN
+VAL 0x00000001 SQ_ROUND_PLUS_INFINITY
+VAL 0x00000002 SQ_ROUND_MINUS_INFINITY
+VAL 0x00000003 SQ_ROUND_TO_ZERO
+FLD  4 0x00000001 0x00000000 0 ALLOW_SINGLE_DENORM_IN
+FLD  5 0x00000001 0x00000000 0 ALLOW_SINGLE_DENORM_OUT
+FLD  6 0x00000001 0x00000000 0 ALLOW_DOUBLE_DENORM_IN
+FLD  7 0x00000001 0x00000000 0 ALLOW_DOUBLE_DENORM_OUT
+REG 0x000288a4 0x00000104 0x00000000 32    0    1    0 SQ_PGM_START_FS
+REG 0x000288a8 0x00000104 0x00000000 32    0    1    0 SQ_PGM_RESOURCES_FS
+FLD  0 0x000000ff 0x00000000 0 NUM_GPRS
+FLD  8 0x000000ff 0x00000000 0 STACK_SIZE
+FLD 21 0x00000001 0x00000000 0 DX10_CLAMP
+REG 0x000288b8 0x00000104 0x00000000 32    0    1    0 SQ_PGM_START_HS
+REG 0x000288bc 0x00000104 0x00000000 32    0    1    0 SQ_PGM_RESOURCES_HS
+FLD  0 0x000000ff 0x00000000 0 NUM_GPRS
+FLD  8 0x000000ff 0x00000000 0 STACK_SIZE
+FLD 21 0x00000001 0x00000000 0 DX10_CLAMP
+FLD 28 0x00000001 0x00000000 0 UNCACHED_FIRST_INST
+REG 0x000288c0 0x00000104 0x00000000 32    0    1    0 SQ_PGM_RESOURCES_2_HS
+FLD  0 0x00000003 0x00000000 0 SINGLE_ROUND
+VAL 0x00000000 SQ_ROUND_NEAREST_EVEN
+VAL 0x00000001 SQ_ROUND_PLUS_INFINITY
+VAL 0x00000002 SQ_ROUND_MINUS_INFINITY
+VAL 0x00000003 SQ_ROUND_TO_ZERO
+FLD  2 0x00000003 0x00000000 0 DOUBLE_ROUND
+VAL 0x00000000 SQ_ROUND_NEAREST_EVEN
+VAL 0x00000001 SQ_ROUND_PLUS_INFINITY
+VAL 0x00000002 SQ_ROUND_MINUS_INFINITY
+VAL 0x00000003 SQ_ROUND_TO_ZERO
+FLD  4 0x00000001 0x00000000 0 ALLOW_SINGLE_DENORM_IN
+FLD  5 0x00000001 0x00000000 0 ALLOW_SINGLE_DENORM_OUT
+FLD  6 0x00000001 0x00000000 0 ALLOW_DOUBLE_DENORM_IN
+FLD  7 0x00000001 0x00000000 0 ALLOW_DOUBLE_DENORM_OUT
+REG 0x000288d0 0x00000104 0x00000000 32    0    1    0 SQ_PGM_START_LS
+REG 0x000288d4 0x00000104 0x00000000 32    0    1    0 SQ_PGM_RESOURCES_LS
+FLD  0 0x000000ff 0x00000000 0 NUM_GPRS
+FLD  8 0x000000ff 0x00000000 0 STACK_SIZE
+FLD 21 0x00000001 0x00000000 0 DX10_CLAMP
+FLD 28 0x00000001 0x00000000 0 UNCACHED_FIRST_INST
+REG 0x000288d8 0x00000104 0x00000000 32    0    1    0 SQ_PGM_RESOURCES_2_LS
+FLD  0 0x00000003 0x00000000 0 SINGLE_ROUND
+VAL 0x00000000 SQ_ROUND_NEAREST_EVEN
+VAL 0x00000001 SQ_ROUND_PLUS_INFINITY
+VAL 0x00000002 SQ_ROUND_MINUS_INFINITY
+VAL 0x00000003 SQ_ROUND_TO_ZERO
+FLD  2 0x00000003 0x00000000 0 DOUBLE_ROUND
+VAL 0x00000000 SQ_ROUND_NEAREST_EVEN
+VAL 0x00000001 SQ_ROUND_PLUS_INFINITY
+VAL 0x00000002 SQ_ROUND_MINUS_INFINITY
+VAL 0x00000003 SQ_ROUND_TO_ZERO
+FLD  4 0x00000001 0x00000000 0 ALLOW_SINGLE_DENORM_IN
+FLD  5 0x00000001 0x00000000 0 ALLOW_SINGLE_DENORM_OUT
+FLD  6 0x00000001 0x00000000 0 ALLOW_DOUBLE_DENORM_IN
+FLD  7 0x00000001 0x00000000 0 ALLOW_DOUBLE_DENORM_OUT
+REG 0x000288ec 0x00000104 0x00000000 32    0    1    0 SQ_LDS_ALLOC_PS
+REG 0x000288f0 0x00000104 0x00000000 32    0    1    0 SQ_VTX_SEMANTIC_CLEAR
+REG 0x00028900 0x00000104 0x00000000 32    0    1    0 SQ_ESGS_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 0 ITEMSIZE
+REG 0x00028904 0x00000104 0x00000000 32    0    1    0 SQ_GSVS_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 0 ITEMSIZE
+REG 0x00028908 0x00000104 0x00000000 32    0    1    0 SQ_ESTMP_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 0 ITEMSIZE
+REG 0x0002890c 0x00000104 0x00000000 32    0    1    0 SQ_GSTMP_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 0 ITEMSIZE
+REG 0x00028910 0x00000104 0x00000000 32    0    1    0 SQ_VSTMP_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 0 ITEMSIZE
+REG 0x00028914 0x00000104 0x00000000 32    0    1    0 SQ_PSTMP_RING_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 0 ITEMSIZE
+REG 0x0002891c 0x00000104 0x00000000 32    0    1    0 SQ_GS_VERT_ITEMSIZE
+FLD  0 0x00007fff 0x00000000 0 ITEMSIZE
+REG 0x00028920 0x00000104 0x00000000 32    0    1    0 SQ_GS_VERT_ITEMSIZE_1
+FLD  0 0x00007fff 0x00000000 0 ITEMSIZE
+REG 0x00028924 0x00000104 0x00000000 32    0    1    0 SQ_GS_VERT_ITEMSIZE_2
+FLD  0 0x00007fff 0x00000000 0 ITEMSIZE
+REG 0x00028928 0x00000104 0x00000000 32    0    1    0 SQ_GS_VERT_ITEMSIZE_3
+FLD  0 0x00007fff 0x00000000 0 ITEMSIZE
+REG 0x0002892c 0x00000104 0x00000000 32    0    1    0 SQ_GSVS_RING_OFFSET_1
+FLD  0 0x00007fff 0x00000000 0 OFFSET
+REG 0x00028930 0x00000104 0x00000000 32    0    1    0 SQ_GSVS_RING_OFFSET_2
+FLD  0 0x00007fff 0x00000000 0 OFFSET
+REG 0x00028934 0x00000104 0x00000000 32    0    1    0 SQ_GSVS_RING_OFFSET_3
+FLD  0 0x00007fff 0x00000000 0 OFFSET
+REG 0x00028940 0x00000104 0x00000000 32    0   16    4 SQ_ALU_CONST_CACHE_PS
+REG 0x00028980 0x00000104 0x00000000 32    0   16    4 SQ_ALU_CONST_CACHE_VS
+REG 0x000289c0 0x00000104 0x00000000 32    0   16    4 SQ_ALU_CONST_CACHE_GS
+REG 0x00028a00 0x00000104 0x00000006 32    0    1    0 PA_SU_POINT_SIZE
+FLD  0 0x0000ffff 0x00000000 0 HEIGHT
+FLD 16 0x0000ffff 0x00000000 0 WIDTH
+REG 0x00028a04 0x00000104 0x00000006 32    0    1    0 PA_SU_POINT_MINMAX
+FLD  0 0x0000ffff 0x00000000 0 MIN_SIZE
+FLD 16 0x0000ffff 0x00000000 0 MAX_SIZE
+REG 0x00028a08 0x00000104 0x00000006 32    0    1    0 PA_SU_LINE_CNTL
+FLD  0 0x0000ffff 0x00000000 0 WIDTH
+REG 0x00028a0c 0x00000104 0x00000006 32    0    1    0 PA_SC_LINE_STIPPLE
+FLD  0 0x0000ffff 0x00000000 0 LINE_PATTERN
+FLD 16 0x000000ff 0x00000000 0 REPEAT_COUNT
+FLD 28 0x00000001 0x00000000 0 PATTERN_BIT_ORDER
+FLD 29 0x00000003 0x00000000 0 AUTO_RESET_CNTL
+REG 0x00028a10 0x00000104 0x00000010 32    0    1    0 VGT_OUTPUT_PATH_CNTL
+FLD  0 0x00000007 0x00000000 0 PATH_SELECT
+VAL 0x00000000 VGT_OUTPATH_VTX_REUSE
+VAL 0x00000001 VGT_OUTPATH_TESS_EN
+VAL 0x00000002 VGT_OUTPATH_PASSTHRU
+VAL 0x00000003 VGT_OUTPATH_GS_BLOCK
+VAL 0x00000004 VGT_OUTPATH_HS_BLOCK
+REG 0x00028a14 0x00000104 0x00000010 32    0    1    0 VGT_HOS_CNTL
+FLD  0 0x00000003 0x00000000 0 TESS_MODE
+REG 0x00028a18 0x00000104 0x00000010 32    0    1    0 VGT_HOS_MAX_TESS_LEVEL
+REG 0x00028a1c 0x00000104 0x00000010 32    0    1    0 VGT_HOS_MIN_TESS_LEVEL
+REG 0x00028a20 0x00000104 0x00000010 32    0    1    0 VGT_HOS_REUSE_DEPTH
+FLD  0 0x000000ff 0x00000000 0 REUSE_DEPTH
+REG 0x00028a24 0x00000104 0x00000010 32    0    1    0 VGT_GROUP_PRIM_TYPE
+FLD  0 0x0000001f 0x00000000 0 PRIM_TYPE
+VAL 0x00000000 VGT_GRP_3D_POINT
+VAL 0x00000001 VGT_GRP_3D_LINE
+VAL 0x00000002 VGT_GRP_3D_TRI
+VAL 0x00000003 VGT_GRP_3D_RECT
+VAL 0x00000004 VGT_GRP_3D_QUAD
+VAL 0x00000005 VGT_GRP_2D_COPY_RECT_V0
+VAL 0x00000006 VGT_GRP_2D_COPY_RECT_V1
+VAL 0x00000007 VGT_GRP_2D_COPY_RECT_V2
+VAL 0x00000008 VGT_GRP_2D_COPY_RECT_V3
+VAL 0x00000009 VGT_GRP_2D_FILL_RECT
+VAL 0x0000000a VGT_GRP_2D_LINE
+VAL 0x0000000b VGT_GRP_2D_TRI
+VAL 0x0000000c VGT_GRP_PRIM_INDEX_LINE
+VAL 0x0000000d VGT_GRP_PRIM_INDEX_TRI
+VAL 0x0000000e VGT_GRP_PRIM_INDEX_QUAD
+VAL 0x0000000f VGT_GRP_3D_LINE_ADJ
+VAL 0x00000010 VGT_GRP_3D_TRI_ADJ
+VAL 0x00000011 VGT_GRP_3D_PATCH
+FLD 14 0x00000001 0x00000000 0 RETAIN_ORDER
+FLD 15 0x00000001 0x00000000 0 RETAIN_QUADS
+FLD 16 0x00000007 0x00000000 0 PRIM_ORDER
+VAL 0x00000000 VGT_GRP_LIST
+VAL 0x00000001 VGT_GRP_STRIP
+VAL 0x00000002 VGT_GRP_FAN
+VAL 0x00000003 VGT_GRP_LOOP
+VAL 0x00000004 VGT_GRP_POLYGON
+REG 0x00028a28 0x00000104 0x00000010 32    0    1    0 VGT_GROUP_FIRST_DECR
+FLD  0 0x0000000f 0x00000000 0 FIRST_DECR
+REG 0x00028a2c 0x00000104 0x00000010 32    0    1    0 VGT_GROUP_DECR
+FLD  0 0x0000000f 0x00000000 0 DECR
+REG 0x00028a30 0x00000104 0x00000010 32    0    1    0 VGT_GROUP_VECT_0_CNTL
+FLD  0 0x00000001 0x00000000 0 COMP_X_EN
+FLD  1 0x00000001 0x00000000 0 COMP_Y_EN
+FLD  2 0x00000001 0x00000000 0 COMP_Z_EN
+FLD  3 0x00000001 0x00000000 0 COMP_W_EN
+FLD  8 0x000000ff 0x00000000 0 STRIDE
+FLD 16 0x000000ff 0x00000000 0 SHIFT
+REG 0x00028a34 0x00000104 0x00000010 32    0    1    0 VGT_GROUP_VECT_1_CNTL
+FLD  0 0x00000001 0x00000000 0 COMP_X_EN
+FLD  1 0x00000001 0x00000000 0 COMP_Y_EN
+FLD  2 0x00000001 0x00000000 0 COMP_Z_EN
+FLD  3 0x00000001 0x00000000 0 COMP_W_EN
+FLD  8 0x000000ff 0x00000000 0 STRIDE
+FLD 16 0x000000ff 0x00000000 0 SHIFT
+REG 0x00028a38 0x00000104 0x00000010 32    0    1    0 VGT_GROUP_VECT_0_FMT_CNTL
+FLD  0 0x0000000f 0x00000000 0 X_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD  4 0x0000000f 0x00000000 0 X_OFFSET
+FLD  8 0x0000000f 0x00000000 0 Y_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD 12 0x0000000f 0x00000000 0 Y_OFFSET
+FLD 16 0x0000000f 0x00000000 0 Z_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD 20 0x0000000f 0x00000000 0 Z_OFFSET
+FLD 24 0x0000000f 0x00000000 0 W_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD 28 0x0000000f 0x00000000 0 W_OFFSET
+REG 0x00028a3c 0x00000104 0x00000010 32    0    1    0 VGT_GROUP_VECT_1_FMT_CNTL
+FLD  0 0x0000000f 0x00000000 0 X_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD  4 0x0000000f 0x00000000 0 X_OFFSET
+FLD  8 0x0000000f 0x00000000 0 Y_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD 12 0x0000000f 0x00000000 0 Y_OFFSET
+FLD 16 0x0000000f 0x00000000 0 Z_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD 20 0x0000000f 0x00000000 0 Z_OFFSET
+FLD 24 0x0000000f 0x00000000 0 W_CONV
+VAL 0x00000000 VGT_GRP_INDEX_16
+VAL 0x00000001 VGT_GRP_INDEX_32
+VAL 0x00000002 VGT_GRP_UINT_16
+VAL 0x00000003 VGT_GRP_UINT_32
+VAL 0x00000004 VGT_GRP_SINT_16
+VAL 0x00000005 VGT_GRP_SINT_32
+VAL 0x00000006 VGT_GRP_FLOAT_32
+VAL 0x00000007 VGT_GRP_AUTO_PRIM
+VAL 0x00000008 VGT_GRP_FIX_1_23_TO_FLOAT
+FLD 28 0x0000000f 0x00000000 0 W_OFFSET
+REG 0x00028a40 0x00000104 0x00000010 32    0    1    0 VGT_GS_MODE
+FLD  0 0x00000003 0x00000000 0 MODE
+VAL 0x00000000 GS_OFF
+VAL 0x00000001 GS_SCENARIO_A
+VAL 0x00000002 GS_SCENARIO_B
+VAL 0x00000003 GS_SCENARIO_G
+VAL 0x00000004 GS_SCENARIO_C
+VAL 0x00000005 SPRITE_EN
+FLD  2 0x00000001 0x00000000 0 ES_PASSTHRU
+FLD  3 0x00000003 0x00000000 0 CUT_MODE
+VAL 0x00000000 GS_CUT_1024
+VAL 0x00000001 GS_CUT_512
+VAL 0x00000002 GS_CUT_256
+VAL 0x00000003 GS_CUT_128
+FLD  8 0x00000001 0x00000000 0 MODE_HI
+REG 0x00028a48 0x00000104 0x00000006 32    0    1    0 PA_SC_MODE_CNTL_0
+FLD  0 0x00000001 0x00000000 0 MSAA_ENABLE
+FLD  1 0x00000001 0x00000000 0 VPORT_SCISSOR_ENABLE
+FLD  2 0x00000001 0x00000000 0 LINE_STIPPLE_ENABLE
+REG 0x00028a50 0x00000104 0x00000010 32    0    1    0 VGT_ENHANCE
+REG 0x00028a54 0x00000104 0x00000010 32    0    1    0 VGT_GS_PER_ES
+FLD  0 0x000007ff 0x00000000 0 GS_PER_ES
+REG 0x00028a58 0x00000104 0x00000010 32    0    1    0 VGT_ES_PER_GS
+FLD  0 0x000007ff 0x00000000 0 ES_PER_GS
+REG 0x00028a5c 0x00000104 0x00000010 32    0    1    0 VGT_GS_PER_VS
+FLD  0 0x0000000f 0x00000000 0 GS_PER_VS
+REG 0x00028a6c 0x00000104 0x00000010 32    0    1    0 VGT_GS_OUT_PRIM_TYPE
+FLD  0 0x0000003f 0x00000000 0 OUTPRIM_TYPE
+VAL 0x00000000 POINTLIST
+VAL 0x00000001 LINESTRIP
+VAL 0x00000002 TRISTRIP
+REG 0x00028a74 0x00000104 0x00000010 32    0    1    0 VGT_DMA_SIZE
+REG 0x00028a78 0x00000104 0x00000010 32    0    1    0 VGT_DMA_MAX_SIZE
+REG 0x00028a7c 0x00000104 0x00000010 32    0    1    0 VGT_DMA_INDEX_TYPE
+FLD  0 0x00000003 0x00000000 0 INDEX_TYPE
+VAL 0x00000000 VGT_INDEX_16
+VAL 0x00000001 VGT_INDEX_32
+FLD  2 0x00000003 0x00000000 0 SWAP_MODE
+VAL 0x00000000 VGT_DMA_SWAP_NONE
+VAL 0x00000001 VGT_DMA_SWAP_16_BIT
+VAL 0x00000002 VGT_DMA_SWAP_32_BIT
+VAL 0x00000003 VGT_DMA_SWAP_WORD
+REG 0x00028a84 0x00000104 0x00000010 32    0    1    0 VGT_PRIMITIVEID_EN
+FLD  0 0x00000001 0x00000000 0 PRIMITIVEID_EN
+REG 0x00028a88 0x00000104 0x00000010 32    0    1    0 VGT_DMA_NUM_INSTANCES
+REG 0x00028a90 0x00000104 0x00000010 32    0    1    0 VGT_EVENT_INITIATOR
+FLD  0 0x0000003f 0x00000000 0 EVENT_TYPE
+VAL 0x00000001 SAMPLE_STREAMOUTSTATS1
+VAL 0x00000002 SAMPLE_STREAMOUTSTATS2
+VAL 0x00000003 SAMPLE_STREAMOUTSTATS3
+VAL 0x00000004 CACHE_FLUSH_TS
+VAL 0x00000005 CONTEXT_DONE
+VAL 0x00000006 CACHE_FLUSH
+VAL 0x00000007 CS_PARTIAL_FLUSH
+VAL 0x0000000d RST_PIX_CNT
+VAL 0x0000000f VS_PARTIAL_FLUSH
+VAL 0x00000010 PS_PARTIAL_FLUSH
+VAL 0x00000011 FLUSH_HS_OUTPUT
+VAL 0x00000012 FLUSH_LS_OUTPUT
+VAL 0x00000014 CACHE_FLUSH_AND_INV_TS_EVENT
+VAL 0x00000015 ZPASS_DONE
+VAL 0x00000016 CACHE_FLUSH_AND_INV_EVENT
+VAL 0x00000017 PERFCOUNTER_START
+VAL 0x00000018 PERFCOUNTER_STOP
+VAL 0x00000019 PIPELINESTAT_START
+VAL 0x0000001a PIPELINESTAT_STOP
+VAL 0x0000001b PERFCOUNTER_SAMPLE
+VAL 0x0000001c FLUSH_ES_OUTPUT
+VAL 0x0000001d FLUSH_GS_OUTPUT
+VAL 0x0000001e SAMPLE_PIPELINESTAT
+VAL 0x0000001f SO_VGTSTREAMOUT_FLUSH
+VAL 0x00000020 SAMPLE_STREAMOUTSTATS
+VAL 0x00000021 RESET_VTX_CNT
+VAL 0x00000022 BLOCK_CONTEXT_DONE
+VAL 0x00000023 CS_CONTEXT_DONE
+VAL 0x00000024 VGT_FLUSH
+VAL 0x00000026 SQ_NON_EVENT
+VAL 0x00000027 SC_SEND_DB_VPZ
+VAL 0x00000028 BOTTOM_OF_PIPE_TS
+VAL 0x00000029 FLUSH_SX_TS
+VAL 0x0000002a DB_CACHE_FLUSH_AND_INV
+VAL 0x0000002b FLUSH_AND_INV_DB_DATA_TS
+VAL 0x0000002c FLUSH_AND_INV_DB_META
+VAL 0x0000002d FLUSH_AND_INV_CB_DATA_TS
+VAL 0x0000002e FLUSH_AND_INV_CB_META
+VAL 0x0000002f CS_DONE
+VAL 0x00000030 PS_DONE
+VAL 0x00000031 FLUSH_AND_INV_CB_PIXEL_DATA
+FLD 19 0x000000ff 0x00000000 0 ADDRESS_HI
+FLD 27 0x00000001 0x00000000 0 EXTENDED_EVENT
+REG 0x00028a94 0x00000104 0x00000010 32    0    1    0 VGT_MULTI_PRIM_IB_RESET_EN
+FLD  0 0x00000001 0x00000000 0 RESET_EN
+REG 0x00028aa0 0x00000104 0x00000010 32    0    1    0 VGT_INSTANCE_STEP_RATE_0
+REG 0x00028aa4 0x00000104 0x00000010 32    0    1    0 VGT_INSTANCE_STEP_RATE_1
+REG 0x00028ab4 0x00000104 0x00000010 32    0    1    0 VGT_REUSE_OFF
+FLD  0 0x00000001 0x00000000 0 REUSE_OFF
+REG 0x00028ab8 0x00000104 0x00000010 32    0    1    0 VGT_VTX_CNT_EN
+FLD  0 0x00000001 0x00000000 0 VTX_CNT_EN
+REG 0x00028abc 0x00000104 0x00000003 32    0    1    0 DB_HTILE_SURFACE
+FLD  0 0x00000001 0x00000000 0 HTILE_WIDTH
+FLD  1 0x00000001 0x00000000 0 HTILE_HEIGHT
+FLD  2 0x00000001 0x00000000 0 LINEAR
+FLD  3 0x00000001 0x00000000 0 FULL_CACHE
+FLD  4 0x00000001 0x00000000 0 HTILE_USES_PRELOAD_WIN
+FLD  5 0x00000001 0x00000000 0 PRELOAD
+FLD  6 0x0000003f 0x00000000 0 PREFETCH_WIDTH
+FLD 12 0x0000003f 0x00000000 0 PREFETCH_HEIGHT
+REG 0x00028ac0 0x00000104 0x00000003 32    0    1    0 DB_SRESULTS_COMPARE_STATE0
+FLD  0 0x00000007 0x00000000 0 COMPAREFUNC0
+VAL 0x00000000 REF_NEVER
+VAL 0x00000001 REF_LESS
+VAL 0x00000002 REF_EQUAL
+VAL 0x00000003 REF_LEQUAL
+VAL 0x00000004 REF_GREATER
+VAL 0x00000005 REF_NOTEQUAL
+VAL 0x00000006 REF_GEQUAL
+VAL 0x00000007 REF_ALWAYS
+FLD  4 0x000000ff 0x00000000 0 COMPAREVALUE0
+FLD 12 0x000000ff 0x00000000 0 COMPAREMASK0
+FLD 24 0x00000001 0x00000000 0 ENABLE0
+REG 0x00028ac4 0x00000104 0x00000003 32    0    1    0 DB_SRESULTS_COMPARE_STATE1
+FLD  0 0x00000007 0x00000000 0 COMPAREFUNC1
+VAL 0x00000000 REF_NEVER
+VAL 0x00000001 REF_LESS
+VAL 0x00000002 REF_EQUAL
+VAL 0x00000003 REF_LEQUAL
+VAL 0x00000004 REF_GREATER
+VAL 0x00000005 REF_NOTEQUAL
+VAL 0x00000006 REF_GEQUAL
+VAL 0x00000007 REF_ALWAYS
+FLD  4 0x000000ff 0x00000000 0 COMPAREVALUE1
+FLD 12 0x000000ff 0x00000000 0 COMPAREMASK1
+FLD 24 0x00000001 0x00000000 0 ENABLE1
+REG 0x00028ac8 0x00000104 0x00000003 32    0    1    0 DB_PRELOAD_CONTROL
+FLD  0 0x000000ff 0x00000000 0 START_X
+FLD  8 0x000000ff 0x00000000 0 START_Y
+FLD 16 0x000000ff 0x00000000 0 MAX_X
+FLD 24 0x000000ff 0x00000000 0 MAX_Y
+REG 0x00028ad0 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_SIZE_0
+REG 0x00028ad4 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_VTX_STRIDE_0
+FLD  0 0x000003ff 0x00000000 0 STRIDE
+REG 0x00028ad8 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_BASE_0
+REG 0x00028adc 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_OFFSET_0
+REG 0x00028ae0 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_SIZE_1
+REG 0x00028ae4 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_VTX_STRIDE_1
+FLD  0 0x000003ff 0x00000000 0 STRIDE
+REG 0x00028ae8 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_BASE_1
+REG 0x00028aec 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_OFFSET_1
+REG 0x00028af0 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_SIZE_2
+REG 0x00028af4 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_VTX_STRIDE_2
+FLD  0 0x000003ff 0x00000000 0 STRIDE
+REG 0x00028af8 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_BASE_2
+REG 0x00028afc 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_OFFSET_2
+REG 0x00028b00 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_SIZE_3
+REG 0x00028b04 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_VTX_STRIDE_3
+FLD  0 0x000003ff 0x00000000 0 STRIDE
+REG 0x00028b08 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_BASE_3
+REG 0x00028b0c 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_OFFSET_3
+REG 0x00028b10 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_0
+REG 0x00028b14 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_1
+REG 0x00028b18 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_2
+REG 0x00028b1c 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_3
+REG 0x00028b28 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_DRAW_OPAQUE_OFFSET
+REG 0x00028b2c 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE
+REG 0x00028b30 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE
+FLD  0 0x000001ff 0x00000000 0 VERTEX_STRIDE
+REG 0x00028b38 0x00000104 0x00000010 32    0    1    0 VGT_GS_MAX_VERT_OUT
+FLD  0 0x000007ff 0x00000000 0 MAX_VERT_OUT
+REG 0x00028b44 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_HI_0
+FLD  0 0x0000003f 0x00000000 0 BASE_OFFSET
+REG 0x00028b48 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_HI_1
+FLD  0 0x0000003f 0x00000000 0 BASE_OFFSET
+REG 0x00028b4c 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_HI_2
+FLD  0 0x0000003f 0x00000000 0 BASE_OFFSET
+REG 0x00028b50 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BASE_OFFSET_HI_3
+FLD  0 0x0000003f 0x00000000 0 BASE_OFFSET
+REG 0x00028b54 0x00000104 0x00000010 32    0    1    0 VGT_SHADER_STAGES_EN
+FLD  0 0x00000003 0x00000000 0 LS_EN
+VAL 0x00000000 LS_STAGE_OFF
+VAL 0x00000001 LS_STAGE_ON
+VAL 0x00000002 CS_STAGE_ON
+FLD  2 0x00000001 0x00000000 0 HS_EN
+FLD  3 0x00000003 0x00000000 0 ES_EN
+VAL 0x00000000 ES_STAGE_OFF
+VAL 0x00000001 ES_STAGE_DS
+VAL 0x00000002 ES_STAGE_REAL
+FLD  5 0x00000001 0x00000000 0 GS_EN
+FLD  6 0x00000003 0x00000000 0 VS_EN
+VAL 0x00000000 VS_STAGE_REAL
+VAL 0x00000001 VS_STAGE_DS
+VAL 0x00000002 VS_STAGE_COPY_SHADER
+REG 0x00028b58 0x00000104 0x00000010 32    0    1    0 VGT_LS_HS_CONFIG
+FLD  0 0x000000ff 0x00000000 0 NUM_PATCHES
+FLD  8 0x0000003f 0x00000000 0 HS_NUM_INPUT_CP
+FLD 14 0x0000003f 0x00000000 0 HS_NUM_OUTPUT_CP
+REG 0x00028b5c 0x00000104 0x00000010 32    0    1    0 VGT_LS_SIZE
+FLD  0 0x000000ff 0x00000000 0 SIZE
+FLD  8 0x00001fff 0x00000000 0 PATCH_CP_SIZE
+REG 0x00028b60 0x00000104 0x00000010 32    0    1    0 VGT_HS_SIZE
+FLD  0 0x000000ff 0x00000000 0 SIZE
+FLD  8 0x00001fff 0x00000000 0 PATCH_CP_SIZE
+REG 0x00028b64 0x00000104 0x00000010 32    0    1    0 VGT_LS_HS_ALLOC
+FLD  0 0x00001fff 0x00000000 0 HS_TOTAL_OUTPUT
+FLD 13 0x00001fff 0x00000000 0 LS_HS_TOTAL_OUTPUT
+REG 0x00028b68 0x00000104 0x00000010 32    0    1    0 VGT_HS_PATCH_CONST
+FLD  0 0x00001fff 0x00000000 0 SIZE
+FLD 13 0x00001fff 0x00000000 0 STRIDE
+REG 0x00028b70 0x00000104 0x00000003 32    0    1    0 DB_ALPHA_TO_MASK
+FLD  0 0x00000001 0x00000000 0 ALPHA_TO_MASK_ENABLE
+FLD  8 0x00000003 0x00000000 0 ALPHA_TO_MASK_OFFSET0
+FLD 10 0x00000003 0x00000000 0 ALPHA_TO_MASK_OFFSET1
+FLD 12 0x00000003 0x00000000 0 ALPHA_TO_MASK_OFFSET2
+FLD 14 0x00000003 0x00000000 0 ALPHA_TO_MASK_OFFSET3
+FLD 16 0x00000001 0x00000000 0 OFFSET_ROUND
+REG 0x00028b78 0x00000104 0x00000006 32    0    1    0 PA_SU_POLY_OFFSET_DB_FMT_CNTL
+FLD  0 0x000000ff 0x00000000 0 POLY_OFFSET_NEG_NUM_DB_BITS
+FLD  8 0x00000001 0x00000000 0 POLY_OFFSET_DB_IS_FLOAT_FMT
+REG 0x00028b7c 0x00000104 0x00000006 32    0    1    0 PA_SU_POLY_OFFSET_CLAMP
+REG 0x00028b80 0x00000104 0x00000006 32    0    1    0 PA_SU_POLY_OFFSET_FRONT_SCALE
+REG 0x00028b84 0x00000104 0x00000006 32    0    1    0 PA_SU_POLY_OFFSET_FRONT_OFFSET
+REG 0x00028b88 0x00000104 0x00000006 32    0    1    0 PA_SU_POLY_OFFSET_BACK_SCALE
+REG 0x00028b8c 0x00000104 0x00000006 32    0    1    0 PA_SU_POLY_OFFSET_BACK_OFFSET
+REG 0x00028b90 0x00000104 0x00000010 32    0    1    0 VGT_GS_INSTANCE_CNT
+FLD  0 0x00000001 0x00000000 0 ENABLE
+FLD  2 0x0000007f 0x00000000 0 CNT
+REG 0x00028b94 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_CONFIG
+FLD  0 0x00000001 0x00000000 0 STREAMOUT_0_EN
+FLD  1 0x00000001 0x00000000 0 STREAMOUT_1_EN
+FLD  2 0x00000001 0x00000000 0 STREAMOUT_2_EN
+FLD  3 0x00000001 0x00000000 0 STREAMOUT_3_EN
+FLD  4 0x00000007 0x00000000 0 RAST_STREAM
+REG 0x00028b98 0x00000104 0x00000010 32    0    1    0 VGT_STRMOUT_BUFFER_CONFIG
+FLD  0 0x0000000f 0x00000000 0 STREAM_0_BUFFER_EN
+FLD  4 0x0000000f 0x00000000 0 STREAM_1_BUFFER_EN
+FLD  8 0x0000000f 0x00000000 0 STREAM_2_BUFFER_EN
+FLD 12 0x0000000f 0x00000000 0 STREAM_3_BUFFER_EN
+REG 0x00028b9c 0x00000104 0x00000001 32    0   12    4 CB_IMMED_BASE
+REG 0x00028c00 0x00000104 0x00000006 32    0    1    0 PA_SC_LINE_CNTL
+FLD  9 0x00000001 0x00000000 0 EXPAND_LINE_WIDTH
+FLD 10 0x00000001 0x00000000 0 LAST_PIXEL
+FLD 11 0x00000001 0x00000000 0 PERPENDICULAR_ENDCAP_ENA
+FLD 12 0x00000001 0x00000000 0 DX10_DIAMOND_TEST_ENA
+REG 0x00028c04 0x00000104 0x00000006 32    0    1    0 PA_SC_AA_CONFIG
+FLD  0 0x00000003 0x00000000 0 MSAA_NUM_SAMPLES
+FLD  4 0x00000001 0x00000000 0 AA_MASK_CENTROID_DTMN
+FLD 13 0x0000000f 0x00000000 0 MAX_SAMPLE_DIST
+REG 0x00028c08 0x00000104 0x00000006 32    0    1    0 PA_SU_VTX_CNTL
+FLD  0 0x00000001 0x00000000 0 PIX_CENTER
+FLD  1 0x00000003 0x00000000 0 ROUND_MODE
+VAL 0x00000000 X_TRUNCATE
+VAL 0x00000001 X_ROUND
+VAL 0x00000002 X_ROUND_TO_EVEN
+VAL 0x00000003 X_ROUND_TO_ODD
+FLD  3 0x00000007 0x00000000 0 QUANT_MODE
+VAL 0x00000000 X_1_16TH
+VAL 0x00000001 X_1_8TH
+VAL 0x00000002 X_1_4TH
+VAL 0x00000003 X_1_2
+VAL 0x00000004 X_1
+VAL 0x00000005 X_1_256TH
+VAL 0x00000006 X_1_1024TH
+VAL 0x00000007 X_1_4096TH
+REG 0x00028c0c 0x00000104 0x00000006 32    0    1    0 PA_CL_GB_VERT_CLIP_ADJ
+REG 0x00028c10 0x00000104 0x00000006 32    0    1    0 PA_CL_GB_VERT_DISC_ADJ
+REG 0x00028c14 0x00000104 0x00000006 32    0    1    0 PA_CL_GB_HORZ_CLIP_ADJ
+REG 0x00028c18 0x00000104 0x00000006 32    0    1    0 PA_CL_GB_HORZ_DISC_ADJ
+REG 0x00028c1c 0x00000104 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_0
+FLD  0 0x0000000f 0x00000000 0 S0_X
+FLD  4 0x0000000f 0x00000000 0 S0_Y
+FLD  8 0x0000000f 0x00000000 0 S1_X
+FLD 12 0x0000000f 0x00000000 0 S1_Y
+FLD 16 0x0000000f 0x00000000 0 S2_X
+FLD 20 0x0000000f 0x00000000 0 S2_Y
+FLD 24 0x0000000f 0x00000000 0 S3_X
+FLD 28 0x0000000f 0x00000000 0 S3_Y
+REG 0x00028c20 0x00000104 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_1
+FLD  0 0x0000000f 0x00000000 0 S0_X
+FLD  4 0x0000000f 0x00000000 0 S0_Y
+FLD  8 0x0000000f 0x00000000 0 S1_X
+FLD 12 0x0000000f 0x00000000 0 S1_Y
+FLD 16 0x0000000f 0x00000000 0 S2_X
+FLD 20 0x0000000f 0x00000000 0 S2_Y
+FLD 24 0x0000000f 0x00000000 0 S3_X
+FLD 28 0x0000000f 0x00000000 0 S3_Y
+REG 0x00028c24 0x00000104 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_2
+FLD  0 0x0000000f 0x00000000 0 S0_X
+FLD  4 0x0000000f 0x00000000 0 S0_Y
+FLD  8 0x0000000f 0x00000000 0 S1_X
+FLD 12 0x0000000f 0x00000000 0 S1_Y
+FLD 16 0x0000000f 0x00000000 0 S2_X
+FLD 20 0x0000000f 0x00000000 0 S2_Y
+FLD 24 0x0000000f 0x00000000 0 S3_X
+FLD 28 0x0000000f 0x00000000 0 S3_Y
+REG 0x00028c28 0x00000104 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_3
+FLD  0 0x0000000f 0x00000000 0 S0_X
+FLD  4 0x0000000f 0x00000000 0 S0_Y
+FLD  8 0x0000000f 0x00000000 0 S1_X
+FLD 12 0x0000000f 0x00000000 0 S1_Y
+FLD 16 0x0000000f 0x00000000 0 S2_X
+FLD 20 0x0000000f 0x00000000 0 S2_Y
+FLD 24 0x0000000f 0x00000000 0 S3_X
+FLD 28 0x0000000f 0x00000000 0 S3_Y
+REG 0x00028c2c 0x00000104 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_4
+FLD  0 0x0000000f 0x00000000 0 S0_X
+FLD  4 0x0000000f 0x00000000 0 S0_Y
+FLD  8 0x0000000f 0x00000000 0 S1_X
+FLD 12 0x0000000f 0x00000000 0 S1_Y
+FLD 16 0x0000000f 0x00000000 0 S2_X
+FLD 20 0x0000000f 0x00000000 0 S2_Y
+FLD 24 0x0000000f 0x00000000 0 S3_X
+FLD 28 0x0000000f 0x00000000 0 S3_Y
+REG 0x00028c30 0x00000104 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_5
+FLD  0 0x0000000f 0x00000000 0 S0_X
+FLD  4 0x0000000f 0x00000000 0 S0_Y
+FLD  8 0x0000000f 0x00000000 0 S1_X
+FLD 12 0x0000000f 0x00000000 0 S1_Y
+FLD 16 0x0000000f 0x00000000 0 S2_X
+FLD 20 0x0000000f 0x00000000 0 S2_Y
+FLD 24 0x0000000f 0x00000000 0 S3_X
+FLD 28 0x0000000f 0x00000000 0 S3_Y
+REG 0x00028c34 0x00000104 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_6
+FLD  0 0x0000000f 0x00000000 0 S0_X
+FLD  4 0x0000000f 0x00000000 0 S0_Y
+FLD  8 0x0000000f 0x00000000 0 S1_X
+FLD 12 0x0000000f 0x00000000 0 S1_Y
+FLD 16 0x0000000f 0x00000000 0 S2_X
+FLD 20 0x0000000f 0x00000000 0 S2_Y
+FLD 24 0x0000000f 0x00000000 0 S3_X
+FLD 28 0x0000000f 0x00000000 0 S3_Y
+REG 0x00028c38 0x00000104 0x00000006 32    0    1    0 PA_SC_AA_SAMPLE_LOCS_7
+FLD  0 0x0000000f 0x00000000 0 S0_X
+FLD  4 0x0000000f 0x00000000 0 S0_Y
+FLD  8 0x0000000f 0x00000000 0 S1_X
+FLD 12 0x0000000f 0x00000000 0 S1_Y
+FLD 16 0x0000000f 0x00000000 0 S2_X
+FLD 20 0x0000000f 0x00000000 0 S2_Y
+FLD 24 0x0000000f 0x00000000 0 S3_X
+FLD 28 0x0000000f 0x00000000 0 S3_Y
+REG 0x00028c3c 0x00000104 0x00000006 32    0    1    0 PA_SC_AA_MASK
+REG 0x00028c58 0x00000104 0x00000010 32    0    1    0 VGT_VERTEX_REUSE_BLOCK_CNTL
+FLD  0 0x000000ff 0x00000000 0 VTX_REUSE_DEPTH
+REG 0x00028c5c 0x00000104 0x00000010 32    0    1    0 VGT_OUT_DEALLOC_CNTL
+FLD  0 0x0000007f 0x00000000 0 DEALLOC_DIST
+REG 0x00028c60 0x00000104 0x00000001 32    0    8   60 CB_COLOR_BASE
+REG 0x00028c60 0x00000104 0x00000001 32    8    4   28 CB_COLOR_BASE
+REG 0x00028c64 0x00000104 0x00000001 32    0    8   60 CB_COLOR_PITCH
+FLD  0 0x000007ff 0x00000000 0 TILE_MAX
+REG 0x00028c64 0x00000104 0x00000001 32    8    4   28 CB_COLOR_PITCH
+FLD  0 0x000007ff 0x00000000 0 TILE_MAX
+REG 0x00028c68 0x00000104 0x00000001 32    0    8   60 CB_COLOR_SLICE
+FLD  0 0x003fffff 0x00000000 0 TILE_MAX
+REG 0x00028c68 0x00000104 0x00000001 32    8    4   28 CB_COLOR_SLICE
+FLD  0 0x003fffff 0x00000000 0 TILE_MAX
+REG 0x00028c6c 0x00000104 0x00000001 32    0    8   60 CB_COLOR_VIEW
+FLD  0 0x000007ff 0x00000000 0 SLICE_START
+FLD 13 0x000007ff 0x00000000 0 SLICE_MAX
+REG 0x00028c6c 0x00000104 0x00000001 32    8    4   28 CB_COLOR_VIEW
+FLD  0 0x000007ff 0x00000000 0 SLICE_START
+FLD 13 0x000007ff 0x00000000 0 SLICE_MAX
+REG 0x00028c70 0x00000104 0x00000001 32    0    8   60 CB_COLOR_INFO
+FLD  0 0x00000003 0x00000000 0 ENDIAN
+VAL 0x00000000 ENDIAN_NONE
+VAL 0x00000001 ENDIAN_8IN16
+VAL 0x00000002 ENDIAN_8IN32
+VAL 0x00000003 ENDIAN_8IN64
+FLD  2 0x0000003f 0x00000000 0 FORMAT
+VAL 0x00000000 COLOR_INVALID
+VAL 0x00000001 COLOR_8
+VAL 0x00000005 COLOR_16
+VAL 0x00000006 COLOR_16_FLOAT
+VAL 0x00000007 COLOR_8_8
+VAL 0x00000008 COLOR_5_6_5
+VAL 0x0000000a COLOR_1_5_5_5
+VAL 0x0000000b COLOR_4_4_4_4
+VAL 0x0000000c COLOR_5_5_5_1
+VAL 0x0000000d COLOR_32
+VAL 0x0000000e COLOR_32_FLOAT
+VAL 0x0000000f COLOR_16_16
+VAL 0x00000010 COLOR_16_16_FLOAT
+VAL 0x00000011 COLOR_8_24
+VAL 0x00000013 COLOR_24_8
+VAL 0x00000015 COLOR_10_11_11
+VAL 0x00000016 COLOR_10_11_11_FLOAT
+VAL 0x00000019 COLOR_2_10_10_10
+VAL 0x0000001a COLOR_8_8_8_8
+VAL 0x0000001b COLOR_10_10_10_2
+VAL 0x0000001c COLOR_X24_8_32_FLOAT
+VAL 0x0000001d COLOR_32_32
+VAL 0x0000001e COLOR_32_32_FLOAT
+VAL 0x0000001f COLOR_16_16_16_16
+VAL 0x00000020 COLOR_16_16_16_16_FLOAT
+VAL 0x00000022 COLOR_32_32_32_32
+VAL 0x00000023 COLOR_32_32_32_32_FLOAT
+FLD  8 0x0000000f 0x00000000 0 ARRAY_MODE
+VAL 0x00000000 ARRAY_LINEAR_GENERAL
+VAL 0x00000001 ARRAY_LINEAR_ALIGNED
+VAL 0x00000002 ARRAY_1D_TILED_THIN1
+VAL 0x00000004 ARRAY_2D_TILED_THIN1
+FLD 12 0x00000007 0x00000000 0 NUMBER_TYPE
+VAL 0x00000000 NUMBER_UNORM
+VAL 0x00000001 NUMBER_SNORM
+VAL 0x00000004 NUMBER_UINT
+VAL 0x00000005 NUMBER_SINT
+VAL 0x00000006 NUMBER_SRGB
+VAL 0x00000007 NUMBER_FLOAT
+FLD 15 0x00000003 0x00000000 0 COMP_SWAP
+VAL 0x00000000 SWAP_STD
+VAL 0x00000001 SWAP_ALT
+VAL 0x00000002 SWAP_STD_REV
+VAL 0x00000003 SWAP_ALT_REV
+FLD 17 0x00000001 0x00000000 0 FAST_CLEAR
+FLD 18 0x00000001 0x00000000 0 COMPRESSION
+FLD 19 0x00000001 0x00000000 0 BLEND_CLAMP
+FLD 20 0x00000001 0x00000000 0 BLEND_BYPASS
+FLD 21 0x00000001 0x00000000 0 SIMPLE_FLOAT
+FLD 22 0x00000001 0x00000000 0 ROUND_MODE
+FLD 23 0x00000001 0x00000000 0 TILE_COMPACT
+FLD 24 0x00000003 0x00000000 0 SOURCE_FORMAT
+VAL 0x00000000 EXPORT_4C_32BPC
+VAL 0x00000001 EXPORT_4C_16BPC
+FLD 26 0x00000001 0x00000000 0 RAT
+FLD 27 0x00000007 0x00000000 0 RESOURCE_TYPE
+VAL 0x00000000 BUFFER
+VAL 0x00000001 TEXTURE1D
+VAL 0x00000002 TEXTURE1DARRAY
+VAL 0x00000003 TEXTURE2D
+VAL 0x00000004 TEXTURE2DARRAY
+VAL 0x00000005 TEXTURE3D
+REG 0x00028c70 0x00000104 0x00000001 32    8    4   28 CB_COLOR_INFO
+FLD  0 0x00000003 0x00000000 0 ENDIAN
+VAL 0x00000000 ENDIAN_NONE
+VAL 0x00000001 ENDIAN_8IN16
+VAL 0x00000002 ENDIAN_8IN32
+VAL 0x00000003 ENDIAN_8IN64
+FLD  2 0x0000003f 0x00000000 0 FORMAT
+VAL 0x00000000 COLOR_INVALID
+VAL 0x00000001 COLOR_8
+VAL 0x00000005 COLOR_16
+VAL 0x00000006 COLOR_16_FLOAT
+VAL 0x00000007 COLOR_8_8
+VAL 0x00000008 COLOR_5_6_5
+VAL 0x0000000a COLOR_1_5_5_5
+VAL 0x0000000b COLOR_4_4_4_4
+VAL 0x0000000c COLOR_5_5_5_1
+VAL 0x0000000d COLOR_32
+VAL 0x0000000e COLOR_32_FLOAT
+VAL 0x0000000f COLOR_16_16
+VAL 0x00000010 COLOR_16_16_FLOAT
+VAL 0x00000011 COLOR_8_24
+VAL 0x00000013 COLOR_24_8
+VAL 0x00000015 COLOR_10_11_11
+VAL 0x00000016 COLOR_10_11_11_FLOAT
+VAL 0x00000019 COLOR_2_10_10_10
+VAL 0x0000001a COLOR_8_8_8_8
+VAL 0x0000001b COLOR_10_10_10_2
+VAL 0x0000001c COLOR_X24_8_32_FLOAT
+VAL 0x0000001d COLOR_32_32
+VAL 0x0000001e COLOR_32_32_FLOAT
+VAL 0x0000001f COLOR_16_16_16_16
+VAL 0x00000020 COLOR_16_16_16_16_FLOAT
+VAL 0x00000022 COLOR_32_32_32_32
+VAL 0x00000023 COLOR_32_32_32_32_FLOAT
+FLD  8 0x0000000f 0x00000000 0 ARRAY_MODE
+VAL 0x00000000 ARRAY_LINEAR_GENERAL
+VAL 0x00000001 ARRAY_LINEAR_ALIGNED
+VAL 0x00000002 ARRAY_1D_TILED_THIN1
+VAL 0x00000004 ARRAY_2D_TILED_THIN1
+FLD 12 0x00000007 0x00000000 0 NUMBER_TYPE
+VAL 0x00000000 NUMBER_UNORM
+VAL 0x00000001 NUMBER_SNORM
+VAL 0x00000004 NUMBER_UINT
+VAL 0x00000005 NUMBER_SINT
+VAL 0x00000006 NUMBER_SRGB
+VAL 0x00000007 NUMBER_FLOAT
+FLD 15 0x00000003 0x00000000 0 COMP_SWAP
+VAL 0x00000000 SWAP_STD
+VAL 0x00000001 SWAP_ALT
+VAL 0x00000002 SWAP_STD_REV
+VAL 0x00000003 SWAP_ALT_REV
+FLD 17 0x00000001 0x00000000 0 FAST_CLEAR
+FLD 18 0x00000001 0x00000000 0 COMPRESSION
+FLD 19 0x00000001 0x00000000 0 BLEND_CLAMP
+FLD 20 0x00000001 0x00000000 0 BLEND_BYPASS
+FLD 21 0x00000001 0x00000000 0 SIMPLE_FLOAT
+FLD 22 0x00000001 0x00000000 0 ROUND_MODE
+FLD 23 0x00000001 0x00000000 0 TILE_COMPACT
+FLD 24 0x00000003 0x00000000 0 SOURCE_FORMAT
+VAL 0x00000000 EXPORT_4C_32BPC
+VAL 0x00000001 EXPORT_4C_16BPC
+FLD 26 0x00000001 0x00000000 0 RAT
+FLD 27 0x00000007 0x00000000 0 RESOURCE_TYPE
+VAL 0x00000000 BUFFER
+VAL 0x00000001 TEXTURE1D
+VAL 0x00000002 TEXTURE1DARRAY
+VAL 0x00000003 TEXTURE2D
+VAL 0x00000004 TEXTURE2DARRAY
+VAL 0x00000005 TEXTURE3D
+REG 0x00028c74 0x00000104 0x00000001 32    0    8   60 CB_COLOR_ATTRIB
+FLD  3 0x00000001 0x00000000 0 IGNORE_SHADER_ENGINE_TILING
+FLD  4 0x00000001 0x00000000 0 NON_DISP_TILING_ORDER
+FLD  5 0x0000000f 0x00000000 0 TILE_SPLIT
+VAL 0x00000000 ADDR_SURF_TILE_SPLIT_64B
+VAL 0x00000001 ADDR_SURF_TILE_SPLIT_128B
+VAL 0x00000002 ADDR_SURF_TILE_SPLIT_256B
+VAL 0x00000003 ADDR_SURF_TILE_SPLIT_512B
+VAL 0x00000004 ADDR_SURF_TILE_SPLIT_1KB
+VAL 0x00000005 ADDR_SURF_TILE_SPLIT_2KB
+VAL 0x00000006 ADDR_SURF_TILE_SPLIT_4KB
+FLD 10 0x00000003 0x00000000 0 NUM_BANKS
+VAL 0x00000000 ADDR_SURF_2_BANK
+VAL 0x00000001 ADDR_SURF_4_BANK
+VAL 0x00000002 ADDR_SURF_8_BANK
+VAL 0x00000003 ADDR_SURF_16_BANK
+FLD 13 0x00000003 0x00000000 0 BANK_WIDTH
+VAL 0x00000000 ADDR_SURF_BANK_WIDTH_1
+VAL 0x00000001 ADDR_SURF_BANK_WIDTH_2
+VAL 0x00000002 ADDR_SURF_BANK_WIDTH_4
+VAL 0x00000003 ADDR_SURF_BANK_WIDTH_8
+FLD 16 0x00000003 0x00000000 0 BANK_HEIGHT
+VAL 0x00000000 ADDR_SURF_BANK_HEIGHT_1
+VAL 0x00000001 ADDR_SURF_BANK_HEIGHT_2
+VAL 0x00000002 ADDR_SURF_BANK_HEIGHT_4
+VAL 0x00000003 ADDR_SURF_BANK_HEIGHT_8
+FLD 19 0x00000003 0x00000000 0 MACRO_TILE_ASPECT
+VAL 0x00000000 ADDR_SURF_MACRO_ASPECT_1
+VAL 0x00000001 ADDR_SURF_MACRO_ASPECT_2
+VAL 0x00000002 ADDR_SURF_MACRO_ASPECT_4
+VAL 0x00000003 ADDR_SURF_MACRO_ASPECT_8
+FLD 22 0x00000003 0x00000000 0 FMASK_BANK_HEIGHT
+VAL 0x00000000 ADDR_SURF_BANK_HEIGHT_1
+VAL 0x00000001 ADDR_SURF_BANK_HEIGHT_2
+VAL 0x00000002 ADDR_SURF_BANK_HEIGHT_4
+VAL 0x00000003 ADDR_SURF_BANK_HEIGHT_8
+REG 0x00028c74 0x00000104 0x00000001 32    8    4   28 CB_COLOR_ATTRIB
+FLD  3 0x00000001 0x00000000 0 IGNORE_SHADER_ENGINE_TILING
+FLD  4 0x00000001 0x00000000 0 NON_DISP_TILING_ORDER
+FLD  5 0x0000000f 0x00000000 0 TILE_SPLIT
+VAL 0x00000000 ADDR_SURF_TILE_SPLIT_64B
+VAL 0x00000001 ADDR_SURF_TILE_SPLIT_128B
+VAL 0x00000002 ADDR_SURF_TILE_SPLIT_256B
+VAL 0x00000003 ADDR_SURF_TILE_SPLIT_512B
+VAL 0x00000004 ADDR_SURF_TILE_SPLIT_1KB
+VAL 0x00000005 ADDR_SURF_TILE_SPLIT_2KB
+VAL 0x00000006 ADDR_SURF_TILE_SPLIT_4KB
+FLD 10 0x00000003 0x00000000 0 NUM_BANKS
+VAL 0x00000000 ADDR_SURF_2_BANK
+VAL 0x00000001 ADDR_SURF_4_BANK
+VAL 0x00000002 ADDR_SURF_8_BANK
+VAL 0x00000003 ADDR_SURF_16_BANK
+FLD 13 0x00000003 0x00000000 0 BANK_WIDTH
+VAL 0x00000000 ADDR_SURF_BANK_WIDTH_1
+VAL 0x00000001 ADDR_SURF_BANK_WIDTH_2
+VAL 0x00000002 ADDR_SURF_BANK_WIDTH_4
+VAL 0x00000003 ADDR_SURF_BANK_WIDTH_8
+FLD 16 0x00000003 0x00000000 0 BANK_HEIGHT
+VAL 0x00000000 ADDR_SURF_BANK_HEIGHT_1
+VAL 0x00000001 ADDR_SURF_BANK_HEIGHT_2
+VAL 0x00000002 ADDR_SURF_BANK_HEIGHT_4
+VAL 0x00000003 ADDR_SURF_BANK_HEIGHT_8
+FLD 19 0x00000003 0x00000000 0 MACRO_TILE_ASPECT
+VAL 0x00000000 ADDR_SURF_MACRO_ASPECT_1
+VAL 0x00000001 ADDR_SURF_MACRO_ASPECT_2
+VAL 0x00000002 ADDR_SURF_MACRO_ASPECT_4
+VAL 0x00000003 ADDR_SURF_MACRO_ASPECT_8
+FLD 22 0x00000003 0x00000000 0 FMASK_BANK_HEIGHT
+VAL 0x00000000 ADDR_SURF_BANK_HEIGHT_1
+VAL 0x00000001 ADDR_SURF_BANK_HEIGHT_2
+VAL 0x00000002 ADDR_SURF_BANK_HEIGHT_4
+VAL 0x00000003 ADDR_SURF_BANK_HEIGHT_8
+REG 0x00028c78 0x00000104 0x00000001 32    0    8   60 CB_COLOR_DIM
+FLD  0 0x0000ffff 0x00000000 0 WIDTH_MAX
+FLD 16 0x0000ffff 0x00000000 0 HEIGHT_MAX
+REG 0x00028c78 0x00000104 0x00000001 32    8    4   28 CB_COLOR_DIM
+FLD  0 0x0000ffff 0x00000000 0 WIDTH_MAX
+FLD 16 0x0000ffff 0x00000000 0 HEIGHT_MAX
+REG 0x00028c7c 0x00000104 0x00000001 32    0    8   60 CB_COLOR_CMASK
+REG 0x00028c80 0x00000104 0x00000001 32    0    8   60 CB_COLOR_CMASK_SLICE
+FLD  0 0x00003fff 0x00000000 0 TILE_MAX
+REG 0x00028c84 0x00000104 0x00000001 32    0    8   60 CB_COLOR_FMASK
+REG 0x00028c88 0x00000104 0x00000001 32    0    8   60 CB_COLOR_FMASK_SLICE
+FLD  0 0x003fffff 0x00000000 0 TILE_MAX
+REG 0x00028c8c 0x00000104 0x00000001 32    0    8   60 CB_COLOR_CLEAR_WORD0
+REG 0x00028c90 0x00000104 0x00000001 32    0    8   60 CB_COLOR_CLEAR_WORD1
+REG 0x00028c94 0x00000104 0x00000001 32    0    8   60 CB_COLOR_CLEAR_WORD2
+REG 0x00028c98 0x00000104 0x00000001 32    0    8   60 CB_COLOR_CLEAR_WORD3
+REG 0x00028f00 0x00000104 0x00000000 32    0   16    4 SQ_ALU_CONST_CACHE_HS
+REG 0x00028f40 0x00000104 0x00000000 32    0   16    4 SQ_ALU_CONST_CACHE_LS
+REG 0x00028f80 0x00000104 0x00000000 32    0   16    4 SQ_ALU_CONST_BUFFER_SIZE_HS
+FLD  0 0x000001ff 0x00000000 0 DATA
+REG 0x00028fc0 0x00000104 0x00000000 32    0   16    4 SQ_ALU_CONST_BUFFER_SIZE_LS
+FLD  0 0x000001ff 0x00000000 0 DATA
+REG 0x0003a200 0x00000106 0x00000000 32    0   32    4 SQ_JUMPTABLE_CONST_PS
+FLD  0 0x000000ff 0x00000000 0 CONST_A
+FLD  8 0x000000ff 0x00000000 0 CONST_B
+FLD 16 0x000000ff 0x00000000 0 CONST_C
+FLD 24 0x000000ff 0x00000000 0 CONST_D
+REG 0x0003a280 0x00000106 0x00000000 32    0   32    4 SQ_JUMPTABLE_CONST_VS
+FLD  0 0x000000ff 0x00000000 0 CONST_A
+FLD  8 0x000000ff 0x00000000 0 CONST_B
+FLD 16 0x000000ff 0x00000000 0 CONST_C
+FLD 24 0x000000ff 0x00000000 0 CONST_D
+REG 0x0003a300 0x00000106 0x00000000 32    0   32    4 SQ_JUMPTABLE_CONST_GS
+FLD  0 0x000000ff 0x00000000 0 CONST_A
+FLD  8 0x000000ff 0x00000000 0 CONST_B
+FLD 16 0x000000ff 0x00000000 0 CONST_C
+FLD 24 0x000000ff 0x00000000 0 CONST_D
+REG 0x0003a380 0x00000106 0x00000000 32    0   32    4 SQ_JUMPTABLE_CONST_HS
+FLD  0 0x000000ff 0x00000000 0 CONST_A
+FLD  8 0x000000ff 0x00000000 0 CONST_B
+FLD 16 0x000000ff 0x00000000 0 CONST_C
+FLD 24 0x000000ff 0x00000000 0 CONST_D
+REG 0x0003a400 0x00000106 0x00000000 32    0   32    4 SQ_JUMPTABLE_CONST_LS
+FLD  0 0x000000ff 0x00000000 0 CONST_A
+FLD  8 0x000000ff 0x00000000 0 CONST_B
+FLD 16 0x000000ff 0x00000000 0 CONST_C
+FLD 24 0x000000ff 0x00000000 0 CONST_D
+REG 0x0003a480 0x00000106 0x00000000 32    0   32    4 SQ_JUMPTABLE_CONST_CS
+FLD  0 0x000000ff 0x00000000 0 CONST_A
+FLD  8 0x000000ff 0x00000000 0 CONST_B
+FLD 16 0x000000ff 0x00000000 0 CONST_C
+FLD 24 0x000000ff 0x00000000 0 CONST_D
+REG 0x0003a200 0x00000107 0x00000000 32    0   32    4 SQ_LOOP_CONST_DX10_PS
+REG 0x0003a200 0x00000107 0x00000000 32    0   32    4 SQ_LOOP_CONST_PS
+FLD  0 0x00000fff 0x00000000 0 COUNT
+FLD 12 0x00000fff 0x00000000 0 INIT
+FLD 24 0x000000ff 0x00000000 0 INC
+REG 0x0003a280 0x00000107 0x00000000 32    0   32    4 SQ_LOOP_CONST_DX10_VS
+REG 0x0003a280 0x00000107 0x00000000 32    0   32    4 SQ_LOOP_CONST_VS
+FLD  0 0x00000fff 0x00000000 0 COUNT
+FLD 12 0x00000fff 0x00000000 0 INIT
+FLD 24 0x000000ff 0x00000000 0 INC
+REG 0x0003a300 0x00000107 0x00000000 32    0   32    4 SQ_LOOP_CONST_DX10_GS
+REG 0x0003a300 0x00000107 0x00000000 32    0   32    4 SQ_LOOP_CONST_GS
+FLD  0 0x00000fff 0x00000000 0 COUNT
+FLD 12 0x00000fff 0x00000000 0 INIT
+FLD 24 0x000000ff 0x00000000 0 INC
+REG 0x0003a380 0x00000107 0x00000000 32    0   32    4 SQ_LOOP_CONST_DX10_HS
+REG 0x0003a380 0x00000107 0x00000000 32    0   32    4 SQ_LOOP_CONST_HS
+FLD  0 0x00000fff 0x00000000 0 COUNT
+FLD 12 0x00000fff 0x00000000 0 INIT
+FLD 24 0x000000ff 0x00000000 0 INC
+REG 0x0003a400 0x00000107 0x00000000 32    0   32    4 SQ_LOOP_CONST_DX10_LS
+REG 0x0003a400 0x00000107 0x00000000 32    0   32    4 SQ_LOOP_CONST_LS
+FLD  0 0x00000fff 0x00000000 0 COUNT
+FLD 12 0x00000fff 0x00000000 0 INIT
+FLD 24 0x000000ff 0x00000000 0 INC
+REG 0x0003a480 0x00000107 0x00000000 32    0   32    4 SQ_LOOP_CONST_DX10_CS
+REG 0x0003a480 0x00000107 0x00000000 32    0   32    4 SQ_LOOP_CONST_CS
+FLD  0 0x00000fff 0x00000000 0 COUNT
+FLD 12 0x00000fff 0x00000000 0 INIT
+FLD 24 0x000000ff 0x00000000 0 INC
+REG 0x0003c000 0x0000010a 0x0000000a 32    0   18   12 SQ_TEX_SAMPLER_WORD0_PS
+FLD  0 0x00000007 0x00000000 0 CLAMP_X
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  3 0x00000007 0x00000000 0 CLAMP_Y
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  6 0x00000007 0x00000000 0 CLAMP_Z
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  9 0x00000003 0x00000000 0 XY_MAG_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+FLD 11 0x00000003 0x00000000 0 XY_MIN_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+FLD 13 0x00000003 0x00000000 0 Z_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 15 0x00000003 0x00000000 0 MIP_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 20 0x00000003 0x00000000 0 BORDER_COLOR_TYPE
+VAL 0x00000000 SQ_TEX_BORDER_COLOR_TRANS_BLACK
+VAL 0x00000001 SQ_TEX_BORDER_COLOR_OPAQUE_BLACK
+VAL 0x00000002 SQ_TEX_BORDER_COLOR_OPAQUE_WHITE
+VAL 0x00000003 SQ_TEX_BORDER_COLOR_REGISTER
+FLD 22 0x00000007 0x00000000 0 DEPTH_COMPARE_FUNCTION
+VAL 0x00000000 SQ_TEX_DEPTH_COMPARE_NEVER
+VAL 0x00000001 SQ_TEX_DEPTH_COMPARE_LESS
+VAL 0x00000002 SQ_TEX_DEPTH_COMPARE_EQUAL
+VAL 0x00000003 SQ_TEX_DEPTH_COMPARE_LESSEQUAL
+VAL 0x00000004 SQ_TEX_DEPTH_COMPARE_GREATER
+VAL 0x00000005 SQ_TEX_DEPTH_COMPARE_NOTEQUAL
+VAL 0x00000006 SQ_TEX_DEPTH_COMPARE_GREATEREQUAL
+VAL 0x00000007 SQ_TEX_DEPTH_COMPARE_ALWAYS
+FLD 25 0x00000003 0x00000000 0 CHROMA_KEY
+VAL 0x00000000 SQ_TEX_CHROMA_KEY_DISABLED
+VAL 0x00000001 SQ_TEX_CHROMA_KEY_KILL
+VAL 0x00000002 SQ_TEX_CHROMA_KEY_BLEND
+REG 0x0003c004 0x0000010a 0x0000000a 32    0   18   12 SQ_TEX_SAMPLER_WORD1_PS
+FLD  0 0x00000fff 0x00000000 0 MIN_LOD
+FLD 12 0x00000fff 0x00000000 0 MAX_LOD
+FLD 24 0x0000000f 0x00000000 0 PERF_MIP
+FLD 28 0x0000000f 0x00000000 0 PERF_Z
+REG 0x0003c008 0x0000010a 0x0000000a 32    0   18   12 SQ_TEX_SAMPLER_WORD2_PS
+FLD  0 0x00003fff 0x00000000 0 LOD_BIAS
+FLD 14 0x0000003f 0x00000000 0 LOD_BIAS_SEC
+FLD 20 0x00000001 0x00000000 0 MC_COORD_TRUNCATE
+FLD 21 0x00000001 0x00000000 0 FORCE_DEGAMMA
+FLD 28 0x00000001 0x00000000 0 TRUNCATE_COORD
+FLD 29 0x00000001 0x00000000 0 DISABLE_CUBE_WRAP
+FLD 31 0x00000001 0x00000000 0 TYPE
+REG 0x0003c0d8 0x0000010a 0x0000000a 32    0   18   12 SQ_TEX_SAMPLER_WORD0_VS
+FLD  0 0x00000007 0x00000000 0 CLAMP_X
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  3 0x00000007 0x00000000 0 CLAMP_Y
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  6 0x00000007 0x00000000 0 CLAMP_Z
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  9 0x00000003 0x00000000 0 XY_MAG_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+FLD 11 0x00000003 0x00000000 0 XY_MIN_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+FLD 13 0x00000003 0x00000000 0 Z_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 15 0x00000003 0x00000000 0 MIP_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 20 0x00000003 0x00000000 0 BORDER_COLOR_TYPE
+VAL 0x00000000 SQ_TEX_BORDER_COLOR_TRANS_BLACK
+VAL 0x00000001 SQ_TEX_BORDER_COLOR_OPAQUE_BLACK
+VAL 0x00000002 SQ_TEX_BORDER_COLOR_OPAQUE_WHITE
+VAL 0x00000003 SQ_TEX_BORDER_COLOR_REGISTER
+FLD 22 0x00000007 0x00000000 0 DEPTH_COMPARE_FUNCTION
+VAL 0x00000000 SQ_TEX_DEPTH_COMPARE_NEVER
+VAL 0x00000001 SQ_TEX_DEPTH_COMPARE_LESS
+VAL 0x00000002 SQ_TEX_DEPTH_COMPARE_EQUAL
+VAL 0x00000003 SQ_TEX_DEPTH_COMPARE_LESSEQUAL
+VAL 0x00000004 SQ_TEX_DEPTH_COMPARE_GREATER
+VAL 0x00000005 SQ_TEX_DEPTH_COMPARE_NOTEQUAL
+VAL 0x00000006 SQ_TEX_DEPTH_COMPARE_GREATEREQUAL
+VAL 0x00000007 SQ_TEX_DEPTH_COMPARE_ALWAYS
+FLD 25 0x00000003 0x00000000 0 CHROMA_KEY
+VAL 0x00000000 SQ_TEX_CHROMA_KEY_DISABLED
+VAL 0x00000001 SQ_TEX_CHROMA_KEY_KILL
+VAL 0x00000002 SQ_TEX_CHROMA_KEY_BLEND
+REG 0x0003c0dc 0x0000010a 0x0000000a 32    0   18   12 SQ_TEX_SAMPLER_WORD1_VS
+FLD  0 0x00000fff 0x00000000 0 MIN_LOD
+FLD 12 0x00000fff 0x00000000 0 MAX_LOD
+FLD 24 0x0000000f 0x00000000 0 PERF_MIP
+FLD 28 0x0000000f 0x00000000 0 PERF_Z
+REG 0x0003c0e0 0x0000010a 0x0000000a 32    0   18   12 SQ_TEX_SAMPLER_WORD2_VS
+FLD  0 0x00003fff 0x00000000 0 LOD_BIAS
+FLD 14 0x0000003f 0x00000000 0 LOD_BIAS_SEC
+FLD 20 0x00000001 0x00000000 0 MC_COORD_TRUNCATE
+FLD 21 0x00000001 0x00000000 0 FORCE_DEGAMMA
+FLD 28 0x00000001 0x00000000 0 TRUNCATE_COORD
+FLD 29 0x00000001 0x00000000 0 DISABLE_CUBE_WRAP
+FLD 31 0x00000001 0x00000000 0 TYPE
+REG 0x0003c1b0 0x0000010a 0x0000000a 32    0   18   12 SQ_TEX_SAMPLER_WORD0_GS
+FLD  0 0x00000007 0x00000000 0 CLAMP_X
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  3 0x00000007 0x00000000 0 CLAMP_Y
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  6 0x00000007 0x00000000 0 CLAMP_Z
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  9 0x00000003 0x00000000 0 XY_MAG_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+FLD 11 0x00000003 0x00000000 0 XY_MIN_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+FLD 13 0x00000003 0x00000000 0 Z_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 15 0x00000003 0x00000000 0 MIP_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 20 0x00000003 0x00000000 0 BORDER_COLOR_TYPE
+VAL 0x00000000 SQ_TEX_BORDER_COLOR_TRANS_BLACK
+VAL 0x00000001 SQ_TEX_BORDER_COLOR_OPAQUE_BLACK
+VAL 0x00000002 SQ_TEX_BORDER_COLOR_OPAQUE_WHITE
+VAL 0x00000003 SQ_TEX_BORDER_COLOR_REGISTER
+FLD 22 0x00000007 0x00000000 0 DEPTH_COMPARE_FUNCTION
+VAL 0x00000000 SQ_TEX_DEPTH_COMPARE_NEVER
+VAL 0x00000001 SQ_TEX_DEPTH_COMPARE_LESS
+VAL 0x00000002 SQ_TEX_DEPTH_COMPARE_EQUAL
+VAL 0x00000003 SQ_TEX_DEPTH_COMPARE_LESSEQUAL
+VAL 0x00000004 SQ_TEX_DEPTH_COMPARE_GREATER
+VAL 0x00000005 SQ_TEX_DEPTH_COMPARE_NOTEQUAL
+VAL 0x00000006 SQ_TEX_DEPTH_COMPARE_GREATEREQUAL
+VAL 0x00000007 SQ_TEX_DEPTH_COMPARE_ALWAYS
+FLD 25 0x00000003 0x00000000 0 CHROMA_KEY
+VAL 0x00000000 SQ_TEX_CHROMA_KEY_DISABLED
+VAL 0x00000001 SQ_TEX_CHROMA_KEY_KILL
+VAL 0x00000002 SQ_TEX_CHROMA_KEY_BLEND
+REG 0x0003c1b4 0x0000010a 0x0000000a 32    0   18   12 SQ_TEX_SAMPLER_WORD1_GS
+FLD  0 0x00000fff 0x00000000 0 MIN_LOD
+FLD 12 0x00000fff 0x00000000 0 MAX_LOD
+FLD 24 0x0000000f 0x00000000 0 PERF_MIP
+FLD 28 0x0000000f 0x00000000 0 PERF_Z
+REG 0x0003c1b8 0x0000010a 0x0000000a 32    0   18   12 SQ_TEX_SAMPLER_WORD2_GS
+FLD  0 0x00003fff 0x00000000 0 LOD_BIAS
+FLD 14 0x0000003f 0x00000000 0 LOD_BIAS_SEC
+FLD 20 0x00000001 0x00000000 0 MC_COORD_TRUNCATE
+FLD 21 0x00000001 0x00000000 0 FORCE_DEGAMMA
+FLD 28 0x00000001 0x00000000 0 TRUNCATE_COORD
+FLD 29 0x00000001 0x00000000 0 DISABLE_CUBE_WRAP
+FLD 31 0x00000001 0x00000000 0 TYPE
+REG 0x0003c288 0x0000010a 0x0000000a 32    0   18   12 SQ_TEX_SAMPLER_WORD0_HS
+FLD  0 0x00000007 0x00000000 0 CLAMP_X
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  3 0x00000007 0x00000000 0 CLAMP_Y
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  6 0x00000007 0x00000000 0 CLAMP_Z
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  9 0x00000003 0x00000000 0 XY_MAG_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+FLD 11 0x00000003 0x00000000 0 XY_MIN_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+FLD 13 0x00000003 0x00000000 0 Z_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 15 0x00000003 0x00000000 0 MIP_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 20 0x00000003 0x00000000 0 BORDER_COLOR_TYPE
+VAL 0x00000000 SQ_TEX_BORDER_COLOR_TRANS_BLACK
+VAL 0x00000001 SQ_TEX_BORDER_COLOR_OPAQUE_BLACK
+VAL 0x00000002 SQ_TEX_BORDER_COLOR_OPAQUE_WHITE
+VAL 0x00000003 SQ_TEX_BORDER_COLOR_REGISTER
+FLD 22 0x00000007 0x00000000 0 DEPTH_COMPARE_FUNCTION
+VAL 0x00000000 SQ_TEX_DEPTH_COMPARE_NEVER
+VAL 0x00000001 SQ_TEX_DEPTH_COMPARE_LESS
+VAL 0x00000002 SQ_TEX_DEPTH_COMPARE_EQUAL
+VAL 0x00000003 SQ_TEX_DEPTH_COMPARE_LESSEQUAL
+VAL 0x00000004 SQ_TEX_DEPTH_COMPARE_GREATER
+VAL 0x00000005 SQ_TEX_DEPTH_COMPARE_NOTEQUAL
+VAL 0x00000006 SQ_TEX_DEPTH_COMPARE_GREATEREQUAL
+VAL 0x00000007 SQ_TEX_DEPTH_COMPARE_ALWAYS
+FLD 25 0x00000003 0x00000000 0 CHROMA_KEY
+VAL 0x00000000 SQ_TEX_CHROMA_KEY_DISABLED
+VAL 0x00000001 SQ_TEX_CHROMA_KEY_KILL
+VAL 0x00000002 SQ_TEX_CHROMA_KEY_BLEND
+REG 0x0003c28c 0x0000010a 0x0000000a 32    0   18   12 SQ_TEX_SAMPLER_WORD1_HS
+FLD  0 0x00000fff 0x00000000 0 MIN_LOD
+FLD 12 0x00000fff 0x00000000 0 MAX_LOD
+FLD 24 0x0000000f 0x00000000 0 PERF_MIP
+FLD 28 0x0000000f 0x00000000 0 PERF_Z
+REG 0x0003c290 0x0000010a 0x0000000a 32    0   18   12 SQ_TEX_SAMPLER_WORD2_HS
+FLD  0 0x00003fff 0x00000000 0 LOD_BIAS
+FLD 14 0x0000003f 0x00000000 0 LOD_BIAS_SEC
+FLD 20 0x00000001 0x00000000 0 MC_COORD_TRUNCATE
+FLD 21 0x00000001 0x00000000 0 FORCE_DEGAMMA
+FLD 28 0x00000001 0x00000000 0 TRUNCATE_COORD
+FLD 29 0x00000001 0x00000000 0 DISABLE_CUBE_WRAP
+FLD 31 0x00000001 0x00000000 0 TYPE
+REG 0x0003c360 0x0000010a 0x0000000a 32    0   18   12 SQ_TEX_SAMPLER_WORD0_LS
+FLD  0 0x00000007 0x00000000 0 CLAMP_X
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  3 0x00000007 0x00000000 0 CLAMP_Y
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  6 0x00000007 0x00000000 0 CLAMP_Z
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  9 0x00000003 0x00000000 0 XY_MAG_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+FLD 11 0x00000003 0x00000000 0 XY_MIN_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+FLD 13 0x00000003 0x00000000 0 Z_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 15 0x00000003 0x00000000 0 MIP_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 20 0x00000003 0x00000000 0 BORDER_COLOR_TYPE
+VAL 0x00000000 SQ_TEX_BORDER_COLOR_TRANS_BLACK
+VAL 0x00000001 SQ_TEX_BORDER_COLOR_OPAQUE_BLACK
+VAL 0x00000002 SQ_TEX_BORDER_COLOR_OPAQUE_WHITE
+VAL 0x00000003 SQ_TEX_BORDER_COLOR_REGISTER
+FLD 22 0x00000007 0x00000000 0 DEPTH_COMPARE_FUNCTION
+VAL 0x00000000 SQ_TEX_DEPTH_COMPARE_NEVER
+VAL 0x00000001 SQ_TEX_DEPTH_COMPARE_LESS
+VAL 0x00000002 SQ_TEX_DEPTH_COMPARE_EQUAL
+VAL 0x00000003 SQ_TEX_DEPTH_COMPARE_LESSEQUAL
+VAL 0x00000004 SQ_TEX_DEPTH_COMPARE_GREATER
+VAL 0x00000005 SQ_TEX_DEPTH_COMPARE_NOTEQUAL
+VAL 0x00000006 SQ_TEX_DEPTH_COMPARE_GREATEREQUAL
+VAL 0x00000007 SQ_TEX_DEPTH_COMPARE_ALWAYS
+FLD 25 0x00000003 0x00000000 0 CHROMA_KEY
+VAL 0x00000000 SQ_TEX_CHROMA_KEY_DISABLED
+VAL 0x00000001 SQ_TEX_CHROMA_KEY_KILL
+VAL 0x00000002 SQ_TEX_CHROMA_KEY_BLEND
+REG 0x0003c364 0x0000010a 0x0000000a 32    0   18   12 SQ_TEX_SAMPLER_WORD1_LS
+FLD  0 0x00000fff 0x00000000 0 MIN_LOD
+FLD 12 0x00000fff 0x00000000 0 MAX_LOD
+FLD 24 0x0000000f 0x00000000 0 PERF_MIP
+FLD 28 0x0000000f 0x00000000 0 PERF_Z
+REG 0x0003c368 0x0000010a 0x0000000a 32    0   18   12 SQ_TEX_SAMPLER_WORD2_LS
+FLD  0 0x00003fff 0x00000000 0 LOD_BIAS
+FLD 14 0x0000003f 0x00000000 0 LOD_BIAS_SEC
+FLD 20 0x00000001 0x00000000 0 MC_COORD_TRUNCATE
+FLD 21 0x00000001 0x00000000 0 FORCE_DEGAMMA
+FLD 28 0x00000001 0x00000000 0 TRUNCATE_COORD
+FLD 29 0x00000001 0x00000000 0 DISABLE_CUBE_WRAP
+FLD 31 0x00000001 0x00000000 0 TYPE
+REG 0x0003c438 0x0000010a 0x0000000a 32    0   18   12 SQ_TEX_SAMPLER_WORD0_CS
+FLD  0 0x00000007 0x00000000 0 CLAMP_X
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  3 0x00000007 0x00000000 0 CLAMP_Y
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  6 0x00000007 0x00000000 0 CLAMP_Z
+VAL 0x00000000 SQ_TEX_WRAP
+VAL 0x00000001 SQ_TEX_MIRROR
+VAL 0x00000002 SQ_TEX_CLAMP_LAST_TEXEL
+VAL 0x00000003 SQ_TEX_MIRROR_ONCE_LAST_TEXEL
+VAL 0x00000004 SQ_TEX_CLAMP_HALF_BORDER
+VAL 0x00000005 SQ_TEX_MIRROR_ONCE_HALF_BORDER
+VAL 0x00000006 SQ_TEX_CLAMP_BORDER
+VAL 0x00000007 SQ_TEX_MIRROR_ONCE_BORDER
+FLD  9 0x00000003 0x00000000 0 XY_MAG_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+FLD 11 0x00000003 0x00000000 0 XY_MIN_FILTER
+VAL 0x00000000 SQ_TEX_XY_FILTER_POINT
+VAL 0x00000001 SQ_TEX_XY_FILTER_BILINEAR
+FLD 13 0x00000003 0x00000000 0 Z_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 15 0x00000003 0x00000000 0 MIP_FILTER
+VAL 0x00000000 SQ_TEX_Z_FILTER_NONE
+VAL 0x00000001 SQ_TEX_Z_FILTER_POINT
+VAL 0x00000002 SQ_TEX_Z_FILTER_LINEAR
+FLD 20 0x00000003 0x00000000 0 BORDER_COLOR_TYPE
+VAL 0x00000000 SQ_TEX_BORDER_COLOR_TRANS_BLACK
+VAL 0x00000001 SQ_TEX_BORDER_COLOR_OPAQUE_BLACK
+VAL 0x00000002 SQ_TEX_BORDER_COLOR_OPAQUE_WHITE
+VAL 0x00000003 SQ_TEX_BORDER_COLOR_REGISTER
+FLD 22 0x00000007 0x00000000 0 DEPTH_COMPARE_FUNCTION
+VAL 0x00000000 SQ_TEX_DEPTH_COMPARE_NEVER
+VAL 0x00000001 SQ_TEX_DEPTH_COMPARE_LESS
+VAL 0x00000002 SQ_TEX_DEPTH_COMPARE_EQUAL
+VAL 0x00000003 SQ_TEX_DEPTH_COMPARE_LESSEQUAL
+VAL 0x00000004 SQ_TEX_DEPTH_COMPARE_GREATER
+VAL 0x00000005 SQ_TEX_DEPTH_COMPARE_NOTEQUAL
+VAL 0x00000006 SQ_TEX_DEPTH_COMPARE_GREATEREQUAL
+VAL 0x00000007 SQ_TEX_DEPTH_COMPARE_ALWAYS
+FLD 25 0x00000003 0x00000000 0 CHROMA_KEY
+VAL 0x00000000 SQ_TEX_CHROMA_KEY_DISABLED
+VAL 0x00000001 SQ_TEX_CHROMA_KEY_KILL
+VAL 0x00000002 SQ_TEX_CHROMA_KEY_BLEND
+REG 0x0003c43c 0x0000010a 0x0000000a 32    0   18   12 SQ_TEX_SAMPLER_WORD1_CS
+FLD  0 0x00000fff 0x00000000 0 MIN_LOD
+FLD 12 0x00000fff 0x00000000 0 MAX_LOD
+FLD 24 0x0000000f 0x00000000 0 PERF_MIP
+FLD 28 0x0000000f 0x00000000 0 PERF_Z
+REG 0x0003c440 0x0000010a 0x0000000a 32    0   18   12 SQ_TEX_SAMPLER_WORD2_CS
+FLD  0 0x00003fff 0x00000000 0 LOD_BIAS
+FLD 14 0x0000003f 0x00000000 0 LOD_BIAS_SEC
+FLD 20 0x00000001 0x00000000 0 MC_COORD_TRUNCATE
+FLD 21 0x00000001 0x00000000 0 FORCE_DEGAMMA
+FLD 28 0x00000001 0x00000000 0 TRUNCATE_COORD
+FLD 29 0x00000001 0x00000000 0 DISABLE_CUBE_WRAP
+FLD 31 0x00000001 0x00000000 0 TYPE
+REG 0x00030000 0x0000010c 0x0000000f 32    0  176   32 SQ_TEX_RESOURCE_WORD0_PS
+FLD  0 0x00000007 0x00000000 0 DIM
+VAL 0x00000000 SQ_TEX_DIM_1D
+VAL 0x00000001 SQ_TEX_DIM_2D
+VAL 0x00000002 SQ_TEX_DIM_3D
+VAL 0x00000003 SQ_TEX_DIM_CUBEMAP
+VAL 0x00000004 SQ_TEX_DIM_1D_ARRAY
+VAL 0x00000005 SQ_TEX_DIM_2D_ARRAY
+VAL 0x00000006 SQ_TEX_DIM_2D_MSAA
+VAL 0x00000007 SQ_TEX_DIM_2D_ARRAY_MSAA
+FLD  3 0x00000001 0x00000000 0 IGNORE_SHADER_ENGINE_TILING
+FLD  6 0x00000fff 0x00000000 0 PITCH
+FLD 18 0x00003fff 0x00000000 0 TEX_WIDTH
+REG 0x00030004 0x0000010c 0x0000000f 32    0  176   32 SQ_TEX_RESOURCE_WORD1_PS
+FLD  0 0x00003fff 0x00000000 0 TEX_HEIGHT
+FLD 14 0x00001fff 0x00000000 0 TEX_DEPTH
+FLD 28 0x0000000f 0x00000000 0 ARRAY_MODE
+REG 0x00030008 0x0000010c 0x0000000f 32    0  176   32 SQ_TEX_RESOURCE_WORD2_PS
+REG 0x0003000c 0x0000010c 0x0000000f 32    0  176   32 SQ_TEX_RESOURCE_WORD3_PS
+REG 0x00030010 0x0000010c 0x0000000f 32    0  176   32 SQ_TEX_RESOURCE_WORD4_PS
+FLD  0 0x00000003 0x00000000 0 FORMAT_COMP_X
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  2 0x00000003 0x00000000 0 FORMAT_COMP_Y
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  4 0x00000003 0x00000000 0 FORMAT_COMP_Z
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  6 0x00000003 0x00000000 0 FORMAT_COMP_W
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  8 0x00000003 0x00000000 0 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 10 0x00000001 0x00000000 0 SRF_MODE_ALL
+FLD 11 0x00000001 0x00000000 0 FORCE_DEGAMMA
+FLD 12 0x00000003 0x00000000 0 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+FLD 16 0x00000007 0x00000000 0 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 19 0x00000007 0x00000000 0 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 22 0x00000007 0x00000000 0 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 25 0x00000007 0x00000000 0 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 28 0x0000000f 0x00000000 0 BASE_LEVEL
+REG 0x00030014 0x0000010c 0x0000000f 32    0  176   32 SQ_TEX_RESOURCE_WORD5_PS
+FLD  0 0x0000000f 0x00000000 0 LAST_LEVEL
+FLD  4 0x00001fff 0x00000000 0 BASE_ARRAY
+FLD 17 0x00001fff 0x00000000 0 LAST_ARRAY
+REG 0x00030018 0x0000010c 0x0000000f 32    0  176   32 SQ_TEX_RESOURCE_WORD6_PS
+FLD  3 0x00000007 0x00000000 0 PERF_MODULATION
+FLD  6 0x00000001 0x00000000 0 INTERLACED
+FLD  8 0x00000fff 0x00000000 0 MIN_LOD
+FLD 29 0x00000007 0x00000000 0 TILE_SPLIT
+VAL 0x00000000 SQ_ADDR_SURF_TILE_SPLIT_64B
+VAL 0x00000001 SQ_ADDR_SURF_TILE_SPLIT_128B
+VAL 0x00000002 SQ_ADDR_SURF_TILE_SPLIT_256B
+VAL 0x00000003 SQ_ADDR_SURF_TILE_SPLIT_512B
+VAL 0x00000004 SQ_ADDR_SURF_TILE_SPLIT_1KB
+VAL 0x00000005 SQ_ADDR_SURF_TILE_SPLIT_2KB
+VAL 0x00000006 SQ_ADDR_SURF_TILE_SPLIT_4KB
+REG 0x0003001c 0x0000010c 0x0000000f 32    0  176   32 SQ_TEX_RESOURCE_WORD7_PS
+FLD  0 0x0000003f 0x00000000 0 DATA_FORMAT
+VAL 0x00000000 FMT_INVALID
+VAL 0x00000001 FMT_8
+VAL 0x00000002 FMT_4_4
+VAL 0x00000003 FMT_3_3_2
+VAL 0x00000005 FMT_16
+VAL 0x00000006 FMT_16_FLOAT
+VAL 0x00000007 FMT_8_8
+VAL 0x00000008 FMT_5_6_5
+VAL 0x00000009 FMT_6_5_5
+VAL 0x0000000a FMT_1_5_5_5
+VAL 0x0000000b FMT_4_4_4_4
+VAL 0x0000000c FMT_5_5_5_1
+VAL 0x0000000d FMT_32
+VAL 0x0000000e FMT_32_FLOAT
+VAL 0x0000000f FMT_16_16
+VAL 0x00000010 FMT_16_16_FLOAT
+VAL 0x00000011 FMT_8_24
+VAL 0x00000012 FMT_8_24_FLOAT
+VAL 0x00000013 FMT_24_8
+VAL 0x00000014 FMT_24_8_FLOAT
+VAL 0x00000015 FMT_10_11_11
+VAL 0x00000016 FMT_10_11_11_FLOAT
+VAL 0x00000017 FMT_11_11_10
+VAL 0x00000018 FMT_11_11_10_FLOAT
+VAL 0x00000019 FMT_2_10_10_10
+VAL 0x0000001a FMT_8_8_8_8
+VAL 0x0000001b FMT_10_10_10_2
+VAL 0x0000001c FMT_X24_8_32_FLOAT
+VAL 0x0000001d FMT_32_32
+VAL 0x0000001e FMT_32_32_FLOAT
+VAL 0x0000001f FMT_16_16_16_16
+VAL 0x00000020 FMT_16_16_16_16_FLOAT
+VAL 0x00000022 FMT_32_32_32_32
+VAL 0x00000023 FMT_32_32_32_32_FLOAT
+VAL 0x00000025 FMT_1
+VAL 0x00000027 FMT_GB_GR
+VAL 0x00000028 FMT_BG_RG
+VAL 0x00000029 FMT_32_AS_8
+VAL 0x0000002a FMT_32_AS_8_8
+VAL 0x0000002b FMT_5_9_9_9_SHAREDEXP
+VAL 0x0000002c FMT_8_8_8
+VAL 0x0000002d FMT_16_16_16
+VAL 0x0000002e FMT_16_16_16_FLOAT
+VAL 0x0000002f FMT_32_32_32
+VAL 0x00000030 FMT_32_32_32_FLOAT
+FLD  6 0x00000003 0x00000000 0 MACRO_TILE_ASPECT
+VAL 0x00000000 SQ_ADDR_SURF_MACRO_ASPECT_1
+VAL 0x00000001 SQ_ADDR_SURF_MACRO_ASPECT_2
+VAL 0x00000002 SQ_ADDR_SURF_MACRO_ASPECT_4
+VAL 0x00000003 SQ_ADDR_SURF_MACRO_ASPECT_8
+FLD  8 0x00000003 0x00000000 0 BANK_WIDTH
+VAL 0x00000000 SQ_ADDR_SURF_BANK_WH_1
+VAL 0x00000001 SQ_ADDR_SURF_BANK_WH_2
+VAL 0x00000002 SQ_ADDR_SURF_BANK_WH_4
+VAL 0x00000003 SQ_ADDR_SURF_BANK_WH_8
+FLD 10 0x00000003 0x00000000 0 BANK_HEIGHT
+VAL 0x00000000 SQ_ADDR_SURF_BANK_WH_1
+VAL 0x00000001 SQ_ADDR_SURF_BANK_WH_2
+VAL 0x00000002 SQ_ADDR_SURF_BANK_WH_4
+VAL 0x00000003 SQ_ADDR_SURF_BANK_WH_8
+FLD 15 0x00000001 0x00000000 0 DEPTH_SAMPLE_ORDER
+FLD 16 0x00000003 0x00000000 0 NUM_BANKS
+VAL 0x00000000 SQ_ADDR_SURF_2_BANK
+VAL 0x00000001 SQ_ADDR_SURF_4_BANK
+VAL 0x00000002 SQ_ADDR_SURF_8_BANK
+VAL 0x00000003 SQ_ADDR_SURF_16_BANK
+FLD 30 0x00000003 0x00000000 0 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x00031600 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD0_VS
+FLD  0 0x00000007 0x00000000 0 DIM
+VAL 0x00000000 SQ_TEX_DIM_1D
+VAL 0x00000001 SQ_TEX_DIM_2D
+VAL 0x00000002 SQ_TEX_DIM_3D
+VAL 0x00000003 SQ_TEX_DIM_CUBEMAP
+VAL 0x00000004 SQ_TEX_DIM_1D_ARRAY
+VAL 0x00000005 SQ_TEX_DIM_2D_ARRAY
+VAL 0x00000006 SQ_TEX_DIM_2D_MSAA
+VAL 0x00000007 SQ_TEX_DIM_2D_ARRAY_MSAA
+FLD  3 0x00000001 0x00000000 0 IGNORE_SHADER_ENGINE_TILING
+FLD  6 0x00000fff 0x00000000 0 PITCH
+FLD 18 0x00003fff 0x00000000 0 TEX_WIDTH
+REG 0x00031604 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD1_VS
+FLD  0 0x00003fff 0x00000000 0 TEX_HEIGHT
+FLD 14 0x00001fff 0x00000000 0 TEX_DEPTH
+FLD 28 0x0000000f 0x00000000 0 ARRAY_MODE
+REG 0x00031608 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD2_VS
+REG 0x0003160c 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD3_VS
+REG 0x00031610 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD4_VS
+FLD  0 0x00000003 0x00000000 0 FORMAT_COMP_X
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  2 0x00000003 0x00000000 0 FORMAT_COMP_Y
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  4 0x00000003 0x00000000 0 FORMAT_COMP_Z
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  6 0x00000003 0x00000000 0 FORMAT_COMP_W
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  8 0x00000003 0x00000000 0 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 10 0x00000001 0x00000000 0 SRF_MODE_ALL
+FLD 11 0x00000001 0x00000000 0 FORCE_DEGAMMA
+FLD 12 0x00000003 0x00000000 0 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+FLD 16 0x00000007 0x00000000 0 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 19 0x00000007 0x00000000 0 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 22 0x00000007 0x00000000 0 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 25 0x00000007 0x00000000 0 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 28 0x0000000f 0x00000000 0 BASE_LEVEL
+REG 0x00031614 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD5_VS
+FLD  0 0x0000000f 0x00000000 0 LAST_LEVEL
+FLD  4 0x00001fff 0x00000000 0 BASE_ARRAY
+FLD 17 0x00001fff 0x00000000 0 LAST_ARRAY
+REG 0x00031618 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD6_VS
+FLD  3 0x00000007 0x00000000 0 PERF_MODULATION
+FLD  6 0x00000001 0x00000000 0 INTERLACED
+FLD  8 0x00000fff 0x00000000 0 MIN_LOD
+FLD 29 0x00000007 0x00000000 0 TILE_SPLIT
+VAL 0x00000000 SQ_ADDR_SURF_TILE_SPLIT_64B
+VAL 0x00000001 SQ_ADDR_SURF_TILE_SPLIT_128B
+VAL 0x00000002 SQ_ADDR_SURF_TILE_SPLIT_256B
+VAL 0x00000003 SQ_ADDR_SURF_TILE_SPLIT_512B
+VAL 0x00000004 SQ_ADDR_SURF_TILE_SPLIT_1KB
+VAL 0x00000005 SQ_ADDR_SURF_TILE_SPLIT_2KB
+VAL 0x00000006 SQ_ADDR_SURF_TILE_SPLIT_4KB
+REG 0x0003161c 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD7_VS
+FLD  0 0x0000003f 0x00000000 0 DATA_FORMAT
+VAL 0x00000000 FMT_INVALID
+VAL 0x00000001 FMT_8
+VAL 0x00000002 FMT_4_4
+VAL 0x00000003 FMT_3_3_2
+VAL 0x00000005 FMT_16
+VAL 0x00000006 FMT_16_FLOAT
+VAL 0x00000007 FMT_8_8
+VAL 0x00000008 FMT_5_6_5
+VAL 0x00000009 FMT_6_5_5
+VAL 0x0000000a FMT_1_5_5_5
+VAL 0x0000000b FMT_4_4_4_4
+VAL 0x0000000c FMT_5_5_5_1
+VAL 0x0000000d FMT_32
+VAL 0x0000000e FMT_32_FLOAT
+VAL 0x0000000f FMT_16_16
+VAL 0x00000010 FMT_16_16_FLOAT
+VAL 0x00000011 FMT_8_24
+VAL 0x00000012 FMT_8_24_FLOAT
+VAL 0x00000013 FMT_24_8
+VAL 0x00000014 FMT_24_8_FLOAT
+VAL 0x00000015 FMT_10_11_11
+VAL 0x00000016 FMT_10_11_11_FLOAT
+VAL 0x00000017 FMT_11_11_10
+VAL 0x00000018 FMT_11_11_10_FLOAT
+VAL 0x00000019 FMT_2_10_10_10
+VAL 0x0000001a FMT_8_8_8_8
+VAL 0x0000001b FMT_10_10_10_2
+VAL 0x0000001c FMT_X24_8_32_FLOAT
+VAL 0x0000001d FMT_32_32
+VAL 0x0000001e FMT_32_32_FLOAT
+VAL 0x0000001f FMT_16_16_16_16
+VAL 0x00000020 FMT_16_16_16_16_FLOAT
+VAL 0x00000022 FMT_32_32_32_32
+VAL 0x00000023 FMT_32_32_32_32_FLOAT
+VAL 0x00000025 FMT_1
+VAL 0x00000027 FMT_GB_GR
+VAL 0x00000028 FMT_BG_RG
+VAL 0x00000029 FMT_32_AS_8
+VAL 0x0000002a FMT_32_AS_8_8
+VAL 0x0000002b FMT_5_9_9_9_SHAREDEXP
+VAL 0x0000002c FMT_8_8_8
+VAL 0x0000002d FMT_16_16_16
+VAL 0x0000002e FMT_16_16_16_FLOAT
+VAL 0x0000002f FMT_32_32_32
+VAL 0x00000030 FMT_32_32_32_FLOAT
+FLD  6 0x00000003 0x00000000 0 MACRO_TILE_ASPECT
+VAL 0x00000000 SQ_ADDR_SURF_MACRO_ASPECT_1
+VAL 0x00000001 SQ_ADDR_SURF_MACRO_ASPECT_2
+VAL 0x00000002 SQ_ADDR_SURF_MACRO_ASPECT_4
+VAL 0x00000003 SQ_ADDR_SURF_MACRO_ASPECT_8
+FLD  8 0x00000003 0x00000000 0 BANK_WIDTH
+VAL 0x00000000 SQ_ADDR_SURF_BANK_WH_1
+VAL 0x00000001 SQ_ADDR_SURF_BANK_WH_2
+VAL 0x00000002 SQ_ADDR_SURF_BANK_WH_4
+VAL 0x00000003 SQ_ADDR_SURF_BANK_WH_8
+FLD 10 0x00000003 0x00000000 0 BANK_HEIGHT
+VAL 0x00000000 SQ_ADDR_SURF_BANK_WH_1
+VAL 0x00000001 SQ_ADDR_SURF_BANK_WH_2
+VAL 0x00000002 SQ_ADDR_SURF_BANK_WH_4
+VAL 0x00000003 SQ_ADDR_SURF_BANK_WH_8
+FLD 15 0x00000001 0x00000000 0 DEPTH_SAMPLE_ORDER
+FLD 16 0x00000003 0x00000000 0 NUM_BANKS
+VAL 0x00000000 SQ_ADDR_SURF_2_BANK
+VAL 0x00000001 SQ_ADDR_SURF_4_BANK
+VAL 0x00000002 SQ_ADDR_SURF_8_BANK
+VAL 0x00000003 SQ_ADDR_SURF_16_BANK
+FLD 30 0x00000003 0x00000000 0 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x00032a00 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD0_GS
+FLD  0 0x00000007 0x00000000 0 DIM
+VAL 0x00000000 SQ_TEX_DIM_1D
+VAL 0x00000001 SQ_TEX_DIM_2D
+VAL 0x00000002 SQ_TEX_DIM_3D
+VAL 0x00000003 SQ_TEX_DIM_CUBEMAP
+VAL 0x00000004 SQ_TEX_DIM_1D_ARRAY
+VAL 0x00000005 SQ_TEX_DIM_2D_ARRAY
+VAL 0x00000006 SQ_TEX_DIM_2D_MSAA
+VAL 0x00000007 SQ_TEX_DIM_2D_ARRAY_MSAA
+FLD  3 0x00000001 0x00000000 0 IGNORE_SHADER_ENGINE_TILING
+FLD  6 0x00000fff 0x00000000 0 PITCH
+FLD 18 0x00003fff 0x00000000 0 TEX_WIDTH
+REG 0x00032a04 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD1_GS
+FLD  0 0x00003fff 0x00000000 0 TEX_HEIGHT
+FLD 14 0x00001fff 0x00000000 0 TEX_DEPTH
+FLD 28 0x0000000f 0x00000000 0 ARRAY_MODE
+REG 0x00032a08 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD2_GS
+REG 0x00032a0c 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD3_GS
+REG 0x00032a10 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD4_GS
+FLD  0 0x00000003 0x00000000 0 FORMAT_COMP_X
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  2 0x00000003 0x00000000 0 FORMAT_COMP_Y
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  4 0x00000003 0x00000000 0 FORMAT_COMP_Z
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  6 0x00000003 0x00000000 0 FORMAT_COMP_W
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  8 0x00000003 0x00000000 0 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 10 0x00000001 0x00000000 0 SRF_MODE_ALL
+FLD 11 0x00000001 0x00000000 0 FORCE_DEGAMMA
+FLD 12 0x00000003 0x00000000 0 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+FLD 16 0x00000007 0x00000000 0 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 19 0x00000007 0x00000000 0 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 22 0x00000007 0x00000000 0 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 25 0x00000007 0x00000000 0 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 28 0x0000000f 0x00000000 0 BASE_LEVEL
+REG 0x00032a14 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD5_GS
+FLD  0 0x0000000f 0x00000000 0 LAST_LEVEL
+FLD  4 0x00001fff 0x00000000 0 BASE_ARRAY
+FLD 17 0x00001fff 0x00000000 0 LAST_ARRAY
+REG 0x00032a18 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD6_GS
+FLD  3 0x00000007 0x00000000 0 PERF_MODULATION
+FLD  6 0x00000001 0x00000000 0 INTERLACED
+FLD  8 0x00000fff 0x00000000 0 MIN_LOD
+FLD 29 0x00000007 0x00000000 0 TILE_SPLIT
+VAL 0x00000000 SQ_ADDR_SURF_TILE_SPLIT_64B
+VAL 0x00000001 SQ_ADDR_SURF_TILE_SPLIT_128B
+VAL 0x00000002 SQ_ADDR_SURF_TILE_SPLIT_256B
+VAL 0x00000003 SQ_ADDR_SURF_TILE_SPLIT_512B
+VAL 0x00000004 SQ_ADDR_SURF_TILE_SPLIT_1KB
+VAL 0x00000005 SQ_ADDR_SURF_TILE_SPLIT_2KB
+VAL 0x00000006 SQ_ADDR_SURF_TILE_SPLIT_4KB
+REG 0x00032a1c 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD7_GS
+FLD  0 0x0000003f 0x00000000 0 DATA_FORMAT
+VAL 0x00000000 FMT_INVALID
+VAL 0x00000001 FMT_8
+VAL 0x00000002 FMT_4_4
+VAL 0x00000003 FMT_3_3_2
+VAL 0x00000005 FMT_16
+VAL 0x00000006 FMT_16_FLOAT
+VAL 0x00000007 FMT_8_8
+VAL 0x00000008 FMT_5_6_5
+VAL 0x00000009 FMT_6_5_5
+VAL 0x0000000a FMT_1_5_5_5
+VAL 0x0000000b FMT_4_4_4_4
+VAL 0x0000000c FMT_5_5_5_1
+VAL 0x0000000d FMT_32
+VAL 0x0000000e FMT_32_FLOAT
+VAL 0x0000000f FMT_16_16
+VAL 0x00000010 FMT_16_16_FLOAT
+VAL 0x00000011 FMT_8_24
+VAL 0x00000012 FMT_8_24_FLOAT
+VAL 0x00000013 FMT_24_8
+VAL 0x00000014 FMT_24_8_FLOAT
+VAL 0x00000015 FMT_10_11_11
+VAL 0x00000016 FMT_10_11_11_FLOAT
+VAL 0x00000017 FMT_11_11_10
+VAL 0x00000018 FMT_11_11_10_FLOAT
+VAL 0x00000019 FMT_2_10_10_10
+VAL 0x0000001a FMT_8_8_8_8
+VAL 0x0000001b FMT_10_10_10_2
+VAL 0x0000001c FMT_X24_8_32_FLOAT
+VAL 0x0000001d FMT_32_32
+VAL 0x0000001e FMT_32_32_FLOAT
+VAL 0x0000001f FMT_16_16_16_16
+VAL 0x00000020 FMT_16_16_16_16_FLOAT
+VAL 0x00000022 FMT_32_32_32_32
+VAL 0x00000023 FMT_32_32_32_32_FLOAT
+VAL 0x00000025 FMT_1
+VAL 0x00000027 FMT_GB_GR
+VAL 0x00000028 FMT_BG_RG
+VAL 0x00000029 FMT_32_AS_8
+VAL 0x0000002a FMT_32_AS_8_8
+VAL 0x0000002b FMT_5_9_9_9_SHAREDEXP
+VAL 0x0000002c FMT_8_8_8
+VAL 0x0000002d FMT_16_16_16
+VAL 0x0000002e FMT_16_16_16_FLOAT
+VAL 0x0000002f FMT_32_32_32
+VAL 0x00000030 FMT_32_32_32_FLOAT
+FLD  6 0x00000003 0x00000000 0 MACRO_TILE_ASPECT
+VAL 0x00000000 SQ_ADDR_SURF_MACRO_ASPECT_1
+VAL 0x00000001 SQ_ADDR_SURF_MACRO_ASPECT_2
+VAL 0x00000002 SQ_ADDR_SURF_MACRO_ASPECT_4
+VAL 0x00000003 SQ_ADDR_SURF_MACRO_ASPECT_8
+FLD  8 0x00000003 0x00000000 0 BANK_WIDTH
+VAL 0x00000000 SQ_ADDR_SURF_BANK_WH_1
+VAL 0x00000001 SQ_ADDR_SURF_BANK_WH_2
+VAL 0x00000002 SQ_ADDR_SURF_BANK_WH_4
+VAL 0x00000003 SQ_ADDR_SURF_BANK_WH_8
+FLD 10 0x00000003 0x00000000 0 BANK_HEIGHT
+VAL 0x00000000 SQ_ADDR_SURF_BANK_WH_1
+VAL 0x00000001 SQ_ADDR_SURF_BANK_WH_2
+VAL 0x00000002 SQ_ADDR_SURF_BANK_WH_4
+VAL 0x00000003 SQ_ADDR_SURF_BANK_WH_8
+FLD 15 0x00000001 0x00000000 0 DEPTH_SAMPLE_ORDER
+FLD 16 0x00000003 0x00000000 0 NUM_BANKS
+VAL 0x00000000 SQ_ADDR_SURF_2_BANK
+VAL 0x00000001 SQ_ADDR_SURF_4_BANK
+VAL 0x00000002 SQ_ADDR_SURF_8_BANK
+VAL 0x00000003 SQ_ADDR_SURF_16_BANK
+FLD 30 0x00000003 0x00000000 0 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x00033e00 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD0_HS
+FLD  0 0x00000007 0x00000000 0 DIM
+VAL 0x00000000 SQ_TEX_DIM_1D
+VAL 0x00000001 SQ_TEX_DIM_2D
+VAL 0x00000002 SQ_TEX_DIM_3D
+VAL 0x00000003 SQ_TEX_DIM_CUBEMAP
+VAL 0x00000004 SQ_TEX_DIM_1D_ARRAY
+VAL 0x00000005 SQ_TEX_DIM_2D_ARRAY
+VAL 0x00000006 SQ_TEX_DIM_2D_MSAA
+VAL 0x00000007 SQ_TEX_DIM_2D_ARRAY_MSAA
+FLD  3 0x00000001 0x00000000 0 IGNORE_SHADER_ENGINE_TILING
+FLD  6 0x00000fff 0x00000000 0 PITCH
+FLD 18 0x00003fff 0x00000000 0 TEX_WIDTH
+REG 0x00033e04 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD1_HS
+FLD  0 0x00003fff 0x00000000 0 TEX_HEIGHT
+FLD 14 0x00001fff 0x00000000 0 TEX_DEPTH
+FLD 28 0x0000000f 0x00000000 0 ARRAY_MODE
+REG 0x00033e08 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD2_HS
+REG 0x00033e0c 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD3_HS
+REG 0x00033e10 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD4_HS
+FLD  0 0x00000003 0x00000000 0 FORMAT_COMP_X
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  2 0x00000003 0x00000000 0 FORMAT_COMP_Y
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  4 0x00000003 0x00000000 0 FORMAT_COMP_Z
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  6 0x00000003 0x00000000 0 FORMAT_COMP_W
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  8 0x00000003 0x00000000 0 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 10 0x00000001 0x00000000 0 SRF_MODE_ALL
+FLD 11 0x00000001 0x00000000 0 FORCE_DEGAMMA
+FLD 12 0x00000003 0x00000000 0 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+FLD 16 0x00000007 0x00000000 0 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 19 0x00000007 0x00000000 0 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 22 0x00000007 0x00000000 0 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 25 0x00000007 0x00000000 0 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 28 0x0000000f 0x00000000 0 BASE_LEVEL
+REG 0x00033e14 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD5_HS
+FLD  0 0x0000000f 0x00000000 0 LAST_LEVEL
+FLD  4 0x00001fff 0x00000000 0 BASE_ARRAY
+FLD 17 0x00001fff 0x00000000 0 LAST_ARRAY
+REG 0x00033e18 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD6_HS
+FLD  3 0x00000007 0x00000000 0 PERF_MODULATION
+FLD  6 0x00000001 0x00000000 0 INTERLACED
+FLD  8 0x00000fff 0x00000000 0 MIN_LOD
+FLD 29 0x00000007 0x00000000 0 TILE_SPLIT
+VAL 0x00000000 SQ_ADDR_SURF_TILE_SPLIT_64B
+VAL 0x00000001 SQ_ADDR_SURF_TILE_SPLIT_128B
+VAL 0x00000002 SQ_ADDR_SURF_TILE_SPLIT_256B
+VAL 0x00000003 SQ_ADDR_SURF_TILE_SPLIT_512B
+VAL 0x00000004 SQ_ADDR_SURF_TILE_SPLIT_1KB
+VAL 0x00000005 SQ_ADDR_SURF_TILE_SPLIT_2KB
+VAL 0x00000006 SQ_ADDR_SURF_TILE_SPLIT_4KB
+REG 0x00033e1c 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD7_HS
+FLD  0 0x0000003f 0x00000000 0 DATA_FORMAT
+VAL 0x00000000 FMT_INVALID
+VAL 0x00000001 FMT_8
+VAL 0x00000002 FMT_4_4
+VAL 0x00000003 FMT_3_3_2
+VAL 0x00000005 FMT_16
+VAL 0x00000006 FMT_16_FLOAT
+VAL 0x00000007 FMT_8_8
+VAL 0x00000008 FMT_5_6_5
+VAL 0x00000009 FMT_6_5_5
+VAL 0x0000000a FMT_1_5_5_5
+VAL 0x0000000b FMT_4_4_4_4
+VAL 0x0000000c FMT_5_5_5_1
+VAL 0x0000000d FMT_32
+VAL 0x0000000e FMT_32_FLOAT
+VAL 0x0000000f FMT_16_16
+VAL 0x00000010 FMT_16_16_FLOAT
+VAL 0x00000011 FMT_8_24
+VAL 0x00000012 FMT_8_24_FLOAT
+VAL 0x00000013 FMT_24_8
+VAL 0x00000014 FMT_24_8_FLOAT
+VAL 0x00000015 FMT_10_11_11
+VAL 0x00000016 FMT_10_11_11_FLOAT
+VAL 0x00000017 FMT_11_11_10
+VAL 0x00000018 FMT_11_11_10_FLOAT
+VAL 0x00000019 FMT_2_10_10_10
+VAL 0x0000001a FMT_8_8_8_8
+VAL 0x0000001b FMT_10_10_10_2
+VAL 0x0000001c FMT_X24_8_32_FLOAT
+VAL 0x0000001d FMT_32_32
+VAL 0x0000001e FMT_32_32_FLOAT
+VAL 0x0000001f FMT_16_16_16_16
+VAL 0x00000020 FMT_16_16_16_16_FLOAT
+VAL 0x00000022 FMT_32_32_32_32
+VAL 0x00000023 FMT_32_32_32_32_FLOAT
+VAL 0x00000025 FMT_1
+VAL 0x00000027 FMT_GB_GR
+VAL 0x00000028 FMT_BG_RG
+VAL 0x00000029 FMT_32_AS_8
+VAL 0x0000002a FMT_32_AS_8_8
+VAL 0x0000002b FMT_5_9_9_9_SHAREDEXP
+VAL 0x0000002c FMT_8_8_8
+VAL 0x0000002d FMT_16_16_16
+VAL 0x0000002e FMT_16_16_16_FLOAT
+VAL 0x0000002f FMT_32_32_32
+VAL 0x00000030 FMT_32_32_32_FLOAT
+FLD  6 0x00000003 0x00000000 0 MACRO_TILE_ASPECT
+VAL 0x00000000 SQ_ADDR_SURF_MACRO_ASPECT_1
+VAL 0x00000001 SQ_ADDR_SURF_MACRO_ASPECT_2
+VAL 0x00000002 SQ_ADDR_SURF_MACRO_ASPECT_4
+VAL 0x00000003 SQ_ADDR_SURF_MACRO_ASPECT_8
+FLD  8 0x00000003 0x00000000 0 BANK_WIDTH
+VAL 0x00000000 SQ_ADDR_SURF_BANK_WH_1
+VAL 0x00000001 SQ_ADDR_SURF_BANK_WH_2
+VAL 0x00000002 SQ_ADDR_SURF_BANK_WH_4
+VAL 0x00000003 SQ_ADDR_SURF_BANK_WH_8
+FLD 10 0x00000003 0x00000000 0 BANK_HEIGHT
+VAL 0x00000000 SQ_ADDR_SURF_BANK_WH_1
+VAL 0x00000001 SQ_ADDR_SURF_BANK_WH_2
+VAL 0x00000002 SQ_ADDR_SURF_BANK_WH_4
+VAL 0x00000003 SQ_ADDR_SURF_BANK_WH_8
+FLD 15 0x00000001 0x00000000 0 DEPTH_SAMPLE_ORDER
+FLD 16 0x00000003 0x00000000 0 NUM_BANKS
+VAL 0x00000000 SQ_ADDR_SURF_2_BANK
+VAL 0x00000001 SQ_ADDR_SURF_4_BANK
+VAL 0x00000002 SQ_ADDR_SURF_8_BANK
+VAL 0x00000003 SQ_ADDR_SURF_16_BANK
+FLD 30 0x00000003 0x00000000 0 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x00035200 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD0_LS
+FLD  0 0x00000007 0x00000000 0 DIM
+VAL 0x00000000 SQ_TEX_DIM_1D
+VAL 0x00000001 SQ_TEX_DIM_2D
+VAL 0x00000002 SQ_TEX_DIM_3D
+VAL 0x00000003 SQ_TEX_DIM_CUBEMAP
+VAL 0x00000004 SQ_TEX_DIM_1D_ARRAY
+VAL 0x00000005 SQ_TEX_DIM_2D_ARRAY
+VAL 0x00000006 SQ_TEX_DIM_2D_MSAA
+VAL 0x00000007 SQ_TEX_DIM_2D_ARRAY_MSAA
+FLD  3 0x00000001 0x00000000 0 IGNORE_SHADER_ENGINE_TILING
+FLD  6 0x00000fff 0x00000000 0 PITCH
+FLD 18 0x00003fff 0x00000000 0 TEX_WIDTH
+REG 0x00035204 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD1_LS
+FLD  0 0x00003fff 0x00000000 0 TEX_HEIGHT
+FLD 14 0x00001fff 0x00000000 0 TEX_DEPTH
+FLD 28 0x0000000f 0x00000000 0 ARRAY_MODE
+REG 0x00035208 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD2_LS
+REG 0x0003520c 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD3_LS
+REG 0x00035210 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD4_LS
+FLD  0 0x00000003 0x00000000 0 FORMAT_COMP_X
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  2 0x00000003 0x00000000 0 FORMAT_COMP_Y
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  4 0x00000003 0x00000000 0 FORMAT_COMP_Z
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  6 0x00000003 0x00000000 0 FORMAT_COMP_W
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  8 0x00000003 0x00000000 0 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 10 0x00000001 0x00000000 0 SRF_MODE_ALL
+FLD 11 0x00000001 0x00000000 0 FORCE_DEGAMMA
+FLD 12 0x00000003 0x00000000 0 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+FLD 16 0x00000007 0x00000000 0 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 19 0x00000007 0x00000000 0 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 22 0x00000007 0x00000000 0 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 25 0x00000007 0x00000000 0 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 28 0x0000000f 0x00000000 0 BASE_LEVEL
+REG 0x00035214 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD5_LS
+FLD  0 0x0000000f 0x00000000 0 LAST_LEVEL
+FLD  4 0x00001fff 0x00000000 0 BASE_ARRAY
+FLD 17 0x00001fff 0x00000000 0 LAST_ARRAY
+REG 0x00035218 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD6_LS
+FLD  3 0x00000007 0x00000000 0 PERF_MODULATION
+FLD  6 0x00000001 0x00000000 0 INTERLACED
+FLD  8 0x00000fff 0x00000000 0 MIN_LOD
+FLD 29 0x00000007 0x00000000 0 TILE_SPLIT
+VAL 0x00000000 SQ_ADDR_SURF_TILE_SPLIT_64B
+VAL 0x00000001 SQ_ADDR_SURF_TILE_SPLIT_128B
+VAL 0x00000002 SQ_ADDR_SURF_TILE_SPLIT_256B
+VAL 0x00000003 SQ_ADDR_SURF_TILE_SPLIT_512B
+VAL 0x00000004 SQ_ADDR_SURF_TILE_SPLIT_1KB
+VAL 0x00000005 SQ_ADDR_SURF_TILE_SPLIT_2KB
+VAL 0x00000006 SQ_ADDR_SURF_TILE_SPLIT_4KB
+REG 0x0003521c 0x0000010c 0x0000000f 32    0  160   32 SQ_TEX_RESOURCE_WORD7_LS
+FLD  0 0x0000003f 0x00000000 0 DATA_FORMAT
+VAL 0x00000000 FMT_INVALID
+VAL 0x00000001 FMT_8
+VAL 0x00000002 FMT_4_4
+VAL 0x00000003 FMT_3_3_2
+VAL 0x00000005 FMT_16
+VAL 0x00000006 FMT_16_FLOAT
+VAL 0x00000007 FMT_8_8
+VAL 0x00000008 FMT_5_6_5
+VAL 0x00000009 FMT_6_5_5
+VAL 0x0000000a FMT_1_5_5_5
+VAL 0x0000000b FMT_4_4_4_4
+VAL 0x0000000c FMT_5_5_5_1
+VAL 0x0000000d FMT_32
+VAL 0x0000000e FMT_32_FLOAT
+VAL 0x0000000f FMT_16_16
+VAL 0x00000010 FMT_16_16_FLOAT
+VAL 0x00000011 FMT_8_24
+VAL 0x00000012 FMT_8_24_FLOAT
+VAL 0x00000013 FMT_24_8
+VAL 0x00000014 FMT_24_8_FLOAT
+VAL 0x00000015 FMT_10_11_11
+VAL 0x00000016 FMT_10_11_11_FLOAT
+VAL 0x00000017 FMT_11_11_10
+VAL 0x00000018 FMT_11_11_10_FLOAT
+VAL 0x00000019 FMT_2_10_10_10
+VAL 0x0000001a FMT_8_8_8_8
+VAL 0x0000001b FMT_10_10_10_2
+VAL 0x0000001c FMT_X24_8_32_FLOAT
+VAL 0x0000001d FMT_32_32
+VAL 0x0000001e FMT_32_32_FLOAT
+VAL 0x0000001f FMT_16_16_16_16
+VAL 0x00000020 FMT_16_16_16_16_FLOAT
+VAL 0x00000022 FMT_32_32_32_32
+VAL 0x00000023 FMT_32_32_32_32_FLOAT
+VAL 0x00000025 FMT_1
+VAL 0x00000027 FMT_GB_GR
+VAL 0x00000028 FMT_BG_RG
+VAL 0x00000029 FMT_32_AS_8
+VAL 0x0000002a FMT_32_AS_8_8
+VAL 0x0000002b FMT_5_9_9_9_SHAREDEXP
+VAL 0x0000002c FMT_8_8_8
+VAL 0x0000002d FMT_16_16_16
+VAL 0x0000002e FMT_16_16_16_FLOAT
+VAL 0x0000002f FMT_32_32_32
+VAL 0x00000030 FMT_32_32_32_FLOAT
+FLD  6 0x00000003 0x00000000 0 MACRO_TILE_ASPECT
+VAL 0x00000000 SQ_ADDR_SURF_MACRO_ASPECT_1
+VAL 0x00000001 SQ_ADDR_SURF_MACRO_ASPECT_2
+VAL 0x00000002 SQ_ADDR_SURF_MACRO_ASPECT_4
+VAL 0x00000003 SQ_ADDR_SURF_MACRO_ASPECT_8
+FLD  8 0x00000003 0x00000000 0 BANK_WIDTH
+VAL 0x00000000 SQ_ADDR_SURF_BANK_WH_1
+VAL 0x00000001 SQ_ADDR_SURF_BANK_WH_2
+VAL 0x00000002 SQ_ADDR_SURF_BANK_WH_4
+VAL 0x00000003 SQ_ADDR_SURF_BANK_WH_8
+FLD 10 0x00000003 0x00000000 0 BANK_HEIGHT
+VAL 0x00000000 SQ_ADDR_SURF_BANK_WH_1
+VAL 0x00000001 SQ_ADDR_SURF_BANK_WH_2
+VAL 0x00000002 SQ_ADDR_SURF_BANK_WH_4
+VAL 0x00000003 SQ_ADDR_SURF_BANK_WH_8
+FLD 15 0x00000001 0x00000000 0 DEPTH_SAMPLE_ORDER
+FLD 16 0x00000003 0x00000000 0 NUM_BANKS
+VAL 0x00000000 SQ_ADDR_SURF_2_BANK
+VAL 0x00000001 SQ_ADDR_SURF_4_BANK
+VAL 0x00000002 SQ_ADDR_SURF_8_BANK
+VAL 0x00000003 SQ_ADDR_SURF_16_BANK
+FLD 30 0x00000003 0x00000000 0 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x00036600 0x0000010c 0x0000000f 32    0  176   32 SQ_TEX_RESOURCE_WORD0_CS
+FLD  0 0x00000007 0x00000000 0 DIM
+VAL 0x00000000 SQ_TEX_DIM_1D
+VAL 0x00000001 SQ_TEX_DIM_2D
+VAL 0x00000002 SQ_TEX_DIM_3D
+VAL 0x00000003 SQ_TEX_DIM_CUBEMAP
+VAL 0x00000004 SQ_TEX_DIM_1D_ARRAY
+VAL 0x00000005 SQ_TEX_DIM_2D_ARRAY
+VAL 0x00000006 SQ_TEX_DIM_2D_MSAA
+VAL 0x00000007 SQ_TEX_DIM_2D_ARRAY_MSAA
+FLD  3 0x00000001 0x00000000 0 IGNORE_SHADER_ENGINE_TILING
+FLD  6 0x00000fff 0x00000000 0 PITCH
+FLD 18 0x00003fff 0x00000000 0 TEX_WIDTH
+REG 0x00036604 0x0000010c 0x0000000f 32    0  176   32 SQ_TEX_RESOURCE_WORD1_CS
+FLD  0 0x00003fff 0x00000000 0 TEX_HEIGHT
+FLD 14 0x00001fff 0x00000000 0 TEX_DEPTH
+FLD 28 0x0000000f 0x00000000 0 ARRAY_MODE
+REG 0x00036608 0x0000010c 0x0000000f 32    0  176   32 SQ_TEX_RESOURCE_WORD2_CS
+REG 0x0003660c 0x0000010c 0x0000000f 32    0  176   32 SQ_TEX_RESOURCE_WORD3_CS
+REG 0x00036610 0x0000010c 0x0000000f 32    0  176   32 SQ_TEX_RESOURCE_WORD4_CS
+FLD  0 0x00000003 0x00000000 0 FORMAT_COMP_X
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  2 0x00000003 0x00000000 0 FORMAT_COMP_Y
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  4 0x00000003 0x00000000 0 FORMAT_COMP_Z
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  6 0x00000003 0x00000000 0 FORMAT_COMP_W
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  8 0x00000003 0x00000000 0 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 10 0x00000001 0x00000000 0 SRF_MODE_ALL
+FLD 11 0x00000001 0x00000000 0 FORCE_DEGAMMA
+FLD 12 0x00000003 0x00000000 0 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+FLD 16 0x00000007 0x00000000 0 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 19 0x00000007 0x00000000 0 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 22 0x00000007 0x00000000 0 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 25 0x00000007 0x00000000 0 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 28 0x0000000f 0x00000000 0 BASE_LEVEL
+REG 0x00036614 0x0000010c 0x0000000f 32    0  176   32 SQ_TEX_RESOURCE_WORD5_CS
+FLD  0 0x0000000f 0x00000000 0 LAST_LEVEL
+FLD  4 0x00001fff 0x00000000 0 BASE_ARRAY
+FLD 17 0x00001fff 0x00000000 0 LAST_ARRAY
+REG 0x00036618 0x0000010c 0x0000000f 32    0  176   32 SQ_TEX_RESOURCE_WORD6_CS
+FLD  3 0x00000007 0x00000000 0 PERF_MODULATION
+FLD  6 0x00000001 0x00000000 0 INTERLACED
+FLD  8 0x00000fff 0x00000000 0 MIN_LOD
+FLD 29 0x00000007 0x00000000 0 TILE_SPLIT
+VAL 0x00000000 SQ_ADDR_SURF_TILE_SPLIT_64B
+VAL 0x00000001 SQ_ADDR_SURF_TILE_SPLIT_128B
+VAL 0x00000002 SQ_ADDR_SURF_TILE_SPLIT_256B
+VAL 0x00000003 SQ_ADDR_SURF_TILE_SPLIT_512B
+VAL 0x00000004 SQ_ADDR_SURF_TILE_SPLIT_1KB
+VAL 0x00000005 SQ_ADDR_SURF_TILE_SPLIT_2KB
+VAL 0x00000006 SQ_ADDR_SURF_TILE_SPLIT_4KB
+REG 0x0003661c 0x0000010c 0x0000000f 32    0  176   32 SQ_TEX_RESOURCE_WORD7_CS
+FLD  0 0x0000003f 0x00000000 0 DATA_FORMAT
+VAL 0x00000000 FMT_INVALID
+VAL 0x00000001 FMT_8
+VAL 0x00000002 FMT_4_4
+VAL 0x00000003 FMT_3_3_2
+VAL 0x00000005 FMT_16
+VAL 0x00000006 FMT_16_FLOAT
+VAL 0x00000007 FMT_8_8
+VAL 0x00000008 FMT_5_6_5
+VAL 0x00000009 FMT_6_5_5
+VAL 0x0000000a FMT_1_5_5_5
+VAL 0x0000000b FMT_4_4_4_4
+VAL 0x0000000c FMT_5_5_5_1
+VAL 0x0000000d FMT_32
+VAL 0x0000000e FMT_32_FLOAT
+VAL 0x0000000f FMT_16_16
+VAL 0x00000010 FMT_16_16_FLOAT
+VAL 0x00000011 FMT_8_24
+VAL 0x00000012 FMT_8_24_FLOAT
+VAL 0x00000013 FMT_24_8
+VAL 0x00000014 FMT_24_8_FLOAT
+VAL 0x00000015 FMT_10_11_11
+VAL 0x00000016 FMT_10_11_11_FLOAT
+VAL 0x00000017 FMT_11_11_10
+VAL 0x00000018 FMT_11_11_10_FLOAT
+VAL 0x00000019 FMT_2_10_10_10
+VAL 0x0000001a FMT_8_8_8_8
+VAL 0x0000001b FMT_10_10_10_2
+VAL 0x0000001c FMT_X24_8_32_FLOAT
+VAL 0x0000001d FMT_32_32
+VAL 0x0000001e FMT_32_32_FLOAT
+VAL 0x0000001f FMT_16_16_16_16
+VAL 0x00000020 FMT_16_16_16_16_FLOAT
+VAL 0x00000022 FMT_32_32_32_32
+VAL 0x00000023 FMT_32_32_32_32_FLOAT
+VAL 0x00000025 FMT_1
+VAL 0x00000027 FMT_GB_GR
+VAL 0x00000028 FMT_BG_RG
+VAL 0x00000029 FMT_32_AS_8
+VAL 0x0000002a FMT_32_AS_8_8
+VAL 0x0000002b FMT_5_9_9_9_SHAREDEXP
+VAL 0x0000002c FMT_8_8_8
+VAL 0x0000002d FMT_16_16_16
+VAL 0x0000002e FMT_16_16_16_FLOAT
+VAL 0x0000002f FMT_32_32_32
+VAL 0x00000030 FMT_32_32_32_FLOAT
+FLD  6 0x00000003 0x00000000 0 MACRO_TILE_ASPECT
+VAL 0x00000000 SQ_ADDR_SURF_MACRO_ASPECT_1
+VAL 0x00000001 SQ_ADDR_SURF_MACRO_ASPECT_2
+VAL 0x00000002 SQ_ADDR_SURF_MACRO_ASPECT_4
+VAL 0x00000003 SQ_ADDR_SURF_MACRO_ASPECT_8
+FLD  8 0x00000003 0x00000000 0 BANK_WIDTH
+VAL 0x00000000 SQ_ADDR_SURF_BANK_WH_1
+VAL 0x00000001 SQ_ADDR_SURF_BANK_WH_2
+VAL 0x00000002 SQ_ADDR_SURF_BANK_WH_4
+VAL 0x00000003 SQ_ADDR_SURF_BANK_WH_8
+FLD 10 0x00000003 0x00000000 0 BANK_HEIGHT
+VAL 0x00000000 SQ_ADDR_SURF_BANK_WH_1
+VAL 0x00000001 SQ_ADDR_SURF_BANK_WH_2
+VAL 0x00000002 SQ_ADDR_SURF_BANK_WH_4
+VAL 0x00000003 SQ_ADDR_SURF_BANK_WH_8
+FLD 15 0x00000001 0x00000000 0 DEPTH_SAMPLE_ORDER
+FLD 16 0x00000003 0x00000000 0 NUM_BANKS
+VAL 0x00000000 SQ_ADDR_SURF_2_BANK
+VAL 0x00000001 SQ_ADDR_SURF_4_BANK
+VAL 0x00000002 SQ_ADDR_SURF_8_BANK
+VAL 0x00000003 SQ_ADDR_SURF_16_BANK
+FLD 30 0x00000003 0x00000000 0 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x00037c00 0x0000010c 0x0000000f 32    0   32   32 SQ_TEX_RESOURCE_WORD0_FS
+FLD  0 0x00000007 0x00000000 0 DIM
+VAL 0x00000000 SQ_TEX_DIM_1D
+VAL 0x00000001 SQ_TEX_DIM_2D
+VAL 0x00000002 SQ_TEX_DIM_3D
+VAL 0x00000003 SQ_TEX_DIM_CUBEMAP
+VAL 0x00000004 SQ_TEX_DIM_1D_ARRAY
+VAL 0x00000005 SQ_TEX_DIM_2D_ARRAY
+VAL 0x00000006 SQ_TEX_DIM_2D_MSAA
+VAL 0x00000007 SQ_TEX_DIM_2D_ARRAY_MSAA
+FLD  3 0x00000001 0x00000000 0 IGNORE_SHADER_ENGINE_TILING
+FLD  6 0x00000fff 0x00000000 0 PITCH
+FLD 18 0x00003fff 0x00000000 0 TEX_WIDTH
+REG 0x00037c04 0x0000010c 0x0000000f 32    0   32   32 SQ_TEX_RESOURCE_WORD1_FS
+FLD  0 0x00003fff 0x00000000 0 TEX_HEIGHT
+FLD 14 0x00001fff 0x00000000 0 TEX_DEPTH
+FLD 28 0x0000000f 0x00000000 0 ARRAY_MODE
+REG 0x00037c08 0x0000010c 0x0000000f 32    0   32   32 SQ_TEX_RESOURCE_WORD2_FS
+REG 0x00037c0c 0x0000010c 0x0000000f 32    0   32   32 SQ_TEX_RESOURCE_WORD3_FS
+REG 0x00037c10 0x0000010c 0x0000000f 32    0   32   32 SQ_TEX_RESOURCE_WORD4_FS
+FLD  0 0x00000003 0x00000000 0 FORMAT_COMP_X
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  2 0x00000003 0x00000000 0 FORMAT_COMP_Y
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  4 0x00000003 0x00000000 0 FORMAT_COMP_Z
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  6 0x00000003 0x00000000 0 FORMAT_COMP_W
+VAL 0x00000000 SQ_FORMAT_COMP_UNSIGNED
+VAL 0x00000001 SQ_FORMAT_COMP_SIGNED
+VAL 0x00000002 SQ_FORMAT_COMP_UNSIGNED_BIASED
+FLD  8 0x00000003 0x00000000 0 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 10 0x00000001 0x00000000 0 SRF_MODE_ALL
+FLD 11 0x00000001 0x00000000 0 FORCE_DEGAMMA
+FLD 12 0x00000003 0x00000000 0 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+FLD 16 0x00000007 0x00000000 0 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 19 0x00000007 0x00000000 0 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 22 0x00000007 0x00000000 0 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 25 0x00000007 0x00000000 0 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 28 0x0000000f 0x00000000 0 BASE_LEVEL
+REG 0x00037c14 0x0000010c 0x0000000f 32    0   32   32 SQ_TEX_RESOURCE_WORD5_FS
+FLD  0 0x0000000f 0x00000000 0 LAST_LEVEL
+FLD  4 0x00001fff 0x00000000 0 BASE_ARRAY
+FLD 17 0x00001fff 0x00000000 0 LAST_ARRAY
+REG 0x00037c18 0x0000010c 0x0000000f 32    0   32   32 SQ_TEX_RESOURCE_WORD6_FS
+FLD  3 0x00000007 0x00000000 0 PERF_MODULATION
+FLD  6 0x00000001 0x00000000 0 INTERLACED
+FLD  8 0x00000fff 0x00000000 0 MIN_LOD
+FLD 29 0x00000007 0x00000000 0 TILE_SPLIT
+VAL 0x00000000 SQ_ADDR_SURF_TILE_SPLIT_64B
+VAL 0x00000001 SQ_ADDR_SURF_TILE_SPLIT_128B
+VAL 0x00000002 SQ_ADDR_SURF_TILE_SPLIT_256B
+VAL 0x00000003 SQ_ADDR_SURF_TILE_SPLIT_512B
+VAL 0x00000004 SQ_ADDR_SURF_TILE_SPLIT_1KB
+VAL 0x00000005 SQ_ADDR_SURF_TILE_SPLIT_2KB
+VAL 0x00000006 SQ_ADDR_SURF_TILE_SPLIT_4KB
+REG 0x00037c1c 0x0000010c 0x0000000f 32    0   32   32 SQ_TEX_RESOURCE_WORD7_FS
+FLD  0 0x0000003f 0x00000000 0 DATA_FORMAT
+VAL 0x00000000 FMT_INVALID
+VAL 0x00000001 FMT_8
+VAL 0x00000002 FMT_4_4
+VAL 0x00000003 FMT_3_3_2
+VAL 0x00000005 FMT_16
+VAL 0x00000006 FMT_16_FLOAT
+VAL 0x00000007 FMT_8_8
+VAL 0x00000008 FMT_5_6_5
+VAL 0x00000009 FMT_6_5_5
+VAL 0x0000000a FMT_1_5_5_5
+VAL 0x0000000b FMT_4_4_4_4
+VAL 0x0000000c FMT_5_5_5_1
+VAL 0x0000000d FMT_32
+VAL 0x0000000e FMT_32_FLOAT
+VAL 0x0000000f FMT_16_16
+VAL 0x00000010 FMT_16_16_FLOAT
+VAL 0x00000011 FMT_8_24
+VAL 0x00000012 FMT_8_24_FLOAT
+VAL 0x00000013 FMT_24_8
+VAL 0x00000014 FMT_24_8_FLOAT
+VAL 0x00000015 FMT_10_11_11
+VAL 0x00000016 FMT_10_11_11_FLOAT
+VAL 0x00000017 FMT_11_11_10
+VAL 0x00000018 FMT_11_11_10_FLOAT
+VAL 0x00000019 FMT_2_10_10_10
+VAL 0x0000001a FMT_8_8_8_8
+VAL 0x0000001b FMT_10_10_10_2
+VAL 0x0000001c FMT_X24_8_32_FLOAT
+VAL 0x0000001d FMT_32_32
+VAL 0x0000001e FMT_32_32_FLOAT
+VAL 0x0000001f FMT_16_16_16_16
+VAL 0x00000020 FMT_16_16_16_16_FLOAT
+VAL 0x00000022 FMT_32_32_32_32
+VAL 0x00000023 FMT_32_32_32_32_FLOAT
+VAL 0x00000025 FMT_1
+VAL 0x00000027 FMT_GB_GR
+VAL 0x00000028 FMT_BG_RG
+VAL 0x00000029 FMT_32_AS_8
+VAL 0x0000002a FMT_32_AS_8_8
+VAL 0x0000002b FMT_5_9_9_9_SHAREDEXP
+VAL 0x0000002c FMT_8_8_8
+VAL 0x0000002d FMT_16_16_16
+VAL 0x0000002e FMT_16_16_16_FLOAT
+VAL 0x0000002f FMT_32_32_32
+VAL 0x00000030 FMT_32_32_32_FLOAT
+FLD  6 0x00000003 0x00000000 0 MACRO_TILE_ASPECT
+VAL 0x00000000 SQ_ADDR_SURF_MACRO_ASPECT_1
+VAL 0x00000001 SQ_ADDR_SURF_MACRO_ASPECT_2
+VAL 0x00000002 SQ_ADDR_SURF_MACRO_ASPECT_4
+VAL 0x00000003 SQ_ADDR_SURF_MACRO_ASPECT_8
+FLD  8 0x00000003 0x00000000 0 BANK_WIDTH
+VAL 0x00000000 SQ_ADDR_SURF_BANK_WH_1
+VAL 0x00000001 SQ_ADDR_SURF_BANK_WH_2
+VAL 0x00000002 SQ_ADDR_SURF_BANK_WH_4
+VAL 0x00000003 SQ_ADDR_SURF_BANK_WH_8
+FLD 10 0x00000003 0x00000000 0 BANK_HEIGHT
+VAL 0x00000000 SQ_ADDR_SURF_BANK_WH_1
+VAL 0x00000001 SQ_ADDR_SURF_BANK_WH_2
+VAL 0x00000002 SQ_ADDR_SURF_BANK_WH_4
+VAL 0x00000003 SQ_ADDR_SURF_BANK_WH_8
+FLD 15 0x00000001 0x00000000 0 DEPTH_SAMPLE_ORDER
+FLD 16 0x00000003 0x00000000 0 NUM_BANKS
+VAL 0x00000000 SQ_ADDR_SURF_2_BANK
+VAL 0x00000001 SQ_ADDR_SURF_4_BANK
+VAL 0x00000002 SQ_ADDR_SURF_8_BANK
+VAL 0x00000003 SQ_ADDR_SURF_16_BANK
+FLD 30 0x00000003 0x00000000 0 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x00030000 0x0000010e 0x00000000 32    0  176   32 SQ_VTX_CONSTANT_WORD0_PS
+REG 0x00030004 0x0000010e 0x00000000 32    0  176   32 SQ_VTX_CONSTANT_WORD1_PS
+REG 0x00030008 0x0000010e 0x00000000 32    0  176   32 SQ_VTX_CONSTANT_WORD2_PS
+FLD  0 0x000000ff 0x00000000 0 BASE_ADDRESS_HI
+FLD  8 0x000007ff 0x00000000 0 STRIDE
+FLD 19 0x00000001 0x00000000 0 CLAMP_X
+FLD 20 0x0000003f 0x00000000 0 DATA_FORMAT
+VAL 0x00000000 FMT_INVALID
+VAL 0x00000001 FMT_8
+VAL 0x00000002 FMT_4_4
+VAL 0x00000003 FMT_3_3_2
+VAL 0x00000005 FMT_16
+VAL 0x00000006 FMT_16_FLOAT
+VAL 0x00000007 FMT_8_8
+VAL 0x00000008 FMT_5_6_5
+VAL 0x00000009 FMT_6_5_5
+VAL 0x0000000a FMT_1_5_5_5
+VAL 0x0000000b FMT_4_4_4_4
+VAL 0x0000000c FMT_5_5_5_1
+VAL 0x0000000d FMT_32
+VAL 0x0000000e FMT_32_FLOAT
+VAL 0x0000000f FMT_16_16
+VAL 0x00000010 FMT_16_16_FLOAT
+VAL 0x00000011 FMT_8_24
+VAL 0x00000012 FMT_8_24_FLOAT
+VAL 0x00000013 FMT_24_8
+VAL 0x00000014 FMT_24_8_FLOAT
+VAL 0x00000015 FMT_10_11_11
+VAL 0x00000016 FMT_10_11_11_FLOAT
+VAL 0x00000017 FMT_11_11_10
+VAL 0x00000018 FMT_11_11_10_FLOAT
+VAL 0x00000019 FMT_2_10_10_10
+VAL 0x0000001a FMT_8_8_8_8
+VAL 0x0000001b FMT_10_10_10_2
+VAL 0x0000001c FMT_X24_8_32_FLOAT
+VAL 0x0000001d FMT_32_32
+VAL 0x0000001e FMT_32_32_FLOAT
+VAL 0x0000001f FMT_16_16_16_16
+VAL 0x00000020 FMT_16_16_16_16_FLOAT
+VAL 0x00000022 FMT_32_32_32_32
+VAL 0x00000023 FMT_32_32_32_32_FLOAT
+VAL 0x00000025 FMT_1
+VAL 0x00000027 FMT_GB_GR
+VAL 0x00000028 FMT_BG_RG
+VAL 0x00000029 FMT_32_AS_8
+VAL 0x0000002a FMT_32_AS_8_8
+VAL 0x0000002b FMT_5_9_9_9_SHAREDEXP
+VAL 0x0000002c FMT_8_8_8
+VAL 0x0000002d FMT_16_16_16
+VAL 0x0000002e FMT_16_16_16_FLOAT
+VAL 0x0000002f FMT_32_32_32
+VAL 0x00000030 FMT_32_32_32_FLOAT
+FLD 26 0x00000003 0x00000000 0 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 28 0x00000001 0x00000000 0 FORMAT_COMP_ALL
+FLD 29 0x00000001 0x00000000 0 SRF_MODE_ALL
+FLD 30 0x00000003 0x00000000 0 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+REG 0x0003000c 0x0000010e 0x00000000 32    0  176   32 SQ_VTX_CONSTANT_WORD3_PS
+FLD  2 0x00000001 0x00000000 0 UNCACHED
+FLD  3 0x00000007 0x00000000 0 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD  6 0x00000007 0x00000000 0 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD  9 0x00000007 0x00000000 0 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 12 0x00000007 0x00000000 0 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+REG 0x00030010 0x0000010e 0x00000000 32    0  176   32 SQ_VTX_CONSTANT_WORD4_PS
+REG 0x0003001c 0x0000010e 0x00000000 32    0  176   32 SQ_VTX_CONSTANT_WORD7_PS
+FLD 30 0x00000003 0x00000000 0 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x00031600 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD0_VS
+REG 0x00031604 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD1_VS
+REG 0x00031608 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD2_VS
+FLD  0 0x000000ff 0x00000000 0 BASE_ADDRESS_HI
+FLD  8 0x000007ff 0x00000000 0 STRIDE
+FLD 19 0x00000001 0x00000000 0 CLAMP_X
+FLD 20 0x0000003f 0x00000000 0 DATA_FORMAT
+VAL 0x00000000 FMT_INVALID
+VAL 0x00000001 FMT_8
+VAL 0x00000002 FMT_4_4
+VAL 0x00000003 FMT_3_3_2
+VAL 0x00000005 FMT_16
+VAL 0x00000006 FMT_16_FLOAT
+VAL 0x00000007 FMT_8_8
+VAL 0x00000008 FMT_5_6_5
+VAL 0x00000009 FMT_6_5_5
+VAL 0x0000000a FMT_1_5_5_5
+VAL 0x0000000b FMT_4_4_4_4
+VAL 0x0000000c FMT_5_5_5_1
+VAL 0x0000000d FMT_32
+VAL 0x0000000e FMT_32_FLOAT
+VAL 0x0000000f FMT_16_16
+VAL 0x00000010 FMT_16_16_FLOAT
+VAL 0x00000011 FMT_8_24
+VAL 0x00000012 FMT_8_24_FLOAT
+VAL 0x00000013 FMT_24_8
+VAL 0x00000014 FMT_24_8_FLOAT
+VAL 0x00000015 FMT_10_11_11
+VAL 0x00000016 FMT_10_11_11_FLOAT
+VAL 0x00000017 FMT_11_11_10
+VAL 0x00000018 FMT_11_11_10_FLOAT
+VAL 0x00000019 FMT_2_10_10_10
+VAL 0x0000001a FMT_8_8_8_8
+VAL 0x0000001b FMT_10_10_10_2
+VAL 0x0000001c FMT_X24_8_32_FLOAT
+VAL 0x0000001d FMT_32_32
+VAL 0x0000001e FMT_32_32_FLOAT
+VAL 0x0000001f FMT_16_16_16_16
+VAL 0x00000020 FMT_16_16_16_16_FLOAT
+VAL 0x00000022 FMT_32_32_32_32
+VAL 0x00000023 FMT_32_32_32_32_FLOAT
+VAL 0x00000025 FMT_1
+VAL 0x00000027 FMT_GB_GR
+VAL 0x00000028 FMT_BG_RG
+VAL 0x00000029 FMT_32_AS_8
+VAL 0x0000002a FMT_32_AS_8_8
+VAL 0x0000002b FMT_5_9_9_9_SHAREDEXP
+VAL 0x0000002c FMT_8_8_8
+VAL 0x0000002d FMT_16_16_16
+VAL 0x0000002e FMT_16_16_16_FLOAT
+VAL 0x0000002f FMT_32_32_32
+VAL 0x00000030 FMT_32_32_32_FLOAT
+FLD 26 0x00000003 0x00000000 0 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 28 0x00000001 0x00000000 0 FORMAT_COMP_ALL
+FLD 29 0x00000001 0x00000000 0 SRF_MODE_ALL
+FLD 30 0x00000003 0x00000000 0 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+REG 0x0003160c 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD3_VS
+FLD  2 0x00000001 0x00000000 0 UNCACHED
+FLD  3 0x00000007 0x00000000 0 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD  6 0x00000007 0x00000000 0 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD  9 0x00000007 0x00000000 0 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 12 0x00000007 0x00000000 0 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+REG 0x00031610 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD4_VS
+REG 0x0003161c 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD7_VS
+FLD 30 0x00000003 0x00000000 0 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x00032a00 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD0_GS
+REG 0x00032a04 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD1_GS
+REG 0x00032a08 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD2_GS
+FLD  0 0x000000ff 0x00000000 0 BASE_ADDRESS_HI
+FLD  8 0x000007ff 0x00000000 0 STRIDE
+FLD 19 0x00000001 0x00000000 0 CLAMP_X
+FLD 20 0x0000003f 0x00000000 0 DATA_FORMAT
+VAL 0x00000000 FMT_INVALID
+VAL 0x00000001 FMT_8
+VAL 0x00000002 FMT_4_4
+VAL 0x00000003 FMT_3_3_2
+VAL 0x00000005 FMT_16
+VAL 0x00000006 FMT_16_FLOAT
+VAL 0x00000007 FMT_8_8
+VAL 0x00000008 FMT_5_6_5
+VAL 0x00000009 FMT_6_5_5
+VAL 0x0000000a FMT_1_5_5_5
+VAL 0x0000000b FMT_4_4_4_4
+VAL 0x0000000c FMT_5_5_5_1
+VAL 0x0000000d FMT_32
+VAL 0x0000000e FMT_32_FLOAT
+VAL 0x0000000f FMT_16_16
+VAL 0x00000010 FMT_16_16_FLOAT
+VAL 0x00000011 FMT_8_24
+VAL 0x00000012 FMT_8_24_FLOAT
+VAL 0x00000013 FMT_24_8
+VAL 0x00000014 FMT_24_8_FLOAT
+VAL 0x00000015 FMT_10_11_11
+VAL 0x00000016 FMT_10_11_11_FLOAT
+VAL 0x00000017 FMT_11_11_10
+VAL 0x00000018 FMT_11_11_10_FLOAT
+VAL 0x00000019 FMT_2_10_10_10
+VAL 0x0000001a FMT_8_8_8_8
+VAL 0x0000001b FMT_10_10_10_2
+VAL 0x0000001c FMT_X24_8_32_FLOAT
+VAL 0x0000001d FMT_32_32
+VAL 0x0000001e FMT_32_32_FLOAT
+VAL 0x0000001f FMT_16_16_16_16
+VAL 0x00000020 FMT_16_16_16_16_FLOAT
+VAL 0x00000022 FMT_32_32_32_32
+VAL 0x00000023 FMT_32_32_32_32_FLOAT
+VAL 0x00000025 FMT_1
+VAL 0x00000027 FMT_GB_GR
+VAL 0x00000028 FMT_BG_RG
+VAL 0x00000029 FMT_32_AS_8
+VAL 0x0000002a FMT_32_AS_8_8
+VAL 0x0000002b FMT_5_9_9_9_SHAREDEXP
+VAL 0x0000002c FMT_8_8_8
+VAL 0x0000002d FMT_16_16_16
+VAL 0x0000002e FMT_16_16_16_FLOAT
+VAL 0x0000002f FMT_32_32_32
+VAL 0x00000030 FMT_32_32_32_FLOAT
+FLD 26 0x00000003 0x00000000 0 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 28 0x00000001 0x00000000 0 FORMAT_COMP_ALL
+FLD 29 0x00000001 0x00000000 0 SRF_MODE_ALL
+FLD 30 0x00000003 0x00000000 0 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+REG 0x00032a0c 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD3_GS
+FLD  2 0x00000001 0x00000000 0 UNCACHED
+FLD  3 0x00000007 0x00000000 0 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD  6 0x00000007 0x00000000 0 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD  9 0x00000007 0x00000000 0 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 12 0x00000007 0x00000000 0 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+REG 0x00032a10 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD4_GS
+REG 0x00032a1c 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD7_GS
+FLD 30 0x00000003 0x00000000 0 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x00033e00 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD0_HS
+REG 0x00033e04 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD1_HS
+REG 0x00033e08 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD2_HS
+FLD  0 0x000000ff 0x00000000 0 BASE_ADDRESS_HI
+FLD  8 0x000007ff 0x00000000 0 STRIDE
+FLD 19 0x00000001 0x00000000 0 CLAMP_X
+FLD 20 0x0000003f 0x00000000 0 DATA_FORMAT
+VAL 0x00000000 FMT_INVALID
+VAL 0x00000001 FMT_8
+VAL 0x00000002 FMT_4_4
+VAL 0x00000003 FMT_3_3_2
+VAL 0x00000005 FMT_16
+VAL 0x00000006 FMT_16_FLOAT
+VAL 0x00000007 FMT_8_8
+VAL 0x00000008 FMT_5_6_5
+VAL 0x00000009 FMT_6_5_5
+VAL 0x0000000a FMT_1_5_5_5
+VAL 0x0000000b FMT_4_4_4_4
+VAL 0x0000000c FMT_5_5_5_1
+VAL 0x0000000d FMT_32
+VAL 0x0000000e FMT_32_FLOAT
+VAL 0x0000000f FMT_16_16
+VAL 0x00000010 FMT_16_16_FLOAT
+VAL 0x00000011 FMT_8_24
+VAL 0x00000012 FMT_8_24_FLOAT
+VAL 0x00000013 FMT_24_8
+VAL 0x00000014 FMT_24_8_FLOAT
+VAL 0x00000015 FMT_10_11_11
+VAL 0x00000016 FMT_10_11_11_FLOAT
+VAL 0x00000017 FMT_11_11_10
+VAL 0x00000018 FMT_11_11_10_FLOAT
+VAL 0x00000019 FMT_2_10_10_10
+VAL 0x0000001a FMT_8_8_8_8
+VAL 0x0000001b FMT_10_10_10_2
+VAL 0x0000001c FMT_X24_8_32_FLOAT
+VAL 0x0000001d FMT_32_32
+VAL 0x0000001e FMT_32_32_FLOAT
+VAL 0x0000001f FMT_16_16_16_16
+VAL 0x00000020 FMT_16_16_16_16_FLOAT
+VAL 0x00000022 FMT_32_32_32_32
+VAL 0x00000023 FMT_32_32_32_32_FLOAT
+VAL 0x00000025 FMT_1
+VAL 0x00000027 FMT_GB_GR
+VAL 0x00000028 FMT_BG_RG
+VAL 0x00000029 FMT_32_AS_8
+VAL 0x0000002a FMT_32_AS_8_8
+VAL 0x0000002b FMT_5_9_9_9_SHAREDEXP
+VAL 0x0000002c FMT_8_8_8
+VAL 0x0000002d FMT_16_16_16
+VAL 0x0000002e FMT_16_16_16_FLOAT
+VAL 0x0000002f FMT_32_32_32
+VAL 0x00000030 FMT_32_32_32_FLOAT
+FLD 26 0x00000003 0x00000000 0 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 28 0x00000001 0x00000000 0 FORMAT_COMP_ALL
+FLD 29 0x00000001 0x00000000 0 SRF_MODE_ALL
+FLD 30 0x00000003 0x00000000 0 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+REG 0x00033e0c 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD3_HS
+FLD  2 0x00000001 0x00000000 0 UNCACHED
+FLD  3 0x00000007 0x00000000 0 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD  6 0x00000007 0x00000000 0 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD  9 0x00000007 0x00000000 0 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 12 0x00000007 0x00000000 0 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+REG 0x00033e10 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD4_HS
+REG 0x00033e1c 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD7_HS
+FLD 30 0x00000003 0x00000000 0 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x00035200 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD0_LS
+REG 0x00035204 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD1_LS
+REG 0x00035208 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD2_LS
+FLD  0 0x000000ff 0x00000000 0 BASE_ADDRESS_HI
+FLD  8 0x000007ff 0x00000000 0 STRIDE
+FLD 19 0x00000001 0x00000000 0 CLAMP_X
+FLD 20 0x0000003f 0x00000000 0 DATA_FORMAT
+VAL 0x00000000 FMT_INVALID
+VAL 0x00000001 FMT_8
+VAL 0x00000002 FMT_4_4
+VAL 0x00000003 FMT_3_3_2
+VAL 0x00000005 FMT_16
+VAL 0x00000006 FMT_16_FLOAT
+VAL 0x00000007 FMT_8_8
+VAL 0x00000008 FMT_5_6_5
+VAL 0x00000009 FMT_6_5_5
+VAL 0x0000000a FMT_1_5_5_5
+VAL 0x0000000b FMT_4_4_4_4
+VAL 0x0000000c FMT_5_5_5_1
+VAL 0x0000000d FMT_32
+VAL 0x0000000e FMT_32_FLOAT
+VAL 0x0000000f FMT_16_16
+VAL 0x00000010 FMT_16_16_FLOAT
+VAL 0x00000011 FMT_8_24
+VAL 0x00000012 FMT_8_24_FLOAT
+VAL 0x00000013 FMT_24_8
+VAL 0x00000014 FMT_24_8_FLOAT
+VAL 0x00000015 FMT_10_11_11
+VAL 0x00000016 FMT_10_11_11_FLOAT
+VAL 0x00000017 FMT_11_11_10
+VAL 0x00000018 FMT_11_11_10_FLOAT
+VAL 0x00000019 FMT_2_10_10_10
+VAL 0x0000001a FMT_8_8_8_8
+VAL 0x0000001b FMT_10_10_10_2
+VAL 0x0000001c FMT_X24_8_32_FLOAT
+VAL 0x0000001d FMT_32_32
+VAL 0x0000001e FMT_32_32_FLOAT
+VAL 0x0000001f FMT_16_16_16_16
+VAL 0x00000020 FMT_16_16_16_16_FLOAT
+VAL 0x00000022 FMT_32_32_32_32
+VAL 0x00000023 FMT_32_32_32_32_FLOAT
+VAL 0x00000025 FMT_1
+VAL 0x00000027 FMT_GB_GR
+VAL 0x00000028 FMT_BG_RG
+VAL 0x00000029 FMT_32_AS_8
+VAL 0x0000002a FMT_32_AS_8_8
+VAL 0x0000002b FMT_5_9_9_9_SHAREDEXP
+VAL 0x0000002c FMT_8_8_8
+VAL 0x0000002d FMT_16_16_16
+VAL 0x0000002e FMT_16_16_16_FLOAT
+VAL 0x0000002f FMT_32_32_32
+VAL 0x00000030 FMT_32_32_32_FLOAT
+FLD 26 0x00000003 0x00000000 0 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 28 0x00000001 0x00000000 0 FORMAT_COMP_ALL
+FLD 29 0x00000001 0x00000000 0 SRF_MODE_ALL
+FLD 30 0x00000003 0x00000000 0 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+REG 0x0003520c 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD3_LS
+FLD  2 0x00000001 0x00000000 0 UNCACHED
+FLD  3 0x00000007 0x00000000 0 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD  6 0x00000007 0x00000000 0 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD  9 0x00000007 0x00000000 0 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 12 0x00000007 0x00000000 0 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+REG 0x00035210 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD4_LS
+REG 0x0003521c 0x0000010e 0x00000000 32    0  160   32 SQ_VTX_CONSTANT_WORD7_LS
+FLD 30 0x00000003 0x00000000 0 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x00036600 0x0000010e 0x00000000 32    0  176   32 SQ_VTX_CONSTANT_WORD0_CS
+REG 0x00036604 0x0000010e 0x00000000 32    0  176   32 SQ_VTX_CONSTANT_WORD1_CS
+REG 0x00036608 0x0000010e 0x00000000 32    0  176   32 SQ_VTX_CONSTANT_WORD2_CS
+FLD  0 0x000000ff 0x00000000 0 BASE_ADDRESS_HI
+FLD  8 0x000007ff 0x00000000 0 STRIDE
+FLD 19 0x00000001 0x00000000 0 CLAMP_X
+FLD 20 0x0000003f 0x00000000 0 DATA_FORMAT
+VAL 0x00000000 FMT_INVALID
+VAL 0x00000001 FMT_8
+VAL 0x00000002 FMT_4_4
+VAL 0x00000003 FMT_3_3_2
+VAL 0x00000005 FMT_16
+VAL 0x00000006 FMT_16_FLOAT
+VAL 0x00000007 FMT_8_8
+VAL 0x00000008 FMT_5_6_5
+VAL 0x00000009 FMT_6_5_5
+VAL 0x0000000a FMT_1_5_5_5
+VAL 0x0000000b FMT_4_4_4_4
+VAL 0x0000000c FMT_5_5_5_1
+VAL 0x0000000d FMT_32
+VAL 0x0000000e FMT_32_FLOAT
+VAL 0x0000000f FMT_16_16
+VAL 0x00000010 FMT_16_16_FLOAT
+VAL 0x00000011 FMT_8_24
+VAL 0x00000012 FMT_8_24_FLOAT
+VAL 0x00000013 FMT_24_8
+VAL 0x00000014 FMT_24_8_FLOAT
+VAL 0x00000015 FMT_10_11_11
+VAL 0x00000016 FMT_10_11_11_FLOAT
+VAL 0x00000017 FMT_11_11_10
+VAL 0x00000018 FMT_11_11_10_FLOAT
+VAL 0x00000019 FMT_2_10_10_10
+VAL 0x0000001a FMT_8_8_8_8
+VAL 0x0000001b FMT_10_10_10_2
+VAL 0x0000001c FMT_X24_8_32_FLOAT
+VAL 0x0000001d FMT_32_32
+VAL 0x0000001e FMT_32_32_FLOAT
+VAL 0x0000001f FMT_16_16_16_16
+VAL 0x00000020 FMT_16_16_16_16_FLOAT
+VAL 0x00000022 FMT_32_32_32_32
+VAL 0x00000023 FMT_32_32_32_32_FLOAT
+VAL 0x00000025 FMT_1
+VAL 0x00000027 FMT_GB_GR
+VAL 0x00000028 FMT_BG_RG
+VAL 0x00000029 FMT_32_AS_8
+VAL 0x0000002a FMT_32_AS_8_8
+VAL 0x0000002b FMT_5_9_9_9_SHAREDEXP
+VAL 0x0000002c FMT_8_8_8
+VAL 0x0000002d FMT_16_16_16
+VAL 0x0000002e FMT_16_16_16_FLOAT
+VAL 0x0000002f FMT_32_32_32
+VAL 0x00000030 FMT_32_32_32_FLOAT
+FLD 26 0x00000003 0x00000000 0 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 28 0x00000001 0x00000000 0 FORMAT_COMP_ALL
+FLD 29 0x00000001 0x00000000 0 SRF_MODE_ALL
+FLD 30 0x00000003 0x00000000 0 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+REG 0x0003660c 0x0000010e 0x00000000 32    0  176   32 SQ_VTX_CONSTANT_WORD3_CS
+FLD  2 0x00000001 0x00000000 0 UNCACHED
+FLD  3 0x00000007 0x00000000 0 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD  6 0x00000007 0x00000000 0 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD  9 0x00000007 0x00000000 0 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 12 0x00000007 0x00000000 0 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+REG 0x00036610 0x0000010e 0x00000000 32    0  176   32 SQ_VTX_CONSTANT_WORD4_CS
+REG 0x0003661c 0x0000010e 0x00000000 32    0  176   32 SQ_VTX_CONSTANT_WORD7_CS
+FLD 30 0x00000003 0x00000000 0 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
+REG 0x00037c00 0x0000010e 0x00000000 32    0   32   32 SQ_VTX_CONSTANT_WORD0_FS
+REG 0x00037c04 0x0000010e 0x00000000 32    0   32   32 SQ_VTX_CONSTANT_WORD1_FS
+REG 0x00037c08 0x0000010e 0x00000000 32    0   32   32 SQ_VTX_CONSTANT_WORD2_FS
+FLD  0 0x000000ff 0x00000000 0 BASE_ADDRESS_HI
+FLD  8 0x000007ff 0x00000000 0 STRIDE
+FLD 19 0x00000001 0x00000000 0 CLAMP_X
+FLD 20 0x0000003f 0x00000000 0 DATA_FORMAT
+VAL 0x00000000 FMT_INVALID
+VAL 0x00000001 FMT_8
+VAL 0x00000002 FMT_4_4
+VAL 0x00000003 FMT_3_3_2
+VAL 0x00000005 FMT_16
+VAL 0x00000006 FMT_16_FLOAT
+VAL 0x00000007 FMT_8_8
+VAL 0x00000008 FMT_5_6_5
+VAL 0x00000009 FMT_6_5_5
+VAL 0x0000000a FMT_1_5_5_5
+VAL 0x0000000b FMT_4_4_4_4
+VAL 0x0000000c FMT_5_5_5_1
+VAL 0x0000000d FMT_32
+VAL 0x0000000e FMT_32_FLOAT
+VAL 0x0000000f FMT_16_16
+VAL 0x00000010 FMT_16_16_FLOAT
+VAL 0x00000011 FMT_8_24
+VAL 0x00000012 FMT_8_24_FLOAT
+VAL 0x00000013 FMT_24_8
+VAL 0x00000014 FMT_24_8_FLOAT
+VAL 0x00000015 FMT_10_11_11
+VAL 0x00000016 FMT_10_11_11_FLOAT
+VAL 0x00000017 FMT_11_11_10
+VAL 0x00000018 FMT_11_11_10_FLOAT
+VAL 0x00000019 FMT_2_10_10_10
+VAL 0x0000001a FMT_8_8_8_8
+VAL 0x0000001b FMT_10_10_10_2
+VAL 0x0000001c FMT_X24_8_32_FLOAT
+VAL 0x0000001d FMT_32_32
+VAL 0x0000001e FMT_32_32_FLOAT
+VAL 0x0000001f FMT_16_16_16_16
+VAL 0x00000020 FMT_16_16_16_16_FLOAT
+VAL 0x00000022 FMT_32_32_32_32
+VAL 0x00000023 FMT_32_32_32_32_FLOAT
+VAL 0x00000025 FMT_1
+VAL 0x00000027 FMT_GB_GR
+VAL 0x00000028 FMT_BG_RG
+VAL 0x00000029 FMT_32_AS_8
+VAL 0x0000002a FMT_32_AS_8_8
+VAL 0x0000002b FMT_5_9_9_9_SHAREDEXP
+VAL 0x0000002c FMT_8_8_8
+VAL 0x0000002d FMT_16_16_16
+VAL 0x0000002e FMT_16_16_16_FLOAT
+VAL 0x0000002f FMT_32_32_32
+VAL 0x00000030 FMT_32_32_32_FLOAT
+FLD 26 0x00000003 0x00000000 0 NUM_FORMAT_ALL
+VAL 0x00000000 SQ_NUM_FORMAT_NORM
+VAL 0x00000001 SQ_NUM_FORMAT_INT
+VAL 0x00000002 SQ_NUM_FORMAT_SCALED
+FLD 28 0x00000001 0x00000000 0 FORMAT_COMP_ALL
+FLD 29 0x00000001 0x00000000 0 SRF_MODE_ALL
+FLD 30 0x00000003 0x00000000 0 ENDIAN_SWAP
+VAL 0x00000000 SQ_ENDIAN_NONE
+VAL 0x00000001 SQ_ENDIAN_8IN16
+VAL 0x00000002 SQ_ENDIAN_8IN32
+REG 0x00037c0c 0x0000010e 0x00000000 32    0   32   32 SQ_VTX_CONSTANT_WORD3_FS
+FLD  2 0x00000001 0x00000000 0 UNCACHED
+FLD  3 0x00000007 0x00000000 0 DST_SEL_X
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD  6 0x00000007 0x00000000 0 DST_SEL_Y
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD  9 0x00000007 0x00000000 0 DST_SEL_Z
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+FLD 12 0x00000007 0x00000000 0 DST_SEL_W
+VAL 0x00000000 SQ_SEL_X
+VAL 0x00000001 SQ_SEL_Y
+VAL 0x00000002 SQ_SEL_Z
+VAL 0x00000003 SQ_SEL_W
+VAL 0x00000004 SQ_SEL_0
+VAL 0x00000005 SQ_SEL_1
+REG 0x00037c10 0x0000010e 0x00000000 32    0   32   32 SQ_VTX_CONSTANT_WORD4_FS
+REG 0x00037c1c 0x0000010e 0x00000000 32    0   32   32 SQ_VTX_CONSTANT_WORD7_FS
+FLD 30 0x00000003 0x00000000 0 TYPE
+VAL 0x00000000 SQ_TEX_VTX_INVALID_TEXTURE
+VAL 0x00000001 SQ_TEX_VTX_INVALID_BUFFER
+VAL 0x00000002 SQ_TEX_VTX_VALID_TEXTURE
+VAL 0x00000003 SQ_TEX_VTX_VALID_BUFFER
diff --git a/list.h b/list.h
new file mode 100644
index 0000000..c609e5c
--- /dev/null
+++ b/list.h
@@ -0,0 +1,145 @@
+/*
+ * Copyright 2006 Tungsten Graphics, Inc., Bismarck, ND. USA.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the
+ * "Software"), to deal in the Software without restriction, including
+ * without limitation the rights to use, copy, modify, merge, publish,
+ * distribute, sub license, and/or sell copies of the Software, and to
+ * permit persons to whom the Software is furnished to do so, subject to
+ * the following conditions:
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ */
+/**
+ * \file
+ * List macros heavily inspired by the Linux kernel
+ * list handling. No list looping yet.
+ *
+ * Is not threadsafe, so common operations need to
+ * be protected using an external mutex.
+ */
+#ifndef _LIST_H_
+#define _LIST_H_
+
+#include <stddef.h>
+
+struct list_head
+{
+    struct list_head *prev;
+    struct list_head *next;
+};
+
+static inline void list_init_head(struct list_head *item)
+{
+    item->prev = item;
+    item->next = item;
+}
+
+static inline void list_add(struct list_head *item, struct list_head *list)
+{
+    item->prev = list;
+    item->next = list->next;
+    list->next->prev = item;
+    list->next = item;
+}
+
+static inline void list_add_tail(struct list_head *item, struct list_head *list)
+{
+    item->next = list;
+    item->prev = list->prev;
+    list->prev->next = item;
+    list->prev = item;
+}
+
+static inline void list_replace(struct list_head *from, struct list_head *to)
+{
+    to->prev = from->prev;
+    to->next = from->next;
+    from->next->prev = to;
+    from->prev->next = to;
+}
+
+static inline void list_del(struct list_head *item)
+{
+    item->prev->next = item->next;
+    item->next->prev = item->prev;
+}
+
+static inline void list_del_init(struct list_head *item)
+{
+    item->prev->next = item->next;
+    item->next->prev = item->prev;
+    item->next = item;
+    item->prev = item;
+}
+
+static inline int list_is_empty(struct list_head *list)
+{
+    return list->next == list;
+}
+
+#define LIST_INITHEAD(__item) list_inithead(__item)
+#define LIST_ADD(__item, __list) list_add(__item, __list)
+#define LIST_ADDTAIL(__item, __list) list_addtail(__item, __list)
+#define LIST_REPLACE(__from, __to) list_replace(__from, __to)
+#define LIST_DEL(__item) list_del(__item)
+#define LIST_DELINIT(__item) list_delinit(__item)
+
+#define LIST_ENTRY(__type, __item, __field)             \
+    ((__type *)(((char *)(__item)) - offsetof(__type, __field)))
+
+#define LIST_IS_EMPTY(__list)                           \
+    ((__list)->next == (__list))
+
+#ifndef container_of
+#define container_of(ptr, sample, member)               \
+    (void *)((char *)(ptr)                              \
+         - ((char *)&(sample)->member - (char *)(sample)))
+#endif
+
+#define LIST_FOR_EACH_ENTRY(pos, head, member)          \
+   for (pos = container_of((head)->next, pos, member);  \
+    &pos->member != (head);                             \
+    pos = container_of(pos->member.next, pos, member))
+
+#define LIST_FOR_EACH_ENTRY_REV(pos, head, member)      \
+   for (pos = container_of((head)->prev, pos, member);  \
+    &pos->member != (head);                             \
+    pos = container_of(pos->member.prev, pos, member))
+
+#define LIST_FOR_EACH_ENTRY_SAFE(pos, storage, head, member)    \
+   for (pos = container_of((head)->next, pos, member),          \
+    storage = container_of(pos->member.next, pos, member);      \
+    &pos->member != (head);                                     \
+    pos = storage, storage = container_of(storage->member.next, storage, member))
+
+#define LIST_FOR_EACH_ENTRY_SAFE_REV(pos, storage, head, member)    \
+   for (pos = container_of((head)->prev, pos, member),              \
+    storage = container_of(pos->member.prev, pos, member);          \
+    &pos->member != (head);                                         \
+    pos = storage, storage = container_of(storage->member.prev, storage, member))
+
+#define LIST_FOR_EACH_ENTRY_FROM(pos, start, head, member)  \
+   for (pos = container_of((start), pos, member);           \
+    &pos->member != (head);                                 \
+    pos = container_of(pos->member.next, pos, member))
+
+#define LIST_FOR_EACH_ENTRY_FROM_REV(pos, start, head, member)  \
+   for (pos = container_of((start), pos, member);               \
+    &pos->member != (head);                                     \
+    pos = container_of(pos->member.prev, pos, member))
+
+#endif
diff --git a/parse_areg.c b/parse_areg.c
new file mode 100644
index 0000000..db477e3
--- /dev/null
+++ b/parse_areg.c
@@ -0,0 +1,295 @@
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+struct fenum {
+    char            name[128];
+    struct fenum    *next;
+    unsigned        value;
+};
+
+struct field {
+    char            name[128];
+    struct field    *next;
+    unsigned        mask;
+    unsigned        shift;
+    struct fenum    *fenums;
+};
+
+struct reg {
+    char            name[128];
+    unsigned        offset;
+    struct reg      *next;
+    struct field    *fields;
+};
+
+struct ctx {
+    struct reg      *regs;
+    struct reg      *last_reg;
+    struct field    *last_field;
+    struct fenum    *last_fenum;
+    char            tokens[4][64];
+    unsigned        ntokens;
+    unsigned        nheading_space;
+    unsigned        line;
+};
+
+static void ptoken(struct ctx *ctx)
+{
+    unsigned i;
+    for (i = 0; i < ctx->ntokens; i++) {
+        fprintf(stderr, "token[%d] %s\n", i, ctx->tokens[i]);
+    }
+}
+
+static int parse_fenum(struct ctx *ctx, const char *line)
+{
+    struct fenum *fenum;
+
+    if (ctx->ntokens != 2) {
+        fprintf(stderr, "%s %d [%d] wrong nomber of token for fenum %d\n", __func__, __LINE__, ctx->line, ctx->ntokens);
+        ptoken(ctx);
+        return -EINVAL;
+    }
+    fenum = calloc(1, sizeof(*fenum));
+    if (fenum == NULL) {
+        return -ENOMEM;
+    }
+    strcpy(fenum->name, ctx->tokens[0]);
+    fenum->value = strtoul(ctx->tokens[1], NULL, 0);
+    if (ctx->last_fenum) {
+        ctx->last_fenum->next = fenum;
+    }
+    if (ctx->last_field->fenums == NULL) {
+        ctx->last_field->fenums = fenum;
+    }
+    ctx->last_fenum = fenum;
+    return 0;
+}
+
+static int parse_field(struct ctx *ctx, const char *line)
+{
+    struct field *field;
+    char *tmp;
+
+    /* only do _mask or _bit */
+    if (strstr(line, "_mask") == NULL && strstr(line, "_bit") == NULL) {
+        return 0;
+    }
+    if (ctx->ntokens != 3) {
+        fprintf(stderr, "%s %d [%d] wrong nomber of token for field %d\n", __func__, __LINE__, ctx->line, ctx->ntokens);
+        ptoken(ctx);
+        return -EINVAL;
+    }
+    field = calloc(1, sizeof(*field));
+    if (field == NULL) {
+        return -ENOMEM;
+    }
+    strcpy(field->name, ctx->tokens[0]);
+    tmp = strstr(field->name, "_mask");
+    if (tmp == NULL) {
+        tmp = strstr(field->name, "_bit");
+    }
+    *tmp = 0;
+    field->mask = strtoul(ctx->tokens[1], NULL, 0);
+    field->shift = strtoul(ctx->tokens[2], NULL, 0);
+    if (ctx->last_field) {
+        ctx->last_field->next = field;
+    }
+    if (ctx->last_reg->fields == NULL) {
+        ctx->last_reg->fields = field;
+    }
+    ctx->last_field = field;
+    return 0;
+}
+
+static int parse_reg(struct ctx *ctx, const char *line)
+{
+    struct reg *reg;
+
+    if (ctx->ntokens != 2) {
+        fprintf(stderr, "%s %d [%d] wrong nomber of token for reg %d\n", __func__, __LINE__, ctx->line, ctx->ntokens);
+        return -EINVAL;
+    }
+    reg = calloc(1, sizeof(*reg));
+    if (reg == NULL) {
+        return -ENOMEM;
+    }
+    strcpy(reg->name, ctx->tokens[0]);
+    reg->offset = strtoul(ctx->tokens[1], NULL, 0);
+    if (ctx->last_reg) {
+        ctx->last_reg->next = reg;
+    }
+    if (ctx->regs == NULL) {
+        ctx->regs = reg;
+    }
+    ctx->last_reg = reg;
+    return 0;
+}
+
+static int valid_char(unsigned ts, char c)
+{
+    if (c >= 'A' && c <= 'Z')
+        return 1;
+    if (c >= 'a' && c <= 'z')
+        return 1;
+
+    if (ts) {
+        if (c >= '0' && c <= '9')
+            return 1;
+        if (c == '_')
+            return 1;
+    }
+    return 0;
+}
+
+static int valid_value(unsigned ts, char c)
+{
+    if (c >= '0' && c <= '9')
+        return 1;
+    if (ts == 1) {
+        if (c == 'x')
+            return 1;
+    }
+    if (ts > 1) {
+        if (c >= 'a' && c <= 'f')
+            return 1;
+        if (c >= 'A' && c <= 'F')
+            return 1;
+    }
+    return 0;
+}
+
+static int parse_tokenize(struct ctx *ctx, const char *line)
+{
+    unsigned i = 0;
+    unsigned ts = 0;
+
+    ctx->ntokens = 0;
+    ctx->nheading_space = 0;
+    do {
+        if (valid_char(ts, line[i])) {
+            ctx->tokens[ctx->ntokens][ts++] = line[i];
+            continue;
+        }
+        if (valid_value(ts, line[i])) {
+            ctx->tokens[ctx->ntokens][ts++] = line[i];
+            continue;
+        }
+        switch (line[i]) {
+        case 0:
+            return 0;
+        case '<':
+            if (line[i + 1] != '<')
+                break;
+        case '=':
+        case ',':
+            ctx->tokens[ctx->ntokens][ts] = 0;
+            ts = 0;
+            ctx->ntokens++;
+            break;
+        case ' ':
+            if (!ctx->ntokens && !ts)
+                ctx->nheading_space++;
+        default:
+            break;
+        }
+    } while (line[++i]);
+    return 0;
+}
+
+static int parse(struct ctx *ctx, const char *filename)
+{
+    FILE *file;
+    char line[128];
+    int r;
+
+    file = fopen(filename, "r");
+    if (file == NULL) {
+        fprintf(stderr, "%s %d failed opening %s\n", __func__, __LINE__, filename);
+        return -EINVAL;
+    }
+    while (!feof(file)) {
+        if (fgets(line, sizeof(line), file) == NULL) {
+            continue;
+        }
+        ctx->line++;
+        ctx->nheading_space = 0;
+        r = parse_tokenize(ctx, line);
+        if (r) {
+            return r;
+        }
+        switch (ctx->nheading_space) {
+        case 4:
+            r = parse_reg(ctx, line);
+            ctx->last_field = NULL;
+            break;
+        case 8:
+            r = parse_field(ctx, line);
+            ctx->last_fenum = NULL;
+            break;
+        case 12:
+            r = parse_fenum(ctx, line);
+            break;
+        default:
+            continue;
+        }
+        if (r) {
+            return r;
+        }
+    }
+    return 0;
+}
+
+void pspace(unsigned n, unsigned s)
+{
+    unsigned i;
+
+    if (s >= n) {
+        printf(" ");
+        return;
+    }
+    for (i = 0; i < (n - s - 1); i++) {
+        printf(" ");
+    }
+}
+
+int main(int argc, char *argv[])
+{
+    struct ctx *ctx;
+    struct reg *reg;
+    struct field *field;
+    struct fenum *fenum;
+    int r;
+
+    ctx = calloc(1, sizeof(*ctx));
+    if (ctx == NULL) {
+        return -ENOMEM;
+    }
+    r = parse(ctx, argv[1]);
+    if (r) {
+        return r;
+    }
+    reg = ctx->regs;
+    while (reg) {
+        printf("#define %s", reg->name);
+        pspace(61, strlen(reg->name) + 8);
+        printf("0x%08x\n", reg->offset);
+        field = reg->fields;
+        while (field) {
+            printf("#define %s__%s(x)", reg->name, field->name);
+            pspace(61, strlen(reg->name) + strlen(field->name) + 13);
+            printf("(((x) & 0x%08x) << %d)\n", field->mask, field->shift);
+            fenum = field->fenums;
+            while (fenum) {
+                printf("#define     %s", fenum->name);
+                pspace(65, strlen(fenum->name) + 12);
+                printf("%d\n", fenum->value);
+                fenum = fenum->next;
+            }
+            field = field->next;
+        }
+        reg = reg->next;
+    }
+}
diff --git a/parse_cs.c b/parse_cs.c
new file mode 100644
index 0000000..d8498fe
--- /dev/null
+++ b/parse_cs.c
@@ -0,0 +1,194 @@
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+
+#define MAXVAL 64
+#define MAX2(a, b) ((a) > (b) ? (a) : (b))
+
+struct reg {
+    struct reg      *next;
+    unsigned        offset;
+    unsigned        nvala;
+    unsigned        nvalb;
+    unsigned        vala[MAXVAL];
+    unsigned        valb[MAXVAL];
+};
+
+struct reg *regs = NULL;
+unsigned l = 0;
+
+static int add_val(unsigned offset, unsigned val, unsigned b)
+{
+    struct reg *reg = regs;
+
+    while (reg) {
+        if (reg->offset == offset) {
+            break;
+        }
+        reg = reg->next;
+    }
+
+    if (reg == NULL) {
+        reg = calloc(1, sizeof(*reg));
+        if (reg == NULL) {
+            return -ENOMEM;
+        }
+        reg->offset = offset;
+        reg->next = regs;
+        regs = reg;
+    }
+    if (b) {
+        reg->valb[reg->nvalb++] = val;
+    } else {
+        reg->vala[reg->nvala++] = val;
+    }
+    return 0;
+}
+
+static void print_reg(void)
+{
+    struct reg *reg = regs;
+    unsigned i;
+
+    while (reg) {
+        for (i = 0; i < MAX2(reg->nvala, reg->nvalb); i++) {
+            if (i < reg->nvala && i < reg->valb) {
+                if (reg->vala[i] ==  reg->valb[i]) {
+                    fprintf(stderr, "0x%08x  0x%08x 0x%08x\n", reg->offset, reg->vala[i], reg->valb[i]);
+                } else {
+                    fprintf(stderr, "0x%08x  0x%08x 0x%08x !\n", reg->offset, reg->vala[i], reg->valb[i]);
+                }
+            } else if (i < reg->nvala) {
+                fprintf(stderr, "0x%08x  0x%08x ---------- !\n", reg->offset, reg->vala[i]);
+            } else {
+                fprintf(stderr, "0x%08x  ---------- 0x%08x !\n", reg->offset, reg->valb[i]);
+            }
+        }
+        reg = reg->next;
+    }
+}
+
+static int parse_pkt0(FILE *file, unsigned pkt, unsigned b)
+{
+    char line[128];
+    unsigned i;
+
+    for (i = 0; i <= ((pkt >> 16) & 0x3fff); i++) {
+        if (fgets(line, sizeof(line), file) == NULL) {
+            if (feof(file)) {
+                fprintf(stderr, "%s %d %d\n", __func__, __LINE__, l);
+                return -EINVAL;
+            }
+        }
+        l++;
+    }
+    return 0;
+}
+
+static int parse_pkt3(FILE *file, unsigned pkt, unsigned b)
+{
+    unsigned offset, val;
+    char line[128];
+    unsigned i;
+    int r;
+
+    if (fgets(line, sizeof(line), file) == NULL) {
+        if (feof(file)) {
+            fprintf(stderr, "%s %d %d\n", __func__, __LINE__, l);
+            return -EINVAL;
+        }
+    }
+    l++;
+    offset = strtol(line, NULL, 0) << 2;
+//fprintf(stderr, "%s %d pkt3[0x%08x][%d] 0x%08x\n", __func__, __LINE__, pkt, 0, offset);
+    for (i = 1; i <= ((pkt >> 16) & 0x3fff); i++) {
+        if (fgets(line, sizeof(line), file) == NULL) {
+            if (feof(file)) {
+                fprintf(stderr, "%s %d %d\n", __func__, __LINE__, l);
+                return -EINVAL;
+            }
+            l++;
+        }
+        val = strtol(line, NULL, 0);
+//fprintf(stderr, "%s %d pkt3[0x%08x][%d] 0x%08x\n", __func__, __LINE__, pkt, i, val);
+        switch (((pkt >> 8) & 0xff)) {
+        case 0x68:
+                r = add_val(offset + 0x8000, val, b);
+                if (r) {
+                    fprintf(stderr, "%s %d %d\n", __func__, __LINE__, l);
+                    return r;
+                }
+                break;
+        case 0x69:
+                r = add_val(offset + 0x28000, val, b);
+                if (r) {
+                    fprintf(stderr, "%s %d %d\n", __func__, __LINE__, l);
+                    return r;
+                }
+                break;
+        default:
+                break;
+        }
+        offset += 4;
+    }
+    return 0;
+}
+
+static int parse(const char *filename, unsigned b)
+{
+    FILE *file;
+    char line[128];
+    unsigned tmp;
+    int r;
+
+    l = 1;
+    file = fopen(filename, "r");
+    if (file == NULL) {
+        fprintf(stderr, "%s %d failed opening %s\n", __func__, __LINE__, filename);
+        return -EINVAL;
+    }
+    while (!feof(file)) {
+        if (fgets(line, sizeof(line), file) == NULL) {
+            continue;
+        }
+        l++;
+        tmp = strtol(line, NULL, 0);
+        switch (tmp >> 30) {
+        case 0:
+            r = parse_pkt0(file, tmp, b);
+            if (r) {
+                fprintf(stderr, "%s %d %d\n", __func__, __LINE__, l);
+                return r;
+            }
+            break;
+        case 2:
+            break;
+        case 3:
+            r = parse_pkt3(file, tmp, b);
+            if (r) {
+                fprintf(stderr, "%s %d %d\n", __func__, __LINE__, l);
+                return r;
+            }
+            break;
+        }
+    }
+    return 0;
+}
+
+int main(int argc, char *argv[])
+{
+    int r;
+
+    r = parse(argv[1], 0);
+    if (r) {
+        fprintf(stderr, "%s %d %d\n", __func__, __LINE__, l);
+        return r;
+    }
+    r = parse(argv[2], 1);
+    if (r) {
+        fprintf(stderr, "%s %d %d\n", __func__, __LINE__, l);
+        return r;
+    }
+    print_reg();
+}
diff --git a/rdb.c b/rdb.c
new file mode 100644
index 0000000..fcb0086
--- /dev/null
+++ b/rdb.c
@@ -0,0 +1,540 @@
+/*
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * author: Jerome Glisse
+ */
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "rdb.h"
+
+#define ID_FROM_CHAR(a, b, c)   ((a) | ((b) << 8) | ((c) << 16))
+
+static char *read_value(char *line, unsigned *value)
+{
+    char *next;
+
+    *value = strtoul(line, &next, 0);
+    if (next == line) {
+        return NULL;
+    }
+    return next;
+}
+
+static int rdb_read_block(struct rdb *rdb, char *line)
+{
+    struct rdb_block *block, *tmp;
+
+    block = malloc(sizeof(*block));
+    if (block == NULL) {
+        return -ENOMEM;
+    }
+    block->name = NULL;
+    block->description = NULL;
+
+    line = read_value(&line[4], &block->id);
+    if (line == NULL) {
+        return -EINVAL;
+    }
+    while (*line == ' ') { line++; }
+    block->name = strdup(line);
+    if (block->name == NULL) {
+        free(block);
+        return -ENOMEM;
+    }
+
+    /* always keep things shorted */
+    if (!list_is_empty(&rdb->blocks)) {
+        /* assume best case where things are already shorted */
+        LIST_FOR_EACH_ENTRY_REV(tmp, &rdb->blocks, list) {
+            if (block->id >= tmp->id) {
+                list_add(&block->list, &tmp->list);
+                return 0;
+            }
+        }
+        list_add(&block->list, &rdb->blocks);
+        return 0;
+    } else {
+        list_add_tail(&block->list, &rdb->blocks);
+        return 0;
+    }
+    return -EINVAL;
+}
+
+static int rdb_read_domain(struct rdb *rdb, char *line)
+{
+    struct rdb_domain *domain, *tmp;
+
+    domain = malloc(sizeof(*domain));
+    if (domain == NULL) {
+        return -ENOMEM;
+    }
+    domain->name = NULL;
+    domain->description = NULL;
+
+    line = read_value(&line[4], &domain->id);
+    if (line == NULL) {
+        return -EINVAL;
+    }
+    while (*line == ' ') { line++; }
+    domain->name = strdup(line);
+    if (domain->name == NULL) {
+        free(domain);
+        return -ENOMEM;
+    }
+
+    /* always keep things shorted */
+    if (!list_is_empty(&rdb->domains)) {
+        /* assume best case where things are already shorted */
+        LIST_FOR_EACH_ENTRY_REV(tmp, &rdb->domains, list) {
+            if (domain->id >= tmp->id) {
+                list_add(&domain->list, &tmp->list);
+                return 0;
+            }
+        }
+        list_add(&domain->list, &rdb->domains);
+        return 0;
+    } else {
+        list_add_tail(&domain->list, &rdb->domains);
+        return 0;
+    }
+    return -EINVAL;
+}
+
+static int rdb_read_field(struct rdb_reg *reg, char *line, struct rdb_field **last)
+{
+    struct rdb_field *field, *tmp;
+
+    field = malloc(sizeof(*field));
+    if (field == NULL) {
+        return -ENOMEM;
+    }
+    field->name = NULL;
+    field->description = NULL;
+    list_init_head(&field->values);
+    *last = field;
+
+    line = read_value(&line[4], &field->shift);
+    if (line == NULL) {
+        return -EINVAL;
+    }
+    line = read_value(line, &field->mask);
+    if (line == NULL) {
+        return -EINVAL;
+    }
+    line = read_value(line, &field->dvalue);
+    if (line == NULL) {
+        return -EINVAL;
+    }
+    line = read_value(line, &field->rw);
+    if (line == NULL) {
+        return -EINVAL;
+    }
+    while (*line == ' ') { line++; }
+    field->name = strdup(line);
+    if (field->name == NULL) {
+        free(field);
+        return -ENOMEM;
+    }
+
+    /* always keep things shorted */
+    if (!list_is_empty(&reg->fields)) {
+        /* assume best case where things are already shorted */
+        LIST_FOR_EACH_ENTRY_REV(tmp, &reg->fields, list) {
+            if (field->shift >= tmp->shift) {
+                list_add(&field->list, &tmp->list);
+                return 0;
+            }
+        }
+        list_add(&field->list, &reg->fields);
+        return 0;
+    } else {
+        list_add_tail(&field->list, &reg->fields);
+        return 0;
+    }
+    return -EINVAL;
+}
+
+static int rdb_read_it(struct rdb *rdb, char *line)
+{
+    struct rdb_it *it, *tmp;
+
+    it = malloc(sizeof(*it));
+    if (it == NULL) {
+        return -ENOMEM;
+    }
+    it->name = NULL;
+    it->description = NULL;
+
+    line = read_value(&line[4], &it->it);
+    if (line == NULL) {
+        return -EINVAL;
+    }
+    while (*line == ' ') { line++; }
+    it->name = strdup(line);
+    if (it->name == NULL) {
+        free(it);
+        return -ENOMEM;
+    }
+
+    /* always keep things shorted */
+    if (!list_is_empty(&rdb->its)) {
+        /* assume best case where things are already shorted */
+        LIST_FOR_EACH_ENTRY_REV(tmp, &rdb->its, list) {
+            if (it->it >= tmp->it) {
+                list_add(&it->list, &tmp->list);
+                return 0;
+            }
+        }
+        list_add(&it->list, &rdb->its);
+        return 0;
+    } else {
+        list_add_tail(&it->list, &rdb->its);
+        return 0;
+    }
+    return -EINVAL;
+}
+
+static int rdb_read_range(struct rdb *rdb, char *line)
+{
+    struct rdb_range *range, *tmp;
+
+    range = malloc(sizeof(*range));
+    if (range == NULL) {
+        return -ENOMEM;
+    }
+    range->name = NULL;
+    range->description = NULL;
+
+    line = read_value(&line[4], &range->domain);
+    if (line == NULL) {
+        return -EINVAL;
+    }
+    line = read_value(line, &range->soffset);
+    if (line == NULL) {
+        return -EINVAL;
+    }
+    line = read_value(line, &range->eoffset);
+    if (line == NULL) {
+        return -EINVAL;
+    }
+    while (*line == ' ') { line++; }
+    range->name = strdup(line);
+    if (range->name == NULL) {
+        free(range);
+        return -ENOMEM;
+    }
+
+    /* always keep things shorted */
+    if (!list_is_empty(&rdb->ranges)) {
+        /* assume best case where things are already shorted */
+        LIST_FOR_EACH_ENTRY_REV(tmp, &rdb->ranges, list) {
+            if (range->soffset >= tmp->soffset) {
+                list_add(&range->list, &tmp->list);
+                return 0;
+            }
+        }
+        list_add(&range->list, &rdb->ranges);
+        return 0;
+    } else {
+        list_add_tail(&range->list, &rdb->ranges);
+        return 0;
+    }
+    return -EINVAL;
+}
+
+static int rdb_read_reg(struct rdb *rdb, char *line, struct rdb_reg **last)
+{
+    struct rdb_reg *reg, *tmp;
+
+    reg = malloc(sizeof(*reg));
+    if (reg == NULL) {
+        return -ENOMEM;
+    }
+    reg->name = NULL;
+    reg->description = NULL;
+    list_init_head(&reg->fields);
+    *last = reg;
+
+    line = read_value(&line[4], &reg->offset);
+    if (line == NULL) {
+        return -EINVAL;
+    }
+    line = read_value(line, &reg->domain);
+    if (line == NULL) {
+        return -EINVAL;
+    }
+    line = read_value(line, &reg->block);
+    if (line == NULL) {
+        return -EINVAL;
+    }
+    line = read_value(line, &reg->size);
+    if (line == NULL) {
+        return -EINVAL;
+    }
+    line = read_value(line, &reg->base);
+    if (line == NULL) {
+        return -EINVAL;
+    }
+    line = read_value(line, &reg->nrepeat);
+    if (line == NULL) {
+        return -EINVAL;
+    }
+    line = read_value(line, &reg->stride);
+    if (line == NULL) {
+        return -EINVAL;
+    }
+    while (*line == ' ') { line++; }
+    reg->name = strdup(line);
+    if (reg->name == NULL) {
+        free(reg);
+        return -ENOMEM;
+    }
+
+    /* always keep things shorted */
+    if (!list_is_empty(&rdb->regs)) {
+        /* assume best case where things are already shorted */
+        LIST_FOR_EACH_ENTRY_REV(tmp, &rdb->regs, list) {
+            if (reg->domain < tmp->domain) {
+                continue;
+            }
+            if (reg->domain == tmp->domain) {
+                if (reg->offset >= tmp->offset) {
+                    list_add(&reg->list, &tmp->list);
+                    return 0;
+                }
+            } else {
+                list_add(&reg->list, &tmp->list);
+                return 0;
+            }
+        }
+        list_add(&reg->list, &rdb->regs);
+        return 0;
+    } else {
+        list_add_tail(&reg->list, &rdb->regs);
+        return 0;
+    }
+    return -EINVAL;
+}
+
+static int rdb_read_value(struct rdb_field *field, char *line)
+{
+    struct rdb_value *value, *tmp;
+
+    value = malloc(sizeof(*value));
+    if (value == NULL) {
+        return -ENOMEM;
+    }
+    value->name = NULL;
+    value->description = NULL;
+
+    line = read_value(&line[4], &value->value);
+    if (line == NULL) {
+        return -EINVAL;
+    }
+    while (*line == ' ') { line++; }
+    value->name = strdup(line);
+    if (value->name == NULL) {
+        free(value);
+        return -ENOMEM;
+    }
+
+    /* always keep things shorted */
+    if (!list_is_empty(&field->values)) {
+        /* assume best case where things are already shorted */
+        LIST_FOR_EACH_ENTRY_REV(tmp, &field->values, list) {
+            if (value->value >= tmp->value) {
+                list_add(&value->list, &tmp->list);
+                return 0;
+            }
+        }
+        list_add(&value->list, &field->values);
+        return 0;
+    } else {
+        list_add_tail(&value->list, &field->values);
+        return 0;
+    }
+    return -EINVAL;
+}
+
+static void rdb_write_block(FILE *file, struct rdb_block *block)
+{
+    fprintf(file, "BLK 0x%08x %s\n", block->id, block->name);
+}
+
+static void rdb_write_domain(FILE *file, struct rdb_domain *domain)
+{
+    fprintf(file, "DOM 0x%08x %s\n", domain->id, domain->name);
+}
+
+static void rdb_write_field(FILE *file, struct rdb_field *field)
+{
+    fprintf(file, "FLD %2d 0x%08x 0x%08x %1d %s\n", field->shift,
+            field->mask, field->dvalue, field->rw, field->name);
+}
+
+static void rdb_write_it(FILE *file, struct rdb_it *it)
+{
+    fprintf(file, "IT  0x%08x %s\n", it->it, it->name);
+}
+
+static void rdb_write_range(FILE *file, struct rdb_range *range)
+{
+    fprintf(file, "RNG 0x%08x 0x%08x 0x%08x %s\n", range->domain,
+            range->soffset, range->eoffset, range->name);
+}
+
+static void rdb_write_reg(FILE *file, struct rdb_reg *reg)
+{
+    fprintf(file, "REG 0x%08x 0x%08x 0x%08x %2d %4d %4d %4d %s\n",
+            reg->offset, reg->domain, reg->block, reg->size,
+            reg->base, reg->nrepeat, reg->stride, reg->name);
+}
+
+static void rdb_write_value(FILE *file, struct rdb_value *value)
+{
+    fprintf(file, "VAL 0x%08x %s\n", value->value, value->name);
+}
+
+const struct rdb_reg *rdb_find_reg(struct rdb *rdb, unsigned domain, unsigned offset)
+{
+    struct rdb_reg *reg;
+
+    LIST_FOR_EACH_ENTRY (reg, &rdb->regs, list) {
+        if (domain < reg->domain) {
+            /* everything being shorted, that means we didn't found
+             * the register in the requested domain
+             */
+            return NULL;
+        }
+        if (domain == reg->domain && reg->offset == offset) {
+            return reg;
+        }
+    }
+    return NULL;
+}
+
+void rdb_init(struct rdb *rdb)
+{
+    list_init_head(&rdb->blocks);
+    list_init_head(&rdb->domains);
+    list_init_head(&rdb->its);
+    list_init_head(&rdb->ranges);
+    list_init_head(&rdb->regs);
+}
+
+int rdb_read(struct rdb *rdb, FILE *file)
+{
+    struct rdb_field *lfield = NULL;
+    struct rdb_reg *lreg = NULL;
+    char line[128];
+    unsigned id;
+    int r;
+
+    while (!feof(file)) {
+        if (fgets(line, sizeof(line), file) == NULL) {
+            continue;
+        }
+        /* remove newline */
+        r = strlen(line);
+        if (line[r - 1] == '\n') {
+            line[r - 1] = 0;
+        }
+        id = *((unsigned*)line) & 0x00ffffff;
+        switch (id) {
+        case ID_FROM_CHAR('R', 'N', 'G'):
+            r = rdb_read_range(rdb, line);
+            break;
+        case ID_FROM_CHAR('B', 'L', 'K'):
+            r = rdb_read_block(rdb, line);
+            break;
+        case ID_FROM_CHAR('D', 'O', 'M'):
+            r = rdb_read_domain(rdb, line);
+            break;
+        case ID_FROM_CHAR('V', 'A', 'L'):
+            if (lfield == NULL) {
+                return -EINVAL;
+            }
+            r = rdb_read_value(lfield, line);
+            break;
+        case ID_FROM_CHAR('I', 'T', ' '):
+            r = rdb_read_it(rdb, line);
+            break;
+        case ID_FROM_CHAR('F', 'L', 'D'):
+            if (lreg == NULL) {
+                return -EINVAL;
+            }
+            r = rdb_read_field(lreg, line, &lfield);
+            break;
+        case ID_FROM_CHAR('R', 'E', 'G'):
+            r = rdb_read_reg(rdb, line, &lreg);
+            break;
+        default:
+            return -EINVAL;
+        }
+        if (r) {
+            return r;
+        }
+    }
+    return 0;
+}
+
+void rdb_write(FILE *file, struct rdb *rdb)
+{
+    struct rdb_block *block;
+    struct rdb_domain *domain;
+    struct rdb_value *value;
+    struct rdb_field *field;
+    struct rdb_it *it;
+    struct rdb_reg *reg;
+    struct rdb_range *range;
+
+    LIST_FOR_EACH_ENTRY (block, &rdb->blocks, list) {
+        rdb_write_block(file, block);
+    }
+
+    LIST_FOR_EACH_ENTRY (domain, &rdb->domains, list) {
+        rdb_write_domain(file, domain);
+    }
+
+    LIST_FOR_EACH_ENTRY (it, &rdb->its, list) {
+        rdb_write_it(file, it);
+    }
+
+    LIST_FOR_EACH_ENTRY (range, &rdb->ranges, list) {
+        rdb_write_range(file, range);
+    }
+
+    LIST_FOR_EACH_ENTRY (reg, &rdb->regs, list) {
+        rdb_write_reg(file, reg);
+        LIST_FOR_EACH_ENTRY (field, &reg->fields, list) {
+            rdb_write_field(file, field);
+            LIST_FOR_EACH_ENTRY (value, &field->values, list) {
+                rdb_write_value(file, value);
+            }
+        }
+    }
+}
diff --git a/rdb.h b/rdb.h
new file mode 100644
index 0000000..9f2f680
--- /dev/null
+++ b/rdb.h
@@ -0,0 +1,118 @@
+/*
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * author: Jerome Glisse
+ */
+#ifndef RDB_H
+#define RDB_H
+
+#include "list.h"
+
+/* Domain 0x0 through 0x100 are reserved for predefined domain
+ * such as MMIO, PIO, PCI, PCIE register address space.
+ */
+#define RDB_DOMAIN_MMIO                 0x0000
+#define RDB_DOMAIN_PIO                  0x0001
+#define RDB_DOMAIN_PCI                  0x0002  /* clock */
+#define RDB_DOMAIN_PCIE                 0x0003  /* GPU dma controller */
+
+struct rdb {
+    struct list_head    blocks;
+    struct list_head    domains;
+    struct list_head    its;
+    struct list_head    ranges;
+    struct list_head    regs;
+};
+
+struct rdb_block {
+    struct list_head    list;
+    unsigned            id;
+    char                *name;
+    char                *description;
+};
+
+struct rdb_domain {
+    struct list_head    list;
+    unsigned            id;
+    char                *name;
+    char                *description;
+};
+
+
+struct rdb_field {
+    struct list_head    list;
+    unsigned            shift;
+    unsigned            mask;
+    unsigned            dvalue;
+    unsigned            rw;
+    char                *name;
+    char                *description;
+    struct list_head    values;
+};
+
+struct rdb_it {
+    struct list_head    list;
+    unsigned            it;
+    char                *name;
+    char                *description;
+};
+
+struct rdb_range {
+    struct list_head    list;
+    unsigned            domain;
+    unsigned            soffset;
+    unsigned            eoffset;
+    char                *name;
+    char                *description;
+};
+
+struct rdb_reg {
+    struct list_head    list;
+    unsigned            block;
+    unsigned            domain;
+    unsigned            offset;
+    unsigned            size;
+    /* base represent the starting id value to use in name for repeating register */
+    unsigned            base;
+    unsigned            nrepeat;
+    unsigned            stride;
+    char                *name;
+    char                *description;
+    struct list_head    fields;
+};
+
+struct rdb_value {
+    struct list_head    list;
+    unsigned            value;
+    char                *name;
+    char                *description;
+};
+
+void rdb_init(struct rdb *rdb);
+int rdb_read(struct rdb *rdb, FILE *file);
+void rdb_write(FILE *file, struct rdb *rdb);
+const struct rdb_reg *rdb_find_reg(struct rdb *rdb, unsigned domain, unsigned offset);
+
+#endif
diff --git a/rdb_annotateib.c b/rdb_annotateib.c
new file mode 100644
index 0000000..895e0b1
--- /dev/null
+++ b/rdb_annotateib.c
@@ -0,0 +1,185 @@
+/*
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * author: Jerome Glisse
+ */
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "rdb.h"
+
+char *line_skip(char *line, unsigned nspace)
+{
+    do {
+        if (*line == ' ') {
+            nspace--;
+        }
+        line++;
+    } while (nspace);
+    return line;
+}
+
+void annotate(struct rdb *rdb, FILE *file)
+{
+    char line[128], *tmp;
+    unsigned offset, value, ndw = 0, pkt = 0, it;
+
+    while (!feof(file)) {
+        if (fgets(line, sizeof(line), file) == NULL) {
+            continue;
+        }
+        line[strlen(line) - 1] = 0;
+        tmp = strstr(line, "] [");
+        if (tmp == NULL) {
+            printf("%s\n", line);
+            continue;
+        }
+        tmp = strchr(tmp + 4, ']');
+        if (tmp == NULL) {
+            printf("%s\n", line);
+            continue;
+        }
+        value = strtoul(tmp + 2, &tmp, 0);
+        if (tmp == NULL) {
+            printf("%s\n", line);
+            continue;
+        }
+        if (ndw) {
+            const struct rdb_reg *reg;
+
+            switch (pkt) {
+            case 3:
+                switch (it) {
+                case 0x68:
+                    if (!offset) {
+                        offset = (value << 2) + 0x8000;
+                        printf("%s  // CFG_OFFSET 0x%08x\n", line, offset);
+                    } else {
+                        reg = rdb_find_reg(rdb, 0, offset);
+                        if (reg) {
+                            printf("%s  // 0x%08x %s\n", line, offset, reg->name);
+                        } else {
+                            printf("%s  // 0x%08x ??\n", line, offset);
+                        }
+                        offset += 4;
+                    }
+                    break;
+                case 0x69:
+                    if (!offset) {
+                        offset = (value << 2) + 0x28000;
+                        printf("%s  // CTX_OFFSET 0x%08x\n", line, offset);
+                    } else {
+                        reg = rdb_find_reg(rdb, 0, offset);
+                        if (reg) {
+                            printf("%s  // 0x%08x %s\n", line, offset, reg->name);
+                        } else {
+                            printf("%s  // 0x%08x ??\n", line, offset);
+                        }
+                        offset += 4;
+                    }
+                    break;
+                default:
+                    printf("%s\n", line);
+                    break;
+                }
+                break;
+            case 0:
+            default:
+                reg = rdb_find_reg(rdb, 0, offset);
+                if (reg) {
+                    printf("%s  // 0x%08x %s\n", line, offset, reg->name);
+                } else {
+                    printf("%s  // 0x%08x ??\n", line, offset);
+                }
+                offset += 4;
+                break;
+            }
+            ndw--;
+        } else {
+            pkt = (value >> 30) & 3;
+            switch (pkt) {
+            case 0:
+                offset = (value & 0xffff) << 2;
+                ndw = ((value >> 16) & 0x3fff) + 1;
+                printf("%s  // PKT0 0x%08x %ddw\n", line, offset, ndw);
+                break;
+            case 3:
+                offset = 0;
+                ndw = ((value >> 16) & 0x3fff) + 1;
+                it = ((value >> 8) & 0xff);
+                switch (it) {
+                case 0x29:
+                case 0x2b:
+                case 0x2d:
+                case 0x2e:
+                case 0x35:
+                    printf("%s  // PKT3 0x%02x %ddw DRAW_PKT *******************************************************\n", line, it, ndw);
+                    break;
+                default:
+                    printf("%s  // PKT3 0x%02x %ddw\n", line, it, ndw);
+                    break;
+                }
+                break;
+            case 1:
+            case 2:
+            default:
+                printf("%s\n", line);
+                break;
+            }
+        }
+    }
+}
+
+int main(int argc, char *argv[])
+{
+    struct rdb rdb;
+    FILE *file;
+
+    if (argc != 3) {
+        printf("usage %s ibfile rdb\n", argv[0]);
+        return -1;
+    }
+
+    file = fopen(argv[2], "r");
+    if (file == NULL) {
+        fprintf(stderr, "failed reading %s\n", argv[2]);
+        return -1;
+    }
+    rdb_init(&rdb);
+    if (rdb_read(&rdb, file)) {
+        fprintf(stderr, "failed reading %s\n", argv[2]);
+        return -1;
+    }
+    fclose(file);
+
+    file = fopen(argv[1], "r");
+    if (file == NULL) {
+        fprintf(stderr, "failed reading %s\n", argv[1]);
+        return -1;
+    }
+    annotate(&rdb, file);
+    fclose(file);
+}
diff --git a/rdb_annotateib2.c b/rdb_annotateib2.c
new file mode 100644
index 0000000..b4970df
--- /dev/null
+++ b/rdb_annotateib2.c
@@ -0,0 +1,322 @@
+/*
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * author: Jerome Glisse
+ */
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "rdb.h"
+
+#define WINDOW 64
+
+struct reg {
+    struct reg  *next;
+    unsigned    offset;
+    unsigned    value;
+    unsigned    after;
+    unsigned    before;
+    unsigned    tmp_count;
+    unsigned    pos;
+};
+
+struct cmp {
+    struct reg  *reg;
+    unsigned    nreg;
+};
+
+void cmp_set_reg(struct cmp *cmp, unsigned offset, unsigned value, unsigned pos)
+{
+    struct reg *reg = cmp->reg;
+
+    while (reg) {
+        if (reg->offset == offset) {
+            reg->value = value;
+            reg->tmp_count++;
+            reg->pos = pos;
+            return;
+        }
+        reg = reg->next;
+    }
+
+    reg = malloc(sizeof(*reg));
+    reg->offset = offset;
+    reg->value = value;
+    reg->next = cmp->reg;
+    reg->after = 0;
+    reg->before = 0;
+    reg->pos = pos;
+    reg->tmp_count = 1;
+    cmp->reg = reg;
+    cmp->nreg++;
+}
+
+void cmp_commit_before(struct cmp *cmp, unsigned pos)
+{
+    struct reg *reg = cmp->reg;
+
+    while (reg) {
+        if (reg->pos < pos && (pos - reg->pos) < WINDOW) {
+            reg->before += reg->tmp_count;
+        }
+        reg->tmp_count = 0;
+        reg = reg->next;
+    }
+}
+
+void cmp_commit_after(struct cmp *cmp, unsigned pos)
+{
+    struct reg *reg = cmp->reg;
+
+    while (reg) {
+        if (reg->pos > pos && (reg->pos - pos) < WINDOW) {
+            reg->after += reg->tmp_count;
+        }
+        reg->tmp_count = 0;
+        reg = reg->next;
+    }
+}
+
+void cmp_print(struct cmp *cmp)
+{
+    struct reg *reg = cmp->reg;
+
+    while (reg) {
+        printf("%8d %8d 0x%08x\n", reg->before, reg->after, reg->offset);
+        reg = reg->next;
+    }
+}
+
+static void cmp_short_before(struct cmp *cmp)
+{
+    unsigned not_shorted = 1;
+    unsigned npass = 0;
+
+//cmp_print(cmp);
+    while (not_shorted) {
+        struct reg *reg = cmp->reg;
+        struct reg **preg = &cmp->reg;
+
+        not_shorted = 0;
+        while (reg) {
+            if (reg->next && reg->next->before > reg->before) {
+                struct reg *nreg = reg->next;
+
+                *preg = nreg;
+                reg->next = nreg->next;
+                nreg->next = reg;
+                not_shorted = 1;
+            }
+            preg = &reg->next;
+            reg = reg->next;
+        }
+//printf("pass %d ---------------------------------------\n", npass);
+//cmp_print(cmp);
+        npass++;
+    }
+}
+
+static void cmp_short_after(struct cmp *cmp)
+{
+    unsigned not_shorted = 1;
+
+    while (not_shorted) {
+        struct reg *reg = cmp->reg;
+        struct reg **preg = &cmp->reg;
+
+        not_shorted = 0;
+        while (reg) {
+            if (reg->next && reg->next->after > reg->after) {
+               struct reg *nreg = reg->next;
+
+                *preg = nreg;
+                reg->next = nreg->next;
+                nreg->next = reg;
+                not_shorted = 1;
+            }
+            preg = &reg->next;
+            reg = reg->next;
+        }
+    }
+}
+
+char *line_skip(char *line, unsigned nspace)
+{
+    do {
+        if (*line == ' ') {
+            nspace--;
+        }
+        line++;
+    } while (nspace);
+    return line;
+}
+
+void annotate(struct cmp *cmp, unsigned mreg, FILE *file)
+{
+    char line[128], *tmp;
+    unsigned offset, value, ndw = 0, pkt = 0, it;
+    unsigned pos = 0, rpos = 0;
+
+    while (!feof(file)) {
+        if (fgets(line, sizeof(line), file) == NULL) {
+            continue;
+        }
+        pos++;
+        if (rpos && pos > rpos && (pos - rpos) >= WINDOW) {
+            cmp_commit_after(cmp, rpos);
+            rpos = 0;
+        }
+        line[strlen(line) - 1] = 0;
+        tmp = strstr(line, "] [");
+        if (tmp == NULL) {
+//            printf("%s\n", line);
+            continue;
+        }
+        tmp = strchr(tmp + 4, ']');
+        if (tmp == NULL) {
+//            printf("%s\n", line);
+            continue;
+        }
+        value = strtoul(tmp + 2, &tmp, 0);
+        if (tmp == NULL) {
+//            printf("%s\n", line);
+            continue;
+        }
+        if (ndw) {
+            switch (pkt) {
+            case 3:
+                switch (it) {
+                case 0x68:
+                    if (!offset) {
+                        offset = (value << 2) + 0x8000;
+                    } else {
+                        cmp_set_reg(cmp, offset, value, pos);
+                        if (offset == mreg) {
+                            rpos = pos;
+                            cmp_commit_before(cmp, rpos);
+                        }
+                        offset += 4;
+                    }
+                    break;
+                case 0x69:
+                    if (!offset) {
+                        offset = (value << 2) + 0x28000;
+                    } else {
+                        cmp_set_reg(cmp, offset, value, pos);
+                        if (offset == mreg) {
+                            rpos = pos;
+                            cmp_commit_before(cmp, rpos);
+                        }
+                        offset += 4;
+                    }
+                    break;
+                default:
+//                    printf("%s\n", line);
+                    break;
+                }
+                break;
+            case 0:
+            default:
+                cmp_set_reg(cmp, offset, value, pos);
+                if (offset == mreg) {
+                    rpos = pos;
+                    cmp_commit_before(cmp, rpos);
+                }
+                offset += 4;
+                break;
+            }
+            ndw--;
+        } else {
+            pkt = (value >> 30) & 3;
+            switch (pkt) {
+            case 0:
+                offset = (value & 0xffff) << 2;
+                if (offset == mreg) {
+                    rpos = pos;
+                    cmp_commit_before(cmp, rpos);
+                }
+                ndw = ((value >> 16) & 0x3fff) + 1;
+                break;
+            case 3:
+                offset = 0;
+                ndw = ((value >> 16) & 0x3fff) + 1;
+                it = ((value >> 8) & 0xff);
+                switch (it) {
+                case 0x29:
+                case 0x2b:
+                case 0x2d:
+                case 0x2e:
+                case 0x35:
+                    /* DRAW */
+                    break;
+                default:
+                    break;
+                }
+                break;
+            case 1:
+            case 2:
+            default:
+                break;
+            }
+        }
+    }
+}
+
+int main(int argc, char *argv[])
+{
+    struct cmp cmp;
+    FILE *file;
+    unsigned reg, i;
+
+    cmp.reg = NULL;
+    cmp.nreg = 0;
+    if (argc < 3) {
+        printf("usage %s rdb reg ibfile*\n", argv[0]);
+        return -1;
+    }
+
+    reg = strtoul(argv[1], NULL, 0);
+
+    for (i = 2; i < argc; i++) {
+        file = fopen(argv[i], "r");
+        if (file == NULL) {
+            fprintf(stderr, "failed reading %s\n", argv[i]);
+            return -1;
+        }
+        while (!feof(file)) {
+            annotate(&cmp, reg, file);
+        }
+        fclose(file);
+    }
+    printf("BEFORE REG %d -------------------------------------------------------\n", cmp.nreg);
+    cmp_short_before(&cmp);
+    cmp_print(&cmp);
+#if 1
+    printf("AFTER  REG %d -------------------------------------------------------\n", cmp.nreg);
+    cmp_short_after(&cmp);
+    cmp_print(&cmp);
+#endif
+}
diff --git a/rdb_anotate.c b/rdb_anotate.c
new file mode 100644
index 0000000..650d85a
--- /dev/null
+++ b/rdb_anotate.c
@@ -0,0 +1,116 @@
+/*
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * author: Jerome Glisse
+ */
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "rdb.h"
+
+char *line_skip(char *line, unsigned nspace)
+{
+    do {
+        if (*line == ' ') {
+            nspace--;
+        }
+        line++;
+    } while (nspace);
+    return line;
+}
+
+void annotate(struct rdb *rdb, FILE *file, unsigned base, unsigned mask)
+{
+    char line[128], *tmp;
+    unsigned offset, value;
+
+    while (!feof(file)) {
+        if (fgets(line, sizeof(line), file) == NULL) {
+            continue;
+        }
+        switch (line[0]) {
+        case 'R':
+        case 'W':
+            tmp = line_skip(line, 4);
+            offset = strtoul(tmp, &tmp, 0);
+            value = strtoul(tmp, &tmp, 0);
+            if ((offset & ~mask) == base) {
+                const struct rdb_reg *reg;
+                offset &= mask;
+                reg = rdb_find_reg(rdb, 0, offset);
+                if (reg) {
+                    printf("%c    0x%08x 0x%08x %s\n", line[0], offset, value, reg->name);
+                } else {
+                    printf("%c    0x%08x 0x%08x ??\n", line[0], offset, value);
+                }
+            }
+            break;
+        default:
+            break;
+        }
+    }
+}
+
+int main(int argc, char *argv[])
+{
+    unsigned base, mask;
+    struct rdb rdb;
+    FILE *file;
+
+    if (argc != 4) {
+        printf("usage %s dumpfile baseoffset rdb\n", argv[0]);
+        return -1;
+    }
+
+    file = fopen(argv[3], "r");
+    if (file == NULL) {
+        fprintf(stderr, "failed reading %s\n", argv[3]);
+        return -1;
+    }
+    rdb_init(&rdb);
+    if (rdb_read(&rdb, file)) {
+        fprintf(stderr, "failed reading %s\n", argv[3]);
+        return -1;
+    }
+    fclose(file);
+
+    base = strtoul(argv[2], NULL, 0);
+    if (base) {
+        for (mask = 1; !(base & mask); mask <<= 1);
+        mask -= 1;
+        fprintf(stderr, "base 0x%08x mask 0x%08x\n", base, mask);
+    } else {
+        mask = 0xffffffff;
+    }
+
+    file = fopen(argv[1], "r");
+    if (file == NULL) {
+        fprintf(stderr, "failed reading %s\n", argv[1]);
+        return -1;
+    }
+    annotate(&rdb, file, base, mask);
+    fclose(file);
+}
diff --git a/rdb_build.c b/rdb_build.c
new file mode 100644
index 0000000..6facda8
--- /dev/null
+++ b/rdb_build.c
@@ -0,0 +1,277 @@
+/*
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * author: Jerome Glisse
+ */
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "rdb.h"
+
+/* Build rdb out of header format as :
+ * (#define for reg name and offset, #  define for reg field and mask)
+#define GENERAL_PWRMGT                                        0x618
+#  define OPEN_DRAIN_PADS(x)                   (x & 1 << 11)
+
+ */
+
+struct ctx {
+    struct rdb          rdb;
+    struct rdb_reg      *lreg;
+    struct rdb_field    *lfield;
+    char                tokens[8][64];
+    unsigned            ntokens;
+    unsigned            line;
+};
+
+static void ptoken(struct ctx *ctx)
+{
+    unsigned i;
+
+    for (i = 0; i < ctx->ntokens; i++) {
+        fprintf(stderr, "token[%d] %s\n", i, ctx->tokens[i]);
+    }
+}
+
+static int parse_enum(struct ctx *ctx, const char *line)
+{
+    struct rdb_value *value;
+
+    if (ctx->ntokens != 3) {
+        fprintf(stderr, "%s %d [%d] wrong nomber of token for value %d\n", __func__, __LINE__, ctx->line, ctx->ntokens);
+        ptoken(ctx);
+        return -EINVAL;
+    }
+
+    value = malloc(sizeof(*value));
+    if (value == NULL) {
+        return -ENOMEM;
+    }
+
+    value->name = strdup(ctx->tokens[1]);
+    value->value = strtoul(ctx->tokens[2], NULL, 0);
+    value->description = NULL;
+    list_add_tail(&value->list, &ctx->lfield->values);
+    return 0;
+}
+
+static int parse_field(struct ctx *ctx, const char *line)
+{
+    struct rdb_field *field;
+
+    if (ctx->ntokens != 6) {
+        fprintf(stderr, "%s %d [%d] wrong nomber of token for field %d\n", __func__, __LINE__, ctx->line, ctx->ntokens);
+        ptoken(ctx);
+        return -EINVAL;
+    }
+    if (ctx->lreg == NULL) {
+        return -EINVAL;
+    }
+
+    field = malloc(sizeof(*field));
+    if (field == NULL) {
+        return -ENOMEM;
+    }
+
+    field->name = strdup(ctx->tokens[1]);
+    field->mask = strtoul(ctx->tokens[4], NULL, 0);
+    field->shift = strtoul(ctx->tokens[5], NULL, 0);
+
+    list_init_head(&field->values);
+    field->dvalue = 0;
+    field->description = NULL;
+    ctx->lfield = field;
+    list_add_tail(&field->list, &ctx->lreg->fields);
+    return 0;
+}
+
+static int parse_reg(struct ctx *ctx, const char *line)
+{
+    struct rdb_reg *reg;
+
+    if (ctx->ntokens != 3) {
+        fprintf(stderr, "%s %d [%d] wrong nomber of token for reg %d\n", __func__, __LINE__, ctx->line, ctx->ntokens);
+        return -EINVAL;
+    }
+    reg = malloc(sizeof(*reg));
+    if (reg == NULL) {
+        return -ENOMEM;
+    }
+
+    reg->name = strdup(ctx->tokens[1]);
+    reg->offset = strtoul(ctx->tokens[2], NULL, 0);
+
+    reg->domain = RDB_DOMAIN_MMIO;
+    list_init_head(&reg->fields);
+    reg->base = 0;
+    reg->nrepeat = 1;
+    reg->stride = 0;
+    reg->size = 32;
+    reg->description = NULL;
+
+    ctx->lreg = reg;
+
+    list_add_tail(&reg->list, &ctx->rdb.regs);
+    return 0;
+}
+
+static int valid_char(unsigned ts, char c)
+{
+    if (c >= 'A' && c <= 'Z')
+        return 1;
+    if (c >= 'a' && c <= 'z')
+        return 1;
+
+    if (ts) {
+        if (c >= '0' && c <= '9')
+            return 1;
+        if (c == '_')
+            return 1;
+    }
+    return 0;
+}
+
+static int valid_value(unsigned ts, char c)
+{
+    if (c >= '0' && c <= '9')
+        return 1;
+    if (ts == 1) {
+        if (c == 'x')
+            return 1;
+    }
+    if (ts > 1) {
+        if (c >= 'a' && c <= 'f')
+            return 1;
+        if (c >= 'A' && c <= 'F')
+            return 1;
+    }
+    return 0;
+}
+
+static int parse_tokenize(struct ctx *ctx, const char *line)
+{
+    unsigned i = 0;
+    unsigned ts = 0;
+
+    ctx->ntokens = 0;
+    do {
+        if (valid_char(ts, line[i])) {
+            ctx->tokens[ctx->ntokens][ts++] = line[i];
+            continue;
+        }
+        if (valid_value(ts, line[i])) {
+            ctx->tokens[ctx->ntokens][ts++] = line[i];
+            continue;
+        }
+        if (!line[i]) {
+            ctx->tokens[ctx->ntokens][ts] = 0;
+            return 0;
+        }
+        if (ts) {
+            ctx->tokens[ctx->ntokens][ts] = 0;
+            ts = 0;
+            ctx->ntokens++;
+        }
+    } while (line[i++]);
+    return 0;
+}
+
+static int parse(struct ctx *ctx, const char *filename)
+{
+    FILE *file;
+    char line[128];
+    int r = 0;
+
+    file = fopen(filename, "r");
+    if (file == NULL) {
+        fprintf(stderr, "%s %d failed opening %s\n", __func__, __LINE__, filename);
+        return -EINVAL;
+    }
+    while (!feof(file)) {
+        if (fgets(line, sizeof(line), file) == NULL) {
+            continue;
+        }
+        ctx->line++;
+        r = parse_tokenize(ctx, line);
+        if (r) {
+            return r;
+        }
+        if (line[0] == '/' && line[1] == '*') {
+            continue;
+        }
+        if (strlen(line) < 3) {
+            continue;
+        }
+        if (strstr(line, "#  define")) {
+            r = parse_field(ctx, line);
+        } else if (strstr(line, "#    define")) {
+            r = parse_enum(ctx, line);
+        } else if (strstr(line, "#define")) {
+            r = parse_reg(ctx, line);
+        } else {
+            r = 0;
+        }
+        if (r) {
+            return r;
+        }
+    }
+    return 0;
+}
+
+void pspace(unsigned n, unsigned s)
+{
+    unsigned i;
+
+    if (s >= n) {
+        printf(" ");
+        return;
+    }
+    for (i = 0; i < (n - s - 1); i++) {
+        printf(" ");
+    }
+}
+
+int main(int argc, char *argv[])
+{
+    struct ctx *ctx;
+    int r;
+
+    if (argc != 2) {
+        printf("usage %s headerfile\n", argv[0]);
+        return -1;
+    }
+
+    ctx = calloc(1, sizeof(*ctx));
+    if (ctx == NULL) {
+        return -ENOMEM;
+    }
+    rdb_init(&ctx->rdb);
+    r = parse(ctx, argv[1]);
+    if (r) {
+        return r;
+    }
+    rdb_write(stdout, &ctx->rdb);
+}
diff --git a/rdb_build2.c b/rdb_build2.c
new file mode 100644
index 0000000..81661ac
--- /dev/null
+++ b/rdb_build2.c
@@ -0,0 +1,308 @@
+/*
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * author: Jerome Glisse
+ */
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "rdb.h"
+
+/* Build rdb out of header format as :
+ * (no space for reg name and offset, 2 space for reg field and mask)
+CP_STALLED_STAT1                                      = 0x8674,
+  RBIU_TO_DMA_NOT_RDY_TO_RCV_bit                    = 1 << 0,
+
+ */
+
+struct ctx {
+    struct rdb          rdb;
+    struct rdb_reg      *lreg;
+    struct rdb_field    *lfield;
+    char                tokens[8][64];
+    unsigned            ntokens;
+    unsigned            line;
+    unsigned            last_value_value;
+};
+
+static void ptoken(struct ctx *ctx)
+{
+    unsigned i;
+
+    for (i = 0; i < ctx->ntokens; i++) {
+        fprintf(stderr, "token[%d] %s\n", i, ctx->tokens[i]);
+    }
+}
+
+static int parse_enum(struct ctx *ctx, const char *line)
+{
+    struct rdb_value *value;
+
+    value = malloc(sizeof(*value));
+    if (value == NULL) {
+        return -ENOMEM;
+    }
+    if (ctx->ntokens > 2) {
+        fprintf(stderr, "%s %d [%d] wrong nomber of token for reg %d\n", __func__, __LINE__, ctx->line, ctx->ntokens);
+        return -EINVAL;
+    }
+
+    value->name = strdup(ctx->tokens[0]);
+    if (ctx->ntokens == 2) {
+        value->value = strtoul(ctx->tokens[1], NULL, 0);
+    } else {
+        value->value = ctx->last_value_value + 1;
+    }
+    ctx->last_value_value = value->value;
+    value->description = NULL;
+    list_add_tail(&value->list, &ctx->lfield->values);
+    return 0;
+}
+
+static int parse_field(struct ctx *ctx, const char *line)
+{
+    struct rdb_field *field;
+    char *tmp;
+
+    if (ctx->ntokens != 3) {
+        fprintf(stderr, "%s %d [%d] wrong nomber of token for field %d\n", __func__, __LINE__, ctx->line, ctx->ntokens);
+        ptoken(ctx);
+        return -EINVAL;
+    }
+    if (ctx->lreg == NULL) {
+        return -EINVAL;
+    }
+
+    field = malloc(sizeof(*field));
+    if (field == NULL) {
+        return -ENOMEM;
+    }
+
+    tmp = strstr(ctx->tokens[0], "_bit");
+    if (tmp) {
+        *tmp = 0;
+    }
+    tmp = strstr(ctx->tokens[0], "_mask");
+    if (tmp) {
+        *tmp = 0;
+    }
+
+    field->name = strdup(ctx->tokens[0]);
+    field->mask = strtoul(ctx->tokens[1], NULL, 0);
+    field->shift = strtoul(ctx->tokens[2], NULL, 0);
+
+    list_init_head(&field->values);
+    field->dvalue = 0;
+    field->description = NULL;
+    ctx->lfield = field;
+    list_add_tail(&field->list, &ctx->lreg->fields);
+    return 0;
+}
+
+static int parse_reg(struct ctx *ctx, const char *line)
+{
+    struct rdb_reg *reg;
+
+    if (ctx->ntokens != 2) {
+        fprintf(stderr, "%s %d [%d] wrong nomber of token for reg %d\n", __func__, __LINE__, ctx->line, ctx->ntokens);
+        return -EINVAL;
+    }
+    reg = malloc(sizeof(*reg));
+    if (reg == NULL) {
+        return -ENOMEM;
+    }
+
+    reg->name = strdup(ctx->tokens[0]);
+    reg->offset = strtoul(ctx->tokens[1], NULL, 0);
+
+    reg->domain = RDB_DOMAIN_MMIO;
+    list_init_head(&reg->fields);
+    reg->base = 0;
+    reg->nrepeat = 1;
+    reg->stride = 0;
+    reg->size = 32;
+    reg->description = NULL;
+
+    ctx->lreg = reg;
+
+    list_add_tail(&reg->list, &ctx->rdb.regs);
+    return 0;
+}
+
+static int valid_char(unsigned ts, char c)
+{
+    if (c >= 'A' && c <= 'Z')
+        return 1;
+    if (c >= 'a' && c <= 'z')
+        return 1;
+
+    if (ts) {
+        if (c >= '0' && c <= '9')
+            return 1;
+        if (c == '_')
+            return 1;
+    }
+    return 0;
+}
+
+static int valid_value(unsigned ts, char c)
+{
+    if (c >= '0' && c <= '9')
+        return 1;
+    if (ts == 1) {
+        if (c == 'x')
+            return 1;
+    }
+    if (ts > 1) {
+        if (c >= 'a' && c <= 'f')
+            return 1;
+        if (c >= 'A' && c <= 'F')
+            return 1;
+    }
+    return 0;
+}
+
+static int parse_tokenize(struct ctx *ctx, const char *line)
+{
+    unsigned i = 0;
+    unsigned ts = 0;
+    unsigned is_char = 0;
+
+    ctx->ntokens = 0;
+    do {
+        if (!ts && valid_char(ts, line[i])) {
+            ctx->tokens[ctx->ntokens][ts++] = line[i];
+            is_char = 1;
+            continue;
+        }
+        if (is_char && valid_char(ts, line[i])) {
+            ctx->tokens[ctx->ntokens][ts++] = line[i];
+            continue;
+        }
+        if (valid_value(ts, line[i])) {
+            ctx->tokens[ctx->ntokens][ts++] = line[i];
+            continue;
+        }
+        if (!line[i]) {
+            ctx->tokens[ctx->ntokens][ts] = 0;
+            return 0;
+        }
+        if (ts) {
+            ctx->tokens[ctx->ntokens][ts] = 0;
+            ts = 0;
+            is_char = 0;
+            ctx->ntokens++;
+        }
+    } while (line[i++]);
+    return 0;
+}
+
+static int parse(struct ctx *ctx, const char *filename)
+{
+    FILE *file;
+    char line[128];
+    int r = 0;
+
+    file = fopen(filename, "r");
+    if (file == NULL) {
+        fprintf(stderr, "%s %d failed opening %s\n", __func__, __LINE__, filename);
+        return -EINVAL;
+    }
+    while (!feof(file)) {
+        if (fgets(line, sizeof(line), file) == NULL) {
+            continue;
+        }
+        ctx->line++;
+        if (!strstr(line, " = ") && line[strlen(line) - 2] != ',') {
+            continue;
+        }
+        if (strstr(line, "_shift")) {
+            continue;
+        }
+        if (strstr(line, "_num")) {
+            continue;
+        }
+        if (strstr(line, "_offset")) {
+            continue;
+        }
+        r = parse_tokenize(ctx, line);
+        if (r) {
+            return r;
+        }
+        if (line[0] == '/' && line[1] == '*') {
+            continue;
+        }
+        if (strlen(line) < 3) {
+            continue;
+        }
+        if (line[0] == ' '  && line[1] == ' ' && line[2] == ' ' && line[3] == ' ') {
+            r = parse_enum(ctx, line);
+        } else if (line[0] == ' '  && line[1] == ' ') {
+            r = parse_field(ctx, line);
+        } else {
+            r = parse_reg(ctx, line);
+        }
+        if (r) {
+            return r;
+        }
+    }
+    return 0;
+}
+
+void pspace(unsigned n, unsigned s)
+{
+    unsigned i;
+
+    if (s >= n) {
+        printf(" ");
+        return;
+    }
+    for (i = 0; i < (n - s - 1); i++) {
+        printf(" ");
+    }
+}
+
+int main(int argc, char *argv[])
+{
+    struct ctx *ctx;
+    int r;
+
+    if (argc != 2) {
+        printf("usage %s headerfile\n", argv[0]);
+        return -1;
+    }
+
+    ctx = calloc(1, sizeof(*ctx));
+    if (ctx == NULL) {
+        return -ENOMEM;
+    }
+    rdb_init(&ctx->rdb);
+    r = parse(ctx, argv[1]);
+    if (r) {
+        return r;
+    }
+    rdb_write(stdout, &ctx->rdb);
+}
diff --git a/rdb_cmpib.c b/rdb_cmpib.c
new file mode 100644
index 0000000..d40e56f
--- /dev/null
+++ b/rdb_cmpib.c
@@ -0,0 +1,230 @@
+/*
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * author: Jerome Glisse
+ */
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "rdb.h"
+
+struct reg {
+    struct reg  *next;
+    unsigned    offset;
+    unsigned    value;
+};
+
+struct cmp {
+    struct reg  *reg;
+};
+
+void cmp_set_reg(struct cmp *cmp, unsigned offset, unsigned value)
+{
+    struct reg *reg = cmp->reg;
+
+    while (reg) {
+        if (reg->offset == offset) {
+            reg->value = value;
+            return;
+        }
+        reg = reg->next;
+    }
+
+    reg = malloc(sizeof(*reg));
+    reg->offset = offset;
+    reg->value = value;
+    reg->next = cmp->reg;
+    cmp->reg = reg;
+}
+
+static void cmp_diff(struct rdb *rdb, struct cmp *cmpa, struct cmp *cmpb)
+{
+    struct reg *regb = cmpb->reg;
+
+    while (regb) {
+        struct reg *rega = cmpa->reg;
+        while (rega) {
+            if (rega->offset == regb->offset) {
+                if (rega->value != regb->value) {
+                    const struct rdb_reg *reg;
+
+                    reg = rdb_find_reg(rdb, 0, rega->offset);
+                    if (reg) {
+                        printf("0x%08x -> 0x%08x  // 0x%08x %s\n", rega->value, regb->value, rega->offset, reg->name);
+                    } else {
+                        printf("0x%08x -> 0x%08x  // 0x%08x ??\n", rega->value, regb->value, rega->offset);
+                    }
+                }
+                break;
+            }
+            rega = rega->next;
+        }
+        regb = regb->next;
+    }
+}
+
+char *line_skip(char *line, unsigned nspace)
+{
+    do {
+        if (*line == ' ') {
+            nspace--;
+        }
+        line++;
+    } while (nspace);
+    return line;
+}
+
+void annotate(struct cmp *cmp, FILE *file)
+{
+    char line[128], *tmp;
+    unsigned offset, value, ndw = 0, pkt = 0, it;
+
+    while (!feof(file)) {
+        if (fgets(line, sizeof(line), file) == NULL) {
+            continue;
+        }
+        line[strlen(line) - 1] = 0;
+        tmp = strstr(line, "] [");
+        if (tmp == NULL) {
+            printf("%s\n", line);
+            continue;
+        }
+        tmp = strchr(tmp + 4, ']');
+        if (tmp == NULL) {
+            printf("%s\n", line);
+            continue;
+        }
+        value = strtoul(tmp + 2, &tmp, 0);
+        if (tmp == NULL) {
+            printf("%s\n", line);
+            continue;
+        }
+        if (ndw) {
+            switch (pkt) {
+            case 3:
+                switch (it) {
+                case 0x68:
+                    if (!offset) {
+                        offset = (value << 2) + 0x8000;
+                    } else {
+                        cmp_set_reg(cmp, offset, value);
+                        offset += 4;
+                    }
+                    break;
+                case 0x69:
+                    if (!offset) {
+                        offset = (value << 2) + 0x28000;
+                    } else {
+                        cmp_set_reg(cmp, offset, value);
+                        offset += 4;
+                    }
+                    break;
+                default:
+                    printf("%s\n", line);
+                    break;
+                }
+                break;
+            case 0:
+            default:
+                cmp_set_reg(cmp, offset, value);
+                offset += 4;
+                break;
+            }
+            ndw--;
+        } else {
+            pkt = (value >> 30) & 3;
+            switch (pkt) {
+            case 0:
+                offset = (value & 0xffff) << 2;
+                ndw = ((value >> 16) & 0x3fff) + 1;
+                break;
+            case 3:
+                offset = 0;
+                ndw = ((value >> 16) & 0x3fff) + 1;
+                it = ((value >> 8) & 0xff);
+                switch (it) {
+                case 0x29:
+                case 0x2b:
+                case 0x2d:
+                case 0x2e:
+                case 0x35:
+                    return;
+                default:
+                    break;
+                }
+                break;
+            case 1:
+            case 2:
+            default:
+                break;
+            }
+        }
+    }
+}
+
+int main(int argc, char *argv[])
+{
+    struct rdb rdb;
+    struct cmp cmpa, cmpb;
+    FILE *file, *fileb;
+
+    cmpa.reg = NULL;
+    cmpb.reg = NULL;
+    if (argc != 4) {
+        printf("usage %s rdb ibfilea ibfileb\n", argv[0]);
+        return -1;
+    }
+
+    file = fopen(argv[1], "r");
+    if (file == NULL) {
+        fprintf(stderr, "failed reading %s\n", argv[1]);
+        return -1;
+    }
+    rdb_init(&rdb);
+    if (rdb_read(&rdb, file)) {
+        fprintf(stderr, "failed reading %s\n", argv[1]);
+        return -1;
+    }
+    fclose(file);
+
+    file = fopen(argv[2], "r");
+    if (file == NULL) {
+        fprintf(stderr, "failed reading %s\n", argv[2]);
+        return -1;
+    }
+    fileb = fopen(argv[3], "r");
+    if (fileb == NULL) {
+        fprintf(stderr, "failed reading %s\n", argv[3]);
+        return -1;
+    }
+    while (!feof(file) && !feof(fileb)) {
+        annotate(&cmpa, file);
+        annotate(&cmpb, fileb);
+        cmp_diff(&rdb, &cmpa, &cmpb);
+    }
+    fclose(file);
+    fclose(fileb);
+}
diff --git a/rdb_header.c b/rdb_header.c
new file mode 100644
index 0000000..2ea36fd
--- /dev/null
+++ b/rdb_header.c
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * author: Jerome Glisse
+ */
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "rdb.h"
+
+void rdb_header(FILE *file, struct rdb *rdb)
+{
+    struct rdb_value *value;
+    struct rdb_field *field;
+    struct rdb_it *it;
+    struct rdb_reg *reg;
+    struct rdb_range *range;
+
+    LIST_FOR_EACH_ENTRY (it, &rdb->its, list) {
+        fprintf(file, "#define IT_%s\t\t\t\t0x%08x\n", it->name, it->it);
+    }
+
+    LIST_FOR_EACH_ENTRY (range, &rdb->ranges, list) {
+        fprintf(file, "#define RNG_%s__START\t\t\t\t0x%08x\n", range->name, range->soffset);
+        fprintf(file, "#define RNG_%s__END\t\t\t\t0x%08x\n", range->name, range->eoffset);
+    }
+
+    LIST_FOR_EACH_ENTRY (reg, &rdb->regs, list) {
+        if (reg->nrepeat == 1) {
+            fprintf(file, "#define %s\t\t\t\t0x%08x\n", reg->name, reg->offset);
+        } else {
+            fprintf(file, "#define %s_%d\t\t\t\t0x%08x\n", reg->name, reg->base, reg->offset);
+        }
+        LIST_FOR_EACH_ENTRY (field, &reg->fields, list) {
+            fprintf(file, "#define   %s__%s__shift\t\t%d\n", reg->name, field->name, field->shift);
+            fprintf(file, "#define   %s__%s__mask\t\t0x%08x\n", reg->name, field->name, field->mask);
+            LIST_FOR_EACH_ENTRY (value, &field->values, list) {
+                fprintf(file, "#define     %s\t\t0x%08x\n", value->name, value->value);
+            }
+        }
+    }
+}
+
+int main(int argc, char *argv[])
+{
+    struct rdb rdb;
+    FILE *file;
+
+    if (argc != 2) {
+        printf("usage %s rdb\n", argv[0]);
+        return -1;
+    }
+
+    file = fopen(argv[1], "r");
+    if (file == NULL) {
+        fprintf(stderr, "failed reading %s\n", argv[1]);
+        return -1;
+    }
+    rdb_init(&rdb);
+    if (rdb_read(&rdb, file)) {
+        fprintf(stderr, "failed reading %s\n", argv[1]);
+        return -1;
+    }
+    rdb_header(stdout, &rdb);
+}
diff --git a/rdb_preg.c b/rdb_preg.c
new file mode 100644
index 0000000..2dda1e0
--- /dev/null
+++ b/rdb_preg.c
@@ -0,0 +1,53 @@
+/*
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * author: Jerome Glisse
+ */
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "rdb.h"
+
+int main(int argc, char *argv[])
+{
+    struct rdb rdb;
+    struct rdb_reg *reg;
+    FILE *file;
+
+    file = fopen(argv[1], "r");
+    if (file == NULL) {
+        fprintf(stderr, "failed reading %s\n", argv[1]);
+        return -1;
+    }
+    rdb_init(&rdb);
+    if (rdb_read(&rdb, file)) {
+        fprintf(stderr, "failed reading %s\n", argv[1]);
+        return -1;
+    }
+    LIST_FOR_EACH_ENTRY (reg, &rdb.regs, list) {
+        printf("0x%08x %s\n", reg->offset, reg->name);
+    }
+}
diff --git a/rdb_read.c b/rdb_read.c
new file mode 100644
index 0000000..0f0fa06
--- /dev/null
+++ b/rdb_read.c
@@ -0,0 +1,55 @@
+/*
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * author: Jerome Glisse
+ */
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "rdb.h"
+
+int main(int argc, char *argv[])
+{
+    struct rdb rdb;
+    FILE *file;
+
+    if (argc != 2) {
+        printf("usage %s rdb\n", argv[0]);
+        return -1;
+    }
+
+    file = fopen(argv[1], "r");
+    if (file == NULL) {
+        fprintf(stderr, "failed reading %s\n", argv[1]);
+        return -1;
+    }
+    rdb_init(&rdb);
+    if (rdb_read(&rdb, file)) {
+        fprintf(stderr, "failed reading %s\n", argv[1]);
+        return -1;
+    }
+    rdb_write(stdout, &rdb);
+}
diff --git a/rdb_sanitize.c b/rdb_sanitize.c
new file mode 100644
index 0000000..1413b42
--- /dev/null
+++ b/rdb_sanitize.c
@@ -0,0 +1,57 @@
+/*
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * author: Jerome Glisse
+ */
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "rdb.h"
+
+int main(int argc, char *argv[])
+{
+    struct rdb rdb;
+    FILE *file;
+
+    file = fopen(argv[1], "r");
+    if (file == NULL) {
+        fprintf(stderr, "failed reading %s\n", argv[1]);
+        return -1;
+    }
+    rdb_init(&rdb);
+    if (rdb_read(&rdb, file)) {
+        fprintf(stderr, "failed reading %s\n", argv[1]);
+        return -1;
+    }
+    fclose(file);
+
+    file = fopen(argv[1], "w");
+    if (file == NULL) {
+        fprintf(stderr, "failed reading %s\n", argv[1]);
+        return -1;
+    }
+    rdb_write(file, &rdb);
+}
diff --git a/rdb_update.c b/rdb_update.c
new file mode 100644
index 0000000..885728d
--- /dev/null
+++ b/rdb_update.c
@@ -0,0 +1,164 @@
+/*
+ * Copyright (C) 2012 Red Hat, Inc. All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included
+ * in all copies or substantial portions of the Software.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ *
+ * author: Jerome Glisse
+ */
+#include <errno.h>
+#include <stdio.h>
+#include <stdlib.h>
+#include <string.h>
+#include "rdb.h"
+
+int main(int argc, char *argv[])
+{
+    struct rdb rdb, rdb2;
+    FILE *file;
+    struct rdb_value *value, *value2, *value2t, *valuet;
+    struct rdb_field *field, *field2, *field2t, *fieldt;
+    struct rdb_it *it, *it2, *it2t, *itt;
+    struct rdb_reg *reg, *reg2, *reg2t, *regt;
+    struct rdb_range *range, *range2, *range2t, *ranget;
+    unsigned add, add2, add3;
+
+    if (argc != 3) {
+        printf("usage %s rdb1 rdb2\n", argv[0]);
+        return -1;
+    }
+
+    file = fopen(argv[1], "r");
+    if (file == NULL) {
+        fprintf(stderr, "failed reading %s\n", argv[1]);
+        return -1;
+    }
+    rdb_init(&rdb);
+    if (rdb_read(&rdb, file)) {
+        fprintf(stderr, "failed reading %s\n", argv[1]);
+        return -1;
+    }
+
+    file = fopen(argv[2], "r");
+    if (file == NULL) {
+        fprintf(stderr, "failed reading %s\n", argv[2]);
+        return -1;
+    }
+    rdb_init(&rdb2);
+    if (rdb_read(&rdb2, file)) {
+        fprintf(stderr, "failed reading %s\n", argv[2]);
+        return -1;
+    }
+
+    LIST_FOR_EACH_ENTRY_SAFE (it2, it2t, &rdb2.its, list) {
+        add = 1;
+        LIST_FOR_EACH_ENTRY_SAFE (it, itt, &rdb.its, list) {
+            if (it2->it == it->it) {
+                add = 0;
+                if (strcmp(it2->name, it->name)) {
+                    fprintf(stderr, "it %d name missmatch %s vs %s\n",
+                            it->it, it->name, it2->name);
+                }
+            }
+        }
+        if (add) {
+            list_del(&it2->list);
+            list_add_tail(&it2->list, &rdb.its);
+        }
+    }
+
+    LIST_FOR_EACH_ENTRY_SAFE (range2, range2t, &rdb2.ranges, list) {
+        add = 1;
+        LIST_FOR_EACH_ENTRY_SAFE (range, ranget, &rdb.ranges, list) {
+            if (range->soffset == range2->soffset && range->eoffset == range2->eoffset) {
+                add = 0;
+                if (strcmp(range2->name, range->name)) {
+                    fprintf(stderr, "range [0x%08x 0x%08x] name missmatch %s vs %s\n",
+                            range->soffset, range->eoffset, range->name, range2->name);
+                }
+            } else if (range->soffset < range2->eoffset && range->eoffset >= range2->soffset) {
+                    add = 0;
+                    fprintf(stderr, "range [0x%08x 0x%08x] collide with [0x%08x 0x%08x]\n",
+                            range->soffset, range->eoffset, range2->soffset, range2->eoffset);
+            }
+        }
+        if (add) {
+            list_del(&range2->list);
+            list_add_tail(&range2->list, &rdb.ranges);
+        }
+    }
+
+    LIST_FOR_EACH_ENTRY_SAFE (reg2, reg2t, &rdb2.regs, list) {
+        add = 1;
+        LIST_FOR_EACH_ENTRY_SAFE (reg, regt, &rdb.regs, list) {
+            if (reg->offset == reg2->offset && reg->domain == reg2->domain) {
+                add = 0;
+                if (strcmp(reg2->name, reg->name)) {
+                    fprintf(stderr, "reg [0x%08x 0x%08x] name missmatch %s vs %s\n",
+                            reg->domain, reg->offset, reg->name, reg2->name);
+                }
+                LIST_FOR_EACH_ENTRY_SAFE (field2, field2t, &reg2->fields, list) {
+                    add2 = 1;
+                    LIST_FOR_EACH_ENTRY_SAFE (field, fieldt, &reg->fields, list) {
+                        if (field->mask == field2->mask && field->shift == field2->shift) {
+                            add2 = 0;
+                            if (strcmp(field2->name, field->name)) {
+                                fprintf(stderr, "reg %s field %d 0x%08x name missmatch %s vs %s\n",
+                                        reg->name, field->shift, field->mask, field->name, field2->name);
+                            }
+                            LIST_FOR_EACH_ENTRY_SAFE (value2, value2t, &field2->values, list) {
+                                add3 = 1;
+                                LIST_FOR_EACH_ENTRY_SAFE (value, valuet, &field->values, list) {
+                                    if (value->value == value2->value) {
+                                        add3 = 0;
+                                        if (strcmp(value2->name, value->name)) {
+                                            fprintf(stderr, "reg %s field %s enum name missmatch %s vs %s\n",
+                                                    reg->name, field->name, value->name, value2->name);
+                                        }
+                                    }
+                                }
+                                if (add3) {
+                                    list_del(&value2->list);
+                                    list_add_tail(&value2->list, &field->values);
+                                }
+                            }
+                        } else if ((field->mask << field->shift) & (field2->mask << field2->shift)) {
+                            add2 = 0;
+                            fprintf(stderr, "reg %s field %d 0x%08x collide with %d 0x%08x\n",
+                                    reg->name, field->shift, field->mask, field2->shift, field2->mask);
+                        }
+                    }
+                    if (add2) {
+                        list_del(&field2->list);
+                        list_add_tail(&field2->list, &reg->fields);
+                    }
+                }
+            }
+        }
+        if (add) {
+            list_del(&reg2->list);
+            list_add_tail(&reg2->list, &rdb.regs);
+        }
+    }
+
+    rdb_write(stdout, &rdb);
+}
diff --git a/strip.sh b/strip.sh
new file mode 100755
index 0000000..619e81e
--- /dev/null
+++ b/strip.sh
@@ -0,0 +1,2 @@
+#!/bin/sh
+cat $1 | grep -v CP_RB_RPT | grep -v CP_RB_WPTR | grep -v IH_RB_RPTR | grep -v CP_ME_RAM_DATA | grep -v CP_PFP_UCODE_DATA | grep -v D1CRTC_STATUS_FRAME_COUNT | grep -v DC_HOT_PLUG_DET