diff options
author | Jerome Glisse <jglisse@redhat.com> | 2010-02-22 21:09:33 +0100 |
---|---|---|
committer | Jerome Glisse <jglisse@redhat.com> | 2010-02-22 21:09:33 +0100 |
commit | fd7e27e0f952dc63966a3f0c9aa5b46d2fa44151 (patch) | |
tree | 3ce1cde5d5fb4e19cd69e67a088cd54353ffb7f0 | |
parent | 35bf3a9c4d5ccb1cb9bd364ccbf4e8a64bcbee25 (diff) |
make it look like winsys
-rw-r--r-- | Makefile | 3 | ||||
-rw-r--r-- | mode.c | 1 | ||||
-rw-r--r-- | r600_atom.c | 179 | ||||
-rw-r--r-- | r600_atom_kernel.h | 220 | ||||
-rw-r--r-- | r600_batch.c | 201 | ||||
-rw-r--r-- | r600_winsys.h | 231 | ||||
-rw-r--r-- | r700_atom.c | 5 | ||||
-rw-r--r-- | radeon.c | 1 | ||||
-rw-r--r-- | radeon.h | 4 | ||||
-rw-r--r-- | radeon_atom.c | 84 | ||||
-rw-r--r-- | radeon_device.c | 211 | ||||
-rw-r--r-- | radeon_device.h | 189 | ||||
-rw-r--r-- | test.c | 20 |
13 files changed, 450 insertions, 899 deletions
@@ -1,5 +1,4 @@ -OBJECTS = radeon.o mode.o test.o r700_atom.o radeon_device.o radeon_atom.o\ - r600_atom.o r600_batch.o +OBJECTS = radeon.o mode.o test.o r700_atom.o r600_winsys.o r600_atom.o r600_batch.o CFLAGS = -g3 -O0 -std=gnu99 -I/usr/include/drm LDFLAGS = -ldrm -ldrm_radeon DEPS = radeon.h @@ -24,6 +24,7 @@ #include <errno.h> #include "xf86drm.h" #include "radeon_drm.h" +#include "r600_winsys.h" #include "radeon.h" #include "radeon_bo.h" diff --git a/r600_atom.c b/r600_atom.c index 3b08600..f5d012f 100644 --- a/r600_atom.c +++ b/r600_atom.c @@ -14,15 +14,14 @@ * along with this program; if not, write to the Free Software Foundation, * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ -#include "radeon_device.h" -#include "r600_winsys.h" +#include "r600.h" #include "r600d.h" /* * r600_cb */ -int r600_cb_emit(struct radeon_device *rdev, - struct radeon_atom *atom, +int r600_cb_emit(struct r600_winsys *rdev, + struct r600_atom *atom, void *data, struct radeon_ib *ib) { @@ -37,14 +36,14 @@ int r600_cb_emit(struct radeon_device *rdev, } /* FIXME delete */ -void r600_tflat(struct radeon_atom *atom); -int r600_cb_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data) +void r600_tflat(struct r600_atom *atom); +int r600_cb_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data) { struct drm_r600_cb *cb; u32 bpe, tmp; int r; - cb = kmalloc(sizeof(struct drm_r600_cb), GFP_KERNEL); + cb = malloc(sizeof(struct drm_r600_cb)); if (cb == NULL) return -ENOMEM; memcpy(cb, data, sizeof(struct drm_r600_cb)); @@ -104,7 +103,7 @@ int r600_cb_create(struct radeon_device *rdev, struct radeon_atom *atom, void *d break; case V_0280A0_COLOR_INVALID: default: - dev_err(rdev->dev, "%s cb invalid format %d\n", __func__, + fprintf(stderr, "%s cb invalid format %d\n", __func__, S_0280A0_FORMAT(cb->color_info)); return -EINVAL; } @@ -112,60 +111,60 @@ int r600_cb_create(struct radeon_device *rdev, struct radeon_atom *atom, void *d case V_0280A0_ARRAY_LINEAR_GENERAL: case V_0280A0_ARRAY_LINEAR_ALIGNED: if ((cb->width) & 0x3f) { - dev_err(rdev->dev, "%s:%d cb pitch (%d) invalid\n", + fprintf(stderr, "%s:%d cb pitch (%d) invalid\n", __func__, __LINE__, cb->width); return -EINVAL; } if ((cb->width * bpe) & (rdev->group_bytes - 1)) { - dev_err(rdev->dev, "%s:%d cb pitch (%d) invalid\n", + fprintf(stderr, "%s:%d cb pitch (%d) invalid\n", __func__, __LINE__, cb->width); return -EINVAL; } break; case V_0280A0_ARRAY_1D_TILED_THIN1: if ((cb->width) & 0x7) { - dev_err(rdev->dev, "%s:%d cb pitch (%d) invalid\n", + fprintf(stderr, "%s:%d cb pitch (%d) invalid\n", __func__, __LINE__, cb->width); return -EINVAL; } if ((cb->width * 8 * bpe * cb->nsamples) & (rdev->group_bytes - 1)) { - dev_err(rdev->dev, "%s:%d cb pitch (%d) invalid\n", + fprintf(stderr, "%s:%d cb pitch (%d) invalid\n", __func__, __LINE__, cb->width); return -EINVAL; } if (cb->height & 0x7) { - dev_err(rdev->dev, "%s:%d cb height (%d) invalid\n", + fprintf(stderr, "%s:%d cb height (%d) invalid\n", __func__, __LINE__, cb->height); return -EINVAL; } break; case V_0280A0_ARRAY_2D_TILED_THIN1: if ((cb->width) & ((8 * rdev->nbanks) - 1)) { - dev_err(rdev->dev, "%s:%d cb pitch (%d) invalid\n", + fprintf(stderr, "%s:%d cb pitch (%d) invalid\n", __func__, __LINE__, cb->width); return -EINVAL; } tmp = cb->width * 8 * bpe * cb->nsamples; tmp = tmp / rdev->nbanks; if (tmp & (rdev->group_bytes - 1)) { - dev_err(rdev->dev, "%s:%d cb pitch (%d) invalid\n", + fprintf(stderr, "%s:%d cb pitch (%d) invalid\n", __func__, __LINE__, cb->width); return -EINVAL; } if (cb->height & ((8 * rdev->npipes) - 1)) { - dev_err(rdev->dev, "%s:%d cb height (%d) invalid\n", + fprintf(stderr, "%s:%d cb height (%d) invalid\n", __func__, __LINE__, cb->height); return -EINVAL; } break; default: - dev_err(rdev->dev, "%s invalid tiling %d\n", __func__, + fprintf(stderr, "%s invalid tiling %d\n", __func__, G_0280A0_ARRAY_MODE(cb->color_info)); return -EINVAL; } /* cb require a buffer of at list cb->size */ if (radeon_bo_size(atom->bo[0]) < cb->width * cb->height * bpe) { - dev_err(rdev->dev, "%s bo too small (%d) need (%d) %d %d %d\n", + fprintf(stderr, "%s bo too small (%d) need (%d) %d %d %d\n", __func__, radeon_bo_size(atom->bo[0]), cb->width * cb->height * bpe, cb->width, cb->height, bpe); return -EINVAL; @@ -232,12 +231,12 @@ fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); /* * r600_cb_cntl */ -int r600_cb_cntl_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data) +int r600_cb_cntl_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data) { struct drm_r600_cb_cntl *cb_cntl; int r; - cb_cntl = kmalloc(sizeof(struct drm_r600_cb_cntl), GFP_KERNEL); + cb_cntl = malloc(sizeof(struct drm_r600_cb_cntl)); if (cb_cntl == NULL) return -ENOMEM; memcpy(cb_cntl, data, sizeof(struct drm_r600_cb_cntl)); @@ -285,78 +284,78 @@ fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); /* * r600_pa */ -int r600_pa_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data) +int r600_rasterizer_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data) { - struct drm_r600_pa *pa; + struct drm_r600_rasterizer *rasterizer; int r; - pa = kmalloc(sizeof(struct drm_r600_pa), GFP_KERNEL); - if (pa == NULL) + rasterizer = malloc(sizeof(struct drm_r600_rasterizer)); + if (rasterizer == NULL) return -ENOMEM; - memcpy(pa, data, sizeof(struct drm_r600_pa)); - atom->state = pa; + memcpy(rasterizer, data, sizeof(struct drm_r600_rasterizer)); + atom->state = rasterizer; /* PA_SC_MPASS_PS_CNTL */ atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1); atom->pkts[atom->npkts++] = 0x00000292; - atom->pkts[atom->npkts++] = pa->pa_sc_mpass_ps_cntl; + atom->pkts[atom->npkts++] = rasterizer->pa_sc_mpass_ps_cntl; /* PA_SC_LINE_CNTL */ atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1); atom->pkts[atom->npkts++] = 0x00000300; - atom->pkts[atom->npkts++] = pa->pa_sc_line_cntl; + atom->pkts[atom->npkts++] = rasterizer->pa_sc_line_cntl; /* PA_SC_AA_CONFIG */ atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1); atom->pkts[atom->npkts++] = 0x00000301; - atom->pkts[atom->npkts++] = pa->pa_sc_aa_config; + atom->pkts[atom->npkts++] = rasterizer->pa_sc_aa_config; /* PA_SC_AA_SAMPLE_LOCS_MCTX */ atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1); atom->pkts[atom->npkts++] = 0x00000307; - atom->pkts[atom->npkts++] = pa->pa_sc_aa_sample_locs_mctx; + atom->pkts[atom->npkts++] = rasterizer->pa_sc_aa_sample_locs_mctx; /* PA_SC_AA_MASK */ atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1); atom->pkts[atom->npkts++] = 0x00000312; - atom->pkts[atom->npkts++] = pa->pa_sc_aa_mask; + atom->pkts[atom->npkts++] = rasterizer->pa_sc_aa_mask; /* PA_CL_CLIP_CNTL */ atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1); atom->pkts[atom->npkts++] = 0x00000204; - atom->pkts[atom->npkts++] = pa->pa_cl_clip_cntl; + atom->pkts[atom->npkts++] = rasterizer->pa_cl_clip_cntl; /* PA_CL_VS_OUT_CNTL */ atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1); atom->pkts[atom->npkts++] = 0x00000207; - atom->pkts[atom->npkts++] = pa->pa_cl_vs_out_cntl; + atom->pkts[atom->npkts++] = rasterizer->pa_cl_vs_out_cntl; /* PA_CL_NANINF_CNTL */ atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1); atom->pkts[atom->npkts++] = 0x00000208; - atom->pkts[atom->npkts++] = pa->pa_cl_naninf_cntl; + atom->pkts[atom->npkts++] = rasterizer->pa_cl_naninf_cntl; /* PA_CL_GB_VERT_CLIP_ADJ */ atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 4); atom->pkts[atom->npkts++] = 0x00000303; - atom->pkts[atom->npkts++] = pa->pa_cl_gb_vert_clip_adj; - atom->pkts[atom->npkts++] = pa->pa_cl_gb_vert_disc_adj; - atom->pkts[atom->npkts++] = pa->pa_cl_gb_horz_clip_adj; - atom->pkts[atom->npkts++] = pa->pa_cl_gb_horz_disc_adj; + atom->pkts[atom->npkts++] = rasterizer->pa_cl_gb_vert_clip_adj; + atom->pkts[atom->npkts++] = rasterizer->pa_cl_gb_vert_disc_adj; + atom->pkts[atom->npkts++] = rasterizer->pa_cl_gb_horz_clip_adj; + atom->pkts[atom->npkts++] = rasterizer->pa_cl_gb_horz_disc_adj; /* PA_SU_SC_MODE_CNTL */ atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1); atom->pkts[atom->npkts++] = 0x00000205; - atom->pkts[atom->npkts++] = pa->pa_su_sc_mode_cntl; + atom->pkts[atom->npkts++] = rasterizer->pa_su_sc_mode_cntl; /* PA_SU_POINT_SIZE */ atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 4); atom->pkts[atom->npkts++] = 0x00000280; - atom->pkts[atom->npkts++] = pa->pa_su_point_size; - atom->pkts[atom->npkts++] = pa->pa_su_point_minmax; - atom->pkts[atom->npkts++] = pa->pa_su_line_cntl; - atom->pkts[atom->npkts++] = pa->pa_sc_line_stipple; + atom->pkts[atom->npkts++] = rasterizer->pa_su_point_size; + atom->pkts[atom->npkts++] = rasterizer->pa_su_point_minmax; + atom->pkts[atom->npkts++] = rasterizer->pa_su_line_cntl; + atom->pkts[atom->npkts++] = rasterizer->pa_sc_line_stipple; /* PA_SU_POLY_OFFSET_DB_FMT_CNTL */ atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2); atom->pkts[atom->npkts++] = 0x0000037E; - atom->pkts[atom->npkts++] = pa->pa_su_poly_offset_db_fmt_cntl; - atom->pkts[atom->npkts++] = pa->pa_su_poly_offset_clamp; + atom->pkts[atom->npkts++] = rasterizer->pa_su_poly_offset_db_fmt_cntl; + atom->pkts[atom->npkts++] = rasterizer->pa_su_poly_offset_clamp; /* PA_SU_POLY_OFFSET_FRONT_SCALE */ atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 4); atom->pkts[atom->npkts++] = 0x00000380; - atom->pkts[atom->npkts++] = pa->pa_su_poly_offset_front_scale; - atom->pkts[atom->npkts++] = pa->pa_su_poly_offset_front_offset; - atom->pkts[atom->npkts++] = pa->pa_su_poly_offset_back_scale; - atom->pkts[atom->npkts++] = pa->pa_su_poly_offset_back_offset; + atom->pkts[atom->npkts++] = rasterizer->pa_su_poly_offset_front_scale; + atom->pkts[atom->npkts++] = rasterizer->pa_su_poly_offset_front_offset; + atom->pkts[atom->npkts++] = rasterizer->pa_su_poly_offset_back_scale; + atom->pkts[atom->npkts++] = rasterizer->pa_su_poly_offset_back_offset; fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); return 0; } @@ -364,12 +363,12 @@ fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); /* * pipe_viewport_state */ -int r600_viewport_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data) +int r600_viewport_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data) { struct drm_r600_viewport *vport; int r; - vport = kmalloc(sizeof(struct drm_r600_viewport), GFP_KERNEL); + vport = malloc(sizeof(struct drm_r600_viewport)); if (vport == NULL) return -ENOMEM; memcpy(vport, data, sizeof(struct drm_r600_viewport)); @@ -394,12 +393,12 @@ fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); /* * pipe_scissor_state */ -int r600_scissor_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data) +int r600_scissor_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data) { struct drm_r600_scissor *scissor; int r; - scissor = kmalloc(sizeof(struct drm_r600_scissor), GFP_KERNEL); + scissor = malloc(sizeof(struct drm_r600_scissor)); if (scissor == NULL) return -ENOMEM; memcpy(scissor, data, sizeof(struct drm_r600_scissor)); @@ -415,12 +414,12 @@ int r600_scissor_create(struct radeon_device *rdev, struct radeon_atom *atom, vo /* * r600_blend */ -int r600_blend_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data) +int r600_blend_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data) { struct drm_r600_blend *blend; int r; - blend = kmalloc(sizeof(struct drm_r600_blend), GFP_KERNEL); + blend = malloc(sizeof(struct drm_r600_blend)); if (blend == NULL) return -ENOMEM; memcpy(blend, data, sizeof(struct drm_r600_blend)); @@ -447,18 +446,18 @@ fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); /* * r600_constant */ -int r600_constants_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data) +int r600_constants_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data) { struct drm_r600_constants *constants; int r; - constants = kmalloc(sizeof(struct drm_r600_constants), GFP_KERNEL); + constants = malloc(sizeof(struct drm_r600_constants)); if (constants == NULL) return -ENOMEM; memcpy(constants, data, sizeof(struct drm_r600_constants)); atom->state = constants; if ((constants->nconstants & 0x3) || (constants->offset & 0x3)) { - dev_err(rdev->dev, "invalid offset or number of constants (0x%08X %d)\n", + fprintf(stderr, "invalid offset or number of constants (0x%08X %d)\n", constants->offset, constants->nconstants); return -EINVAL; } @@ -475,8 +474,8 @@ int r600_constants_create(struct radeon_device *rdev, struct radeon_atom *atom, /* * r600_db */ -int r600_db_emit(struct radeon_device *rdev, - struct radeon_atom *atom, +int r600_db_emit(struct r600_winsys *rdev, + struct r600_atom *atom, void *data, struct radeon_ib *ib) { @@ -490,14 +489,14 @@ int r600_db_emit(struct radeon_device *rdev, return r; } -int r600_db_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data) +int r600_db_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data) { struct drm_r600_db *db; u32 nslices, ntiles_per_slice, ntiles, bpe; int has_s; int r; - db = kmalloc(sizeof(struct drm_r600_db), GFP_KERNEL); + db = malloc(sizeof(struct drm_r600_db)); if (db == NULL) return -ENOMEM; memcpy(db, data, sizeof(struct drm_r600_db)); @@ -536,7 +535,7 @@ int r600_db_create(struct radeon_device *rdev, struct radeon_atom *atom, void *d break; case V_028010_DEPTH_INVALID: default: - dev_err(rdev->dev, "invalid db format %d\n", G_028010_FORMAT(db->db_depth_info)); + fprintf(stderr, "invalid db format %d\n", G_028010_FORMAT(db->db_depth_info)); return -EINVAL; break; } @@ -544,17 +543,17 @@ int r600_db_create(struct radeon_device *rdev, struct radeon_atom *atom, void *d ntiles_per_slice = G_028000_SLICE_TILE_MAX(db->db_depth_size) + 1; ntiles = nslices * ntiles_per_slice; if ((ntiles * 64 * bpe) > radeon_bo_size(atom->bo[0])) { - dev_err(rdev->dev, "db buffer too small %d need %d (%d %d)\n", + fprintf(stderr, "db buffer too small %d need %d (%d %d)\n", radeon_bo_size(atom->bo[0]), ntiles * 64 * bpe, nslices, ntiles_per_slice); return -EINVAL; } if (db->hz_handle) { - dev_err(rdev->dev, "we don't know how to compute hiz buffer size\n"); + fprintf(stderr, "we don't know how to compute hiz buffer size\n"); return -EINVAL; } if (!db->hz_handle && G_028010_TILE_SURFACE_ENABLE(db->db_depth_info)) { - dev_err(rdev->dev, "hyperz enabled but no buffer supplied\n"); + fprintf(stderr, "hyperz enabled but no buffer supplied\n"); return -EINVAL; } /* R_02800C_DB_DEPTH_BASE */ @@ -597,12 +596,12 @@ fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); /* * r600_db_cntl */ -int r600_db_cntl_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data) +int r600_db_cntl_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data) { struct drm_r600_db_cntl *db_cntl; int r; - db_cntl = kmalloc(sizeof(struct drm_r600_db_cntl), GFP_KERNEL); + db_cntl = malloc(sizeof(struct drm_r600_db_cntl)); if (db_cntl == NULL) return -ENOMEM; memcpy(db_cntl, data, sizeof(struct drm_r600_db_cntl)); @@ -646,8 +645,8 @@ fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); /* * r600_vs_shader */ -int r600_vs_shader_emit(struct radeon_device *rdev, - struct radeon_atom *atom, +int r600_vs_shader_emit(struct r600_winsys *rdev, + struct r600_atom *atom, void *data, struct radeon_ib *ib) { @@ -658,13 +657,13 @@ int r600_vs_shader_emit(struct radeon_device *rdev, return r; } -int r600_vs_shader_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data) +int r600_vs_shader_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data) { struct drm_r600_vs_shader *vs_shader; int r, i, j; u32 tmp; - vs_shader = kmalloc(sizeof(struct drm_r600_vs_shader), GFP_KERNEL); + vs_shader = malloc(sizeof(struct drm_r600_vs_shader)); if (vs_shader == NULL) return -ENOMEM; memcpy(vs_shader, data, sizeof(struct drm_r600_vs_shader)); @@ -721,10 +720,10 @@ fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); } /* - * r600_ps_shader + * r600_fs_shader */ -int r600_ps_shader_emit(struct radeon_device *rdev, - struct radeon_atom *atom, +int r600_fs_shader_emit(struct r600_winsys *rdev, + struct r600_atom *atom, void *data, struct radeon_ib *ib) { @@ -735,18 +734,18 @@ int r600_ps_shader_emit(struct radeon_device *rdev, return r; } -int r600_ps_shader_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data) +int r600_fs_shader_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data) { - struct drm_r600_ps_shader *ps_shader; + struct drm_r600_fs_shader *fs_shader; u32 ninputs; int r, i; - ps_shader = kmalloc(sizeof(struct drm_r600_ps_shader), GFP_KERNEL); - if (ps_shader == NULL) + fs_shader = malloc(sizeof(struct drm_r600_fs_shader)); + if (fs_shader == NULL) return -ENOMEM; - memcpy(ps_shader, data, sizeof(struct drm_r600_ps_shader)); - atom->state = ps_shader; - atom->bo[0] = radeon_bo_lookup(rdev, ps_shader->handle); + memcpy(fs_shader, data, sizeof(struct drm_r600_fs_shader)); + atom->state = fs_shader; + atom->bo[0] = radeon_bo_lookup(rdev, fs_shader->handle); atom->flags[0] = 0x08000000; if (atom->bo[0] == NULL) { return -EINVAL; @@ -756,29 +755,29 @@ int r600_ps_shader_create(struct radeon_device *rdev, struct radeon_atom *atom, /* SQ_PGM_START_PS */ atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1); atom->pkts[atom->npkts++] = 0x00000210; - atom->pkts[atom->npkts++] = ps_shader->offset; + atom->pkts[atom->npkts++] = fs_shader->offset; atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0); atom->pkts[atom->npkts++] = 0x00000000; /* SQ_PGM_RESOURCES_PS */ atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2); atom->pkts[atom->npkts++] = 0x00000214; - atom->pkts[atom->npkts++] = ps_shader->sq_pgm_resources_ps; - atom->pkts[atom->npkts++] = ps_shader->sq_pgm_exports_ps; + atom->pkts[atom->npkts++] = fs_shader->sq_pgm_resources_ps; + atom->pkts[atom->npkts++] = fs_shader->sq_pgm_exports_ps; /* SQ_PGM_CF_OFFSET_PS */ atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1); atom->pkts[atom->npkts++] = 0x00000233; atom->pkts[atom->npkts++] = 0; /* setup pixel shader input */ - ninputs = G_0286CC_NUM_INTERP(ps_shader->spi_ps_in_control_0) + 1; + ninputs = G_0286CC_NUM_INTERP(fs_shader->spi_ps_in_control_0) + 1; atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, ninputs); atom->pkts[atom->npkts++] = 0x00000191; for (i = 0; i < ninputs; i++) { - atom->pkts[atom->npkts++] = ps_shader->spi_ps_input_cntl[i]; + atom->pkts[atom->npkts++] = fs_shader->spi_ps_input_cntl[i]; } atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2); atom->pkts[atom->npkts++] = 0x000001B3; - atom->pkts[atom->npkts++] = ps_shader->spi_ps_in_control_0; - atom->pkts[atom->npkts++] = ps_shader->spi_ps_in_control_1; + atom->pkts[atom->npkts++] = fs_shader->spi_ps_in_control_0; + atom->pkts[atom->npkts++] = fs_shader->spi_ps_in_control_1; fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); return 0; } @@ -794,7 +793,7 @@ fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); }\ WPKT(0x00000000);\ } while (0) -void r600_tflat(struct radeon_atom *atom) +void r600_tflat(struct r600_atom *atom) { WPKT(PKT3(PKT3_SET_CONTEXT_REG, 2)); WPKT(0x00000094); diff --git a/r600_atom_kernel.h b/r600_atom_kernel.h deleted file mode 100644 index ad722f8..0000000 --- a/r600_atom_kernel.h +++ /dev/null @@ -1,220 +0,0 @@ -/* - * Copyright © 2010 Jerome Glisse <glisse@freedesktop.org> - * - * This file is free software; you can redistribute it and/or modify - * it under the terms of version 2 of the GNU General Public License - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software Foundation, - * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. - */ -#ifndef R600_ATOM_KERNEL_H -#define R600_ATOM_KERNEL_H - -#define R600_ATOM_CB 1 -#define R600_ATOM_PA 2 -#define R600_ATOM_CB_CNTL 3 -#define R600_ATOM_VIEWPORT 4 -#define R600_ATOM_SCISSOR 5 -#define R600_ATOM_BLEND 6 -#define R600_ATOM_CONSTANTS 7 -#define R600_ATOM_DB 8 -#define R600_ATOM_DB_CNTL 9 -#define R600_ATOM_VS_SHADER 10 -#define R600_ATOM_PS_SHADER 11 -#define R600_BATCH_NATOMS 12 - -struct drm_r600_cb { - u32 width; - u32 height; - u32 color_info; - u32 nsamples; - u32 placements[2]; - u32 handle; -}; - -struct drm_r600_cb_cntl { - u32 cb_target_mask; - u32 cb_shader_mask; - u32 cb_clrcmp_control; - u32 cb_clrcmp_src; - u32 cb_clrcmp_dst; - u32 cb_clrcmp_msk; - u32 cb_color_control; - u32 cb_blend_alpha; - u32 cb_blend_blue; - u32 cb_blend_green; - u32 cb_blend_red; - u32 cb_clear_alpha; - u32 cb_clear_blue; - u32 cb_clear_green; - u32 cb_clear_red; - u32 cb_fog_blue; - u32 cb_fog_green; - u32 cb_fog_red; -}; - -/* pa - primitive assembly */ -struct drm_r600_pa { - u32 pa_sc_mpass_ps_cntl; - u32 pa_sc_line_cntl; - u32 pa_sc_aa_config; - u32 pa_sc_aa_sample_locs_mctx; - u32 pa_sc_aa_mask; - u32 pa_cl_clip_cntl; - u32 pa_cl_vs_out_cntl; - u32 pa_cl_naninf_cntl; - u32 pa_cl_gb_vert_clip_adj; - u32 pa_cl_gb_vert_disc_adj; - u32 pa_cl_gb_horz_clip_adj; - u32 pa_cl_gb_horz_disc_adj; - u32 pa_su_sc_mode_cntl; - u32 pa_su_point_size; - u32 pa_su_point_minmax; - u32 pa_su_line_cntl; - u32 pa_sc_line_stipple; - u32 pa_su_poly_offset_db_fmt_cntl; - u32 pa_su_poly_offset_clamp; - u32 pa_su_poly_offset_front_scale; - u32 pa_su_poly_offset_front_offset; - u32 pa_su_poly_offset_back_scale; - u32 pa_su_poly_offset_back_offset; -}; - -/* vport - viewport */ -struct drm_r600_viewport { - u32 pa_cl_vte_cntl; - u32 pa_cl_vport_xscale_0; - u32 pa_cl_vport_yscale_0; - u32 pa_cl_vport_zscale_0; - u32 pa_cl_vport_xoffset_0; - u32 pa_cl_vport_yoffset_0; - u32 pa_cl_vport_zoffset_0; -}; - -/* pipe_scissor_state */ -struct drm_r600_scissor { - u32 pa_sc_vport_scissor_0_tl; - u32 pa_sc_vport_scissor_0_br; -}; - -/* blend - blending */ -struct drm_r600_blend { - u32 cb_blend0_control; - u32 cb_blend1_control; - u32 cb_blend2_control; - u32 cb_blend3_control; - u32 cb_blend4_control; - u32 cb_blend5_control; - u32 cb_blend6_control; - u32 cb_blend7_control; - u32 cb_blend_control; -}; - -/* constant */ -struct drm_r600_constants { - u32 offset; - u32 nconstants; - u32 constants[512]; -}; - -/* db - depth buffer */ -struct drm_r600_db { - u32 db_depth_size; - u32 db_depth_view; - u32 db_depth_info; - u32 db_htile_surface; - u32 db_prefetch_limit; - u32 db_placements[2]; - u32 hz_placements[2]; - u32 db_handle; - u32 hz_handle; -}; - -/* db_cntl - depth buffer control */ -struct drm_r600_db_cntl { - u32 db_stencil_clear; - u32 db_depth_clear; - u32 db_stencilrefmask; - u32 db_stencilrefmask_bf; - u32 db_depth_control; - u32 db_shader_control; - u32 db_render_control; - u32 db_render_override; - u32 db_sresults_compare_state1; - u32 db_preload_control; - u32 db_alpha_to_mask; -}; - -/* vs_shader - vertex shader */ -struct drm_r600_vs_shader { - u32 sq_pgm_resources_vs; - u8 input_semantic[32]; - u8 input_gpr[32]; - u8 ninputs; - u8 output_semantic[32]; - u8 fog_output_id; - u8 noutputs; - u32 ndwords; - u32 handle; - u32 offset; -}; - -/* ps_shader - pixel shader */ -struct drm_r600_ps_shader { - u32 spi_ps_in_control_0; - u32 spi_ps_in_control_1; - u32 spi_ps_input_cntl[32]; - u32 sq_pgm_resources_ps; - u32 sq_pgm_exports_ps; - u32 ndwords; - u32 handle; - u32 offset; -}; - -struct drm_r600_vs_buffer { - u32 handle; - u32 resource_id; - u32 sq_vtx_constant_word0; - u32 sq_vtx_constant_word2; - u32 sq_vtx_constant_word3; -}; - -struct drm_r600_vs_element { - u32 buffer_id; - u32 semantic; - u32 sq_vtx_word0; - u32 sq_vtx_word1; - u32 sq_vtx_word2; -}; - -struct drm_r600_vs_input { - u32 nelements; - u32 nbuffers; - struct drm_r600_vs_element elements[32]; - struct drm_r600_vs_buffer buffers[32]; -}; - -struct drm_r600_batch { - struct radeon_atom *vs_constants; - struct radeon_atom *ps_constants; - struct radeon_atom *blend; - struct radeon_atom *cb; - struct radeon_atom *cb_cntl; - struct radeon_atom *pa; - struct radeon_atom *viewport; - struct radeon_atom *scissor; - struct radeon_atom *db; - struct radeon_atom *db_cntl; - struct radeon_atom *vs_shader; - struct radeon_atom *ps_shader; - struct drm_r600_vs_input inputs; -}; - -#endif diff --git a/r600_batch.c b/r600_batch.c index bc6616c..5aacbb0 100644 --- a/r600_batch.c +++ b/r600_batch.c @@ -14,31 +14,30 @@ * along with this program; if not, write to the Free Software Foundation, * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ -#include "radeon_device.h" -#include "r600_winsys.h" +#include "r600.h" #include "r600d.h" /* state creation functions prototype */ -int r600_cb_emit(struct radeon_device *rdev, struct radeon_atom *atom, void *data, struct radeon_ib *ib); -int r600_cb_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data); -int r600_cb_cntl_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data); -int r600_pa_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data); -int r600_viewport_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data); -int r600_scissor_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data); -int r600_blend_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data); -int r600_constants_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data); -int r600_db_emit(struct radeon_device *rdev, struct radeon_atom *atom, void *data, struct radeon_ib *ib); -int r600_db_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data); -int r600_db_cntl_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data); -int r600_vs_shader_emit(struct radeon_device *rdev, struct radeon_atom *atom, void *data, struct radeon_ib *ib); -int r600_vs_shader_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data); -int r600_ps_shader_emit(struct radeon_device *rdev, struct radeon_atom *atom, void *data, struct radeon_ib *ib); -int r600_ps_shader_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data); +int r600_cb_emit(struct r600_winsys *rdev, struct r600_atom *atom, void *data, struct radeon_ib *ib); +int r600_cb_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data); +int r600_cb_cntl_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data); +int r600_rasterizer_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data); +int r600_viewport_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data); +int r600_scissor_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data); +int r600_blend_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data); +int r600_constants_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data); +int r600_db_emit(struct r600_winsys *rdev, struct r600_atom *atom, void *data, struct radeon_ib *ib); +int r600_db_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data); +int r600_db_cntl_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data); +int r600_vs_shader_emit(struct r600_winsys *rdev, struct r600_atom *atom, void *data, struct radeon_ib *ib); +int r600_vs_shader_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data); +int r600_fs_shader_emit(struct r600_winsys *rdev, struct r600_atom *atom, void *data, struct radeon_ib *ib); +int r600_fs_shader_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data); /* * helpers functions */ -static void r600_emit_flush(struct radeon_device *rdev, +static void r600_emit_flush(struct r600_winsys *rdev, struct radeon_ib *ib, struct radeon_bo *bo, u32 flags) @@ -53,7 +52,7 @@ static void r600_emit_flush(struct radeon_device *rdev, RADEON_GEM_DOMAIN_GTT); } -static void r600_emit_resources(struct radeon_device *rdev, +static void r600_emit_resources(struct r600_winsys *rdev, struct radeon_ib *ib, struct radeon_bo *bo, u32 dw0, u32 dw1, u32 dw2, u32 dw3, @@ -104,7 +103,7 @@ static int r600_batch_alloc(struct r600_batch **batch) /* * r600_batches */ -static int r600_batches_fs_resource_is_present(struct radeon_device *rdev, +static int r600_batches_fs_resource_is_present(struct r600_winsys *rdev, struct r600_batches *batches, struct drm_r600_vs_buffer *buffer) { @@ -119,7 +118,7 @@ static int r600_batches_fs_resource_is_present(struct radeon_device *rdev, return 0; } -static int r600_batches_fs_resource_add(struct radeon_device *rdev, +static int r600_batches_fs_resource_add(struct r600_winsys *rdev, struct r600_batches *batches, struct drm_r600_vs_buffer *buffer) { @@ -133,7 +132,7 @@ static int r600_batches_fs_resource_add(struct radeon_device *rdev, return 0; } -static void r600_batches_clear_locked(struct radeon_device *rdev, struct r600_batches *batches) +static void r600_batches_clear_locked(struct r600_winsys *rdev, struct r600_batches *batches) { struct r600_batch *batch, *n; int i; @@ -141,10 +140,10 @@ static void r600_batches_clear_locked(struct radeon_device *rdev, struct r600_ba list_for_each_entry_safe(batch, n, &batches->batches, list) { for (i = 0; i < R600_BATCH_NATOMS; i++) { if (batch->atoms[i]) - radeon_atom_put(batch->atoms[i]); + r600_atom_put(batch->atoms[i]); } - radeon_atom_flush_cleanup(&batch->pre_flushes); - radeon_atom_flush_cleanup(&batch->post_flushes); + r600_atom_flush_cleanup(&batch->pre_flushes); + r600_atom_flush_cleanup(&batch->post_flushes); list_del(&batch->list); free(batch); } @@ -157,10 +156,10 @@ static void r600_batches_clear_locked(struct radeon_device *rdev, struct r600_ba batches->npkts = batches->ib->cpkts; } -static int r600_batches_flush_locked(struct radeon_device *rdev, struct r600_batches *batches) +static int r600_batches_flush_locked(struct r600_winsys *rdev, struct r600_batches *batches) { struct r600_batch *batch; - struct radeon_atom_flush *flush; + struct r600_atom_flush *flush; int r, i; for (i = 0; i < batches->nfs_resources; i++) { @@ -201,7 +200,7 @@ out_err: return r; } -int r600_batches_queue(struct radeon_device *rdev, struct r600_request *rq) +int r600_batches_queue(struct r600_winsys *rdev, struct r600_request *rq) { struct drm_r600_batch *batch = rq->data; struct r600_batch *rbatch; @@ -214,35 +213,29 @@ int r600_batches_queue(struct radeon_device *rdev, struct r600_request *rq) memcpy(&rbatch->inputs, &batch->inputs, sizeof(struct r600_vs_input)); i = 0; if (batch->blend == NULL || batch->cb_cntl == NULL || - batch->pa == NULL || batch->viewport == NULL || + batch->rasterizer == NULL || batch->viewport == NULL || batch->cb == NULL || batch->db_cntl == NULL || - batch->vs_shader == NULL || batch->ps_shader == NULL || + batch->vs_shader == NULL || batch->fs_shader == NULL || batch->scissor == NULL) { free(rbatch); fprintf(stderr, "invalid batch\n"); return -EINVAL; } - rbatch->atoms[i++] = batch->blend; kref_get(&batch->blend->kref); - rbatch->atoms[i++] = batch->cb_cntl; kref_get(&batch->cb_cntl->kref); - rbatch->atoms[i++] = batch->pa; kref_get(&batch->pa->kref); - rbatch->atoms[i++] = batch->viewport; kref_get(&batch->viewport->kref); - rbatch->atoms[i++] = batch->scissor; kref_get(&batch->scissor->kref); - rbatch->atoms[i++] = batch->vs_shader; kref_get(&batch->vs_shader->kref); - rbatch->atoms[i++] = batch->ps_shader; kref_get(&batch->ps_shader->kref); - rbatch->atoms[i++] = batch->db_cntl; kref_get(&batch->db_cntl->kref); + rbatch->atoms[i++] = batch->blend; + rbatch->atoms[i++] = batch->cb_cntl; + rbatch->atoms[i++] = batch->rasterizer; + rbatch->atoms[i++] = batch->viewport; + rbatch->atoms[i++] = batch->scissor; + rbatch->atoms[i++] = batch->vs_shader; + rbatch->atoms[i++] = batch->fs_shader; + rbatch->atoms[i++] = batch->db_cntl; rbatch->atoms[i++] = batch->vs_constants; - if (batch->vs_constants) - kref_get(&batch->vs_constants->kref); rbatch->atoms[i++] = batch->ps_constants; - if (batch->ps_constants) - kref_get(&batch->ps_constants->kref); rbatch->atoms[i++] = batch->db; - if (batch->db) - kref_get(&batch->db->kref); - rbatch->atoms[i++] = batch->cb; kref_get(&batch->cb->kref); + rbatch->atoms[i++] = batch->cb; reprocess: - radeon_atom_flush_cleanup(&rbatch->pre_flushes); - radeon_atom_flush_cleanup(&rbatch->post_flushes); + r600_atom_flush_cleanup(&rbatch->pre_flushes); + r600_atom_flush_cleanup(&rbatch->post_flushes); rbatch->nflushes = 0; rbatch->npkts = 0; /* flush + wait until = 5dw */ @@ -257,7 +250,7 @@ reprocess: for (i = 0; i < R600_BATCH_NATOMS; i++) { if (rbatch->atoms[i]) { for (j = 0; j < rbatch->atoms[i]->nbo; j++) { - r = radeon_atom_flush_add(&rbatch->pre_flushes, rbatch->atoms[i]->bo[j], rbatch->atoms[i]->flags[j]); + r = r600_atom_flush_add(&rbatch->pre_flushes, rbatch->atoms[i]->bo[j], rbatch->atoms[i]->flags[j]); if (r < 0) goto out_err; } @@ -290,7 +283,7 @@ reprocess: batches->last_id[i] = rbatch->atoms[i]->id; } } - radeon_device_set_bo_list(rdev, rq->nbo, rq->bo); + r600_winsys_set_bo_list(rdev, rq->nbo, rq->bo); for (i = 0; i < rbatch->inputs.drm.nbuffers; i++) { if (rbatch->inputs.drm.buffers[i].resource_id == -1) { r = r600_batches_fs_resource_add(rdev, batches, &rbatch->inputs.drm.buffers[i]); @@ -304,13 +297,13 @@ reprocess: out_err: for (i = 0; i < R600_BATCH_NATOMS; i++) { if (rbatch->atoms[i]) - radeon_atom_put(rbatch->atoms[i]); + r600_atom_put(rbatch->atoms[i]); } free(rbatch); return r; } -static int r600_batches_init(struct radeon_device *rdev, struct r600_batches *batches) +static int r600_batches_init(struct r600_winsys *rdev, struct r600_batches *batches) { int r; @@ -324,14 +317,14 @@ static int r600_batches_init(struct radeon_device *rdev, struct r600_batches *ba return 0; } -static void r600_batches_cleanup_locked(struct radeon_device *rdev, struct r600_batches *batches) +static void r600_batches_cleanup_locked(struct r600_winsys *rdev, struct r600_batches *batches) { r600_batches_clear_locked(rdev, batches); radeon_ib_free(batches->ib); batches->ib = NULL; } -int r600_batches_flush(struct radeon_device *rdev) +int r600_batches_flush(struct r600_winsys *rdev) { int r; @@ -339,7 +332,7 @@ int r600_batches_flush(struct radeon_device *rdev) return r; } -int r600_atoms_init(struct radeon_device *rdev) +int r600_atoms_init(struct r600_winsys *rdev) { rdev->npipes = 2; rdev->nbanks = 4; @@ -347,7 +340,7 @@ int r600_atoms_init(struct radeon_device *rdev) return r600_batches_init(rdev, &rdev->batches); } -void r600_atoms_release(struct radeon_device *rdev) +void r600_atoms_release(struct r600_winsys *rdev) { r600_batches_cleanup_locked(rdev, &rdev->batches); } @@ -359,31 +352,31 @@ static struct r600_atom_funcs _r600_atom_funcs[] = { {0, 0, NULL, NULL}, {R600_ATOM_CB, sizeof(struct drm_r600_cb), &r600_cb_create, &r600_cb_emit}, - {R600_ATOM_PA, sizeof(struct drm_r600_pa), - &r600_pa_create, &radeon_atom_emit_default}, + {R600_ATOM_RASTERIZER, sizeof(struct drm_r600_rasterizer), + &r600_rasterizer_create, &r600_atom_emit_default}, {R600_ATOM_CB_CNTL, sizeof(struct drm_r600_cb_cntl), - &r600_cb_cntl_create, &radeon_atom_emit_default}, + &r600_cb_cntl_create, &r600_atom_emit_default}, {R600_ATOM_VIEWPORT, sizeof(struct drm_r600_viewport), - &r600_viewport_create, &radeon_atom_emit_default}, + &r600_viewport_create, &r600_atom_emit_default}, {R600_ATOM_SCISSOR, sizeof(struct drm_r600_scissor), - &r600_scissor_create, &radeon_atom_emit_default}, + &r600_scissor_create, &r600_atom_emit_default}, {R600_ATOM_BLEND, sizeof(struct drm_r600_blend), - &r600_blend_create, &radeon_atom_emit_default}, + &r600_blend_create, &r600_atom_emit_default}, {R600_ATOM_CONSTANTS, sizeof(struct drm_r600_constants), - &r600_constants_create, &radeon_atom_emit_default}, + &r600_constants_create, &r600_atom_emit_default}, {R600_ATOM_DB, sizeof(struct drm_r600_db), &r600_db_create, &r600_db_emit}, {R600_ATOM_DB_CNTL, sizeof(struct drm_r600_db_cntl), - &r600_db_cntl_create, &radeon_atom_emit_default}, + &r600_db_cntl_create, &r600_atom_emit_default}, {R600_ATOM_VS_SHADER, sizeof(struct drm_r600_vs_shader), &r600_vs_shader_create, &r600_vs_shader_emit}, - {R600_ATOM_PS_SHADER, sizeof(struct drm_r600_ps_shader), - &r600_ps_shader_create, &r600_ps_shader_emit}, + {R600_ATOM_PS_SHADER, sizeof(struct drm_r600_fs_shader), + &r600_fs_shader_create, &r600_fs_shader_emit}, }; -struct radeon_atom *r600_atom_create(struct radeon_device *rdev, struct r600_request *rq) +struct r600_atom *r600_atom_create(struct r600_winsys *rdev, struct r600_request *rq) { - struct radeon_atom *atom; + struct r600_atom *atom; int r; if (!rq->type || rq->type >= R600_BATCH_NATOMS) { @@ -395,21 +388,85 @@ struct radeon_atom *r600_atom_create(struct radeon_device *rdev, struct r600_req __func__, __LINE__, _r600_atom_funcs[rq->type].type, rq->type); return NULL; } - radeon_device_set_bo_list(rdev, rq->nbo, rq->bo); + r600_winsys_set_bo_list(rdev, rq->nbo, rq->bo); /* create the atom */ - atom = malloc(sizeof(struct radeon_atom)); + atom = malloc(sizeof(struct r600_atom)); if (atom == NULL) return NULL; - memset(atom, 0, sizeof(struct radeon_atom)); - kref_init(&atom->kref); + memset(atom, 0, sizeof(struct r600_atom)); atom->emit = _r600_atom_funcs[rq->type].emit; atom->nflushes = 0; atom->id = crc_64(rq->data, _r600_atom_funcs[rq->type].size); atom->type = rq->type; r = _r600_atom_funcs[rq->type].create(rdev, atom, rq->data); if (r) { - radeon_atom_put(atom); + r600_atom_put(atom); return NULL; } return atom; } + +void r600_atom_flush_cleanup(struct list_head *flushes) +{ + struct r600_atom_flush *i, *n; + + list_for_each_entry_safe(i, n, flushes, list) { + list_del(&i->list); + free(i); + } +} + +int r600_atom_flush_add(struct list_head *flushes, struct radeon_bo *bo, u32 flags) +{ + struct r600_atom_flush *i; + + list_for_each_entry(i, flushes, list) { + if (i->bo->handle == bo->handle) { + i->flags |= flags; + return 0; + } + } + i = malloc(sizeof(*i)); + if (i == NULL) + return -ENOMEM; + i->bo = bo; + i->flags = flags; + list_add_tail(&i->list, flushes); + return 1; +} + +int r600_atom_emit_default(struct r600_winsys *rdev, struct r600_atom *atom, + void *data, struct radeon_ib *ib) +{ + return radeon_ib_copy(ib, atom->pkts, atom->npkts); +} + +struct radeon_bo *radeon_bo_lookup(struct r600_winsys *rdev, u32 handle) +{ + int i; + + for (i = 0; i < rdev->nbo; i++) { + if (rdev->bo[i] && rdev->bo[i]->handle == handle) { + radeon_bo_ref(rdev->bo[i]); + return rdev->bo[i]; + } + } + return NULL; +} + +void r600_winsys_set_bo_list(struct r600_winsys *rdev, u32 nbo, struct radeon_bo **bo) +{ + memcpy(rdev->bo, bo, sizeof(void*) * nbo); + rdev->nbo = nbo; +} + +void r600_atom_put(struct r600_atom *atom) +{ + int i; + + for (i = 0; i < atom->nbo; i++) { + radeon_bo_unref(atom->bo[i]); + } + free(atom->state); + free(atom); +} diff --git a/r600_winsys.h b/r600_winsys.h index 9897b51..59823f9 100644 --- a/r600_winsys.h +++ b/r600_winsys.h @@ -17,27 +17,228 @@ #ifndef R600_WINSYS_H #define R600_WINSYS_H -#include "r600_atom_kernel.h" +#include "radeon_bo.h" + +typedef uint64_t u64; +typedef uint32_t u32; +typedef uint8_t u8; /* opaque structure */ -struct radeon_device *rdev; -struct radeon_atom *atom; +struct r600_winsys; +struct r600_atom; + +#define R600_ATOM_CB 1 +#define R600_ATOM_RASTERIZER 2 +#define R600_ATOM_CB_CNTL 3 +#define R600_ATOM_VIEWPORT 4 +#define R600_ATOM_SCISSOR 5 +#define R600_ATOM_BLEND 6 +#define R600_ATOM_CONSTANTS 7 +#define R600_ATOM_DB 8 +#define R600_ATOM_DB_CNTL 9 +#define R600_ATOM_VS_SHADER 10 +#define R600_ATOM_PS_SHADER 11 +#define R600_BATCH_NATOMS 12 + +struct drm_r600_cb { + u32 width; + u32 height; + u32 color_info; + u32 nsamples; + u32 placements[2]; + u32 handle; +}; + +struct drm_r600_cb_cntl { + u32 cb_target_mask; + u32 cb_shader_mask; + u32 cb_clrcmp_control; + u32 cb_clrcmp_src; + u32 cb_clrcmp_dst; + u32 cb_clrcmp_msk; + u32 cb_color_control; + u32 cb_blend_alpha; + u32 cb_blend_blue; + u32 cb_blend_green; + u32 cb_blend_red; + u32 cb_clear_alpha; + u32 cb_clear_blue; + u32 cb_clear_green; + u32 cb_clear_red; + u32 cb_fog_blue; + u32 cb_fog_green; + u32 cb_fog_red; +}; + +/* pa - primitive assembly */ +struct drm_r600_rasterizer { + u32 pa_sc_mpass_ps_cntl; + u32 pa_sc_line_cntl; + u32 pa_sc_aa_config; + u32 pa_sc_aa_sample_locs_mctx; + u32 pa_sc_aa_mask; + u32 pa_cl_clip_cntl; + u32 pa_cl_vs_out_cntl; + u32 pa_cl_naninf_cntl; + u32 pa_cl_gb_vert_clip_adj; + u32 pa_cl_gb_vert_disc_adj; + u32 pa_cl_gb_horz_clip_adj; + u32 pa_cl_gb_horz_disc_adj; + u32 pa_su_sc_mode_cntl; + u32 pa_su_point_size; + u32 pa_su_point_minmax; + u32 pa_su_line_cntl; + u32 pa_sc_line_stipple; + u32 pa_su_poly_offset_db_fmt_cntl; + u32 pa_su_poly_offset_clamp; + u32 pa_su_poly_offset_front_scale; + u32 pa_su_poly_offset_front_offset; + u32 pa_su_poly_offset_back_scale; + u32 pa_su_poly_offset_back_offset; +}; + +/* vport - viewport */ +struct drm_r600_viewport { + u32 pa_cl_vte_cntl; + u32 pa_cl_vport_xscale_0; + u32 pa_cl_vport_yscale_0; + u32 pa_cl_vport_zscale_0; + u32 pa_cl_vport_xoffset_0; + u32 pa_cl_vport_yoffset_0; + u32 pa_cl_vport_zoffset_0; +}; + +/* pipe_scissor_state */ +struct drm_r600_scissor { + u32 pa_sc_vport_scissor_0_tl; + u32 pa_sc_vport_scissor_0_br; +}; + +/* blend - blending */ +struct drm_r600_blend { + u32 cb_blend0_control; + u32 cb_blend1_control; + u32 cb_blend2_control; + u32 cb_blend3_control; + u32 cb_blend4_control; + u32 cb_blend5_control; + u32 cb_blend6_control; + u32 cb_blend7_control; + u32 cb_blend_control; +}; + +/* constant */ +struct drm_r600_constants { + u32 offset; + u32 nconstants; + u32 constants[512]; +}; + +/* db - depth buffer */ +struct drm_r600_db { + u32 db_depth_size; + u32 db_depth_view; + u32 db_depth_info; + u32 db_htile_surface; + u32 db_prefetch_limit; + u32 db_placements[2]; + u32 hz_placements[2]; + u32 db_handle; + u32 hz_handle; +}; + +/* db_cntl - depth buffer control */ +struct drm_r600_db_cntl { + u32 db_stencil_clear; + u32 db_depth_clear; + u32 db_stencilrefmask; + u32 db_stencilrefmask_bf; + u32 db_depth_control; + u32 db_shader_control; + u32 db_render_control; + u32 db_render_override; + u32 db_sresults_compare_state1; + u32 db_preload_control; + u32 db_alpha_to_mask; +}; + +/* vs_shader - vertex shader */ +struct drm_r600_vs_shader { + u32 sq_pgm_resources_vs; + u8 input_semantic[32]; + u8 input_gpr[32]; + u8 ninputs; + u8 output_semantic[32]; + u8 fog_output_id; + u8 noutputs; + u32 ndwords; + u32 handle; + u32 offset; +}; + +/* fragment shader */ +struct drm_r600_fs_shader { + u32 spi_ps_in_control_0; + u32 spi_ps_in_control_1; + u32 spi_ps_input_cntl[32]; + u32 sq_pgm_resources_ps; + u32 sq_pgm_exports_ps; + u32 ndwords; + u32 handle; + u32 offset; +}; + +struct drm_r600_vs_buffer { + u32 handle; + u32 resource_id; + u32 sq_vtx_constant_word0; + u32 sq_vtx_constant_word2; + u32 sq_vtx_constant_word3; +}; + +struct drm_r600_vs_element { + u32 buffer_id; + u32 semantic; + u32 sq_vtx_word0; + u32 sq_vtx_word1; + u32 sq_vtx_word2; +}; + +struct drm_r600_vs_input { + u32 nelements; + u32 nbuffers; + struct drm_r600_vs_element elements[32]; + struct drm_r600_vs_buffer buffers[32]; +}; + +struct drm_r600_batch { + struct r600_atom *vs_constants; + struct r600_atom *ps_constants; + struct r600_atom *blend; + struct r600_atom *cb; + struct r600_atom *cb_cntl; + struct r600_atom *rasterizer; + struct r600_atom *viewport; + struct r600_atom *scissor; + struct r600_atom *db; + struct r600_atom *db_cntl; + struct r600_atom *vs_shader; + struct r600_atom *fs_shader; + struct drm_r600_vs_input inputs; +}; struct r600_request { - u32 type; - void *data; - u32 nbo; - struct radeon_bo *bo[32]; + u32 type; + void *data; + u32 nbo; + struct radeon_bo *bo[32]; }; -extern int r600_batches_queue(struct radeon_device*, struct r600_request*); -extern int r600_batches_flush(struct radeon_device*); -extern struct radeon_atom *r600_atom_create(struct radeon_device*, struct r600_request*); -extern int r600_atoms_init(struct radeon_device *rdev); -extern void r600_atoms_release(struct radeon_device *rdev); +extern int r600_batches_queue(struct r600_winsys*, struct r600_request*); +extern int r600_batches_flush(struct r600_winsys*); +extern struct r600_atom *r600_atom_create(struct r600_winsys*, struct r600_request*); +extern void r600_atom_destroy(struct r600_atom *atom); -/* core functions */ -extern int radeon_device_init(struct radeon_device **rdev, struct radeon_bo_manager *bom, int fd); -extern void radeon_device_release(struct radeon_device *rdev); +struct pipe_screen *r600_create_screen(struct r600_winsys *r600_winsys, struct radeon_bo_manager *bom); #endif diff --git a/r700_atom.c b/r700_atom.c index 44b70e5..9bd2d44 100644 --- a/r700_atom.c +++ b/r700_atom.c @@ -14,11 +14,10 @@ * along with this program; if not, write to the Free Software Foundation, * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. */ -#include "radeon_device.h" -#include "r600_winsys.h" +#include "r600.h" #include "r600d.h" -void r700_batches_states_default(struct radeon_device *rdev, struct r600_batches *batches) +void r700_batches_states_default(struct r600_winsys *rdev, struct r600_batches *batches) { struct radeon_ib *ib = batches->ib; @@ -24,6 +24,7 @@ #include "xf86drm.h" #include "radeon_bo_gem.h" #include "radeon_cs_gem.h" +#include "r600_winsys.h" #include "radeon.h" int radeon_init(struct radeon *radeon) @@ -24,10 +24,6 @@ #include "radeon_cs.h" #include <errno.h> -typedef uint8_t u8; -typedef uint32_t u32; -typedef uint64_t u64; - struct radeon_mode { drmModeModeInfo info; u32 pitch; diff --git a/radeon_atom.c b/radeon_atom.c deleted file mode 100644 index fab82ed..0000000 --- a/radeon_atom.c +++ /dev/null @@ -1,84 +0,0 @@ -/* - * Copyright © 2010 Jerome Glisse <glisse@freedesktop.org> - * - * This file is free software; you can redistribute it and/or modify - * it under the terms of version 2 of the GNU General Public License - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software Foundation, - * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. - */ -#include "radeon_device.h" -#include "r600_winsys.h" - -void radeon_atom_flush_cleanup(struct list_head *flushes) -{ - struct radeon_atom_flush *i, *n; - - list_for_each_entry_safe(i, n, flushes, list) { - list_del(&i->list); - kfree(i); - } -} - -int radeon_atom_flush_add(struct list_head *flushes, struct radeon_bo *bo, u32 flags) -{ - struct radeon_atom_flush *i; - - list_for_each_entry(i, flushes, list) { - if (i->bo->handle == bo->handle) { - i->flags |= flags; - return 0; - } - } - i = kmalloc(sizeof(*i), GFP_KERNEL); - if (i == NULL) - return -ENOMEM; - i->bo = bo; - i->flags = flags; - list_add_tail(&i->list, flushes); - return 1; -} - -int radeon_atom_emit_default(struct radeon_device *rdev, struct radeon_atom *atom, - void *data, struct radeon_ib *ib) -{ - return radeon_ib_copy(ib, atom->pkts, atom->npkts); -} - -struct radeon_bo *radeon_bo_lookup(struct radeon_device *rdev, u32 handle) -{ - int i; - - for (i = 0; i < rdev->nbo; i++) { - if (rdev->bo[i] && rdev->bo[i]->handle == handle) { - radeon_bo_ref(rdev->bo[i]); - return rdev->bo[i]; - } - } - return NULL; -} - -void radeon_device_set_bo_list(struct radeon_device *rdev, u32 nbo, struct radeon_bo **bo) -{ - memcpy(rdev->bo, bo, sizeof(void*) * nbo); - rdev->nbo = nbo; -} - -void radeon_atom_release(struct kref *kref) -{ - struct radeon_atom *atom = container_of(kref, struct radeon_atom, kref); - int i; - - for (i = 0; i < atom->nbo; i++) { - radeon_bo_unref(atom->bo[i]); - } - free(atom->state); - free(atom); -} diff --git a/radeon_device.c b/radeon_device.c deleted file mode 100644 index d677c62..0000000 --- a/radeon_device.c +++ /dev/null @@ -1,211 +0,0 @@ -/* - * Copyright © 2010 Jerome Glisse <glisse@freedesktop.org> - * - * This file is free software; you can redistribute it and/or modify - * it under the terms of version 2 of the GNU General Public License - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software Foundation, - * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. - */ -#include "radeon_device.h" -#include "r600_winsys.h" - -#pragma pack(1) -struct ib_reloc_gem { - uint32_t handle; - uint32_t read_domain; - uint32_t write_domain; - uint32_t flags; -}; -#pragma pack() -#define RELOC_SIZE (sizeof(struct ib_reloc_gem) / sizeof(uint32_t)) - -u32 radeon_ib_reloc(struct radeon_ib *ib, struct radeon_bo *bo, u32 d) -{ - struct ib_reloc_gem *reloc; - int i; - - for (i = 0; i < ib->crelocs; i++) { - reloc = (struct ib_reloc_gem*)&ib->relocs[i * RELOC_SIZE]; - if (reloc->handle == bo->handle) { - reloc->read_domain |= d; - return (i * RELOC_SIZE); - } - } - if (ib->crelocs >= ib->nrelocs) - return 0xFFFFFFFFUL; - i = ib->crelocs++; - reloc = (struct ib_reloc_gem*)&ib->relocs[i * RELOC_SIZE]; - reloc->handle = bo->handle; - reloc->read_domain = d; - reloc->write_domain = 0; - reloc->flags = 0; - return (i * RELOC_SIZE); -} - -int radeon_ib_get(struct radeon_device *rdev, struct radeon_ib **ib) -{ - struct radeon_ib *lib; - - lib = malloc(sizeof(struct radeon_ib)); - if (lib == NULL) - return -ENOMEM; - memset(lib, sizeof(*lib), 0); - lib->ptr = malloc(64 * 1024); - if (lib->ptr == NULL) { - free(lib); - return -ENOMEM; - } - lib->cpkts = 0; - lib->length_dw = 64 * 1024 / 4; - lib->relocs = malloc(64 * 1024); - if (lib->relocs == NULL) { - free(lib->ptr); - free(lib); - return -ENOMEM; - } - lib->nrelocs = 64 * 1024 / RELOC_SIZE; - lib->crelocs = 0; - *ib = lib; - return 0; -} - -void radeon_ib_free(struct radeon_ib *ib) -{ - if (ib == NULL) - return; - free(ib->ptr); - free(ib->relocs); - free(ib); -} - -int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib) -{ - struct drm_radeon_cs drmib; - struct drm_radeon_cs_chunk chunks[2]; - uint64_t chunk_array[2]; - int r = 0; - -#if 0 - for (r = 0; r < ib->cpkts; r++) { - printf("0x%08X\n", ib->ptr[r]); - } -#endif - drmib.num_chunks = 2; - drmib.chunks = (uint64_t)(uintptr_t)chunk_array; - chunks[0].chunk_id = RADEON_CHUNK_ID_IB; - chunks[0].length_dw = ib->cpkts; - chunks[0].chunk_data = (uint64_t)(uintptr_t)ib->ptr; - chunks[1].chunk_id = RADEON_CHUNK_ID_RELOCS; - chunks[1].length_dw = ib->crelocs * 4; - chunks[1].chunk_data = (uint64_t)(uintptr_t)ib->relocs; - chunk_array[0] = (uint64_t)(uintptr_t)&chunks[0]; - chunk_array[1] = (uint64_t)(uintptr_t)&chunks[1]; -#if 1 - r = drmCommandWriteRead(rdev->fd, DRM_RADEON_CS, &drmib, - sizeof(struct drm_radeon_cs)); -#endif - return r; -} - -int radeon_device_init(struct radeon_device **rdev, struct radeon_bo_manager *bom, int fd) -{ - struct radeon_device *dev; - int r; - - *rdev = NULL; - dev = kmalloc(sizeof(*dev), GFP_KERNEL); - if (dev == NULL) - return -ENOMEM; - memset(dev, 0, sizeof(struct radeon_device)); - dev->fd = fd; - dev->bom = bom; - r = r600_atoms_init(dev); - if (r) - return r; - *rdev = dev; - return r; -} - -void radeon_device_release(struct radeon_device *rdev) -{ - r600_atoms_release(rdev); - memset(rdev, 0, sizeof(struct radeon_device)); - kfree(rdev); -} - -void kref_set(struct kref *kref, int num) -{ - kref->refcount = num; -} - -/** - * kref_init - initialize object. - * @kref: object in question. - */ -void kref_init(struct kref *kref) -{ - kref_set(kref, 1); -} - -/** - * kref_get - increment refcount for object. - * @kref: object. - */ -void kref_get(struct kref *kref) -{ - kref->refcount++; -} - -/** - * kref_put - decrement refcount for object. - * @kref: object. - * @release: pointer to the function that will clean up the object when the - * last reference to the object is released. - * This pointer is required, and it is not acceptable to pass kfree - * in as this function. - * - * Decrement the refcount, and if 0, call release(). - * Return 1 if the object was removed, otherwise return 0. Beware, if this - * function returns 0, you still can not count on the kref from remaining in - * memory. Only use the return value if you want to see if the kref is now - * gone, not present. - */ -int kref_put(struct kref *kref, void (*release)(struct kref *kref)) -{ - kref->refcount--; - if (!kref->refcount) { - release(kref); - return 1; - } - return 0; -} - -u64 crc_64(void *d, size_t len) -{ - u8 *data = (uint8_t*)d; - u64 div = 0x42F0E1EBA9EA3693; - u64 crc = 0xFFFFFFFFFFFFFFFF; - u8 t; - int i, j; - - for (j = 0; j < len; j++) { - t = data[j]; - for (i = 0; i < 8; i++) { - if ((t >> 7) ^ (crc >> 63)) { - crc = (crc << 1) ^ div; - } else { - crc = (crc << 1); - } - t = (t << 1) & 0xFF; - } - } - return crc; -} diff --git a/radeon_device.h b/radeon_device.h deleted file mode 100644 index e8704f8..0000000 --- a/radeon_device.h +++ /dev/null @@ -1,189 +0,0 @@ -/* - * Copyright © 2010 Jerome Glisse <glisse@freedesktop.org> - * - * This file is free software; you can redistribute it and/or modify - * it under the terms of version 2 of the GNU General Public License - * as published by the Free Software Foundation. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software Foundation, - * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA. - */ -#ifndef RADEON_DEVICE_H -#define RADEON_DEVICE_H - -#include <stdint.h> -#include <stdlib.h> -#include <string.h> -#include <errno.h> -#include "xf86drm.h" -#include "radeon_bo.h" -#include "radeon_drm.h" -#include "list.h" - -/* UTILITIES ****************************************************************/ -typedef uint8_t u8; -typedef uint32_t u32; -typedef uint64_t u64; -#define GFP_KERNEL 0 -#define kmalloc(s, gfp) malloc(s) -#define kfree(p) free(p) -#define dev_err(d, p, args...) fprintf(stderr, p, ##args) - -struct kref { - int refcount; -}; - -void kref_set(struct kref *kref, int num); -void kref_init(struct kref *kref); -void kref_get(struct kref *kref); -int kref_put(struct kref *kref, void (*release) (struct kref *kref)); -/** - * container_of - cast a member of a structure out to the containing structure - * @ptr: the pointer to the member. - * @type: the type of the container struct this is embedded in. - * @member: the name of the member within the struct. - * - */ -#define container_of(ptr, type, member) ({ \ - const typeof( ((type *)0)->member ) *__mptr = (ptr); \ - (type *)( (char *)__mptr - offsetof(type,member) );}) -#define radeon_bo_size(bo) ((bo)->size) - -/* UTILITIES END ************************************************************/ - -#include "r600_atom_kernel.h" - -struct radeon_device; -struct radeon_atom; -struct drm_r600_vs_input; -struct drm_r600_vs_shader; - -struct radeon_ib { - u32 *ptr; - u32 cpkts; - u32 length_dw; - u32 *relocs; - u32 crelocs; - u32 nrelocs; -}; - -struct radeon_atom_flush { - struct list_head list; - u32 flags; - struct radeon_bo *bo; -}; - -typedef int (*radeon_atom_create_t)(struct radeon_device*, struct radeon_atom*, void*); -typedef int (*radeon_atom_emit_t)(struct radeon_device*, struct radeon_atom*, void*, struct radeon_ib*); - -struct radeon_atom { - struct list_head list; - struct kref kref; - u32 type; - u32 id; - u32 nflushes; - u32 npkts; - u32 nbo; - u32 pkts[256]; - struct radeon_bo *bo[32]; - u32 flags[32]; - void *state; - radeon_atom_emit_t emit; -}; - -struct r600_atom_funcs { - u32 type; - u32 size; - radeon_atom_create_t create; - radeon_atom_emit_t emit; -}; - -struct r600_vs_buffer { - struct drm_r600_vs_buffer drm; - struct radeon_bo *bo; -}; - -struct r600_vs_input { - struct drm_r600_vs_input drm; - struct radeon_bo *bo[32]; - u32 nbo; -}; - -struct r600_batch { - struct list_head list; - struct list_head pre_flushes; - struct list_head post_flushes; - struct radeon_atom *atoms[R600_BATCH_NATOMS]; - struct radeon_atom *emit_atoms[R600_BATCH_NATOMS]; - u32 nemit_atoms; - u32 nflushes; - u32 npkts; - u32 nfs_resources; - struct r600_vs_input inputs; -}; - -struct r600_batches { - struct radeon_ib *ib; - u32 npkts; - struct list_head batches; - u32 nfs_resources; - struct r600_vs_buffer fs_resource[160]; - u32 last_id[R600_BATCH_NATOMS]; -}; - -struct radeon_device { - int fd; - struct radeon_bo *bo[32]; - u32 nbo; - struct r600_batches batches; - unsigned npipes; - unsigned nbanks; - unsigned group_bytes; - struct radeon_bo_manager *bom; -}; - -extern u32 radeon_ib_reloc(struct radeon_ib *ib, struct radeon_bo *bo, u32 d); -extern int radeon_ib_get(struct radeon_device *rdev, struct radeon_ib **ib); -extern void radeon_ib_free(struct radeon_ib *ib); -extern int radeon_ib_schedule(struct radeon_device *rdev, struct radeon_ib *ib); -extern void radeon_atom_flush_cleanup(struct list_head *flushes); -extern int radeon_atom_flush_add(struct list_head *flushes, struct radeon_bo *bo, u32 flags); -extern int radeon_atom_emit_default(struct radeon_device *rdev, struct radeon_atom *atom, - void *data, struct radeon_ib *ib); -extern void radeon_atom_release(struct kref *kref); -extern void radeon_device_set_bo_list(struct radeon_device *rdev, u32 nbo, struct radeon_bo **bo); -extern struct radeon_bo *radeon_bo_lookup(struct radeon_device *rdev, u32 handle); -extern u64 crc_64(void *d, size_t len); -/* R700 */ -extern void r700_batches_states_default(struct radeon_device *rdev, struct r600_batches *batches); - -static inline void radeon_atom_put(struct radeon_atom *atom) -{ - kref_put(&atom->kref, radeon_atom_release); -} - -static inline int radeon_ib_begin(struct radeon_ib *ib, u32 ndw) -{ - if ((ib->cpkts + ndw) > ib->length_dw) - return -ENOMEM; - return 0; -} - -static inline int radeon_ib_copy(struct radeon_ib *ib, u32 *pkts, u32 ndw) -{ - if ((ib->cpkts + ndw) > ib->length_dw) { - fprintf(stderr, "IB FULL !\n"); - return -ENOMEM; - } - memcpy(&ib->ptr[ib->cpkts], pkts, ndw * 4); - ib->cpkts += ndw; - return 0; -} - -#endif @@ -21,8 +21,8 @@ #include <unistd.h> #include <string.h> #include <errno.h> -#include "radeon.h" #include "r600_winsys.h" +#include "radeon.h" int r600_tri_flat(struct radeon *radeon); @@ -88,21 +88,23 @@ static float rvbo1[32] = { 0.500000, 0.500000, 0.500000, 0.000000, 0.000000, 0.000000, 0.000000, 0.000000, }; +int r600_winsys_init(struct r600_winsys **rdev, struct radeon_bo_manager *bom, int fd); +void r600_winsys_release(struct r600_winsys *rdev); int r600_tri_flat(struct radeon *radeon) { - struct radeon_device *rdev; + struct r600_winsys *rdev; struct r600_request rq; struct drm_r600_blend blend; struct drm_r600_cb cb; struct drm_r600_cb_cntl cb_cntl; struct drm_r600_db_cntl db_cntl; - struct drm_r600_pa pa; + struct drm_r600_rasterizer pa; struct drm_r600_viewport vport; struct drm_r600_scissor scissor; struct drm_r600_constants vs_constants; struct drm_r600_vs_shader vs_shader; - struct drm_r600_ps_shader ps_shader; + struct drm_r600_fs_shader ps_shader; struct drm_r600_batch batch; struct radeon_bo *vbo1; struct radeon_bo *vs; @@ -131,7 +133,7 @@ int r600_tri_flat(struct radeon *radeon) memset_bo(ps, 0); memcpy_bo(ps, (u32*)psshaders, 64 * 4); - r = radeon_device_init(&rdev, radeon->bom, radeon->fd); + r = r600_winsys_init(&rdev, radeon->bom, radeon->fd); if (r) return r; /* build cb */ @@ -171,9 +173,9 @@ int r600_tri_flat(struct radeon *radeon) pa.pa_su_poly_offset_front_offset = 0x00000000; pa.pa_su_poly_offset_back_scale = 0x00000000; pa.pa_su_poly_offset_back_offset = 0x00000000; - rq.type = R600_ATOM_PA; + rq.type = R600_ATOM_RASTERIZER; rq.data = &pa; - batch.pa = r600_atom_create(rdev, &rq); + batch.rasterizer = r600_atom_create(rdev, &rq); /* cb rqrol */ cb_cntl.cb_target_mask = 0x0000000f; cb_cntl.cb_shader_mask = 0x0000000f; @@ -286,7 +288,7 @@ int r600_tri_flat(struct radeon *radeon) rq.nbo = 1; rq.type = R600_ATOM_PS_SHADER; rq.data = &ps_shader; - batch.ps_shader = r600_atom_create(rdev, &rq); + batch.fs_shader = r600_atom_create(rdev, &rq); /* inputs */ batch.inputs.nelements = 2; @@ -319,7 +321,7 @@ int r600_tri_flat(struct radeon *radeon) if (r) return r; r = r600_batches_flush(rdev); - radeon_device_release(rdev); + r600_winsys_release(rdev); radeon_bo_unref(vbo1); return r; } |