scissor + viewport cleanup

6 files changed, 169 insertions, 122 deletions

diff --git a/r600_atom.c b/r600_atom.c
index 62af283..3b08600 100644
--- a/r600_atom.c
+++ b/r600_atom.c
@@ -111,26 +111,26 @@ int r600_cb_create(struct radeon_device *rdev, struct radeon_atom *atom, void *d
 	switch (G_0280A0_ARRAY_MODE(cb->color_info)) {
 	case V_0280A0_ARRAY_LINEAR_GENERAL:
 	case V_0280A0_ARRAY_LINEAR_ALIGNED:
-		if ((cb->pitch) & 0x3f) {
+		if ((cb->width) & 0x3f) {
 			dev_err(rdev->dev, "%s:%d cb pitch (%d) invalid\n",
-				__func__, __LINE__, cb->pitch);
+				__func__, __LINE__, cb->width);
 			return -EINVAL;
 		}
-		if ((cb->pitch * bpe) & (rdev->group_bytes - 1)) {
+		if ((cb->width * bpe) & (rdev->group_bytes - 1)) {
 			dev_err(rdev->dev, "%s:%d cb pitch (%d) invalid\n",
-				__func__, __LINE__, cb->pitch);
+				__func__, __LINE__, cb->width);
 			return -EINVAL;
 		}
 		break;
 	case V_0280A0_ARRAY_1D_TILED_THIN1:
-		if ((cb->pitch) & 0x7) {
+		if ((cb->width) & 0x7) {
 			dev_err(rdev->dev, "%s:%d cb pitch (%d) invalid\n",
-				__func__, __LINE__, cb->pitch);
+				__func__, __LINE__, cb->width);
 			return -EINVAL;
 		}
-		if ((cb->pitch * 8 * bpe * cb->nsamples) & (rdev->group_bytes - 1)) {
+		if ((cb->width * 8 * bpe * cb->nsamples) & (rdev->group_bytes - 1)) {
 			dev_err(rdev->dev, "%s:%d cb pitch (%d) invalid\n",
-				__func__, __LINE__, cb->pitch);
+				__func__, __LINE__, cb->width);
 			return -EINVAL;
 		}
 		if (cb->height & 0x7) {
@@ -140,16 +140,16 @@ int r600_cb_create(struct radeon_device *rdev, struct radeon_atom *atom, void *d
 		}
 		break;
 	case V_0280A0_ARRAY_2D_TILED_THIN1:
-		if ((cb->pitch) & ((8 * rdev->nbanks) - 1)) {
+		if ((cb->width) & ((8 * rdev->nbanks) - 1)) {
 			dev_err(rdev->dev, "%s:%d cb pitch (%d) invalid\n",
-				__func__, __LINE__, cb->pitch);
+				__func__, __LINE__, cb->width);
 			return -EINVAL;
 		}
-		tmp = cb->pitch * 8 * bpe * cb->nsamples;
+		tmp = cb->width * 8 * bpe * cb->nsamples;
 		tmp = tmp / rdev->nbanks;
 		if (tmp & (rdev->group_bytes - 1)) {
 			dev_err(rdev->dev, "%s:%d cb pitch (%d) invalid\n",
-				__func__, __LINE__, cb->pitch);
+				__func__, __LINE__, cb->width);
 			return -EINVAL;
 		}
 		if (cb->height & ((8 * rdev->npipes) - 1)) {
@@ -164,10 +164,10 @@ int r600_cb_create(struct radeon_device *rdev, struct radeon_atom *atom, void *d
 		return -EINVAL;
 	}
 	/* cb require a buffer of at list cb->size */
-	if (radeon_bo_size(atom->bo[0]) < cb->pitch * cb->height * bpe) {
+	if (radeon_bo_size(atom->bo[0]) < cb->width * cb->height * bpe) {
 		dev_err(rdev->dev, "%s bo too small (%d) need (%d) %d %d %d\n",
 			__func__, radeon_bo_size(atom->bo[0]),
-			cb->pitch * cb->height * bpe, cb->pitch, cb->height, bpe);
+			cb->width * cb->height * bpe, cb->width, cb->height, bpe);
 		return -EINVAL;
 	}
 	/* CB_COLOR0_INFO */
@@ -178,8 +178,8 @@ int r600_cb_create(struct radeon_device *rdev, struct radeon_atom *atom, void *d
 	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
 	atom->pkts[atom->npkts++] = 0x00000018;
 	atom->pkts[atom->npkts++] =
-		S_028060_PITCH_TILE_MAX((cb->pitch >> 3) - 1) |
-		S_028060_SLICE_TILE_MAX(((cb->pitch * cb->height) >> 6) - 1);
+		S_028060_PITCH_TILE_MAX((cb->width >> 3) - 1) |
+		S_028060_SLICE_TILE_MAX(((cb->width * cb->height) >> 6) - 1);
 	/* CB_COLOR0_VIEW */
 	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
 	atom->pkts[atom->npkts++] = 0x00000020;
@@ -209,6 +209,21 @@ fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, cb->bo, cb->placements[0]
 	atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
 fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]);\n", atom->npkts);
 	atom->pkts[atom->npkts++] = 0x00000000;
+	/* PA_SC_GENERIC_SCISSOR_TL */
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x00000090;
+	atom->pkts[atom->npkts++] = 0x80000000;
+	atom->pkts[atom->npkts++] = S_028244_BR_X(cb->width) | S_028244_BR_Y(cb->height);
+	/* PA_SC_SCREEN_SCISSOR_TL */
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x0000000C;
+	atom->pkts[atom->npkts++] = 0x80000000;
+	atom->pkts[atom->npkts++] = S_028034_BR_X(cb->width) | S_028034_BR_Y(cb->height);
+	/* PA_SC_WINDOW_OFFSET */
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x00000081;
+	atom->pkts[atom->npkts++] = 0x80000000;
+	atom->pkts[atom->npkts++] = S_028208_BR_X(cb->width) | S_028208_BR_Y(cb->height);
 	r600_tflat(atom);
 fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts);
 	return 0;
@@ -284,10 +299,6 @@ int r600_pa_create(struct radeon_device *rdev, struct radeon_atom *atom, void *d
 	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
 	atom->pkts[atom->npkts++] = 0x00000292;
 	atom->pkts[atom->npkts++] = pa->pa_sc_mpass_ps_cntl;
-	/* PA_SC_MODE_CNTL */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	atom->pkts[atom->npkts++] = 0x00000293;
-	atom->pkts[atom->npkts++] = pa->pa_sc_mode_cntl;
 	/* PA_SC_LINE_CNTL */
 	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
 	atom->pkts[atom->npkts++] = 0x00000300;
@@ -308,10 +319,6 @@ int r600_pa_create(struct radeon_device *rdev, struct radeon_atom *atom, void *d
 	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
 	atom->pkts[atom->npkts++] = 0x00000204;
 	atom->pkts[atom->npkts++] = pa->pa_cl_clip_cntl;
-	/* PA_CL_VTE_CNTL */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	atom->pkts[atom->npkts++] = 0x00000206;
-	atom->pkts[atom->npkts++] = pa->pa_cl_vte_cntl;
 	/* PA_CL_VS_OUT_CNTL */
 	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
 	atom->pkts[atom->npkts++] = 0x00000207;
@@ -355,23 +362,18 @@ fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts);
 }
 
 /*
- * r600_vport
+ * pipe_viewport_state
  */
-int r600_vport_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data)
+int r600_viewport_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data)
 {
-	struct drm_r600_vport *vport;
+	struct drm_r600_viewport *vport;
 	int r;
 
-	vport = kmalloc(sizeof(struct drm_r600_vport), GFP_KERNEL);
+	vport = kmalloc(sizeof(struct drm_r600_viewport), GFP_KERNEL);
 	if (vport == NULL)
 		return -ENOMEM;
-	memcpy(vport, data, sizeof(struct drm_r600_vport));
+	memcpy(vport, data, sizeof(struct drm_r600_viewport));
 	atom->state = vport;
-	/* PA_SC_VPORT_ZMIN_0 */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	atom->pkts[atom->npkts++] = 0x000000B4;
-	atom->pkts[atom->npkts++] = vport->pa_sc_vport_zmin_0;
-	atom->pkts[atom->npkts++] = vport->pa_sc_vport_zmax_0;
 	/* PA_CL_VPORT_XSCALE_0 */
 	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 6);
 	atom->pkts[atom->npkts++] = 0x0000010F;
@@ -381,36 +383,36 @@ int r600_vport_create(struct radeon_device *rdev, struct radeon_atom *atom, void
 	atom->pkts[atom->npkts++] = vport->pa_cl_vport_yoffset_0;
 	atom->pkts[atom->npkts++] = vport->pa_cl_vport_zscale_0;
 	atom->pkts[atom->npkts++] = vport->pa_cl_vport_zoffset_0;
-	/* PA_SC_SCREEN_SCISSOR_TL */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	atom->pkts[atom->npkts++] = 0x0000000C;
-	atom->pkts[atom->npkts++] = vport->pa_sc_screen_scissor_tl;
-	atom->pkts[atom->npkts++] = vport->pa_sc_screen_scissor_br;
-	/* PA_SC_WINDOW_OFFSET */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 12);
-	atom->pkts[atom->npkts++] = 0x00000080;
-	atom->pkts[atom->npkts++] = vport->pa_sc_window_offset;
-	atom->pkts[atom->npkts++] = vport->pa_sc_window_scissor_tl;
-	atom->pkts[atom->npkts++] = vport->pa_sc_window_scissor_br;
-	atom->pkts[atom->npkts++] = vport->pa_sc_cliprect_rule;
-	atom->pkts[atom->npkts++] = vport->pa_sc_cliprect_0_tl;
-	atom->pkts[atom->npkts++] = vport->pa_sc_cliprect_0_br;
-	atom->pkts[atom->npkts++] = vport->pa_sc_cliprect_1_tl;
-	atom->pkts[atom->npkts++] = vport->pa_sc_cliprect_1_br;
-	atom->pkts[atom->npkts++] = vport->pa_sc_cliprect_2_tl;
-	atom->pkts[atom->npkts++] = vport->pa_sc_cliprect_2_br;
-	atom->pkts[atom->npkts++] = vport->pa_sc_cliprect_3_tl;
-	atom->pkts[atom->npkts++] = vport->pa_sc_cliprect_3_br;
-	/* PA_SC_GENERIC_SCISSOR_TL */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	atom->pkts[atom->npkts++] = 0x00000090;
-	atom->pkts[atom->npkts++] = vport->pa_sc_generic_scissor_tl;
-	atom->pkts[atom->npkts++] = vport->pa_sc_generic_scissor_br;
+	/* PA_CL_VTE_CNTL */
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000206;
+	atom->pkts[atom->npkts++] = vport->pa_cl_vte_cntl;
 fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts);
 	return 0;
 }
 
 /*
+ * pipe_scissor_state
+ */
+int r600_scissor_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data)
+{
+	struct drm_r600_scissor *scissor;
+	int r;
+
+	scissor = kmalloc(sizeof(struct drm_r600_scissor), GFP_KERNEL);
+	if (scissor == NULL)
+		return -ENOMEM;
+	memcpy(scissor, data, sizeof(struct drm_r600_scissor));
+	atom->state = scissor;
+	/* PA_SC_VPORT_SCISSOR_0_BR */
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x00000094;
+	atom->pkts[atom->npkts++] = scissor->pa_sc_vport_scissor_0_tl;
+	atom->pkts[atom->npkts++] = scissor->pa_sc_vport_scissor_0_br;
+	return 0;
+}
+
+/*
  * r600_blend
  */
 int r600_blend_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data)
diff --git a/r600_atom_kernel.h b/r600_atom_kernel.h
index 63ee9f3..ad722f8 100644
--- a/r600_atom_kernel.h
+++ b/r600_atom_kernel.h
@@ -20,17 +20,18 @@
 #define R600_ATOM_CB		1
 #define R600_ATOM_PA		2
 #define R600_ATOM_CB_CNTL	3
-#define R600_ATOM_VPORT		4
-#define R600_ATOM_BLEND		5
-#define R600_ATOM_CONSTANTS	6
-#define R600_ATOM_DB		7
-#define R600_ATOM_DB_CNTL	8
-#define R600_ATOM_VS_SHADER	9
-#define R600_ATOM_PS_SHADER	10
-#define R600_BATCH_NATOMS	11
+#define R600_ATOM_VIEWPORT	4
+#define R600_ATOM_SCISSOR	5
+#define R600_ATOM_BLEND		6
+#define R600_ATOM_CONSTANTS	7
+#define R600_ATOM_DB		8
+#define R600_ATOM_DB_CNTL	9
+#define R600_ATOM_VS_SHADER	10
+#define R600_ATOM_PS_SHADER	11
+#define R600_BATCH_NATOMS	12
 
 struct drm_r600_cb {
-	u32			pitch;
+	u32			width;
 	u32			height;
 	u32			color_info;
 	u32			nsamples;
@@ -62,13 +63,11 @@ struct drm_r600_cb_cntl {
 /* pa - primitive assembly */
 struct drm_r600_pa {
 	u32			pa_sc_mpass_ps_cntl;
-	u32			pa_sc_mode_cntl;
 	u32			pa_sc_line_cntl;
 	u32			pa_sc_aa_config;
 	u32			pa_sc_aa_sample_locs_mctx;
 	u32			pa_sc_aa_mask;
 	u32			pa_cl_clip_cntl;
-	u32			pa_cl_vte_cntl;
 	u32			pa_cl_vs_out_cntl;
 	u32			pa_cl_naninf_cntl;
 	u32			pa_cl_gb_vert_clip_adj;
@@ -89,31 +88,20 @@ struct drm_r600_pa {
 };
 
 /* vport - viewport */
-struct drm_r600_vport {
-	u32			pa_sc_vport_zmin_0;
-	u32			pa_sc_vport_zmax_0;
+struct drm_r600_viewport {
+	u32			pa_cl_vte_cntl;
 	u32			pa_cl_vport_xscale_0;
-	u32			pa_cl_vport_xoffset_0;
 	u32			pa_cl_vport_yscale_0;
-	u32			pa_cl_vport_yoffset_0;
 	u32			pa_cl_vport_zscale_0;
+	u32			pa_cl_vport_xoffset_0;
+	u32			pa_cl_vport_yoffset_0;
 	u32			pa_cl_vport_zoffset_0;
-	u32			pa_sc_screen_scissor_tl;
-	u32			pa_sc_screen_scissor_br;
-	u32			pa_sc_window_offset;
-	u32			pa_sc_window_scissor_tl;
-	u32			pa_sc_window_scissor_br;
-	u32			pa_sc_cliprect_rule;
-	u32			pa_sc_cliprect_0_tl;
-	u32			pa_sc_cliprect_0_br;
-	u32			pa_sc_cliprect_1_tl;
-	u32			pa_sc_cliprect_1_br;
-	u32			pa_sc_cliprect_2_tl;
-	u32			pa_sc_cliprect_2_br;
-	u32			pa_sc_cliprect_3_tl;
-	u32			pa_sc_cliprect_3_br;
-	u32			pa_sc_generic_scissor_tl;
-	u32			pa_sc_generic_scissor_br;
+};
+
+/* pipe_scissor_state */
+struct drm_r600_scissor {
+	u32			pa_sc_vport_scissor_0_tl;
+	u32			pa_sc_vport_scissor_0_br;
 };
 
 /* blend - blending */
@@ -220,7 +208,8 @@ struct drm_r600_batch {
 	struct radeon_atom		*cb;
 	struct radeon_atom		*cb_cntl;
 	struct radeon_atom		*pa;
-	struct radeon_atom		*vport;
+	struct radeon_atom		*viewport;
+	struct radeon_atom		*scissor;
 	struct radeon_atom		*db;
 	struct radeon_atom		*db_cntl;
 	struct radeon_atom		*vs_shader;
diff --git a/r600_batch.c b/r600_batch.c
index 2349145..bc6616c 100644
--- a/r600_batch.c
+++ b/r600_batch.c
@@ -23,7 +23,8 @@ int r600_cb_emit(struct radeon_device *rdev, struct radeon_atom *atom, void *dat
 int r600_cb_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data);
 int r600_cb_cntl_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data);
 int r600_pa_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data);
-int r600_vport_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data);
+int r600_viewport_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data);
+int r600_scissor_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data);
 int r600_blend_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data);
 int r600_constants_create(struct radeon_device *rdev, struct radeon_atom *atom, void *data);
 int r600_db_emit(struct radeon_device *rdev, struct radeon_atom *atom, void *data, struct radeon_ib *ib);
@@ -213,9 +214,10 @@ int r600_batches_queue(struct radeon_device *rdev, struct r600_request *rq)
 	memcpy(&rbatch->inputs, &batch->inputs, sizeof(struct r600_vs_input));
 	i = 0;
 	if (batch->blend == NULL || batch->cb_cntl == NULL ||
-		batch->pa == NULL || batch->vport == NULL ||
+		batch->pa == NULL || batch->viewport == NULL ||
 		batch->cb == NULL || batch->db_cntl == NULL ||
-		batch->vs_shader == NULL || batch->ps_shader == NULL) {
+		batch->vs_shader == NULL || batch->ps_shader == NULL ||
+		batch->scissor == NULL) {
 		free(rbatch);
 		fprintf(stderr, "invalid batch\n");
 		return -EINVAL;
@@ -223,7 +225,8 @@ int r600_batches_queue(struct radeon_device *rdev, struct r600_request *rq)
 	rbatch->atoms[i++] = batch->blend; kref_get(&batch->blend->kref);
 	rbatch->atoms[i++] = batch->cb_cntl; kref_get(&batch->cb_cntl->kref);
 	rbatch->atoms[i++] = batch->pa; kref_get(&batch->pa->kref);
-	rbatch->atoms[i++] = batch->vport; kref_get(&batch->vport->kref);
+	rbatch->atoms[i++] = batch->viewport; kref_get(&batch->viewport->kref);
+	rbatch->atoms[i++] = batch->scissor; kref_get(&batch->scissor->kref);
 	rbatch->atoms[i++] = batch->vs_shader; kref_get(&batch->vs_shader->kref);
 	rbatch->atoms[i++] = batch->ps_shader; kref_get(&batch->ps_shader->kref);
 	rbatch->atoms[i++] = batch->db_cntl; kref_get(&batch->db_cntl->kref);
@@ -360,8 +363,10 @@ static struct r600_atom_funcs _r600_atom_funcs[] = {
 		&r600_pa_create, &radeon_atom_emit_default},
 	{R600_ATOM_CB_CNTL, sizeof(struct drm_r600_cb_cntl),
 		&r600_cb_cntl_create, &radeon_atom_emit_default},
-	{R600_ATOM_VPORT, sizeof(struct drm_r600_vport),
-		&r600_vport_create, &radeon_atom_emit_default},
+	{R600_ATOM_VIEWPORT, sizeof(struct drm_r600_viewport),
+		&r600_viewport_create, &radeon_atom_emit_default},
+	{R600_ATOM_SCISSOR, sizeof(struct drm_r600_scissor),
+		&r600_scissor_create, &radeon_atom_emit_default},
 	{R600_ATOM_BLEND, sizeof(struct drm_r600_blend),
 		&r600_blend_create, &radeon_atom_emit_default},
 	{R600_ATOM_CONSTANTS, sizeof(struct drm_r600_constants),
diff --git a/r600d.h b/r600d.h
index 5404c58..77ad2ec 100644
--- a/r600d.h
+++ b/r600d.h
@@ -674,5 +674,53 @@
 #define   S_0286C4_VS_OUT_FOG_VEC_ADDR(x)              (((x) & 0x1F) << 9)
 #define   G_0286C4_VS_OUT_FOG_VEC_ADDR(x)              (((x) >> 9) & 0x1F)
 #define   C_0286C4_VS_OUT_FOG_VEC_ADDR                 0xFFFFC1FF
+#define R_028240_PA_SC_GENERIC_SCISSOR_TL            0x028240
+#define   S_028240_TL_X(x)                             (((x) & 0x3FFF) << 0)
+#define   G_028240_TL_X(x)                             (((x) >> 0) & 0x3FFF)
+#define   C_028240_TL_X                                0xFFFFC000
+#define   S_028240_TL_Y(x)                             (((x) & 0x3FFF) << 16)
+#define   G_028240_TL_Y(x)                             (((x) >> 16) & 0x3FFF)
+#define   C_028240_TL_Y                                0xC000FFFF
+#define   S_028240_WINDOW_OFFSET_DISABLE(x)            (((x) & 0x1) << 31)
+#define   G_028240_WINDOW_OFFSET_DISABLE(x)            (((x) >> 31) & 0x1)
+#define   C_028240_WINDOW_OFFSET_DISABLE               0x7FFFFFFF
+#define R_028244_PA_SC_GENERIC_SCISSOR_BR            0x028244
+#define   S_028244_BR_X(x)                             (((x) & 0x3FFF) << 0)
+#define   G_028244_BR_X(x)                             (((x) >> 0) & 0x3FFF)
+#define   C_028244_BR_X                                0xFFFFC000
+#define   S_028244_BR_Y(x)                             (((x) & 0x3FFF) << 16)
+#define   G_028244_BR_Y(x)                             (((x) >> 16) & 0x3FFF)
+#define   C_028244_BR_Y                                0xC000FFFF
+#define R_028030_PA_SC_SCREEN_SCISSOR_TL             0x028030
+#define   S_028030_TL_X(x)                             (((x) & 0x7FFF) << 0)
+#define   G_028030_TL_X(x)                             (((x) >> 0) & 0x7FFF)
+#define   C_028030_TL_X                                0xFFFF8000
+#define   S_028030_TL_Y(x)                             (((x) & 0x7FFF) << 16)
+#define   G_028030_TL_Y(x)                             (((x) >> 16) & 0x7FFF)
+#define   C_028030_TL_Y                                0x8000FFFF
+#define R_028034_PA_SC_SCREEN_SCISSOR_BR             0x028034
+#define   S_028034_BR_X(x)                             (((x) & 0x7FFF) << 0)
+#define   G_028034_BR_X(x)                             (((x) >> 0) & 0x7FFF)
+#define   C_028034_BR_X                                0xFFFF8000
+#define   S_028034_BR_Y(x)                             (((x) & 0x7FFF) << 16)
+#define   G_028034_BR_Y(x)                             (((x) >> 16) & 0x7FFF)
+#define   C_028034_BR_Y                                0x8000FFFF
+#define R_028204_PA_SC_WINDOW_SCISSOR_TL             0x028204
+#define   S_028204_TL_X(x)                             (((x) & 0x3FFF) << 0)
+#define   G_028204_TL_X(x)                             (((x) >> 0) & 0x3FFF)
+#define   C_028204_TL_X                                0xFFFFC000
+#define   S_028204_TL_Y(x)                             (((x) & 0x3FFF) << 16)
+#define   G_028204_TL_Y(x)                             (((x) >> 16) & 0x3FFF)
+#define   C_028204_TL_Y                                0xC000FFFF
+#define   S_028204_WINDOW_OFFSET_DISABLE(x)            (((x) & 0x1) << 31)
+#define   G_028204_WINDOW_OFFSET_DISABLE(x)            (((x) >> 31) & 0x1)
+#define   C_028204_WINDOW_OFFSET_DISABLE               0x7FFFFFFF
+#define R_028208_PA_SC_WINDOW_SCISSOR_BR             0x028208
+#define   S_028208_BR_X(x)                             (((x) & 0x3FFF) << 0)
+#define   G_028208_BR_X(x)                             (((x) >> 0) & 0x3FFF)
+#define   C_028208_BR_X                                0xFFFFC000
+#define   S_028208_BR_Y(x)                             (((x) & 0x3FFF) << 16)
+#define   G_028208_BR_Y(x)                             (((x) >> 16) & 0x3FFF)
+#define   C_028208_BR_Y                                0xC000FFFF
 
 #endif
diff --git a/r700_atom.c b/r700_atom.c
index 2f55be3..44b70e5 100644
--- a/r700_atom.c
+++ b/r700_atom.c
@@ -221,4 +221,17 @@ void r700_batches_states_default(struct radeon_device *rdev, struct r600_batches
 	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
 	ib->ptr[ib->cpkts++] = 0x00000308;
 	ib->ptr[ib->cpkts++] = 0x00000000;
+	/* PA_SC_WINDOW_OFFSET */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	ib->ptr[ib->cpkts++] = 0x00000080;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	/* PA_SC_VPORT_ZMIN_0 */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	ib->ptr[ib->cpkts++] = 0x000000B4;
+	ib->ptr[ib->cpkts++] = 0.0f;
+	ib->ptr[ib->cpkts++] = 1.0f;
+	/* PA_SC_MODE_CNTL */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	ib->ptr[ib->cpkts++] = 0x00000293;
+	ib->ptr[ib->cpkts++] = 0x00514000;
 }
diff --git a/test.c b/test.c
index bd95914..3665a3c 100644
--- a/test.c
+++ b/test.c
@@ -98,7 +98,8 @@ int r600_tri_flat(struct radeon *radeon)
 	struct drm_r600_cb_cntl cb_cntl;
 	struct drm_r600_db_cntl db_cntl;
 	struct drm_r600_pa pa;
-	struct drm_r600_vport vport;
+	struct drm_r600_viewport vport;
+	struct drm_r600_scissor scissor;
 	struct drm_r600_constants vs_constants;
 	struct drm_r600_vs_shader vs_shader;
 	struct drm_r600_ps_shader ps_shader;
@@ -134,7 +135,7 @@ int r600_tri_flat(struct radeon *radeon)
 	if (r)
 		return r;
 	/* build cb */
-	cb.pitch = radeon->mode.pitch / 4;
+	cb.width = radeon->mode.pitch / 4;
 	cb.height = radeon->mode.height;
 	cb.nsamples = 1;
 	cb.color_info = 0x08110068;
@@ -148,13 +149,11 @@ int r600_tri_flat(struct radeon *radeon)
 	batch.cb = r600_atom_create(rdev, &rq);
 	/* build pa */
 	pa.pa_sc_mpass_ps_cntl = 0x00000000;
-	pa.pa_sc_mode_cntl = 0x00514000;
 	pa.pa_sc_line_cntl = 0x00000400;
 	pa.pa_sc_aa_config = 0x00000000;
 	pa.pa_sc_aa_sample_locs_mctx = 0x00000000;
 	pa.pa_sc_aa_mask = 0xffffffff;
 	pa.pa_cl_clip_cntl = 0x00000000;
-	pa.pa_cl_vte_cntl = 0x0000043f;
 	pa.pa_cl_vs_out_cntl = 0x00000000;
 	pa.pa_cl_naninf_cntl = 0x00000000;
 	pa.pa_cl_gb_vert_clip_adj = 0x3f800000;
@@ -198,33 +197,24 @@ int r600_tri_flat(struct radeon *radeon)
 	rq.data = &cb_cntl;
 	batch.cb_cntl = r600_atom_create(rdev, &rq);
 	/* viewport */
-	vport.pa_sc_vport_zmin_0 = 0x00000000;
-	vport.pa_sc_vport_zmax_0 = 0x3f800000;
+	vport.pa_cl_vte_cntl = 0x0000043f;
+//	vport.pa_sc_vport_zmin_0 = 0x00000000;
+//	vport.pa_sc_vport_zmax_0 = 0x3f800000;
 	vport.pa_cl_vport_xscale_0 = 0x42fa0000;
 	vport.pa_cl_vport_xoffset_0 = 0x42fa0000;
 	vport.pa_cl_vport_yscale_0 = 0xc2fa0000;
 	vport.pa_cl_vport_yoffset_0 = 0x42fa0000;
 	vport.pa_cl_vport_zscale_0 = 0x3f000000;
 	vport.pa_cl_vport_zoffset_0 = 0x3f000000;
-	vport.pa_sc_screen_scissor_tl = 0x80000000;
-	vport.pa_sc_screen_scissor_br = 0x00fa00fa;
-	vport.pa_sc_window_offset = 0x00000000;
-	vport.pa_sc_window_scissor_tl = 0x80000000;
-	vport.pa_sc_window_scissor_br = 0x00fa00fa;
-	vport.pa_sc_cliprect_rule = 0x0000ffff;
-	vport.pa_sc_cliprect_0_tl = 0x00000000;
-	vport.pa_sc_cliprect_0_br = 0x00fa00fa;
-	vport.pa_sc_cliprect_1_tl = 0x00000000;
-	vport.pa_sc_cliprect_1_br = 0x00fa00fa;
-	vport.pa_sc_cliprect_2_tl = 0x00000000;
-	vport.pa_sc_cliprect_2_br = 0x00fa00fa;
-	vport.pa_sc_cliprect_3_tl = 0x00000000;
-	vport.pa_sc_cliprect_3_br = 0x00fa00fa;
-	vport.pa_sc_generic_scissor_tl = 0x80000000;
-	vport.pa_sc_generic_scissor_br = 0x00fa00fa;
-	rq.type = R600_ATOM_VPORT;
+	rq.type = R600_ATOM_VIEWPORT;
 	rq.data = &vport;
-	batch.vport = r600_atom_create(rdev, &rq);
+	batch.viewport = r600_atom_create(rdev, &rq);
+	/* scissor */
+	scissor.pa_sc_vport_scissor_0_tl = 0x80000000;
+	scissor.pa_sc_vport_scissor_0_br = 0x00fa00fa;
+	rq.type = R600_ATOM_SCISSOR;
+	rq.data = &scissor;
+	batch.scissor = r600_atom_create(rdev, &rq);
 	/* blend */
 	blend.cb_blend0_control = 0x00010001;
 	blend.cb_blend1_control = 0x00000000;