move output mask to framebuffer

3 files changed, 12 insertions, 355 deletions

diff --git a/r600_atom.c b/r600_atom.c
index 56d14e1..8100a44 100644
--- a/r600_atom.c
+++ b/r600_atom.c
@@ -45,7 +45,7 @@ int r600_framebuffer_emit(struct r600_winsys *rdev,
 int r600_framebuffer_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data)
 {
 	struct drm_r600_framebuffer *fb;
-	u32 bpe, tmp;
+	u32 cb_target_mask, cb_shader_mask;
 	int r, i;
 
 	fb = malloc(sizeof(struct drm_r600_framebuffer));
@@ -70,7 +70,9 @@ int r600_framebuffer_create(struct r600_winsys *rdev, struct r600_atom *atom, vo
 		}
 		atom->nbo++;
 	}
-	for (i = 0; i < fb->ncb; i++) {
+	for (i = 0, cb_target_mask = 0, cb_shader_mask = 0; i < fb->ncb; i++) {
+		cb_target_mask |= (fb->cb[i].cb_target_mask & 0xf) << (i * 4);
+		cb_shader_mask |= (fb->cb[i].cb_shader_mask & 0xf) << (i * 4);
 		/* CB_COLOR0_BASE */
 		atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
 		atom->pkts[atom->npkts++] = 0x00000010 + i;
@@ -152,342 +154,15 @@ int r600_framebuffer_create(struct r600_winsys *rdev, struct r600_atom *atom, vo
 	atom->pkts[atom->npkts++] = 0x00000081;
 	atom->pkts[atom->npkts++] = 0x80000000;
 	atom->pkts[atom->npkts++] = S_028208_BR_X(fb->width) | S_028208_BR_Y(fb->height);
-	r600_tflat(atom);
-fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts);
-	return 0;
-}
-
-#if 0
-/*
- * r600_db
- */
-int r600_db_emit(struct r600_winsys *rdev,
-			struct r600_atom *atom,
-			void *data,
-			struct radeon_ib *ib)
-{
-	struct drm_r600_db *db = atom->state;
-	int r;
-
-	atom->pkts[4] = radeon_ib_reloc(ib, atom->bo[0], db->db_placements[0] | db->db_placements[1]);
-	if (atom->nbo > 1)
-		atom->pkts[9] = radeon_ib_reloc(ib, atom->bo[1], db->hz_placements[0] | db->hz_placements[1]);
-	r = radeon_ib_copy(ib, atom->pkts, atom->npkts);
-	return r;
-}
-
-int r600_db_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data)
-{
-	struct drm_r600_db *db;
-	u32 nslices, ntiles_per_slice, ntiles, bpe;
-	int has_s;
-	int r;
-
-	db = malloc(sizeof(struct drm_r600_db));
-	if (db == NULL)
-		return -ENOMEM;
-	memcpy(db, data, sizeof(struct drm_r600_db));
-	atom->state = db;
-	atom->bo[0] = radeon_bo_lookup(rdev, db->db_handle);
-	if (atom->bo[0] == NULL)
-		return -EINVAL;
-	atom->flags[0] = 0x04004000;
-	atom->nbo = 1;
-	if (db->hz_handle) {
-		atom->bo[1] = radeon_bo_lookup(rdev, db->hz_handle);
-		if (atom->bo[1] == NULL)
-			return -EINVAL;
-		atom->flags[1] = 0x04004000;
-		atom->nbo = 2;
-	}
-	switch (G_028010_FORMAT(db->db_depth_info)) {
-	case V_028010_DEPTH_16:
-		bpe = 2;
-		has_s = 0;
-		break;
-	case V_028010_DEPTH_X8_24:
-	case V_028010_DEPTH_X8_24_FLOAT:
-	case V_028010_DEPTH_32_FLOAT:
-		bpe = 4;
-		has_s = 0;
-		break;
-	case V_028010_DEPTH_8_24:
-	case V_028010_DEPTH_8_24_FLOAT:
-		bpe = 4;
-		has_s = 1;
-		break;
-	case V_028010_DEPTH_X24_8_32_FLOAT:
-		bpe = 8;
-		has_s = 1;
-		break;
-	case V_028010_DEPTH_INVALID:
-	default:
-		fprintf(stderr, "invalid db format %d\n", G_028010_FORMAT(db->db_depth_info));
-		return -EINVAL;
-		break;
-	}
-	nslices = G_028004_SLICE_MAX(db->db_depth_view) + 1;
-	ntiles_per_slice = G_028000_SLICE_TILE_MAX(db->db_depth_size) + 1;
-	ntiles = nslices * ntiles_per_slice;
-	if ((ntiles * 64 * bpe) > radeon_bo_size(atom->bo[0])) {
-		fprintf(stderr, "db buffer too small %d need %d (%d %d)\n",
-			radeon_bo_size(atom->bo[0]), ntiles * 64 * bpe,
-			nslices, ntiles_per_slice);
-		return -EINVAL;
-	}
-	if (db->hz_handle) {
-		fprintf(stderr, "we don't know how to compute hiz buffer size\n");
-		return -EINVAL;
-	}
-	if (!db->hz_handle && G_028010_TILE_SURFACE_ENABLE(db->db_depth_info)) {
-		fprintf(stderr, "hyperz enabled but no buffer supplied\n");
-		return -EINVAL;
-	}
-	/* R_02800C_DB_DEPTH_BASE */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	atom->pkts[atom->npkts++] = 0x00000003;
-	atom->pkts[atom->npkts++] = 0x00000000;
-	atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
-fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, db->db, db->db_placements[0] | db->db_placements[1]);\n", atom->npkts);
-	atom->pkts[atom->npkts++] = 0x00000000;
-	if (db->hz_handle) {
-		/* R_028014_DB_HTILE_DATA_BASE */
-		atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-		atom->pkts[atom->npkts++] = 0x00000005;
-		atom->pkts[atom->npkts++] = 0x00000000;
-		atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
-		fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, db->hz, db->hz_placements[0] | db->hz_placements[1]);\n", atom->npkts);
-		atom->pkts[atom->npkts++] = 0x00000000;
-	}
-	/* R_028000_DB_DEPTH_SIZE */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	atom->pkts[atom->npkts++] = 0x00000000;
-	atom->pkts[atom->npkts++] = db->db_depth_size;
-	atom->pkts[atom->npkts++] = db->db_depth_view;
-	/* R_028010_DB_DEPTH_INFO */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	atom->pkts[atom->npkts++] = 0x00000004;
-	atom->pkts[atom->npkts++] = db->db_depth_info;
-	/* R_028D24_DB_HTILE_SURFACE */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	atom->pkts[atom->npkts++] = 0x00000349;
-	atom->pkts[atom->npkts++] = db->db_htile_surface;
-	/* R_028D34_DB_PREFETCH_LIMIT */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	atom->pkts[atom->npkts++] = 0x0000034D;
-	atom->pkts[atom->npkts++] = db->db_prefetch_limit;
-fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts);
-	return 0;
-}
-/*
- * r600_cb
- */
-int r600_cb_emit(struct r600_winsys *rdev,
-			struct r600_atom *atom,
-			void *data,
-			struct radeon_ib *ib)
-{
-	struct drm_r600_cb *cb = atom->state;
-	int r;
-
-	atom->pkts[16] = radeon_ib_reloc(ib, atom->bo[0], cb->placements[0] | cb->placements[1]);
-	atom->pkts[21] = radeon_ib_reloc(ib, atom->bo[0], cb->placements[0] | cb->placements[1]);
-	atom->pkts[26] = radeon_ib_reloc(ib, atom->bo[0], cb->placements[0] | cb->placements[1]);
-	r = radeon_ib_copy(ib, atom->pkts, atom->npkts);
-	return r;
-}
-
-int r600_cb_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data)
-{
-	struct drm_r600_cb *cb;
-	u32 bpe, tmp;
-	int r;
-
-	cb = malloc(sizeof(struct drm_r600_cb));
-	if (cb == NULL)
-		return -ENOMEM;
-	memcpy(cb, data, sizeof(struct drm_r600_cb));
-	atom->state = cb;
-	atom->nflushes = 1;
-	/* take a references on the bo */
-	atom->bo[0] = radeon_bo_lookup(rdev, cb->handle);
-	atom->flags[0] = 0x02000040;
-	if (atom->bo[0] == NULL) {
-		return -EINVAL;
-	}
-	atom->nbo = 1;
-	/* check cb configuration */
-	switch (G_0280A0_FORMAT(cb->color_info)) {
-	case V_0280A0_COLOR_8:
-	case V_0280A0_COLOR_4_4:
-	case V_0280A0_COLOR_3_3_2:
-		bpe = 1;
-		break;
-	case V_0280A0_COLOR_16:
-	case V_0280A0_COLOR_16_FLOAT:
-	case V_0280A0_COLOR_8_8:
-	case V_0280A0_COLOR_5_6_5:
-	case V_0280A0_COLOR_6_5_5:
-	case V_0280A0_COLOR_1_5_5_5:
-	case V_0280A0_COLOR_4_4_4_4:
-	case V_0280A0_COLOR_5_5_5_1:
-		bpe = 2;
-		break;
-	case V_0280A0_COLOR_32:
-	case V_0280A0_COLOR_32_FLOAT:
-	case V_0280A0_COLOR_16_16:
-	case V_0280A0_COLOR_16_16_FLOAT:
-	case V_0280A0_COLOR_8_24:
-	case V_0280A0_COLOR_8_24_FLOAT:
-	case V_0280A0_COLOR_24_8:
-	case V_0280A0_COLOR_24_8_FLOAT:
-	case V_0280A0_COLOR_10_11_11:
-	case V_0280A0_COLOR_10_11_11_FLOAT:
-	case V_0280A0_COLOR_11_11_10:
-	case V_0280A0_COLOR_11_11_10_FLOAT:
-	case V_0280A0_COLOR_2_10_10_10:
-	case V_0280A0_COLOR_8_8_8_8:
-	case V_0280A0_COLOR_10_10_10_2:
-	case V_0280A0_COLOR_X24_8_32_FLOAT:
-		bpe = 4;
-		break;
-	case V_0280A0_COLOR_32_32:
-	case V_0280A0_COLOR_32_32_FLOAT:
-	case V_0280A0_COLOR_16_16_16_16:
-	case V_0280A0_COLOR_16_16_16_16_FLOAT:
-		bpe = 8;
-		break;
-	case V_0280A0_COLOR_32_32_32_32:
-	case V_0280A0_COLOR_32_32_32_32_FLOAT:
-		bpe = 16;
-		break;
-	case V_0280A0_COLOR_INVALID:
-	default:
-		fprintf(stderr, "%s cb invalid format %d\n", __func__,
-			S_0280A0_FORMAT(cb->color_info));
-		return -EINVAL;
-	}
-	switch (G_0280A0_ARRAY_MODE(cb->color_info)) {
-	case V_0280A0_ARRAY_LINEAR_GENERAL:
-	case V_0280A0_ARRAY_LINEAR_ALIGNED:
-		if ((cb->width) & 0x3f) {
-			fprintf(stderr, "%s:%d cb pitch (%d) invalid\n",
-				__func__, __LINE__, cb->width);
-			return -EINVAL;
-		}
-		if ((cb->width * bpe) & (rdev->group_bytes - 1)) {
-			fprintf(stderr, "%s:%d cb pitch (%d) invalid\n",
-				__func__, __LINE__, cb->width);
-			return -EINVAL;
-		}
-		break;
-	case V_0280A0_ARRAY_1D_TILED_THIN1:
-		if ((cb->width) & 0x7) {
-			fprintf(stderr, "%s:%d cb pitch (%d) invalid\n",
-				__func__, __LINE__, cb->width);
-			return -EINVAL;
-		}
-		if ((cb->width * 8 * bpe * cb->nsamples) & (rdev->group_bytes - 1)) {
-			fprintf(stderr, "%s:%d cb pitch (%d) invalid\n",
-				__func__, __LINE__, cb->width);
-			return -EINVAL;
-		}
-		if (cb->height & 0x7) {
-			fprintf(stderr, "%s:%d cb height (%d) invalid\n",
-				__func__, __LINE__, cb->height);
-			return -EINVAL;
-		}
-		break;
-	case V_0280A0_ARRAY_2D_TILED_THIN1:
-		if ((cb->width) & ((8 * rdev->nbanks) - 1)) {
-			fprintf(stderr, "%s:%d cb pitch (%d) invalid\n",
-				__func__, __LINE__, cb->width);
-			return -EINVAL;
-		}
-		tmp = cb->width * 8 * bpe * cb->nsamples;
-		tmp = tmp / rdev->nbanks;
-		if (tmp & (rdev->group_bytes - 1)) {
-			fprintf(stderr, "%s:%d cb pitch (%d) invalid\n",
-				__func__, __LINE__, cb->width);
-			return -EINVAL;
-		}
-		if (cb->height & ((8 * rdev->npipes) - 1)) {
-			fprintf(stderr, "%s:%d cb height (%d) invalid\n",
-				__func__, __LINE__, cb->height);
-			return -EINVAL;
-		}
-		break;
-	default:
-		fprintf(stderr, "%s invalid tiling %d\n", __func__,
-			G_0280A0_ARRAY_MODE(cb->color_info));
-		return -EINVAL;
-	}
-	/* cb require a buffer of at list cb->size */
-	if (radeon_bo_size(atom->bo[0]) < cb->width * cb->height * bpe) {
-		fprintf(stderr, "%s bo too small (%d) need (%d) %d %d %d\n",
-			__func__, radeon_bo_size(atom->bo[0]),
-			cb->width * cb->height * bpe, cb->width, cb->height, bpe);
-		return -EINVAL;
-	}
-	/* CB_COLOR0_INFO */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	atom->pkts[atom->npkts++] = 0x00000028;
-	atom->pkts[atom->npkts++] = cb->color_info;
-	/* CB_COLOR0_SIZE */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	atom->pkts[atom->npkts++] = 0x00000018;
-	atom->pkts[atom->npkts++] =
-		S_028060_PITCH_TILE_MAX((cb->width >> 3) - 1) |
-		S_028060_SLICE_TILE_MAX(((cb->width * cb->height) >> 6) - 1);
-	/* CB_COLOR0_VIEW */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	atom->pkts[atom->npkts++] = 0x00000020;
-	atom->pkts[atom->npkts++] = 0x00000000;
-	/* CB_COLOR0_MASK */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	atom->pkts[atom->npkts++] = 0x00000040;
-	atom->pkts[atom->npkts++] = 0x00000000;
-	/* CB_COLOR0_TILE */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	atom->pkts[atom->npkts++] = 0x00000030;
-	atom->pkts[atom->npkts++] = 0x00000000;
-	atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
-fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]);\n", atom->npkts);
-	atom->pkts[atom->npkts++] = 0x00000000;
-	/* CB_COLOR0_FRAG */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	atom->pkts[atom->npkts++] = 0x00000038;
-	atom->pkts[atom->npkts++] = 0x00000000;
-	atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
-fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]);\n", atom->npkts);
-	atom->pkts[atom->npkts++] = 0x00000000;
-	/* CB_COLOR0_BASE */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	atom->pkts[atom->npkts++] = 0x00000010;
-	atom->pkts[atom->npkts++] = 0x00000000;
-	atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
-fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]);\n", atom->npkts);
-	atom->pkts[atom->npkts++] = 0x00000000;
-	/* PA_SC_GENERIC_SCISSOR_TL */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	atom->pkts[atom->npkts++] = 0x00000090;
-	atom->pkts[atom->npkts++] = 0x80000000;
-	atom->pkts[atom->npkts++] = S_028244_BR_X(cb->width) | S_028244_BR_Y(cb->height);
-	/* PA_SC_SCREEN_SCISSOR_TL */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	atom->pkts[atom->npkts++] = 0x0000000C;
-	atom->pkts[atom->npkts++] = 0x80000000;
-	atom->pkts[atom->npkts++] = S_028034_BR_X(cb->width) | S_028034_BR_Y(cb->height);
-	/* PA_SC_WINDOW_OFFSET */
+	/* CB_TARGET_MASK */
 	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	atom->pkts[atom->npkts++] = 0x00000081;
-	atom->pkts[atom->npkts++] = 0x80000000;
-	atom->pkts[atom->npkts++] = S_028208_BR_X(cb->width) | S_028208_BR_Y(cb->height);
+	atom->pkts[atom->npkts++] = 0x0000008E;
+	atom->pkts[atom->npkts++] = cb_target_mask;
+	atom->pkts[atom->npkts++] = cb_shader_mask;
 	r600_tflat(atom);
 fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts);
 	return 0;
 }
-#endif
 
 /*
  * r600_cb_cntl
@@ -502,11 +177,6 @@ int r600_cb_cntl_create(struct r600_winsys *rdev, struct r600_atom *atom, void *
 		return -ENOMEM;
 	memcpy(cb_cntl, data, sizeof(struct drm_r600_cb_cntl));
 	atom->state = cb_cntl;
-	/* CB_TARGET_MASK */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	atom->pkts[atom->npkts++] = 0x0000008E;
-	atom->pkts[atom->npkts++] = cb_cntl->cb_target_mask;
-	atom->pkts[atom->npkts++] = cb_cntl->cb_shader_mask;
 	/* CB_CLRCMP_CONTROL */
 	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 4);
 	atom->pkts[atom->npkts++] = 0x0000030C;
diff --git a/r600_winsys.h b/r600_winsys.h
index 1df7b07..565062f 100644
--- a/r600_winsys.h
+++ b/r600_winsys.h
@@ -43,6 +43,8 @@ struct drm_r600_surface {
 	u32			width;
 	u32			height;
 	u32			color_info;
+	u32			cb_target_mask;
+	u32			cb_shader_mask;
 	u32			nsamples;
 	u32			offset;
 	u32			placements[2];
@@ -65,8 +67,6 @@ struct drm_r600_framebuffer {
 };
 
 struct drm_r600_cb_cntl {
-	u32			cb_target_mask;
-	u32			cb_shader_mask;
 	u32			cb_clrcmp_control;
 	u32			cb_clrcmp_src;
 	u32			cb_clrcmp_dst;
@@ -149,19 +149,6 @@ struct drm_r600_constants {
 	u32			constants[512];
 };
 
-/* db - depth buffer */
-struct drm_r600_db {
-	u32			db_depth_size;
-	u32			db_depth_view;
-	u32			db_depth_info;
-	u32			db_htile_surface;
-	u32			db_prefetch_limit;
-	u32			db_placements[2];
-	u32			hz_placements[2];
-	u32			db_handle;
-	u32			hz_handle;
-};
-
 /* db_cntl - depth buffer control */
 struct drm_r600_db_cntl {
 	u32			db_stencil_clear;
diff --git a/test.c b/test.c
index ec2d1b0..6efe4bf 100644
--- a/test.c
+++ b/test.c
@@ -143,6 +143,8 @@ int r600_tri_flat(struct radeon *radeon)
 	fb.cb[0].width = radeon->mode.pitch / 4;
 	fb.cb[0].height = radeon->mode.height;
 	fb.cb[0].nsamples = 1;
+	fb.cb[0].cb_target_mask = 0xF;
+	fb.cb[0].cb_shader_mask = 0xF;
 	fb.cb[0].color_info = 0x08110068;
 	fb.cb[0].placements[0] = RADEON_GEM_DOMAIN_VRAM;
 	fb.cb[0].placements[1] = 0;
@@ -186,8 +188,6 @@ int r600_tri_flat(struct radeon *radeon)
 	rq.data = &pa;
 	batch.rasterizer = r600_atom_create(rdev, &rq);
 	/* cb rqrol */
-	cb_cntl.cb_target_mask = 0x0000000f;
-	cb_cntl.cb_shader_mask = 0x0000000f;
 	cb_cntl.cb_clrcmp_control = 0x01000000;
 	cb_cntl.cb_clrcmp_src = 0x00000000;
 	cb_cntl.cb_clrcmp_dst = 0x000000ff;