merge cb/db to framebuffer

4 files changed, 312 insertions, 156 deletions

diff --git a/r600_atom.c b/r600_atom.c
index f5d012f..56d14e1 100644
--- a/r600_atom.c
+++ b/r600_atom.c
@@ -17,6 +17,268 @@
 #include "r600.h"
 #include "r600d.h"
 
+/* FIXME delete */
+void r600_tflat(struct r600_atom *atom);
+
+/*
+ * drm_r600_framebuffer
+ */
+int r600_framebuffer_emit(struct r600_winsys *rdev,
+				struct r600_atom *atom,
+				void *data,
+				struct radeon_ib *ib)
+{
+	struct drm_r600_framebuffer *fb = atom->state;
+	int i, j;
+
+	for (i = 0, j = 0; i < (fb->ncb * 26); i += 26, j++) {
+		atom->pkts[i + 4] = radeon_ib_reloc(ib, atom->bo[j], fb->cb[i].placements[0] | fb->cb[i].placements[1]);
+		atom->pkts[i + 18] = radeon_ib_reloc(ib, atom->bo[j], fb->cb[i].placements[0] | fb->cb[i].placements[1]);
+		atom->pkts[i + 23] = radeon_ib_reloc(ib, atom->bo[j], fb->cb[i].placements[0] | fb->cb[i].placements[1]);
+	}
+	if (fb->db_handle) {
+		atom->pkts[i + 5] = radeon_ib_reloc(ib, atom->bo[j], fb->db_placements[0] | fb->db_placements[1]);
+	}
+	return radeon_ib_copy(ib, atom->pkts, atom->npkts);
+}
+
+int r600_framebuffer_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data)
+{
+	struct drm_r600_framebuffer *fb;
+	u32 bpe, tmp;
+	int r, i;
+
+	fb = malloc(sizeof(struct drm_r600_framebuffer));
+	if (fb == NULL)
+		return -ENOMEM;
+	memcpy(fb, data, sizeof(struct drm_r600_framebuffer));
+	atom->state = fb;
+	atom->nflushes = 1;
+	/* take a references on the bo */
+	for (i = 0, atom->nbo = 0; i < fb->ncb; i++, atom->nbo++) {
+		atom->bo[i] = radeon_bo_lookup(rdev, fb->cb[i].handle);
+		atom->flags[i] = 0x02000040;
+		if (atom->bo[i] == NULL) {
+			return -EINVAL;
+		}
+	}
+	if (fb->db_handle) {
+		atom->bo[atom->nbo] = radeon_bo_lookup(rdev, fb->db_handle);
+		atom->flags[atom->nbo] = 0x04004000;
+		if (atom->bo[atom->nbo] == NULL) {
+			return -EINVAL;
+		}
+		atom->nbo++;
+	}
+	for (i = 0; i < fb->ncb; i++) {
+		/* CB_COLOR0_BASE */
+		atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+		atom->pkts[atom->npkts++] = 0x00000010 + i;
+		atom->pkts[atom->npkts++] = 0x00000000;
+		atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
+		fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]);\n", atom->npkts);
+		atom->pkts[atom->npkts++] = 0x00000000;
+		/* CB_COLOR0_SIZE */
+		atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+		atom->pkts[atom->npkts++] = 0x00000018 + i;
+		atom->pkts[atom->npkts++] =
+			S_028060_PITCH_TILE_MAX((fb->cb[i].width >> 3) - 1) |
+			S_028060_SLICE_TILE_MAX(((fb->cb[i].width * fb->cb[i].height) >> 6) - 1);
+		/* CB_COLOR0_VIEW */
+		atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+		atom->pkts[atom->npkts++] = 0x00000020 + i;
+		atom->pkts[atom->npkts++] = 0x00000000;
+		/* CB_COLOR0_INFO */
+		atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+		atom->pkts[atom->npkts++] = 0x00000028 + i;
+		atom->pkts[atom->npkts++] = fb->cb[i].color_info;
+		/* CB_COLOR0_TILE */
+		atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+		atom->pkts[atom->npkts++] = 0x00000030 + i;
+		atom->pkts[atom->npkts++] = 0x00000000;
+		atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
+		fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]);\n", atom->npkts);
+		atom->pkts[atom->npkts++] = 0x00000000;
+		/* CB_COLOR0_FRAG */
+		atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+		atom->pkts[atom->npkts++] = 0x00000038 + i;
+		atom->pkts[atom->npkts++] = 0x00000000;
+		atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
+		fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]);\n", atom->npkts);
+		atom->pkts[atom->npkts++] = 0x00000000;
+		/* CB_COLOR0_MASK */
+		atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+		atom->pkts[atom->npkts++] = 0x00000040 + i;
+		atom->pkts[atom->npkts++] = 0x00000000;
+	}
+	if (fb->db_handle) {
+		/* R_02800C_DB_DEPTH_BASE */
+		atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+		atom->pkts[atom->npkts++] = 0x00000003;
+		atom->pkts[atom->npkts++] = 0x00000000;
+		atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
+		fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, db->db, db->db_placements[0] | db->db_placements[1]);\n", atom->npkts);
+		atom->pkts[atom->npkts++] = 0x00000000;
+	}
+	/* R_028000_DB_DEPTH_SIZE */
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = fb->db_depth_size;
+	atom->pkts[atom->npkts++] = fb->db_depth_view;
+	/* R_028010_DB_DEPTH_INFO */
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000004;
+	atom->pkts[atom->npkts++] = fb->db_depth_info;
+	/* R_028D24_DB_HTILE_SURFACE */
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000349;
+	atom->pkts[atom->npkts++] = fb->db_htile_surface;
+	/* R_028D34_DB_PREFETCH_LIMIT */
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x0000034D;
+	atom->pkts[atom->npkts++] = fb->db_prefetch_limit;
+	/* PA_SC_GENERIC_SCISSOR_TL */
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x00000090;
+	atom->pkts[atom->npkts++] = 0x80000000;
+	atom->pkts[atom->npkts++] = S_028244_BR_X(fb->width) | S_028244_BR_Y(fb->height);
+	/* PA_SC_SCREEN_SCISSOR_TL */
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x0000000C;
+	atom->pkts[atom->npkts++] = 0x80000000;
+	atom->pkts[atom->npkts++] = S_028034_BR_X(fb->width) | S_028034_BR_Y(fb->height);
+	/* PA_SC_WINDOW_OFFSET */
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x00000081;
+	atom->pkts[atom->npkts++] = 0x80000000;
+	atom->pkts[atom->npkts++] = S_028208_BR_X(fb->width) | S_028208_BR_Y(fb->height);
+	r600_tflat(atom);
+fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts);
+	return 0;
+}
+
+#if 0
+/*
+ * r600_db
+ */
+int r600_db_emit(struct r600_winsys *rdev,
+			struct r600_atom *atom,
+			void *data,
+			struct radeon_ib *ib)
+{
+	struct drm_r600_db *db = atom->state;
+	int r;
+
+	atom->pkts[4] = radeon_ib_reloc(ib, atom->bo[0], db->db_placements[0] | db->db_placements[1]);
+	if (atom->nbo > 1)
+		atom->pkts[9] = radeon_ib_reloc(ib, atom->bo[1], db->hz_placements[0] | db->hz_placements[1]);
+	r = radeon_ib_copy(ib, atom->pkts, atom->npkts);
+	return r;
+}
+
+int r600_db_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data)
+{
+	struct drm_r600_db *db;
+	u32 nslices, ntiles_per_slice, ntiles, bpe;
+	int has_s;
+	int r;
+
+	db = malloc(sizeof(struct drm_r600_db));
+	if (db == NULL)
+		return -ENOMEM;
+	memcpy(db, data, sizeof(struct drm_r600_db));
+	atom->state = db;
+	atom->bo[0] = radeon_bo_lookup(rdev, db->db_handle);
+	if (atom->bo[0] == NULL)
+		return -EINVAL;
+	atom->flags[0] = 0x04004000;
+	atom->nbo = 1;
+	if (db->hz_handle) {
+		atom->bo[1] = radeon_bo_lookup(rdev, db->hz_handle);
+		if (atom->bo[1] == NULL)
+			return -EINVAL;
+		atom->flags[1] = 0x04004000;
+		atom->nbo = 2;
+	}
+	switch (G_028010_FORMAT(db->db_depth_info)) {
+	case V_028010_DEPTH_16:
+		bpe = 2;
+		has_s = 0;
+		break;
+	case V_028010_DEPTH_X8_24:
+	case V_028010_DEPTH_X8_24_FLOAT:
+	case V_028010_DEPTH_32_FLOAT:
+		bpe = 4;
+		has_s = 0;
+		break;
+	case V_028010_DEPTH_8_24:
+	case V_028010_DEPTH_8_24_FLOAT:
+		bpe = 4;
+		has_s = 1;
+		break;
+	case V_028010_DEPTH_X24_8_32_FLOAT:
+		bpe = 8;
+		has_s = 1;
+		break;
+	case V_028010_DEPTH_INVALID:
+	default:
+		fprintf(stderr, "invalid db format %d\n", G_028010_FORMAT(db->db_depth_info));
+		return -EINVAL;
+		break;
+	}
+	nslices = G_028004_SLICE_MAX(db->db_depth_view) + 1;
+	ntiles_per_slice = G_028000_SLICE_TILE_MAX(db->db_depth_size) + 1;
+	ntiles = nslices * ntiles_per_slice;
+	if ((ntiles * 64 * bpe) > radeon_bo_size(atom->bo[0])) {
+		fprintf(stderr, "db buffer too small %d need %d (%d %d)\n",
+			radeon_bo_size(atom->bo[0]), ntiles * 64 * bpe,
+			nslices, ntiles_per_slice);
+		return -EINVAL;
+	}
+	if (db->hz_handle) {
+		fprintf(stderr, "we don't know how to compute hiz buffer size\n");
+		return -EINVAL;
+	}
+	if (!db->hz_handle && G_028010_TILE_SURFACE_ENABLE(db->db_depth_info)) {
+		fprintf(stderr, "hyperz enabled but no buffer supplied\n");
+		return -EINVAL;
+	}
+	/* R_02800C_DB_DEPTH_BASE */
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000003;
+	atom->pkts[atom->npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
+fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, db->db, db->db_placements[0] | db->db_placements[1]);\n", atom->npkts);
+	atom->pkts[atom->npkts++] = 0x00000000;
+	if (db->hz_handle) {
+		/* R_028014_DB_HTILE_DATA_BASE */
+		atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+		atom->pkts[atom->npkts++] = 0x00000005;
+		atom->pkts[atom->npkts++] = 0x00000000;
+		atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
+		fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, db->hz, db->hz_placements[0] | db->hz_placements[1]);\n", atom->npkts);
+		atom->pkts[atom->npkts++] = 0x00000000;
+	}
+	/* R_028000_DB_DEPTH_SIZE */
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	atom->pkts[atom->npkts++] = 0x00000000;
+	atom->pkts[atom->npkts++] = db->db_depth_size;
+	atom->pkts[atom->npkts++] = db->db_depth_view;
+	/* R_028010_DB_DEPTH_INFO */
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000004;
+	atom->pkts[atom->npkts++] = db->db_depth_info;
+	/* R_028D24_DB_HTILE_SURFACE */
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x00000349;
+	atom->pkts[atom->npkts++] = db->db_htile_surface;
+	/* R_028D34_DB_PREFETCH_LIMIT */
+	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	atom->pkts[atom->npkts++] = 0x0000034D;
+	atom->pkts[atom->npkts++] = db->db_prefetch_limit;
+fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts);
+	return 0;
+}
 /*
  * r600_cb
  */
@@ -35,8 +297,6 @@ int r600_cb_emit(struct r600_winsys *rdev,
 	return r;
 }
 
-/* FIXME delete */
-void r600_tflat(struct r600_atom *atom);
 int r600_cb_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data)
 {
 	struct drm_r600_cb *cb;
@@ -227,6 +487,7 @@ fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, cb->bo, cb->placements[0]
 fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts);
 	return 0;
 }
+#endif
 
 /*
  * r600_cb_cntl
@@ -471,127 +732,6 @@ int r600_constants_create(struct r600_winsys *rdev, struct r600_atom *atom, void
 	return 0;
 }
 
-/*
- * r600_db
- */
-int r600_db_emit(struct r600_winsys *rdev,
-			struct r600_atom *atom,
-			void *data,
-			struct radeon_ib *ib)
-{
-	struct drm_r600_db *db = atom->state;
-	int r;
-
-	atom->pkts[4] = radeon_ib_reloc(ib, atom->bo[0], db->db_placements[0] | db->db_placements[1]);
-	if (atom->nbo > 1)
-		atom->pkts[9] = radeon_ib_reloc(ib, atom->bo[1], db->hz_placements[0] | db->hz_placements[1]);
-	r = radeon_ib_copy(ib, atom->pkts, atom->npkts);
-	return r;
-}
-
-int r600_db_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data)
-{
-	struct drm_r600_db *db;
-	u32 nslices, ntiles_per_slice, ntiles, bpe;
-	int has_s;
-	int r;
-
-	db = malloc(sizeof(struct drm_r600_db));
-	if (db == NULL)
-		return -ENOMEM;
-	memcpy(db, data, sizeof(struct drm_r600_db));
-	atom->state = db;
-	atom->bo[0] = radeon_bo_lookup(rdev, db->db_handle);
-	if (atom->bo[0] == NULL)
-		return -EINVAL;
-	atom->flags[0] = 0x04004000;
-	atom->nbo = 1;
-	if (db->hz_handle) {
-		atom->bo[1] = radeon_bo_lookup(rdev, db->hz_handle);
-		if (atom->bo[1] == NULL)
-			return -EINVAL;
-		atom->flags[1] = 0x04004000;
-		atom->nbo = 2;
-	}
-	switch (G_028010_FORMAT(db->db_depth_info)) {
-	case V_028010_DEPTH_16:
-		bpe = 2;
-		has_s = 0;
-		break;
-	case V_028010_DEPTH_X8_24:
-	case V_028010_DEPTH_X8_24_FLOAT:
-	case V_028010_DEPTH_32_FLOAT:
-		bpe = 4;
-		has_s = 0;
-		break;
-	case V_028010_DEPTH_8_24:
-	case V_028010_DEPTH_8_24_FLOAT:
-		bpe = 4;
-		has_s = 1;
-		break;
-	case V_028010_DEPTH_X24_8_32_FLOAT:
-		bpe = 8;
-		has_s = 1;
-		break;
-	case V_028010_DEPTH_INVALID:
-	default:
-		fprintf(stderr, "invalid db format %d\n", G_028010_FORMAT(db->db_depth_info));
-		return -EINVAL;
-		break;
-	}
-	nslices = G_028004_SLICE_MAX(db->db_depth_view) + 1;
-	ntiles_per_slice = G_028000_SLICE_TILE_MAX(db->db_depth_size) + 1;
-	ntiles = nslices * ntiles_per_slice;
-	if ((ntiles * 64 * bpe) > radeon_bo_size(atom->bo[0])) {
-		fprintf(stderr, "db buffer too small %d need %d (%d %d)\n",
-			radeon_bo_size(atom->bo[0]), ntiles * 64 * bpe,
-			nslices, ntiles_per_slice);
-		return -EINVAL;
-	}
-	if (db->hz_handle) {
-		fprintf(stderr, "we don't know how to compute hiz buffer size\n");
-		return -EINVAL;
-	}
-	if (!db->hz_handle && G_028010_TILE_SURFACE_ENABLE(db->db_depth_info)) {
-		fprintf(stderr, "hyperz enabled but no buffer supplied\n");
-		return -EINVAL;
-	}
-	/* R_02800C_DB_DEPTH_BASE */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	atom->pkts[atom->npkts++] = 0x00000003;
-	atom->pkts[atom->npkts++] = 0x00000000;
-	atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
-fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, db->db, db->db_placements[0] | db->db_placements[1]);\n", atom->npkts);
-	atom->pkts[atom->npkts++] = 0x00000000;
-	if (db->hz_handle) {
-		/* R_028014_DB_HTILE_DATA_BASE */
-		atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-		atom->pkts[atom->npkts++] = 0x00000005;
-		atom->pkts[atom->npkts++] = 0x00000000;
-		atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0);
-		fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, db->hz, db->hz_placements[0] | db->hz_placements[1]);\n", atom->npkts);
-		atom->pkts[atom->npkts++] = 0x00000000;
-	}
-	/* R_028000_DB_DEPTH_SIZE */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	atom->pkts[atom->npkts++] = 0x00000000;
-	atom->pkts[atom->npkts++] = db->db_depth_size;
-	atom->pkts[atom->npkts++] = db->db_depth_view;
-	/* R_028010_DB_DEPTH_INFO */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	atom->pkts[atom->npkts++] = 0x00000004;
-	atom->pkts[atom->npkts++] = db->db_depth_info;
-	/* R_028D24_DB_HTILE_SURFACE */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	atom->pkts[atom->npkts++] = 0x00000349;
-	atom->pkts[atom->npkts++] = db->db_htile_surface;
-	/* R_028D34_DB_PREFETCH_LIMIT */
-	atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	atom->pkts[atom->npkts++] = 0x0000034D;
-	atom->pkts[atom->npkts++] = db->db_prefetch_limit;
-fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts);
-	return 0;
-}
 
 /*
  * r600_db_cntl
diff --git a/r600_batch.c b/r600_batch.c
index 5aacbb0..4aa4c90 100644
--- a/r600_batch.c
+++ b/r600_batch.c
@@ -18,16 +18,14 @@
 #include "r600d.h"
 
 /* state creation functions prototype */
-int r600_cb_emit(struct r600_winsys *rdev, struct r600_atom *atom, void *data, struct radeon_ib *ib);
-int r600_cb_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data);
+int r600_framebuffer_emit(struct r600_winsys *rdev, struct r600_atom *atom, void *data, struct radeon_ib *ib);
+int r600_framebuffer_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data);
 int r600_cb_cntl_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data);
 int r600_rasterizer_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data);
 int r600_viewport_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data);
 int r600_scissor_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data);
 int r600_blend_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data);
 int r600_constants_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data);
-int r600_db_emit(struct r600_winsys *rdev, struct r600_atom *atom, void *data, struct radeon_ib *ib);
-int r600_db_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data);
 int r600_db_cntl_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data);
 int r600_vs_shader_emit(struct r600_winsys *rdev, struct r600_atom *atom, void *data, struct radeon_ib *ib);
 int r600_vs_shader_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data);
@@ -214,7 +212,7 @@ int r600_batches_queue(struct r600_winsys *rdev, struct r600_request *rq)
 	i = 0;
 	if (batch->blend == NULL || batch->cb_cntl == NULL ||
 		batch->rasterizer == NULL || batch->viewport == NULL ||
-		batch->cb == NULL || batch->db_cntl == NULL ||
+		batch->framebuffer == NULL || batch->db_cntl == NULL ||
 		batch->vs_shader == NULL || batch->fs_shader == NULL ||
 		batch->scissor == NULL) {
 		free(rbatch);
@@ -231,8 +229,7 @@ int r600_batches_queue(struct r600_winsys *rdev, struct r600_request *rq)
 	rbatch->atoms[i++] = batch->db_cntl;
 	rbatch->atoms[i++] = batch->vs_constants;
 	rbatch->atoms[i++] = batch->ps_constants;
-	rbatch->atoms[i++] = batch->db;
-	rbatch->atoms[i++] = batch->cb;
+	rbatch->atoms[i++] = batch->framebuffer;
 reprocess:
 	r600_atom_flush_cleanup(&rbatch->pre_flushes);
 	r600_atom_flush_cleanup(&rbatch->post_flushes);
@@ -350,8 +347,8 @@ void r600_atoms_release(struct r600_winsys *rdev)
  */
 static struct r600_atom_funcs _r600_atom_funcs[] = {
 	{0, 0, NULL, NULL},
-	{R600_ATOM_CB, sizeof(struct drm_r600_cb),
-		&r600_cb_create, &r600_cb_emit},
+	{R600_ATOM_FRAMEBUFFER, sizeof(struct drm_r600_framebuffer),
+		&r600_framebuffer_create, &r600_framebuffer_emit},
 	{R600_ATOM_RASTERIZER, sizeof(struct drm_r600_rasterizer),
 		&r600_rasterizer_create, &r600_atom_emit_default},
 	{R600_ATOM_CB_CNTL, sizeof(struct drm_r600_cb_cntl),
@@ -364,8 +361,6 @@ static struct r600_atom_funcs _r600_atom_funcs[] = {
 		&r600_blend_create, &r600_atom_emit_default},
 	{R600_ATOM_CONSTANTS, sizeof(struct drm_r600_constants),
 		&r600_constants_create, &r600_atom_emit_default},
-	{R600_ATOM_DB, sizeof(struct drm_r600_db),
-		&r600_db_create, &r600_db_emit},
 	{R600_ATOM_DB_CNTL, sizeof(struct drm_r600_db_cntl),
 		&r600_db_cntl_create, &r600_atom_emit_default},
 	{R600_ATOM_VS_SHADER, sizeof(struct drm_r600_vs_shader),
diff --git a/r600_winsys.h b/r600_winsys.h
index 59823f9..1df7b07 100644
--- a/r600_winsys.h
+++ b/r600_winsys.h
@@ -27,28 +27,43 @@ typedef uint8_t			u8;
 struct r600_winsys;
 struct r600_atom;
 
-#define R600_ATOM_CB		1
+#define R600_ATOM_FRAMEBUFFER	1
 #define R600_ATOM_RASTERIZER	2
 #define R600_ATOM_CB_CNTL	3
 #define R600_ATOM_VIEWPORT	4
 #define R600_ATOM_SCISSOR	5
 #define R600_ATOM_BLEND		6
 #define R600_ATOM_CONSTANTS	7
-#define R600_ATOM_DB		8
-#define R600_ATOM_DB_CNTL	9
-#define R600_ATOM_VS_SHADER	10
-#define R600_ATOM_PS_SHADER	11
-#define R600_BATCH_NATOMS	12
+#define R600_ATOM_DB_CNTL	8
+#define R600_ATOM_VS_SHADER	9
+#define R600_ATOM_PS_SHADER	10
+#define R600_BATCH_NATOMS	11
 
-struct drm_r600_cb {
+struct drm_r600_surface {
 	u32			width;
 	u32			height;
 	u32			color_info;
 	u32			nsamples;
+	u32			offset;
 	u32			placements[2];
 	u32			handle;
 };
 
+struct drm_r600_framebuffer {
+	u32			width;
+	u32			height;
+	u32			ncb;
+	struct drm_r600_surface	cb[8];
+	u32			db_offset;
+	u32			db_placements[2];
+	u32			db_handle;
+	u32			db_depth_size;
+	u32			db_depth_view;
+	u32			db_depth_info;
+	u32			db_htile_surface;
+	u32			db_prefetch_limit;
+};
+
 struct drm_r600_cb_cntl {
 	u32			cb_target_mask;
 	u32			cb_shader_mask;
@@ -215,12 +230,11 @@ struct drm_r600_batch {
 	struct r600_atom		*vs_constants;
 	struct r600_atom		*ps_constants;
 	struct r600_atom		*blend;
-	struct r600_atom		*cb;
+	struct r600_atom		*framebuffer;
 	struct r600_atom		*cb_cntl;
 	struct r600_atom		*rasterizer;
 	struct r600_atom		*viewport;
 	struct r600_atom		*scissor;
-	struct r600_atom		*db;
 	struct r600_atom		*db_cntl;
 	struct r600_atom		*vs_shader;
 	struct r600_atom		*fs_shader;
diff --git a/test.c b/test.c
index 226d171..ec2d1b0 100644
--- a/test.c
+++ b/test.c
@@ -96,7 +96,7 @@ int r600_tri_flat(struct radeon *radeon)
 	struct r600_winsys *rdev;
 	struct r600_request rq;
 	struct drm_r600_blend blend;
-	struct drm_r600_cb cb;
+	struct drm_r600_framebuffer fb;
 	struct drm_r600_cb_cntl cb_cntl;
 	struct drm_r600_db_cntl db_cntl;
 	struct drm_r600_rasterizer pa;
@@ -137,18 +137,27 @@ int r600_tri_flat(struct radeon *radeon)
 	if (r)
 		return r;
 	/* build cb */
-	cb.width = radeon->mode.pitch / 4;
-	cb.height = radeon->mode.height;
-	cb.nsamples = 1;
-	cb.color_info = 0x08110068;
-	cb.placements[0] = RADEON_GEM_DOMAIN_VRAM;
-	cb.placements[1] = 0;
-	cb.handle = radeon->mode.bo->handle;
-	rq.type = R600_ATOM_CB;
+	fb.width = radeon->mode.pitch / 4;
+	fb.height = radeon->mode.height;
+	fb.ncb = 1;
+	fb.cb[0].width = radeon->mode.pitch / 4;
+	fb.cb[0].height = radeon->mode.height;
+	fb.cb[0].nsamples = 1;
+	fb.cb[0].color_info = 0x08110068;
+	fb.cb[0].placements[0] = RADEON_GEM_DOMAIN_VRAM;
+	fb.cb[0].placements[1] = 0;
+	fb.cb[0].handle = radeon->mode.bo->handle;
+	fb.db_handle = 0;
+	fb.db_depth_size = 0;
+	fb.db_depth_view = 0;
+	fb.db_depth_info = 0;
+	fb.db_htile_surface = 0;
+	fb.db_prefetch_limit = 0;
+	rq.type = R600_ATOM_FRAMEBUFFER;
 	rq.bo[0] = radeon->mode.bo;
 	rq.nbo = 1;
-	rq.data = &cb;
-	batch.cb = r600_atom_create(rdev, &rq);
+	rq.data = &fb;
+	batch.framebuffer = r600_atom_create(rdev, &rq);
 	/* build pa */
 	pa.pa_sc_mpass_ps_cntl = 0x00000000;
 	pa.pa_sc_line_cntl = 0x00000400;
@@ -240,8 +249,6 @@ int r600_tri_flat(struct radeon *radeon)
 	rq.type = R600_ATOM_CONSTANTS;
 	rq.data = &vs_constants;
 	batch.vs_constants = r600_atom_create(rdev, &rq);
-	/* db */
-	batch.db = NULL;
 	/* db rqrol */
 	db_cntl.db_stencil_clear = 0x00000000;
 	db_cntl.db_depth_clear = 0x3F800000;