diff options
author | Jerome Glisse <jglisse@redhat.com> | 2010-02-23 21:58:31 +0100 |
---|---|---|
committer | Jerome Glisse <jglisse@redhat.com> | 2010-02-23 21:58:31 +0100 |
commit | a6ac6494fd541818f26513dcfab68fcb4765b0b0 (patch) | |
tree | 3ffd13719cfeb69ec97e001051b97868ac583538 | |
parent | c0700a6fa752ac36e15c7064ec88bf29b7a6cb55 (diff) |
cleanup
-rw-r--r-- | r600_atom.c | 13 | ||||
-rw-r--r-- | r600_batch.c | 15 | ||||
-rw-r--r-- | r600_winsys.h | 11 | ||||
-rw-r--r-- | test.c | 300 |
4 files changed, 48 insertions, 291 deletions
diff --git a/r600_atom.c b/r600_atom.c index 0956f91..ea04252 100644 --- a/r600_atom.c +++ b/r600_atom.c @@ -75,7 +75,6 @@ int r600_framebuffer_create(struct r600_winsys *rdev, struct r600_atom *atom, vo atom->pkts[atom->npkts++] = 0x00000010 + i; atom->pkts[atom->npkts++] = 0x00000000; atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0); - fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]);\n", atom->npkts); atom->pkts[atom->npkts++] = 0x00000000; /* CB_COLOR0_SIZE */ atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1); @@ -96,14 +95,12 @@ int r600_framebuffer_create(struct r600_winsys *rdev, struct r600_atom *atom, vo atom->pkts[atom->npkts++] = 0x00000030 + i; atom->pkts[atom->npkts++] = 0x00000000; atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0); - fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]);\n", atom->npkts); atom->pkts[atom->npkts++] = 0x00000000; /* CB_COLOR0_FRAG */ atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1); atom->pkts[atom->npkts++] = 0x00000038 + i; atom->pkts[atom->npkts++] = 0x00000000; atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0); - fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, cb->bo, cb->placements[0] | cb->placements[1]);\n", atom->npkts); atom->pkts[atom->npkts++] = 0x00000000; /* CB_COLOR0_MASK */ atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1); @@ -116,7 +113,6 @@ int r600_framebuffer_create(struct r600_winsys *rdev, struct r600_atom *atom, vo atom->pkts[atom->npkts++] = 0x00000003; atom->pkts[atom->npkts++] = 0x00000000; atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0); - fprintf(stderr, "atom->pkts[%d] = radeon_ib_reloc(ib, db->db, db->db_placements[0] | db->db_placements[1]);\n", atom->npkts); atom->pkts[atom->npkts++] = 0x00000000; } /* R_028000_DB_DEPTH_SIZE */ @@ -156,7 +152,6 @@ int r600_framebuffer_create(struct r600_winsys *rdev, struct r600_atom *atom, vo atom->pkts[atom->npkts++] = 0x0000008E; atom->pkts[atom->npkts++] = cb_target_mask; atom->pkts[atom->npkts++] = cb_shader_mask; -fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); return 0; } @@ -204,7 +199,6 @@ int r600_cb_cntl_create(struct r600_winsys *rdev, struct r600_atom *atom, void * atom->pkts[atom->npkts++] = cb_cntl->cb_fog_red; atom->pkts[atom->npkts++] = cb_cntl->cb_fog_green; atom->pkts[atom->npkts++] = cb_cntl->cb_fog_blue; -fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); return 0; } @@ -283,7 +277,6 @@ int r600_rasterizer_create(struct r600_winsys *rdev, struct r600_atom *atom, voi atom->pkts[atom->npkts++] = rasterizer->pa_su_poly_offset_front_offset; atom->pkts[atom->npkts++] = rasterizer->pa_su_poly_offset_back_scale; atom->pkts[atom->npkts++] = rasterizer->pa_su_poly_offset_back_offset; -fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); return 0; } @@ -313,7 +306,6 @@ int r600_viewport_create(struct r600_winsys *rdev, struct r600_atom *atom, void atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1); atom->pkts[atom->npkts++] = 0x00000206; atom->pkts[atom->npkts++] = vport->pa_cl_vte_cntl; -fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); return 0; } @@ -366,7 +358,6 @@ int r600_blend_create(struct r600_winsys *rdev, struct r600_atom *atom, void *da atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1); atom->pkts[atom->npkts++] = 0x00000201; atom->pkts[atom->npkts++] = blend->cb_blend_control; -fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); return 0; } @@ -444,7 +435,6 @@ int r600_dsa_create(struct r600_winsys *rdev, struct r600_atom *atom, void *data atom->pkts[atom->npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1); atom->pkts[atom->npkts++] = 0x00000351; atom->pkts[atom->npkts++] = dsa->db_alpha_to_mask; -fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); return 0; } @@ -521,7 +511,6 @@ int r600_vs_shader_create(struct r600_winsys *rdev, struct r600_atom *atom, void /* FIXME: why is their 10 vector if we only have 32 outputs ? */ atom->pkts[atom->npkts++] = 0xFFFFFFFF; atom->pkts[atom->npkts++] = 0xFFFFFFFF; -fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); return 0; } @@ -583,7 +572,6 @@ int r600_fs_shader_create(struct r600_winsys *rdev, struct r600_atom *atom, void atom->pkts[atom->npkts++] = 0x000001B3; atom->pkts[atom->npkts++] = fs_shader->spi_ps_in_control_0; atom->pkts[atom->npkts++] = fs_shader->spi_ps_in_control_1; -fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); return 0; } @@ -636,7 +624,6 @@ int r600_shader_resource_create(struct r600_winsys *rdev, struct r600_atom *atom atom->pkts[atom->npkts++] = PKT3(PKT3_NOP, 0); atom->pkts[atom->npkts++] = 0x00000000; } -fprintf(stderr, "%s %d pkts\n", __func__, atom->npkts); return 0; } diff --git a/r600_batch.c b/r600_batch.c index 4eff704..3a904ce 100644 --- a/r600_batch.c +++ b/r600_batch.c @@ -189,6 +189,9 @@ int r600_batches_queue(struct r600_winsys *rdev, struct r600_request *rq) rbatch->atoms[i++] = batch->ps_constants; rbatch->atoms[i++] = batch->vs_resource; rbatch->atoms[i++] = batch->framebuffer; + for (i = 0; i < R600_BATCH_NATOMS; i++) { + r600_atom_ref(rbatch->atoms[i]); + } memcpy(&rbatch->drm, batch, sizeof(struct drm_r600_batch)); reprocess: r600_atom_flush_cleanup(&rbatch->pre_flushes); @@ -338,6 +341,7 @@ struct r600_atom *r600_atom_create(struct r600_winsys *rdev, struct r600_request if (atom == NULL) return NULL; memset(atom, 0, sizeof(struct r600_atom)); + atom->refcount = 1; atom->emit = _r600_atom_funcs[rq->type].emit; atom->nflushes = 0; atom->id = crc_64(rq->data, _r600_atom_funcs[rq->type].size); @@ -404,10 +408,21 @@ void r600_winsys_set_bo_list(struct r600_winsys *rdev, u32 nbo, struct radeon_bo rdev->nbo = nbo; } +void r600_atom_ref(struct r600_atom *atom) +{ + if (atom == NULL) + return; + atom->refcount++; +} + struct r600_atom *r600_atom_destroy(struct r600_atom *atom) { int i; + if (atom == NULL) + return NULL; + if (--atom->refcount > 0) + return NULL; for (i = 0; i < atom->nbo; i++) { radeon_bo_unref(atom->bo[i]); } diff --git a/r600_winsys.h b/r600_winsys.h index c70b558..cb838c6 100644 --- a/r600_winsys.h +++ b/r600_winsys.h @@ -243,4 +243,15 @@ extern struct r600_atom *r600_atom_destroy(struct r600_atom *atom); struct pipe_screen *r600_create_screen(struct r600_winsys *r600_winsys, struct radeon_bo_manager *bom); +struct r600_clear_data { + struct drm_r600_batch batch; +}; + +int r600_clear_queue(struct r600_winsys *rw, struct r600_atom *fb, + struct r600_clear_data *rclear, unsigned buffers, + const float *rgba, float depth, unsigned stencil); +void r600_clear_destroy(struct r600_clear_data *rclear); +int r600_clear_init(struct r600_winsys *rw, + struct radeon_bo_manager *bom, + struct r600_clear_data *rclear); #endif @@ -26,13 +26,17 @@ int r600_winsys_init(struct r600_winsys **rdev, struct radeon_bo_manager *bom, int fd); void r600_winsys_release(struct r600_winsys *rdev); -int r600_tri_flat(struct r600_winsys *rw, struct radeon_bo_manager *bom, int w, int h, struct radeon_bo *fbbo); int main(void) { struct radeon radeon; struct r600_winsys *rw; - int r; + struct drm_r600_framebuffer fb; + struct r600_atom *fbatom; + struct r600_request rq; + struct r600_clear_data rclear; + float rgba[4] = {1.0f, 0.0f, 0.0f, 1.0f}; + int r, w, h; int i; r = radeon_init(&radeon); @@ -44,100 +48,11 @@ int main(void) r = r600_winsys_init(&rw, radeon.bom, radeon.fd); if (r) return r; - r600_tri_flat(rw, radeon.bom, radeon.mode.pitch / 4, radeon.mode.height, radeon.mode.bo); - r600_winsys_release(rw); - getchar(); - radeon_fini(&radeon); - return 0; -} - -static u32 vsconstants[16] = { - 0x3C03126F, 0x00000000, 0x00000000, 0xBF800000, - 0x00000000, 0x3C03126F, 0x00000000, 0xBF800000, - 0x00000000, 0x00000000, 0xBF800000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x3F800000, -}; - -static u32 vsshaders[64] = { - 0x0000001C, 0x81000400, 0x00000005, 0x80000000, - 0x00000007, 0xA04C0000, 0xC001A03C, 0x94000688, - 0xC0024000, 0x94200688, 0x900000F8, 0x00A80C90, - 0x00000000, 0x00000000, 0x00200001, 0x006C2810, - 0x00A00401, 0x206C2800, 0x01200801, 0x406C2800, - 0x81A00C01, 0x606C2800, 0x00202001, 0x006C2800, - 0x00A02401, 0x206C2810, 0x01202801, 0x406C2800, - 0x81A02C01, 0x606C2800, 0x00204001, 0x006C2800, - 0x00A04401, 0x206C2800, 0x01204801, 0x406C2810, - 0x81A04C01, 0x606C2800, 0x00206001, 0x006C2800, - 0x00A06401, 0x206C2800, 0x01206801, 0x406C2800, - 0x81A06C01, 0x606C2810, 0x00000002, 0x00940C90, - 0x00000402, 0x20940C90, 0x00000802, 0x40940C90, - 0x80000C02, 0x60940C90, 0x00000000, 0x00000000, - 0x7C000000, 0x1C351001, 0x00080000, 0x0BEADEAF, - 0x7C000100, 0x18ED1002, 0x00080000, 0x0BEADEAF, -}; - -static u32 psshaders[20] = { - 0x00000003, 0x80000000, 0x00000005, 0xA00C0000, - 0xC0008000, 0x94200688, 0x900000F8, 0x00480C90, - 0x00000000, 0x00000000, 0x00000000, 0x00340C90, - 0x00000400, 0x20340C90, 0x00000800, 0x40340C90, - 0x80000C00, 0x60340C90, 0x00000000, 0x00000000, -}; - -static float rvbo1[32] = { - 0.000000, 0.000000, -1.000000, 0.500000, - 0.500000, 0.500000, 0.000000, 250.000000, - 0.000000, -1.000000, 0.500000, 0.500000, - 0.500000, 0.000000, 250.000000, 250.000000, - -1.000000, 0.500000, 0.500000, 0.500000, - 0.000000, 0.000000, 250.000000, -1.000000, - 0.500000, 0.500000, 0.500000, 0.000000, - 0.000000, 0.000000, 0.000000, 0.000000, -}; - -int r600_tri_flat(struct r600_winsys *rw, struct radeon_bo_manager *bom, int w, int h, struct radeon_bo *fbbo) -{ - struct r600_request rq; - struct drm_r600_blend blend; - struct drm_r600_framebuffer fb; - struct drm_r600_cb_cntl cb_cntl; - struct drm_r600_dsa dsa; - struct drm_r600_rasterizer rasterizer; - struct drm_r600_viewport vport; - struct drm_r600_scissor scissor; - struct drm_r600_constants vs_constants; - struct drm_r600_vs_shader vs_shader; - struct drm_r600_shader_resource vs_resource; - struct drm_r600_fs_shader ps_shader; - struct drm_r600_batch batch; - struct radeon_bo *vbo1; - struct radeon_bo *vs; - struct radeon_bo *ps; - int r; - - vbo1 = radeon_bo_open(bom, 0, 4096, 0, RADEON_GEM_DOMAIN_GTT, 0); - if (vbo1 == NULL) { - fprintf(stderr, "Failed to create vbo1 bo\n"); - return -ENOMEM; - } - memset_bo(vbo1, 0); - memcpy_bo(vbo1, (u32*)rvbo1, 32 * 4); - vs = radeon_bo_open(bom, 0, 4096, 0, RADEON_GEM_DOMAIN_GTT, 0); - if (vs == NULL) { - fprintf(stderr, "Failed to create vs bo\n"); - return -ENOMEM; - } - memset_bo(vs, 0); - memcpy_bo(vs, (u32*)vsshaders, 20 * 4); - ps = radeon_bo_open(bom, 0, 4096, 0, RADEON_GEM_DOMAIN_GTT, 0); - if (ps == NULL) { - fprintf(stderr, "Failed to create ps bo\n"); - return -ENOMEM; - } - memset_bo(ps, 0); - memcpy_bo(ps, (u32*)psshaders, 64 * 4); - + w = radeon.mode.pitch / 4; + h = radeon.mode.height; + r = r600_clear_init(rw, radeon.bom, &rclear); + if (r) + return r; /* build cb */ fb.width = w; fb.height = h; @@ -150,7 +65,7 @@ int r600_tri_flat(struct r600_winsys *rw, struct radeon_bo_manager *bom, int w, fb.cb[0].color_info = 0x08110068; fb.cb[0].placements[0] = RADEON_GEM_DOMAIN_VRAM; fb.cb[0].placements[1] = 0; - fb.cb[0].handle = fbbo->handle; + fb.cb[0].handle = radeon.mode.bo->handle; fb.db_handle = 0; fb.db_depth_size = 0; fb.db_depth_view = 0; @@ -158,189 +73,18 @@ int r600_tri_flat(struct r600_winsys *rw, struct radeon_bo_manager *bom, int w, fb.db_htile_surface = 0; fb.db_prefetch_limit = 0; rq.type = R600_ATOM_FRAMEBUFFER; - rq.bo[0] = fbbo; + rq.bo[0] = radeon.mode.bo; rq.nbo = 1; rq.data = &fb; - batch.framebuffer = r600_atom_create(rw, &rq); - /* build pa */ - rasterizer.pa_sc_mpass_ps_cntl = 0x00000000; - rasterizer.pa_sc_line_cntl = 0x00000400; - rasterizer.pa_sc_aa_config = 0x00000000; - rasterizer.pa_sc_aa_sample_locs_mctx = 0x00000000; - rasterizer.pa_sc_aa_mask = 0xffffffff; - rasterizer.pa_cl_clip_cntl = 0x00000000; - rasterizer.pa_cl_vs_out_cntl = 0x00000000; - rasterizer.pa_cl_naninf_cntl = 0x00000000; - rasterizer.pa_cl_gb_vert_clip_adj = 0x3f800000; - rasterizer.pa_cl_gb_vert_disc_adj = 0x3f800000; - rasterizer.pa_cl_gb_horz_clip_adj = 0x3f800000; - rasterizer.pa_cl_gb_horz_disc_adj = 0x3f800000; - rasterizer.pa_su_sc_mode_cntl = 0x00080000; - rasterizer.pa_su_point_size = 0x00080008; - rasterizer.pa_su_point_minmax = 0x80000000; - rasterizer.pa_su_line_cntl = 0x00000008; - rasterizer.pa_sc_line_stipple = 0x00000005; - rasterizer.pa_su_poly_offset_db_fmt_cntl = 0x00000000; - rasterizer.pa_su_poly_offset_clamp = 0x00000000; - rasterizer.pa_su_poly_offset_front_scale = 0x00000000; - rasterizer.pa_su_poly_offset_front_offset = 0x00000000; - rasterizer.pa_su_poly_offset_back_scale = 0x00000000; - rasterizer.pa_su_poly_offset_back_offset = 0x00000000; - rq.type = R600_ATOM_RASTERIZER; - rq.data = &rasterizer; - batch.rasterizer = r600_atom_create(rw, &rq); - /* cb rqrol */ - cb_cntl.cb_clrcmp_control = 0x01000000; - cb_cntl.cb_clrcmp_src = 0x00000000; - cb_cntl.cb_clrcmp_dst = 0x000000ff; - cb_cntl.cb_clrcmp_msk = 0xffffffff; - cb_cntl.cb_color_control = 0x00cc0000; - cb_cntl.cb_clear_alpha = 0x00000000; - cb_cntl.cb_clear_blue = 0x00000000; - cb_cntl.cb_clear_green = 0x00000000; - cb_cntl.cb_clear_red = 0x00000000; - cb_cntl.cb_blend_alpha = 0x00000000; - cb_cntl.cb_blend_blue = 0x00000000; - cb_cntl.cb_blend_green = 0x00000000; - cb_cntl.cb_blend_red = 0x00000000; - cb_cntl.cb_fog_blue = 0x00000000; - cb_cntl.cb_fog_green = 0x00000000; - cb_cntl.cb_fog_red = 0x00000000; - rq.type = R600_ATOM_CB_CNTL; - rq.data = &cb_cntl; - batch.cb_cntl = r600_atom_create(rw, &rq); - /* viewport */ - vport.pa_cl_vte_cntl = 0x0000043f; -// vport.pa_sc_vport_zmin_0 = 0x00000000; -// vport.pa_sc_vport_zmax_0 = 0x3f800000; - vport.pa_cl_vport_xscale_0 = 0x42fa0000; - vport.pa_cl_vport_xoffset_0 = 0x42fa0000; - vport.pa_cl_vport_yscale_0 = 0xc2fa0000; - vport.pa_cl_vport_yoffset_0 = 0x42fa0000; - vport.pa_cl_vport_zscale_0 = 0x3f000000; - vport.pa_cl_vport_zoffset_0 = 0x3f000000; - rq.type = R600_ATOM_VIEWPORT; - rq.data = &vport; - batch.viewport = r600_atom_create(rw, &rq); - /* scissor */ - scissor.pa_sc_vport_scissor_0_tl = 0x80000000; - scissor.pa_sc_vport_scissor_0_br = 0x00fa00fa; - rq.type = R600_ATOM_SCISSOR; - rq.data = &scissor; - batch.scissor = r600_atom_create(rw, &rq); - /* blend */ - blend.cb_blend0_control = 0x00010001; - blend.cb_blend1_control = 0x00000000; - blend.cb_blend2_control = 0x00000000; - blend.cb_blend3_control = 0x00000000; - blend.cb_blend4_control = 0x00000000; - blend.cb_blend5_control = 0x00000000; - blend.cb_blend6_control = 0x00000000; - blend.cb_blend7_control = 0x00000000; - blend.cb_blend_control = 0x00010001; - rq.type = R600_ATOM_BLEND; - rq.data = &blend; - batch.blend = r600_atom_create(rw, &rq); - /* ps constant */ - batch.ps_constants = NULL; - /* vs constant */ - vs_constants.nconstants = 4; - vs_constants.offset = 0x400; - memcpy(vs_constants.constants, vsconstants, vs_constants.nconstants * 4 * 4); - batch.vs_constants = NULL; - rq.type = R600_ATOM_CONSTANTS; - rq.data = &vs_constants; - batch.vs_constants = r600_atom_create(rw, &rq); - /* db rqrol */ - dsa.db_stencil_clear = 0x00000000; - dsa.db_depth_clear = 0x3F800000; - dsa.db_stencilrefmask = 0xFFFFFF00; - dsa.db_stencilrefmask_bf = 0xFFFFFF00; - dsa.db_depth_control = 0x00700700; - dsa.db_shader_control = 0x00000210; - dsa.db_render_control = 0x00000060; - dsa.db_render_override = 0x0000002A; - dsa.db_alpha_to_mask = 0x0000AA00; - dsa.db_sresults_compare_state1 = 0x00000000; - dsa.db_preload_control = 0x00000000; - rq.type = R600_ATOM_DSA; - rq.data = &dsa; - batch.dsa = r600_atom_create(rw, &rq); - /* vs_shader */ - vs_shader.ninputs = 2; - vs_shader.input_semantic[0] = 1; - vs_shader.input_gpr[0] = 1; - vs_shader.input_semantic[1] = 2; - vs_shader.input_gpr[1] = 2; - vs_shader.noutputs = 1; - vs_shader.output_semantic[0] = 4; - vs_shader.sq_pgm_resources_vs = 0x00000006; - vs_shader.ndwords = 64; - vs_shader.handle = vs->handle; - vs_shader.offset = 0; - rq.bo[0] = vs; - rq.nbo = 1; - rq.type = R600_ATOM_VS_SHADER; - rq.data = &vs_shader; - batch.vs_shader = r600_atom_create(rw, &rq); - /* ps_shader */ - ps_shader.spi_ps_input_cntl[0] = 0x00000804; - ps_shader.spi_ps_input_cntl[1] = 0x00000000; - ps_shader.spi_ps_in_control_0 = 0x10000001; - ps_shader.spi_ps_in_control_1 = 0x00000000; - ps_shader.sq_pgm_resources_ps = 0x00000003; - ps_shader.sq_pgm_exports_ps = 0x00000002; - ps_shader.ndwords = 20; - ps_shader.handle = ps->handle; - ps_shader.offset = 0; - rq.bo[0] = ps; - rq.nbo = 1; - rq.type = R600_ATOM_FS_SHADER; - rq.data = &ps_shader; - batch.fs_shader = r600_atom_create(rw, &rq); - /* inputs */ - vs_resource.nresource = 2; - vs_resource.resource[0].handle = vbo1->handle; - vs_resource.resource[0].resource_id = 0; - vs_resource.resource[0].sq_vtx_constant_word0 = 0x00000000; - vs_resource.resource[0].sq_vtx_constant_word1 = vbo1->size; - vs_resource.resource[0].sq_vtx_constant_word2 = 0x03001C00; - vs_resource.resource[0].sq_vtx_constant_word3 = 0x00000001; - vs_resource.resource[0].sq_vtx_constant_word4 = 0x00000000; - vs_resource.resource[0].sq_vtx_constant_word5 = 0x00000000; - vs_resource.resource[0].sq_vtx_constant_word6 = 0xC0000000; - vs_resource.resource[1].handle = vbo1->handle; - vs_resource.resource[1].resource_id = 1; - vs_resource.resource[1].sq_vtx_constant_word0 = 0x0000000C; - vs_resource.resource[1].sq_vtx_constant_word1 = vbo1->size - 0xC; - vs_resource.resource[1].sq_vtx_constant_word2 = 0x02301C00; - vs_resource.resource[1].sq_vtx_constant_word3 = 0x00000001; - vs_resource.resource[1].sq_vtx_constant_word4 = 0x00000000; - vs_resource.resource[1].sq_vtx_constant_word5 = 0x00000000; - vs_resource.resource[1].sq_vtx_constant_word6 = 0xC0000000; - rq.bo[0] = vbo1; - rq.bo[1] = vbo1; - rq.nbo = 2; - rq.type = R600_ATOM_SHADER_RESOURCE; - rq.data = &vs_resource; - batch.vs_resource = r600_atom_create(rw, &rq); - - - batch.vgt_primitive_type = 5; - batch.vgt_dma_index_type = 0; - batch.vgt_dma_num_instances = 1; - batch.vgt_num_indices = 4; - batch.vgt_draw_initiator = 2; - rq.type = 0; - rq.data = &batch; - rq.bo[0] = vbo1; - rq.nbo = 1; - - /* batch */ - r = r600_batches_queue(rw, &rq); + fbatom = r600_atom_create(rw, &rq); + rclear.batch.scissor = NULL; + r = r600_clear_queue(rw, fbatom, &rclear, 1, rgba, 0.0f, 0); if (r) return r; - r = r600_batches_flush(rw); - radeon_bo_unref(vbo1); - return r; + r600_clear_destroy(&rclear); + r600_atom_destroy(fbatom); + r600_winsys_release(rw); + getchar(); + radeon_fini(&radeon); + return 0; } |