remove vgt & tp

5 files changed, 104 insertions, 295 deletions

diff --git a/r600_atom.c b/r600_atom.c
index d55cab0..571f479 100644
--- a/r600_atom.c
+++ b/r600_atom.c
@@ -424,60 +424,6 @@ out_err:
 }
 
 /*
- * r600_tp
- */
-struct r600_tp {
-	struct radeon_atom	atom;
-	u32			pkts[4];
-	struct r600_atoms	*atoms;
-};
-
-static void r600_tp_release(struct kref *kref)
-{
-	struct radeon_atom *atom = container_of(kref, struct radeon_atom, kref);
-	struct r600_tp *tp = container_of(atom, struct r600_tp, atom);
-
-	mutex_lock(&tp->atoms->mutex);
-	list_del_init(&tp->atom.list);
-	mutex_unlock(&tp->atoms->mutex);
-	kfree(tp);
-}
-
-static int r600_tp_create(struct radeon_device *rdev,
-				struct r600_atoms *atoms,
-				struct drm_radeon_atom *patom,
-				struct radeon_atom **atom)
-{
-	struct drm_r600_tp ptp;
-	struct r600_tp *tp;
-	int r;
-
-	tp = kmalloc(sizeof(*tp), GFP_KERNEL);
-	if (tp == NULL)
-		return -ENOMEM;
-	/* make sure structure properly initialized */
-	memset(tp, 0, sizeof(*tp));
-	r = radeon_atom_init(&tp->atom, &atoms->idr, &r600_tp_release,
-			&radeon_atom_emit_default, &r600_atom_process_default,
-			tp->pkts);
-	if (r)
-		goto out_err;
-	/* KERNEL use get user data */
-	memcpy(&ptp, (void*)(unsigned long)patom->data, sizeof(struct drm_r600_tp));
-	/* TA_CNTL_AUX */
-	tp->pkts[tp->atom.npkts++] = PKT3(PKT3_SET_CONFIG_REG, 1);
-	tp->pkts[tp->atom.npkts++] = 0x00000542;
-	tp->pkts[tp->atom.npkts++] = ptp.ta_cntl_aux;
-	*atom = &tp->atom;
-fprintf(stderr, "%s %d pkts\n", __func__, (*atom)->npkts);
-	return 0;
-out_err:
-	radeon_atom_put(&tp->atom);
-	*atom = NULL;
-	return r;
-}
-
-/*
  * r600_pa
  */
 struct r600_pa {
@@ -1109,135 +1055,6 @@ out_err:
 }
 
 /*
- * r600_vgt
- */
-struct r600_vgt {
-	struct radeon_atom	atom;
-	u32			pkts[64];
-	struct r600_atoms	*atoms;
-	int			need_gs;
-};
-
-static void r600_vgt_release(struct kref *kref)
-{
-	struct radeon_atom *atom = container_of(kref, struct radeon_atom, kref);
-	struct r600_vgt *vgt = container_of(atom, struct r600_vgt, atom);
-
-	mutex_lock(&vgt->atoms->mutex);
-	list_del_init(&vgt->atom.list);
-	mutex_unlock(&vgt->atoms->mutex);
-	kfree(vgt);
-}
-
-static int r600_vgt_create(struct radeon_device *rdev,
-				struct r600_atoms *atoms,
-				struct drm_radeon_atom *patom,
-				struct radeon_atom **atom)
-{
-	struct drm_r600_vgt pvgt;
-	struct r600_vgt *vgt;
-	int r;
-
-	vgt = kmalloc(sizeof(*vgt), GFP_KERNEL);
-	if (vgt == NULL)
-		return -ENOMEM;
-	/* make sure structure properly initialized */
-	memset(vgt, 0, sizeof(*vgt));
-	r = radeon_atom_init(&vgt->atom, &atoms->idr, &r600_vgt_release,
-			&radeon_atom_emit_default, &r600_atom_process_default,
-			vgt->pkts);
-	if (r)
-		goto out_err;
-	/* KERNEL use get user data */
-	memcpy(&pvgt, (void*)(unsigned long)patom->data, sizeof(struct drm_r600_vgt));
-	vgt->need_gs = 0;
-	if (G_028A40_MODE(pvgt.vgt_gs_mode))
-		vgt->need_gs = 1;
-	/* VGT_VTX_VECT_EJECT_REG */
-	vgt->pkts[vgt->atom.npkts++] = PKT3(PKT3_SET_CONFIG_REG, 1);
-	vgt->pkts[vgt->atom.npkts++] = 0x0000022C;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_vtx_vect_eject_reg;
-	/* VGT_GS_PER_ES */
-	vgt->pkts[vgt->atom.npkts++] = PKT3(PKT3_SET_CONFIG_REG, 2);
-	vgt->pkts[vgt->atom.npkts++] = 0x00000232;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_gs_per_es;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_es_per_gs;
-	/* VGT_GS_VERTEX_REUSE */
-	vgt->pkts[vgt->atom.npkts++] = PKT3(PKT3_SET_CONFIG_REG, 2);
-	vgt->pkts[vgt->atom.npkts++] = 0x00000235;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_gs_vertex_reuse;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_mc_lat_cntl;
-	/* VGT_GS_PER_VS */
-	vgt->pkts[vgt->atom.npkts++] = PKT3(PKT3_SET_CONFIG_REG, 1);
-	vgt->pkts[vgt->atom.npkts++] = 0x0000023A;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_gs_per_vs;
-	/* VGT_PRIMITIVE_TYPE */
-	vgt->pkts[vgt->atom.npkts++] = PKT3(PKT3_SET_CONFIG_REG, 1);
-	vgt->pkts[vgt->atom.npkts++] = 0x00000256;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_primitive_type;
-	/* VGT_NUM_INDICES */
-	vgt->pkts[vgt->atom.npkts++] = PKT3(PKT3_SET_CONFIG_REG, 2);
-	vgt->pkts[vgt->atom.npkts++] = 0x0000025C;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_num_indices;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_num_instances;
-	/* VGT_MAX_VTX_INDX */
-	vgt->pkts[vgt->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	vgt->pkts[vgt->atom.npkts++] = 0x00000100;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_max_vtx_indx;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_min_vtx_indx;
-	/* VGT_MULTI_PRIM_IB_RESET_INDX */
-	vgt->pkts[vgt->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	vgt->pkts[vgt->atom.npkts++] = 0x00000103;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_multi_prim_ib_reset_indx;
-	/* VGT_OUTPUT_PATH_CNTL */
-	vgt->pkts[vgt->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	vgt->pkts[vgt->atom.npkts++] = 0x00000284;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_output_path_cntl;
-	/* VGT_GS_MODE */
-	vgt->pkts[vgt->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	vgt->pkts[vgt->atom.npkts++] = 0x00000290;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_gs_mode;
-	/* VGT_ENHANCE */
-	vgt->pkts[vgt->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	vgt->pkts[vgt->atom.npkts++] = 0x00000294;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_enhance;
-	/* VGT_GS_OUT_PRIM_TYPE */
-	vgt->pkts[vgt->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	vgt->pkts[vgt->atom.npkts++] = 0x0000029B;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_gs_out_prim_type;
-	/* VGT_PRIMITIVEID_EN */
-	vgt->pkts[vgt->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	vgt->pkts[vgt->atom.npkts++] = 0x000002A1;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_primitiveid_en;
-	/* VGT_MULTI_PRIM_IB_RESET_EN */
-	vgt->pkts[vgt->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
-	vgt->pkts[vgt->atom.npkts++] = 0x000002A5;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_multi_prim_ib_reset_en;
-	/* VGT_INSTANCE_STEP_RATE_0 */
-	vgt->pkts[vgt->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	vgt->pkts[vgt->atom.npkts++] = 0x000002A8;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_instance_step_rate_0;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_instance_step_rate_1;
-	/* VGT_REUSE_OFF */
-	vgt->pkts[vgt->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	vgt->pkts[vgt->atom.npkts++] = 0x000002AD;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_reuse_off;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_vtx_cnt_en;
-	/* VGT_VERTEX_REUSE_BLOCK_CNTL */
-	vgt->pkts[vgt->atom.npkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
-	vgt->pkts[vgt->atom.npkts++] = 0x00000316;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_vertex_reuse_block_cntl;
-	vgt->pkts[vgt->atom.npkts++] = pvgt.vgt_out_dealloc_cntl;
-	*atom = &vgt->atom;
-fprintf(stderr, "%s %d pkts\n", __func__, (*atom)->npkts);
-	return 0;
-out_err:
-	radeon_atom_put(&vgt->atom);
-	*atom = NULL;
-	return r;
-}
-
-/*
  * r600_vs_shader
  */
 struct r600_vs_shader {
@@ -1529,13 +1346,6 @@ int r600_atom_create(struct radeon_device *rdev,
 		atom->type = patom->type;
 		list_add_tail(&atom->list, &atoms->pa_atoms);
 		break;
-	case R600_ATOM_TP:
-		r = r600_tp_create(rdev, atoms, patom, &atom);
-		if (r)
-			return r;
-		atom->type = patom->type;
-		list_add_tail(&atom->list, &atoms->tp_atoms);
-		break;
 	case R600_ATOM_VPORT:
 		r = r600_vport_create(rdev, atoms, patom, &atom);
 		if (r)
@@ -1571,13 +1381,6 @@ int r600_atom_create(struct radeon_device *rdev,
 		atom->type = patom->type;
 		list_add_tail(&atom->list, &atoms->db_cntl_atoms);
 		break;
-	case R600_ATOM_VGT:
-		r = r600_vgt_create(rdev, atoms, patom, &atom);
-		if (r)
-			return r;
-		atom->type = patom->type;
-		list_add_tail(&atom->list, &atoms->vgt_atoms);
-		break;
 	case R600_ATOM_VS_SHADER:
 		r = r600_vs_shader_create(rdev, atoms, patom, &atom);
 		if (r)
@@ -1731,7 +1534,6 @@ int r600_batches_queue(struct radeon_device *rdev,
 	struct r600_batch *rbatch;
 	struct r600_batches *batches =  &atoms->batches;
 	struct r600_db_cntl *db_cntl;
-	struct r600_vgt *vgt;
 	int r, i;
 
 	for (i = 0; i < batch->inputs.nbuffers; i++) {
@@ -1749,8 +1551,7 @@ int r600_batches_queue(struct radeon_device *rdev,
 	i = 0;
 	if (batch->blend == NULL || batch->cb_cntl == NULL ||
 		batch->pa == NULL || batch->vport == NULL ||
-		batch->tp == NULL || batch->cb == NULL ||
-		batch->db_cntl == NULL || batch->vgt == NULL ||
+		batch->cb == NULL || batch->db_cntl == NULL ||
 		batch->vs_shader == NULL || batch->ps_shader == NULL) {
 		mutex_unlock(&atoms->mutex);
 		kfree(rbatch);
@@ -1775,7 +1576,6 @@ int r600_batches_queue(struct radeon_device *rdev,
 	rbatch->atoms[i++] = batch->cb_cntl; kref_get(&batch->cb_cntl->kref);
 	rbatch->atoms[i++] = batch->pa; kref_get(&batch->pa->kref);
 	rbatch->atoms[i++] = batch->vport; kref_get(&batch->vport->kref);
-	rbatch->atoms[i++] = batch->tp; kref_get(&batch->tp->kref);
 	rbatch->atoms[i++] = batch->vs_shader; kref_get(&batch->vs_shader->kref);
 	rbatch->atoms[i++] = batch->ps_shader; kref_get(&batch->ps_shader->kref);
 	rbatch->atoms[i++] = batch->db_cntl; kref_get(&batch->db_cntl->kref);
@@ -1788,7 +1588,6 @@ int r600_batches_queue(struct radeon_device *rdev,
 	rbatch->atoms[i++] = batch->db;
 	if (batch->db)
 		kref_get(&batch->db->kref);
-	rbatch->atoms[i++] = batch->vgt; kref_get(&batch->vgt->kref);
 	rbatch->atoms[i++] = batch->cb; kref_get(&batch->cb->kref);
 	db_cntl = container_of(batch->db_cntl, struct r600_db_cntl, atom);
 	if (db_cntl->need_z || db_cntl->need_h || db_cntl->need_s) {
@@ -1810,12 +1609,6 @@ int r600_batches_queue(struct radeon_device *rdev,
 			goto out_err;
 		}
 	}
-	vgt = container_of(batch->vgt, struct r600_vgt, atom);
-	if (vgt->need_gs) {
-		dev_err(rdev->dev, "we don't support GS shader\n");
-		r = -EINVAL;
-		goto out_err;
-	}
 reprocess:
 	radeon_atom_flush_cleanup(&rbatch->pre_flushes);
 	radeon_atom_flush_cleanup(&rbatch->post_flushes);
@@ -1929,8 +1722,6 @@ int r600_atoms_init(struct radeon_device *rdev, struct r600_atoms *atoms)
 	INIT_LIST_HEAD(&atoms->db_cntl_atoms);
 	INIT_LIST_HEAD(&atoms->pa_atoms);
 	INIT_LIST_HEAD(&atoms->sq_atoms);
-	INIT_LIST_HEAD(&atoms->tp_atoms);
-	INIT_LIST_HEAD(&atoms->vgt_atoms);
 	INIT_LIST_HEAD(&atoms->vport_atoms);
 	INIT_LIST_HEAD(&atoms->vs_shader_atoms);
 	INIT_LIST_HEAD(&atoms->ps_shader_atoms);
diff --git a/r600_atom_api.h b/r600_atom_api.h
index 86737e1..a7bf68e 100644
--- a/r600_atom_api.h
+++ b/r600_atom_api.h
@@ -28,17 +28,15 @@ struct drm_radeon_atom {
 
 /* R700 public API */
 #define R600_ATOM_CB		1
-#define R600_ATOM_TP		2
-#define R600_ATOM_PA		3
-#define R600_ATOM_CB_CNTL	4
-#define R600_ATOM_VPORT		5
-#define R600_ATOM_BLEND		6
-#define R600_ATOM_CONSTANTS	7
-#define R600_ATOM_DB		8
-#define R600_ATOM_DB_CNTL	9
-#define R600_ATOM_VGT		10
-#define R600_ATOM_VS_SHADER	11
-#define R600_ATOM_PS_SHADER	12
+#define R600_ATOM_PA		2
+#define R600_ATOM_CB_CNTL	3
+#define R600_ATOM_VPORT		4
+#define R600_ATOM_BLEND		5
+#define R600_ATOM_CONSTANTS	6
+#define R600_ATOM_DB		7
+#define R600_ATOM_DB_CNTL	8
+#define R600_ATOM_VS_SHADER	9
+#define R600_ATOM_PS_SHADER	10
 
 struct drm_r600_cb {
 	u32			pitch;
@@ -180,34 +178,6 @@ struct drm_r600_db_cntl {
 	u32			db_alpha_to_mask;
 };
 
-/* vgt - vertex grouper & tesslator */
-struct drm_r600_vgt {
-	u32			vgt_enhance;
-	u32			vgt_es_per_gs;
-	u32			vgt_gs_mode;
-	u32			vgt_gs_out_prim_type;
-	u32			vgt_gs_per_es;
-	u32			vgt_gs_per_vs;
-	u32			vgt_gs_vertex_reuse;
-	u32			vgt_instance_step_rate_0;
-	u32			vgt_instance_step_rate_1;
-	u32			vgt_max_vtx_indx;
-	u32			vgt_mc_lat_cntl;
-	u32			vgt_min_vtx_indx;
-	u32			vgt_multi_prim_ib_reset_en;
-	u32			vgt_multi_prim_ib_reset_indx;
-	u32			vgt_num_indices;
-	u32			vgt_num_instances;
-	u32			vgt_output_path_cntl;
-	u32			vgt_out_dealloc_cntl;
-	u32			vgt_primitiveid_en;
-	u32			vgt_primitive_type;
-	u32			vgt_reuse_off;
-	u32			vgt_vertex_reuse_block_cntl;
-	u32			vgt_vtx_cnt_en;
-	u32			vgt_vtx_vect_eject_reg;
-};
-
 /* vs_shader - vertex shader */
 struct drm_r600_vs_shader {
 	u32			sq_pgm_resources_vs;
@@ -262,11 +232,9 @@ struct drm_r600_batch {
 	struct radeon_atom		*cb;
 	struct radeon_atom		*cb_cntl;
 	struct radeon_atom		*pa;
-	struct radeon_atom		*tp;
 	struct radeon_atom		*vport;
 	struct radeon_atom		*db;
 	struct radeon_atom		*db_cntl;
-	struct radeon_atom		*vgt;
 	struct radeon_atom		*vs_shader;
 	struct radeon_atom		*ps_shader;
 	struct drm_r600_vs_input	inputs;
diff --git a/r700_atom.c b/r700_atom.c
index abfd2a6..d09e263 100644
--- a/r700_atom.c
+++ b/r700_atom.c
@@ -101,4 +101,97 @@ void r700_batches_states_default(struct radeon_device *rdev, struct r600_batches
 	ib->ptr[ib->cpkts++] = 0x00000000;
 	ib->ptr[ib->cpkts++] = 0x00000000;
 	ib->ptr[ib->cpkts++] = 0x00000000;
+	/* TA_CNTL_AUX */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONFIG_REG, 1);
+	ib->ptr[ib->cpkts++] = 0x00000542;
+	ib->ptr[ib->cpkts++] = 0x07000002;
+	/* VGT_VTX_VECT_EJECT_REG */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONFIG_REG, 1);
+	ib->ptr[ib->cpkts++] = 0x0000022C;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	/* VGT_GS_PER_ES
+	 * VGT_ES_PER_GS
+	 */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONFIG_REG, 2);
+	ib->ptr[ib->cpkts++] = 0x00000232;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	/* VGT_GS_VERTEX_REUSE
+	 * VGT_MC_LAT_CNTL
+	 */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONFIG_REG, 2);
+	ib->ptr[ib->cpkts++] = 0x00000235;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	/* VGT_GS_PER_VS */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONFIG_REG, 1);
+	ib->ptr[ib->cpkts++] = 0x0000023A;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	/* VGT_PRIMITIVE_TYPE */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONFIG_REG, 1);
+	ib->ptr[ib->cpkts++] = 0x00000256;
+	ib->ptr[ib->cpkts++] = 0x00000005;
+	/* VGT_NUM_INDICES
+	 * VGT_NUM_INSTANCES
+	 */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONFIG_REG, 2);
+	ib->ptr[ib->cpkts++] = 0x0000025C;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	/* VGT_MAX_VTX_INDX
+	 * VGT_MIN_VTX_INDX
+	 */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	ib->ptr[ib->cpkts++] = 0x00000100;
+	ib->ptr[ib->cpkts++] = 0x00FFFFFF;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	/* VGT_MULTI_PRIM_IB_RESET_INDX */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	ib->ptr[ib->cpkts++] = 0x00000103;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	/* VGT_OUTPUT_PATH_CNTL */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	ib->ptr[ib->cpkts++] = 0x00000284;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	/* VGT_GS_MODE */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	ib->ptr[ib->cpkts++] = 0x00000290;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	/* VGT_ENHANCE */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	ib->ptr[ib->cpkts++] = 0x00000294;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	/* VGT_GS_OUT_PRIM_TYPE */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	ib->ptr[ib->cpkts++] = 0x0000029B;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	/* VGT_PRIMITIVEID_EN */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	ib->ptr[ib->cpkts++] = 0x000002A1;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	/* VGT_MULTI_PRIM_IB_RESET_EN */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONTEXT_REG, 1);
+	ib->ptr[ib->cpkts++] = 0x000002A5;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	/* VGT_INSTANCE_STEP_RATE_0
+	 * VGT_INSTANCE_STEP_RATE_1
+	 */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	ib->ptr[ib->cpkts++] = 0x000002A8;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	/* VGT_REUSE_OFF
+	 * VGT_VTX_CNT_EN
+	 */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	ib->ptr[ib->cpkts++] = 0x000002AD;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	/* VGT_VERTEX_REUSE_BLOCK_CNTL
+	 * VGT_OUT_DEALLOC_CNTL
+	 */
+	ib->ptr[ib->cpkts++] = PKT3(PKT3_SET_CONTEXT_REG, 2);
+	ib->ptr[ib->cpkts++] = 0x00000316;
+	ib->ptr[ib->cpkts++] = 0x00000000;
+	ib->ptr[ib->cpkts++] = 0x00000000;
 }
diff --git a/radeon_atom.h b/radeon_atom.h
index 37b045d..9caeb73 100644
--- a/radeon_atom.h
+++ b/radeon_atom.h
@@ -53,7 +53,7 @@ struct radeon_atom {
 };
 
 /* R600 */
-#define R600_BATCH_NATOMS	13
+#define R600_BATCH_NATOMS	11
 struct r600_batch {
 	struct list_head		list;
 	struct list_head		pre_flushes;
@@ -89,8 +89,6 @@ struct r600_atoms {
 	struct list_head	db_cntl_atoms;
 	struct list_head	pa_atoms;
 	struct list_head	sq_atoms;
-	struct list_head	tp_atoms;
-	struct list_head	vgt_atoms;
 	struct list_head	vport_atoms;
 	struct list_head	vs_shader_atoms;
 	struct list_head	ps_shader_atoms;
diff --git a/test.c b/test.c
index b4aec38..25dad5d 100644
--- a/test.c
+++ b/test.c
@@ -98,10 +98,8 @@ int r600_tri_flat(struct radeon *radeon)
 	struct drm_r600_cb_cntl cb_cntl;
 	struct drm_r600_db_cntl db_cntl;
 	struct drm_r600_pa pa;
-	struct drm_r600_tp tp;
 	struct drm_r600_vport vport;
 	struct drm_r600_constants vs_constants;
-	struct drm_r600_vgt vgt;
 	struct drm_r600_vs_shader vs_shader;
 	struct drm_r600_ps_shader ps_shader;
 	struct drm_r600_batch batch;
@@ -135,14 +133,6 @@ int r600_tri_flat(struct radeon *radeon)
 	r = radeon_atom_create(rdev, &atom, &batch.cb);
 	if (r)
 		return r;
-	/* build tp */
-	tp.ta_cntl_aux = 0x07000002;
-	atom.type = R600_ATOM_TP;
-	atom.id = 0;
-	atom.data = (uint64_t)(uintptr_t)&tp;
-	r = radeon_atom_create(rdev, &atom, &batch.tp);
-	if (r)
-		return r;
 	/* build pa */
 	pa.pa_sc_mpass_ps_cntl = 0x00000000;
 	pa.pa_sc_mode_cntl = 0x00514000;
@@ -280,37 +270,6 @@ int r600_tri_flat(struct radeon *radeon)
 	r = radeon_atom_create(rdev, &atom, &batch.db_cntl);
 	if (r)
 		return r;
-	/* vgt */
-	vgt.vgt_enhance = 0x00000000;
-	vgt.vgt_es_per_gs = 0x00000000;
-	vgt.vgt_gs_mode = 0x00000000;
-	vgt.vgt_gs_out_prim_type = 0x00000000;
-	vgt.vgt_gs_per_es = 0x00000000;
-	vgt.vgt_gs_per_vs = 0x00000000;
-	vgt.vgt_gs_vertex_reuse = 0x00000000;
-	vgt.vgt_instance_step_rate_0 = 0x00000000;
-	vgt.vgt_instance_step_rate_1 = 0x00000000;
-	vgt.vgt_max_vtx_indx = 0x00FFFFFF;
-	vgt.vgt_mc_lat_cntl = 0x00000000;
-	vgt.vgt_min_vtx_indx = 0x00000000;
-	vgt.vgt_multi_prim_ib_reset_en = 0x00000000;
-	vgt.vgt_multi_prim_ib_reset_indx = 0x00000000;
-	vgt.vgt_num_indices = 0x00000000;
-	vgt.vgt_num_instances = 0x00000000;
-	vgt.vgt_output_path_cntl = 0x00000000;
-	vgt.vgt_out_dealloc_cntl = 0x00000000;
-	vgt.vgt_primitiveid_en = 0x00000000;
-	vgt.vgt_primitive_type = 0x00000005;
-	vgt.vgt_reuse_off = 0x00000001;
-	vgt.vgt_vertex_reuse_block_cntl = 0x00000000;
-	vgt.vgt_vtx_cnt_en = 0x00000000;
-	vgt.vgt_vtx_vect_eject_reg = 0x00000000;
-	atom.type = R600_ATOM_VGT;
-	atom.id = 0;
-	atom.data = (uint64_t)(uintptr_t)&vgt;
-	r = radeon_atom_create(rdev, &atom, &batch.vgt);
-	if (r)
-		return r;
 	/* vs_shader */
 	vs_shader.ninputs = 2;
 	vs_shader.input_semantic[0] = 1;