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/*
* Copyright © 2010 Jerome Glisse <glisse@freedesktop.org>
*
* This file is free software; you can redistribute it and/or modify
* it under the terms of version 2 of the GNU General Public License
* as published by the Free Software Foundation.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software Foundation,
* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301, USA.
*/
#ifndef RADEON_ATOM_H
#define RADEON_ATOM_H
#include "r600_winsys.h"
struct radeon_device;
struct radeon_ib;
struct radeon_atom;
struct radeon_atom_flush {
struct list_head list;
u32 flags;
struct radeon_bo *bo;
};
typedef int (*radeon_atom_emit_t)(struct radeon_device*,
struct radeon_atom*,
void *data,
struct radeon_ib*);
typedef int (*radeon_atom_process_t)(struct radeon_device*,
struct radeon_atom*,
u32 last_id,
void*);
typedef void (*radeon_atom_release_t)(struct kref *kref);
struct radeon_atom {
struct list_head list;
struct kref kref;
u32 type;
u32 id;
u32 nflushes;
u32 npkts;
u32 *pkts;
radeon_atom_emit_t emit;
radeon_atom_process_t process;
radeon_atom_release_t release;
};
/* R600 */
#define R600_BATCH_NATOMS 11
struct r600_batch {
struct list_head list;
struct list_head pre_flushes;
struct list_head post_flushes;
struct radeon_atom *atoms[R600_BATCH_NATOMS];
struct radeon_atom *emit_atoms[R600_BATCH_NATOMS];
u32 nemit_atoms;
u32 nflushes;
u32 npkts;
struct radeon_bo *shaders;
u32 shaders_idx;
struct drm_r600_vs_input inputs;
u32 nfs_resources;
};
#define R600_SHADER_SIZE (32 * 1024)
struct r600_batches {
struct radeon_ib *ib;
u32 npkts;
struct list_head batches;
u32 nfs_resources;
struct drm_r600_vs_buffer fs_resource[160];
u32 last_id[R600_BATCH_NATOMS];
};
struct r600_atoms {
struct list_head blend_atoms;
struct list_head cb_atoms;
struct list_head cb_cntl_atoms;
struct list_head constants_atoms;
struct list_head db_atoms;
struct list_head db_cntl_atoms;
struct list_head pa_atoms;
struct list_head sq_atoms;
struct list_head vport_atoms;
struct list_head vs_shader_atoms;
struct list_head ps_shader_atoms;
struct idr idr;
struct mutex mutex;
struct r600_batches batches;
unsigned npipes;
unsigned nbanks;
unsigned group_bytes;
};
extern int radeon_atom_init(struct radeon_atom *atom,
struct idr *idp,
radeon_atom_release_t release,
radeon_atom_emit_t emit,
radeon_atom_process_t process,
u32 *pkts);
extern void radeon_atom_flush_cleanup(struct list_head *flushes);
extern int radeon_atom_flush_add(struct list_head *flushes, struct radeon_bo *bo, u32 flags);
extern int radeon_atom_find_locked(struct list_head *atoms, u32 id,
u32 type, struct radeon_atom **atom);
extern int radeon_atom_emit_default(struct radeon_device *rdev,
struct radeon_atom *atom,
void *data,
struct radeon_ib *ib);
static inline void radeon_atom_put(struct radeon_atom *atom)
{
kref_put(&atom->kref, atom->release);
}
/* R600 */
extern void r600_shader_disassemble(u32 *bytecode, u32 ndwords);
extern int r600_shader_build_fs(struct radeon_device *rdev,
u32 *bytecode, u32 *ndwords,
struct drm_r600_vs_input *inputs,
struct drm_r600_vs_shader *vs);
extern int r600_atoms_init(struct radeon_device *rdev, struct r600_atoms *atoms);
extern void r600_atoms_release(struct radeon_device *rdev, struct r600_atoms *atoms);
extern int r600_atom_create(struct radeon_device *rdev,
struct r600_atoms *atoms,
struct drm_radeon_atom *patom,
struct radeon_atom **atomptr);
extern int r600_batches_queue(struct radeon_device *rdev,
struct r600_atoms *atoms,
struct drm_r600_batch *batch);
extern int r600_batches_flush(struct radeon_device *rdev, struct r600_atoms *atoms);
/* R700 */
extern void r700_batches_states_default(struct radeon_device *rdev, struct r600_batches *batches);
#endif
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