diff options
| author | Kevin Brace <kevinbrace@gmx.com> | 2017-07-06 22:43:43 -0500 |
|---|---|---|
| committer | Kevin Brace <kevinbrace@gmx.com> | 2017-07-06 22:43:43 -0500 |
| commit | 83e048f7a0e05fd6877732c8561baee9eeefacbb (patch) | |
| tree | b3d2b5aa8ae36e29c37e37076275036c0a63da4a | |
| parent | 9790653fb663878c7d0d86aab24a3a5ee0444f3a (diff) | |
Added via_fp_set_secondary_power_seq_type
This is an inline function.
Signed-off-by: Kevin Brace <kevinbrace@gmx.com>
| -rw-r--r-- | drivers/gpu/drm/via/crtc_hw.h | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/gpu/drm/via/crtc_hw.h b/drivers/gpu/drm/via/crtc_hw.h index cb2fae3eea7d..0e7850e317ec 100644 --- a/drivers/gpu/drm/via/crtc_hw.h +++ b/drivers/gpu/drm/via/crtc_hw.h @@ -436,6 +436,24 @@ via_fp_set_primary_hard_power(void __iomem *regs, bool power_state) } /* + * Sets CX700 / VX700 or later chipset's FP secondary + * power sequence control type. + */ +static inline void +via_fp_set_secondary_power_seq_type(void __iomem *regs, + bool ctrl_type) +{ + /* 3X5.D3[0] - FP Secondary Power Sequence Control Type + * 0: Hardware Control + * 1: Software Control */ + svga_wcrt_mask(regs, 0xD3, + ctrl_type ? 0x00 : BIT(0), BIT(0)); + DRM_DEBUG_KMS("FP Secondary Power Sequence Control Type: " + "%s Control\n", + ctrl_type ? "Hardware" : "Software"); +} + +/* * Sets FPDP (Flat Panel Display Port) Low I/O pad state. */ static inline void |